mirror of
https://github.com/JonathanSalwan/Triton
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Triton Library
93 lines
3.4 KiB
Python
93 lines
3.4 KiB
Python
import os
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import sys
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SPEC = sys.argv[1] # defined from the doc/CMakeLists.txt
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BUILD_DIR = sys.argv[2] # defined from the doc/CMakeLists.txt
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x86_regs = list()
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aarch64_regs = list()
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arm32_regs = list()
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rv64_regs = list()
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rv32_regs = list()
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##############################################################################
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if SPEC.find('x86') >= 0:
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with open(SPEC, "r") as f:
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for line in f.readlines():
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if line.startswith("REG_SPEC"):
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args = line[line.find("(") + 1: line.find(")")].split(", ")
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x86_regs.append((args[0], args[-1].find("true") >= 0))
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with open(os.path.join(BUILD_DIR, "x86_reg"), "w") as out:
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out.write('<ul>\n')
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for name, valid in x86_regs:
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if valid:
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out.write("<li><b>REG.X86.{}</b></li>\n".format(name))
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out.write('</ul>\n')
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with open(os.path.join(BUILD_DIR, "x8664_reg"), "w") as out:
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out.write('<ul>\n')
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for name, _ in x86_regs:
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out.write("<li><b>REG.X86_64.{}</b></li>\n".format(name))
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out.write('</ul>\n')
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##############################################################################
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elif SPEC.find('aarch64') >= 0:
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with open(SPEC, "r") as f:
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for line in f.readlines():
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if line.startswith("REG_SPEC") or line.startswith("SYS_REG_SPEC"):
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args = line[line.find("(") + 1: line.find(")")].split(", ")
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aarch64_regs.append(args[0])
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with open(os.path.join(BUILD_DIR, "aarch64_reg"), "w") as out:
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out.write('<ul>\n')
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for name in aarch64_regs:
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out.write("<li><b>REG.AARCH64.{}</b></li>\n".format(name))
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out.write('</ul>\n')
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##############################################################################
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elif SPEC.find('arm32') >= 0:
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with open(SPEC, "r") as f:
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for line in f.readlines():
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if line.startswith("REG_SPEC"):
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args = line[line.find("(") + 1: line.find(")")].split(", ")
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arm32_regs.append(args[0])
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with open(os.path.join(BUILD_DIR, "arm32_reg"), "w") as out:
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out.write('<ul>\n')
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for name in arm32_regs:
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out.write("<li><b>REG.ARM32.{}</b></li>\n".format(name))
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out.write('</ul>\n')
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##############################################################################
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elif SPEC.find('riscv64') >= 0:
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with open(SPEC, "r") as f:
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for line in f.readlines():
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if line.startswith("REG_SPEC") or line.startswith("SYS_REG_SPEC"):
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args = line[line.find("(") + 1: line.find(")")].split(", ")
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rv64_regs.append(args[1])
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with open(os.path.join(BUILD_DIR, "rv64_reg"), "w") as out:
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out.write('<ul>\n')
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for name in rv64_regs:
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out.write("<li><b>REG.RISCV64.{}</b></li>\n".format(name))
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out.write('</ul>\n')
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##############################################################################
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elif SPEC.find('riscv32') >= 0:
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with open(SPEC, "r") as f:
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for line in f.readlines():
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if line.startswith("REG_SPEC") or line.startswith("SYS_REG_SPEC"):
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args = line[line.find("(") + 1: line.find(")")].split(", ")
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rv32_regs.append(args[1])
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with open(os.path.join(BUILD_DIR, "rv32_reg"), "w") as out:
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out.write('<ul>\n')
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for name in rv32_regs:
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out.write("<li><b>REG.RISCV32.{}</b></li>\n".format(name))
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out.write('</ul>\n')
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