mirror of
https://github.com/asmjit/asmjit
synced 2026-06-08 13:13:30 +00:00
kobalicek
250 lines
7.3 KiB
C++
250 lines
7.3 KiB
C++
// This file is part of AsmJit project <https://asmjit.com>
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//
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// See <asmjit/core.h> or LICENSE.md for license and copyright information
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// SPDX-License-Identifier: Zlib
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#include <asmjit/core/api-build_p.h>
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#if !defined(ASMJIT_NO_X86)
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#include <asmjit/core/misc_p.h>
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#include <asmjit/x86/x86operand.h>
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ASMJIT_BEGIN_SUB_NAMESPACE(x86)
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// x86::Operand - Tests
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// ====================
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#if defined(ASMJIT_TEST)
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UNIT(x86_operand) {
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Label L(1000); // Label with some ID.
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INFO("Checking basic properties of built-in X86 registers");
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EXPECT_EQ(gpb(Gp::kIdAx), al);
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EXPECT_EQ(gpb(Gp::kIdBx), bl);
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EXPECT_EQ(gpb(Gp::kIdCx), cl);
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EXPECT_EQ(gpb(Gp::kIdDx), dl);
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EXPECT_EQ(gpb_lo(Gp::kIdAx), al);
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EXPECT_EQ(gpb_lo(Gp::kIdBx), bl);
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EXPECT_EQ(gpb_lo(Gp::kIdCx), cl);
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EXPECT_EQ(gpb_lo(Gp::kIdDx), dl);
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EXPECT_EQ(gpb_hi(Gp::kIdAx), ah);
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EXPECT_EQ(gpb_hi(Gp::kIdBx), bh);
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EXPECT_EQ(gpb_hi(Gp::kIdCx), ch);
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EXPECT_EQ(gpb_hi(Gp::kIdDx), dh);
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EXPECT_EQ(gpw(Gp::kIdAx), ax);
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EXPECT_EQ(gpw(Gp::kIdBx), bx);
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EXPECT_EQ(gpw(Gp::kIdCx), cx);
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EXPECT_EQ(gpw(Gp::kIdDx), dx);
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EXPECT_EQ(gpd(Gp::kIdAx), eax);
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EXPECT_EQ(gpd(Gp::kIdBx), ebx);
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EXPECT_EQ(gpd(Gp::kIdCx), ecx);
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EXPECT_EQ(gpd(Gp::kIdDx), edx);
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EXPECT_EQ(gpq(Gp::kIdAx), rax);
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EXPECT_EQ(gpq(Gp::kIdBx), rbx);
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EXPECT_EQ(gpq(Gp::kIdCx), rcx);
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EXPECT_EQ(gpq(Gp::kIdDx), rdx);
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EXPECT_NE(gpb(Gp::kIdAx), dl);
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EXPECT_NE(gpw(Gp::kIdBx), cx);
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EXPECT_NE(gpd(Gp::kIdCx), ebx);
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EXPECT_NE(gpq(Gp::kIdDx), rax);
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INFO("Checking if x86::reg(...) matches built-in IDs");
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EXPECT_EQ(gpb(5), bpl);
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EXPECT_EQ(gpw(5), bp);
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EXPECT_EQ(gpd(5), ebp);
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EXPECT_EQ(gpq(5), rbp);
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EXPECT_EQ(st(5) , st5);
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EXPECT_EQ(mm(5) , mm5);
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EXPECT_EQ(k(5) , k5);
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EXPECT_EQ(cr(5) , cr5);
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EXPECT_EQ(dr(5) , dr5);
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EXPECT_EQ(xmm(5), xmm5);
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EXPECT_EQ(ymm(5), ymm5);
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EXPECT_EQ(zmm(5), zmm5);
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INFO("Checking x86::Gp register properties");
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EXPECT_TRUE(Gp::make_r32(0).is_reg());
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EXPECT_TRUE(Gp::make_r32(0).is_gp());
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EXPECT_TRUE(Gp::make_r32(0).is_gp32());
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EXPECT_TRUE(eax.is_reg());
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EXPECT_TRUE(eax.is_gp());
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EXPECT_TRUE(eax.is_gp32());
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EXPECT_EQ(eax.id(), 0u);
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EXPECT_EQ(eax.size(), 4u);
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EXPECT_EQ(eax.reg_type(), RegType::kGp32);
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EXPECT_EQ(eax.reg_group(), RegGroup::kGp);
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EXPECT_TRUE(Gp::make_r64(0).is_reg());
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EXPECT_TRUE(Gp::make_r64(0).is_gp());
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EXPECT_TRUE(Gp::make_r64(0).is_gp64());
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EXPECT_TRUE(rax.is_reg());
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EXPECT_TRUE(rax.is_gp());
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EXPECT_TRUE(rax.is_gp64());
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EXPECT_EQ(rax.id(), 0u);
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EXPECT_EQ(rax.size(), 8u);
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EXPECT_EQ(rax.reg_type(), RegType::kGp64);
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EXPECT_EQ(rax.reg_group(), RegGroup::kGp);
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INFO("Checking x86::Vec register properties");
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EXPECT_TRUE(Vec().is_reg());
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EXPECT_TRUE(Vec::make_xmm(0).is_reg());
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EXPECT_TRUE(Vec::make_xmm(0).is_vec128());
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EXPECT_TRUE(xmm4.is_reg());
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EXPECT_TRUE(xmm4.is_vec());
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EXPECT_EQ(xmm4.id(), 4u);
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EXPECT_EQ(xmm4.size(), 16u);
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EXPECT_EQ(xmm4.reg_type(), RegType::kVec128);
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EXPECT_EQ(xmm4.reg_group(), RegGroup::kVec);
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EXPECT_TRUE(Vec::make_ymm(0).is_reg());
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EXPECT_TRUE(Vec::make_ymm(0).is_vec256());
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EXPECT_TRUE(ymm5.is_reg());
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EXPECT_TRUE(ymm5.is_vec());
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EXPECT_EQ(ymm5.id(), 5u);
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EXPECT_EQ(ymm5.size(), 32u);
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EXPECT_EQ(ymm5.reg_type(), RegType::kVec256);
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EXPECT_EQ(ymm5.reg_group(), RegGroup::kVec);
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EXPECT_TRUE(Vec::make_zmm(0).is_reg());
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EXPECT_TRUE(Vec::make_zmm(0).is_vec512());
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EXPECT_TRUE(zmm6.is_reg());
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EXPECT_TRUE(zmm6.is_vec());
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EXPECT_EQ(zmm6.id(), 6u);
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EXPECT_EQ(zmm6.size(), 64u);
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EXPECT_EQ(zmm6.reg_type(), RegType::kVec512);
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EXPECT_EQ(zmm6.reg_group(), RegGroup::kVec);
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// Converts a VEC register to a type of the passed register, but keeps the ID.
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EXPECT_EQ(xmm4.clone_as(ymm10), ymm4);
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EXPECT_EQ(xmm4.clone_as(zmm11), zmm4);
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EXPECT_EQ(ymm5.clone_as(xmm12), xmm5);
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EXPECT_EQ(ymm5.clone_as(zmm13), zmm5);
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EXPECT_EQ(zmm6.clone_as(xmm14), xmm6);
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EXPECT_EQ(zmm6.clone_as(ymm15), ymm6);
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EXPECT_EQ(xmm7.xmm(), xmm7);
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EXPECT_EQ(xmm7.ymm(), ymm7);
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EXPECT_EQ(xmm7.zmm(), zmm7);
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EXPECT_EQ(ymm7.xmm(), xmm7);
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EXPECT_EQ(ymm7.ymm(), ymm7);
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EXPECT_EQ(ymm7.zmm(), zmm7);
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EXPECT_EQ(zmm7.xmm(), xmm7);
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EXPECT_EQ(zmm7.ymm(), ymm7);
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EXPECT_EQ(zmm7.zmm(), zmm7);
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EXPECT_EQ(xmm4.half(), xmm4);
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EXPECT_EQ(ymm4.half(), xmm4);
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EXPECT_EQ(zmm4.half(), ymm4);
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INFO("Checking x86::Mm register properties");
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EXPECT_TRUE(Mm().is_reg());
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EXPECT_TRUE(mm2.is_reg());
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EXPECT_EQ(mm2.id(), 2u);
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EXPECT_EQ(mm2.size(), 8u);
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EXPECT_EQ(mm2.reg_type(), RegType::kX86_Mm);
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EXPECT_EQ(mm2.reg_group(), RegGroup::kX86_MM);
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INFO("Checking x86::KReg register properties");
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EXPECT_TRUE(KReg().is_reg());
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EXPECT_TRUE(k3.is_reg());
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EXPECT_EQ(k3.id(), 3u);
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EXPECT_EQ(k3.size(), 0u);
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EXPECT_EQ(k3.reg_type(), RegType::kMask);
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EXPECT_EQ(k3.reg_group(), RegGroup::kMask);
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INFO("Checking x86::St register properties");
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EXPECT_TRUE(St().is_reg());
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EXPECT_TRUE(st1.is_reg());
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EXPECT_EQ(st1.id(), 1u);
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EXPECT_EQ(st1.size(), 10u);
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EXPECT_EQ(st1.reg_type(), RegType::kX86_St);
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EXPECT_EQ(st1.reg_group(), RegGroup::kX86_St);
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INFO("Checking if default constructed regs behave as expected");
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EXPECT_FALSE(Reg().is_valid());
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EXPECT_FALSE(Gp().is_valid());
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EXPECT_FALSE(Vec().is_valid());
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EXPECT_FALSE(Mm().is_valid());
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EXPECT_FALSE(KReg().is_valid());
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EXPECT_FALSE(SReg().is_valid());
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EXPECT_FALSE(CReg().is_valid());
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EXPECT_FALSE(DReg().is_valid());
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EXPECT_FALSE(St().is_valid());
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EXPECT_FALSE(Bnd().is_valid());
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INFO("Checking x86::Mem operand");
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Mem m;
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EXPECT_EQ(m, Mem());
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m = ptr(L);
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EXPECT_TRUE(m.has_base());
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EXPECT_FALSE(m.has_base_reg());
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EXPECT_TRUE(m.has_base_label());
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EXPECT_FALSE(m.has_offset());
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EXPECT_FALSE(m.is_offset_64bit());
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EXPECT_EQ(m.offset(), 0);
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EXPECT_EQ(m.offset_lo32(), 0);
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m = ptr(0x0123456789ABCDEFu);
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EXPECT_FALSE(m.has_base());
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EXPECT_FALSE(m.has_base_reg());
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EXPECT_FALSE(m.has_index());
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EXPECT_FALSE(m.has_index_reg());
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EXPECT_TRUE(m.has_offset());
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EXPECT_TRUE(m.is_offset_64bit());
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EXPECT_EQ(m.offset(), int64_t(0x0123456789ABCDEFu));
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EXPECT_EQ(m.offset_lo32(), int32_t(0x89ABCDEFu));
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m.add_offset(1);
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EXPECT_EQ(m.offset(), int64_t(0x0123456789ABCDF0u));
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m = ptr(0x0123456789ABCDEFu, rdi, 3);
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EXPECT_FALSE(m.has_segment());
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EXPECT_FALSE(m.has_base());
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EXPECT_FALSE(m.has_base_reg());
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EXPECT_TRUE(m.has_index());
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EXPECT_TRUE(m.has_index_reg());
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EXPECT_EQ(m.index_type(), rdi.reg_type());
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EXPECT_EQ(m.index_id(), rdi.id());
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EXPECT_EQ(m.shift(), 3u);
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EXPECT_TRUE(m.has_offset());
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EXPECT_TRUE(m.is_offset_64bit());
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EXPECT_EQ(m.offset(), int64_t(0x0123456789ABCDEFu));
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EXPECT_EQ(m.offset_lo32(), int32_t(0x89ABCDEFu));
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m.reset_index();
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EXPECT_FALSE(m.has_index());
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EXPECT_FALSE(m.has_index_reg());
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m = ptr(rax);
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EXPECT_TRUE(m.has_base());
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EXPECT_TRUE(m.has_base_reg());
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EXPECT_EQ(m.base_type(), rax.reg_type());
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EXPECT_EQ(m.base_id(), rax.id());
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EXPECT_FALSE(m.has_index());
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EXPECT_FALSE(m.has_index_reg());
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EXPECT_EQ(m.index_type(), RegType::kNone);
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EXPECT_EQ(m.index_id(), 0u);
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EXPECT_FALSE(m.has_offset());
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EXPECT_FALSE(m.is_offset_64bit());
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EXPECT_EQ(m.offset(), 0);
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EXPECT_EQ(m.offset_lo32(), 0);
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m.set_index(rsi);
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EXPECT_TRUE(m.has_index());
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EXPECT_TRUE(m.has_index_reg());
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EXPECT_EQ(m.index_type(), rsi.reg_type());
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EXPECT_EQ(m.index_id(), rsi.id());
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}
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#endif
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ASMJIT_END_SUB_NAMESPACE
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#endif // !ASMJIT_NO_X86
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