Fabrice Desclaux
aaf55a1e2d
Container: add dynsym symbols
2017-03-25 20:34:53 +01:00
Fabrice Desclaux
1b3fcbdda8
Core/asmbloc: move asmbloc to asmblock
2017-03-13 15:07:28 +01:00
Fabrice Desclaux
72d7235d59
Asmbloc: rename asm_symbol_pool to AsmSymbolPool
2017-03-13 14:13:14 +01:00
Ajax
1d9924a4f7
Introduce Container.symbol_pool, containing container symbols (if any)
2016-03-21 16:28:23 +01:00
Ajax
38fb7d07fc
Remove unused variables
2016-02-04 23:20:21 +01:00
Ajax
7f30627d9b
Analysis: Typo
2015-04-13 17:10:57 +02:00
Ajax
37eb0a3d29
Remove lazy logging pattern
2015-03-30 18:05:24 +02:00
Ajax
621bd32bfc
LoaderPE: Add guess_arch and link it to ContainerPE.arch
2015-03-19 10:17:09 +01:00
Ajax
8483271589
LoaderELF: Add guess_arch and link it to ContainerELF.arch
2015-03-19 10:12:42 +01:00
Ajax
9adbbb771d
Container: add a new property: arch, the guessed arch from the container
2015-03-19 10:05:47 +01:00
Ajax
1c9d151e71
Container: Init attributes with None
2015-03-19 10:04:24 +01:00
Pierre LALET
a9864c802f
analysis: replace wildcard imports
2015-02-18 10:45:26 +01:00
Camille Mougey
aa9145fca6
Analysis: Update vm_loads calls, avoid reimplemeting vm_load_pe_libs
2014-12-20 17:44:23 +01:00
Fabrice Desclaux
05a333fe41
Jitter: update API
2014-12-03 11:26:45 +01:00
Camille Mougey
d224bd8b0e
Container: Refactor in class and subclass for PE, ELF and Unknown
2014-11-03 19:11:27 +01:00
Camille Mougey
bf08353e23
Container: update API with full words
2014-11-03 18:05:49 +01:00
Camille Mougey
1c6b959a3a
Container: Fix import, refactor file reading
2014-11-03 18:04:20 +01:00
Camille Mougey
7d0bdbcafd
Container: Refactor and comment
2014-11-03 17:38:25 +01:00
Fabrice Desclaux
809d3738bb
Remove vm_ prefix /!\ API MODIF
...
The jitter cpu/vm modules used an unecessary vm_ prefix for various api.
jitter.cpu.vm_get_gpreg() => jitter.cpu.get_gpreg()
jitter.vm.vm_get_mem... => jitter.vm.get_mem...
2014-10-07 17:44:50 +02:00
Fabrice Desclaux
6e09df71a3
Modify irbloc destination mecanism. Rework API in consequence.
...
Fat patch here: some API have changed.
Each irbloc now affects a special "IRDst" register which is used to
describe the destination irbloc. It allows simple description of
architectures using delay slots. Architectures semantic and tcc/python
jitter are modified in consequence. LLVM jitter is disabled for now,
but should be patch soon.
2014-09-05 11:30:05 +02:00
Fabrice Desclaux
82863e884a
binary: suppr verbose messages
2014-09-01 13:48:45 +02:00
Fabrice Desclaux
acd7a06154
analysis: add container for elf/pe/str manipulation
2014-08-29 16:03:17 +02:00