40b60e86b5
Jitter: add gcc backend
2016-04-26 11:05:41 +02:00
fce9df699d
Add arch aarch64
2015-08-08 23:45:57 +02:00
5699ee60b9
Jitter: Factorize common cpu attributes in JitCpu; Update APIs in consequence
2015-04-22 18:37:56 +02:00
65feb2335c
Jitter: get/set mem is now wrapped in cpu
...
The get/set mem used during jit is wrapped by cpu. This allows cpu object to
callback (or not, depending on arch) a cache update.
2015-04-22 11:31:21 +02:00
644893c46e
Jitter: split VmMngr from JitCpu
2015-03-10 18:46:56 +01:00
0fb799f88b
IR: Introduce Translators, an abstraction for IR translation
...
Translators exposes method to convert Miasm IR to others languages
2014-12-14 18:16:33 +01:00
ab7ef55294
Jitter: move loader specific code to a submodule
2014-12-03 11:26:45 +01:00
18ab294bf5
Move os_dep out of the jitter module
2014-10-07 18:41:37 +02:00
6e09df71a3
Modify irbloc destination mecanism. Rework API in consequence.
...
Fat patch here: some API have changed.
Each irbloc now affects a special "IRDst" register which is used to
describe the destination irbloc. It allows simple description of
architectures using delay slots. Architectures semantic and tcc/python
jitter are modified in consequence. LLVM jitter is disabled for now,
but should be patch soon.
2014-09-05 11:30:05 +02:00
22c0cc1ae2
Jitter: add mips32l jit
2014-08-22 16:13:53 +02:00
c7ee5b9d06
Jitter: merge jitcoreARCH and vm_mngr
2014-08-22 13:42:32 +02:00
376576de29
Add mips32 arch
2014-08-06 17:28:13 +02:00
ed5c3668cc
Miasm v2
...
* API has changed, so old scripts need updates
* See example for API usage
* Use tcc or llvm for jit emulation
* Go to test and run test_all.py to check install
Enjoy !
2014-06-03 10:27:56 +02:00
a183e1ebd5
Send miasm v1 to hell
2014-06-03 10:18:48 +02:00
c653fb8faa
enable miasm installation without tcc
2012-01-17 11:29:07 +01:00
066972d7f1
realease commit
2011-07-27 11:12:04 +02:00
serpilliere