Commit Graph

10 Commits

Author SHA1 Message Date
Fabrice Desclaux 809d3738bb Remove vm_ prefix /!\ API MODIF
The jitter cpu/vm modules used an unecessary vm_ prefix for various api.

jitter.cpu.vm_get_gpreg() => jitter.cpu.get_gpreg()
jitter.vm.vm_get_mem... => jitter.vm.get_mem...
2014-10-07 17:44:50 +02:00
ajax 98d7ba4936 JitCore Python: Handle log_regs, log_mn 2014-09-26 17:43:31 +02:00
Fabrice Desclaux 94f79e2227 jitcore_python: fix reg init 2014-09-05 16:10:07 +02:00
Fabrice Desclaux 6e09df71a3 Modify irbloc destination mecanism. Rework API in consequence.
Fat patch here: some API have changed.

Each irbloc now affects a special "IRDst" register which is used to
describe the destination irbloc. It allows simple description of
architectures using delay slots. Architectures semantic and tcc/python
jitter are modified in consequence. LLVM jitter is disabled for now,
but should be patch soon.
2014-09-05 11:30:05 +02:00
ajax 192120822e Jitter Python: check all memory exceptions only on new instruction (in assembly) 2014-06-16 19:08:20 +02:00
ajax 7116edac83 Jitter Python: Init without alias (fix CPU update bug), manage memory exceptions 2014-06-16 18:53:42 +02:00
ajax 4d63f0d1a6 Jitter Python: Reorganize the Jit function builder
- Rewrite updates (engine and JitCpu) in subfunctions
 - Explode eval block in an eval_ir loop to gain more control
2014-06-16 18:13:51 +02:00
serpilliere e862e45e87 Jit python: handle jump to ExprId (asm_label) 2014-06-16 10:31:05 +02:00
ajax 8f3899863c Jitter: Add basic write handling in Python Jitter 2014-06-14 23:48:40 +02:00
ajax 3a36d6c8af Jitter: Add PoC jitter engine based on Miasm2 Symbolic execution engine
This way, we hope to:
 - make symbexec more reliable
 - provide a full Python based Jitter (but *very* slow)

Currently, memory writes, self-modiying code and exceptions aren't handled
2014-06-14 20:19:44 +02:00