diff --git a/chipsec/cfg/8086/common.xml b/chipsec/cfg/8086/common.xml
index 9b7037b2..8d2d70dd 100644
--- a/chipsec/cfg/8086/common.xml
+++ b/chipsec/cfg/8086/common.xml
@@ -218,7 +218,7 @@ Common (default) XML platform configuration file
     </register>
 
     <!-- ME Host Firmware Status https://github.com/coreboot/coreboot/blob/master/src/southbridge/intel/*/{pch,me}.h -->
-    <register name="HFS" type="pcicfg" bus="0" dev="0x16" fun="0" offset="0x40" size="4" desc="ME Host Firmware Status">
+    <register name="HFS" type="pcicfg" device="MEI1" offset="0x40" size="4" desc="ME Host Firmware Status">
       <field name="MFG_MODE"   bit="4" size="1" desc="ME Manufacturing Mode" />
       <field name="FW_INIT_COMPLETE"   bit="9" size="1" desc="ME Firmware Initialization Complete" />
       <field name="UPDATE_IN_PROGRESS"   bit="11" size="1" desc="ME Update In Progress" />