diff --git a/chipsec/cfg/parsers/core_parsers.py b/chipsec/cfg/parsers/core_parsers.py index 6c67afd6..dea8ce4d 100644 --- a/chipsec/cfg/parsers/core_parsers.py +++ b/chipsec/cfg/parsers/core_parsers.py @@ -44,10 +44,10 @@ def _config_convert_data(xml_node, did_is_range=False): INT_KEYS = ['dev', 'fun', 'vid', 'did', 'rid', 'offset', 'bit', 'size', 'port', 'msr', 'value', 'address', 'fixed_address', 'base_align', 'align_bits', 'mask', - 'reg_align', 'limit_align', 'regh_align', 'bus', + 'reg_align', 'limit_align', 'regh_align', 'width', 'reg'] BOOL_KEYS = ['req_pch'] - INT_LIST_KEYS = [] + INT_LIST_KEYS = ['bus'] STR_LIST_KEYS = ['config'] RANGE_LIST_KEYS = ['detection_value'] if did_is_range: @@ -141,10 +141,8 @@ class CoreConfig(BaseConfigParser): else: for did_str in self.cfg.CONFIG_PCI_RAW[vid_str]: pci_data = self.cfg.CONFIG_PCI_RAW[vid_str][did_str] - bus_match = dev_attr['bus'] == pci_data['bus'] \ - if type(pci_data['bus']) is int else \ - dev_attr['bus'] in pci_data['bus'] # TODO: Investigate why this is needed - if bus_match and dev_attr['dev'] == pci_data['dev'] and \ + + if dev_attr['bus'] in pci_data['bus'] and dev_attr['dev'] == pci_data['dev'] and \ dev_attr['fun'] == pci_data['fun']: self._add_dev(vid_str, dev_name, pci_data, dev_attr) break @@ -153,11 +151,7 @@ class CoreConfig(BaseConfigParser): def _add_dev(self, vid_str, name, pci_info, dev_attr): if pci_info: - if type(pci_info['bus']) is int: # TODO: Investigate why this is needed - self.cfg.BUS[name] = [pci_info['bus']] - else: - self.cfg.BUS[name] = pci_info['bus'] - pci_info['bus'] = pci_info['bus'][0] + self.cfg.BUS[name] = pci_info['bus'] self.cfg.CONFIG_PCI[name] = copy.copy(pci_info) else: self.cfg.CONFIG_PCI[name] = copy.deepcopy(dev_attr) diff --git a/chipsec/chipset.py b/chipsec/chipset.py index c189ed0c..b7751ff9 100644 --- a/chipsec/chipset.py +++ b/chipsec/chipset.py @@ -23,6 +23,7 @@ Contains platform identification functions """ import errno import traceback +from typing import Union from chipsec.helper.oshelper import helper as os_helper from chipsec.helper.basehelper import Helper @@ -31,6 +32,7 @@ from chipsec.hal import cpu, io, iobar, mmio, msgbus, msr, pci, physmem, ucode, from chipsec.hal.pci import PCI_HDR_RID_OFF from chipsec.exceptions import UnknownChipsetError, DeviceNotFoundError, CSReadError from chipsec.exceptions import RegisterTypeNotFoundError, OsHelperError +from chipsec.exceptions import CSFirstNotFoundError, CSBusNotFoundError from chipsec.logger import logger from chipsec.defines import is_hex, is_all_ones, ARCH_VID @@ -253,11 +255,24 @@ class Chipset: # ################################################################################## + def get_first_bus(self, device:dict) -> int: + if 'bus' in device: + return self.get_first(device['bus']) + raise CSBusNotFoundError() + + + def get_first(self, a_list:Union[list, int]) -> int: + if type(a_list) is int: + return a_list + if type(a_list) is list: + return a_list[0] + raise CSFirstNotFoundError() + def get_device_BDF(self, device_name): device = self.Cfg.CONFIG_PCI[device_name] if device is None or device == {}: raise DeviceNotFoundError('DeviceNotFound: {}'.format(device_name)) - b = device['bus'] + b = self.get_first_bus(device) d = device['dev'] f = device['fun'] return (b, d, f) @@ -280,7 +295,7 @@ class Chipset: if bus is not None: b = bus else: - b = reg['bus'] + b = self.get_first_bus(reg) d = reg['dev'] f = reg['fun'] return self.pci.is_enabled(b, d, f) @@ -356,7 +371,7 @@ class Chipset: if reg_def["type"] in ["pcicfg", "mmcfg"]: if dev_name in self.Cfg.CONFIG_PCI: dev = self.Cfg.CONFIG_PCI[dev_name] - reg_def['bus'] = dev['bus'] + reg_def['bus'] = self.get_first_bus(dev) reg_def['dev'] = dev['dev'] reg_def['fun'] = dev['fun'] elif reg_def["type"] == "memory": @@ -422,9 +437,9 @@ class Chipset: reg_value = 0 if (RegisterType.PCICFG == rtype) or (RegisterType.MMCFG == rtype): if bus is not None: - b = bus + b = self.get_first(bus) else: - b = reg['bus'] + b = self.get_first_bus(reg) d = reg['dev'] f = reg['fun'] o = reg['offset'] @@ -518,7 +533,7 @@ class Chipset: if bus is not None: b = bus else: - b = reg['bus'] + b = self.get_first_bus(reg) d = reg['dev'] f = reg['fun'] o = reg['offset'] @@ -754,7 +769,7 @@ class Chipset: if bus is not None: b = bus else: - b = reg['bus'] + b = self.get_first_bus(reg) d = reg['dev'] f = reg['fun'] o = reg['offset'] diff --git a/chipsec/exceptions.py b/chipsec/exceptions.py index 839396d7..debf475a 100644 --- a/chipsec/exceptions.py +++ b/chipsec/exceptions.py @@ -34,6 +34,11 @@ class RegisterNotFoundError(RuntimeError): class RegisterTypeNotFoundError(RuntimeError): pass +class CSBusNotFoundError(RuntimeError): + pass + +class CSFirstNotFoundError(RuntimeError): + pass class CSConfigError(RuntimeError): pass diff --git a/chipsec/hal/iobar.py b/chipsec/hal/iobar.py index ec55941c..26ca0286 100644 --- a/chipsec/hal/iobar.py +++ b/chipsec/hal/iobar.py @@ -85,7 +85,7 @@ class IOBAR(hal_base.HALBase): empty_base = 0 else: # this method is not preferred - base = self.cs.pci.read_word(bar['bus'], bar['dev'], bar['fun'], bar['reg']) + base = self.cs.pci.read_word(self.cs.get_first_bus(bar), bar['dev'], bar['fun'], bar['reg']) empty_base = 0xFFFF if 'fixed_address' in bar and (base == empty_base or base == 0): diff --git a/chipsec/hal/mmio.py b/chipsec/hal/mmio.py index 04c7a157..6a43eef6 100644 --- a/chipsec/hal/mmio.py +++ b/chipsec/hal/mmio.py @@ -230,7 +230,7 @@ class MMIO(hal_base.HALBase): if _bus is not None: b = _bus else: - b = bar['bus'] + b = self.cs.get_first_bus(bar) d = bar['dev'] f = bar['fun'] r = bar['reg'] @@ -291,7 +291,7 @@ class MMIO(hal_base.HALBase): if bus is not None: b = bus else: - b = bar['bus'] + b = self.cs.get_first_bus(bar) d = bar['dev'] f = bar['fun'] r = bar['reg'] @@ -326,7 +326,7 @@ class MMIO(hal_base.HALBase): base = self.cs.read_register(bar_reg) else: # this method is not preferred (less flexible) - b = bar['bus'] + b = self.cs.get_first_bus(bar) d = bar['dev'] f = bar['fun'] r = bar['reg']