From dfd80953aaf8b8881be2ac8cafd13dd408bca768 Mon Sep 17 00:00:00 2001 From: brentholtsclaw Date: Tue, 24 Mar 2020 12:07:18 -0700 Subject: [PATCH] Edit display_SPI_Ranges_Access_Permissions output Signed-off-by: brentholtsclaw --- chipsec/hal/spi.py | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) diff --git a/chipsec/hal/spi.py b/chipsec/hal/spi.py index 3aefdd10..6d29d5bf 100644 --- a/chipsec/hal/spi.py +++ b/chipsec/hal/spi.py @@ -19,15 +19,6 @@ #chipsec@intel.com # - - -# ------------------------------------------------------------------------------- -# -# CHIPSEC: Platform Hardware Security Assessment Framework -# (c) 2010-2019 Intel Corporation -# -# ------------------------------------------------------------------------------- - """ Access to SPI Flash parts @@ -379,12 +370,15 @@ class SPI(hal_base.HALBase): logger().log( "SPI Flash Region Access Permissions" ) logger().log( "------------------------------------------------------------" ) fracc = self.cs.read_register('FRAP') - self.cs.print_register('FRAP', fracc) + if logger().HAL: + self.cs.print_register('FRAP', fracc) brra = self.cs.get_register_field('FRAP', fracc, 'BRRA' ) brwa = self.cs.get_register_field('FRAP', fracc, 'BRWA' ) bmrag = self.cs.get_register_field('FRAP', fracc, 'BMRAG' ) bmwag = self.cs.get_register_field('FRAP', fracc, 'BMWAG' ) if self.cs.is_register_defined('FDOC') and self.cs.is_register_defined('FDOD'): + if logger().HAL: + logger().log("Reading Observability Contol and Data register (may update braa and brwa)") self.cs.write_register('FDOC', 0x3000) tmp_reg = self.cs.read_register('FDOD') brra |= ((tmp_reg >> 8) & 0xFFF)