cf8f5c9c82
Rework spi_descriptor.py hal to use simple in-mem registers
2026-05-26 11:15:30 -07:00
bdc64755e7
Fix issue with platform detection not printing the 0:0.0 DID
2026-04-30 14:16:08 -07:00
99f349401a
Update chipsec2 to work in UEFI Shell
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2026-03-10 13:46:56 -07:00
b7df4e5efb
dev/chipsec2 bug fixes
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These changes were necessary to run chipsec2 on platform
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2026-01-29 13:42:02 -08:00
ee551aa168
Populate lists for -p and --pch
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2025-12-09 10:17:11 -08:00
e2e060d390
Update chipsec so XML names are not case sensitive
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2025-10-30 14:08:03 -07:00
d8ce89cab6
Update to make controls work as expected
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2025-08-28 11:59:33 -07:00
f94d25a74d
Fix reported decode util bug
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Signed-off-by: Dan Scott <dan.scott@intel.com >
2025-07-30 23:58:27 -07:00
99f9b9c6f4
Update files
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2025-07-23 15:09:44 -07:00
447b6f2689
Update functionality which interfaces with parsers
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Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com >
2025-07-23 15:09:44 -07:00
7f669cfd2d
Add register specific functions to platform.py
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2025-05-08 01:07:54 +08:00
b8d11ca5d9
Initial commit for new Cfg.platform object and register structure
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2025-05-02 09:06:31 -07:00
db92baec59
Fix up unit tests part 1
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2025-03-10 09:06:35 -07:00
443b019f32
Few fixes, mostly WRT mmio
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2025-03-05 07:59:36 -08:00
831841ff1a
Update some of the unit tests to run
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2025-02-25 11:01:06 -08:00
7725ebe841
Enable bios_wp module to run successfully on ADL
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2025-02-18 13:19:38 -08:00
6164ca86db
Update to enable mmio
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2025-02-18 13:19:38 -08:00
a032f04630
Update haldata and msr hal/cmd/tests
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Change haldata to use cpuid mfgstr
Update MSR hal/cmd/tests
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2025-02-18 12:53:25 -08:00
ec3b1c4196
Expands instances of pci registers per bus
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2024-12-12 14:25:03 -08:00
28e768b28c
Misc fixes
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2024-12-03 12:50:38 -08:00
f7409804b4
HAL Update - Enable multitenant HALs
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2024-12-03 12:50:36 -08:00
2c5112e160
Post platformdetect updates
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2024-12-03 12:50:36 -08:00
dc49304912
Update chipsec_util to check if a cfg is loaded when it's needed
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2024-12-03 12:50:35 -08:00
7c64276210
Post platformdetect updates
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2024-12-03 12:50:35 -08:00
6aecea8c43
Post platformdetect updates
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2024-12-03 12:50:35 -08:00
9603dd2f68
Update to platform detection
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2024-12-03 12:50:34 -08:00
fc89bf3ae7
next commit
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2024-12-03 12:50:34 -08:00
847f02daa1
initial commit of cfg changes
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2024-12-03 12:50:34 -08:00
3f5abae123
Initial commit for config poc
2024-12-03 12:50:33 -08:00
28d9c90b78
Update to platform detection
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2024-09-20 09:45:59 -07:00
3a832e89c2
Update chipsec_util to check if a cfg is loaded when it's needed
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2024-09-20 00:00:10 -07:00
c196004a2e
Fix loading to run some utiles that do not require cfg/driver
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2024-09-19 23:59:50 -07:00
0e8192cfd0
Move files to library folder
2024-03-22 14:26:59 -07:00
a933b1337d
Update references to functions in new library files
2024-03-22 14:26:59 -07:00
3c35aee789
Update bus matching check in _process_pci_dev
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2023-09-07 16:48:55 -07:00
41e363cd3c
Fix issues when loading configs
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2023-09-05 16:36:35 -07:00
116e82319f
Fix error message format in add_extra_configs
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Method `add_extra_configs` used `config_path.xml_file` to format a
message when an error occurs, but `config_path` is a string.
Use the variable directly in the error message.
Signed-off-by: Nicolas Iooss <nicolas.iooss_git@polytechnique.org >
2023-09-05 16:36:22 -07:00
757e1f0434
Print all devices on bus 0 with fun 0 when pch is not detected
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2023-08-21 16:36:31 -07:00
6cdfd54d6e
Fix UEFI shell issue with new config loading
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Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com >
2023-07-28 15:00:27 -07:00
009622740d
Update config parsing
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Signed-off-by: Dan Scott <dan.scott@intel.com >
2023-07-28 09:34:00 -07:00
Nathaniel Mitchell