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dev/chipsec2
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100 Commits

Author SHA1 Message Date
Nathaniel Mitchell 22d0a47f88 Add hst_block_db to enable smbus block_reads 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2026-02-06 14:03:17 -08:00
Nathaniel Mitchell 8e3c0c914a Add functionality to filter devices by enabled status 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2026-02-05 20:13:04 -08:00
Nathaniel Mitchell b61a1bf535 Fix reg.get_list_by_name to match entire string 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2026-01-30 14:13:20 -08:00
brentholtsclaw e5f5668159 dev/chipsec2 Add basic acpi aml parser 
Add basic parser for dsdt and sdst tables to find memory regions.  Still
recommend using acpi and iasl for full results.

Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2026-01-29 13:43:54 -08:00
brentholtsclaw b7df4e5efb dev/chipsec2 bug fixes 
These changes were necessary to run chipsec2 on platform

Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2026-01-29 13:42:02 -08:00
Nathaniel Mitchell c45686c7b1 Fix Brotli (de)compression 
Original commit for chipsec v1: 6b265feffa

Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2026-01-29 11:59:38 -08:00
Nathaniel Mitchell e0acb2787c Move tools.vmm.common to library.intel.vmm_common 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2026-01-29 11:28:53 -08:00
brentholtsclaw 3dfc3c27b0 Minor bug fixes 
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2025-12-09 13:50:59 -08:00
Nathaniel Mitchell 1259e568de Change all HAL objects in cs.hals to be lowercase 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-12-09 13:49:37 -08:00
Nathaniel Mitchell e2e060d390 Update chipsec so XML names are not case sensitive 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-10-30 14:08:03 -07:00
Nathaniel Mitchell 0427a1d178 Add filter_with_fields function to ObjList 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-10-01 10:06:52 -07:00
Nathaniel Mitchell 6a45198b32 Add 'has_all_fields' function to parent register class and store vid in pci device 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-09-30 13:45:25 -07:00
Nathaniel Mitchell 37829d0122 Clean up based on comments 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-09-02 10:20:38 -07:00
brentholtsclaw 92cfae82fb dev/chipsec2 fixes 
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2025-09-02 10:20:38 -07:00
Nathaniel Mitchell c50165a2a4 Add 'is_enabled' to regs and 'filter_enabled' to objlist 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-09-01 22:45:59 -07:00
Nathaniel Mitchell 98284878f6 Remove 'Final' typing from compression.py 
typing.Final was added in python 3.8. To maintain compatability with
UEFI shell python v3.6.8, this needs to be removed.
For chipsec 1 version of PR: https://github.com/chipsec/chipsec/pull/2550

Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-08-28 12:00:17 -07:00
Nathaniel Mitchell d8ce89cab6 Update to make controls work as expected 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-08-28 11:59:33 -07:00
Plato Mavropoulos 2dc8f5ffc5 Revamped HAL compression, added ZLIB and GZIP, improved LZMA (#2475) 
Revamped HAL UEFI Compression logic

Added UEFI ZLIB, GZIP, BROTLI compression support

Improved UEFI LZMA compression support
 2025-07-30 23:58:27 -07:00
Plato Mavropoulos 704e8a15a5 Added envionment variable for brute force efi module scan at HAL 2025-07-30 23:58:27 -07:00
Plato Mavropoulos bebc3c63d6 Added validation of EFI compressed data before attempting decompression 2025-07-30 23:58:27 -07:00
Nathaniel Mitchell 99f9b9c6f4 Update files 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-07-23 15:09:44 -07:00
brentholtsclaw 174f3deec7 Update library commands to integrate with parser changes 
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2025-07-23 15:09:44 -07:00
brentholtsclaw 51065bc7a9 Fix locks functionality to work with register objects 
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2025-06-05 07:54:21 +08:00
brentholtsclaw 5ee89e8675 Split mmcfg into separate hal 
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2025-05-28 00:06:20 +08:00
Nathaniel Mitchell 23ed18bce4 Add function on objlist 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-05-21 06:01:14 +08:00
Nathaniel Mitchell e918c17494 Clean up debug and commented out code 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-05-08 01:07:54 +08:00
Nathaniel Mitchell e2139e954d Fixup framework with platform object 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-05-08 01:07:54 +08:00
Nathaniel Mitchell 830a8bd54b Make register and device behave correctly 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-05-08 01:07:54 +08:00
Nathaniel Mitchell 7f669cfd2d Add register specific functions to platform.py 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-05-08 01:07:54 +08:00
Nathaniel Mitchell b8d11ca5d9 Initial commit for new Cfg.platform object and register structure 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-05-02 09:06:31 -07:00
Nathaniel Mitchell b817cbad82 WIP - dev/chipsec2 - varstore unit tests 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-04-28 09:09:13 -07:00
Nathaniel Mitchell fba29fc251 Add preserve_field_position to is_all_field_value and is_any_field_value checks 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-04-21 09:07:11 -07:00
Nathaniel Mitchell 439c1a4d09 General update to chipsec2 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-04-18 12:00:31 -07:00
Sara Batllori 40c60dce69 Add archiving status for modules 
Signed-off-by: Sara Batllori <sara.batllori@intel.com>
 2025-03-18 16:45:27 -07:00
Nathaniel Mitchell bea2860e8e Update device functions and port register.read*/write* functions 
Updated the device.get_obj/objlist functions to match the other types e.g. "get_list_by_name" and "get_instance_by_name".

Updated register.read/read_field/write/write_field functions to first get the register objects, then read*/write* from there.

Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-03-18 16:29:21 -07:00
Nathaniel Mitchell de6ffa0409 Update smbus hal, cmd and unit tests 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-03-17 09:07:19 -07:00
Nathaniel Mitchell c8cfacd732 Move paging from hal to library 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-03-12 09:07:23 -07:00
Nathaniel Mitchell 4b65243d9c Fix more unit tests 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-03-10 09:06:35 -07:00
Nathaniel Mitchell 74818ec960 Fix up more modules. Adl now matching legacy run 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-03-07 21:08:24 -08:00
Nathaniel Mitchell 9d3e2842f0 fix iobar, and a few modules 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-03-05 07:59:36 -08:00
Nathaniel Mitchell 443b019f32 Few fixes, mostly WRT mmio 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-03-05 07:59:36 -08:00
Nathaniel Mitchell d5345ad8c1 mmio update, unit tests, additional fixes 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-03-04 22:15:21 -08:00
Nathaniel Mitchell f0fb769d70 Move acpi_tables to library from hal 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-03-04 22:15:21 -08:00
Nathaniel Mitchell 7e1a53149e Add fix to interrupts_cmd 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-03-04 22:15:21 -08:00
Nathaniel Mitchell 29d1a2a364 Update to hals 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-03-04 22:15:21 -08:00
brentholtsclaw 51b088ffae Normalize spi and spi descriptor 
SPI descriptor still needs changes but this should help get it working

Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2025-03-04 22:15:04 -08:00
brentholtsclaw f9021e8ea8 dev/chipsec2 - spi_jedec_ids 
Moving to library

Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2025-03-04 22:15:04 -08:00
brentholtsclaw 642c9c6470 Update tpm for dev/chipsec2 
Move tpm12_commands and tpm_events to library
Change logic to remove bare except
Use hals functionality
Add read, write functions to normalize functionality

Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2025-02-25 17:03:50 -08:00
Nathaniel Mitchell 831841ff1a Update some of the unit tests to run 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-02-25 11:01:06 -08:00
Nathaniel Mitchell 89488d514e Fix up rtclock and smm_dma modules and cpu hal+unit tests 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2025-02-25 10:37:52 -08:00