Commit Graph

31 Commits

Author SHA1 Message Date
brentholtsclaw 2fa9152c05 Add docstrings to chipsec main functionality
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
2025-07-23 15:09:44 -07:00
Sara Batllori 40c60dce69 Add archiving status for modules
Signed-off-by: Sara Batllori <sara.batllori@intel.com>
2025-03-18 16:45:27 -07:00
Frinzell, Aaron a7f8e31373 Update common_module.py
Signed-off-by: Frinzell, Aaron <aaron.frinzell@intel.com>
2024-08-26 16:40:01 -07:00
Dan Scott 0e8192cfd0 Move files to library folder 2024-03-22 14:26:59 -07:00
Sae86 02f7e08815 Move return codes to library
Signed-off-by: Sae86 <sara.batllori@intel.com>
2024-03-22 14:26:59 -07:00
Sae86 303e128cc4 Information and skipped no longer categorized as Failure
Signed-off-by: Sae86 <sara.batllori@intel.com>
2024-03-18 16:38:38 -07:00
Nathaniel Mitchell e3db459827 Add return code 'REGISTER_NOT_DEFINED'
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2024-02-12 16:37:25 -08:00
Sae86 f9e1e893b1 Add a couple of useful return codes
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-12-11 10:46:22 -08:00
Sae86 9f13a489ae Add return codes support to sgx_check, smm, smm_code_check, smm_dma, smrr
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-10-31 16:36:50 -07:00
Sae86 4a8057d904 Update remaining SKIPPED results and references
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-10-17 16:36:31 -07:00
Sae86 78834bd04b Add return codes support to cpuid_fuzz, ept_finder and hypercallfuzz (tools/vmm)
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-09-29 08:28:03 -07:00
Sae86 f9c03e8c65 WIP: Add helper function for return codes integration
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-09-25 16:41:00 -07:00
Sara Batllori 318b361621 WIP: Add return codes changes to module_common and testcase plus remap support
Signed-off-by: Sara Batllori <sara.batllori@intel.com>
2023-06-27 17:47:46 -07:00
Frinzell, Aaron 8d18b25680 f-string updates to /chipsec/. files
Signed-off-by: Frinzell, Aaron <aaron.frinzell@intel.com>
2023-03-15 11:27:29 -07:00
Frinzell, Aaron a7ca74c120 Clean up py2 class object
Signed-off-by: Frinzell, Aaron <aaron.frinzell@intel.com>
2022-08-24 13:28:16 -07:00
Nathaniel Mitchell 291632c0ee Apply flake8 code formatting rules against repo
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2022-07-28 09:17:10 -07:00
Frinzell, Aaron 18ed744fc7 Update verbose_log in module_common.py
Signed-off-by: Frinzell, Aaron <aaron.frinzell@intel.com>
2022-07-25 17:04:25 -07:00
Dan Scott 460fb6c4e0 replace cs_input() with input(), code cleanup 2022-05-18 16:26:45 -07:00
Frinzell, Aaron 7f6a6ac262 Code cleanup in module_common.py
Signed-off-by: Frinzell, Aaron <aaron.frinzell@intel.com>
2022-04-25 17:03:00 -05:00
Nathaniel Mitchell c8c14e21be Remove shebang from all but the entry points. Update ep to py3
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2021-08-12 08:27:33 -07:00
Erik Bjorge 2f19f61753 Updating BaseModule methods
* Changed update_res to use a priority system for updates
* Added helper function to display results based on res

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2021-05-05 21:03:40 -07:00
brentholtsclaw 42310edfb7 Apply suggested changes
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
2020-04-20 08:39:02 -07:00
BrentHoltsclaw 514c23d84d Modify files based upon chipset.py changes
Fixup files that relied on CHIPSET_ID_XXX logic
Modify files for functions moved within cs class

Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2020-04-20 08:39:02 -07:00
BrentHoltsclaw 4ce1127743 Add cs_input to fix compatability issues with input/raw_input
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2019-09-03 10:06:46 -07:00
BrentHoltsclaw 3a39ff188f Split log.Skipped into Not Implemented and Not Applicable
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
2018-02-26 10:28:54 -08:00
BrentHoltsclaw d2f4e0ba65 Added Information Type for results and logging 2018-02-23 09:35:58 -08:00
c7zero dd66ef454a Added new module checking for Spectre variant 2
The module checks if system includes hardware mitigations for
Speculative Execution Side Channel. Specifically, it verifies that the
system supports CPU mitigations for
Branch Target Injection vulnerability a.k.a. Spectre Variant 2
(CVE-2017-5715)
2018-01-18 14:08:33 -08:00
abazhaniuk c377a72e28 Deb package (#135)
* merge

* Add Debian packaging

* cleanup

* Removed incorrect info into Copyright.

* One more: removed incorrect info in Copyright.
2017-01-06 12:57:13 -08:00
c7zero 6a85779673 Cosmetic changes (#137)
* Cosmetic changes

- Cosmetic changes in JSON results nad logging of regexp match
- Also fixed returning ModuleResult.PASSED/FAILED instead of True/False
in remap module

* Fix import
2016-12-30 17:16:39 -08:00
Thiébaud Weksteen 1a284132f8 Use HALBase for all HAL modules (#124) 2016-11-17 23:21:26 -08:00
abazhaniuk 94fe7f02f1 change setup.py build driver by default. change root directory of chipsec. move WARNING.txt to chipsec. remove PKG-INFO (#107) 2016-10-18 18:19:42 -07:00