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2e38de930abb1237be22791496a7f4a925c19ef0
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220 Commits

Author SHA1 Message Date
Mathias Krause edc4545c8f hal: va2pa - handle translation errors gracefully 
If the helper specific va2p() method fails, we shouldn't try to print
'pa' as it might be 'None'.

Swap the error handling with the 'VA -> PA' debug message to avoid
generating a format exception in this case.

Signed-off-by: Mathias Krause <minipli@grsecurity.net>
 2022-02-28 15:39:19 -08:00
Nicolas Iooss 7fb6448aec Fix TPM 1.2 commands logging 
When running `chipset_util.py tpm pcrread 0 8` to read a PCR (for
example) on a system using a TPM 1.2, the following result is displayed:

    [CHIPSEC] Executing command 'tpm' with args ['command', 'pcrread', '0', '8']

    ----------------------------------------------------------------
                         TPM response header
    ----------------------------------------------------------------
       Response TAG: 0xc4
       Data Size   : 0x1e
       Return Code : 0x0
            Success

    62 79 74 65 61 72 72 61 79 28 62 27 5C 78 30 30 | bytearray(b'\x00
    5C 78 30 30 5C 78 30 30 5C 78 30 30 5C 78 30 30 | \x00\x00\x00\x00
    5C 78 30 30 5C 78 30 30 5C 78 30 30 5C 78 30 30 | \x00\x00\x00\x00
    5C 78 30 30 5C 78 30 30 5C 78 30 30 5C 78 30 30 | \x00\x00\x00\x00
    5C 78 30 30 5C 78 30 30 5C 78 30 30 5C 78 30 30 | \x00\x00\x00\x00
    5C 78 30 30 5C 78 30 30 5C 78 30 30 27 29       | \x00\x00\x00')

Instead of displaying a hexdump of a Python representation of a
bytearray, display the hexdump of the bytes.

Signed-off-by: Nicolas Iooss <nicolas.iooss_git@polytechnique.org>
 2022-02-16 08:24:47 -08:00
Aaron Frinzell 28a5234170 Add routines to check for all 1's (0xFs) 2022-01-31 10:12:06 -08:00
brentholtsclaw 3af284e1bd update send_SMI_APMC command to split 0xB2 and 0xB3 
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2022-01-28 10:52:09 -08:00
Plato Mavropoulos 272a3c7cf8 Fix malformed EFI Section GUID unpacking crash 
The result of struct.unpack() is a tuple even if it contains 1 item (i.e. GUID bytes)
 2022-01-28 10:02:06 -08:00
Gabriel Kerneis c3be0bee46 Revert support for MMIO BARs split into two registers 
This reverts commits:
  - 72edd1519a
  - 7f7f2eb052
  - 779c20353e

Note that this is not a pure revert: we keep a few bug fixes in
hal/mmio.py that were part of this patch series.

Fixes: 1321
Fixes: 1317
Signed-off-by: Gabriel Kerneis <gabriel.kerneis@ssi.gouv.fr>
 2021-12-08 12:36:44 -08:00
brentholtsclaw 81a751b293 Handle case when rsdp_pa is not found within 
_find_RSDP_in_EFI_config_table

Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2021-12-08 09:16:02 -08:00
Erik Bjorge f6b6de702a Optimized PCI CFG dump 
Converted to using DWORD reads to dump PCI configuration space reducing
the total number of reads needed.

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
 2021-12-02 16:15:04 -08:00
Erik Bjorge aac6f1e01d Extended PCI dump functionality 
Updated PCI dump to allow for optional device and function parameters.
This allows limiting the dump to a specific bus or bus and device.

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
 2021-12-02 16:15:04 -08:00
Nicolas Iooss d9dc764e26 Log QWORD memory read as "qword" 
`Memory.read_physical_mem_qword` logged reads of QWORD values as:

    [mem] dword at PA = ...

Use qword instead. While at it, pad values with zeros, like the other
functions which read integers.

Signed-off-by: Nicolas Iooss <nicolas.iooss_git@polytechnique.org>
 2021-12-02 15:41:18 -08:00
Nathaniel Mitchell 72edd1519a Restore limit_field parsing of config in mmio.py 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2021-11-29 12:05:19 -08:00
Gabriel Kerneis 7f7f2eb052 Fix align_bits support in MMIO module 
DO NOT MERGE: to be folded into 25a5d0 once TODO is resolved.
 2021-11-22 14:54:42 -08:00
Gabriel Kerneis dd70e8b0a8 Compute MMCFG size from MmioCfgBaseAddr 
As described in PPR documentation for AMD 17h family (section 2.1.13.3,
register Core::X86::Msr::MmioCfgBaseAddr).

Bug: #825
Signed-off-by: Gabriel Kerneis <gabriel.kerneis@ssi.gouv.fr>
 2021-11-22 14:54:42 -08:00
Gabriel Kerneis 779c20353e Support for MMIO BARs split into two registers 
The format of having high base address bits in a second register is used
in multiple places on AMD platforms, in particular for IOMMU.

This commit introduces two new <bar> attributes:
- register_high: the register for the high bits of the BAR
- base_field_high: the field in this register storing the high bits. If
  base_field is missing, the whole register is used.

Also fix a missing type conversion in a fallback case and allow listing
MMIO BARs defined in MSR or SMN registers.

Bug: #825
Signed-off-by: Gabriel Kerneis <gabriel.kerneis@ssi.gouv.fr>
 2021-11-22 14:54:42 -08:00
Aaron Frinzell 23ef28f732 Some mmio.py enhancements 2021-10-26 16:01:10 -07:00
Sae86 947ab238a1 Improvements to sphinx 
Signed-off-by: Sae86 <sara.batllori@intel.com>
 2021-10-26 15:05:45 -07:00
brentholtsclaw 1998d9032e Fix bugs within locks_cmd 
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2021-10-26 15:05:12 -07:00
brentholtsclaw 28fee6f060 Sync up iobar and mmio bar list routines 
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2021-10-25 14:50:16 -07:00
brentholtsclaw b123f4b9f9 Clean up some spacing 
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2021-10-25 14:48:38 -07:00
brentholtsclaw 2d5206ccf6 change read_register memory to return int opposed to bytes 
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2021-10-25 14:48:38 -07:00
brentholtsclaw f00c6bc806 bug fix apic table updates to fadt table 
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2021-10-25 14:48:22 -07:00
Aaron Frinzell 18fdfca676 Merge MMIO multi-bus updates 2021-09-29 11:36:49 -07:00
Sae86 fd8a0e90b6 Add docstrings to some HALs 
Signed-off-by: Sae86 <sara.batllori@intel.com>
 2021-09-28 10:19:52 -07:00
brentholtsclaw f46024c0cf Address Comments 
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2021-09-28 10:18:20 -07:00
brentholtsclaw 591b863112 Create hal locks and lock_check_cmd 
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2021-09-28 10:18:20 -07:00
Sae86 9200e7bb82 Convert regexp rule to bytes 
Signed-off-by: Sae86 <sara.batllori@intel.com>
 2021-08-26 10:53:44 -07:00
brentholtsclaw ac8db77043 Missed Exception 
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2021-08-26 10:50:51 -07:00
brentholtsclaw b7bd40c9b0 Fixes for checker alerts 
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2021-08-26 10:50:51 -07:00
brentholtsclaw 0e53326a83 Create exceptions.py for chipsec exceptions 
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2021-08-26 10:50:51 -07:00
Nathaniel Mitchell c8c14e21be Remove shebang from all but the entry points. Update ep to py3 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2021-08-12 08:27:33 -07:00
Nathaniel Mitchell f3eb4a92bf Fix hw access errors when looking for efi tables in memory 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2021-07-29 13:05:30 -07:00
brentholtsclaw ef649c2127 Address Comments 
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2021-07-29 12:37:26 -07:00
brentholtsclaw c536db734a Fix utilcmd to work with multibus enhancements 
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2021-07-29 12:37:26 -07:00
brentholtsclaw d33f43a6af Add multibus support to hal mmio functions 
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2021-07-29 12:37:26 -07:00
Kevin Sun 80ef67a0ca fixing copyright years 2021-07-27 14:17:10 -07:00
Kevin Sun abfc984b38 Move TPM register dumps to config file 
TPM register dumps are currently hardcoded into the TPM HAL. By moving
them to xml config files and implementing functionality to read the
xml files, we can add more flexibility for register dumping, especially
as we add support for TPM2.0 registers.

Signed-off-by: Kevin Sun <kevin.sun@intel.com>
 2021-07-27 14:17:10 -07:00
assafcarlsbad a9dd187462 Rename VendorGuid -> VendorGuidData 2021-06-21 16:26:11 -07:00
Assaf Carlsbad 744f73d9ec Fix bug when formatting VendorGuid. 2021-06-21 16:26:11 -07:00
Assaf Carlsbad 65340ea1c6 Better parsing of the WSMT. 2021-06-21 16:26:11 -07:00
Assaf Carlsbad 138b52b9e4 oshelper.get_ACPI_table already takes care of checking if we're in native API mode. 2021-06-21 16:26:11 -07:00
brentholtsclaw bf0f791369 Fix unassigned variable 
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2021-05-27 10:44:12 -07:00
Erik Bjorge 5dd1046081 Fixed MMCFG accesses not DWORD aligned 
Accesses using the MMCFG assumed that all accesses could be a DWORD
and then masked down to the expected size.  This resulted in accesses
not on a DWORD boundary to return all FFs.  Passing the correct size
to the MMIO read/write resolves this issue.

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
 2021-05-27 10:34:29 -07:00
Nathaniel Mitchell 6b4c8820e8 Fix issue when trying to access SB on some platforms 
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
 2021-05-27 10:26:54 -07:00
Moonjung Kyung c5c9fcdf9a Update spi_uefi.py to handle the corrupted GUID 
https://github.com/chipsec/chipsec/issues/1160

Signed-off-by: Moonjung Kyung <moonjung.kyung@intel.com>
 2021-05-06 19:54:51 -07:00
Moonjung Kyung c76ee84158 Update spi_uefi.py to handle the corrupted GUID 
https://github.com/chipsec/chipsec/issues/1160

Signed-off-by: Moonjung Kyung <moonjung.kyung@intel.com>
 2021-05-06 19:54:51 -07:00
brentholtsclaw 964e8ecc42 Changes to enable consistancy checking 
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2021-05-06 19:53:45 -07:00
Aaron Frinzell 45e811d8b8 Fix hal.spi bytearray verbose print 2021-04-30 15:13:24 -07:00
Nicolas Iooss f31bc765e6 Remove stray backslash from the URL for TCG EFI Platform Specification 
`https://trustedcomputinggroup.org/wp-content/uploads/TCG_EFI_Platform_1_22_Final\_-v15.pdf`
does not exist. The document is hosted on the URL without the `\`:
https://trustedcomputinggroup.org/wp-content/uploads/TCG_EFI_Platform_1_22_Final_-v15.pdf
 2021-04-30 14:55:40 -07:00
Sae86 15d94d76ff Updating to 1.6.0 
Removing underscore in hal/uefi_common for Python2 compatibility
Signed-off-by: Sae86 <sae.batllori@intel.com>
 2021-03-31 20:44:47 -07:00
Assaf Carlsbad 0e71e827fb Bug fix: size of comm buffer should include HeaderGuid and MessageLength from EFI_SMM_COMMUNICATE_HEADER. 2021-03-31 16:28:10 -07:00