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7 Commits

Author SHA1 Message Date
Aaron Frinzell e3af00c996 Add usage documentation to rtclock.py 2022-01-28 10:14:58 -08:00
brentholtsclaw f7fe1be074 More whitespace cleanup 
E231, E201, E226

Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
 2020-07-31 13:46:13 -07:00
Frinzell 7c0fe8241b Remove extra import 2020-05-29 14:05:18 -07:00
Frinzell 1ead0d25f2 rtclock.py improvements 2020-05-29 14:05:18 -07:00
BrentHoltsclaw e7b2c983ec Cleanup imports within modules directory 
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
 2020-01-23 15:07:44 -08:00
Thiébaud Weksteen 1a284132f8 Use HALBase for all HAL modules (#124) 2016-11-17 23:21:26 -08:00
abazhaniuk 94fe7f02f1 change setup.py build driver by default. change root directory of chipsec. move WARNING.txt to chipsec. remove PKG-INFO (#107) 2016-10-18 18:19:42 -07:00