CHIPSEC
21dc4bbd81
Merge pull request #155 from andrew-furtak/rwe
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ReadWrite Everything helper added.
2017-03-08 18:24:49 -08:00
c7zero
2aa81afde8
SPI flash descriptor parsing improved ( #157 )
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* Improved parsing of Flash Descriptor
Descriptor format is platform dependent so need to use XML to parse it
* cleanup
* Fixed spi info
2017-03-02 02:09:58 -08:00
abazhaniuk
107de65ce3
fix issues in decompression functionality ( #161 )
2017-03-02 02:05:21 -08:00
c7zero
a0943e297a
Fixed tools.vmm.pcie_overlap_fuzz
2017-02-25 01:33:53 -08:00
andrew-furtak
e1835bb7c9
IGD hal component added. igddma utility command added. ( #156 )
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* IGD hal component added. igddma utility command added.
* Documentation added. Fixed file io for igd
* Deffered graphics device identification. Added check to igd cmd module for enabled device.
* Device 2 device id register renamed. Device id read with pci replaced with read_register
2017-02-24 18:04:08 -08:00
CHIPSEC
8edca3af6a
Fixed import
2017-02-24 02:05:35 -08:00
CHIPSEC
bce48a4f4a
Added read_MMIO_BAR to mmio HAL
2017-02-24 02:05:35 -08:00
Andrew Furtak
14904f35e6
RWE helper added. SMRR support check added where required. HyperV workaround for SMRR msrs.
2017-02-22 13:07:36 -08:00
c7zero
4af6dab314
Fixed tools.vmm.pcie_fuzzer ( #138 )
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1. Fixed tools.vmm.pcie_fuzzer
2. get_device_bars calculates actual size of MMIO BARs (IO BAR size is
still hardcoded)
2017-01-20 15:32:10 -08:00
abazhaniuk
c377a72e28
Deb package ( #135 )
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* merge
* Add Debian packaging
* cleanup
* Removed incorrect info into Copyright.
* One more: removed incorrect info in Copyright.
2017-01-06 12:57:13 -08:00
c7zero
6a85779673
Cosmetic changes ( #137 )
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* Cosmetic changes
- Cosmetic changes in JSON results nad logging of regexp match
- Also fixed returning ModuleResult.PASSED/FAILED instead of True/False
in remap module
* Fix import
2016-12-30 17:16:39 -08:00
andrew-furtak
b540df569e
Fixed UEFI decode issues ( #136 )
2016-12-30 12:39:05 -08:00
c7zero
3979328534
UEFI firmware parsing improved ( #134 )
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* UEFI firmware parsing improved
1. Creating EFI modules object tree when parsing UEFI firmware images
2. Added exporting parsed EFI object tree to JSON
3. EFI module seach uses callbacks
4. Added --json command-line option to export chipsec results to JSON
5. Fixed version
* updating ui_string in all sibling leaf sections
2016-12-14 12:09:50 -08:00
c7zero
baa6f49eb1
Fixed map_io_space call on Windows
2016-12-06 02:00:53 -08:00
Thiébaud Weksteen
1edfb70c2a
Add MemoryMapping and map_io_space to Linux helper ( #120 )
2016-12-05 15:49:41 -08:00
c7zero
8155afb2f4
Improved EFI binaries search and updated blacklist config ( #131 )
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* Changes in calculating hashes of EFI binaries
Calculating hashes of actual .efi executable files (PE32/TE sections of
EFI binaries) rather than of entire EFI binaries.
There's still an option (WRITE_ALL_HASHES) to calculate hashes of entire
EFI binaries.
* Improved UEFI search and updated blacklist config
1. Updated EFI binaries search - searching only leaf nodes (PE/TE
executable sections)
2. Added exclusion criteria and improved JSON format
3. Changed tools.uefi.blacklist module to return a warning
4. Updated ThinkPwn rules in blacklist.json
- Updated config to match by GUID AND regexp of SmmRuntime protcol GUID
within the binary to skip binaries consuming SmmRuntime protcol
- Added exclusion rules for UEFI update images with patched
SystemSmmRuntimeRt.efi. Config excludes patched binaries from Lenovo and
HP. Tested on Intel, Lenovo, HP and Gigabyte images.
2016-12-05 15:11:51 -08:00
CHIPSEC
0393d0a7bd
Fixed global variables use in uefi and spi_descriptor
2016-11-22 13:44:09 -08:00
c7zero
06fcb285ca
Fix global functions from uefi_platform
2016-11-17 23:39:26 -08:00
Thiébaud Weksteen
1a284132f8
Use HALBase for all HAL modules ( #124 )
2016-11-17 23:21:26 -08:00
timevortex
58b531aef9
Only align to 4KB if WP or RP is set ( #117 )
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Prior to this change, the output was:
[*] BIOS Region: Base = 0x00510000, Limit = 0x00FFFFFF
SPI Protected Ranges
------------------------------------------------------------
PRx (offset) | Value | Base | Limit | WP? | RP?
------------------------------------------------------------
PR0 (74) | 8FFF0FF0 | 00FF0000 | 00FFFFFF | 1 | 0
PR1 (78) | 00000000 | 00000000 | 00000FFF | 0 | 0
PR2 (7C) | 00000000 | 00000000 | 00000FFF | 0 | 0
PR3 (80) | 00000000 | 00000000 | 00000FFF | 0 | 0
PR4 (84) | 00000000 | 00000000 | 00000FFF | 0 | 0
Now: it is:
[*] BIOS Region: Base = 0x00510000, Limit = 0x00FFFFFF
SPI Protected Ranges
------------------------------------------------------------
PRx (offset) | Value | Base | Limit | WP? | RP?
------------------------------------------------------------
PR0 (74) | 8FFF0FF0 | 00FF0000 | 00FFFFFF | 1 | 0
PR1 (78) | 00000000 | 00000000 | 00000000 | 0 | 0
PR2 (7C) | 00000000 | 00000000 | 00000000 | 0 | 0
PR3 (80) | 00000000 | 00000000 | 00000000 | 0 | 0
PR4 (84) | 00000000 | 00000000 | 00000000 | 0 | 0
2016-10-28 12:16:00 -07:00
c7zero
716e28f70d
SPI HAL cleanup to use XML config ( #114 )
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Removed hardcoded offsets from hal.spi when reading FREGx and PRx and
replaced with XML config.
This commit also includes PR #109 (Make sure Limit of SPI Protected
Range is calculated correctly) by @timevortex except bits 11:0 of PRx
limit are also set to FFFh when PRL field is 0 (in this case PRx applies
to the first 4kB of flash).
2016-10-27 08:56:42 -07:00
abazhaniuk
94fe7f02f1
change setup.py build driver by default. change root directory of chipsec. move WARNING.txt to chipsec. remove PKG-INFO ( #107 )
2016-10-18 18:19:42 -07:00