Commit Graph

341 Commits

Author SHA1 Message Date
Frinzell, Aaron af4ea12204 Replace prints
Signed-off-by: Frinzell, Aaron <aaron.frinzell@intel.com>
2024-08-28 10:04:33 -07:00
Plato Mavropoulos 84fd880899 Fixes to scan_image module 2024-08-27 16:40:07 -07:00
Frinzell, Aaron aa7fc5d145 Clean up cpu modules
Signed-off-by: Frinzell, Aaron <aaron.frinzell@intel.com>
2024-08-26 16:40:18 -07:00
Frinzell, Aaron fb3c58d5f5 Clean up variables.py
Signed-off-by: Frinzell, Aaron <aaron.frinzell@intel.com>
2024-08-26 16:39:44 -07:00
Frinzell, Aaron da8ff136bf Clean up common modules
Signed-off-by: Frinzell, Aaron <aaron.frinzell@intel.com>
2024-08-26 16:39:27 -07:00
Dan Scott f19760c63c Replace print() with logger.log()
Signed-off-by: Dan Scott <dan.scott@intel.com>
2024-08-05 16:35:54 -07:00
Nathaniel Mitchell 1d3574043e Add try/except block when copying BARs in rogue_mmio_bar tool
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2024-07-30 14:16:23 -07:00
Carles Pey 9f84abac9c smm_ptr: Add SMI contention check to the scan mode
Signed-off-by: Carles Pey <carles.pey@nccgroup.com>
2024-07-16 16:39:41 -07:00
Jason Zhou 1be3edf6de Add remap lock bit condition check
Signed-off-by: Jason Zhou <jun2.zhou@intel.com>
2024-07-16 16:36:51 -07:00
Nathaniel Mitchell e397aca0f9 Update mmio to check if Base Address is valid
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2024-06-27 14:54:01 -07:00
Nathaniel Mitchell 016b3b50e4 Fix case of SMM_CODE_CHK_EN field
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2024-06-24 16:37:00 -07:00
jun2zhou 59f9144750 Add TE test download prompt (#2183)
* Add TE test Poe version Shell.efi download prompt

Signed-off-by: Jason Zhou <jun2.zhou@intel.com>

---------

Signed-off-by: Jason Zhou <jun2.zhou@intel.com>
Co-authored-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
Co-authored-by: dscott90 <dan.scott@intel.com>
2024-06-03 16:37:40 -07:00
Nathaniel Mitchell 27940020be Fix pcie_fuzz when trying to print devices
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2024-06-03 16:34:59 -07:00
Jason Zhou 976565e63d Remove bins from pub repo addessing the security scan warnning
Signed-off-by: Jason Zhou <jun2.zhou@intel.com>
2024-06-03 16:34:34 -07:00
Sae86 efccddd739 WIP: Add feature to automatically generate url for return codes
Signed-off-by: Sae86 <sara.batllori@intel.com>
2024-05-29 10:44:04 -07:00
Carles Pey 19e2553138 Add SMI enumeration mode to the smm_ptr module (#2141)
* Add SMI enumeration mode to the smm_ptr module

Signed-off-by: Carles Pey <carles.pey@nccgroup.com>
2024-05-29 10:19:42 -07:00
Sae86 2bc5b22216 Add feature to auto-generate/save return code IDs
Signed-off-by: Sae86 <sara.batllori@intel.com>
2024-04-22 16:36:02 -07:00
Sae86 7d728d987a Remove lines to set test result in is_supported in smm_code_chk and tools
Signed-off-by: Sae86 <sara.batllori@intel.com>
2024-04-02 16:40:45 -07:00
Sae86 47773a2559 Remove lines to set test result in is_supported
Signed-off-by: Sae86 <sara.batllori@intel.com>
2024-04-01 16:39:41 -07:00
Sae86 e52f0532b1 Add csv log option and fix value returned after running only one test
Signed-off-by: Sae86 <sara.batllori@intel.com>
2024-03-27 17:07:26 -07:00
Dan Scott 0e8192cfd0 Move files to library folder 2024-03-22 14:26:59 -07:00
Dan Scott a933b1337d Update references to functions in new library files 2024-03-22 14:26:59 -07:00
Dan Scott e569136c9b Refactor chipset.py 2024-03-22 14:26:59 -07:00
Sae86 02f7e08815 Move return codes to library
Signed-off-by: Sae86 <sara.batllori@intel.com>
2024-03-22 14:26:59 -07:00
Sae86 e5ae4fe9dc Add variables from UEFI spec version 2.10
Signed-off-by: Sae86 <sara.batllori@intel.com>
2024-02-29 11:22:39 -08:00
Sae86 5f1b1d9743 Return code updates to scan_blocked, uefivar_fuzz and vmm.hypercallfuzz
Signed-off-by: Sae86 <sara.batllori@intel.com>
2024-02-12 16:38:07 -08:00
Sae86 cabe83d87f Return code updates to cet, reputation, s3script_modify and cpuid_fuzz
Signed-off-by: Sae86 <sara.batllori@intel.com>
2024-02-12 16:37:53 -08:00
Sae86 dd4175f354 Move down getReturnCode call to run
Signed-off-by: Sae86 <sara.batllori@intel.com>
2024-02-12 16:37:39 -08:00
BrentHoltsclaw 8d45174e17 Add CET module (#2033)
* Add CET module

Reports CET settings if supported on the platform
```
[*] Running module: chipsec.modules.common.cet
[x][ =======================================================================
[x][ Module: Checking CET Settings
[x][ =======================================================================
CET Shadow Stack is supported
CET Indirect Branch Tracking is unsupported
IA32_U_CET Settings:
  SH_STK_EN: Enable shadow stacks at CPL3 is NOT ENABLED
  WR_SHSTK_EN: Enables the WRSSD/WRSSQ instructions is NOT ENABLED
  ENDBR_EN: Enable indirect branch tracking is NOT ENABLED
  LEG_IW_EN: Enable legacy compatibility treatment for indirect branch tracking is NOT ENABLED
  NO_TRACK_EN: Enables use of no track prefix for indirect branch tracking is NOT ENABLED
  SUPPRESS_DIS: Disables suppression of CET indirect branch tracking on legacy compatibility is NOT ENABLED
  SUPPRESS: Indirect branch tracking is suppressed is NOT ENABLED
IA32_S_CET Settings:
  SH_STK_EN: Enable shadow stacks at CPL3 is NOT ENABLED
  WR_SHSTK_EN: Enables the WRSSD/WRSSQ instructions is NOT ENABLED
  ENDBR_EN: Enable indirect branch tracking is NOT ENABLED
  LEG_IW_EN: Enable legacy compatibility treatment for indirect branch tracking is NOT ENABLED
  NO_TRACK_EN: Enables use of no track prefix for indirect branch tracking is NOT ENABLED
  SUPPRESS_DIS: Disables suppression of CET indirect branch tracking on legacy compatibility is NOT ENABLED
  SUPPRESS: Indirect branch tracking is suppressed is NOT ENABLED```

Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
2024-01-16 16:42:28 -08:00
brentholtsclaw 854ecfe0fd Add ability to parse padding section and raw section
change on line 276 from @platomav

Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
2023-12-11 08:48:48 -08:00
Dan Scott 96677806cd Add typehints and fstrings to common modules 2023-12-01 09:35:36 -08:00
Sae86 e29db633c6 Add return codes to spd_wd, spi_access, spi_desc, spi_fdopss and spi_lock
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-11-20 16:38:54 -08:00
Sae86 9f13a489ae Add return codes support to sgx_check, smm, smm_code_check, smm_dma, smrr
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-10-31 16:36:50 -07:00
Sae86 4f90987931 Add return codes support to sgx_check, smm, smm_code_check, smm_dma, smrr
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-10-31 16:36:50 -07:00
Nathaniel Mitchell 4c4d8a94ca Fix BaseModule call in vmm modules
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2023-10-31 16:36:13 -07:00
Sae86 4c582b2573 Add return codes support to ia32cfg, me_mfg_mode, memconfig, memlock, rtclock
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-10-25 21:22:22 -07:00
Nathaniel Mitchell f47f54d33a Add check to debugenabled for ECTRL register definition
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2023-10-25 16:35:28 -07:00
Sae86 2c9d457970 Add return codes support to bios_kbrd_buffer, bios_smi, bios_ts, bios_wp and debugenabled
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-10-25 16:35:08 -07:00
Sae86 ef24524d78 Add return codes support to cpu, secureboot and uefi folders in common
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-10-25 16:34:21 -07:00
Sae86 4a8057d904 Update remaining SKIPPED results and references
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-10-17 16:36:31 -07:00
Sae86 715dfbb678 Fix res being referenced before assignment issue
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-10-16 16:37:40 -07:00
Sae86 2358adfd51 Add module that generates test IDs for return codes
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-10-09 16:37:28 -07:00
Sae86 c0a488a7c0 Revert "Add return codes support to cpuid_fuzz, ept_finder and hypercallfuzz (tools/vmm)"
This reverts commit 041da2f54485aaf56018df3bfd9e2478190aa680.

Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-09-29 09:01:13 -07:00
Sae86 a8530707e5 Add return codes support to cpuid_fuzz, ept_finder and hypercallfuzz (tools/vmm)
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-09-29 09:01:13 -07:00
Sae86 85a76f6475 Add return codes support to tools/vmm/hv
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-09-29 09:01:13 -07:00
Sae86 78834bd04b Add return codes support to cpuid_fuzz, ept_finder and hypercallfuzz (tools/vmm)
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-09-29 08:28:03 -07:00
Sae86 aaed42dde1 Add return codes support to cpuid_fuzz, ept_finder and hypercallfuzz (tools/vmm)
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-09-28 21:54:06 -07:00
Sae86 40e544a66f Add return codes support to vbox and xen folders in tools
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-09-28 21:24:41 -07:00
Sae86 6a32675590 Add return codes support to iofuzz, msr_fuzz, pcie_fuzz, pcie_overlap_fuzz (tools/vmm)
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-09-28 21:23:34 -07:00
Sae86 24bd626f7e Add return codes support to vmm.venom and wsmt in tools
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-09-28 21:23:18 -07:00