Frinzell, Aaron
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da8ff136bf
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Clean up common modules
Signed-off-by: Frinzell, Aaron <aaron.frinzell@intel.com>
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2024-08-26 16:39:27 -07:00 |
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Sae86
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efccddd739
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WIP: Add feature to automatically generate url for return codes
Signed-off-by: Sae86 <sara.batllori@intel.com>
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2024-05-29 10:44:04 -07:00 |
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Sae86
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2bc5b22216
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Add feature to auto-generate/save return code IDs
Signed-off-by: Sae86 <sara.batllori@intel.com>
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2024-04-22 16:36:02 -07:00 |
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Sae86
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47773a2559
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Remove lines to set test result in is_supported
Signed-off-by: Sae86 <sara.batllori@intel.com>
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2024-04-01 16:39:41 -07:00 |
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Dan Scott
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a933b1337d
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Update references to functions in new library files
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2024-03-22 14:26:59 -07:00 |
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Dan Scott
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96677806cd
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Add typehints and fstrings to common modules
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2023-12-01 09:35:36 -08:00 |
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Sae86
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4c582b2573
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Add return codes support to ia32cfg, me_mfg_mode, memconfig, memlock, rtclock
Signed-off-by: Sae86 <sara.batllori@intel.com>
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2023-10-25 21:22:22 -07:00 |
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Dan Scott
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b3d974b51a
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Update modules and utils to match config parsing update
Signed-off-by: Dan Scott <dan.scott@intel.com>
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2023-07-28 09:34:00 -07:00 |
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Frinzell, Aaron
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59c74b09d1
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Update is_supported() in rtclock.py
Signed-off-by: Frinzell, Aaron <aaron.frinzell@intel.com>
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2022-05-18 11:35:42 -07:00 |
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Aaron Frinzell
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e3af00c996
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Add usage documentation to rtclock.py
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2022-01-28 10:14:58 -08:00 |
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brentholtsclaw
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f7fe1be074
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More whitespace cleanup
E231, E201, E226
Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
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2020-07-31 13:46:13 -07:00 |
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Frinzell
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7c0fe8241b
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Remove extra import
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2020-05-29 14:05:18 -07:00 |
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Frinzell
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1ead0d25f2
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rtclock.py improvements
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2020-05-29 14:05:18 -07:00 |
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BrentHoltsclaw
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e7b2c983ec
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Cleanup imports within modules directory
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
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2020-01-23 15:07:44 -08:00 |
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Thiébaud Weksteen
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1a284132f8
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Use HALBase for all HAL modules (#124)
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2016-11-17 23:21:26 -08:00 |
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abazhaniuk
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94fe7f02f1
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change setup.py build driver by default. change root directory of chipsec. move WARNING.txt to chipsec. remove PKG-INFO (#107)
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2016-10-18 18:19:42 -07:00 |
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