Commit Graph

22 Commits

Author SHA1 Message Date
Nathaniel Mitchell 56dc29328e Update modules set_scope to set the scope correctly (register only on the left)
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2025-05-08 01:07:54 +08:00
Sara Batllori d9a8265fc5 Remove MTAG prefix from module tags and add metadata tags
Signed-off-by: Sara Batllori <sara.batllori@intel.com>
2025-03-18 16:46:35 -07:00
Nathaniel Mitchell b5a34ffd49 Update rtclock module
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2025-03-03 09:04:08 -08:00
Nathaniel Mitchell 89488d514e Fix up rtclock and smm_dma modules and cpu hal+unit tests
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2025-02-25 10:37:52 -08:00
Nathaniel Mitchell f7409804b4 HAL Update - Enable multitenant HALs
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2024-12-03 12:50:36 -08:00
Nathaniel Mitchell 6aecea8c43 Post platformdetect updates
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2024-12-03 12:50:35 -08:00
Frinzell, Aaron da8ff136bf Clean up common modules
Signed-off-by: Frinzell, Aaron <aaron.frinzell@intel.com>
2024-08-26 16:39:27 -07:00
Sae86 efccddd739 WIP: Add feature to automatically generate url for return codes
Signed-off-by: Sae86 <sara.batllori@intel.com>
2024-05-29 10:44:04 -07:00
Sae86 2bc5b22216 Add feature to auto-generate/save return code IDs
Signed-off-by: Sae86 <sara.batllori@intel.com>
2024-04-22 16:36:02 -07:00
Sae86 47773a2559 Remove lines to set test result in is_supported
Signed-off-by: Sae86 <sara.batllori@intel.com>
2024-04-01 16:39:41 -07:00
Dan Scott a933b1337d Update references to functions in new library files 2024-03-22 14:26:59 -07:00
Dan Scott 96677806cd Add typehints and fstrings to common modules 2023-12-01 09:35:36 -08:00
Sae86 4c582b2573 Add return codes support to ia32cfg, me_mfg_mode, memconfig, memlock, rtclock
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-10-25 21:22:22 -07:00
Dan Scott b3d974b51a Update modules and utils to match config parsing update
Signed-off-by: Dan Scott <dan.scott@intel.com>
2023-07-28 09:34:00 -07:00
Frinzell, Aaron 59c74b09d1 Update is_supported() in rtclock.py
Signed-off-by: Frinzell, Aaron <aaron.frinzell@intel.com>
2022-05-18 11:35:42 -07:00
Aaron Frinzell e3af00c996 Add usage documentation to rtclock.py 2022-01-28 10:14:58 -08:00
brentholtsclaw f7fe1be074 More whitespace cleanup
E231, E201, E226

Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
2020-07-31 13:46:13 -07:00
Frinzell 7c0fe8241b Remove extra import 2020-05-29 14:05:18 -07:00
Frinzell 1ead0d25f2 rtclock.py improvements 2020-05-29 14:05:18 -07:00
BrentHoltsclaw e7b2c983ec Cleanup imports within modules directory
Signed-off-by: BrentHoltsclaw <brent.holtsclaw@intel.com>
2020-01-23 15:07:44 -08:00
Thiébaud Weksteen 1a284132f8 Use HALBase for all HAL modules (#124) 2016-11-17 23:21:26 -08:00
abazhaniuk 94fe7f02f1 change setup.py build driver by default. change root directory of chipsec. move WARNING.txt to chipsec. remove PKG-INFO (#107) 2016-10-18 18:19:42 -07:00