327 Commits

Author SHA1 Message Date
Sae86 efccddd739 WIP: Add feature to automatically generate url for return codes
Signed-off-by: Sae86 <sara.batllori@intel.com>
2024-05-29 10:44:04 -07:00
Carles Pey 19e2553138 Add SMI enumeration mode to the smm_ptr module (#2141)
* Add SMI enumeration mode to the smm_ptr module

Signed-off-by: Carles Pey <carles.pey@nccgroup.com>
2024-05-29 10:19:42 -07:00
Sae86 2bc5b22216 Add feature to auto-generate/save return code IDs
Signed-off-by: Sae86 <sara.batllori@intel.com>
2024-04-22 16:36:02 -07:00
Sae86 7d728d987a Remove lines to set test result in is_supported in smm_code_chk and tools
Signed-off-by: Sae86 <sara.batllori@intel.com>
2024-04-02 16:40:45 -07:00
Sae86 47773a2559 Remove lines to set test result in is_supported
Signed-off-by: Sae86 <sara.batllori@intel.com>
2024-04-01 16:39:41 -07:00
Sae86 e52f0532b1 Add csv log option and fix value returned after running only one test
Signed-off-by: Sae86 <sara.batllori@intel.com>
2024-03-27 17:07:26 -07:00
Dan Scott 0e8192cfd0 Move files to library folder 2024-03-22 14:26:59 -07:00
Dan Scott a933b1337d Update references to functions in new library files 2024-03-22 14:26:59 -07:00
Dan Scott e569136c9b Refactor chipset.py 2024-03-22 14:26:59 -07:00
Sae86 02f7e08815 Move return codes to library
Signed-off-by: Sae86 <sara.batllori@intel.com>
2024-03-22 14:26:59 -07:00
Sae86 e5ae4fe9dc Add variables from UEFI spec version 2.10
Signed-off-by: Sae86 <sara.batllori@intel.com>
2024-02-29 11:22:39 -08:00
Sae86 5f1b1d9743 Return code updates to scan_blocked, uefivar_fuzz and vmm.hypercallfuzz
Signed-off-by: Sae86 <sara.batllori@intel.com>
2024-02-12 16:38:07 -08:00
Sae86 cabe83d87f Return code updates to cet, reputation, s3script_modify and cpuid_fuzz
Signed-off-by: Sae86 <sara.batllori@intel.com>
2024-02-12 16:37:53 -08:00
Sae86 dd4175f354 Move down getReturnCode call to run
Signed-off-by: Sae86 <sara.batllori@intel.com>
2024-02-12 16:37:39 -08:00
BrentHoltsclaw 8d45174e17 Add CET module (#2033)
* Add CET module

Reports CET settings if supported on the platform
```
[*] Running module: chipsec.modules.common.cet
[x][ =======================================================================
[x][ Module: Checking CET Settings
[x][ =======================================================================
CET Shadow Stack is supported
CET Indirect Branch Tracking is unsupported
IA32_U_CET Settings:
  SH_STK_EN: Enable shadow stacks at CPL3 is NOT ENABLED
  WR_SHSTK_EN: Enables the WRSSD/WRSSQ instructions is NOT ENABLED
  ENDBR_EN: Enable indirect branch tracking is NOT ENABLED
  LEG_IW_EN: Enable legacy compatibility treatment for indirect branch tracking is NOT ENABLED
  NO_TRACK_EN: Enables use of no track prefix for indirect branch tracking is NOT ENABLED
  SUPPRESS_DIS: Disables suppression of CET indirect branch tracking on legacy compatibility is NOT ENABLED
  SUPPRESS: Indirect branch tracking is suppressed is NOT ENABLED
IA32_S_CET Settings:
  SH_STK_EN: Enable shadow stacks at CPL3 is NOT ENABLED
  WR_SHSTK_EN: Enables the WRSSD/WRSSQ instructions is NOT ENABLED
  ENDBR_EN: Enable indirect branch tracking is NOT ENABLED
  LEG_IW_EN: Enable legacy compatibility treatment for indirect branch tracking is NOT ENABLED
  NO_TRACK_EN: Enables use of no track prefix for indirect branch tracking is NOT ENABLED
  SUPPRESS_DIS: Disables suppression of CET indirect branch tracking on legacy compatibility is NOT ENABLED
  SUPPRESS: Indirect branch tracking is suppressed is NOT ENABLED```

Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
2024-01-16 16:42:28 -08:00
brentholtsclaw 854ecfe0fd Add ability to parse padding section and raw section
change on line 276 from @platomav

Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>
2023-12-11 08:48:48 -08:00
Dan Scott 96677806cd Add typehints and fstrings to common modules 2023-12-01 09:35:36 -08:00
Sae86 e29db633c6 Add return codes to spd_wd, spi_access, spi_desc, spi_fdopss and spi_lock
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-11-20 16:38:54 -08:00
Sae86 9f13a489ae Add return codes support to sgx_check, smm, smm_code_check, smm_dma, smrr
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-10-31 16:36:50 -07:00
Sae86 4f90987931 Add return codes support to sgx_check, smm, smm_code_check, smm_dma, smrr
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-10-31 16:36:50 -07:00
Nathaniel Mitchell 4c4d8a94ca Fix BaseModule call in vmm modules
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2023-10-31 16:36:13 -07:00
Sae86 4c582b2573 Add return codes support to ia32cfg, me_mfg_mode, memconfig, memlock, rtclock
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-10-25 21:22:22 -07:00
Nathaniel Mitchell f47f54d33a Add check to debugenabled for ECTRL register definition
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2023-10-25 16:35:28 -07:00
Sae86 2c9d457970 Add return codes support to bios_kbrd_buffer, bios_smi, bios_ts, bios_wp and debugenabled
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-10-25 16:35:08 -07:00
Sae86 ef24524d78 Add return codes support to cpu, secureboot and uefi folders in common
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-10-25 16:34:21 -07:00
Sae86 4a8057d904 Update remaining SKIPPED results and references
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-10-17 16:36:31 -07:00
Sae86 715dfbb678 Fix res being referenced before assignment issue
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-10-16 16:37:40 -07:00
Sae86 2358adfd51 Add module that generates test IDs for return codes
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-10-09 16:37:28 -07:00
Sae86 c0a488a7c0 Revert "Add return codes support to cpuid_fuzz, ept_finder and hypercallfuzz (tools/vmm)"
This reverts commit 041da2f54485aaf56018df3bfd9e2478190aa680.

Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-09-29 09:01:13 -07:00
Sae86 a8530707e5 Add return codes support to cpuid_fuzz, ept_finder and hypercallfuzz (tools/vmm)
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-09-29 09:01:13 -07:00
Sae86 85a76f6475 Add return codes support to tools/vmm/hv
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-09-29 09:01:13 -07:00
Sae86 78834bd04b Add return codes support to cpuid_fuzz, ept_finder and hypercallfuzz (tools/vmm)
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-09-29 08:28:03 -07:00
Sae86 aaed42dde1 Add return codes support to cpuid_fuzz, ept_finder and hypercallfuzz (tools/vmm)
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-09-28 21:54:06 -07:00
Sae86 40e544a66f Add return codes support to vbox and xen folders in tools
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-09-28 21:24:41 -07:00
Sae86 6a32675590 Add return codes support to iofuzz, msr_fuzz, pcie_fuzz, pcie_overlap_fuzz (tools/vmm)
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-09-28 21:23:34 -07:00
Sae86 24bd626f7e Add return codes support to vmm.venom and wsmt in tools
Signed-off-by: Sae86 <sara.batllori@intel.com>
2023-09-28 21:23:18 -07:00
Nicolas Iooss 9a0f04e2a1 Import modules traceback and errno when they are needed
When loading the kernel module fails on Linux, `chipsec_util.py`
raises an error in

    logger().log_debug(traceback.format_exc())

because `traceback` was not imported.

Fix this issue by importing the missing modules `traceback` and `errno`.
While at it, import `traceback` too in other files where it was missing.

Signed-off-by: Nicolas Iooss <nicolas.iooss_git@polytechnique.org>
2023-09-06 16:37:59 -07:00
Nathaniel Mitchell 89f4be530f Update sgx_check and vbox_crash_apicbase
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2023-08-15 16:39:01 -07:00
Dan Scott b3d974b51a Update modules and utils to match config parsing update
Signed-off-by: Dan Scott <dan.scott@intel.com>
2023-07-28 09:34:00 -07:00
Nathaniel Mitchell a6ec8e0dd3 Update remap.py for when IBECC is enabled (EHL)
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2023-07-05 16:37:36 -07:00
Sara Batllori 318b361621 WIP: Add return codes changes to module_common and testcase plus remap support
Signed-off-by: Sara Batllori <sara.batllori@intel.com>
2023-06-27 17:47:46 -07:00
Nicolas Iooss e8d41ab9ee Replace binascii.hexlify with bytes.hex
Python 3.5 introduced `bytes.hex` to represent bytes in hexadecimal:
https://docs.python.org/3.5/library/stdtypes.html#bytes.hex

This function directly returns a string, contrary to `binascii.hexlify`
which returns bytes. Using `binascii.hexlify` without transforming the
output to string actually produced buggy output. For example:

    $ ./chipsec_util.py spidesc spi_rom.bin
    ...
    + 0x0000 Reserved : 0xb'FFFFFFFFFFFFFFFFFFFFFFFFFFFFFF'

This `b'` is not desired. Using `bytes.hex` fixes this issue and makes
the code simpler.

Signed-off-by: Nicolas Iooss <nicolas.iooss_git@polytechnique.org>
2023-06-05 16:43:15 -07:00
Nicolas Iooss 9be66dadbd Replace print_buffer(bytestostring(data)) with print_buffer_bytes
`print_buffer_bytes` can directly handle bytes, instead of converting
them to a string.

While at it, replace buggy calls to `print_buffer(buffer)` (when
`buffer` uses type `bytes`) with `print_buffer_bytes(buffer)`.
This fixes `./chipsec_util.py idt 0`. Before it failed with:

    [CHIPSEC] Dumping IDT of 8 CPU threads
    [cpu0] Physical Address: 0x000000036639E000
    [cpu0] # of entries    : 256
    [cpu0] Contents (4 entries):
    Traceback (most recent call last):
      File "./chipsec_util.py", line 210, in <module>
        sys.exit(main())
      File "./chipsec_util.py", line 205, in main
        return chipsecMain.main()
      File "./chipsec_util.py", line 190, in main
        comm.run()
      File "chipsec/utilcmd/desc_cmd.py", line 84, in run
        self.cs.msr.IDT_all(4)
      File "chipsec/hal/msr.py", line 166, in IDT_all
        self.IDT(tid, num_entries)
      File "chipsec/hal/msr.py", line 158, in IDT
        return self.dump_Descriptor_Table(cpu_thread_id, DESCRIPTOR_TABLE_CODE_IDTR, num_entries)
      File "chipsec/hal/msr.py", line 144, in dump_Descriptor_Table
        print_buffer(dt)
      File "chipsec/logger.py", line 493, in print_buffer
        prt_str = bytes2string(arr, length)
      File "chipsec/logger.py", line 466, in bytes2string
        num_string += [f'{ord(c):02X} ']
    TypeError: ord() expected string of length 1, but int found

There was another bug in `hal/msr.py` where `ord(dt[...])` was used
instead of `dt`.

Signed-off-by: Nicolas Iooss <nicolas.iooss_git@polytechnique.org>
2023-05-31 16:39:35 -07:00
Nathaniel Mitchell 0016b0c14c Clean up oshelper
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2023-05-26 18:32:51 -07:00
nstarke 61fcd60637 Fixing broken 'intelsecurity.com' link with wayback link 2023-05-08 09:05:13 -07:00
Sara Batllori 25a50ac8cc f'string updates to vmm subfolders in tools
Signed-off-by: Sara Batllori <sara.batllori@intel.com>
2023-04-25 15:26:15 -07:00
Sara Batllori 31b7edb884 f'string updates to cpuid
Signed-off-by: Sara Batllori <sara.batllori@intel.com>
2023-04-25 08:32:10 -07:00
Sara Batllori a981fbbd1d f'string updates to msr_fuzz, pcie_fuzz and pcie_overlap_fuzz
Signed-off-by: Sara Batllori <sara.batllori@intel.com>
2023-04-25 08:31:53 -07:00
Nathaniel Mitchell 1ea833bbc0 Clean up memconfig
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
2023-04-25 08:31:11 -07:00
Sara Batllori 152a8c44ec f'string updates to vmm hv folder in tools
Signed-off-by: Sara Batllori <sara.batllori@intel.com>
2023-04-24 14:03:39 -07:00