mirror of
https://github.com/chipsec/chipsec
synced 2026-06-08 13:31:00 +00:00
BrentHoltsclaw
234 lines
10 KiB
Python
234 lines
10 KiB
Python
#!/usr/bin/python
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#CHIPSEC: Platform Security Assessment Framework
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#Copyright (c) 2010-2019, Intel Corporation
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#
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#This program is free software; you can redistribute it and/or
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#modify it under the terms of the GNU General Public License
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#as published by the Free Software Foundation; Version 2.
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#
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#This program is distributed in the hope that it will be useful,
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#but WITHOUT ANY WARRANTY; without even the implied warranty of
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#MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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#GNU General Public License for more details.
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#
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#You should have received a copy of the GNU General Public License
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#along with this program; if not, write to the Free Software
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#Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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#
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#Contact information:
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#chipsec@intel.com
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#
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# -------------------------------------------------------------------------------
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#
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# CHIPSEC: Platform Hardware Security Assessment Framework
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#
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# -------------------------------------------------------------------------------
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"""
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Access to SMBus Controller
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"""
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from chipsec.hal import iobar, hal_base
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from chipsec.logger import *
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SMBUS_COMMAND_QUICK = 0
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SMBUS_COMMAND_BYTE = 1
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SMBUS_COMMAND_BYTE_DATA = 2
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SMBUS_COMMAND_WORD_DATA = 3
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SMBUS_COMMAND_PROCESS_CALL = 4
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SMBUS_COMMAND_BLOCK = 5
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SMBUS_COMMAND_I2C_READ = 6
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SMBUS_COMMAND_BLOCK_PROCESS = 7
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SMBUS_POLL_COUNT = 1000
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SMBUS_COMMAND_WRITE = 0
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SMBUS_COMMAND_READ = 1
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class SMBus(hal_base.HALBase):
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def __init__( self, cs ):
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super(SMBus, self).__init__(cs)
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self.iobar = iobar.IOBAR(self.cs)
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self.smb_reg_status = 'SMBUS_HST_STS'
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self.smb_reg_command = 'SMBUS_HST_CMD'
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self.smb_reg_address = 'SMBUS_HST_SLVA'
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self.smb_reg_control = 'SMBUS_HST_CNT'
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self.smb_reg_data0 = 'SMBUS_HST_D0'
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self.smb_reg_data1 = 'SMBUS_HST_D1'
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def get_SMBus_Base_Address( self ):
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if self.iobar.is_IO_BAR_defined( 'SMBUS_BASE' ):
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(sba_base, sba_size) = self.iobar.get_IO_BAR_base_address( 'SMBUS_BASE' )
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return sba_base
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else:
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raise iobar.IOBARNotFoundError ('IOBARAccessError: SMBUS_BASE')
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def get_SMBus_HCFG( self ):
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if self.cs.is_register_defined( 'SMBUS_HCFG' ):
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reg_value = self.cs.read_register( 'SMBUS_HCFG' )
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if logger().HAL: self.cs.print_register( 'SMBUS_HCFG', reg_value )
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return reg_value
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else:
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raise self.cs.RegisterNotFoundError ('RegisterNotFound: SMBUS_HCFG')
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def display_SMBus_info( self ):
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if logger().HAL: logger().log( "[smbus] SMBus Base Address: 0x{:04X}".format(self.get_SMBus_Base_Address()) )
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self.get_SMBus_HCFG()
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def is_SMBus_enabled( self ):
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return self.cs.is_device_enabled( 'SMBUS' )
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def is_SMBus_supported( self ):
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(did,vid) = self.cs.get_DeviceVendorID( 'SMBUS' )
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if logger().HAL: logger().log( "[smbus] SMBus Controller (DID,VID) = (0x{:04X},0x{:04X})".format(did,vid) )
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if (0x8086 == vid): return True
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else:
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logger().error( "Unknown SMBus Controller (DID,VID) = (0x{:04X},0x{:04X})".format(did,vid) )
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return False
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def is_SMBus_host_controller_enabled( self ):
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hcfg = self.get_SMBus_HCFG()
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return hcfg.CFG_REG_PCH_SMB_HCFG_HST_EN
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def enable_SMBus_host_controller( self ):
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# Enable SMBus Host Controller Interface in HCFG
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reg_value = self.cs.read_register( 'SMBUS_HCFG' )
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if 0 == (reg_value & 0x1): self.cs.write_register( 'SMBUS_HCFG', (reg_value|0x1) )
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# @TODO: check SBA is programmed
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sba = self.get_SMBus_Base_Address()
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# Enable SMBus I/O Space
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cmd = self.cs.read_register( 'SMBUS_CMD' )
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if 0 == (cmd & 0x1): self.cs.write_register( 'SMBUS_CMD', (cmd|0x1) )
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def reset_SMBus_controller(self):
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reg_value = self.cs.read_register('SMBUS_HCFG')
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self.cs.write_register('SMBUS_HCFG', reg_value | 0x08)
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for i in range(SMBUS_POLL_COUNT):
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if (self.cs.read_register('SMBUS_HCFG') & 0x08) == 0:
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return True
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return False
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#
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# SMBus commands
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#
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# waits for SMBus to become ready
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def _is_smbus_ready( self ):
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for i in range(SMBUS_POLL_COUNT):
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#time.sleep( SMBUS_POLL_SLEEP_INTERVAL )
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busy = self.cs.read_register_field( self.smb_reg_status, 'BUSY' )
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if 0 == busy: return True
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return (0 == busy)
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# waits for SMBus transaction to complete
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def _wait_for_cycle( self ):
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for i in range(SMBUS_POLL_COUNT):
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#time.sleep( SMBUS_POLL_SLEEP_INTERVAL )
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sts = self.cs.read_register( self.smb_reg_status )
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busy = self.cs.get_register_field( self.smb_reg_status, sts, 'BUSY' )
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intr = self.cs.get_register_field( self.smb_reg_status, sts, 'INTR' )
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failed = self.cs.get_register_field( self.smb_reg_status, sts, 'FAILED' )
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if 0 == busy and 1 == intr:
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#if logger().HAL:
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# intr = chipsec.chipset.get_register_field( self.cs, self.smb_reg_status, sts, 'INTR' )
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# logger().log( "[smbus]: INTR = {:d}".format(intr) )
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break
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elif 1 == failed:
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#kill = 0
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#if chipsec.chipset.register_has_field( self.cs, self.smb_reg_control, 'KILL' ):
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# kill = chipsec.chipset.read_register_field( self.cs, self.smb_reg_control, 'KILL' )
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if logger().HAL: logger().error( "SMBus transaction failed (FAILED/ERROR bit = 1)" )
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return False
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else:
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if self.cs.register_has_field( self.smb_reg_status, 'DEV_ERR' ):
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if 1 == self.cs.get_register_field( self.smb_reg_status, sts, 'DEV_ERR' ):
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if logger().HAL: logger().error( "SMBus device error (invalid cmd, unclaimed cycle or time-out error)" )
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return False
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if self.cs.register_has_field( self.smb_reg_status, 'BUS_ERR' ):
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if 1 == self.cs.get_register_field( self.smb_reg_status, sts, 'BUS_ERR' ):
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if logger().HAL: logger().error( "SMBus bus error" )
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return False
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return (0 == busy)
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def read_byte( self, target_address, offset ):
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# clear status bits
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self.cs.write_register( self.smb_reg_status, 0xFF )
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# SMBus txn RW direction = Read, SMBus slave address = target_address
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hst_sa = 0x0
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hst_sa = self.cs.set_register_field( self.smb_reg_address, hst_sa, 'RW', SMBUS_COMMAND_READ )
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hst_sa = self.cs.set_register_field( self.smb_reg_address, hst_sa, 'Address', target_address, True )
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self.cs.write_register( self.smb_reg_address, hst_sa )
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# command data = byte offset (bus txn address)
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self.cs.write_register_field( self.smb_reg_command, 'DataOffset', offset )
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# command = Byte Data
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#if self.cs.register_has_field( self.smb_reg_control, 'SMB_CMD' ):
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self.cs.write_register_field( self.smb_reg_control, 'SMB_CMD', SMBUS_COMMAND_BYTE_DATA )
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# send SMBus txn
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self.cs.write_register_field( self.smb_reg_control, 'START', 1 )
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# wait for cycle to complete
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if not self._wait_for_cycle(): return 0xFF
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# read the data
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value = self.cs.read_register_field( self.smb_reg_data0, 'Data' )
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# clear status bits
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self.cs.write_register( self.smb_reg_status, 0xFF )
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# clear address/offset registers
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#chipsec.chipset.write_register( self.cs, self.smb_reg_address, 0x0 )
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#chipsec.chipset.write_register( self.cs, self.smb_reg_command, 0x0 )
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if logger().HAL: logger().log( "[smbus] read device {:X} off {:X} = {:X}".format(target_address, offset, value) )
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return value
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def write_byte( self, target_address, offset, value ):
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# clear status bits
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self.cs.write_register( self.smb_reg_status, 0xFF )
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# SMBus txn RW direction = Write, SMBus slave address = target_address
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hst_sa = 0x0
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hst_sa = self.cs.set_register_field( self.smb_reg_address, hst_sa, 'RW', SMBUS_COMMAND_WRITE )
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hst_sa = self.cs.set_register_field( self.smb_reg_address, hst_sa, 'Address', target_address, True )
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self.cs.write_register( self.smb_reg_address, hst_sa )
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# command data = byte offset (bus txn address)
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self.cs.write_register_field( self.smb_reg_command, 'DataOffset', offset )
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# write the data
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self.cs.write_register_field( self.smb_reg_data0, 'Data', value )
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# command = Byte Data
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#if self.cs.register_has_field( self.smb_reg_control, 'SMB_CMD' ):
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self.cs.write_register_field( self.smb_reg_control, 'SMB_CMD', SMBUS_COMMAND_BYTE_DATA )
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# send SMBus txn
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self.cs.write_register_field( self.smb_reg_control, 'START', 1 )
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# wait for cycle to complete
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if not self._wait_for_cycle(): return False
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# clear status bits
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self.cs.write_register( self.smb_reg_status, 0xFF )
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# clear address/offset registers
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#chipsec.chipset.write_register( self.cs, self.smb_reg_address, 0x0 )
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#chipsec.chipset.write_register( self.cs, self.smb_reg_command, 0x0 )
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if logger().HAL: logger().log( "[smbus] write to device {:X} off {:X} = {:X}".format(target_address, offset, value) )
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return True
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def read_range( self, target_address, start_offset, size ):
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buffer = [chr(0xFF)]*size
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for i in range (size):
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buffer[i] = chr( self.read_byte( target_address, start_offset + i ) )
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if logger().HAL:
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logger().log( "[smbus] reading {:d} bytes from device 0x{:X} at offset {:X}".format(size, target_address, start_offset) )
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#print_buffer( buffer )
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return buffer
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def write_range( self, target_address, start_offset, buffer ):
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size = len(buffer)
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for i in range(size):
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self.write_byte( target_address, start_offset + i, ord(buffer[i]) )
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if logger().HAL:
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logger().log( "[smbus] writing {:d} bytes to device 0x{:X} at offset {:X}".format(size, target_address, start_offset) )
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#print_buffer( buffer )
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return True
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