mirror of
https://github.com/chipsec/chipsec
synced 2026-06-08 13:31:00 +00:00
Nathaniel Mitchell
56 lines
3.6 KiB
XML
56 lines
3.6 KiB
XML
<?xml version="1.0"?>
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<configuration>
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<registers>
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<register name="PM1_STS" type="iobar" bar="ABASE" offset="0x0" size="2" desc="PM1 Status">
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<field name="WAK_STS" bit="15" size="1" desc="Wake Status"/>
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<field name="PCIEXPWAK_STS" bit="14" size="1" desc="PCI Express Wake Status"/>
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<field name="PWRBTNOR_STS" bit="11" size="1" desc="Power Button Override Status"/>
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<field name="RTC_STS" bit="10" size="1" desc="RTC Status"/>
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<field name="PWRBTN_STS" bit="8" size="1" desc="Power Button Status"/>
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<field name="GBL_STS" bit="5" size="1" desc="Global Status"/>
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<field name="BM_STS" bit="4" size="1" desc="Bus Master Status"/>
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<field name="TMROF_STS" bit="0" size="1" desc="Timer Overflow Status"/>
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</register>
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<register name="PM1_EN" type="iobar" bar="ABASE" offset="0x2" size="2" desc="PM1 Enable">
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<field name="PCIEXPWAK_DIS" bit="14" size="1" desc="PCI Express Wake Disable"/>
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<field name="RTC_EN" bit="10" size="1" desc="RTC Event Enable"/>
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<field name="PWRBTN_EN" bit="8" size="1" desc="Power Button Enable"/>
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<field name="GBL_EN" bit="5" size="1" desc="Global Enable"/>
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<field name="TMROF_EN" bit="0" size="1" desc="Timer Overflow Interrupt Enable"/>
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</register>
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<register name="PM1_CNT" type="iobar" bar="ABASE" offset="0x4" size="4" desc="PM1 Control">
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<field name="SLP_EN" bit="13" size="1" desc="Sleep Enable"/>
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<field name="SLP_TYP" bit="10" size="3" desc="Sleep Type"/>
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<field name="GBL_RLS" bit="2" size="1" desc="Global Release"/>
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<field name="SCI_EN" bit="0" size="1" desc="SCI Enable"/>
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</register>
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<register name="PM1_TMR" type="iobar" bar="ABASE" offset="0x8" size="4" desc="PM1 Timer">
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<field name="TMR_VAL" bit="0" size="24" desc="Timer Value"/>
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</register>
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<register name="SMI_EN" type="iobar" bar="ABASE" offset="0x30" size="4" desc="SMI Control and Enable">
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<field name="GBL_SMI_EN" bit="0" size="1"/>
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<field name="EOS" bit="1" size="1"/>
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<field name="BIOS_EN" bit="2" size="1"/>
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<field name="LEGACY_USB_EN" bit="3" size="1"/>
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<field name="SLP_SMI_EN" bit="4" size="1"/>
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<field name="APMC_EN" bit="5" size="1"/>
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<field name="SWSMI_TMR_EN" bit="6" size="1"/>
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<field name="BIOS_RLS" bit="7" size="1"/>
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<field name="MCSMI_EN" bit="11" size="1"/>
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<field name="TCO_EN" bit="13" size="1"/>
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<field name="PERIODIC_EN" bit="14" size="1"/>
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<field name="LEGACY_USB2_EN" bit="17" size="1"/>
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<field name="GPIO_UNLOCK_SMI_EN" bit="27" size="1"/>
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<field name="ME_SMI_EN" bit="30" size="1"/>
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<field name="xHCI_SMI_EN" bit="31" size="1"/>
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</register>
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</registers>
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<controls>
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<control name="GlobalSMIEnable" register="SMI_EN" field="GBL_SMI_EN" desc="Global SMI Enable"/>
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<control name="GPIOSMIEnable" register="SMI_EN" field="GPIO_UNLOCK_SMI_EN" desc="GPIO Config SMI Enable"/>
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<control name="TCOSMIEnable" register="SMI_EN" field="TCO_EN" desc="TCO SMI Enable"/>
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</controls>
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</configuration> |