mirror of
https://github.com/chipsec/chipsec
synced 2026-06-08 13:31:00 +00:00
Nathaniel Mitchell
110 lines
3.7 KiB
Python
110 lines
3.7 KiB
Python
# CHIPSEC: Platform Security Assessment Framework
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# Copyright (c) 2010-2021, Intel Corporation
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License
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# as published by the Free Software Foundation; Version 2.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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#
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# Contact information:
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# chipsec@intel.com
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#
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"""
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Access to Port I/O
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usage:
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>>> read(0x61, 1)
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>>> read_port_byte(0x61)
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>>> read_port_word(0x61)
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>>> read_port_dword(0x61)
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>>> read_range(0x71, 0x4, 1)
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>>> dump_range(0x71, 0x4, 1)
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>>> write(0x71, 0, 1)
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>>> write_port_byte(0x61, 0xAA)
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>>> write_port_word(0x61, 0xAAAA)
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>>> write_port_dword(0x61, 0xAAAAAAAA)
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"""
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from typing import List
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from chipsec.hal.hal_base import HALBase
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from chipsec.library.exceptions import SizeRuntimeError
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from chipsec.library.logger import logger
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class Io(HALBase):
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def __init__(self, cs):
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super(Io, self).__init__(cs)
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self.helper = cs.helper
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self.valid_sizes = [1, 2, 4]
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def read(self, io_port: int, size: int) -> int:
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if size not in self.valid_sizes:
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message = f'[HAL] [PortIO] Size of {size} is invalid. Valid sizes: {self.valid_sizes}'
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logger().log_bad(message)
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raise SizeRuntimeError(message)
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value = self.helper.read_io_port(io_port, size)
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logger().log_hal(f"[io] IN 0x{io_port:04X}: value = 0x{value:08X}, size = 0x{size:02X}")
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return value
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def write(self, io_port: int, value: int, size: int) -> int:
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if size not in self.valid_sizes:
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message = f'[HAL] [PortIO] Size of {size} is invalid. Valid sizes: {self.valid_sizes}'
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logger().log_bad(message)
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raise SizeRuntimeError(message)
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logger().log_hal(f"[io] OUT 0x{io_port:04X}: value = 0x{value:08X}, size = 0x{size:02X}")
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status = self.helper.write_io_port(io_port, value, size)
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return status
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#
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# Read registers from I/O range
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#
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def read_range(self, range_base: int, range_size: int, size: int = 1) -> List[int]:
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n = range_size // size
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io_ports = []
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for i in range(n):
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io_ports.append(self.read(range_base + i * size, size))
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return io_ports
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#
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# Dump I/O range
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#
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def dump_range(self, range_base: int, range_size: int, size: int = 1) -> None:
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logger().log(f"[io] I/O register range [0x{range_base:04X}:0x{range_base:04X}+{range_size:04X}]:")
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read_ranges = self.read_range(range_base, range_size, size)
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for i, read_val in enumerate(read_ranges):
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logger().log(f'+{size * i:04X}: {read_val:{f"0{size * 2:d}X"}}')
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def read_port_byte(self, io_port: int) -> int:
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return self.read(io_port, 1)
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def read_port_word(self, io_port: int) -> int:
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return self.read(io_port, 2)
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def read_port_dword(self, io_port: int) -> int:
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return self.read(io_port, 4)
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def write_port_byte(self, io_port: int, value: int) -> int:
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return self.write(io_port, value, 1)
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def write_port_word(self, io_port: int, value: int) -> int:
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return self.write(io_port, value, 2)
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def write_port_dword(self, io_port: int, value: int) -> int:
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return self.write(io_port, value, 4)
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haldata = {"arch":[HALBase.MfgIds.Any], 'name': {'io': "Io"}}
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