mirror of
https://github.com/chipsec/chipsec
synced 2026-06-08 13:31:00 +00:00
William Leara
79f81bbb7e
This commit fixes whitespace errors from checkers W291,W292,W293,W391. They were found by running "flake8 ." from the root directory. These are errors defined by "pycodestyle", and have no functional impact to the source. This is simply fixing whitespace as defined by CHIPSEC's .flake8 configuration. background: https://www.flake8rules.com/rules/W291.html https://www.flake8rules.com/rules/W292.html https://www.flake8rules.com/rules/W293.html https://www.flake8rules.com/rules/W391.html tool versions: flake8 v7.3.0, python v3.13.11 Signed-off-by: William Leara <william.leara@dell.com>
136 lines
3.4 KiB
Python
136 lines
3.4 KiB
Python
# CHIPSEC: Platform Security Assessment Framework
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# Copyright (c) 2010-2021, Intel Corporation
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License
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# as published by the Free Software Foundation; Version 2.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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#
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# Contact information:
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# chipsec@intel.com
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#
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"""
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The idt, gdt and ldt commands print the IDT, GDT and LDT, respectively.
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IDT command:
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>>> chipsec_util idt [cpu_id]
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Examples:
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>>> chipsec_util idt 0
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>>> chipsec_util idt
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GDT command:
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>>> chipsec_util gdt [cpu_id]
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Examples:
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>>> chipsec_util gdt 0
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>>> chipsec_util gdt
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LDT command:
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>>> chipsec_util ldt [cpu_id]
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Examples:
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>>> chipsec_util ldt 0
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>>> chipsec_util ldt
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"""
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from argparse import ArgumentParser
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from chipsec.command import BaseCommand, toLoad
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# CPU descriptor tables
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class IDTCommand(BaseCommand):
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"""
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>>> chipsec_util idt [cpu_id]
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Examples:
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>>> chipsec_util idt 0
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>>> chipsec_util idt
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"""
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def requirements(self) -> toLoad:
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return toLoad.Driver
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def parse_arguments(self) -> None:
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parser = ArgumentParser(usage=IDTCommand.__doc__)
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parser.add_argument('_thread', metavar='thread', type=lambda x: int(x, 0), nargs='?', default=None, help="thread")
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parser.parse_args(self.argv, namespace=self)
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def run(self) -> None:
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num_threads = self.cs.hals.msr.get_cpu_thread_count()
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if self._thread and self._thread < num_threads:
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self.logger.log(f'[CHIPSEC] Dumping IDT of CPU thread {self._thread:d}')
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self.cs.hals.msr.IDT(self._thread, 4)
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else:
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self.logger.log(f'[CHIPSEC] Dumping IDT of {num_threads:d} CPU threads')
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self.cs.hals.msr.IDT_all(4)
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class GDTCommand(BaseCommand):
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"""
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>>> chipsec_util gdt [cpu_id]
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Examples:
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>>> chipsec_util gdt 0
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>>> chipsec_util gdt
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"""
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def requirements(self) -> toLoad:
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return toLoad.Driver
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def parse_arguments(self) -> None:
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parser = ArgumentParser(usage=GDTCommand.__doc__)
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parser.add_argument('_thread', metavar='thread', type=lambda x: int(x, 0), nargs='?', default=None, help="thread")
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parser.parse_args(self.argv, namespace=self)
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def run(self) -> None:
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num_threads = self.cs.hals.msr.get_cpu_thread_count()
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if self._thread and self._thread < num_threads:
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self.logger.log(f'[CHIPSEC] Dumping IDT of CPU thread {self._thread:d}')
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self.cs.hals.msr.GDT(self._thread, 4)
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else:
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self.logger.log(f'[CHIPSEC] Dumping IDT of {num_threads:d} CPU threads')
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self.cs.hals.msr.GDT_all(4)
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class LDTCommand(BaseCommand):
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"""
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>>> chipsec_util ldt [cpu_id]
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Examples:
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>>> chipsec_util ldt 0
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>>> chipsec_util ldt
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"""
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def requirements(self) -> toLoad:
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return toLoad.Nil
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def parse_arguments(self) -> None:
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return
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def run(self) -> None:
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self.logger.log_error("[CHIPSEC] ldt not implemented")
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commands = {'idt': IDTCommand, 'gdt': GDTCommand}
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