mirror of
https://github.com/chipsec/chipsec
synced 2026-06-08 13:31:00 +00:00
Nicolas Iooss
202de615f3
On some testing systems, `chipsec_util.py iommu config` fails with:
[CHIPSEC] Executing command 'iommu' with args ['config']
[CHIPSEC] Couldn't find DMAR ACPI table
==================================================================
[iommu] GFXVTD IOMMU Engine Configuration
==================================================================
Base register (BAR) : GFXVTBAR
BAR register value : 0x0
Traceback (most recent call last):
File "./chipsec_util.py", line 236, in <module>
sys.exit(main())
File "./chipsec_util.py", line 232, in main
return chipsecUtil.main()
File "./chipsec_util.py", line 204, in main
comm.run()
File "/root/chipsec/chipsec/utilcmd/iommu_cmd.py", line 139, in run
self.func()
File "/root/chipsec/chipsec/utilcmd/iommu_cmd.py", line 122, in iommu_config
self.iommu_engine('config')
File "/root/chipsec/chipsec/utilcmd/iommu_cmd.py", line 114, in iommu_engine
if (cmd == 'config' ): _iommu.dump_IOMMU_configuration( e )
File "/root/chipsec/chipsec/hal/iommu.py", line 78, in dump_IOMMU_configuration
base = self.get_IOMMU_Base_Address( iommu_engine )
File "/root/chipsec/chipsec/hal/iommu.py", line 52, in get_IOMMU_Base_Address
(base, size) = self.mmio.get_MMIO_BAR_base_address(vtd_base_name)
File "/root/chipsec/chipsec/hal/mmio.py", line 249, in get_MMIO_BAR_base_address
raise CSReadError('[mmio] Base address was determined to be 0')
chipsec.exceptions.CSReadError: [mmio] Base address was determined to be 0
Indeed, the OS did not configure any IOMMU and GFXVTBAR was zero. It is
nonetheless annoying that the execution of this utility stops without
describing the other IOMMU ("VTBAR").
Fix this issue by returning early from the dump functions if the BAR
contains zero. With this change:
$ ./chipsec_util.py iommu config
...
==================================================================
[iommu] GFXVTD IOMMU Engine Configuration
==================================================================
Base register (BAR) : GFXVTBAR
BAR register value : 0x0
==================================================================
[iommu] VTD IOMMU Engine Configuration
==================================================================
Base register (BAR) : VTBAR
BAR register value : 0x0
$ ./chipsec_util.py iommu status
...
==================================================================
[iommu] GFXVTD IOMMU Engine Status:
==================================================================
[iommu] GFXVTBAR value is zero
==================================================================
[iommu] VTD IOMMU Engine Status:
==================================================================
[iommu] VTBAR value is zero
$ ./chipsec_util.py iommu pt
...
[iommu] GFXVTBAR value is zero
[iommu] VTBAR value is zero
Signed-off-by: Nicolas Iooss <nicolas.iooss_git@polytechnique.org>