mirror of
https://github.com/chipsec/chipsec
synced 2026-06-08 13:31:00 +00:00
120 lines
3.6 KiB
Python
120 lines
3.6 KiB
Python
#!/usr/local/bin/python
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#CHIPSEC: Platform Security Assessment Framework
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#Copyright (c) 2010-2014, Intel Corporation
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#
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#This program is free software; you can redistribute it and/or
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#modify it under the terms of the GNU General Public License
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#as published by the Free Software Foundation; Version 2.
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#
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#This program is distributed in the hope that it will be useful,
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#but WITHOUT ANY WARRANTY; without even the implied warranty of
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#MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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#GNU General Public License for more details.
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#
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#You should have received a copy of the GNU General Public License
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#along with this program; if not, write to the Free Software
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#Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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#
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#Contact information:
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#chipsec@intel.com
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#
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#
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# usage as a standalone utility:
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#
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## \addtogroup standalone
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#chipsec_util smi / chipsec_util nmi
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#-----------
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#~~~
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#chipsec_util smi <SMI_code> <SMI_data> [RAX] [RBX] [RCX] [RDX] [RSI] [RDI]
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#chipsec_util nmi
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#''
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# Examples:
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#''
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# chipsec_util smi 0xDE 0x0
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# chipsec_util nmi
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#~~~
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__version__ = '1.0'
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import os
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import sys
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import time
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import chipsec_util
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from chipsec.logger import *
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from chipsec.file import *
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from chipsec.hal.interrupts import Interrupts
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#_cs = cs()
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usage = "chipsec_util smi <SMI_code> <SMI_data> [RAX] [RBX] [RCX] [RDX] [RSI] [RDI]\n\n" + \
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"chipsec_util nmi\n" + \
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"Examples:\n" + \
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" chipsec_util smi 0xDE 0x0\n" + \
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" chipsec_util nmi\n\n"
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# ###################################################################
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#
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# CPU Interrupts
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#
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# ###################################################################
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def smi(argv):
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try:
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interrupts = Interrupts( chipsec_util._cs )
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except RuntimeError, msg:
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print msg
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return
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SMI_code_port_value = 0xF
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SMI_data_port_value = 0x0
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if (2 == len(argv)):
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pass
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elif (3 < len(argv)):
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SMI_code_port_value = int(argv[2],16)
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SMI_data_port_value = int(argv[3],16)
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logger().log( "[CHIPSEC] Sending SW SMI (code: 0x%02X, data: 0x%02X).." % (SMI_code_port_value, SMI_data_port_value) )
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if (4 == len(argv)):
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interrupts.send_SMI_APMC( SMI_code_port_value, SMI_data_port_value )
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elif (10 == len(argv)):
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_rax = int(argv[4],16)
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_rbx = int(argv[5],16)
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_rcx = int(argv[6],16)
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_rdx = int(argv[7],16)
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_rsi = int(argv[8],16)
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_rdi = int(argv[9],16)
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logger().log( " RAX: 0x%016X (AX will be overwridden with values of SW SMI ports B2/B3)" % _rax )
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logger().log( " RBX: 0x%016X" % _rbx )
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logger().log( " RCX: 0x%016X" % _rcx )
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logger().log( " RDX: 0x%016X (DX will be overwridden with 0x00B2)" % _rdx )
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logger().log( " RSI: 0x%016X" % _rsi )
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logger().log( " RDI: 0x%016X" % _rdi )
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interrupts.send_SW_SMI( SMI_code_port_value, SMI_data_port_value, _rax, _rbx, _rcx, _rdx, _rsi, _rdi )
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else: print usage
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else: print usage
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def nmi(argv):
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if 2 < len(argv):
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print usage
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try:
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interrupts = Interrupts( chipsec_util._cs )
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except RuntimeError, msg:
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print msg
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return
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logger().log( "[CHIPSEC] Sending NMI#.." )
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interrupts.send_NMI()
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chipsec_util.commands['nmi'] = {'func' : nmi, 'start_driver' : True, 'help' : usage }
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chipsec_util.commands['smi'] = {'func' : smi, 'start_driver' : True, 'help' : usage }
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