mirror of
https://github.com/chipsec/chipsec
synced 2026-06-08 13:31:00 +00:00
brentholtsclaw
163 lines
7.0 KiB
Python
163 lines
7.0 KiB
Python
#CHIPSEC: Platform Security Assessment Framework
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#Copyright (c) 2010-2021, Intel Corporation
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#
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#This program is free software; you can redistribute it and/or
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#modify it under the terms of the GNU General Public License
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#as published by the Free Software Foundation; Version 2.
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#
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#This program is distributed in the hope that it will be useful,
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#but WITHOUT ANY WARRANTY; without even the implied warranty of
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#MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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#GNU General Public License for more details.
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#
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#You should have received a copy of the GNU General Public License
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#along with this program; if not, write to the Free Software
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#Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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#
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#Contact information:
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#chipsec@intel.com
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#
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"""
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Access to CPU resources (for each CPU thread): Model Specific Registers (MSR), IDT/GDT
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usage:
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>>> read_msr( 0x8B )
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>>> write_msr( 0x79, 0x12345678 )
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>>> get_IDTR( 0 )
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>>> get_GDTR( 0 )
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>>> dump_Descriptor_Table( 0, DESCRIPTOR_TABLE_CODE_IDTR )
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>>> IDT( 0 )
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>>> GDT( 0 )
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>>> IDT_all()
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>>> GDT_all()
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"""
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from chipsec.logger import logger, print_buffer
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DESCRIPTOR_TABLE_CODE_IDTR = 0
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DESCRIPTOR_TABLE_CODE_GDTR = 1
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DESCRIPTOR_TABLE_CODE_LDTR = 2
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MTRR_MEMTYPE_UC = 0x0
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MTRR_MEMTYPE_WC = 0x1
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MTRR_MEMTYPE_WT = 0x4
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MTRR_MEMTYPE_WP = 0x5
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MTRR_MEMTYPE_WB = 0x6
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MemType = {
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MTRR_MEMTYPE_UC: 'Uncacheable (UC)',
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MTRR_MEMTYPE_WC: 'Write Combining (WC)',
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MTRR_MEMTYPE_WT: 'Write-through (WT)',
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MTRR_MEMTYPE_WP: 'Write-protected (WP)',
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MTRR_MEMTYPE_WB: 'Writeback (WB)'
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}
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class Msr:
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def __init__( self, cs ):
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self.helper = cs.helper
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self.cs = cs
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def get_cpu_thread_count( self ):
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thread_count = self.helper.get_threads_count()
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if thread_count is None or thread_count < 0:
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if logger().HAL: logger().log( "helper.get_threads_count didn't return anything. Reading MSR 0x35 to find out number of logical CPUs (use CPUID Leaf B instead?)" )
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thread_count = self.cs.read_register_field("IA32_MSR_CORE_THREAD_COUNT", "Thread_Count")
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if 0 == thread_count: thread_count = 1
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if logger().HAL: logger().log( "[cpu] # of logical CPUs: {:d}".format(thread_count) )
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return thread_count
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# @TODO: fix
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def get_cpu_core_count( self ):
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core_count = self.cs.read_register_field("IA32_MSR_CORE_THREAD_COUNT", "Core_Count")
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return core_count
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##########################################################################################################
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#
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# Read/Write CPU MSRs
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#
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##########################################################################################################
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def read_msr( self, cpu_thread_id, msr_addr ):
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(eax, edx) = self.helper.read_msr( cpu_thread_id, msr_addr )
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if logger().HAL: logger().log( "[cpu{:d}] RDMSR( 0x{:x} ): EAX = 0x{:08X}, EDX = 0x{:08X}".format(cpu_thread_id, msr_addr, eax, edx) )
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return (eax, edx)
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def write_msr( self, cpu_thread_id, msr_addr, eax, edx ):
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self.helper.write_msr( cpu_thread_id, msr_addr, eax, edx )
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if logger().HAL: logger().log( "[cpu{:d}] WRMSR( 0x{:x} ): EAX = 0x{:08X}, EDX = 0x{:08X}".format(cpu_thread_id, msr_addr, eax, edx) )
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return
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##########################################################################################################
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#
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# Get CPU Descriptor Table Registers (IDTR, GDTR, LDTR..)
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#
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##########################################################################################################
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def get_Desc_Table_Register( self, cpu_thread_id, code ):
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return self.helper.get_descriptor_table( cpu_thread_id, code )
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def get_IDTR( self, cpu_thread_id ):
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(limit, base, pa) = self.get_Desc_Table_Register( cpu_thread_id, DESCRIPTOR_TABLE_CODE_IDTR )
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if logger().HAL:
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logger().log( "[cpu{:d}] IDTR Limit = 0x{:04X}, Base = 0x{:016X}, Physical Address = 0x{:016X}".format(cpu_thread_id, limit, base, pa) )
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return (limit, base, pa)
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def get_GDTR( self, cpu_thread_id ):
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(limit, base, pa) = self.get_Desc_Table_Register( cpu_thread_id, DESCRIPTOR_TABLE_CODE_GDTR )
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if logger().HAL:
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logger().log( "[cpu{:d}] GDTR Limit = 0x{:04X}, Base = 0x{:016X}, Physical Address = 0x{:016X}".format(cpu_thread_id, limit, base, pa) )
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return (limit, base, pa)
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def get_LDTR( self, cpu_thread_id ):
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(limit, base, pa) = self.get_Desc_Table_Register( cpu_thread_id, DESCRIPTOR_TABLE_CODE_LDTR )
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if logger().HAL:
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logger().log( "[cpu{:d}] LDTR Limit = 0x{:04X}, Base = 0x{:016X}, Physical Address = 0x{:016X}".format(cpu_thread_id, limit, base, pa) )
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return (limit, base, pa)
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##########################################################################################################
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#
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# Dump CPU Descriptor Tables (IDT, GDT, LDT..)
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#
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##########################################################################################################
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def dump_Descriptor_Table( self, cpu_thread_id, code, num_entries=None ):
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(limit, base, pa) = self.helper.get_descriptor_table( cpu_thread_id, code )
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dt = self.helper.read_physical_mem( pa, limit + 1 )
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total_num = len(dt) //16
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if (total_num < num_entries) or (num_entries is None):
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num_entries = total_num
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logger().log( '[cpu{:d}] Physical Address: 0x{:016X}'.format(cpu_thread_id, pa) )
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logger().log( '[cpu{:d}] # of entries : {:d}'.format(cpu_thread_id, total_num) )
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logger().log( '[cpu{:d}] Contents ({:d} entries):'.format(cpu_thread_id, num_entries) )
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print_buffer( dt )
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logger().log( '--------------------------------------' )
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logger().log( '# segment:offset attributes' )
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logger().log( '--------------------------------------' )
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for i in range(0, num_entries):
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offset = (ord(dt[i *16 + 11]) << 56) | (ord(dt[i *16 + 10]) << 48) | (ord(dt[i *16 + 9]) << 40) | (ord(dt[i *16 + 8]) << 32) | (ord(dt[i *16 + 7]) << 24) | (ord(dt[i *16 + 6]) << 16) | (ord(dt[i *16 + 1]) << 8) | ord(dt[i *16 + 0])
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segsel = (ord(dt[i *16 + 3]) << 8) | ord(dt[i *16 + 2])
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attr = (ord(dt[i *16 + 5]) << 8) | ord(dt[i *16 + 4])
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logger().log( '{:03d} {:04X}:{:016X} 0x{:04X}'.format(i, segsel, offset, attr) )
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return (pa, dt)
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def IDT( self, cpu_thread_id, num_entries=None ):
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if logger().HAL: logger().log( '[cpu{:d}] IDT:'.format(cpu_thread_id) )
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return self.dump_Descriptor_Table( cpu_thread_id, DESCRIPTOR_TABLE_CODE_IDTR, num_entries )
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def GDT( self, cpu_thread_id, num_entries=None ):
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if logger().HAL: logger().log( '[cpu{:d}] GDT:'.format(cpu_thread_id) )
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return self.dump_Descriptor_Table( cpu_thread_id, DESCRIPTOR_TABLE_CODE_GDTR, num_entries )
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def IDT_all( self, num_entries=None ):
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for tid in range(self.get_cpu_thread_count()):
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self.IDT( tid, num_entries )
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def GDT_all( self, num_entries=None ):
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for tid in range(self.get_cpu_thread_count()):
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self.GDT( tid, num_entries )
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