mirror of
https://github.com/chipsec/chipsec
synced 2026-06-08 13:31:00 +00:00
brentholtsclaw
109 lines
5.4 KiB
Python
109 lines
5.4 KiB
Python
#CHIPSEC: Platform Security Assessment Framework
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#Copyright (c) 2010-2021, Intel Corporation
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#
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#This program is free software; you can redistribute it and/or
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#modify it under the terms of the GNU General Public License
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#as published by the Free Software Foundation; Version 2.
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#
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#This program is distributed in the hope that it will be useful,
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#but WITHOUT ANY WARRANTY; without even the implied warranty of
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#MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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#GNU General Public License for more details.
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#
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#You should have received a copy of the GNU General Public License
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#along with this program; if not, write to the Free Software
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#Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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#
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#Contact information:
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#chipsec@intel.com
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#
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"""
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This module checks if CPU is affected by 'The SMM memory sinkhole' vulnerability by Christopher Domas
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NOTE: The system may hang when running this test. In that case, the mitigation to this issue is likely working but we may not be handling the exception generated.
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References:
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The Memory Sinkhole by Christopher Domas: https://www.blackhat.com/docs/us-15/materials/us-15-Domas-The-Memory-Sinkhole-Unleashing-An-x86-Design-Flaw-Allowing-Universal-Privilege-Escalation.pdf (presentation) and https://www.blackhat.com/docs/us-15/materials/us-15-Domas-The-Memory-Sinkhole-Unleashing-An-x86-Design-Flaw-Allowing-Universal-Privilege-Escalation-wp.pdf (whitepaper).
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"""
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from chipsec.module_common import BaseModule, ModuleResult, MTAG_SMM
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TAGS = [MTAG_SMM]
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class sinkhole(BaseModule):
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def __init__(self):
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BaseModule.__init__(self)
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def is_supported(self):
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# @TODO: Currently this module doesn't work properly on (U)EFI
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if not (self.cs.helper.is_windows() or self.cs.helper.is_linux()):
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self.logger('Not a supported OS: Windows or Linux')
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self.res = ModuleResult.NOTAPPLICABLE
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return False
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elif not self.cs.is_register_defined( 'IA32_APIC_BASE' ) or \
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not self.cs.is_register_defined( 'IA32_SMRR_PHYSBASE' ) or \
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not self.cs.is_register_defined( 'IA32_SMRR_PHYSMASK' ):
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self.logger.error("Couldn't find definition of required configuration registers")
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self.res = ModuleResult.ERROR
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return False
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else:
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return True
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def check_LAPIC_SMRR_overlap( self ):
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smrr_physbase_msr = self.cs.read_register( 'IA32_SMRR_PHYSBASE', 0 )
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apic_base_msr = self.cs.read_register( 'IA32_APIC_BASE', 0 )
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self.cs.print_register( 'IA32_APIC_BASE', apic_base_msr )
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self.cs.print_register( 'IA32_SMRR_PHYSBASE', smrr_physbase_msr )
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smrrbase = self.cs.get_register_field( 'IA32_SMRR_PHYSBASE', smrr_physbase_msr, 'PhysBase' )
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smrr_base = self.cs.get_register_field( 'IA32_SMRR_PHYSBASE', smrr_physbase_msr, 'PhysBase', True )
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apicbase = self.cs.get_register_field( 'IA32_APIC_BASE', apic_base_msr, 'APICBase' )
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apic_base = self.cs.get_register_field( 'IA32_APIC_BASE', apic_base_msr, 'APICBase', True )
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self.logger.log( "[*] Local APIC Base: 0x{:016X}".format(apic_base) )
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self.logger.log( "[*] SMRR Base : 0x{:016X}".format(smrr_base) )
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self.logger.log("[*] Attempting to overlap Local APIC page with SMRR region")
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self.logger.log( " Writing 0x{:X} to IA32_APIC_BASE[APICBase]..".format(smrrbase) )
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self.logger.log_important( "NOTE: The system may hang or process may crash when running this test. In that case, the mitigation to this issue is likely working but we may not be handling the exception generated.")
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res = self.cs.write_register_field( 'IA32_APIC_BASE', 'APICBase', smrrbase, preserve_field_position=False, cpu_thread=0 )
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if res is None:
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self.logger.log_important("Error encountered when attempting to modify IA32_APIC_BASE")
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apic_base_msr_new = self.cs.read_register( 'IA32_APIC_BASE', 0 )
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self.logger.log( "[*] New IA32_APIC_BASE: 0x{:016X}".format(apic_base_msr_new) )
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if apic_base_msr_new == apic_base_msr:
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res = ModuleResult.PASSED
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self.logger.log_good("Could not modify IA32_APIC_BASE to overlap SMRR")
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self.logger.log_passed("CPU does not seem to have SMM memory sinkhole vulnerability")
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else:
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self.logger.log_bad("Could modify IA32_APIC_BASE to overlap SMRR")
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self.cs.write_register( 'IA32_APIC_BASE', apic_base_msr, 0 )
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self.logger.log( "[*] Restored original value 0x{:016X}".format(apic_base_msr) )
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res = ModuleResult.FAILED
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self.logger.log_failed("CPU is susceptible to SMM memory sinkhole vulnerability. Verify that SMRR is programmed correctly.")
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return res
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# --------------------------------------------------------------------------
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# run( module_argv )
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# Required function: run here all tests from this module
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# --------------------------------------------------------------------------
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def run( self, module_argv ):
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self.logger.start_test("x86 SMM Memory Sinkhole")
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if self.cs.cpu.check_SMRR_supported():
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self.logger.log_good("SMRR range protection is supported")
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self.res = self.check_LAPIC_SMRR_overlap()
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else:
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self.logger.log_important("CPU does not support SMRR range protection of SMRAM")
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self.res = ModuleResult.NOTAPPLICABLE
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return self.res
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