mirror of
https://github.com/chipsec/chipsec
synced 2026-06-08 13:31:00 +00:00
c7zero
235 lines
9.0 KiB
Python
235 lines
9.0 KiB
Python
import os
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import struct
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import tempfile
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import unittest
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from tests.software import mock_helper
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import chipsec_util
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from chipsec import logger
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from chipsec import chipset
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from chipsec.helper import oshelper
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class TestChipsecUtil(unittest.TestCase):
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"""Test the commands exposed by chipsec_utils.
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Each test may define its virtual helper and then call the _chipsec_util
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method with the command line arguments.
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"""
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def setUp(self):
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"""Setup the environment for the utils tests.
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We mock the helper registry to only contain our emulated helper.
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"""
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fileno, self.log_file = tempfile.mkstemp()
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os.close(fileno)
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self.old_registry = oshelper.Helper.registry
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oshelper.Helper.registry = []
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oshelper._helper = None
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chipset._chipset = None
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def tearDown(self):
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os.remove(self.log_file)
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oshelper._helper = None
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chipset._chipset = None
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chipsec_util._cs = None
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oshelper.Helper.registry = self.old_registry
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def _chipsec_util(self, arg, helper_class=mock_helper.TestHelper):
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"""Run the chipsec_util command with the arguments.
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Each test may setup a virtual helper to emulate the expected behaviour
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from the hardware. If no helper is provided, TestHelper will be used.
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It verifies that no error is being reported. self.log will be populated
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with the output.
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"""
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oshelper.Helper.registry = [(helper_class.__name__, helper_class)]
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chipsec_util._cs = chipset.cs()
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util = chipsec_util.ChipsecUtil()
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util.VERBOSE = True
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util.set_logfile(self.log_file)
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err_code = util.main(["chipsec_utils.py"] + arg.split())
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logger.logger().close()
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self.log = open(self.log_file).read()
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self.assertEqual(err_code, 0)
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def test_acpi_xsdt_list(self):
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class ACPIHelper(mock_helper.TestHelper):
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RSDP_DESCRIPTOR = ("RSD PTR " + # Signature
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struct.pack("<B", 0x1) + # Checksum
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"TEST00" + # OEMID
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struct.pack("<B", 0x2) + # Revision
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struct.pack("<I", 0x200) + # RSDT Address
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struct.pack("<I", 0x0) + # Length
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struct.pack("<Q", 0x100) + # XSDT Address
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struct.pack("<B", 0x0) + # Extended Checksum
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"AAA") # Reserved
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XSDT_DESCRIPTOR = ("XSDT" + # Signature
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struct.pack("<I", 0x32) + # Length
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struct.pack("<B", 0x1) + # Revision
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struct.pack("<B", 0x1) + # Checksum
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"OEMIDT" + # OEMID
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"OEMTBLID" + # OEM Table ID
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"OEMR" + # OEM Revision
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"CRID" + # Creator ID
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"CRRV" + # Creator Revision
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struct.pack("<Q", 0x400)) # Address of table
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EBDA_ADDRESS = 0x96000
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EBDA_PADDING = 0x100
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RSDP_ADDRESS = EBDA_ADDRESS + EBDA_PADDING
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def read_phys_mem(self, pa_hi, pa_lo, length):
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if pa_lo == 0x40E:
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return struct.pack("<H", self.EBDA_ADDRESS >> 4)
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elif pa_lo >= self.EBDA_ADDRESS and \
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pa_lo < self.RSDP_ADDRESS + len(self.RSDP_DESCRIPTOR):
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mem = "\x00" * self.EBDA_PADDING + self.RSDP_DESCRIPTOR
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offset = pa_lo - self.EBDA_ADDRESS
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return mem[offset:offset+length]
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elif pa_lo == 0x100:
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return self.XSDT_DESCRIPTOR[:length]
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elif pa_lo == 0x400:
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return "EFGH"
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self._chipsec_util("acpi list", ACPIHelper)
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self.assertIn("EFGH: 0x0000000000000400", self.log)
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def test_acpi_rsdt_list(self):
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class ACPIHelper(mock_helper.TestHelper):
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RSDP_DESCRIPTOR = ("RSD PTR " + # Signature
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struct.pack("<B", 0x1) + # Checksum
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"TEST00" + # OEMID
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struct.pack("<B", 0x0) + # Revision
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struct.pack("<I", 0x200)) # RSDT Address
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RSDT_DESCRIPTOR = ("RSDT" + # Signature
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struct.pack("<I", 0x28) + # Length
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struct.pack("<B", 0x1) + # Revision
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struct.pack("<B", 0x1) + # Checksum
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"OEMIDT" + # OEMID
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"OEMTBLID" + # OEM Table ID
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"OEMR" + # OEM Revision
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"CRID" + # Creator ID
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"CRRV" + # Creator Revision
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struct.pack("<I", 0x300)) # Address of table
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def read_phys_mem(self, pa_hi, pa_lo, length):
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if pa_lo == 0xE0000:
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return self.RSDP_DESCRIPTOR[:length]
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elif pa_lo == 0x200:
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return self.RSDT_DESCRIPTOR[:length]
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elif pa_lo == 0x300:
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return "ABCD"
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else:
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return "\xFF" * length
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self._chipsec_util("acpi list", ACPIHelper)
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self.assertIn("ABCD: 0x0000000000000300", self.log)
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def test_platform(self):
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self._chipsec_util("platform")
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def test_cmos_dump(self):
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"""Test to verify the output of 'cmos dump'.
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Check that we only access CMOS IO ports.
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"""
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class CMOSHelper(mock_helper.TestHelper):
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def read_io_port(self, io_port, size):
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if io_port < 0x70 or io_port > 0x73:
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raise Exception("Reading outside CMOS IO port")
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return io_port
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def write_io_port(self, io_port, value, size):
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if io_port < 0x70 or io_port > 0x73:
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raise Exception("Writing outside CMOS IO port")
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self._chipsec_util("cmos dump", CMOSHelper)
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def test_msr(self):
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class MSRHelper(mock_helper.TestHelper):
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def get_threads_count(self):
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return 1
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def read_msr(self, thread_id, msr_addr):
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if msr_addr == 0x2FF:
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return [0x1234, 0xcdef]
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else:
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return [0x0, 0x0]
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self._chipsec_util("msr 0x2FF", MSRHelper)
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self.assertIn("EAX=00001234, EDX=0000CDEF", self.log)
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def test_gdt(self):
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class GDTHelper(mock_helper.TestHelper):
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def get_descriptor_table(self, cpu_thread_id, desc_table_code):
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return (63, 0x1000, 0x0)
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def read_phys_mem(self, pa_hi, pa_lo, length):
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return "\xff" * length
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self._chipsec_util("gdt 0", GDTHelper)
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self.assertIn("# of entries : 4", self.log)
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def test_spi_info(self):
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"""Test to verify the ouput of 'spi info'.
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Validates that BC and FRAP are correctly read.
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"""
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class SPIHelper(mock_helper.TestHelper):
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RCBA_ADDR = 0xFED0000
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SPIBAR_ADDR = RCBA_ADDR + 0x3800
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SPIBAR_END = SPIBAR_ADDR + 0x200
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FRAP = SPIBAR_ADDR + 0x50
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FREG0 = SPIBAR_ADDR + 0x54
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LPC_BRIDGE_DEVICE = (0, 0x1F, 0)
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def read_pci_reg(self, bus, device, function, address, size):
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if (bus, device, function) == self.LPC_BRIDGE_DEVICE:
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if address == 0xF0:
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return self.RCBA_ADDR
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elif address == 0xDC:
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return 0xDEADBEEF
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else:
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raise Exception("Unexpected PCI read")
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else:
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return super(SPIHelper, self).read_pci_reg(bus, device,
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function,
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address, size)
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def read_mmio_reg(self, pa, size):
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if pa == self.FREG0:
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return 0x11111111
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elif pa == self.FREG0 + 4:
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return 0x22222222
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elif pa == self.FRAP:
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return 0xEEEEEEEE
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elif pa >= self.SPIBAR_ADDR and pa < self.SPIBAR_END:
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return 0x0
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else:
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raise Exception("Unexpected address")
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def write_mmio_reg(self, pa, size, value):
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if pa < self.SPIBAR_ADDR or pa > self.SPIBAR_END:
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raise Exception("Write to outside of SPIBAR")
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self._chipsec_util("spi info", SPIHelper)
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self.assertIn("BC = 0xDEADBEEF", self.log)
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self.assertIn("FRAP = 0xEEEEEEEE", self.log)
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