mirror of
https://github.com/chipsec/chipsec
synced 2026-06-08 13:31:00 +00:00
dabccd36c0
- new VMM hypercall interface support (Xen and HyperV hypercall formats) - Windows only - new paging hierarchy dump/parsing (paging HAL component and chipsec_util cpu pt) - new EPT paging hierarchy dump/parsing (chipsec_util vmm ept) - new VT-d paging hierarchy dump/parsing (chipsec_util iommu pt) - new support of Embedded Controller (EC) access (ec HAL component and chipsec_util ec) - new support of TPM 1.2 access (tpm HAL component) - new support of Message Bus access on Atom SoC (msgbus HAL component and chipsec_util msgbus) - Linux only - parsing RAW UEFI images - updated smbus and SPD HAL components to use XML config - merged cpuid into cpu HAL component (use chipsec_util cpu cpuid) - new module: tools.vmm.vbox.vbox_crash_apicbase - udated modules: common.bios_ts, common.uefi.s3bootscript, remap - added template config file smm_config.ini for tools.smm.smm_ptr SMI fuzzer - added template config file te.cfg for tools.secureboot.te tool
35 lines
1.0 KiB
Python
35 lines
1.0 KiB
Python
#CHIPSEC: Platform Security Assessment Framework
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#Copyright (c) 2010-2016, Intel Corporation
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#
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#This program is free software; you can redistribute it and/or
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#modify it under the terms of the GNU General Public License
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#as published by the Free Software Foundation; Version 2.
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#
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#This program is distributed in the hope that it will be useful,
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#but WITHOUT ANY WARRANTY; without even the implied warranty of
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#MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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#GNU General Public License for more details.
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#
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#You should have received a copy of the GNU General Public License
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#along with this program; if not, write to the Free Software
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#Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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#
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#Contact information:
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#chipsec@intel.com
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#
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"""
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Base for HAL Components
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"""
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import chipsec.logger
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import chipsec.chipset
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import chipsec.defines
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class HALBase( object ):
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def __init__(self):
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self.cs = chipsec.chipset.cs()
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self.logger = chipsec.logger.logger()
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