mirror of
https://github.com/chipsec/chipsec
synced 2026-06-08 13:31:00 +00:00
Dan Scott
112 lines
3.9 KiB
Python
112 lines
3.9 KiB
Python
# CHIPSEC: Platform Security Assessment Framework
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# Copyright (c) 2010-2021, Intel Corporation
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License
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# as published by the Free Software Foundation; Version 2.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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#
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# Contact information:
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# chipsec@intel.com
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#
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"""
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Access to Port I/O
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usage:
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>>> read_port_byte( 0x61 )
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>>> read_port_word( 0x61 )
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>>> read_port_dword( 0x61 )
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>>> write_port_byte( 0x71, 0 )
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>>> write_port_word( 0x71, 0 )
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>>> write_port_dword( 0x71, 0 )
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"""
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from typing import List
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from chipsec.library.logger import logger
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class PortIO:
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def __init__(self, cs):
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self.helper = cs.helper
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self.cs = cs
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def _read_port(self, io_port: int, size: int) -> int:
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value = self.helper.read_io_port(io_port, size)
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if logger().HAL:
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logger().log(f"[io] IN 0x{io_port:04X}: value = 0x{value:08X}, size = 0x{size:02X}")
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return value
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def _write_port(self, io_port: int, value: int, size: int) -> int:
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if logger().HAL:
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logger().log(f"[io] OUT 0x{io_port:04X}: value = 0x{value:08X}, size = 0x{size:02X}")
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status = self.helper.write_io_port(io_port, value, size)
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return status
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def read_port_dword(self, io_port: int) -> int:
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value = self.helper.read_io_port(io_port, 4)
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if logger().HAL:
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logger().log(f"[io] reading dword from I/O port 0x{io_port:04X} -> 0x{value:08X}")
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return value
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def read_port_word(self, io_port: int) -> int:
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value = self.helper.read_io_port(io_port, 2)
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if logger().HAL:
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logger().log(f"[io] reading word from I/O port 0x{io_port:04X} -> 0x{value:04X}")
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return value
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def read_port_byte(self, io_port: int) -> int:
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value = self.helper.read_io_port(io_port, 1)
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if logger().HAL:
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logger().log(f"[io] reading byte from I/O port 0x{io_port:04X} -> 0x{value:02X}")
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return value
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def write_port_byte(self, io_port: int, value: int) -> int:
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if logger().HAL:
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logger().log(f"[io] writing byte to I/O port 0x{io_port:04X} <- 0x{value:02X}")
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status = self.helper.write_io_port(io_port, value, 1)
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return status
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def write_port_word(self, io_port: int, value: int) -> int:
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if logger().HAL:
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logger().log(f"[io] writing word to I/O port 0x{io_port:04X} <- 0x{value:04X}")
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status = self.helper.write_io_port(io_port, value, 2)
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return status
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def write_port_dword(self, io_port: int, value: int) -> int:
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if logger().HAL:
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logger().log(f"[io] writing dword to I/O port 0x{io_port:04X} <- 0x{value:08X}")
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status = self.helper.write_io_port(io_port, value, 4)
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return status
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#
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# Read registers from I/O range
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#
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def read_IO(self, range_base: int, range_size: int, size: int = 1) -> List[int]:
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n = range_size // size
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io_ports = []
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for i in range(n):
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io_ports.append(self._read_port(range_base + i * size, size))
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return io_ports
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#
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# Dump I/O range
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#
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def dump_IO(self, range_base: int, range_size: int, size: int = 1) -> None:
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n = range_size // size
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fmt = f'0{size * 2:d}X'
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logger().log(f"[io] I/O register range [0x{range_base:04X}:0x{range_base:04X}+{range_size:04X}]:")
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for i in range(n):
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reg = self._read_port(range_base + i * size, size)
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logger().log(f'+{size * i:04X}: {reg:{fmt}}')
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