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https://github.com/chipsec/chipsec
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CHIPSEC
0654edca19
Revision 1.2.0 -------------- This version includes the following new or updated modules: #. Merged common.secureboot.keys module into common.secureboot.variables module #. Updated tools.secureboot.te module to be able to test PE/TE issue on Linux or UEFI shell #. Updated tools.smm.smm_ptr module This version includes the following updates: #. Added the *controls* abstraction. Modules are encouraged to use ``get_control`` and ``set_control`` when interacting with platform registers. This permits greater flexibility in case the register that controls a given feature or configuration changes between platform generations. The controls are defined in the platform XML file. At this time, only a small number of controls are defined. We plan to move existing modules over to this new mechanism. #. Added XML Schema for the XML configuration files #. Support for reading, writing, and listing UEFI variables from the UEFI Shell environment has been added. #. Added support for decompression while SPI flash parsing via ``decode`` or ``uefi decode`` commands in Linux #. Added basic ACPI table parsing to HAL (RSDP, RSDT/XSDT, APIC, DMAR) #. Added UEFI tables searching and parsing to HAL (EFI system table, runtime services table, boot services table, DXE services table, EFI configuration table) #. Added DIMM Serial Presence Detect (SPD) ROM dumping and parsing to HAL #. Added ``uefi s3bootscript`` command parsing the S3 boot script to chipsec_util.py #. Added virtual-to-physical address translation function to Linux/EFI/Windows helpers #. Added support of server platforms (Haswell server and Ivy Town) to chipset.py This version has the following known issues: #. Decompression of images in SPI flash parsing is not available in UEFI shell. #. When calling alloc_phys_mem, the argument to set maximum physical address (max_pa) for allocation is ignored on linux. A message will be printed in dmesg if the allocation is above the max_pa that is passed in, but the call will return anyway. #. UEFI Shell environment does not support ``cpuid`` or ``get_thread_count``. There are functions that simply warn that they are not supported. #. Size of PCIEXBAR (MMCFG) is calculated incorrectly
84 lines
2.8 KiB
Python
84 lines
2.8 KiB
Python
#!/usr/local/bin/python
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#CHIPSEC: Platform Security Assessment Framework
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#Copyright (c) 2010-2015, Intel Corporation
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#
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#This program is free software; you can redistribute it and/or
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#modify it under the terms of the GNU General Public License
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#as published by the Free Software Foundation; Version 2.
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#
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#This program is distributed in the hope that it will be useful,
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#but WITHOUT ANY WARRANTY; without even the implied warranty of
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#MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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#GNU General Public License for more details.
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#
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#You should have received a copy of the GNU General Public License
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#along with this program; if not, write to the Free Software
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#Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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#
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#Contact information:
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#chipsec@intel.com
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#
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"""
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The msr command allows direct access to read and write MSRs.
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"""
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__version__ = '1.0'
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import os
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import sys
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import time
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import chipsec_util
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from chipsec.logger import *
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from chipsec.file import *
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from chipsec.hal.msr import Msr
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# CPU Model Specific Registers
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def msr(argv):
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"""
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>>> chipsec_util msr <msr> [eax] [edx] [cpu_id]
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Examples:
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>>> chipsec_util msr 0x3A
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>>> chipsec_util msr 0x8B 0x0 0x0 0
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"""
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if 3 > len(argv):
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print msr.__doc__
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return
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#msr = Msr( os_helper )
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msr_addr = int(argv[2],16)
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if (3 == len(argv)):
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for tid in range(chipsec_util._cs.msr.get_cpu_thread_count()):
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(eax, edx) = chipsec_util._cs.msr.read_msr( tid, msr_addr )
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val64 = ((edx << 32) | eax)
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logger().log( "[CHIPSEC] CPU%d: RDMSR( 0x%x ) = %016X (EAX=%08X, EDX=%08X)" % (tid, msr_addr, val64, eax, edx) )
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elif (4 == len(argv)):
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cpu_thread_id = int(argv[3], 16)
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(eax, edx) = chipsec_util._cs.msr.read_msr( cpu_thread_id, msr_addr )
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val64 = ((edx << 32) | eax)
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logger().log( "[CHIPSEC] CPU%d: RDMSR( 0x%x ) = %016X (EAX=%08X, EDX=%08X)" % (cpu_thread_id, msr_addr, val64, eax, edx) )
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else:
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eax = int(argv[3], 16)
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edx = int(argv[4], 16)
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val64 = ((edx << 32) | eax)
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if (5 == len(argv)):
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logger().log( "[CHIPSEC] All CPUs: WRMSR( 0x%x ) = %016X" % (msr_addr, val64) )
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for tid in range(chipsec_util._cs.msr.get_cpu_thread_count()):
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chipsec_util._cs.msr.write_msr( tid, msr_addr, eax, edx )
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elif (6 == len(argv)):
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cpu_thread_id = int(argv[5], 16)
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logger().log( "[CHIPSEC] CPU%d: WRMSR( 0x%x ) = %016X" % (cpu_thread_id, msr_addr, val64) )
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chipsec_util._cs.msr.write_msr( cpu_thread_id, msr_addr, eax, edx )
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chipsec_util.commands['msr'] = {'func' : msr , 'start_driver' : True, 'help' : msr.__doc__ }
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