mirror of
https://github.com/chipsec/chipsec
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Sae86
116 lines
4.1 KiB
Python
116 lines
4.1 KiB
Python
# CHIPSEC: Platform Security Assessment Framework
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# Copyright (c) 2023, Intel Corporation
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License
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# as published by the Free Software Foundation; Version 2.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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#
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# Contact information:
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# chipsec@intel.com
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#
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"""
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Reports CET Settings
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Usage:
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``chipsec_main -m common.cet``
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Example:
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>>> chipsec_main.py -m common.cet
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.. note::
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- cpuid(7, 0) must return 1 at bit 7 to run
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- IA32_U_CET and IA32_S_CET must be defined for addition information.
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- Module is INFORMATION only and does NOT return a Pass/Fail
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"""
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from chipsec.module_common import BaseModule
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from chipsec.library.returncode import ModuleResult
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from chipsec.library.defines import BIT7, BIT20
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from chipsec.library.exceptions import HWAccessViolationError
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class cet(BaseModule):
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def __init__(self):
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super(cet, self).__init__()
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self.cpuid_7_0__ecx_val = None
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def is_supported(self):
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supported = self.support_shadow()
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if supported:
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return True
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self.logger.log_important('CET is not defined for the platform. Skipping module.')
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return False
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def get_cpuid_value(self) -> None:
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(_, _, self.cpuid_7_0__ecx_val, _) = self.cs.cpu.cpuid(7, 0)
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def support_shadow(self) -> bool:
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if self.cpuid_7_0__ecx_val is None:
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self.get_cpuid_value()
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return self.cpuid_7_0__ecx_val & BIT7 != 0
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def support_ibt(self) -> bool:
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if self.cpuid_7_0__ecx_val is None:
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self.get_cpuid_value()
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return self.cpuid_7_0__ecx_val & BIT20 != 0
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def setting_enabled(self, msr_val, field, mask, desc):
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enabled = all((i & mask) != 0 for i in msr_val)
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part_enabled = any((i & mask) != 0 for i in msr_val)
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if enabled:
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self.logger.log(f' {field}: {desc} is ENABLED')
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elif part_enabled:
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self.logger.log(f' {field}: {desc} is ENABLED on 1 or more threads')
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else:
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self.logger.log(f' {field}: {desc} is NOT ENABLED')
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def print_cet_state(self, cet_msr):
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fields = ['SH_STK_EN',
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'WR_SHSTK_EN',
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'ENDBR_EN',
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'LEG_IW_EN',
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'NO_TRACK_EN',
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'SUPPRESS_DIS',
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'SUPPRESS']
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try:
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msr_vals = self.cs.register.read_all(cet_msr)
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reg = self.cs.register.get_def(cet_msr)
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self.logger.log(f'{cet_msr} Settings:')
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for key in fields:
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mask = self.cs.register.get_field_mask(cet_msr, key, True)
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desc = reg['FIELDS'][key]['desc']
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self.setting_enabled(msr_vals, key, mask, desc)
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except HWAccessViolationError:
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self.logger.log(f'Unable to read {cet_msr}')
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def check_cet(self):
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if self.support_shadow():
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self.logger.log("CET Shadow Stack is supported")
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else:
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self.logger.log("CET Shadow Stack is unsupported")
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if self.support_ibt():
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self.logger.log("CET Indirect Branch Tracking is supported")
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else:
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self.logger.log("CET Indirect Branch Tracking is unsupported")
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if self.cs.register.is_defined("IA32_U_CET") and self.cs.register.is_defined("IA32_S_CET"):
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self.print_cet_state("IA32_U_CET")
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self.print_cet_state('IA32_S_CET')
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self.result.setStatusBit(self.result.status.INFORMATION)
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self.res = self.result.getReturnCode(ModuleResult.INFORMATION)
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def run(self, module_argv):
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self.logger.start_test("Checking CET Settings")
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self.check_cet()
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return self.res
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