mirror of
https://github.com/chipsec/chipsec
synced 2026-06-08 13:31:00 +00:00
afd048fd52
This commit fixes all the E305 errors. They were found by running "flake8 ." from the root directory. This is an error defined by "pycodestyle", and has no functional impact to the source. This is simply fixing whitespace as defined by CHIPSEC's .flake8 configuration. background: https://www.flake8rules.com/rules/E305.html https://pycodestyle.pycqa.org/en/latest/intro.html#error-codes:~:text=after%20function%20decorator-,E305,-expected%202%20blank versions: flake8 v7.2.0, python v3.12.6 Signed-off-by: William Leara <william.leara@dell.com>
106 lines
3.6 KiB
Python
106 lines
3.6 KiB
Python
# !/usr/bin/python
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# CHIPSEC: Platform Security Assessment Framework
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# Copyright (c) 2010-2021, Intel Corporation
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License
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# as published by the Free Software Foundation; Version 2.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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#
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# Contact information:
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# chipsec@intel.com
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#
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"""
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The io command allows direct access to read and write I/O port space.
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>>> chipsec_util io list
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>>> chipsec_util io read <io_port> <width>
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>>> chipsec_util io write <io_port> <width> <value>
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Examples:
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>>> chipsec_util io list
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>>> chipsec_util io read 0x61 1
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>>> chipsec_util io write 0x430 1 0x0
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"""
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from argparse import ArgumentParser
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from chipsec.hal import iobar
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from chipsec.command import BaseCommand, toLoad
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class PortIOCommand(BaseCommand):
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def requirements(self) -> toLoad:
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return toLoad.All
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def parse_arguments(self) -> None:
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parser = ArgumentParser(prog='chipsec_util io', usage=__doc__)
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subparsers = parser.add_subparsers()
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# list
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parser_dump = subparsers.add_parser('list')
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parser_dump.set_defaults(func=self.io_list)
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# read
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parser_r = subparsers.add_parser('read')
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parser_r.add_argument('_port', metavar='port', type=lambda x: int(x, 0), help="io port")
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parser_r.add_argument('_width', metavar='width', type=int, choices=[0x1, 0x2, 0x4], help="width")
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parser_r.set_defaults(func=self.io_read)
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# write
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parser_w = subparsers.add_parser('write')
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parser_w.add_argument('_port', metavar='port', type=lambda x: int(x, 0), help="io port")
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parser_w.add_argument('_width', metavar='width', type=int, choices=[0x1, 0x2, 0x4], help="width")
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parser_w.add_argument('_value', metavar='value', type=lambda x: int(x, 0), help="value")
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parser_w.set_defaults(func=self.io_write)
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parser.parse_args(self.argv, namespace=self)
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def set_up(self) -> None:
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self._iobar = iobar.IOBAR(self.cs)
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def io_list(self) -> None:
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self._iobar.list_IO_BARs()
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def io_read(self) -> None:
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if 0x1 == self._width:
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value = self.cs.io.read_port_byte(self._port)
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elif 0x2 == self._width:
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value = self.cs.io.read_port_word(self._port)
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elif 0x4 == self._width:
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value = self.cs.io.read_port_dword(self._port)
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else:
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self.logger.log("Invalid read size requested. 1,2,4 supported")
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return
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self.logger.log(f'[CHIPSEC] IN 0x{self._port:04X} -> 0x{value:08X} (size = 0x{self._width:02X})')
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return
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def io_write(self) -> None:
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if 0x1 == self._width:
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self.cs.io.write_port_byte(self._port, self._value)
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elif 0x2 == self._width:
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self.cs.io.write_port_word(self._port, self._value)
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elif 0x4 == self._width:
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self.cs.io.write_port_dword(self._port, self._value)
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else:
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self.logger.log("Invalid write size requested. 1,2,4 supported")
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return
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self.logger.log(
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f'[CHIPSEC] OUT 0x{self._port:04X} <- 0x{self._value:08X} (size = 0x{self._width:02X})')
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return
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commands = {'io': PortIOCommand}
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