mirror of
https://github.com/chipsec/chipsec
synced 2026-06-08 13:31:00 +00:00
William Leara
afd048fd52
This commit fixes all the E305 errors. They were found by running "flake8 ." from the root directory. This is an error defined by "pycodestyle", and has no functional impact to the source. This is simply fixing whitespace as defined by CHIPSEC's .flake8 configuration. background: https://www.flake8rules.com/rules/E305.html https://pycodestyle.pycqa.org/en/latest/intro.html#error-codes:~:text=after%20function%20decorator-,E305,-expected%202%20blank versions: flake8 v7.2.0, python v3.12.6 Signed-off-by: William Leara <william.leara@dell.com>
57 lines
1.6 KiB
Python
57 lines
1.6 KiB
Python
# CHIPSEC: Platform Security Assessment Framework
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# Copyright (c) 2021, Intel Corporation
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License
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# as published by the Free Software Foundation; Version 2.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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#
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# Contact information:
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# chipsec@intel.com
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#
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"""
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The mmcfg_base command displays PCIe MMCFG Base/Size.
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Usage:
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>>> chipsec_util mmcfg_base
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Examples:
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>>> chipsec_util mmcfg_base
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"""
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from chipsec.command import BaseCommand, toLoad
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from chipsec.hal import mmio
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# Access to Memory Mapped PCIe Configuration Space (MMCFG)
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class MMCfgBaseCommand(BaseCommand):
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def requirements(self) -> toLoad:
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return toLoad.All
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def parse_arguments(self) -> None:
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return
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def run(self) -> None:
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_mmio = mmio.MMIO(self.cs)
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pciexbarlist = _mmio.get_MMCFG_base_addresses()
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for pciexbar in pciexbarlist:
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self.logger.log(f'[CHIPSEC] Memory Mapped Config Base: 0x{pciexbar[0]:016X}')
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self.logger.log(f'[CHIPSEC] Memory Mapped Config Size: 0x{pciexbar[1]:016X}')
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self.logger.log('')
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commands = {'mmcfg_base': MMCfgBaseCommand}
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