brentholtsclaw fdcd4d6c36 Fix based upon comments ...

Signed-off-by: brentholtsclaw <brent.holtsclaw@intel.com>

2024-12-16 09:08:50 -08:00

..

cfg

Expands instances of pci registers per bus

2024-12-12 14:25:03 -08:00

fuzzing

Clean up py2 code in primitives.py

2022-08-24 13:31:09 -07:00

hal

Fix based upon comments

2024-12-16 09:08:50 -08:00

helper

HAL Update - Enable multitenant HALs

2024-12-03 12:50:36 -08:00

library

Expands instances of pci registers per bus

2024-12-12 14:25:03 -08:00

modules

Update hal references to use cs.hals

2024-12-10 12:22:31 -08:00

options

initial commit of cfg changes

2024-12-03 12:50:34 -08:00

utilcmd

Fix up character spacing

2024-12-16 09:08:50 -08:00

__init__.py

Apply flake8 code formatting rules against repo

2022-07-28 09:17:10 -07:00

chipset.py

Misc fixes

2024-12-03 12:50:38 -08:00

command.py

Update chipsec_util to check if a cfg is loaded when it's needed

2024-09-20 00:00:10 -07:00

config.py

Expands instances of pci registers per bus

2024-12-12 14:25:03 -08:00

module_common.py

Update common_module.py

2024-08-26 16:40:01 -07:00

module.py

Replace getcwd with get_main_dir

2024-06-04 11:41:47 -05:00

parsers.py

initial commit of cfg changes

2024-12-03 12:50:34 -08:00

testcase.py

Refactor testcase.py file

2024-06-26 16:00:06 -07:00

VERSION

Update to 1.13.7 (#2345)

2024-10-30 14:05:41 -07:00

WARNING.txt

change setup.py build driver by default. change root directory of chipsec. move WARNING.txt to chipsec. remove PKG-INFO (#107)

2016-10-18 18:19:42 -07:00