4 Commits

Author	SHA1	Message	Date
hakril	30b05d25f1	Improved MultipleInstr capabilities + fix a bug in x64 that failed to recognize 32b register name not uppercase	2019-09-20 16:18:16 +02:00
hakril	6fcba46739	Added <Raw> pseudo instruction to both assemblers + corresponding test	2019-08-07 17:42:56 +02:00
hakril	65726e706f	Add Int X86/64 instruction	2018-01-13 16:40:21 +01:00
hakril	b3117ce4e3	pytest integration finished + moved tests/ to top dir	2017-09-10 18:57:59 +02:00