# SPDX-License-Identifier: MIT
# Copyright (C) 2018-present iced project and contributors

# one byte too long
26 26 26 26 26 26 26 26 26 26 26 26 26 26 01 CE, INVALID, INVALID, 0, code=Add_rm32_r32

# max length
26 26 26 26 26 26 26 26 26 26 26 26 26 01 CE, Add_rm32_r32, Add, 2, op0=r;esi op1=r;ecx es: enc=2601CE

26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 01 CE, INVALID, INVALID, 0, code=Add_rm32_r32
26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 01, INVALID, INVALID, 0, code=Add_rm32_r32
26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26, INVALID, INVALID, 0, code=INVALID
26 26 26 26 26 26 26 26 26 26 26 26 26 26 26, INVALID, INVALID, 0, code=INVALID
26 26 26 26 26 26 26 26 26 26 26 26 26 26, INVALID, INVALID, 0, code=INVALID err=NoMoreBytes

26 26 26 26 26 26 26 26 26 26 26 26 26 26 B0 5A, INVALID, INVALID, 0, code=Mov_r8_imm8
26 26 26 26 26 26 26 26 26 26 26 26 26 26 B0, INVALID, INVALID, 0, code=Mov_r8_imm8

26 26 26 26 26 26 26 26 26 26 26 26 26 66 B8 5AA5, INVALID, INVALID, 0, code=Mov_r16_imm16
26 26 26 26 26 26 26 26 26 26 26 26 66 B8 5AA5, INVALID, INVALID, 0, code=Mov_r16_imm16
26 26 26 26 26 26 26 26 26 26 26 26 66 B8 5A, INVALID, INVALID, 0, code=Mov_r16_imm16
26 26 26 26 26 26 26 26 26 26 26 26 66 B8, INVALID, INVALID, 0, code=Mov_r16_imm16 err=NoMoreBytes

26 26 26 26 26 26 26 26 26 26 26 26 26 26 B8 5AA51234, INVALID, INVALID, 0, code=Mov_r32_imm32
26 26 26 26 26 26 26 26 26 26 26 26 26 B8 5AA51234, INVALID, INVALID, 0, code=Mov_r32_imm32
26 26 26 26 26 26 26 26 26 26 26 26 B8 5AA51234, INVALID, INVALID, 0, code=Mov_r32_imm32
26 26 26 26 26 26 26 26 26 26 26 B8 5AA51234, INVALID, INVALID, 0, code=Mov_r32_imm32
26 26 26 26 26 26 26 26 26 26 26 B8 5AA512, INVALID, INVALID, 0, code=Mov_r32_imm32
26 26 26 26 26 26 26 26 26 26 26 B8 5AA5, INVALID, INVALID, 0, code=Mov_r32_imm32 err=NoMoreBytes
26 26 26 26 26 26 26 26 26 26 26 B8 5A, INVALID, INVALID, 0, code=Mov_r32_imm32 err=NoMoreBytes
26 26 26 26 26 26 26 26 26 26 26 B8, INVALID, INVALID, 0, code=Mov_r32_imm32 err=NoMoreBytes
#
26 26 26 26 26 26 26 26 26 26 26 26 26 B8 5AA51234, INVALID, INVALID, 0, code=Mov_r32_imm32
26 26 26 26 26 26 26 26 26 26 26 26 26 B8 5AA512, INVALID, INVALID, 0, code=Mov_r32_imm32
26 26 26 26 26 26 26 26 26 26 26 26 26 B8 5AA5, INVALID, INVALID, 0, code=Mov_r32_imm32
26 26 26 26 26 26 26 26 26 26 26 26 26 B8 5A, INVALID, INVALID, 0, code=Mov_r32_imm32
26 26 26 26 26 26 26 26 26 26 26 26 26 B8, INVALID, INVALID, 0, code=Mov_r32_imm32 err=NoMoreBytes

26 26 26 26 26 26 26 26 26 26 26 26 26 48 B8 041526375AA51234, INVALID, INVALID, 0, code=Mov_r64_imm64
26 26 26 26 26 26 26 26 26 26 26 26 48 B8 041526375AA51234, INVALID, INVALID, 0, code=Mov_r64_imm64
26 26 26 26 26 26 26 26 26 26 26 48 B8 041526375AA51234, INVALID, INVALID, 0, code=Mov_r64_imm64
26 26 26 26 26 26 26 26 26 26 48 B8 041526375AA51234, INVALID, INVALID, 0, code=Mov_r64_imm64
26 26 26 26 26 26 26 26 26 48 B8 041526375AA51234, INVALID, INVALID, 0, code=Mov_r64_imm64
26 26 26 26 26 26 26 26 48 B8 041526375AA51234, INVALID, INVALID, 0, code=Mov_r64_imm64
26 26 26 26 26 26 26 48 B8 041526375AA51234, INVALID, INVALID, 0, code=Mov_r64_imm64
26 26 26 26 26 26 48 B8 041526375AA51234, INVALID, INVALID, 0, code=Mov_r64_imm64
26 26 26 26 26 26 48 B8 041526375AA512, INVALID, INVALID, 0, code=Mov_r64_imm64
26 26 26 26 26 26 48 B8 041526375AA5, INVALID, INVALID, 0, code=Mov_r64_imm64 err=NoMoreBytes
26 26 26 26 26 26 48 B8 041526375A, INVALID, INVALID, 0, code=Mov_r64_imm64 err=NoMoreBytes
26 26 26 26 26 26 48 B8 04152637, INVALID, INVALID, 0, code=Mov_r64_imm64 err=NoMoreBytes
26 26 26 26 26 26 48 B8 041526, INVALID, INVALID, 0, code=Mov_r64_imm64 err=NoMoreBytes
26 26 26 26 26 26 48 B8 0415, INVALID, INVALID, 0, code=Mov_r64_imm64 err=NoMoreBytes
26 26 26 26 26 26 48 B8 04, INVALID, INVALID, 0, code=Mov_r64_imm64 err=NoMoreBytes
26 26 26 26 26 26 48 B8, INVALID, INVALID, 0, code=Mov_r64_imm64 err=NoMoreBytes
#
26 26 26 26 26 26 26 26 26 26 26 26 48 B8 041526375AA51234, INVALID, INVALID, 0, code=Mov_r64_imm64
26 26 26 26 26 26 26 26 26 26 26 26 48 B8 041526375AA512, INVALID, INVALID, 0, code=Mov_r64_imm64
26 26 26 26 26 26 26 26 26 26 26 26 48 B8 041526375AA5, INVALID, INVALID, 0, code=Mov_r64_imm64
26 26 26 26 26 26 26 26 26 26 26 26 48 B8 041526375A, INVALID, INVALID, 0, code=Mov_r64_imm64
26 26 26 26 26 26 26 26 26 26 26 26 48 B8 04152637, INVALID, INVALID, 0, code=Mov_r64_imm64
26 26 26 26 26 26 26 26 26 26 26 26 48 B8 041526, INVALID, INVALID, 0, code=Mov_r64_imm64
26 26 26 26 26 26 26 26 26 26 26 26 48 B8 0415, INVALID, INVALID, 0, code=Mov_r64_imm64
26 26 26 26 26 26 26 26 26 26 26 26 48 B8 04, INVALID, INVALID, 0, code=Mov_r64_imm64
26 26 26 26 26 26 26 26 26 26 26 26 48 B8, INVALID, INVALID, 0, code=Mov_r64_imm64 err=NoMoreBytes

# not enough bytes
, INVALID, INVALID, 0, code=INVALID err=NoMoreBytes
66, INVALID, INVALID, 0, code=INVALID err=NoMoreBytes
01, INVALID, INVALID, 0, code=Add_rm32_r32 err=NoMoreBytes
# Mov_r16_imm16, missing 1 byte (immediate)
66 B8 5A, INVALID, INVALID, 0, code=Mov_r16_imm16 err=NoMoreBytes
# Mov_r32_imm32, missing 1-3 bytes (immediate)
B8 5AA512, INVALID, INVALID, 0, code=Mov_r32_imm32 err=NoMoreBytes
B8 5AA5, INVALID, INVALID, 0, code=Mov_r32_imm32 err=NoMoreBytes
B8 5A, INVALID, INVALID, 0, code=Mov_r32_imm32 err=NoMoreBytes
# Mov_r64_imm64, missing 1-7 bytes (immediate)
48 B8 041526375AA512, INVALID, INVALID, 0, code=Mov_r64_imm64 err=NoMoreBytes
48 B8 041526375AA5, INVALID, INVALID, 0, code=Mov_r64_imm64 err=NoMoreBytes
48 B8 041526375A, INVALID, INVALID, 0, code=Mov_r64_imm64 err=NoMoreBytes
48 B8 04152637, INVALID, INVALID, 0, code=Mov_r64_imm64 err=NoMoreBytes
48 B8 041526, INVALID, INVALID, 0, code=Mov_r64_imm64 err=NoMoreBytes
48 B8 0415, INVALID, INVALID, 0, code=Mov_r64_imm64 err=NoMoreBytes
48 B8 04, INVALID, INVALID, 0, code=Mov_r64_imm64 err=NoMoreBytes

# NoMoreBytes has higher prio than InvalidInstruction
F0 04, INVALID, INVALID, 0, code=Add_AL_imm8 err=NoMoreBytes

# test extra mandatory prefixes
0F10 08, Movups_xmm_xmmm128, Movups, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Packed128_Float32
66 0F10 08, Movupd_xmm_xmmm128, Movupd, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Packed128_Float64
F3 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float32
F2 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float64
66 66 0F10 08, Movupd_xmm_xmmm128, Movupd, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Packed128_Float64 enc=660F1008
66 F3 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float32 enc=F30F1008
66 F2 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float64 enc=F20F1008
F3 66 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float32 enc=F30F1008
F3 F3 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float32 enc=F30F1008
F3 F2 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float64 enc=F20F1008
F2 66 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float64 enc=F20F1008
F2 F3 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float32 enc=F30F1008
F2 F2 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float64 enc=F20F1008
66 66 66 0F10 08, Movupd_xmm_xmmm128, Movupd, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Packed128_Float64 enc=660F1008
66 66 F3 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float32 enc=F30F1008
66 66 F2 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float64 enc=F20F1008
66 F3 66 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float32 enc=F30F1008
66 F3 F3 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float32 enc=F30F1008
66 F3 F2 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float64 enc=F20F1008
66 F2 66 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float64 enc=F20F1008
66 F2 F3 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float32 enc=F30F1008
66 F2 F2 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float64 enc=F20F1008
F3 66 66 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float32 enc=F30F1008
F3 66 F3 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float32 enc=F30F1008
F3 66 F2 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float64 enc=F20F1008
F3 F3 66 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float32 enc=F30F1008
F3 F3 F3 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float32 enc=F30F1008
F3 F3 F2 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float64 enc=F20F1008
F3 F2 66 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float64 enc=F20F1008
F3 F2 F3 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float32 enc=F30F1008
F3 F2 F2 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float64 enc=F20F1008
F2 66 66 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float64 enc=F20F1008
F2 66 F3 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float32 enc=F30F1008
F2 66 F2 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float64 enc=F20F1008
F2 F3 66 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float32 enc=F30F1008
F2 F3 F3 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float32 enc=F30F1008
F2 F3 F2 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float64 enc=F20F1008
F2 F2 66 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float64 enc=F20F1008
F2 F2 F3 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float32 enc=F30F1008
F2 F2 F2 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;ds;rax;;1;0;0;Float64 enc=F20F1008

# test extra mandatory prefixes with segment overrides
64 0F10 08, Movups_xmm_xmmm128, Movups, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Packed128_Float32 fs: enc=640F1008
66 64 0F10 08, Movupd_xmm_xmmm128, Movupd, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Packed128_Float64 fs: enc=64660F1008
F3 64 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float32 fs: enc=64F30F1008
F2 64 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float64 fs: enc=64F20F1008
66 66 64 0F10 08, Movupd_xmm_xmmm128, Movupd, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Packed128_Float64 fs: enc=64660F1008
66 F3 64 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float32 fs: enc=64F30F1008
66 F2 64 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float64 fs: enc=64F20F1008
F3 66 64 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float32 fs: enc=64F30F1008
F3 F3 64 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float32 fs: enc=64F30F1008
F3 F2 64 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float64 fs: enc=64F20F1008
F2 66 64 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float64 fs: enc=64F20F1008
F2 F3 64 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float32 fs: enc=64F30F1008
F2 F2 64 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float64 fs: enc=64F20F1008
66 66 66 64 0F10 08, Movupd_xmm_xmmm128, Movupd, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Packed128_Float64 fs: enc=64660F1008
66 66 F3 64 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float32 fs: enc=64F30F1008
66 66 F2 64 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float64 fs: enc=64F20F1008
66 F3 66 64 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float32 fs: enc=64F30F1008
66 F3 F3 64 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float32 fs: enc=64F30F1008
66 F3 F2 64 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float64 fs: enc=64F20F1008
66 F2 66 64 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float64 fs: enc=64F20F1008
66 F2 F3 64 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float32 fs: enc=64F30F1008
66 F2 F2 64 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float64 fs: enc=64F20F1008
F3 66 66 64 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float32 fs: enc=64F30F1008
F3 66 F3 64 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float32 fs: enc=64F30F1008
F3 66 F2 64 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float64 fs: enc=64F20F1008
F3 F3 66 64 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float32 fs: enc=64F30F1008
F3 F3 F3 64 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float32 fs: enc=64F30F1008
F3 F3 F2 64 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float64 fs: enc=64F20F1008
F3 F2 66 64 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float64 fs: enc=64F20F1008
F3 F2 F3 64 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float32 fs: enc=64F30F1008
F3 F2 F2 64 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float64 fs: enc=64F20F1008
F2 66 66 64 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float64 fs: enc=64F20F1008
F2 66 F3 64 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float32 fs: enc=64F30F1008
F2 66 F2 64 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float64 fs: enc=64F20F1008
F2 F3 66 64 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float32 fs: enc=64F30F1008
F2 F3 F3 64 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float32 fs: enc=64F30F1008
F2 F3 F2 64 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float64 fs: enc=64F20F1008
F2 F2 66 64 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float64 fs: enc=64F20F1008
F2 F2 F3 64 0F10 08, Movss_xmm_xmmm32, Movss, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float32 fs: enc=64F30F1008
F2 F2 F2 64 0F10 08, Movsd_xmm_xmmm64, Movsd, 2, op0=r;xmm1 op1=m;fs;rax;;1;0;0;Float64 fs: enc=64F20F1008

# prefix: double 66
66 66 01 CE, Add_rm16_r16, Add, 2, op0=r;si op1=r;cx enc=6601CE

# prefix: double 67
67 67 8D 18, Lea_r32_m, Lea, 2, op0=r;ebx op1=m;ds;eax;;1;0;0;Unknown enc=678D18

# prefix: extra segment prefixes
26 26 01 18, Add_rm32_r32, Add, 2, op0=m;es;rax;;1;0;0;UInt32 op1=r;ebx es: enc=260118
26 2E 01 18, Add_rm32_r32, Add, 2, op0=m;cs;rax;;1;0;0;UInt32 op1=r;ebx cs: enc=2E0118
26 36 01 18, Add_rm32_r32, Add, 2, op0=m;ss;rax;;1;0;0;UInt32 op1=r;ebx ss: enc=360118
26 3E 01 18, Add_rm32_r32, Add, 2, op0=m;ds;rax;;1;0;0;UInt32 op1=r;ebx ds: enc=3E0118
26 64 01 18, Add_rm32_r32, Add, 2, op0=m;fs;rax;;1;0;0;UInt32 op1=r;ebx fs: enc=640118
26 65 01 18, Add_rm32_r32, Add, 2, op0=m;gs;rax;;1;0;0;UInt32 op1=r;ebx gs: enc=650118

2E 26 01 18, Add_rm32_r32, Add, 2, op0=m;es;rax;;1;0;0;UInt32 op1=r;ebx es: enc=260118
2E 2E 01 18, Add_rm32_r32, Add, 2, op0=m;cs;rax;;1;0;0;UInt32 op1=r;ebx cs: enc=2E0118
2E 36 01 18, Add_rm32_r32, Add, 2, op0=m;ss;rax;;1;0;0;UInt32 op1=r;ebx ss: enc=360118
2E 3E 01 18, Add_rm32_r32, Add, 2, op0=m;ds;rax;;1;0;0;UInt32 op1=r;ebx ds: enc=3E0118
2E 64 01 18, Add_rm32_r32, Add, 2, op0=m;fs;rax;;1;0;0;UInt32 op1=r;ebx fs: enc=640118
2E 65 01 18, Add_rm32_r32, Add, 2, op0=m;gs;rax;;1;0;0;UInt32 op1=r;ebx gs: enc=650118

36 26 01 18, Add_rm32_r32, Add, 2, op0=m;es;rax;;1;0;0;UInt32 op1=r;ebx es: enc=260118
36 2E 01 18, Add_rm32_r32, Add, 2, op0=m;cs;rax;;1;0;0;UInt32 op1=r;ebx cs: enc=2E0118
36 36 01 18, Add_rm32_r32, Add, 2, op0=m;ss;rax;;1;0;0;UInt32 op1=r;ebx ss: enc=360118
36 3E 01 18, Add_rm32_r32, Add, 2, op0=m;ds;rax;;1;0;0;UInt32 op1=r;ebx ds: enc=3E0118
36 64 01 18, Add_rm32_r32, Add, 2, op0=m;fs;rax;;1;0;0;UInt32 op1=r;ebx fs: enc=640118
36 65 01 18, Add_rm32_r32, Add, 2, op0=m;gs;rax;;1;0;0;UInt32 op1=r;ebx gs: enc=650118

3E 26 01 18, Add_rm32_r32, Add, 2, op0=m;es;rax;;1;0;0;UInt32 op1=r;ebx es: enc=260118
3E 2E 01 18, Add_rm32_r32, Add, 2, op0=m;cs;rax;;1;0;0;UInt32 op1=r;ebx cs: enc=2E0118
3E 36 01 18, Add_rm32_r32, Add, 2, op0=m;ss;rax;;1;0;0;UInt32 op1=r;ebx ss: enc=360118
3E 3E 01 18, Add_rm32_r32, Add, 2, op0=m;ds;rax;;1;0;0;UInt32 op1=r;ebx ds: enc=3E0118
3E 64 01 18, Add_rm32_r32, Add, 2, op0=m;fs;rax;;1;0;0;UInt32 op1=r;ebx fs: enc=640118
3E 65 01 18, Add_rm32_r32, Add, 2, op0=m;gs;rax;;1;0;0;UInt32 op1=r;ebx gs: enc=650118

64 26 01 18, Add_rm32_r32, Add, 2, op0=m;fs;rax;;1;0;0;UInt32 op1=r;ebx fs: enc=640118
64 2E 01 18, Add_rm32_r32, Add, 2, op0=m;fs;rax;;1;0;0;UInt32 op1=r;ebx fs: enc=640118
64 36 01 18, Add_rm32_r32, Add, 2, op0=m;fs;rax;;1;0;0;UInt32 op1=r;ebx fs: enc=640118
64 3E 01 18, Add_rm32_r32, Add, 2, op0=m;fs;rax;;1;0;0;UInt32 op1=r;ebx fs: enc=640118
64 64 01 18, Add_rm32_r32, Add, 2, op0=m;fs;rax;;1;0;0;UInt32 op1=r;ebx fs: enc=640118
64 65 01 18, Add_rm32_r32, Add, 2, op0=m;gs;rax;;1;0;0;UInt32 op1=r;ebx gs: enc=650118

65 26 01 18, Add_rm32_r32, Add, 2, op0=m;gs;rax;;1;0;0;UInt32 op1=r;ebx gs: enc=650118
65 2E 01 18, Add_rm32_r32, Add, 2, op0=m;gs;rax;;1;0;0;UInt32 op1=r;ebx gs: enc=650118
65 36 01 18, Add_rm32_r32, Add, 2, op0=m;gs;rax;;1;0;0;UInt32 op1=r;ebx gs: enc=650118
65 3E 01 18, Add_rm32_r32, Add, 2, op0=m;gs;rax;;1;0;0;UInt32 op1=r;ebx gs: enc=650118
65 64 01 18, Add_rm32_r32, Add, 2, op0=m;fs;rax;;1;0;0;UInt32 op1=r;ebx fs: enc=640118
65 65 01 18, Add_rm32_r32, Add, 2, op0=m;gs;rax;;1;0;0;UInt32 op1=r;ebx gs: enc=650118

# prefix: REX without W + 66
66 40 01 CE, Add_rm16_r16, Add, 2, op0=r;si op1=r;cx enc=6601CE
66 47 40 01 CE, Add_rm16_r16, Add, 2, op0=r;si op1=r;cx enc=6601CE
66 4F 40 01 CE, Add_rm16_r16, Add, 2, op0=r;si op1=r;cx enc=6601CE

# prefix: REX.W overrides 66
66 48 01 CE, Add_rm64_r64, Add, 2, op0=r;rsi op1=r;rcx enc=4801CE

# prefix: double REX prefixes
4F 40 01 CE, Add_rm32_r32, Add, 2, op0=r;esi op1=r;ecx enc=01CE
4F 48 01 CE, Add_rm64_r64, Add, 2, op0=r;rsi op1=r;rcx enc=4801CE
4F 4C 01 C5, Add_rm64_r64, Add, 2, op0=r;rbp op1=r;r8 enc=4C01C5
4F 49 01 D6, Add_rm64_r64, Add, 2, op0=r;r14 op1=r;rdx enc=4901D6
4F 4D 01 D0, Add_rm64_r64, Add, 2, op0=r;r8 op1=r;r10 enc=4D01D0
4F 49 01 D9, Add_rm64_r64, Add, 2, op0=r;r9 op1=r;rbx enc=4901D9
4F 4C 01 EC, Add_rm64_r64, Add, 2, op0=r;rsp op1=r;r13 enc=4C01EC

# prefix: REX prefix before 66
48 66 01 CE, Add_rm16_r16, Add, 2, op0=r;si op1=r;cx enc=6601CE
4F 66 01 CE, Add_rm16_r16, Add, 2, op0=r;si op1=r;cx enc=6601CE

# prefix: REX prefix before 67
48 67 01 18, Add_rm32_r32, Add, 2, op0=m;ds;eax;;1;0;0;UInt32 op1=r;ebx enc=670118

# prefix: REX prefix before F0
49 F0 01 18, Add_rm32_r32, Add, 2, op0=m;ds;rax;;1;0;0;UInt32 op1=r;ebx lock enc=F00118

# prefix: REX prefix before F2
4D F2 01 18, Add_rm32_r32, Add, 2, op0=m;ds;rax;;1;0;0;UInt32 op1=r;ebx repne enc=F20118

# prefix: REX prefix before F3
4F F3 01 18, Add_rm32_r32, Add, 2, op0=m;ds;rax;;1;0;0;UInt32 op1=r;ebx rep enc=F30118

# prefix: REX prefix before segment override
48 26 01 18, Add_rm32_r32, Add, 2, op0=m;es;rax;;1;0;0;UInt32 op1=r;ebx es: enc=260118
49 2E 01 18, Add_rm32_r32, Add, 2, op0=m;cs;rax;;1;0;0;UInt32 op1=r;ebx cs: enc=2E0118
4A 36 01 18, Add_rm32_r32, Add, 2, op0=m;ss;rax;;1;0;0;UInt32 op1=r;ebx ss: enc=360118
4B 3E 01 18, Add_rm32_r32, Add, 2, op0=m;ds;rax;;1;0;0;UInt32 op1=r;ebx ds: enc=3E0118
4C 64 01 18, Add_rm32_r32, Add, 2, op0=m;fs;rax;;1;0;0;UInt32 op1=r;ebx fs: enc=640118
4F 65 01 18, Add_rm32_r32, Add, 2, op0=m;gs;rax;;1;0;0;UInt32 op1=r;ebx gs: enc=650118

# eip/rip
01 0D 34125AA5, Add_rm32_r32, Add, 2, op0=m;ds;rip;;1;0xFFFFFFFFA55A123A;8;UInt32 op1=r;ecx co=0;0;0;0;2;4 ip=0
01 0D 12345678, Add_rm32_r32, Add, 2, op0=m;ds;rip;;1;0x78563408;8;UInt32 op1=r;ecx co=0;0;0;0;2;4 ip=0xFFFFFFFFFFFFFFF0
67 01 0D 34125AA5, Add_rm32_r32, Add, 2, op0=m;ds;eip;;1;0xA55A123B;4;UInt32 op1=r;ecx co=0;0;0;0;3;4 ip=0
67 01 0D 12345678, Add_rm32_r32, Add, 2, op0=m;ds;eip;;1;0x78563409;4;UInt32 op1=r;ecx co=0;0;0;0;3;4 ip=0xFFFFFFFFFFFFFFF0
67 01 0D 12345678, Add_rm32_r32, Add, 2, op0=m;ds;eip;;1;0x78563409;4;UInt32 op1=r;ecx co=0;0;0;0;3;4 ip=0xFFFFFFF0

# lock sub [rip-5AA5EDCCh],eax
F0 29 05 34125AA5, Sub_rm32_r32, Sub, 2, op0=m;ds;rip;;1;0x7FFFFFFFA55A122B;8;UInt32 op1=r;eax lock co=0;0;0;0;3;4
# lock cmp [rip-5AA5EDCCh],eax
F0 39 05 34125AA5, INVALID, INVALID, 0, code=Cmp_rm32_r32
# lock add dword ptr [rip-5AA5EDCCh],??BCDEF0h
F0 81 05 34125AA5 F0DEBC, INVALID, INVALID, 0, code=Add_rm32_imm32 err=NoMoreBytes
# add dword ptr [rip-5AA5EDCCh],??BCDEF0h
81 05 34125AA5 F0DEBC, INVALID, INVALID, 0, code=Add_rm32_imm32 err=NoMoreBytes
# lock mov cs,[rip-5AA5EDCCh]
F0 8E 0D 34125AA5, INVALID, INVALID, 0, code=Mov_Sreg_r32m16
# mov cs,[rip-5AA5EDCCh]
8E 0D 34125AA5, INVALID, INVALID, 0, code=Mov_Sreg_r32m16

# Decoder/encoder ip overflow test
01 CE, Add_rm32_r32, Add, 2, op0=r;esi op1=r;ecx ip=0xFFFFFFFFFFFFFFFE
01 CE, Add_rm32_r32, Add, 2, op0=r;esi op1=r;ecx ip=0xFFFFFFFFFFFFFFFF

# Verify that the decoder clears extra_index_register_base_vsib in decode(). The order of these two test cases is important!
62 D27D43 C6 4C 8E 01, EVEX_Vgatherpf0dps_vm32z_k1, Vgatherpf0dps, 1, op0=m;ds;r14;zmm17;4;4;1;Float32 k3 vsib32 co=0;0;0;0;7;1
C4E209 90 4C A1 01, VEX_Vpgatherdd_xmm_vm32x_xmm, Vpgatherdd, 3, op0=r;xmm1 op1=m;ds;rcx;xmm4;4;1;1;Int32 op2=r;xmm14 vsib32 co=0;0;0;0;6;1
