# SPDX-License-Identifier: MIT
# Copyright (C) 2018-present iced project and contributors

# invalid instruction
26262626262626262626262626262626, INVALID, Legacy, INTEL8086, flow=Exception
# add dh,cl
00 CE, Add_rm8_r8, Legacy, INTEL8086, fw=oszacp op0=rw op1=r rw=dh r=cl
# add [rax],bh
00 38, Add_rm8_r8, Legacy, INTEL8086, fw=oszacp op0=rw op1=r r=rax r=bh rwm=ds:rax;UInt8
# add si,cx
66 01 CE, Add_rm16_r16, Legacy, INTEL8086, fw=oszacp op0=rw op1=r rw=si r=cx
# add [rax],bx
66 01 18, Add_rm16_r16, Legacy, INTEL8086, fw=oszacp op0=rw op1=r r=rax r=bx rwm=ds:rax;UInt16
# add esi,ecx
01 CE, Add_rm32_r32, Legacy, INTEL386, fw=oszacp op0=rw op1=r w=rsi r=esi r=ecx
# add [rax],ebx
01 18, Add_rm32_r32, Legacy, INTEL386, fw=oszacp op0=rw op1=r r=rax r=ebx rwm=ds:rax;UInt32
# add rsi,rcx
48 01 CE, Add_rm64_r64, Legacy, X64, fw=oszacp op0=rw op1=r rw=rsi r=rcx
# add [rax],rbx
48 01 18, Add_rm64_r64, Legacy, X64, fw=oszacp op0=rw op1=r r=rax r=rbx rwm=ds:rax;UInt64
# add cl,dh
02 CE, Add_r8_rm8, Legacy, INTEL8086, fw=oszacp op0=rw op1=r rw=cl r=dh
# add bh,[rax]
02 38, Add_r8_rm8, Legacy, INTEL8086, fw=oszacp op0=rw op1=r rw=bh r=rax rm=ds:rax;UInt8
# add cx,si
66 03 CE, Add_r16_rm16, Legacy, INTEL8086, fw=oszacp op0=rw op1=r rw=cx r=si
# add bx,[rax]
66 03 18, Add_r16_rm16, Legacy, INTEL8086, fw=oszacp op0=rw op1=r rw=bx r=rax rm=ds:rax;UInt16
# add ecx,esi
03 CE, Add_r32_rm32, Legacy, INTEL386, fw=oszacp op0=rw op1=r w=rcx r=ecx r=esi
# add ebx,[rax]
03 18, Add_r32_rm32, Legacy, INTEL386, fw=oszacp op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt32
# add rcx,rsi
48 03 CE, Add_r64_rm64, Legacy, X64, fw=oszacp op0=rw op1=r rw=rcx r=rsi
# add rbx,[rax]
48 03 18, Add_r64_rm64, Legacy, X64, fw=oszacp op0=rw op1=r rw=rbx r=rax rm=ds:rax;UInt64
# add al,0A5h
04 A5, Add_AL_imm8, Legacy, INTEL8086, fw=oszacp op0=rw op1=r rw=al
# add ax,5AA5h
66 05 A55A, Add_AX_imm16, Legacy, INTEL8086, fw=oszacp op0=rw op1=r rw=ax
# add eax,12345AA5h
05 A55A3412, Add_EAX_imm32, Legacy, INTEL386, fw=oszacp op0=rw op1=r w=rax r=eax
# add rax,0FFFFFFFFA2345AA5h
48 05 A55A34A2, Add_RAX_imm32, Legacy, X64, fw=oszacp op0=rw op1=r rw=rax
# or dh,cl
08 CE, Or_rm8_r8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=dh r=cl
# or [rax],bh
08 38, Or_rm8_r8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r r=rax r=bh rwm=ds:rax;UInt8
# or si,cx
66 09 CE, Or_rm16_r16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=si r=cx
# or [rax],bx
66 09 18, Or_rm16_r16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r r=rax r=bx rwm=ds:rax;UInt16
# or esi,ecx
09 CE, Or_rm32_r32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r w=rsi r=esi r=ecx
# or [rax],ebx
09 18, Or_rm32_r32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r r=rax r=ebx rwm=ds:rax;UInt32
# or rsi,rcx
48 09 CE, Or_rm64_r64, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r rw=rsi r=rcx
# or [rax],rbx
48 09 18, Or_rm64_r64, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r r=rax r=rbx rwm=ds:rax;UInt64
# or cl,dh
0A CE, Or_r8_rm8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=cl r=dh
# or bh,[rax]
0A 38, Or_r8_rm8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=bh r=rax rm=ds:rax;UInt8
# or cx,si
66 0B CE, Or_r16_rm16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=cx r=si
# or bx,[rax]
66 0B 18, Or_r16_rm16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=bx r=rax rm=ds:rax;UInt16
# or ecx,esi
0B CE, Or_r32_rm32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r w=rcx r=ecx r=esi
# or ebx,[rax]
0B 18, Or_r32_rm32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt32
# or rcx,rsi
48 0B CE, Or_r64_rm64, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r rw=rcx r=rsi
# or rbx,[rax]
48 0B 18, Or_r64_rm64, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r rw=rbx r=rax rm=ds:rax;UInt64
# or al,0A5h
0C A5, Or_AL_imm8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=al
# or ax,5AA5h
66 0D A55A, Or_AX_imm16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=ax
# or eax,12345AA5h
0D A55A3412, Or_EAX_imm32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r w=rax r=eax
# or rax,0FFFFFFFFA2345AA5h
48 0D A55A34A2, Or_RAX_imm32, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r rw=rax
# adc dh,cl
10 CE, Adc_rm8_r8, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r rw=dh r=cl
# adc [rax],bh
10 38, Adc_rm8_r8, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r r=rax r=bh rwm=ds:rax;UInt8
# adc si,cx
66 11 CE, Adc_rm16_r16, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r rw=si r=cx
# adc [rax],bx
66 11 18, Adc_rm16_r16, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r r=rax r=bx rwm=ds:rax;UInt16
# adc esi,ecx
11 CE, Adc_rm32_r32, Legacy, INTEL386, fr=c fw=oszacp op0=rw op1=r w=rsi r=esi r=ecx
# adc [rax],ebx
11 18, Adc_rm32_r32, Legacy, INTEL386, fr=c fw=oszacp op0=rw op1=r r=rax r=ebx rwm=ds:rax;UInt32
# adc rsi,rcx
48 11 CE, Adc_rm64_r64, Legacy, X64, fr=c fw=oszacp op0=rw op1=r rw=rsi r=rcx
# adc [rax],rbx
48 11 18, Adc_rm64_r64, Legacy, X64, fr=c fw=oszacp op0=rw op1=r r=rax r=rbx rwm=ds:rax;UInt64
# adc cl,dh
12 CE, Adc_r8_rm8, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r rw=cl r=dh
# adc bh,[rax]
12 38, Adc_r8_rm8, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r rw=bh r=rax rm=ds:rax;UInt8
# adc cx,si
66 13 CE, Adc_r16_rm16, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r rw=cx r=si
# adc bx,[rax]
66 13 18, Adc_r16_rm16, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r rw=bx r=rax rm=ds:rax;UInt16
# adc ecx,esi
13 CE, Adc_r32_rm32, Legacy, INTEL386, fr=c fw=oszacp op0=rw op1=r w=rcx r=ecx r=esi
# adc ebx,[rax]
13 18, Adc_r32_rm32, Legacy, INTEL386, fr=c fw=oszacp op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt32
# adc rcx,rsi
48 13 CE, Adc_r64_rm64, Legacy, X64, fr=c fw=oszacp op0=rw op1=r rw=rcx r=rsi
# adc rbx,[rax]
48 13 18, Adc_r64_rm64, Legacy, X64, fr=c fw=oszacp op0=rw op1=r rw=rbx r=rax rm=ds:rax;UInt64
# adc al,0A5h
14 A5, Adc_AL_imm8, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r rw=al
# adc ax,5AA5h
66 15 A55A, Adc_AX_imm16, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r rw=ax
# adc eax,12345AA5h
15 A55A3412, Adc_EAX_imm32, Legacy, INTEL386, fr=c fw=oszacp op0=rw op1=r w=rax r=eax
# adc rax,0FFFFFFFFA2345AA5h
48 15 A55A34A2, Adc_RAX_imm32, Legacy, X64, fr=c fw=oszacp op0=rw op1=r rw=rax
# sbb dh,cl
18 CE, Sbb_rm8_r8, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r rw=dh r=cl
# sbb [rax],bh
18 38, Sbb_rm8_r8, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r r=rax r=bh rwm=ds:rax;UInt8
# sbb si,cx
66 19 CE, Sbb_rm16_r16, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r rw=si r=cx
# sbb [rax],bx
66 19 18, Sbb_rm16_r16, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r r=rax r=bx rwm=ds:rax;UInt16
# sbb esi,ecx
19 CE, Sbb_rm32_r32, Legacy, INTEL386, fr=c fw=oszacp op0=rw op1=r w=rsi r=esi r=ecx
# sbb [rax],ebx
19 18, Sbb_rm32_r32, Legacy, INTEL386, fr=c fw=oszacp op0=rw op1=r r=rax r=ebx rwm=ds:rax;UInt32
# sbb rsi,rcx
48 19 CE, Sbb_rm64_r64, Legacy, X64, fr=c fw=oszacp op0=rw op1=r rw=rsi r=rcx
# sbb [rax],rbx
48 19 18, Sbb_rm64_r64, Legacy, X64, fr=c fw=oszacp op0=rw op1=r r=rax r=rbx rwm=ds:rax;UInt64
# sbb cl,dh
1A CE, Sbb_r8_rm8, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r rw=cl r=dh
# sbb bh,[rax]
1A 38, Sbb_r8_rm8, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r rw=bh r=rax rm=ds:rax;UInt8
# sbb cx,si
66 1B CE, Sbb_r16_rm16, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r rw=cx r=si
# sbb bx,[rax]
66 1B 18, Sbb_r16_rm16, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r rw=bx r=rax rm=ds:rax;UInt16
# sbb ecx,esi
1B CE, Sbb_r32_rm32, Legacy, INTEL386, fr=c fw=oszacp op0=rw op1=r w=rcx r=ecx r=esi
# sbb ebx,[rax]
1B 18, Sbb_r32_rm32, Legacy, INTEL386, fr=c fw=oszacp op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt32
# sbb rcx,rsi
48 1B CE, Sbb_r64_rm64, Legacy, X64, fr=c fw=oszacp op0=rw op1=r rw=rcx r=rsi
# sbb rbx,[rax]
48 1B 18, Sbb_r64_rm64, Legacy, X64, fr=c fw=oszacp op0=rw op1=r rw=rbx r=rax rm=ds:rax;UInt64
# sbb al,0A5h
1C A5, Sbb_AL_imm8, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r rw=al
# sbb ax,5AA5h
66 1D A55A, Sbb_AX_imm16, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r rw=ax
# sbb eax,12345AA5h
1D A55A3412, Sbb_EAX_imm32, Legacy, INTEL386, fr=c fw=oszacp op0=rw op1=r w=rax r=eax
# sbb rax,0FFFFFFFFA2345AA5h
48 1D A55A34A2, Sbb_RAX_imm32, Legacy, X64, fr=c fw=oszacp op0=rw op1=r rw=rax
# and dh,cl
20 CE, And_rm8_r8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=dh r=cl
# and [rax],bh
20 38, And_rm8_r8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r r=rax r=bh rwm=ds:rax;UInt8
# and si,cx
66 21 CE, And_rm16_r16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=si r=cx
# and [rax],bx
66 21 18, And_rm16_r16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r r=rax r=bx rwm=ds:rax;UInt16
# and esi,ecx
21 CE, And_rm32_r32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r w=rsi r=esi r=ecx
# and [rax],ebx
21 18, And_rm32_r32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r r=rax r=ebx rwm=ds:rax;UInt32
# and rsi,rcx
48 21 CE, And_rm64_r64, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r rw=rsi r=rcx
# and [rax],rbx
48 21 18, And_rm64_r64, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r r=rax r=rbx rwm=ds:rax;UInt64
# and cl,dh
22 CE, And_r8_rm8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=cl r=dh
# and bh,[rax]
22 38, And_r8_rm8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=bh r=rax rm=ds:rax;UInt8
# and cx,si
66 23 CE, And_r16_rm16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=cx r=si
# and bx,[rax]
66 23 18, And_r16_rm16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=bx r=rax rm=ds:rax;UInt16
# and ecx,esi
23 CE, And_r32_rm32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r w=rcx r=ecx r=esi
# and ebx,[rax]
23 18, And_r32_rm32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt32
# and rcx,rsi
48 23 CE, And_r64_rm64, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r rw=rcx r=rsi
# and rbx,[rax]
48 23 18, And_r64_rm64, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r rw=rbx r=rax rm=ds:rax;UInt64
# and al,0A5h
24 A5, And_AL_imm8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=al
# and ax,5AA5h
66 25 A55A, And_AX_imm16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=ax
# and eax,12345AA5h
25 A55A3412, And_EAX_imm32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r w=rax r=eax
# and rax,0FFFFFFFFA2345AA5h
48 25 A55A34A2, And_RAX_imm32, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r rw=rax
# sub dh,cl
28 CE, Sub_rm8_r8, Legacy, INTEL8086, fw=oszacp op0=rw op1=r rw=dh r=cl
# sub [rax],bh
28 38, Sub_rm8_r8, Legacy, INTEL8086, fw=oszacp op0=rw op1=r r=rax r=bh rwm=ds:rax;UInt8
# sub si,cx
66 29 CE, Sub_rm16_r16, Legacy, INTEL8086, fw=oszacp op0=rw op1=r rw=si r=cx
# sub [rax],bx
66 29 18, Sub_rm16_r16, Legacy, INTEL8086, fw=oszacp op0=rw op1=r r=rax r=bx rwm=ds:rax;UInt16
# sub esi,ecx
29 CE, Sub_rm32_r32, Legacy, INTEL386, fw=oszacp op0=rw op1=r w=rsi r=esi r=ecx
# sub [rax],ebx
29 18, Sub_rm32_r32, Legacy, INTEL386, fw=oszacp op0=rw op1=r r=rax r=ebx rwm=ds:rax;UInt32
# sub rsi,rcx
48 29 CE, Sub_rm64_r64, Legacy, X64, fw=oszacp op0=rw op1=r rw=rsi r=rcx
# sub [rax],rbx
48 29 18, Sub_rm64_r64, Legacy, X64, fw=oszacp op0=rw op1=r r=rax r=rbx rwm=ds:rax;UInt64
# sub cl,dh
2A CE, Sub_r8_rm8, Legacy, INTEL8086, fw=oszacp op0=rw op1=r rw=cl r=dh
# sub bh,[rax]
2A 38, Sub_r8_rm8, Legacy, INTEL8086, fw=oszacp op0=rw op1=r rw=bh r=rax rm=ds:rax;UInt8
# sub cx,si
66 2B CE, Sub_r16_rm16, Legacy, INTEL8086, fw=oszacp op0=rw op1=r rw=cx r=si
# sub bx,[rax]
66 2B 18, Sub_r16_rm16, Legacy, INTEL8086, fw=oszacp op0=rw op1=r rw=bx r=rax rm=ds:rax;UInt16
# sub ecx,esi
2B CE, Sub_r32_rm32, Legacy, INTEL386, fw=oszacp op0=rw op1=r w=rcx r=ecx r=esi
# sub ebx,[rax]
2B 18, Sub_r32_rm32, Legacy, INTEL386, fw=oszacp op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt32
# sub rcx,rsi
48 2B CE, Sub_r64_rm64, Legacy, X64, fw=oszacp op0=rw op1=r rw=rcx r=rsi
# sub rbx,[rax]
48 2B 18, Sub_r64_rm64, Legacy, X64, fw=oszacp op0=rw op1=r rw=rbx r=rax rm=ds:rax;UInt64
# sub al,0A5h
2C A5, Sub_AL_imm8, Legacy, INTEL8086, fw=oszacp op0=rw op1=r rw=al
# sub ax,5AA5h
66 2D A55A, Sub_AX_imm16, Legacy, INTEL8086, fw=oszacp op0=rw op1=r rw=ax
# sub eax,12345AA5h
2D A55A3412, Sub_EAX_imm32, Legacy, INTEL386, fw=oszacp op0=rw op1=r w=rax r=eax
# sub rax,0FFFFFFFFA2345AA5h
48 2D A55A34A2, Sub_RAX_imm32, Legacy, X64, fw=oszacp op0=rw op1=r rw=rax
# xor dh,cl
30 CE, Xor_rm8_r8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=dh r=cl
# xor [rax],bh
30 38, Xor_rm8_r8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r r=rax r=bh rwm=ds:rax;UInt8
# xor si,cx
66 31 CE, Xor_rm16_r16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=si r=cx
# xor [rax],bx
66 31 18, Xor_rm16_r16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r r=rax r=bx rwm=ds:rax;UInt16
# xor esi,ecx
31 CE, Xor_rm32_r32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r w=rsi r=esi r=ecx
# xor [rax],ebx
31 18, Xor_rm32_r32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r r=rax r=ebx rwm=ds:rax;UInt32
# xor rsi,rcx
48 31 CE, Xor_rm64_r64, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r rw=rsi r=rcx
# xor [rax],rbx
48 31 18, Xor_rm64_r64, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r r=rax r=rbx rwm=ds:rax;UInt64
# xor cl,dh
32 CE, Xor_r8_rm8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=cl r=dh
# xor bh,[rax]
32 38, Xor_r8_rm8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=bh r=rax rm=ds:rax;UInt8
# xor cx,si
66 33 CE, Xor_r16_rm16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=cx r=si
# xor bx,[rax]
66 33 18, Xor_r16_rm16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=bx r=rax rm=ds:rax;UInt16
# xor ecx,esi
33 CE, Xor_r32_rm32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r w=rcx r=ecx r=esi
# xor ebx,[rax]
33 18, Xor_r32_rm32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt32
# xor rcx,rsi
48 33 CE, Xor_r64_rm64, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r rw=rcx r=rsi
# xor rbx,[rax]
48 33 18, Xor_r64_rm64, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r rw=rbx r=rax rm=ds:rax;UInt64
# xor al,0A5h
34 A5, Xor_AL_imm8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=al
# xor ax,5AA5h
66 35 A55A, Xor_AX_imm16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=ax
# xor eax,12345AA5h
35 A55A3412, Xor_EAX_imm32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r w=rax r=eax
# xor rax,0FFFFFFFFA2345AA5h
48 35 A55A34A2, Xor_RAX_imm32, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r rw=rax
# cmp dh,cl
38 CE, Cmp_rm8_r8, Legacy, INTEL8086, fw=oszacp op0=r op1=r r=dh r=cl
# cmp [rax],bh
38 38, Cmp_rm8_r8, Legacy, INTEL8086, fw=oszacp op0=r op1=r r=rax r=bh rm=ds:rax;UInt8
# cmp si,cx
66 39 CE, Cmp_rm16_r16, Legacy, INTEL8086, fw=oszacp op0=r op1=r r=si r=cx
# cmp [rax],bx
66 39 18, Cmp_rm16_r16, Legacy, INTEL8086, fw=oszacp op0=r op1=r r=rax r=bx rm=ds:rax;UInt16
# cmp esi,ecx
39 CE, Cmp_rm32_r32, Legacy, INTEL386, fw=oszacp op0=r op1=r r=esi r=ecx
# cmp [rax],ebx
39 18, Cmp_rm32_r32, Legacy, INTEL386, fw=oszacp op0=r op1=r r=rax r=ebx rm=ds:rax;UInt32
# cmp rsi,rcx
48 39 CE, Cmp_rm64_r64, Legacy, X64, fw=oszacp op0=r op1=r r=rsi r=rcx
# cmp [rax],rbx
48 39 18, Cmp_rm64_r64, Legacy, X64, fw=oszacp op0=r op1=r r=rax r=rbx rm=ds:rax;UInt64
# cmp cl,dh
3A CE, Cmp_r8_rm8, Legacy, INTEL8086, fw=oszacp op0=r op1=r r=cl r=dh
# cmp bh,[rax]
3A 38, Cmp_r8_rm8, Legacy, INTEL8086, fw=oszacp op0=r op1=r r=bh r=rax rm=ds:rax;UInt8
# cmp cx,si
66 3B CE, Cmp_r16_rm16, Legacy, INTEL8086, fw=oszacp op0=r op1=r r=cx r=si
# cmp bx,[rax]
66 3B 18, Cmp_r16_rm16, Legacy, INTEL8086, fw=oszacp op0=r op1=r r=bx r=rax rm=ds:rax;UInt16
# cmp ecx,esi
3B CE, Cmp_r32_rm32, Legacy, INTEL386, fw=oszacp op0=r op1=r r=ecx r=esi
# cmp ebx,[rax]
3B 18, Cmp_r32_rm32, Legacy, INTEL386, fw=oszacp op0=r op1=r r=ebx r=rax rm=ds:rax;UInt32
# cmp rcx,rsi
48 3B CE, Cmp_r64_rm64, Legacy, X64, fw=oszacp op0=r op1=r r=rcx r=rsi
# cmp rbx,[rax]
48 3B 18, Cmp_r64_rm64, Legacy, X64, fw=oszacp op0=r op1=r r=rbx r=rax rm=ds:rax;UInt64
# cmp al,0A5h
3C A5, Cmp_AL_imm8, Legacy, INTEL8086, fw=oszacp op0=r op1=r r=al
# cmp ax,5AA5h
66 3D A55A, Cmp_AX_imm16, Legacy, INTEL8086, fw=oszacp op0=r op1=r r=ax
# cmp eax,12345AA5h
3D A55A3412, Cmp_EAX_imm32, Legacy, INTEL386, fw=oszacp op0=r op1=r r=eax
# cmp rax,0FFFFFFFFA2345AA5h
48 3D A55A34A2, Cmp_RAX_imm32, Legacy, X64, fw=oszacp op0=r op1=r r=rax
# push ax
66 50, Push_r16, Legacy, INTEL8086, op0=r rw=xsp r=ax wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 stack=-2
# push r8w
66 41 50, Push_r16, Legacy, INTEL8086, op0=r rw=xsp r=r8w wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 stack=-2
# push rax
50, Push_r64, Legacy, X64, op0=r rw=xsp r=rax wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# push r8
41 50, Push_r64, Legacy, X64, op0=r rw=xsp r=r8 wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# push cx
66 51, Push_r16, Legacy, INTEL8086, op0=r rw=xsp r=cx wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 stack=-2
# push r9w
66 41 51, Push_r16, Legacy, INTEL8086, op0=r rw=xsp r=r9w wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 stack=-2
# push rcx
51, Push_r64, Legacy, X64, op0=r rw=xsp r=rcx wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# push r9
41 51, Push_r64, Legacy, X64, op0=r rw=xsp r=r9 wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# push dx
66 52, Push_r16, Legacy, INTEL8086, op0=r rw=xsp r=dx wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 stack=-2
# push r10w
66 41 52, Push_r16, Legacy, INTEL8086, op0=r rw=xsp r=r10w wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 stack=-2
# push rdx
52, Push_r64, Legacy, X64, op0=r rw=xsp r=rdx wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# push r10
41 52, Push_r64, Legacy, X64, op0=r rw=xsp r=r10 wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# push bx
66 53, Push_r16, Legacy, INTEL8086, op0=r rw=xsp r=bx wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 stack=-2
# push r11w
66 41 53, Push_r16, Legacy, INTEL8086, op0=r rw=xsp r=r11w wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 stack=-2
# push rbx
53, Push_r64, Legacy, X64, op0=r rw=xsp r=rbx wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# push r11
41 53, Push_r64, Legacy, X64, op0=r rw=xsp r=r11 wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# push sp
66 54, Push_r16, Legacy, INTEL8086, op0=r rw=xsp r=sp wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 stack=-2
# push r12w
66 41 54, Push_r16, Legacy, INTEL8086, op0=r rw=xsp r=r12w wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 stack=-2
# push rsp
54, Push_r64, Legacy, X64, op0=r rw=xsp r=rsp wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# push r12
41 54, Push_r64, Legacy, X64, op0=r rw=xsp r=r12 wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# push bp
66 55, Push_r16, Legacy, INTEL8086, op0=r rw=xsp r=bp wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 stack=-2
# push r13w
66 41 55, Push_r16, Legacy, INTEL8086, op0=r rw=xsp r=r13w wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 stack=-2
# push rbp
55, Push_r64, Legacy, X64, op0=r rw=xsp r=rbp wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# push r13
41 55, Push_r64, Legacy, X64, op0=r rw=xsp r=r13 wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# push si
66 56, Push_r16, Legacy, INTEL8086, op0=r rw=xsp r=si wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 stack=-2
# push r14w
66 41 56, Push_r16, Legacy, INTEL8086, op0=r rw=xsp r=r14w wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 stack=-2
# push rsi
56, Push_r64, Legacy, X64, op0=r rw=xsp r=rsi wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# push r14
41 56, Push_r64, Legacy, X64, op0=r rw=xsp r=r14 wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# push di
66 57, Push_r16, Legacy, INTEL8086, op0=r rw=xsp r=di wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 stack=-2
# push r15w
66 41 57, Push_r16, Legacy, INTEL8086, op0=r rw=xsp r=r15w wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 stack=-2
# push rdi
57, Push_r64, Legacy, X64, op0=r rw=xsp r=rdi wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# push r15
41 57, Push_r64, Legacy, X64, op0=r rw=xsp r=r15 wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# pop ax
66 58, Pop_r16, Legacy, INTEL8086, op0=w rw=xsp w=ax rm=ss:xsp;UInt16 stack=2
# pop r8w
66 41 58, Pop_r16, Legacy, INTEL8086, op0=w rw=xsp w=r8w rm=ss:xsp;UInt16 stack=2
# pop rax
58, Pop_r64, Legacy, X64, op0=w rw=xsp w=rax rm=ss:xsp;UInt64 stack=8
# pop r8
41 58, Pop_r64, Legacy, X64, op0=w rw=xsp w=r8 rm=ss:xsp;UInt64 stack=8
# pop cx
66 59, Pop_r16, Legacy, INTEL8086, op0=w rw=xsp w=cx rm=ss:xsp;UInt16 stack=2
# pop r9w
66 41 59, Pop_r16, Legacy, INTEL8086, op0=w rw=xsp w=r9w rm=ss:xsp;UInt16 stack=2
# pop rcx
59, Pop_r64, Legacy, X64, op0=w rw=xsp w=rcx rm=ss:xsp;UInt64 stack=8
# pop r9
41 59, Pop_r64, Legacy, X64, op0=w rw=xsp w=r9 rm=ss:xsp;UInt64 stack=8
# pop dx
66 5A, Pop_r16, Legacy, INTEL8086, op0=w rw=xsp w=dx rm=ss:xsp;UInt16 stack=2
# pop r10w
66 41 5A, Pop_r16, Legacy, INTEL8086, op0=w rw=xsp w=r10w rm=ss:xsp;UInt16 stack=2
# pop rdx
5A, Pop_r64, Legacy, X64, op0=w rw=xsp w=rdx rm=ss:xsp;UInt64 stack=8
# pop r10
41 5A, Pop_r64, Legacy, X64, op0=w rw=xsp w=r10 rm=ss:xsp;UInt64 stack=8
# pop bx
66 5B, Pop_r16, Legacy, INTEL8086, op0=w rw=xsp w=bx rm=ss:xsp;UInt16 stack=2
# pop r11w
66 41 5B, Pop_r16, Legacy, INTEL8086, op0=w rw=xsp w=r11w rm=ss:xsp;UInt16 stack=2
# pop rbx
5B, Pop_r64, Legacy, X64, op0=w rw=xsp w=rbx rm=ss:xsp;UInt64 stack=8
# pop r11
41 5B, Pop_r64, Legacy, X64, op0=w rw=xsp w=r11 rm=ss:xsp;UInt64 stack=8
# pop sp
66 5C, Pop_r16, Legacy, INTEL8086, op0=w rw=xsp w=sp rm=ss:xsp;UInt16 stack=2
# pop r12w
66 41 5C, Pop_r16, Legacy, INTEL8086, op0=w rw=xsp w=r12w rm=ss:xsp;UInt16 stack=2
# pop rsp
5C, Pop_r64, Legacy, X64, op0=w rw=xsp w=rsp rm=ss:xsp;UInt64 stack=8
# pop r12
41 5C, Pop_r64, Legacy, X64, op0=w rw=xsp w=r12 rm=ss:xsp;UInt64 stack=8
# pop bp
66 5D, Pop_r16, Legacy, INTEL8086, op0=w rw=xsp w=bp rm=ss:xsp;UInt16 stack=2
# pop r13w
66 41 5D, Pop_r16, Legacy, INTEL8086, op0=w rw=xsp w=r13w rm=ss:xsp;UInt16 stack=2
# pop rbp
5D, Pop_r64, Legacy, X64, op0=w rw=xsp w=rbp rm=ss:xsp;UInt64 stack=8
# pop r13
41 5D, Pop_r64, Legacy, X64, op0=w rw=xsp w=r13 rm=ss:xsp;UInt64 stack=8
# pop si
66 5E, Pop_r16, Legacy, INTEL8086, op0=w rw=xsp w=si rm=ss:xsp;UInt16 stack=2
# pop r14w
66 41 5E, Pop_r16, Legacy, INTEL8086, op0=w rw=xsp w=r14w rm=ss:xsp;UInt16 stack=2
# pop rsi
5E, Pop_r64, Legacy, X64, op0=w rw=xsp w=rsi rm=ss:xsp;UInt64 stack=8
# pop r14
41 5E, Pop_r64, Legacy, X64, op0=w rw=xsp w=r14 rm=ss:xsp;UInt64 stack=8
# pop di
66 5F, Pop_r16, Legacy, INTEL8086, op0=w rw=xsp w=di rm=ss:xsp;UInt16 stack=2
# pop r15w
66 41 5F, Pop_r16, Legacy, INTEL8086, op0=w rw=xsp w=r15w rm=ss:xsp;UInt16 stack=2
# pop rdi
5F, Pop_r64, Legacy, X64, op0=w rw=xsp w=rdi rm=ss:xsp;UInt64 stack=8
# pop r15
41 5F, Pop_r64, Legacy, X64, op0=w rw=xsp w=r15 rm=ss:xsp;UInt64 stack=8
# movsxd cx,si
66 63 CE, Movsxd_r16_rm16, Legacy, X64, op0=w op1=r w=cx r=si
# movsxd bx,word ptr [rax]
66 63 18, Movsxd_r16_rm16, Legacy, X64, op0=w op1=r w=bx r=rax rm=ds:rax;Int16
# movsxd ecx,esi
63 CE, Movsxd_r32_rm32, Legacy, X64, op0=w op1=r w=rcx r=esi
# movsxd ebx,dword ptr [rax]
63 18, Movsxd_r32_rm32, Legacy, X64, op0=w op1=r w=rbx r=rax rm=ds:rax;Int32
# movsxd rcx,esi
48 63 CE, Movsxd_r64_rm32, Legacy, X64, op0=w op1=r w=rcx r=esi
# movsxd rbx,dword ptr [rax]
48 63 18, Movsxd_r64_rm32, Legacy, X64, op0=w op1=r w=rbx r=rax rm=ds:rax;Int32
# pushw 0A55Ah
66 68 5AA5, Push_imm16, Legacy, INTEL186, op0=r rw=xsp wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 stack=-2
# push 0FFFFFFFFA412A55Ah
68 5AA512A4, Pushq_imm32, Legacy, X64, op0=r rw=xsp wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# imul cx,si,5AA5h
66 69 CE A55A, Imul_r16_rm16_imm16, Legacy, INTEL186, fw=oc fu=apsz op0=w op1=r op2=r w=cx r=si
# imul bx,[rax],0A55Ah
66 69 18 5AA5, Imul_r16_rm16_imm16, Legacy, INTEL186, fw=oc fu=apsz op0=w op1=r op2=r w=bx r=rax rm=ds:rax;Int16
# imul ecx,esi,3412A55Ah
69 CE 5AA51234, Imul_r32_rm32_imm32, Legacy, INTEL386, fw=oc fu=apsz op0=w op1=r op2=r w=rcx r=esi
# imul ebx,[rax],3412A55Ah
69 18 5AA51234, Imul_r32_rm32_imm32, Legacy, INTEL386, fw=oc fu=apsz op0=w op1=r op2=r w=rbx r=rax rm=ds:rax;Int32
# imul rcx,rsi,0FFFFFFFFA412A55Ah
48 69 CE 5AA512A4, Imul_r64_rm64_imm32, Legacy, X64, fw=oc fu=apsz op0=w op1=r op2=r w=rcx r=rsi
# imul rbx,[rax],0FFFFFFFFA412A55Ah
48 69 18 5AA512A4, Imul_r64_rm64_imm32, Legacy, X64, fw=oc fu=apsz op0=w op1=r op2=r w=rbx r=rax rm=ds:rax;Int64
# pushw 5Ah
66 6A 5A, Pushw_imm8, Legacy, INTEL186, op0=r rw=xsp wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 stack=-2
# push 5Ah
6A 5A, Pushq_imm8, Legacy, X64, op0=r rw=xsp wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# imul cx,si,5Ah
66 6B CE 5A, Imul_r16_rm16_imm8, Legacy, INTEL186, fw=oc fu=apsz op0=w op1=r op2=r w=cx r=si
# imul bx,[rax],5Ah
66 6B 18 5A, Imul_r16_rm16_imm8, Legacy, INTEL186, fw=oc fu=apsz op0=w op1=r op2=r w=bx r=rax rm=ds:rax;Int16
# imul ecx,esi,5Ah
6B CE 5A, Imul_r32_rm32_imm8, Legacy, INTEL386, fw=oc fu=apsz op0=w op1=r op2=r w=rcx r=esi
# imul ebx,[rax],5Ah
6B 18 5A, Imul_r32_rm32_imm8, Legacy, INTEL386, fw=oc fu=apsz op0=w op1=r op2=r w=rbx r=rax rm=ds:rax;Int32
# imul rcx,rsi,5Ah
48 6B CE 5A, Imul_r64_rm64_imm8, Legacy, X64, fw=oc fu=apsz op0=w op1=r op2=r w=rcx r=rsi
# imul rbx,[rax],5Ah
48 6B 18 5A, Imul_r64_rm64_imm8, Legacy, X64, fw=oc fu=apsz op0=w op1=r op2=r w=rbx r=rax rm=ds:rax;Int64
# insb
6C, Insb_m8_DX, Legacy, INTEL186, priv fr=d op0=w op1=r rw=rdi r=dx wm=es:rdi;UInt8
# insw
66 6D, Insw_m16_DX, Legacy, INTEL186, priv fr=d op0=w op1=r rw=rdi r=dx wm=es:rdi;UInt16
# insd
6D, Insd_m32_DX, Legacy, INTEL386, priv fr=d op0=w op1=r rw=rdi r=dx wm=es:rdi;UInt32
# outsb
6E, Outsb_DX_m8, Legacy, INTEL186, priv fr=d op0=r op1=r r=dx rw=rsi rm=ds:rsi;UInt8
# outsw
66 6F, Outsw_DX_m16, Legacy, INTEL186, priv fr=d op0=r op1=r r=dx rw=rsi rm=ds:rsi;UInt16
# outsd
6F, Outsd_DX_m32, Legacy, INTEL386, priv fr=d op0=r op1=r r=dx rw=rsi rm=ds:rsi;UInt32
# jo short 800000000000004Ch
70 5A, Jo_rel8_64, Legacy, X64, flow=ConditionalBranch fr=o op0=r
# jno short 800000000000004Ch
71 5A, Jno_rel8_64, Legacy, X64, flow=ConditionalBranch fr=o op0=r
# jb short 800000000000004Ch
72 5A, Jb_rel8_64, Legacy, X64, flow=ConditionalBranch fr=c op0=r
# jae short 800000000000004Ch
73 5A, Jae_rel8_64, Legacy, X64, flow=ConditionalBranch fr=c op0=r
# je short 800000000000004Ch
74 5A, Je_rel8_64, Legacy, X64, flow=ConditionalBranch fr=z op0=r
# jne short 800000000000004Ch
75 5A, Jne_rel8_64, Legacy, X64, flow=ConditionalBranch fr=z op0=r
# jbe short 800000000000004Ch
76 5A, Jbe_rel8_64, Legacy, X64, flow=ConditionalBranch fr=cz op0=r
# ja short 800000000000004Ch
77 5A, Ja_rel8_64, Legacy, X64, flow=ConditionalBranch fr=cz op0=r
# js short 800000000000004Ch
78 5A, Js_rel8_64, Legacy, X64, flow=ConditionalBranch fr=s op0=r
# jns short 800000000000004Ch
79 5A, Jns_rel8_64, Legacy, X64, flow=ConditionalBranch fr=s op0=r
# jp short 800000000000004Ch
7A 5A, Jp_rel8_64, Legacy, X64, flow=ConditionalBranch fr=p op0=r
# jnp short 800000000000004Ch
7B 5A, Jnp_rel8_64, Legacy, X64, flow=ConditionalBranch fr=p op0=r
# jl short 800000000000004Ch
7C 5A, Jl_rel8_64, Legacy, X64, flow=ConditionalBranch fr=so op0=r
# jge short 800000000000004Ch
7D 5A, Jge_rel8_64, Legacy, X64, flow=ConditionalBranch fr=so op0=r
# jle short 800000000000004Ch
7E 5A, Jle_rel8_64, Legacy, X64, flow=ConditionalBranch fr=soz op0=r
# jg short 800000000000004Ch
7F 5A, Jg_rel8_64, Legacy, X64, flow=ConditionalBranch fr=soz op0=r
# add cl,5Ah
80 C1 5A, Add_rm8_imm8, Legacy, INTEL8086, fw=oszacp op0=rw op1=r rw=cl
# add byte ptr [rax],5Ah
80 00 5A, Add_rm8_imm8, Legacy, INTEL8086, fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt8
# or dl,0A5h
80 CA A5, Or_rm8_imm8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=dl
# or byte ptr [rax],0A5h
80 08 A5, Or_rm8_imm8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt8
# adc bl,5Ah
80 D3 5A, Adc_rm8_imm8, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r rw=bl
# adc byte ptr [rax],5Ah
80 10 5A, Adc_rm8_imm8, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt8
# sbb ah,0A5h
80 DC A5, Sbb_rm8_imm8, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r rw=ah
# sbb byte ptr [rax],0A5h
80 18 A5, Sbb_rm8_imm8, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt8
# and ch,5Ah
80 E5 5A, And_rm8_imm8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=ch
# and byte ptr [rax],5Ah
80 20 5A, And_rm8_imm8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt8
# sub dh,0A5h
80 EE A5, Sub_rm8_imm8, Legacy, INTEL8086, fw=oszacp op0=rw op1=r rw=dh
# sub byte ptr [rax],0A5h
80 28 A5, Sub_rm8_imm8, Legacy, INTEL8086, fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt8
# xor bh,5Ah
80 F7 5A, Xor_rm8_imm8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=bh
# xor byte ptr [rax],5Ah
80 30 5A, Xor_rm8_imm8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt8
# cmp al,0A5h
80 F8 A5, Cmp_rm8_imm8, Legacy, INTEL8086, fw=oszacp op0=r op1=r r=al
# cmp byte ptr [rax],0A5h
80 38 A5, Cmp_rm8_imm8, Legacy, INTEL8086, fw=oszacp op0=r op1=r r=rax rm=ds:rax;UInt8
# add cx,0A55Ah
66 81 C1 5AA5, Add_rm16_imm16, Legacy, INTEL8086, fw=oszacp op0=rw op1=r rw=cx
# add word ptr [rax],0A55Ah
66 81 00 5AA5, Add_rm16_imm16, Legacy, INTEL8086, fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt16
# add ecx,3412A55Ah
81 C1 5AA51234, Add_rm32_imm32, Legacy, INTEL386, fw=oszacp op0=rw op1=r w=rcx r=ecx
# add dword ptr [rax],3412A55Ah
81 00 5AA51234, Add_rm32_imm32, Legacy, INTEL386, fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt32
# add rcx,3412A55Ah
48 81 C1 5AA51234, Add_rm64_imm32, Legacy, X64, fw=oszacp op0=rw op1=r rw=rcx
# add qword ptr [rax],3412A55Ah
48 81 00 5AA51234, Add_rm64_imm32, Legacy, X64, fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt64
# or dx,5AA5h
66 81 CA A55A, Or_rm16_imm16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=dx
# or word ptr [rax],5AA5h
66 81 08 A55A, Or_rm16_imm16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt16
# or edx,0AB895AA5h
81 CA A55A89AB, Or_rm32_imm32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r w=rdx r=edx
# or dword ptr [rax],0AB895AA5h
81 08 A55A89AB, Or_rm32_imm32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt32
# or rdx,0FFFFFFFFAB895AA5h
48 81 CA A55A89AB, Or_rm64_imm32, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r rw=rdx
# or qword ptr [rax],0FFFFFFFFAB895AA5h
48 81 08 A55A89AB, Or_rm64_imm32, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt64
# adc bx,0A55Ah
66 81 D3 5AA5, Adc_rm16_imm16, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r rw=bx
# adc word ptr [rax],0A55Ah
66 81 10 5AA5, Adc_rm16_imm16, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt16
# adc ebx,3412A55Ah
81 D3 5AA51234, Adc_rm32_imm32, Legacy, INTEL386, fr=c fw=oszacp op0=rw op1=r w=rbx r=ebx
# adc dword ptr [rax],3412A55Ah
81 10 5AA51234, Adc_rm32_imm32, Legacy, INTEL386, fr=c fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt32
# adc rbx,3412A55Ah
48 81 D3 5AA51234, Adc_rm64_imm32, Legacy, X64, fr=c fw=oszacp op0=rw op1=r rw=rbx
# adc qword ptr [rax],3412A55Ah
48 81 10 5AA51234, Adc_rm64_imm32, Legacy, X64, fr=c fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt64
# sbb sp,5AA5h
66 81 DC A55A, Sbb_rm16_imm16, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r rw=sp
# sbb word ptr [rax],5AA5h
66 81 18 A55A, Sbb_rm16_imm16, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt16
# sbb esp,0AB895AA5h
81 DC A55A89AB, Sbb_rm32_imm32, Legacy, INTEL386, fr=c fw=oszacp op0=rw op1=r w=rsp r=esp
# sbb dword ptr [rax],0AB895AA5h
81 18 A55A89AB, Sbb_rm32_imm32, Legacy, INTEL386, fr=c fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt32
# sbb rsp,0FFFFFFFFAB895AA5h
48 81 DC A55A89AB, Sbb_rm64_imm32, Legacy, X64, fr=c fw=oszacp op0=rw op1=r rw=rsp
# sbb qword ptr [rax],0FFFFFFFFAB895AA5h
48 81 18 A55A89AB, Sbb_rm64_imm32, Legacy, X64, fr=c fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt64
# and bp,0A55Ah
66 81 E5 5AA5, And_rm16_imm16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=bp
# and word ptr [rax],0A55Ah
66 81 20 5AA5, And_rm16_imm16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt16
# and ebp,3412A55Ah
81 E5 5AA51234, And_rm32_imm32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r w=rbp r=ebp
# and dword ptr [rax],3412A55Ah
81 20 5AA51234, And_rm32_imm32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt32
# and rbp,3412A55Ah
48 81 E5 5AA51234, And_rm64_imm32, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r rw=rbp
# and qword ptr [rax],3412A55Ah
48 81 20 5AA51234, And_rm64_imm32, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt64
# sub si,5AA5h
66 81 EE A55A, Sub_rm16_imm16, Legacy, INTEL8086, fw=oszacp op0=rw op1=r rw=si
# sub word ptr [rax],5AA5h
66 81 28 A55A, Sub_rm16_imm16, Legacy, INTEL8086, fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt16
# sub esi,0AB895AA5h
81 EE A55A89AB, Sub_rm32_imm32, Legacy, INTEL386, fw=oszacp op0=rw op1=r w=rsi r=esi
# sub dword ptr [rax],0AB895AA5h
81 28 A55A89AB, Sub_rm32_imm32, Legacy, INTEL386, fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt32
# sub rsi,0FFFFFFFFAB895AA5h
48 81 EE A55A89AB, Sub_rm64_imm32, Legacy, X64, fw=oszacp op0=rw op1=r rw=rsi
# sub qword ptr [rax],0FFFFFFFFAB895AA5h
48 81 28 A55A89AB, Sub_rm64_imm32, Legacy, X64, fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt64
# xor di,0A55Ah
66 81 F7 5AA5, Xor_rm16_imm16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=di
# xor word ptr [rax],0A55Ah
66 81 30 5AA5, Xor_rm16_imm16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt16
# xor edi,3412A55Ah
81 F7 5AA51234, Xor_rm32_imm32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r w=rdi r=edi
# xor dword ptr [rax],3412A55Ah
81 30 5AA51234, Xor_rm32_imm32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt32
# xor rdi,3412A55Ah
48 81 F7 5AA51234, Xor_rm64_imm32, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r rw=rdi
# xor qword ptr [rax],3412A55Ah
48 81 30 5AA51234, Xor_rm64_imm32, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt64
# cmp ax,5AA5h
66 81 F8 A55A, Cmp_rm16_imm16, Legacy, INTEL8086, fw=oszacp op0=r op1=r r=ax
# cmp word ptr [rax],5AA5h
66 81 38 A55A, Cmp_rm16_imm16, Legacy, INTEL8086, fw=oszacp op0=r op1=r r=rax rm=ds:rax;UInt16
# cmp eax,0AB895AA5h
81 F8 A55A89AB, Cmp_rm32_imm32, Legacy, INTEL386, fw=oszacp op0=r op1=r r=eax
# cmp dword ptr [rax],0AB895AA5h
81 38 A55A89AB, Cmp_rm32_imm32, Legacy, INTEL386, fw=oszacp op0=r op1=r r=rax rm=ds:rax;UInt32
# cmp r8,0FFFFFFFFAB895AA5h
49 81 F8 A55A89AB, Cmp_rm64_imm32, Legacy, X64, fw=oszacp op0=r op1=r r=r8
# cmp qword ptr [rax],0FFFFFFFFAB895AA5h
48 81 38 A55A89AB, Cmp_rm64_imm32, Legacy, X64, fw=oszacp op0=r op1=r r=rax rm=ds:rax;UInt64
# add cx,5Ah
66 83 C1 5A, Add_rm16_imm8, Legacy, INTEL8086, fw=oszacp op0=rw op1=r rw=cx
# add word ptr [rax],5Ah
66 83 00 5A, Add_rm16_imm8, Legacy, INTEL8086, fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt16
# add ecx,5Ah
83 C1 5A, Add_rm32_imm8, Legacy, INTEL386, fw=oszacp op0=rw op1=r w=rcx r=ecx
# add dword ptr [rax],5Ah
83 00 5A, Add_rm32_imm8, Legacy, INTEL386, fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt32
# add rcx,5Ah
48 83 C1 5A, Add_rm64_imm8, Legacy, X64, fw=oszacp op0=rw op1=r rw=rcx
# add qword ptr [rax],5Ah
48 83 00 5A, Add_rm64_imm8, Legacy, X64, fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt64
# or dx,0FFA5h
66 83 CA A5, Or_rm16_imm8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=dx
# or word ptr [rax],0FFA5h
66 83 08 A5, Or_rm16_imm8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt16
# or edx,0FFFFFFA5h
83 CA A5, Or_rm32_imm8, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r w=rdx r=edx
# or dword ptr [rax],0FFFFFFA5h
83 08 A5, Or_rm32_imm8, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt32
# or rdx,0FFFFFFFFFFFFFFA5h
48 83 CA A5, Or_rm64_imm8, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r rw=rdx
# or qword ptr [rax],0FFFFFFFFFFFFFFA5h
48 83 08 A5, Or_rm64_imm8, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt64
# adc bx,5Ah
66 83 D3 5A, Adc_rm16_imm8, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r rw=bx
# adc word ptr [rax],5Ah
66 83 10 5A, Adc_rm16_imm8, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt16
# adc ebx,5Ah
83 D3 5A, Adc_rm32_imm8, Legacy, INTEL386, fr=c fw=oszacp op0=rw op1=r w=rbx r=ebx
# adc dword ptr [rax],5Ah
83 10 5A, Adc_rm32_imm8, Legacy, INTEL386, fr=c fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt32
# adc rbx,5Ah
48 83 D3 5A, Adc_rm64_imm8, Legacy, X64, fr=c fw=oszacp op0=rw op1=r rw=rbx
# adc qword ptr [rax],5Ah
48 83 10 5A, Adc_rm64_imm8, Legacy, X64, fr=c fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt64
# sbb sp,0FFA5h
66 83 DC A5, Sbb_rm16_imm8, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r rw=sp
# sbb word ptr [rax],0FFA5h
66 83 18 A5, Sbb_rm16_imm8, Legacy, INTEL8086, fr=c fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt16
# sbb esp,0FFFFFFA5h
83 DC A5, Sbb_rm32_imm8, Legacy, INTEL386, fr=c fw=oszacp op0=rw op1=r w=rsp r=esp
# sbb dword ptr [rax],0FFFFFFA5h
83 18 A5, Sbb_rm32_imm8, Legacy, INTEL386, fr=c fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt32
# sbb rsp,0FFFFFFFFFFFFFFA5h
48 83 DC A5, Sbb_rm64_imm8, Legacy, X64, fr=c fw=oszacp op0=rw op1=r rw=rsp
# sbb qword ptr [rax],0FFFFFFFFFFFFFFA5h
48 83 18 A5, Sbb_rm64_imm8, Legacy, X64, fr=c fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt64
# and bp,5Ah
66 83 E5 5A, And_rm16_imm8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=bp
# and word ptr [rax],5Ah
66 83 20 5A, And_rm16_imm8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt16
# and ebp,5Ah
83 E5 5A, And_rm32_imm8, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r w=rbp r=ebp
# and dword ptr [rax],5Ah
83 20 5A, And_rm32_imm8, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt32
# and rbp,5Ah
48 83 E5 5A, And_rm64_imm8, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r rw=rbp
# and qword ptr [rax],5Ah
48 83 20 5A, And_rm64_imm8, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt64
# sub si,0FFA5h
66 83 EE A5, Sub_rm16_imm8, Legacy, INTEL8086, fw=oszacp op0=rw op1=r rw=si
# sub word ptr [rax],0FFA5h
66 83 28 A5, Sub_rm16_imm8, Legacy, INTEL8086, fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt16
# sub esi,0FFFFFFA5h
83 EE A5, Sub_rm32_imm8, Legacy, INTEL386, fw=oszacp op0=rw op1=r w=rsi r=esi
# sub dword ptr [rax],0FFFFFFA5h
83 28 A5, Sub_rm32_imm8, Legacy, INTEL386, fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt32
# sub rsi,0FFFFFFFFFFFFFFA5h
48 83 EE A5, Sub_rm64_imm8, Legacy, X64, fw=oszacp op0=rw op1=r rw=rsi
# sub qword ptr [rax],0FFFFFFFFFFFFFFA5h
48 83 28 A5, Sub_rm64_imm8, Legacy, X64, fw=oszacp op0=rw op1=r r=rax rwm=ds:rax;UInt64
# xor di,5Ah
66 83 F7 5A, Xor_rm16_imm8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r rw=di
# xor word ptr [rax],5Ah
66 83 30 5A, Xor_rm16_imm8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt16
# xor edi,5Ah
83 F7 5A, Xor_rm32_imm8, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r w=rdi r=edi
# xor dword ptr [rax],5Ah
83 30 5A, Xor_rm32_imm8, Legacy, INTEL386, fc=oc fw=szp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt32
# xor rdi,5Ah
48 83 F7 5A, Xor_rm64_imm8, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r rw=rdi
# xor qword ptr [rax],5Ah
48 83 30 5A, Xor_rm64_imm8, Legacy, X64, fc=oc fw=szp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt64
# cmp ax,0FFA5h
66 83 F8 A5, Cmp_rm16_imm8, Legacy, INTEL8086, fw=oszacp op0=r op1=r r=ax
# cmp word ptr [rax],0FFA5h
66 83 38 A5, Cmp_rm16_imm8, Legacy, INTEL8086, fw=oszacp op0=r op1=r r=rax rm=ds:rax;UInt16
# cmp eax,0FFFFFFA5h
83 F8 A5, Cmp_rm32_imm8, Legacy, INTEL386, fw=oszacp op0=r op1=r r=eax
# cmp dword ptr [rax],0FFFFFFA5h
83 38 A5, Cmp_rm32_imm8, Legacy, INTEL386, fw=oszacp op0=r op1=r r=rax rm=ds:rax;UInt32
# cmp r8,0FFFFFFFFFFFFFFA5h
49 83 F8 A5, Cmp_rm64_imm8, Legacy, X64, fw=oszacp op0=r op1=r r=r8
# cmp qword ptr [rax],0FFFFFFFFFFFFFFA5h
48 83 38 A5, Cmp_rm64_imm8, Legacy, X64, fw=oszacp op0=r op1=r r=rax rm=ds:rax;UInt64
# test dh,cl
84 CE, Test_rm8_r8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=r op1=r r=dh r=cl
# test [rax],bh
84 38, Test_rm8_r8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=r op1=r r=rax r=bh rm=ds:rax;UInt8
# test si,cx
66 85 CE, Test_rm16_r16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=r op1=r r=si r=cx
# test [rax],bx
66 85 18, Test_rm16_r16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=r op1=r r=rax r=bx rm=ds:rax;UInt16
# test esi,ecx
85 CE, Test_rm32_r32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=r op1=r r=esi r=ecx
# test [rax],ebx
85 18, Test_rm32_r32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=r op1=r r=rax r=ebx rm=ds:rax;UInt32
# test rsi,rcx
48 85 CE, Test_rm64_r64, Legacy, X64, fc=oc fw=szp fu=a op0=r op1=r r=rsi r=rcx
# test [rax],rbx
48 85 18, Test_rm64_r64, Legacy, X64, fc=oc fw=szp fu=a op0=r op1=r r=rax r=rbx rm=ds:rax;UInt64
# xchg cl,dh
86 CE, Xchg_rm8_r8, Legacy, INTEL8086, op0=rw op1=rw rw=dh rw=cl
# xchg bh,[rax]
86 38, Xchg_rm8_r8, Legacy, INTEL8086, op0=rw op1=rw r=rax rw=bh rwm=ds:rax;UInt8
# xchg cx,si
66 87 CE, Xchg_rm16_r16, Legacy, INTEL8086, op0=rw op1=rw rw=si rw=cx
# xchg bx,[rax]
66 87 18, Xchg_rm16_r16, Legacy, INTEL8086, op0=rw op1=rw r=rax rw=bx rwm=ds:rax;UInt16
# xchg ecx,esi
87 CE, Xchg_rm32_r32, Legacy, INTEL386, op0=rw op1=rw w=rsi r=esi w=rcx r=ecx
# xchg ebx,[rax]
87 18, Xchg_rm32_r32, Legacy, INTEL386, op0=rw op1=rw r=rax w=rbx r=ebx rwm=ds:rax;UInt32
# xchg rcx,rsi
48 87 CE, Xchg_rm64_r64, Legacy, X64, op0=rw op1=rw rw=rsi rw=rcx
# xchg rbx,[rax]
48 87 18, Xchg_rm64_r64, Legacy, X64, op0=rw op1=rw r=rax rw=rbx rwm=ds:rax;UInt64
# mov dh,cl
88 CE, Mov_rm8_r8, Legacy, INTEL8086, op0=w op1=r w=dh r=cl
# mov [rax],bh
88 38, Mov_rm8_r8, Legacy, INTEL8086, op0=w op1=r r=rax r=bh wm=ds:rax;UInt8
# mov si,cx
66 89 CE, Mov_rm16_r16, Legacy, INTEL8086, op0=w op1=r w=si r=cx
# mov [rax],bx
66 89 18, Mov_rm16_r16, Legacy, INTEL8086, op0=w op1=r r=rax r=bx wm=ds:rax;UInt16
# mov esi,ecx
89 CE, Mov_rm32_r32, Legacy, INTEL386, op0=w op1=r w=rsi r=ecx
# mov [rax],ebx
89 18, Mov_rm32_r32, Legacy, INTEL386, op0=w op1=r r=rax r=ebx wm=ds:rax;UInt32
# mov rsi,rcx
48 89 CE, Mov_rm64_r64, Legacy, X64, op0=w op1=r w=rsi r=rcx
# mov [rax],rbx
48 89 18, Mov_rm64_r64, Legacy, X64, op0=w op1=r r=rax r=rbx wm=ds:rax;UInt64
# mov cl,dh
8A CE, Mov_r8_rm8, Legacy, INTEL8086, op0=w op1=r w=cl r=dh
# mov bh,[rax]
8A 38, Mov_r8_rm8, Legacy, INTEL8086, op0=w op1=r w=bh r=rax rm=ds:rax;UInt8
# mov cx,si
66 8B CE, Mov_r16_rm16, Legacy, INTEL8086, op0=w op1=r w=cx r=si
# mov bx,[rax]
66 8B 18, Mov_r16_rm16, Legacy, INTEL8086, op0=w op1=r w=bx r=rax rm=ds:rax;UInt16
# mov ecx,esi
8B CE, Mov_r32_rm32, Legacy, INTEL386, op0=w op1=r w=rcx r=esi
# mov ebx,[rax]
8B 18, Mov_r32_rm32, Legacy, INTEL386, op0=w op1=r w=rbx r=rax rm=ds:rax;UInt32
# mov rcx,rsi
48 8B CE, Mov_r64_rm64, Legacy, X64, op0=w op1=r w=rcx r=rsi
# mov rbx,[rax]
48 8B 18, Mov_r64_rm64, Legacy, X64, op0=w op1=r w=rbx r=rax rm=ds:rax;UInt64
# mov si,cs
66 8C CE, Mov_rm16_Sreg, Legacy, INTEL8086, op0=w op1=r w=si r=cs
# mov [rax],ds
66 8C 18, Mov_rm16_Sreg, Legacy, INTEL8086, op0=w op1=r r=rax r=ds wm=ds:rax;UInt16
# mov esi,cs
8C CE, Mov_r32m16_Sreg, Legacy, INTEL386, op0=w op1=r w=rsi r=cs
# mov [rax],ds
8C 18, Mov_r32m16_Sreg, Legacy, INTEL386, op0=w op1=r r=rax r=ds wm=ds:rax;UInt16
# mov rsi,cs
48 8C CE, Mov_r64m16_Sreg, Legacy, X64, op0=w op1=r w=rsi r=cs
# mov [rax],ds
48 8C 18, Mov_r64m16_Sreg, Legacy, X64, op0=w op1=r r=rax r=ds wm=ds:rax;UInt16
# lea bx,[rax]
66 8D 18, Lea_r16_m, Legacy, INTEL8086, op0=w op1=nma w=bx r=ax
# lea bx,[rax]
64 66 8D 18, Lea_r16_m, Legacy, INTEL8086, op0=w op1=nma w=bx r=ax
# lea si,[rcx+rdx*8]
66 8D 34 D1, Lea_r16_m, Legacy, INTEL8086, op0=w op1=nma w=si r=cx;dx
# lea si,[ecx+edx*8]
67 66 8D 34 D1, Lea_r16_m, Legacy, INTEL8086, op0=w op1=nma w=si r=cx;dx
# lea bx,[rax]
64 66 8D 18, Lea_r16_m, Legacy, INTEL8086, op0=w op1=nma w=bx r=ax
# lea ebx,[rax]
8D 18, Lea_r32_m, Legacy, INTEL386, op0=w op1=nma w=rbx r=eax
# lea esi,[rcx+rdx*8]
8D 34 D1, Lea_r32_m, Legacy, INTEL386, op0=w op1=nma w=rsi r=ecx;edx
# lea esi,[ecx+edx*8]
67 8D 34 D1, Lea_r32_m, Legacy, INTEL386, op0=w op1=nma w=rsi r=ecx;edx
# lea ebx,[rax]
64 8D 18, Lea_r32_m, Legacy, INTEL386, op0=w op1=nma w=rbx r=eax
# lea rbx,[rax]
48 8D 18, Lea_r64_m, Legacy, X64, op0=w op1=nma w=rbx r=rax
# lea rsi,[rcx+rdx*8]
48 8D 34 D1, Lea_r64_m, Legacy, X64, op0=w op1=nma w=rsi r=rcx;rdx
# lea rsi,[ecx+edx*8]
67 48 8D 34 D1, Lea_r64_m, Legacy, X64, op0=w op1=nma w=rsi r=ecx;edx
# lea rbx,[rax]
64 48 8D 18, Lea_r64_m, Legacy, X64, op0=w op1=nma w=rbx r=rax
# mov ss,si
66 8E D6, Mov_Sreg_rm16, Legacy, INTEL8086, op0=w op1=r w=ss r=si
# mov ds,[rax]
66 8E 18, Mov_Sreg_rm16, Legacy, INTEL8086, op0=w op1=r w=ds r=rax rm=ds:rax;UInt16
# mov ss,esi
8E D6, Mov_Sreg_r32m16, Legacy, INTEL386, op0=w op1=r w=ss r=si
# mov ss,r15d
41 8E D7, Mov_Sreg_r32m16, Legacy, INTEL386, op0=w op1=r w=ss r=r15w
# mov ds,[rax]
8E 18, Mov_Sreg_r32m16, Legacy, INTEL386, op0=w op1=r w=ds r=rax rm=ds:rax;UInt16
# mov ss,rsi
48 8E D6, Mov_Sreg_r64m16, Legacy, X64, op0=w op1=r w=ss r=si
# mov ss,r15
49 8E D7, Mov_Sreg_r64m16, Legacy, X64, op0=w op1=r w=ss r=r15w
# mov ds,[rax]
48 8E 18, Mov_Sreg_r64m16, Legacy, X64, op0=w op1=r w=ds r=rax rm=ds:rax;UInt16
# pop si
66 8F C6, Pop_rm16, Legacy, INTEL8086, op0=w rw=xsp w=si rm=ss:xsp;UInt16 stack=2
# pop word ptr [rax]
66 8F 00, Pop_rm16, Legacy, INTEL8086, op0=w rw=xsp r=rax wm=ds:rax;UInt16 rm=ss:xsp;UInt16 stack=2
# pop rsi
8F C6, Pop_rm64, Legacy, X64, op0=w rw=xsp w=rsi rm=ss:xsp;UInt64 stack=8
# pop qword ptr [rax]
8F 00, Pop_rm64, Legacy, X64, op0=w rw=xsp r=rax wm=ds:rax;UInt64 rm=ss:xsp;UInt64 stack=8
# xchg ax,ax
66 90, Nopw, Legacy, INTEL8086,
# xchg r8w,ax
66 41 90, Xchg_r16_AX, Legacy, INTEL8086, op0=rw op1=rw rw=r8w rw=ax
# nop
90, Nopd, Legacy, INTEL8086,
# xchg r8d,eax
41 90, Xchg_r32_EAX, Legacy, INTEL386, op0=rw op1=rw w=r8 r=r8d w=rax r=eax
# xchg rax,rax
48 90, Nopq, Legacy, INTEL8086,
# xchg r8,rax
49 90, Xchg_r64_RAX, Legacy, X64, op0=rw op1=rw rw=r8 rw=rax
# xchg cx,ax
66 91, Xchg_r16_AX, Legacy, INTEL8086, op0=rw op1=rw rw=cx rw=ax
# xchg r9w,ax
66 41 91, Xchg_r16_AX, Legacy, INTEL8086, op0=rw op1=rw rw=r9w rw=ax
# xchg ecx,eax
91, Xchg_r32_EAX, Legacy, INTEL386, op0=rw op1=rw w=rcx r=ecx w=rax r=eax
# xchg r9d,eax
41 91, Xchg_r32_EAX, Legacy, INTEL386, op0=rw op1=rw w=r9 r=r9d w=rax r=eax
# xchg rcx,rax
48 91, Xchg_r64_RAX, Legacy, X64, op0=rw op1=rw rw=rcx rw=rax
# xchg r9,rax
49 91, Xchg_r64_RAX, Legacy, X64, op0=rw op1=rw rw=r9 rw=rax
# xchg dx,ax
66 92, Xchg_r16_AX, Legacy, INTEL8086, op0=rw op1=rw rw=dx rw=ax
# xchg r10w,ax
66 41 92, Xchg_r16_AX, Legacy, INTEL8086, op0=rw op1=rw rw=r10w rw=ax
# xchg edx,eax
92, Xchg_r32_EAX, Legacy, INTEL386, op0=rw op1=rw w=rdx r=edx w=rax r=eax
# xchg r10d,eax
41 92, Xchg_r32_EAX, Legacy, INTEL386, op0=rw op1=rw w=r10 r=r10d w=rax r=eax
# xchg rdx,rax
48 92, Xchg_r64_RAX, Legacy, X64, op0=rw op1=rw rw=rdx rw=rax
# xchg r10,rax
49 92, Xchg_r64_RAX, Legacy, X64, op0=rw op1=rw rw=r10 rw=rax
# xchg bx,ax
66 93, Xchg_r16_AX, Legacy, INTEL8086, op0=rw op1=rw rw=bx rw=ax
# xchg r11w,ax
66 41 93, Xchg_r16_AX, Legacy, INTEL8086, op0=rw op1=rw rw=r11w rw=ax
# xchg ebx,eax
93, Xchg_r32_EAX, Legacy, INTEL386, op0=rw op1=rw w=rbx r=ebx w=rax r=eax
# xchg r11d,eax
41 93, Xchg_r32_EAX, Legacy, INTEL386, op0=rw op1=rw w=r11 r=r11d w=rax r=eax
# xchg rbx,rax
48 93, Xchg_r64_RAX, Legacy, X64, op0=rw op1=rw rw=rbx rw=rax
# xchg r11,rax
49 93, Xchg_r64_RAX, Legacy, X64, op0=rw op1=rw rw=r11 rw=rax
# xchg sp,ax
66 94, Xchg_r16_AX, Legacy, INTEL8086, op0=rw op1=rw rw=sp rw=ax
# xchg r12w,ax
66 41 94, Xchg_r16_AX, Legacy, INTEL8086, op0=rw op1=rw rw=r12w rw=ax
# xchg esp,eax
94, Xchg_r32_EAX, Legacy, INTEL386, op0=rw op1=rw w=rsp r=esp w=rax r=eax
# xchg r12d,eax
41 94, Xchg_r32_EAX, Legacy, INTEL386, op0=rw op1=rw w=r12 r=r12d w=rax r=eax
# xchg rsp,rax
48 94, Xchg_r64_RAX, Legacy, X64, op0=rw op1=rw rw=rsp rw=rax
# xchg r12,rax
49 94, Xchg_r64_RAX, Legacy, X64, op0=rw op1=rw rw=r12 rw=rax
# xchg bp,ax
66 95, Xchg_r16_AX, Legacy, INTEL8086, op0=rw op1=rw rw=bp rw=ax
# xchg r13w,ax
66 41 95, Xchg_r16_AX, Legacy, INTEL8086, op0=rw op1=rw rw=r13w rw=ax
# xchg ebp,eax
95, Xchg_r32_EAX, Legacy, INTEL386, op0=rw op1=rw w=rbp r=ebp w=rax r=eax
# xchg r13d,eax
41 95, Xchg_r32_EAX, Legacy, INTEL386, op0=rw op1=rw w=r13 r=r13d w=rax r=eax
# xchg rbp,rax
48 95, Xchg_r64_RAX, Legacy, X64, op0=rw op1=rw rw=rbp rw=rax
# xchg r13,rax
49 95, Xchg_r64_RAX, Legacy, X64, op0=rw op1=rw rw=r13 rw=rax
# xchg si,ax
66 96, Xchg_r16_AX, Legacy, INTEL8086, op0=rw op1=rw rw=si rw=ax
# xchg r14w,ax
66 41 96, Xchg_r16_AX, Legacy, INTEL8086, op0=rw op1=rw rw=r14w rw=ax
# xchg esi,eax
96, Xchg_r32_EAX, Legacy, INTEL386, op0=rw op1=rw w=rsi r=esi w=rax r=eax
# xchg r14d,eax
41 96, Xchg_r32_EAX, Legacy, INTEL386, op0=rw op1=rw w=r14 r=r14d w=rax r=eax
# xchg rsi,rax
48 96, Xchg_r64_RAX, Legacy, X64, op0=rw op1=rw rw=rsi rw=rax
# xchg r14,rax
49 96, Xchg_r64_RAX, Legacy, X64, op0=rw op1=rw rw=r14 rw=rax
# xchg di,ax
66 97, Xchg_r16_AX, Legacy, INTEL8086, op0=rw op1=rw rw=di rw=ax
# xchg r15w,ax
66 41 97, Xchg_r16_AX, Legacy, INTEL8086, op0=rw op1=rw rw=r15w rw=ax
# xchg edi,eax
97, Xchg_r32_EAX, Legacy, INTEL386, op0=rw op1=rw w=rdi r=edi w=rax r=eax
# xchg r15d,eax
41 97, Xchg_r32_EAX, Legacy, INTEL386, op0=rw op1=rw w=r15 r=r15d w=rax r=eax
# xchg rdi,rax
48 97, Xchg_r64_RAX, Legacy, X64, op0=rw op1=rw rw=rdi rw=rax
# xchg r15,rax
49 97, Xchg_r64_RAX, Legacy, X64, op0=rw op1=rw rw=r15 rw=rax
# pause
F3 90, Pause, Legacy, PAUSE,
# cbw
66 98, Cbw, Legacy, INTEL8086, r=al w=ah
# cwde
98, Cwde, Legacy, INTEL386, r=ax w=rax
# cdqe
48 98, Cdqe, Legacy, X64, r=eax w=rax
# cwd
66 99, Cwd, Legacy, INTEL8086, r=ax w=dx
# cdq
99, Cdq, Legacy, INTEL386, r=eax w=rdx
# cqo
48 99, Cqo, Legacy, X64, r=rax w=rdx
# wait
9B, Wait, Legacy, INTEL8086,
# pushf
66 9C, Pushfw, Legacy, INTEL8086, fr=oszacpid rw=xsp wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 stack=-2
# pushfq
9C, Pushfq, Legacy, X64, fr=oszacpidA rw=xsp wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# popf
66 9D, Popfw, Legacy, INTEL8086, fw=oszacpid rw=xsp rm=ss:xsp;UInt16 stack=2
# popfq
9D, Popfq, Legacy, X64, fw=oszacpidA rw=xsp rm=ss:xsp;UInt64 stack=8
# sahf
9E, Sahf, Legacy, INTEL8086, fw=szapc r=ah
# lahf
9F, Lahf, Legacy, INTEL8086, fr=szapc w=ah
# mov al,[0F0DEBC9A78563412h]
A0 123456789ABCDEF0, Mov_AL_moffs8, Legacy, INTEL8086, op0=w op1=r w=al rm=ds:0xF0DEBC9A78563412;UInt8
# mov ax,[0F0DEBC9A78563412h]
66 A1 123456789ABCDEF0, Mov_AX_moffs16, Legacy, INTEL8086, op0=w op1=r w=ax rm=ds:0xF0DEBC9A78563412;UInt16
# mov eax,[0F0DEBC9A78563412h]
A1 123456789ABCDEF0, Mov_EAX_moffs32, Legacy, INTEL386, op0=w op1=r w=rax rm=ds:0xF0DEBC9A78563412;UInt32
# mov rax,[0F0DEBC9A78563412h]
48 A1 123456789ABCDEF0, Mov_RAX_moffs64, Legacy, X64, op0=w op1=r w=rax rm=ds:0xF0DEBC9A78563412;UInt64
# mov [0F0DEBC9A78563412h],al
A2 123456789ABCDEF0, Mov_moffs8_AL, Legacy, INTEL8086, op0=w op1=r r=al wm=ds:0xF0DEBC9A78563412;UInt8
# mov [0F0DEBC9A78563412h],ax
66 A3 123456789ABCDEF0, Mov_moffs16_AX, Legacy, INTEL8086, op0=w op1=r r=ax wm=ds:0xF0DEBC9A78563412;UInt16
# mov [0F0DEBC9A78563412h],eax
A3 123456789ABCDEF0, Mov_moffs32_EAX, Legacy, INTEL386, op0=w op1=r r=eax wm=ds:0xF0DEBC9A78563412;UInt32
# mov [0F0DEBC9A78563412h],rax
48 A3 123456789ABCDEF0, Mov_moffs64_RAX, Legacy, X64, op0=w op1=r r=rax wm=ds:0xF0DEBC9A78563412;UInt64
# movsb
A4, Movsb_m8_m8, Legacy, INTEL8086, fr=d op0=w op1=r rw=rdi rw=rsi wm=es:rdi;UInt8 rm=ds:rsi;UInt8
# movsw
66 A5, Movsw_m16_m16, Legacy, INTEL8086, fr=d op0=w op1=r rw=rdi rw=rsi wm=es:rdi;UInt16 rm=ds:rsi;UInt16
# movsd
A5, Movsd_m32_m32, Legacy, INTEL386, fr=d op0=w op1=r rw=rdi rw=rsi wm=es:rdi;UInt32 rm=ds:rsi;UInt32
# movsq
48 A5, Movsq_m64_m64, Legacy, X64, fr=d op0=w op1=r rw=rdi rw=rsi wm=es:rdi;UInt64 rm=ds:rsi;UInt64
# cmpsb
A6, Cmpsb_m8_m8, Legacy, INTEL8086, fr=d fw=oszacp op0=r op1=r rw=rsi rw=rdi rm=ds:rsi;UInt8 rm=es:rdi;UInt8
# cmpsw
66 A7, Cmpsw_m16_m16, Legacy, INTEL8086, fr=d fw=oszacp op0=r op1=r rw=rsi rw=rdi rm=ds:rsi;UInt16 rm=es:rdi;UInt16
# cmpsd
A7, Cmpsd_m32_m32, Legacy, INTEL386, fr=d fw=oszacp op0=r op1=r rw=rsi rw=rdi rm=ds:rsi;UInt32 rm=es:rdi;UInt32
# cmpsq
48 A7, Cmpsq_m64_m64, Legacy, X64, fr=d fw=oszacp op0=r op1=r rw=rsi rw=rdi rm=ds:rsi;UInt64 rm=es:rdi;UInt64
# test al,0A5h
A8 A5, Test_AL_imm8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=r op1=r r=al
# test ax,5AA5h
66 A9 A55A, Test_AX_imm16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=r op1=r r=ax
# test eax,12345AA5h
A9 A55A3412, Test_EAX_imm32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=r op1=r r=eax
# test rax,0FFFFFFFFA2345AA5h
48 A9 A55A34A2, Test_RAX_imm32, Legacy, X64, fc=oc fw=szp fu=a op0=r op1=r r=rax
# stosb
AA, Stosb_m8_AL, Legacy, INTEL8086, fr=d op0=w op1=r rw=rdi r=al wm=es:rdi;UInt8
# stosw
66 AB, Stosw_m16_AX, Legacy, INTEL8086, fr=d op0=w op1=r rw=rdi r=ax wm=es:rdi;UInt16
# stosd
AB, Stosd_m32_EAX, Legacy, INTEL386, fr=d op0=w op1=r rw=rdi r=eax wm=es:rdi;UInt32
# stosq
48 AB, Stosq_m64_RAX, Legacy, X64, fr=d op0=w op1=r rw=rdi r=rax wm=es:rdi;UInt64
# lodsb
AC, Lodsb_AL_m8, Legacy, INTEL8086, fr=d op0=w op1=r w=al rw=rsi rm=ds:rsi;UInt8
# lodsw
66 AD, Lodsw_AX_m16, Legacy, INTEL8086, fr=d op0=w op1=r w=ax rw=rsi rm=ds:rsi;UInt16
# lodsd
AD, Lodsd_EAX_m32, Legacy, INTEL386, fr=d op0=w op1=r w=rax rw=rsi rm=ds:rsi;UInt32
# lodsq
48 AD, Lodsq_RAX_m64, Legacy, X64, fr=d op0=w op1=r w=rax rw=rsi rm=ds:rsi;UInt64
# scasb
AE, Scasb_AL_m8, Legacy, INTEL8086, fr=d fw=oszacp op0=r op1=r r=al rw=rdi rm=es:rdi;UInt8
# scasw
66 AF, Scasw_AX_m16, Legacy, INTEL8086, fr=d fw=oszacp op0=r op1=r r=ax rw=rdi rm=es:rdi;UInt16
# scasd
AF, Scasd_EAX_m32, Legacy, INTEL386, fr=d fw=oszacp op0=r op1=r r=eax rw=rdi rm=es:rdi;UInt32
# scasq
48 AF, Scasq_RAX_m64, Legacy, X64, fr=d fw=oszacp op0=r op1=r r=rax rw=rdi rm=es:rdi;UInt64
# mov al,5Ah
B0 5A, Mov_r8_imm8, Legacy, INTEL8086, op0=w op1=r w=al
# mov r8b,5Ah
41 B0 5A, Mov_r8_imm8, Legacy, INTEL8086, op0=w op1=r w=r8l
# mov cl,0A5h
B1 A5, Mov_r8_imm8, Legacy, INTEL8086, op0=w op1=r w=cl
# mov r9b,0A5h
41 B1 A5, Mov_r8_imm8, Legacy, INTEL8086, op0=w op1=r w=r9l
# mov dl,5Ah
B2 5A, Mov_r8_imm8, Legacy, INTEL8086, op0=w op1=r w=dl
# mov r10b,5Ah
41 B2 5A, Mov_r8_imm8, Legacy, INTEL8086, op0=w op1=r w=r10l
# mov bl,0A5h
B3 A5, Mov_r8_imm8, Legacy, INTEL8086, op0=w op1=r w=bl
# mov r11b,0A5h
41 B3 A5, Mov_r8_imm8, Legacy, INTEL8086, op0=w op1=r w=r11l
# mov ah,5Ah
B4 5A, Mov_r8_imm8, Legacy, INTEL8086, op0=w op1=r w=ah
# mov spl,5Ah
40 B4 5A, Mov_r8_imm8, Legacy, INTEL8086, op0=w op1=r w=spl
# mov r12b,5Ah
41 B4 5A, Mov_r8_imm8, Legacy, INTEL8086, op0=w op1=r w=r12l
# mov ch,0A5h
B5 A5, Mov_r8_imm8, Legacy, INTEL8086, op0=w op1=r w=ch
# mov bpl,0A5h
40 B5 A5, Mov_r8_imm8, Legacy, INTEL8086, op0=w op1=r w=bpl
# mov r13b,0A5h
41 B5 A5, Mov_r8_imm8, Legacy, INTEL8086, op0=w op1=r w=r13l
# mov dh,5Ah
B6 5A, Mov_r8_imm8, Legacy, INTEL8086, op0=w op1=r w=dh
# mov sil,5Ah
40 B6 5A, Mov_r8_imm8, Legacy, INTEL8086, op0=w op1=r w=sil
# mov r14b,5Ah
41 B6 5A, Mov_r8_imm8, Legacy, INTEL8086, op0=w op1=r w=r14l
# mov bh,0A5h
B7 A5, Mov_r8_imm8, Legacy, INTEL8086, op0=w op1=r w=bh
# mov dil,0A5h
40 B7 A5, Mov_r8_imm8, Legacy, INTEL8086, op0=w op1=r w=dil
# mov r15b,0A5h
41 B7 A5, Mov_r8_imm8, Legacy, INTEL8086, op0=w op1=r w=r15l
# mov ax,0A55Ah
66 B8 5AA5, Mov_r16_imm16, Legacy, INTEL8086, op0=w op1=r w=ax
# mov r8w,0A55Ah
66 41 B8 5AA5, Mov_r16_imm16, Legacy, INTEL8086, op0=w op1=r w=r8w
# mov eax,3412A55Ah
B8 5AA51234, Mov_r32_imm32, Legacy, INTEL386, op0=w op1=r w=rax
# mov r8d,3412A55Ah
41 B8 5AA51234, Mov_r32_imm32, Legacy, INTEL386, op0=w op1=r w=r8
# mov rax,3412A55A37261504h
48 B8 041526375AA51234, Mov_r64_imm64, Legacy, X64, op0=w op1=r w=rax
# mov r8,3412A55A37261504h
49 B8 041526375AA51234, Mov_r64_imm64, Legacy, X64, op0=w op1=r w=r8
# mov cx,5AA5h
66 B9 A55A, Mov_r16_imm16, Legacy, INTEL8086, op0=w op1=r w=cx
# mov r9w,5AA5h
66 41 B9 A55A, Mov_r16_imm16, Legacy, INTEL8086, op0=w op1=r w=r9w
# mov ecx,78565AA5h
B9 A55A5678, Mov_r32_imm32, Legacy, INTEL386, op0=w op1=r w=rcx
# mov r9d,78565AA5h
41 B9 A55A5678, Mov_r32_imm32, Legacy, INTEL386, op0=w op1=r w=r9
# mov rcx,78565AA537261504h
48 B9 04152637A55A5678, Mov_r64_imm64, Legacy, X64, op0=w op1=r w=rcx
# mov r9,78565AA537261504h
49 B9 04152637A55A5678, Mov_r64_imm64, Legacy, X64, op0=w op1=r w=r9
# mov dx,0A55Ah
66 BA 5AA5, Mov_r16_imm16, Legacy, INTEL8086, op0=w op1=r w=dx
# mov r10w,0A55Ah
66 41 BA 5AA5, Mov_r16_imm16, Legacy, INTEL8086, op0=w op1=r w=r10w
# mov edx,3412A55Ah
BA 5AA51234, Mov_r32_imm32, Legacy, INTEL386, op0=w op1=r w=rdx
# mov r10d,3412A55Ah
41 BA 5AA51234, Mov_r32_imm32, Legacy, INTEL386, op0=w op1=r w=r10
# mov rdx,3412A55A37261504h
48 BA 041526375AA51234, Mov_r64_imm64, Legacy, X64, op0=w op1=r w=rdx
# mov r10,3412A55A37261504h
49 BA 041526375AA51234, Mov_r64_imm64, Legacy, X64, op0=w op1=r w=r10
# mov bx,5AA5h
66 BB A55A, Mov_r16_imm16, Legacy, INTEL8086, op0=w op1=r w=bx
# mov r11w,5AA5h
66 41 BB A55A, Mov_r16_imm16, Legacy, INTEL8086, op0=w op1=r w=r11w
# mov ebx,78565AA5h
BB A55A5678, Mov_r32_imm32, Legacy, INTEL386, op0=w op1=r w=rbx
# mov r11d,78565AA5h
41 BB A55A5678, Mov_r32_imm32, Legacy, INTEL386, op0=w op1=r w=r11
# mov rbx,78565AA537261504h
48 BB 04152637A55A5678, Mov_r64_imm64, Legacy, X64, op0=w op1=r w=rbx
# mov r11,78565AA537261504h
49 BB 04152637A55A5678, Mov_r64_imm64, Legacy, X64, op0=w op1=r w=r11
# mov sp,0A55Ah
66 BC 5AA5, Mov_r16_imm16, Legacy, INTEL8086, op0=w op1=r w=sp
# mov r12w,0A55Ah
66 41 BC 5AA5, Mov_r16_imm16, Legacy, INTEL8086, op0=w op1=r w=r12w
# mov esp,3412A55Ah
BC 5AA51234, Mov_r32_imm32, Legacy, INTEL386, op0=w op1=r w=rsp
# mov r12d,3412A55Ah
41 BC 5AA51234, Mov_r32_imm32, Legacy, INTEL386, op0=w op1=r w=r12
# mov rsp,3412A55A37261504h
48 BC 041526375AA51234, Mov_r64_imm64, Legacy, X64, op0=w op1=r w=rsp
# mov r12,3412A55A37261504h
49 BC 041526375AA51234, Mov_r64_imm64, Legacy, X64, op0=w op1=r w=r12
# mov bp,5AA5h
66 BD A55A, Mov_r16_imm16, Legacy, INTEL8086, op0=w op1=r w=bp
# mov r13w,5AA5h
66 41 BD A55A, Mov_r16_imm16, Legacy, INTEL8086, op0=w op1=r w=r13w
# mov ebp,78565AA5h
BD A55A5678, Mov_r32_imm32, Legacy, INTEL386, op0=w op1=r w=rbp
# mov r13d,78565AA5h
41 BD A55A5678, Mov_r32_imm32, Legacy, INTEL386, op0=w op1=r w=r13
# mov rbp,78565AA537261504h
48 BD 04152637A55A5678, Mov_r64_imm64, Legacy, X64, op0=w op1=r w=rbp
# mov r13,78565AA537261504h
49 BD 04152637A55A5678, Mov_r64_imm64, Legacy, X64, op0=w op1=r w=r13
# mov si,0A55Ah
66 BE 5AA5, Mov_r16_imm16, Legacy, INTEL8086, op0=w op1=r w=si
# mov r14w,0A55Ah
66 41 BE 5AA5, Mov_r16_imm16, Legacy, INTEL8086, op0=w op1=r w=r14w
# mov esi,3412A55Ah
BE 5AA51234, Mov_r32_imm32, Legacy, INTEL386, op0=w op1=r w=rsi
# mov r14d,3412A55Ah
41 BE 5AA51234, Mov_r32_imm32, Legacy, INTEL386, op0=w op1=r w=r14
# mov rsi,3412A55A37261504h
48 BE 041526375AA51234, Mov_r64_imm64, Legacy, X64, op0=w op1=r w=rsi
# mov r14,3412A55A37261504h
49 BE 041526375AA51234, Mov_r64_imm64, Legacy, X64, op0=w op1=r w=r14
# mov di,5AA5h
66 BF A55A, Mov_r16_imm16, Legacy, INTEL8086, op0=w op1=r w=di
# mov r15w,5AA5h
66 41 BF A55A, Mov_r16_imm16, Legacy, INTEL8086, op0=w op1=r w=r15w
# mov edi,78565AA5h
BF A55A5678, Mov_r32_imm32, Legacy, INTEL386, op0=w op1=r w=rdi
# mov r15d,78565AA5h
41 BF A55A5678, Mov_r32_imm32, Legacy, INTEL386, op0=w op1=r w=r15
# mov rdi,78565AA537261504h
48 BF 04152637A55A5678, Mov_r64_imm64, Legacy, X64, op0=w op1=r w=rdi
# mov r15,78565AA537261504h
49 BF 04152637A55A5678, Mov_r64_imm64, Legacy, X64, op0=w op1=r w=r15
# rol cl,00h
C0 C1 00, Rol_rm8_imm8, Legacy, INTEL186, op0=rw op1=r rw=cl
# rol byte ptr [rax],00h
C0 00 00, Rol_rm8_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt8
# ror dl,00h
C0 CA 00, Ror_rm8_imm8, Legacy, INTEL186, op0=rw op1=r rw=dl
# ror byte ptr [rax],00h
C0 08 00, Ror_rm8_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt8
# rcl bl,00h
C0 D3 00, Rcl_rm8_imm8, Legacy, INTEL186, op0=rw op1=r rw=bl
# rcl byte ptr [rax],00h
C0 10 00, Rcl_rm8_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt8
# rcr ah,00h
C0 DC 00, Rcr_rm8_imm8, Legacy, INTEL186, op0=rw op1=r rw=ah
# rcr byte ptr [rax],00h
C0 18 00, Rcr_rm8_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt8
# shl ch,00h
C0 E5 00, Shl_rm8_imm8, Legacy, INTEL186, op0=rw op1=r rw=ch
# shl byte ptr [rax],00h
C0 20 00, Shl_rm8_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt8
# shr dh,00h
C0 EE 00, Shr_rm8_imm8, Legacy, INTEL186, op0=rw op1=r rw=dh
# shr byte ptr [rax],00h
C0 28 00, Shr_rm8_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt8
# sal ch,00h
C0 F5 00, Sal_rm8_imm8, Legacy, INTEL186, op0=rw op1=r rw=ch
# sal byte ptr [rax],00h
C0 30 00, Sal_rm8_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt8
# sar al,00h
C0 F8 00, Sar_rm8_imm8, Legacy, INTEL186, op0=rw op1=r rw=al
# sar byte ptr [rax],00h
C0 38 00, Sar_rm8_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;Int8
# rol cx,00h
66 C1 C1 00, Rol_rm16_imm8, Legacy, INTEL186, op0=rw op1=r rw=cx
# rol word ptr [rax],00h
66 C1 00 00, Rol_rm16_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt16
# rol ecx,00h
C1 C1 00, Rol_rm32_imm8, Legacy, INTEL386, op0=rw op1=r w=rcx r=ecx
# rol dword ptr [rax],00h
C1 00 00, Rol_rm32_imm8, Legacy, INTEL386, op0=rw op1=r r=rax rwm=ds:rax;UInt32
# rol rcx,00h
48 C1 C1 00, Rol_rm64_imm8, Legacy, X64, op0=rw op1=r rw=rcx
# rol qword ptr [rax],00h
48 C1 00 00, Rol_rm64_imm8, Legacy, X64, op0=rw op1=r r=rax rwm=ds:rax;UInt64
# ror dx,00h
66 C1 CA 00, Ror_rm16_imm8, Legacy, INTEL186, op0=rw op1=r rw=dx
# ror word ptr [rax],00h
66 C1 08 00, Ror_rm16_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt16
# ror edx,00h
C1 CA 00, Ror_rm32_imm8, Legacy, INTEL386, op0=rw op1=r w=rdx r=edx
# ror dword ptr [rax],00h
C1 08 00, Ror_rm32_imm8, Legacy, INTEL386, op0=rw op1=r r=rax rwm=ds:rax;UInt32
# ror rdx,00h
48 C1 CA 00, Ror_rm64_imm8, Legacy, X64, op0=rw op1=r rw=rdx
# ror qword ptr [rax],00h
48 C1 08 00, Ror_rm64_imm8, Legacy, X64, op0=rw op1=r r=rax rwm=ds:rax;UInt64
# rcl bx,00h
66 C1 D3 00, Rcl_rm16_imm8, Legacy, INTEL186, op0=rw op1=r rw=bx
# rcl word ptr [rax],00h
66 C1 10 00, Rcl_rm16_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt16
# rcl ebx,00h
C1 D3 00, Rcl_rm32_imm8, Legacy, INTEL386, op0=rw op1=r w=rbx r=ebx
# rcl dword ptr [rax],00h
C1 10 00, Rcl_rm32_imm8, Legacy, INTEL386, op0=rw op1=r r=rax rwm=ds:rax;UInt32
# rcl rbx,00h
48 C1 D3 00, Rcl_rm64_imm8, Legacy, X64, op0=rw op1=r rw=rbx
# rcl qword ptr [rax],00h
48 C1 10 00, Rcl_rm64_imm8, Legacy, X64, op0=rw op1=r r=rax rwm=ds:rax;UInt64
# rcr sp,00h
66 C1 DC 00, Rcr_rm16_imm8, Legacy, INTEL186, op0=rw op1=r rw=sp
# rcr word ptr [rax],00h
66 C1 18 00, Rcr_rm16_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt16
# rcr esp,00h
C1 DC 00, Rcr_rm32_imm8, Legacy, INTEL386, op0=rw op1=r w=rsp r=esp
# rcr dword ptr [rax],00h
C1 18 00, Rcr_rm32_imm8, Legacy, INTEL386, op0=rw op1=r r=rax rwm=ds:rax;UInt32
# rcr rsp,00h
48 C1 DC 00, Rcr_rm64_imm8, Legacy, X64, op0=rw op1=r rw=rsp
# rcr qword ptr [rax],00h
48 C1 18 00, Rcr_rm64_imm8, Legacy, X64, op0=rw op1=r r=rax rwm=ds:rax;UInt64
# shl bp,00h
66 C1 E5 00, Shl_rm16_imm8, Legacy, INTEL186, op0=rw op1=r rw=bp
# shl word ptr [rax],00h
66 C1 20 00, Shl_rm16_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt16
# shl ebp,00h
C1 E5 00, Shl_rm32_imm8, Legacy, INTEL386, op0=rw op1=r w=rbp r=ebp
# shl dword ptr [rax],00h
C1 20 00, Shl_rm32_imm8, Legacy, INTEL386, op0=rw op1=r r=rax rwm=ds:rax;UInt32
# shl rbp,00h
48 C1 E5 00, Shl_rm64_imm8, Legacy, X64, op0=rw op1=r rw=rbp
# shl qword ptr [rax],00h
48 C1 20 00, Shl_rm64_imm8, Legacy, X64, op0=rw op1=r r=rax rwm=ds:rax;UInt64
# shr si,00h
66 C1 EE 00, Shr_rm16_imm8, Legacy, INTEL186, op0=rw op1=r rw=si
# shr word ptr [rax],00h
66 C1 28 00, Shr_rm16_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt16
# shr esi,00h
C1 EE 00, Shr_rm32_imm8, Legacy, INTEL386, op0=rw op1=r w=rsi r=esi
# shr dword ptr [rax],00h
C1 28 00, Shr_rm32_imm8, Legacy, INTEL386, op0=rw op1=r r=rax rwm=ds:rax;UInt32
# shr rsi,00h
48 C1 EE 00, Shr_rm64_imm8, Legacy, X64, op0=rw op1=r rw=rsi
# shr qword ptr [rax],00h
48 C1 28 00, Shr_rm64_imm8, Legacy, X64, op0=rw op1=r r=rax rwm=ds:rax;UInt64
# sal bp,00h
66 C1 F5 00, Sal_rm16_imm8, Legacy, INTEL186, op0=rw op1=r rw=bp
# sal word ptr [rax],00h
66 C1 30 00, Sal_rm16_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt16
# sal ebp,00h
C1 F5 00, Sal_rm32_imm8, Legacy, INTEL386, op0=rw op1=r w=rbp r=ebp
# sal dword ptr [rax],00h
C1 30 00, Sal_rm32_imm8, Legacy, INTEL386, op0=rw op1=r r=rax rwm=ds:rax;UInt32
# sal rbp,00h
48 C1 F5 00, Sal_rm64_imm8, Legacy, X64, op0=rw op1=r rw=rbp
# sal qword ptr [rax],00h
48 C1 30 00, Sal_rm64_imm8, Legacy, X64, op0=rw op1=r r=rax rwm=ds:rax;UInt64
# sar ax,00h
66 C1 F8 00, Sar_rm16_imm8, Legacy, INTEL186, op0=rw op1=r rw=ax
# sar word ptr [rax],00h
66 C1 38 00, Sar_rm16_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;Int16
# sar eax,00h
C1 F8 00, Sar_rm32_imm8, Legacy, INTEL386, op0=rw op1=r w=rax r=eax
# sar dword ptr [rax],00h
C1 38 00, Sar_rm32_imm8, Legacy, INTEL386, op0=rw op1=r r=rax rwm=ds:rax;Int32
# sar r8,00h
49 C1 F8 00, Sar_rm64_imm8, Legacy, X64, op0=rw op1=r rw=r8
# sar qword ptr [rax],00h
48 C1 38 00, Sar_rm64_imm8, Legacy, X64, op0=rw op1=r r=rax rwm=ds:rax;Int64
# rol cl,01h
C0 C1 01, Rol_rm8_imm8, Legacy, INTEL186, fw=co op0=rw op1=r rw=cl
# rol byte ptr [rax],01h
C0 00 01, Rol_rm8_imm8, Legacy, INTEL186, fw=co op0=rw op1=r r=rax rwm=ds:rax;UInt8
# ror dl,01h
C0 CA 01, Ror_rm8_imm8, Legacy, INTEL186, fw=co op0=rw op1=r rw=dl
# ror byte ptr [rax],01h
C0 08 01, Ror_rm8_imm8, Legacy, INTEL186, fw=co op0=rw op1=r r=rax rwm=ds:rax;UInt8
# rcl bl,01h
C0 D3 01, Rcl_rm8_imm8, Legacy, INTEL186, fr=c fw=co op0=rw op1=r rw=bl
# rcl byte ptr [rax],01h
C0 10 01, Rcl_rm8_imm8, Legacy, INTEL186, fr=c fw=co op0=rw op1=r r=rax rwm=ds:rax;UInt8
# rcr ah,01h
C0 DC 01, Rcr_rm8_imm8, Legacy, INTEL186, fr=c fw=co op0=rw op1=r rw=ah
# rcr byte ptr [rax],01h
C0 18 01, Rcr_rm8_imm8, Legacy, INTEL186, fr=c fw=co op0=rw op1=r r=rax rwm=ds:rax;UInt8
# shl ch,01h
C0 E5 01, Shl_rm8_imm8, Legacy, INTEL186, fw=coszp fu=a op0=rw op1=r rw=ch
# shl byte ptr [rax],01h
C0 20 01, Shl_rm8_imm8, Legacy, INTEL186, fw=coszp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt8
# shr dh,01h
C0 EE 01, Shr_rm8_imm8, Legacy, INTEL186, fw=coszp fu=a op0=rw op1=r rw=dh
# shr byte ptr [rax],01h
C0 28 01, Shr_rm8_imm8, Legacy, INTEL186, fw=coszp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt8
# sal ch,01h
C0 F5 01, Sal_rm8_imm8, Legacy, INTEL186, fw=coszp fu=a op0=rw op1=r rw=ch
# sal byte ptr [rax],01h
C0 30 01, Sal_rm8_imm8, Legacy, INTEL186, fw=coszp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt8
# sar al,01h
C0 F8 01, Sar_rm8_imm8, Legacy, INTEL186, fw=coszp fu=a op0=rw op1=r rw=al
# sar byte ptr [rax],01h
C0 38 01, Sar_rm8_imm8, Legacy, INTEL186, fw=coszp fu=a op0=rw op1=r r=rax rwm=ds:rax;Int8
# rol cx,01h
66 C1 C1 01, Rol_rm16_imm8, Legacy, INTEL186, fw=co op0=rw op1=r rw=cx
# rol word ptr [rax],01h
66 C1 00 01, Rol_rm16_imm8, Legacy, INTEL186, fw=co op0=rw op1=r r=rax rwm=ds:rax;UInt16
# rol ecx,01h
C1 C1 01, Rol_rm32_imm8, Legacy, INTEL386, fw=co op0=rw op1=r w=rcx r=ecx
# rol dword ptr [rax],01h
C1 00 01, Rol_rm32_imm8, Legacy, INTEL386, fw=co op0=rw op1=r r=rax rwm=ds:rax;UInt32
# rol rcx,01h
48 C1 C1 01, Rol_rm64_imm8, Legacy, X64, fw=co op0=rw op1=r rw=rcx
# rol qword ptr [rax],01h
48 C1 00 01, Rol_rm64_imm8, Legacy, X64, fw=co op0=rw op1=r r=rax rwm=ds:rax;UInt64
# ror dx,01h
66 C1 CA 01, Ror_rm16_imm8, Legacy, INTEL186, fw=co op0=rw op1=r rw=dx
# ror word ptr [rax],01h
66 C1 08 01, Ror_rm16_imm8, Legacy, INTEL186, fw=co op0=rw op1=r r=rax rwm=ds:rax;UInt16
# ror edx,01h
C1 CA 01, Ror_rm32_imm8, Legacy, INTEL386, fw=co op0=rw op1=r w=rdx r=edx
# ror dword ptr [rax],01h
C1 08 01, Ror_rm32_imm8, Legacy, INTEL386, fw=co op0=rw op1=r r=rax rwm=ds:rax;UInt32
# ror rdx,01h
48 C1 CA 01, Ror_rm64_imm8, Legacy, X64, fw=co op0=rw op1=r rw=rdx
# ror qword ptr [rax],01h
48 C1 08 01, Ror_rm64_imm8, Legacy, X64, fw=co op0=rw op1=r r=rax rwm=ds:rax;UInt64
# rcl bx,01h
66 C1 D3 01, Rcl_rm16_imm8, Legacy, INTEL186, fr=c fw=co op0=rw op1=r rw=bx
# rcl word ptr [rax],01h
66 C1 10 01, Rcl_rm16_imm8, Legacy, INTEL186, fr=c fw=co op0=rw op1=r r=rax rwm=ds:rax;UInt16
# rcl ebx,01h
C1 D3 01, Rcl_rm32_imm8, Legacy, INTEL386, fr=c fw=co op0=rw op1=r w=rbx r=ebx
# rcl dword ptr [rax],01h
C1 10 01, Rcl_rm32_imm8, Legacy, INTEL386, fr=c fw=co op0=rw op1=r r=rax rwm=ds:rax;UInt32
# rcl rbx,01h
48 C1 D3 01, Rcl_rm64_imm8, Legacy, X64, fr=c fw=co op0=rw op1=r rw=rbx
# rcl qword ptr [rax],01h
48 C1 10 01, Rcl_rm64_imm8, Legacy, X64, fr=c fw=co op0=rw op1=r r=rax rwm=ds:rax;UInt64
# rcr sp,01h
66 C1 DC 01, Rcr_rm16_imm8, Legacy, INTEL186, fr=c fw=co op0=rw op1=r rw=sp
# rcr word ptr [rax],01h
66 C1 18 01, Rcr_rm16_imm8, Legacy, INTEL186, fr=c fw=co op0=rw op1=r r=rax rwm=ds:rax;UInt16
# rcr esp,01h
C1 DC 01, Rcr_rm32_imm8, Legacy, INTEL386, fr=c fw=co op0=rw op1=r w=rsp r=esp
# rcr dword ptr [rax],01h
C1 18 01, Rcr_rm32_imm8, Legacy, INTEL386, fr=c fw=co op0=rw op1=r r=rax rwm=ds:rax;UInt32
# rcr rsp,01h
48 C1 DC 01, Rcr_rm64_imm8, Legacy, X64, fr=c fw=co op0=rw op1=r rw=rsp
# rcr qword ptr [rax],01h
48 C1 18 01, Rcr_rm64_imm8, Legacy, X64, fr=c fw=co op0=rw op1=r r=rax rwm=ds:rax;UInt64
# shl bp,01h
66 C1 E5 01, Shl_rm16_imm8, Legacy, INTEL186, fw=coszp fu=a op0=rw op1=r rw=bp
# shl word ptr [rax],01h
66 C1 20 01, Shl_rm16_imm8, Legacy, INTEL186, fw=coszp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt16
# shl ebp,01h
C1 E5 01, Shl_rm32_imm8, Legacy, INTEL386, fw=coszp fu=a op0=rw op1=r w=rbp r=ebp
# shl dword ptr [rax],01h
C1 20 01, Shl_rm32_imm8, Legacy, INTEL386, fw=coszp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt32
# shl rbp,01h
48 C1 E5 01, Shl_rm64_imm8, Legacy, X64, fw=coszp fu=a op0=rw op1=r rw=rbp
# shl qword ptr [rax],01h
48 C1 20 01, Shl_rm64_imm8, Legacy, X64, fw=coszp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt64
# shr si,01h
66 C1 EE 01, Shr_rm16_imm8, Legacy, INTEL186, fw=coszp fu=a op0=rw op1=r rw=si
# shr word ptr [rax],01h
66 C1 28 01, Shr_rm16_imm8, Legacy, INTEL186, fw=coszp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt16
# shr esi,01h
C1 EE 01, Shr_rm32_imm8, Legacy, INTEL386, fw=coszp fu=a op0=rw op1=r w=rsi r=esi
# shr dword ptr [rax],01h
C1 28 01, Shr_rm32_imm8, Legacy, INTEL386, fw=coszp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt32
# shr rsi,01h
48 C1 EE 01, Shr_rm64_imm8, Legacy, X64, fw=coszp fu=a op0=rw op1=r rw=rsi
# shr qword ptr [rax],01h
48 C1 28 01, Shr_rm64_imm8, Legacy, X64, fw=coszp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt64
# sal bp,01h
66 C1 F5 01, Sal_rm16_imm8, Legacy, INTEL186, fw=coszp fu=a op0=rw op1=r rw=bp
# sal word ptr [rax],01h
66 C1 30 01, Sal_rm16_imm8, Legacy, INTEL186, fw=coszp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt16
# sal ebp,01h
C1 F5 01, Sal_rm32_imm8, Legacy, INTEL386, fw=coszp fu=a op0=rw op1=r w=rbp r=ebp
# sal dword ptr [rax],01h
C1 30 01, Sal_rm32_imm8, Legacy, INTEL386, fw=coszp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt32
# sal rbp,01h
48 C1 F5 01, Sal_rm64_imm8, Legacy, X64, fw=coszp fu=a op0=rw op1=r rw=rbp
# sal qword ptr [rax],01h
48 C1 30 01, Sal_rm64_imm8, Legacy, X64, fw=coszp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt64
# sar ax,01h
66 C1 F8 01, Sar_rm16_imm8, Legacy, INTEL186, fw=coszp fu=a op0=rw op1=r rw=ax
# sar word ptr [rax],01h
66 C1 38 01, Sar_rm16_imm8, Legacy, INTEL186, fw=coszp fu=a op0=rw op1=r r=rax rwm=ds:rax;Int16
# sar eax,01h
C1 F8 01, Sar_rm32_imm8, Legacy, INTEL386, fw=coszp fu=a op0=rw op1=r w=rax r=eax
# sar dword ptr [rax],01h
C1 38 01, Sar_rm32_imm8, Legacy, INTEL386, fw=coszp fu=a op0=rw op1=r r=rax rwm=ds:rax;Int32
# sar r8,01h
49 C1 F8 01, Sar_rm64_imm8, Legacy, X64, fw=coszp fu=a op0=rw op1=r rw=r8
# sar qword ptr [rax],01h
48 C1 38 01, Sar_rm64_imm8, Legacy, X64, fw=coszp fu=a op0=rw op1=r r=rax rwm=ds:rax;Int64
# rol cl,02h
C0 C1 02, Rol_rm8_imm8, Legacy, INTEL186, fw=c fu=o op0=rw op1=r rw=cl
# rol byte ptr [rax],02h
C0 00 02, Rol_rm8_imm8, Legacy, INTEL186, fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt8
# ror dl,02h
C0 CA 02, Ror_rm8_imm8, Legacy, INTEL186, fw=c fu=o op0=rw op1=r rw=dl
# ror byte ptr [rax],02h
C0 08 02, Ror_rm8_imm8, Legacy, INTEL186, fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt8
# rcl bl,02h
C0 D3 02, Rcl_rm8_imm8, Legacy, INTEL186, fr=c fw=c fu=o op0=rw op1=r rw=bl
# rcl byte ptr [rax],02h
C0 10 02, Rcl_rm8_imm8, Legacy, INTEL186, fr=c fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt8
# rcr ah,02h
C0 DC 02, Rcr_rm8_imm8, Legacy, INTEL186, fr=c fw=c fu=o op0=rw op1=r rw=ah
# rcr byte ptr [rax],02h
C0 18 02, Rcr_rm8_imm8, Legacy, INTEL186, fr=c fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt8
# shl ch,02h
C0 E5 02, Shl_rm8_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r rw=ch
# shl byte ptr [rax],02h
C0 20 02, Shl_rm8_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt8
# shr dh,02h
C0 EE 02, Shr_rm8_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r rw=dh
# shr byte ptr [rax],02h
C0 28 02, Shr_rm8_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt8
# sal ch,02h
C0 F5 02, Sal_rm8_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r rw=ch
# sal byte ptr [rax],02h
C0 30 02, Sal_rm8_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt8
# sar al,02h
C0 F8 02, Sar_rm8_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r rw=al
# sar byte ptr [rax],02h
C0 38 02, Sar_rm8_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;Int8
# rol cx,02h
66 C1 C1 02, Rol_rm16_imm8, Legacy, INTEL186, fw=c fu=o op0=rw op1=r rw=cx
# rol word ptr [rax],02h
66 C1 00 02, Rol_rm16_imm8, Legacy, INTEL186, fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt16
# rol ecx,02h
C1 C1 02, Rol_rm32_imm8, Legacy, INTEL386, fw=c fu=o op0=rw op1=r w=rcx r=ecx
# rol dword ptr [rax],02h
C1 00 02, Rol_rm32_imm8, Legacy, INTEL386, fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt32
# rol rcx,02h
48 C1 C1 02, Rol_rm64_imm8, Legacy, X64, fw=c fu=o op0=rw op1=r rw=rcx
# rol qword ptr [rax],02h
48 C1 00 02, Rol_rm64_imm8, Legacy, X64, fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt64
# ror dx,02h
66 C1 CA 02, Ror_rm16_imm8, Legacy, INTEL186, fw=c fu=o op0=rw op1=r rw=dx
# ror word ptr [rax],02h
66 C1 08 02, Ror_rm16_imm8, Legacy, INTEL186, fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt16
# ror edx,02h
C1 CA 02, Ror_rm32_imm8, Legacy, INTEL386, fw=c fu=o op0=rw op1=r w=rdx r=edx
# ror dword ptr [rax],02h
C1 08 02, Ror_rm32_imm8, Legacy, INTEL386, fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt32
# ror rdx,02h
48 C1 CA 02, Ror_rm64_imm8, Legacy, X64, fw=c fu=o op0=rw op1=r rw=rdx
# ror qword ptr [rax],02h
48 C1 08 02, Ror_rm64_imm8, Legacy, X64, fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt64
# rcl bx,02h
66 C1 D3 02, Rcl_rm16_imm8, Legacy, INTEL186, fr=c fw=c fu=o op0=rw op1=r rw=bx
# rcl word ptr [rax],02h
66 C1 10 02, Rcl_rm16_imm8, Legacy, INTEL186, fr=c fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt16
# rcl ebx,02h
C1 D3 02, Rcl_rm32_imm8, Legacy, INTEL386, fr=c fw=c fu=o op0=rw op1=r w=rbx r=ebx
# rcl dword ptr [rax],02h
C1 10 02, Rcl_rm32_imm8, Legacy, INTEL386, fr=c fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt32
# rcl rbx,02h
48 C1 D3 02, Rcl_rm64_imm8, Legacy, X64, fr=c fw=c fu=o op0=rw op1=r rw=rbx
# rcl qword ptr [rax],02h
48 C1 10 02, Rcl_rm64_imm8, Legacy, X64, fr=c fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt64
# rcr sp,02h
66 C1 DC 02, Rcr_rm16_imm8, Legacy, INTEL186, fr=c fw=c fu=o op0=rw op1=r rw=sp
# rcr word ptr [rax],02h
66 C1 18 02, Rcr_rm16_imm8, Legacy, INTEL186, fr=c fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt16
# rcr esp,02h
C1 DC 02, Rcr_rm32_imm8, Legacy, INTEL386, fr=c fw=c fu=o op0=rw op1=r w=rsp r=esp
# rcr dword ptr [rax],02h
C1 18 02, Rcr_rm32_imm8, Legacy, INTEL386, fr=c fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt32
# rcr rsp,02h
48 C1 DC 02, Rcr_rm64_imm8, Legacy, X64, fr=c fw=c fu=o op0=rw op1=r rw=rsp
# rcr qword ptr [rax],02h
48 C1 18 02, Rcr_rm64_imm8, Legacy, X64, fr=c fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt64
# shl bp,02h
66 C1 E5 02, Shl_rm16_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r rw=bp
# shl word ptr [rax],02h
66 C1 20 02, Shl_rm16_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt16
# shl ebp,02h
C1 E5 02, Shl_rm32_imm8, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r w=rbp r=ebp
# shl dword ptr [rax],02h
C1 20 02, Shl_rm32_imm8, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt32
# shl rbp,02h
48 C1 E5 02, Shl_rm64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r rw=rbp
# shl qword ptr [rax],02h
48 C1 20 02, Shl_rm64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt64
# shr si,02h
66 C1 EE 02, Shr_rm16_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r rw=si
# shr word ptr [rax],02h
66 C1 28 02, Shr_rm16_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt16
# shr esi,02h
C1 EE 02, Shr_rm32_imm8, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r w=rsi r=esi
# shr dword ptr [rax],02h
C1 28 02, Shr_rm32_imm8, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt32
# shr rsi,02h
48 C1 EE 02, Shr_rm64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r rw=rsi
# shr qword ptr [rax],02h
48 C1 28 02, Shr_rm64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt64
# sal bp,02h
66 C1 F5 02, Sal_rm16_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r rw=bp
# sal word ptr [rax],02h
66 C1 30 02, Sal_rm16_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt16
# sal ebp,02h
C1 F5 02, Sal_rm32_imm8, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r w=rbp r=ebp
# sal dword ptr [rax],02h
C1 30 02, Sal_rm32_imm8, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt32
# sal rbp,02h
48 C1 F5 02, Sal_rm64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r rw=rbp
# sal qword ptr [rax],02h
48 C1 30 02, Sal_rm64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt64
# sar ax,02h
66 C1 F8 02, Sar_rm16_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r rw=ax
# sar word ptr [rax],02h
66 C1 38 02, Sar_rm16_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;Int16
# sar eax,02h
C1 F8 02, Sar_rm32_imm8, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r w=rax r=eax
# sar dword ptr [rax],02h
C1 38 02, Sar_rm32_imm8, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;Int32
# sar r8,02h
49 C1 F8 02, Sar_rm64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r rw=r8
# sar qword ptr [rax],02h
48 C1 38 02, Sar_rm64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;Int64
# rol cl,08h
C0 C1 08, Rol_rm8_imm8, Legacy, INTEL186, fw=c fu=o op0=rw op1=r rw=cl
# rol byte ptr [rax],08h
C0 00 08, Rol_rm8_imm8, Legacy, INTEL186, fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt8
# ror dl,08h
C0 CA 08, Ror_rm8_imm8, Legacy, INTEL186, fw=c fu=o op0=rw op1=r rw=dl
# ror byte ptr [rax],08h
C0 08 08, Ror_rm8_imm8, Legacy, INTEL186, fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt8
# rcl bl,08h
C0 D3 08, Rcl_rm8_imm8, Legacy, INTEL186, fr=c fw=c fu=o op0=rw op1=r rw=bl
# rcl byte ptr [rax],08h
C0 10 08, Rcl_rm8_imm8, Legacy, INTEL186, fr=c fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt8
# rcr ah,08h
C0 DC 08, Rcr_rm8_imm8, Legacy, INTEL186, fr=c fw=c fu=o op0=rw op1=r rw=ah
# rcr byte ptr [rax],08h
C0 18 08, Rcr_rm8_imm8, Legacy, INTEL186, fr=c fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt8
# shl ch,08h
C0 E5 08, Shl_rm8_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r rw=ch
# shl byte ptr [rax],08h
C0 20 08, Shl_rm8_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt8
# shr dh,08h
C0 EE 08, Shr_rm8_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r rw=dh
# shr byte ptr [rax],08h
C0 28 08, Shr_rm8_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt8
# sal ch,08h
C0 F5 08, Sal_rm8_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r rw=ch
# sal byte ptr [rax],08h
C0 30 08, Sal_rm8_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt8
# sar al,08h
C0 F8 08, Sar_rm8_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r rw=al
# sar byte ptr [rax],08h
C0 38 08, Sar_rm8_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;Int8
# rol cx,10h
66 C1 C1 10, Rol_rm16_imm8, Legacy, INTEL186, fw=c fu=o op0=rw op1=r rw=cx
# rol word ptr [rax],10h
66 C1 00 10, Rol_rm16_imm8, Legacy, INTEL186, fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt16
# rol ecx,7Fh
C1 C1 7F, Rol_rm32_imm8, Legacy, INTEL386, fw=c fu=o op0=rw op1=r w=rcx r=ecx
# rol dword ptr [rax],7Fh
C1 00 7F, Rol_rm32_imm8, Legacy, INTEL386, fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt32
# rol rcx,7Fh
48 C1 C1 7F, Rol_rm64_imm8, Legacy, X64, fw=c fu=o op0=rw op1=r rw=rcx
# rol qword ptr [rax],7Fh
48 C1 00 7F, Rol_rm64_imm8, Legacy, X64, fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt64
# ror dx,10h
66 C1 CA 10, Ror_rm16_imm8, Legacy, INTEL186, fw=c fu=o op0=rw op1=r rw=dx
# ror word ptr [rax],10h
66 C1 08 10, Ror_rm16_imm8, Legacy, INTEL186, fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt16
# ror edx,7Fh
C1 CA 7F, Ror_rm32_imm8, Legacy, INTEL386, fw=c fu=o op0=rw op1=r w=rdx r=edx
# ror dword ptr [rax],7Fh
C1 08 7F, Ror_rm32_imm8, Legacy, INTEL386, fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt32
# ror rdx,7Fh
48 C1 CA 7F, Ror_rm64_imm8, Legacy, X64, fw=c fu=o op0=rw op1=r rw=rdx
# ror qword ptr [rax],7Fh
48 C1 08 7F, Ror_rm64_imm8, Legacy, X64, fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt64
# rcl bx,10h
66 C1 D3 10, Rcl_rm16_imm8, Legacy, INTEL186, fr=c fw=c fu=o op0=rw op1=r rw=bx
# rcl word ptr [rax],10h
66 C1 10 10, Rcl_rm16_imm8, Legacy, INTEL186, fr=c fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt16
# rcl ebx,7Fh
C1 D3 7F, Rcl_rm32_imm8, Legacy, INTEL386, fr=c fw=c fu=o op0=rw op1=r w=rbx r=ebx
# rcl dword ptr [rax],7Fh
C1 10 7F, Rcl_rm32_imm8, Legacy, INTEL386, fr=c fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt32
# rcl rbx,7Fh
48 C1 D3 7F, Rcl_rm64_imm8, Legacy, X64, fr=c fw=c fu=o op0=rw op1=r rw=rbx
# rcl qword ptr [rax],7Fh
48 C1 10 7F, Rcl_rm64_imm8, Legacy, X64, fr=c fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt64
# rcr sp,10h
66 C1 DC 10, Rcr_rm16_imm8, Legacy, INTEL186, fr=c fw=c fu=o op0=rw op1=r rw=sp
# rcr word ptr [rax],10h
66 C1 18 10, Rcr_rm16_imm8, Legacy, INTEL186, fr=c fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt16
# rcr esp,7Fh
C1 DC 7F, Rcr_rm32_imm8, Legacy, INTEL386, fr=c fw=c fu=o op0=rw op1=r w=rsp r=esp
# rcr dword ptr [rax],7Fh
C1 18 7F, Rcr_rm32_imm8, Legacy, INTEL386, fr=c fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt32
# rcr rsp,7Fh
48 C1 DC 7F, Rcr_rm64_imm8, Legacy, X64, fr=c fw=c fu=o op0=rw op1=r rw=rsp
# rcr qword ptr [rax],7Fh
48 C1 18 7F, Rcr_rm64_imm8, Legacy, X64, fr=c fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt64
# shl bp,10h
66 C1 E5 10, Shl_rm16_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r rw=bp
# shl word ptr [rax],10h
66 C1 20 10, Shl_rm16_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt16
# shl ebp,7Fh
C1 E5 7F, Shl_rm32_imm8, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r w=rbp r=ebp
# shl dword ptr [rax],7Fh
C1 20 7F, Shl_rm32_imm8, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt32
# shl rbp,7Fh
48 C1 E5 7F, Shl_rm64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r rw=rbp
# shl qword ptr [rax],7Fh
48 C1 20 7F, Shl_rm64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt64
# shr si,10h
66 C1 EE 10, Shr_rm16_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r rw=si
# shr word ptr [rax],10h
66 C1 28 10, Shr_rm16_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt16
# shr esi,7Fh
C1 EE 7F, Shr_rm32_imm8, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r w=rsi r=esi
# shr dword ptr [rax],7Fh
C1 28 7F, Shr_rm32_imm8, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt32
# shr rsi,7Fh
48 C1 EE 7F, Shr_rm64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r rw=rsi
# shr qword ptr [rax],7Fh
48 C1 28 7F, Shr_rm64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt64
# sal bp,10h
66 C1 F5 10, Sal_rm16_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r rw=bp
# sal word ptr [rax],10h
66 C1 30 10, Sal_rm16_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt16
# sal ebp,7Fh
C1 F5 7F, Sal_rm32_imm8, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r w=rbp r=ebp
# sal dword ptr [rax],7Fh
C1 30 7F, Sal_rm32_imm8, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt32
# sal rbp,7Fh
48 C1 F5 7F, Sal_rm64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r rw=rbp
# sal qword ptr [rax],7Fh
48 C1 30 7F, Sal_rm64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt64
# sar ax,10h
66 C1 F8 10, Sar_rm16_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r rw=ax
# sar word ptr [rax],10h
66 C1 38 10, Sar_rm16_imm8, Legacy, INTEL186, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;Int16
# sar eax,7Fh
C1 F8 7F, Sar_rm32_imm8, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r w=rax r=eax
# sar dword ptr [rax],7Fh
C1 38 7F, Sar_rm32_imm8, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;Int32
# sar r8,7Fh
49 C1 F8 7F, Sar_rm64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r rw=r8
# sar qword ptr [rax],7Fh
48 C1 38 7F, Sar_rm64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;Int64
# rol cl,20h
C0 C1 20, Rol_rm8_imm8, Legacy, INTEL186, op0=rw op1=r rw=cl
# rol byte ptr [rax],20h
C0 00 20, Rol_rm8_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt8
# ror dl,20h
C0 CA 20, Ror_rm8_imm8, Legacy, INTEL186, op0=rw op1=r rw=dl
# ror byte ptr [rax],20h
C0 08 20, Ror_rm8_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt8
# rcl bl,29h
C0 D3 29, Rcl_rm8_imm8, Legacy, INTEL186, op0=rw op1=r rw=bl
# rcl byte ptr [rax],29h
C0 10 29, Rcl_rm8_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt8
# rcr ah,29h
C0 DC 29, Rcr_rm8_imm8, Legacy, INTEL186, op0=rw op1=r rw=ah
# rcr byte ptr [rax],29h
C0 18 29, Rcr_rm8_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt8
# shl ch,20h
C0 E5 20, Shl_rm8_imm8, Legacy, INTEL186, op0=rw op1=r rw=ch
# shl byte ptr [rax],20h
C0 20 20, Shl_rm8_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt8
# shr dh,20h
C0 EE 20, Shr_rm8_imm8, Legacy, INTEL186, op0=rw op1=r rw=dh
# shr byte ptr [rax],20h
C0 28 20, Shr_rm8_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt8
# sal ch,20h
C0 F5 20, Sal_rm8_imm8, Legacy, INTEL186, op0=rw op1=r rw=ch
# sal byte ptr [rax],20h
C0 30 20, Sal_rm8_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt8
# sar al,20h
C0 F8 20, Sar_rm8_imm8, Legacy, INTEL186, op0=rw op1=r rw=al
# sar byte ptr [rax],20h
C0 38 20, Sar_rm8_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;Int8
# rol cx,20h
66 C1 C1 20, Rol_rm16_imm8, Legacy, INTEL186, op0=rw op1=r rw=cx
# rol word ptr [rax],20h
66 C1 00 20, Rol_rm16_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt16
# rol ecx,20h
C1 C1 20, Rol_rm32_imm8, Legacy, INTEL386, op0=rw op1=r w=rcx r=ecx
# rol dword ptr [rax],20h
C1 00 20, Rol_rm32_imm8, Legacy, INTEL386, op0=rw op1=r r=rax rwm=ds:rax;UInt32
# rol rcx,40h
48 C1 C1 40, Rol_rm64_imm8, Legacy, X64, op0=rw op1=r rw=rcx
# rol qword ptr [rax],40h
48 C1 00 40, Rol_rm64_imm8, Legacy, X64, op0=rw op1=r r=rax rwm=ds:rax;UInt64
# ror dx,20h
66 C1 CA 20, Ror_rm16_imm8, Legacy, INTEL186, op0=rw op1=r rw=dx
# ror word ptr [rax],20h
66 C1 08 20, Ror_rm16_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt16
# ror edx,20h
C1 CA 20, Ror_rm32_imm8, Legacy, INTEL386, op0=rw op1=r w=rdx r=edx
# ror dword ptr [rax],20h
C1 08 20, Ror_rm32_imm8, Legacy, INTEL386, op0=rw op1=r r=rax rwm=ds:rax;UInt32
# ror rdx,40h
48 C1 CA 40, Ror_rm64_imm8, Legacy, X64, op0=rw op1=r rw=rdx
# ror qword ptr [rax],40h
48 C1 08 40, Ror_rm64_imm8, Legacy, X64, op0=rw op1=r r=rax rwm=ds:rax;UInt64
# rcl bx,31h
66 C1 D3 31, Rcl_rm16_imm8, Legacy, INTEL186, op0=rw op1=r rw=bx
# rcl word ptr [rax],31h
66 C1 10 31, Rcl_rm16_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt16
# rcl ebx,20h
C1 D3 20, Rcl_rm32_imm8, Legacy, INTEL386, op0=rw op1=r w=rbx r=ebx
# rcl dword ptr [rax],20h
C1 10 20, Rcl_rm32_imm8, Legacy, INTEL386, op0=rw op1=r r=rax rwm=ds:rax;UInt32
# rcl rbx,40h
48 C1 D3 40, Rcl_rm64_imm8, Legacy, X64, op0=rw op1=r rw=rbx
# rcl qword ptr [rax],40h
48 C1 10 40, Rcl_rm64_imm8, Legacy, X64, op0=rw op1=r r=rax rwm=ds:rax;UInt64
# rcr sp,31h
66 C1 DC 31, Rcr_rm16_imm8, Legacy, INTEL186, op0=rw op1=r rw=sp
# rcr word ptr [rax],31h
66 C1 18 31, Rcr_rm16_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt16
# rcr esp,20h
C1 DC 20, Rcr_rm32_imm8, Legacy, INTEL386, op0=rw op1=r w=rsp r=esp
# rcr dword ptr [rax],20h
C1 18 20, Rcr_rm32_imm8, Legacy, INTEL386, op0=rw op1=r r=rax rwm=ds:rax;UInt32
# rcr rsp,40h
48 C1 DC 40, Rcr_rm64_imm8, Legacy, X64, op0=rw op1=r rw=rsp
# rcr qword ptr [rax],40h
48 C1 18 40, Rcr_rm64_imm8, Legacy, X64, op0=rw op1=r r=rax rwm=ds:rax;UInt64
# shl bp,20h
66 C1 E5 20, Shl_rm16_imm8, Legacy, INTEL186, op0=rw op1=r rw=bp
# shl word ptr [rax],20h
66 C1 20 20, Shl_rm16_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt16
# shl ebp,20h
C1 E5 20, Shl_rm32_imm8, Legacy, INTEL386, op0=rw op1=r w=rbp r=ebp
# shl dword ptr [rax],20h
C1 20 20, Shl_rm32_imm8, Legacy, INTEL386, op0=rw op1=r r=rax rwm=ds:rax;UInt32
# shl rbp,40h
48 C1 E5 40, Shl_rm64_imm8, Legacy, X64, op0=rw op1=r rw=rbp
# shl qword ptr [rax],40h
48 C1 20 40, Shl_rm64_imm8, Legacy, X64, op0=rw op1=r r=rax rwm=ds:rax;UInt64
# shr si,20h
66 C1 EE 20, Shr_rm16_imm8, Legacy, INTEL186, op0=rw op1=r rw=si
# shr word ptr [rax],20h
66 C1 28 20, Shr_rm16_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt16
# shr esi,20h
C1 EE 20, Shr_rm32_imm8, Legacy, INTEL386, op0=rw op1=r w=rsi r=esi
# shr dword ptr [rax],20h
C1 28 20, Shr_rm32_imm8, Legacy, INTEL386, op0=rw op1=r r=rax rwm=ds:rax;UInt32
# shr rsi,40h
48 C1 EE 40, Shr_rm64_imm8, Legacy, X64, op0=rw op1=r rw=rsi
# shr qword ptr [rax],40h
48 C1 28 40, Shr_rm64_imm8, Legacy, X64, op0=rw op1=r r=rax rwm=ds:rax;UInt64
# sal bp,20h
66 C1 F5 20, Sal_rm16_imm8, Legacy, INTEL186, op0=rw op1=r rw=bp
# sal word ptr [rax],20h
66 C1 30 20, Sal_rm16_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;UInt16
# sal ebp,20h
C1 F5 20, Sal_rm32_imm8, Legacy, INTEL386, op0=rw op1=r w=rbp r=ebp
# sal dword ptr [rax],20h
C1 30 20, Sal_rm32_imm8, Legacy, INTEL386, op0=rw op1=r r=rax rwm=ds:rax;UInt32
# sal rbp,40h
48 C1 F5 40, Sal_rm64_imm8, Legacy, X64, op0=rw op1=r rw=rbp
# sal qword ptr [rax],40h
48 C1 30 40, Sal_rm64_imm8, Legacy, X64, op0=rw op1=r r=rax rwm=ds:rax;UInt64
# sar ax,20h
66 C1 F8 20, Sar_rm16_imm8, Legacy, INTEL186, op0=rw op1=r rw=ax
# sar word ptr [rax],20h
66 C1 38 20, Sar_rm16_imm8, Legacy, INTEL186, op0=rw op1=r r=rax rwm=ds:rax;Int16
# sar eax,20h
C1 F8 20, Sar_rm32_imm8, Legacy, INTEL386, op0=rw op1=r w=rax r=eax
# sar dword ptr [rax],20h
C1 38 20, Sar_rm32_imm8, Legacy, INTEL386, op0=rw op1=r r=rax rwm=ds:rax;Int32
# sar r8,40h
49 C1 F8 40, Sar_rm64_imm8, Legacy, X64, op0=rw op1=r rw=r8
# sar qword ptr [rax],40h
48 C1 38 40, Sar_rm64_imm8, Legacy, X64, op0=rw op1=r r=rax rwm=ds:rax;Int64
# rol rcx,20h
48 C1 C1 20, Rol_rm64_imm8, Legacy, X64, fw=c fu=o op0=rw op1=r rw=rcx
# rol qword ptr [rax],20h
48 C1 00 20, Rol_rm64_imm8, Legacy, X64, fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt64
# ror rdx,20h
48 C1 CA 20, Ror_rm64_imm8, Legacy, X64, fw=c fu=o op0=rw op1=r rw=rdx
# ror qword ptr [rax],20h
48 C1 08 20, Ror_rm64_imm8, Legacy, X64, fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt64
# rcl rbx,20h
48 C1 D3 20, Rcl_rm64_imm8, Legacy, X64, fr=c fw=c fu=o op0=rw op1=r rw=rbx
# rcl qword ptr [rax],20h
48 C1 10 20, Rcl_rm64_imm8, Legacy, X64, fr=c fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt64
# rcr rsp,20h
48 C1 DC 20, Rcr_rm64_imm8, Legacy, X64, fr=c fw=c fu=o op0=rw op1=r rw=rsp
# rcr qword ptr [rax],20h
48 C1 18 20, Rcr_rm64_imm8, Legacy, X64, fr=c fw=c fu=o op0=rw op1=r r=rax rwm=ds:rax;UInt64
# shl rbp,20h
48 C1 E5 20, Shl_rm64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r rw=rbp
# shl qword ptr [rax],20h
48 C1 20 20, Shl_rm64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt64
# shr rsi,20h
48 C1 EE 20, Shr_rm64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r rw=rsi
# shr qword ptr [rax],20h
48 C1 28 20, Shr_rm64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt64
# sal rbp,20h
48 C1 F5 20, Sal_rm64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r rw=rbp
# sal qword ptr [rax],20h
48 C1 30 20, Sal_rm64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;UInt64
# sar r8,20h
49 C1 F8 20, Sar_rm64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r rw=r8
# sar qword ptr [rax],20h
48 C1 38 20, Sar_rm64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r r=rax rwm=ds:rax;Int64
# ret 0A55Ah
C2 5AA5, Retnq_imm16, Legacy, X64, flow=Return op0=r rw=xsp rm=ss:xsp;UInt64 stack=42338
# ret
C3, Retnq, Legacy, X64, flow=Return rw=xsp rm=ss:xsp;UInt64 stack=8
# mov cl,5Ah
C6 C1 5A, Mov_rm8_imm8, Legacy, INTEL8086, op0=w op1=r w=cl
# mov byte ptr [rax],5Ah
C6 00 5A, Mov_rm8_imm8, Legacy, INTEL8086, op0=w op1=r r=rax wm=ds:rax;UInt8
# xabort 5Ah
C6 F8 5A, Xabort_imm8, Legacy, RTM, save-restore op0=r
# mov cx,0A55Ah
66 C7 C1 5AA5, Mov_rm16_imm16, Legacy, INTEL8086, op0=w op1=r w=cx
# mov word ptr [rax],0A55Ah
66 C7 00 5AA5, Mov_rm16_imm16, Legacy, INTEL8086, op0=w op1=r r=rax wm=ds:rax;UInt16
# mov ecx,3412A55Ah
C7 C1 5AA51234, Mov_rm32_imm32, Legacy, INTEL386, op0=w op1=r w=rcx
# mov dword ptr [rax],3412A55Ah
C7 00 5AA51234, Mov_rm32_imm32, Legacy, INTEL386, op0=w op1=r r=rax wm=ds:rax;UInt32
# mov rcx,3412A55Ah
48 C7 C1 5AA51234, Mov_rm64_imm32, Legacy, X64, op0=w op1=r w=rcx
# mov qword ptr [rax],3412A55Ah
48 C7 00 5AA51234, Mov_rm64_imm32, Legacy, X64, op0=w op1=r r=rax wm=ds:rax;UInt64
# xbegin 7FFFFFFFFFFFA54Fh
66 C7 F8 5AA5, Xbegin_rel16, Legacy, RTM, flow=XbeginXabortXend op0=r cw=rax
# xbegin 800000003412A550h
C7 F8 5AA51234, Xbegin_rel32, Legacy, RTM, flow=XbeginXabortXend op0=r cw=rax
# enterw 0A55Ah,0E0h
66 C8 5AA5 E0, Enterw_imm16_imm8, Legacy, INTEL186, op0=r op1=r rw=bp rw=sp rw=xsp stack=-42332 wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16
# enterw 0A55Ah,0E1h
66 C8 5AA5 E1, Enterw_imm16_imm8, Legacy, INTEL186, op0=r op1=r rw=bp rw=sp rw=xsp stack=-42334 wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 wm=ss:xsp+0xFFFFFFFFFFFFFFFC;UInt16
# enterw 0A55Ah,0E2h
66 C8 5AA5 E2, Enterw_imm16_imm8, Legacy, INTEL186, op0=r op1=r rw=bp rw=sp rw=xbp rw=xsp stack=-42336 wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 wm=ss:xsp+0xFFFFFFFFFFFFFFFC;UInt16 wm=ss:xsp+0xFFFFFFFFFFFFFFFA;UInt16 rm=ss:xbp+0xFFFFFFFFFFFFFFFE;UInt16
# enter 0A55Ah,0E0h
C8 5AA5 E0, Enterq_imm16_imm8, Legacy, X64, op0=r op1=r rw=rbp rw=rsp rw=xsp stack=-42338 wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64
# enter 0A55Ah,0E1h
C8 5AA5 E1, Enterq_imm16_imm8, Legacy, X64, op0=r op1=r rw=rbp rw=rsp rw=xsp stack=-42346 wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 wm=ss:xsp+0xFFFFFFFFFFFFFFF0;UInt64
# enter 0A55Ah,0E2h
C8 5AA5 E2, Enterq_imm16_imm8, Legacy, X64, op0=r op1=r rw=rbp rw=rsp rw=xbp rw=xsp stack=-42354 wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 wm=ss:xsp+0xFFFFFFFFFFFFFFF0;UInt64 wm=ss:xsp+0xFFFFFFFFFFFFFFE8;UInt64 rm=ss:xbp+0xFFFFFFFFFFFFFFF8;UInt64
# leavew
66 C9, Leavew, Legacy, INTEL186, w=xsp r=xbp w=bp rm=ss:xbp;UInt16 stack=0
# leave
C9, Leaveq, Legacy, X64, w=xsp r=xbp w=rbp rm=ss:xbp;UInt64 stack=0
# retfw 0A55Ah
66 CA 5AA5, Retfw_imm16, Legacy, INTEL8086, flow=Return op0=r rw=xsp rm=ss:xsp;UInt16 rm=ss:xsp+2;UInt16 stack=42334
# retf 0A55Ah
CA 5AA5, Retfd_imm16, Legacy, INTEL386, flow=Return op0=r rw=xsp rm=ss:xsp;UInt32 rm=ss:xsp+4;UInt32 stack=42338
# retfq 0A55Ah
48 CA 5AA5, Retfq_imm16, Legacy, X64, flow=Return op0=r rw=xsp rm=ss:xsp;UInt64 rm=ss:xsp+8;UInt64 stack=42346
# retfw
66 CB, Retfw, Legacy, INTEL8086, flow=Return rw=xsp rm=ss:xsp;UInt16 rm=ss:xsp+2;UInt16 stack=4
# retf
CB, Retfd, Legacy, INTEL386, flow=Return rw=xsp rm=ss:xsp;UInt32 rm=ss:xsp+4;UInt32 stack=8
# retfq
48 CB, Retfq, Legacy, X64, flow=Return rw=xsp rm=ss:xsp;UInt64 rm=ss:xsp+8;UInt64 stack=16
# int 3
CC, Int3, Legacy, INTEL8086, flow=Interrupt
# int 5Ah
CD 5A, Int_imm8, Legacy, INTEL8086, flow=Interrupt op0=r
# iret
66 CF, Iretw, Legacy, INTEL8086, flow=Return fw=acopszid w=ss w=sp rw=xsp rm=ss:xsp;UInt16 rm=ss:xsp+2;UInt16 rm=ss:xsp+4;UInt16 rm=ss:xsp+6;UInt16 rm=ss:xsp+8;UInt16 stack=10
# iretd
CF, Iretd, Legacy, INTEL386, flow=Return fw=acopszidA w=ss w=esp rw=xsp rm=ss:xsp;UInt32 rm=ss:xsp+4;UInt32 rm=ss:xsp+8;UInt32 rm=ss:xsp+0xC;UInt32 rm=ss:xsp+0x10;UInt32 stack=20
# iretq
48 CF, Iretq, Legacy, X64, flow=Return fw=acopszidA w=ss w=rsp rw=xsp rm=ss:xsp;UInt64 rm=ss:xsp+8;UInt64 rm=ss:xsp+0x10;UInt64 rm=ss:xsp+0x18;UInt64 rm=ss:xsp+0x20;UInt64 stack=40
# rol cl,1
D0 C1, Rol_rm8_1, Legacy, INTEL8086, fw=oc op0=rw op1=r rw=cl
# rol byte ptr [rax],1
D0 00, Rol_rm8_1, Legacy, INTEL8086, fw=oc op0=rw op1=r r=rax rwm=ds:rax;UInt8
# ror dl,1
D0 CA, Ror_rm8_1, Legacy, INTEL8086, fw=oc op0=rw op1=r rw=dl
# ror byte ptr [rax],1
D0 08, Ror_rm8_1, Legacy, INTEL8086, fw=oc op0=rw op1=r r=rax rwm=ds:rax;UInt8
# rcl bl,1
D0 D3, Rcl_rm8_1, Legacy, INTEL8086, fr=c fw=oc op0=rw op1=r rw=bl
# rcl byte ptr [rax],1
D0 10, Rcl_rm8_1, Legacy, INTEL8086, fr=c fw=oc op0=rw op1=r r=rax rwm=ds:rax;UInt8
# rcr ah,1
D0 DC, Rcr_rm8_1, Legacy, INTEL8086, fr=c fw=oc op0=rw op1=r rw=ah
# rcr byte ptr [rax],1
D0 18, Rcr_rm8_1, Legacy, INTEL8086, fr=c fw=oc op0=rw op1=r r=rax rwm=ds:rax;UInt8
# shl ch,1
D0 E5, Shl_rm8_1, Legacy, INTEL8086, fw=ocszp fu=a op0=rw op1=r rw=ch
# shl byte ptr [rax],1
D0 20, Shl_rm8_1, Legacy, INTEL8086, fw=ocszp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt8
# shr dh,1
D0 EE, Shr_rm8_1, Legacy, INTEL8086, fw=ocszp fu=a op0=rw op1=r rw=dh
# shr byte ptr [rax],1
D0 28, Shr_rm8_1, Legacy, INTEL8086, fw=ocszp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt8
# sal ch,1
D0 F5, Sal_rm8_1, Legacy, INTEL8086, fw=ocszp fu=a op0=rw op1=r rw=ch
# sal byte ptr [rax],1
D0 30, Sal_rm8_1, Legacy, INTEL8086, fw=ocszp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt8
# sar al,1
D0 F8, Sar_rm8_1, Legacy, INTEL8086, fw=ocszp fu=a op0=rw op1=r rw=al
# sar byte ptr [rax],1
D0 38, Sar_rm8_1, Legacy, INTEL8086, fw=ocszp fu=a op0=rw op1=r r=rax rwm=ds:rax;Int8
# rol cx,1
66 D1 C1, Rol_rm16_1, Legacy, INTEL8086, fw=oc op0=rw op1=r rw=cx
# rol word ptr [rax],1
66 D1 00, Rol_rm16_1, Legacy, INTEL8086, fw=oc op0=rw op1=r r=rax rwm=ds:rax;UInt16
# rol ecx,1
D1 C1, Rol_rm32_1, Legacy, INTEL386, fw=oc op0=rw op1=r w=rcx r=ecx
# rol dword ptr [rax],1
D1 00, Rol_rm32_1, Legacy, INTEL386, fw=oc op0=rw op1=r r=rax rwm=ds:rax;UInt32
# rol rcx,1
48 D1 C1, Rol_rm64_1, Legacy, X64, fw=oc op0=rw op1=r rw=rcx
# rol qword ptr [rax],1
48 D1 00, Rol_rm64_1, Legacy, X64, fw=oc op0=rw op1=r r=rax rwm=ds:rax;UInt64
# ror dx,1
66 D1 CA, Ror_rm16_1, Legacy, INTEL8086, fw=oc op0=rw op1=r rw=dx
# ror word ptr [rax],1
66 D1 08, Ror_rm16_1, Legacy, INTEL8086, fw=oc op0=rw op1=r r=rax rwm=ds:rax;UInt16
# ror edx,1
D1 CA, Ror_rm32_1, Legacy, INTEL386, fw=oc op0=rw op1=r w=rdx r=edx
# ror dword ptr [rax],1
D1 08, Ror_rm32_1, Legacy, INTEL386, fw=oc op0=rw op1=r r=rax rwm=ds:rax;UInt32
# ror rdx,1
48 D1 CA, Ror_rm64_1, Legacy, X64, fw=oc op0=rw op1=r rw=rdx
# ror qword ptr [rax],1
48 D1 08, Ror_rm64_1, Legacy, X64, fw=oc op0=rw op1=r r=rax rwm=ds:rax;UInt64
# rcl bx,1
66 D1 D3, Rcl_rm16_1, Legacy, INTEL8086, fr=c fw=oc op0=rw op1=r rw=bx
# rcl word ptr [rax],1
66 D1 10, Rcl_rm16_1, Legacy, INTEL8086, fr=c fw=oc op0=rw op1=r r=rax rwm=ds:rax;UInt16
# rcl ebx,1
D1 D3, Rcl_rm32_1, Legacy, INTEL386, fr=c fw=oc op0=rw op1=r w=rbx r=ebx
# rcl dword ptr [rax],1
D1 10, Rcl_rm32_1, Legacy, INTEL386, fr=c fw=oc op0=rw op1=r r=rax rwm=ds:rax;UInt32
# rcl rbx,1
48 D1 D3, Rcl_rm64_1, Legacy, X64, fr=c fw=oc op0=rw op1=r rw=rbx
# rcl qword ptr [rax],1
48 D1 10, Rcl_rm64_1, Legacy, X64, fr=c fw=oc op0=rw op1=r r=rax rwm=ds:rax;UInt64
# rcr sp,1
66 D1 DC, Rcr_rm16_1, Legacy, INTEL8086, fr=c fw=oc op0=rw op1=r rw=sp
# rcr word ptr [rax],1
66 D1 18, Rcr_rm16_1, Legacy, INTEL8086, fr=c fw=oc op0=rw op1=r r=rax rwm=ds:rax;UInt16
# rcr esp,1
D1 DC, Rcr_rm32_1, Legacy, INTEL386, fr=c fw=oc op0=rw op1=r w=rsp r=esp
# rcr dword ptr [rax],1
D1 18, Rcr_rm32_1, Legacy, INTEL386, fr=c fw=oc op0=rw op1=r r=rax rwm=ds:rax;UInt32
# rcr rsp,1
48 D1 DC, Rcr_rm64_1, Legacy, X64, fr=c fw=oc op0=rw op1=r rw=rsp
# rcr qword ptr [rax],1
48 D1 18, Rcr_rm64_1, Legacy, X64, fr=c fw=oc op0=rw op1=r r=rax rwm=ds:rax;UInt64
# shl bp,1
66 D1 E5, Shl_rm16_1, Legacy, INTEL8086, fw=ocszp fu=a op0=rw op1=r rw=bp
# shl word ptr [rax],1
66 D1 20, Shl_rm16_1, Legacy, INTEL8086, fw=ocszp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt16
# shl ebp,1
D1 E5, Shl_rm32_1, Legacy, INTEL386, fw=ocszp fu=a op0=rw op1=r w=rbp r=ebp
# shl dword ptr [rax],1
D1 20, Shl_rm32_1, Legacy, INTEL386, fw=ocszp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt32
# shl rbp,1
48 D1 E5, Shl_rm64_1, Legacy, X64, fw=ocszp fu=a op0=rw op1=r rw=rbp
# shl qword ptr [rax],1
48 D1 20, Shl_rm64_1, Legacy, X64, fw=ocszp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt64
# shr si,1
66 D1 EE, Shr_rm16_1, Legacy, INTEL8086, fw=ocszp fu=a op0=rw op1=r rw=si
# shr word ptr [rax],1
66 D1 28, Shr_rm16_1, Legacy, INTEL8086, fw=ocszp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt16
# shr esi,1
D1 EE, Shr_rm32_1, Legacy, INTEL386, fw=ocszp fu=a op0=rw op1=r w=rsi r=esi
# shr dword ptr [rax],1
D1 28, Shr_rm32_1, Legacy, INTEL386, fw=ocszp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt32
# shr rsi,1
48 D1 EE, Shr_rm64_1, Legacy, X64, fw=ocszp fu=a op0=rw op1=r rw=rsi
# shr qword ptr [rax],1
48 D1 28, Shr_rm64_1, Legacy, X64, fw=ocszp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt64
# sal bp,1
66 D1 F5, Sal_rm16_1, Legacy, INTEL8086, fw=ocszp fu=a op0=rw op1=r rw=bp
# sal word ptr [rax],1
66 D1 30, Sal_rm16_1, Legacy, INTEL8086, fw=ocszp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt16
# sal ebp,1
D1 F5, Sal_rm32_1, Legacy, INTEL386, fw=ocszp fu=a op0=rw op1=r w=rbp r=ebp
# sal dword ptr [rax],1
D1 30, Sal_rm32_1, Legacy, INTEL386, fw=ocszp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt32
# sal rbp,1
48 D1 F5, Sal_rm64_1, Legacy, X64, fw=ocszp fu=a op0=rw op1=r rw=rbp
# sal qword ptr [rax],1
48 D1 30, Sal_rm64_1, Legacy, X64, fw=ocszp fu=a op0=rw op1=r r=rax rwm=ds:rax;UInt64
# sar ax,1
66 D1 F8, Sar_rm16_1, Legacy, INTEL8086, fw=ocszp fu=a op0=rw op1=r rw=ax
# sar word ptr [rax],1
66 D1 38, Sar_rm16_1, Legacy, INTEL8086, fw=ocszp fu=a op0=rw op1=r r=rax rwm=ds:rax;Int16
# sar eax,1
D1 F8, Sar_rm32_1, Legacy, INTEL386, fw=ocszp fu=a op0=rw op1=r w=rax r=eax
# sar dword ptr [rax],1
D1 38, Sar_rm32_1, Legacy, INTEL386, fw=ocszp fu=a op0=rw op1=r r=rax rwm=ds:rax;Int32
# sar r8,1
49 D1 F8, Sar_rm64_1, Legacy, X64, fw=ocszp fu=a op0=rw op1=r rw=r8
# sar qword ptr [rax],1
48 D1 38, Sar_rm64_1, Legacy, X64, fw=ocszp fu=a op0=rw op1=r r=rax rwm=ds:rax;Int64
# rol cl,cl
D2 C1, Rol_rm8_CL, Legacy, INTEL8086, fw=c fu=o op0=rw op1=r rw=cl r=cl
# rol byte ptr [rax],cl
D2 00, Rol_rm8_CL, Legacy, INTEL8086, fw=c fu=o op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt8
# ror dl,cl
D2 CA, Ror_rm8_CL, Legacy, INTEL8086, fw=c fu=o op0=rw op1=r rw=dl r=cl
# ror byte ptr [rax],cl
D2 08, Ror_rm8_CL, Legacy, INTEL8086, fw=c fu=o op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt8
# rcl bl,cl
D2 D3, Rcl_rm8_CL, Legacy, INTEL8086, fr=c fw=c fu=o op0=rw op1=r rw=bl r=cl
# rcl byte ptr [rax],cl
D2 10, Rcl_rm8_CL, Legacy, INTEL8086, fr=c fw=c fu=o op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt8
# rcr ah,cl
D2 DC, Rcr_rm8_CL, Legacy, INTEL8086, fr=c fw=c fu=o op0=rw op1=r rw=ah r=cl
# rcr byte ptr [rax],cl
D2 18, Rcr_rm8_CL, Legacy, INTEL8086, fr=c fw=c fu=o op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt8
# shl ch,cl
D2 E5, Shl_rm8_CL, Legacy, INTEL8086, fw=cszp fu=ao op0=rw op1=r rw=ch r=cl
# shl byte ptr [rax],cl
D2 20, Shl_rm8_CL, Legacy, INTEL8086, fw=cszp fu=ao op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt8
# shr dh,cl
D2 EE, Shr_rm8_CL, Legacy, INTEL8086, fw=cszp fu=ao op0=rw op1=r rw=dh r=cl
# shr byte ptr [rax],cl
D2 28, Shr_rm8_CL, Legacy, INTEL8086, fw=cszp fu=ao op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt8
# sal ch,cl
D2 F5, Sal_rm8_CL, Legacy, INTEL8086, fw=cszp fu=ao op0=rw op1=r rw=ch r=cl
# sal byte ptr [rax],cl
D2 30, Sal_rm8_CL, Legacy, INTEL8086, fw=cszp fu=ao op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt8
# sar al,cl
D2 F8, Sar_rm8_CL, Legacy, INTEL8086, fw=cszp fu=ao op0=rw op1=r rw=al r=cl
# sar byte ptr [rax],cl
D2 38, Sar_rm8_CL, Legacy, INTEL8086, fw=cszp fu=ao op0=rw op1=r r=rax r=cl rwm=ds:rax;Int8
# rol cx,cl
66 D3 C1, Rol_rm16_CL, Legacy, INTEL8086, fw=c fu=o op0=rw op1=r rw=cx r=cl
# rol word ptr [rax],cl
66 D3 00, Rol_rm16_CL, Legacy, INTEL8086, fw=c fu=o op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt16
# rol ecx,cl
D3 C1, Rol_rm32_CL, Legacy, INTEL386, fw=c fu=o op0=rw op1=r w=rcx r=ecx r=cl
# rol dword ptr [rax],cl
D3 00, Rol_rm32_CL, Legacy, INTEL386, fw=c fu=o op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt32
# rol rcx,cl
48 D3 C1, Rol_rm64_CL, Legacy, X64, fw=c fu=o op0=rw op1=r rw=rcx r=cl
# rol qword ptr [rax],cl
48 D3 00, Rol_rm64_CL, Legacy, X64, fw=c fu=o op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt64
# ror dx,cl
66 D3 CA, Ror_rm16_CL, Legacy, INTEL8086, fw=c fu=o op0=rw op1=r rw=dx r=cl
# ror word ptr [rax],cl
66 D3 08, Ror_rm16_CL, Legacy, INTEL8086, fw=c fu=o op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt16
# ror edx,cl
D3 CA, Ror_rm32_CL, Legacy, INTEL386, fw=c fu=o op0=rw op1=r w=rdx r=edx r=cl
# ror dword ptr [rax],cl
D3 08, Ror_rm32_CL, Legacy, INTEL386, fw=c fu=o op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt32
# ror rdx,cl
48 D3 CA, Ror_rm64_CL, Legacy, X64, fw=c fu=o op0=rw op1=r rw=rdx r=cl
# ror qword ptr [rax],cl
48 D3 08, Ror_rm64_CL, Legacy, X64, fw=c fu=o op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt64
# rcl bx,cl
66 D3 D3, Rcl_rm16_CL, Legacy, INTEL8086, fr=c fw=c fu=o op0=rw op1=r rw=bx r=cl
# rcl word ptr [rax],cl
66 D3 10, Rcl_rm16_CL, Legacy, INTEL8086, fr=c fw=c fu=o op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt16
# rcl ebx,cl
D3 D3, Rcl_rm32_CL, Legacy, INTEL386, fr=c fw=c fu=o op0=rw op1=r w=rbx r=ebx r=cl
# rcl dword ptr [rax],cl
D3 10, Rcl_rm32_CL, Legacy, INTEL386, fr=c fw=c fu=o op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt32
# rcl rbx,cl
48 D3 D3, Rcl_rm64_CL, Legacy, X64, fr=c fw=c fu=o op0=rw op1=r rw=rbx r=cl
# rcl qword ptr [rax],cl
48 D3 10, Rcl_rm64_CL, Legacy, X64, fr=c fw=c fu=o op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt64
# rcr sp,cl
66 D3 DC, Rcr_rm16_CL, Legacy, INTEL8086, fr=c fw=c fu=o op0=rw op1=r rw=sp r=cl
# rcr word ptr [rax],cl
66 D3 18, Rcr_rm16_CL, Legacy, INTEL8086, fr=c fw=c fu=o op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt16
# rcr esp,cl
D3 DC, Rcr_rm32_CL, Legacy, INTEL386, fr=c fw=c fu=o op0=rw op1=r w=rsp r=esp r=cl
# rcr dword ptr [rax],cl
D3 18, Rcr_rm32_CL, Legacy, INTEL386, fr=c fw=c fu=o op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt32
# rcr rsp,cl
48 D3 DC, Rcr_rm64_CL, Legacy, X64, fr=c fw=c fu=o op0=rw op1=r rw=rsp r=cl
# rcr qword ptr [rax],cl
48 D3 18, Rcr_rm64_CL, Legacy, X64, fr=c fw=c fu=o op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt64
# shl bp,cl
66 D3 E5, Shl_rm16_CL, Legacy, INTEL8086, fw=cszp fu=ao op0=rw op1=r rw=bp r=cl
# shl word ptr [rax],cl
66 D3 20, Shl_rm16_CL, Legacy, INTEL8086, fw=cszp fu=ao op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt16
# shl ebp,cl
D3 E5, Shl_rm32_CL, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r w=rbp r=ebp r=cl
# shl dword ptr [rax],cl
D3 20, Shl_rm32_CL, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt32
# shl rbp,cl
48 D3 E5, Shl_rm64_CL, Legacy, X64, fw=cszp fu=ao op0=rw op1=r rw=rbp r=cl
# shl qword ptr [rax],cl
48 D3 20, Shl_rm64_CL, Legacy, X64, fw=cszp fu=ao op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt64
# shr si,cl
66 D3 EE, Shr_rm16_CL, Legacy, INTEL8086, fw=cszp fu=ao op0=rw op1=r rw=si r=cl
# shr word ptr [rax],cl
66 D3 28, Shr_rm16_CL, Legacy, INTEL8086, fw=cszp fu=ao op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt16
# shr esi,cl
D3 EE, Shr_rm32_CL, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r w=rsi r=esi r=cl
# shr dword ptr [rax],cl
D3 28, Shr_rm32_CL, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt32
# shr rsi,cl
48 D3 EE, Shr_rm64_CL, Legacy, X64, fw=cszp fu=ao op0=rw op1=r rw=rsi r=cl
# shr qword ptr [rax],cl
48 D3 28, Shr_rm64_CL, Legacy, X64, fw=cszp fu=ao op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt64
# sal bp,cl
66 D3 F5, Sal_rm16_CL, Legacy, INTEL8086, fw=cszp fu=ao op0=rw op1=r rw=bp r=cl
# sal word ptr [rax],cl
66 D3 30, Sal_rm16_CL, Legacy, INTEL8086, fw=cszp fu=ao op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt16
# sal ebp,cl
D3 F5, Sal_rm32_CL, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r w=rbp r=ebp r=cl
# sal dword ptr [rax],cl
D3 30, Sal_rm32_CL, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt32
# sal rbp,cl
48 D3 F5, Sal_rm64_CL, Legacy, X64, fw=cszp fu=ao op0=rw op1=r rw=rbp r=cl
# sal qword ptr [rax],cl
48 D3 30, Sal_rm64_CL, Legacy, X64, fw=cszp fu=ao op0=rw op1=r r=rax r=cl rwm=ds:rax;UInt64
# sar ax,cl
66 D3 F8, Sar_rm16_CL, Legacy, INTEL8086, fw=cszp fu=ao op0=rw op1=r rw=ax r=cl
# sar word ptr [rax],cl
66 D3 38, Sar_rm16_CL, Legacy, INTEL8086, fw=cszp fu=ao op0=rw op1=r r=rax r=cl rwm=ds:rax;Int16
# sar eax,cl
D3 F8, Sar_rm32_CL, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r w=rax r=eax r=cl
# sar dword ptr [rax],cl
D3 38, Sar_rm32_CL, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r r=rax r=cl rwm=ds:rax;Int32
# sar r8,cl
49 D3 F8, Sar_rm64_CL, Legacy, X64, fw=cszp fu=ao op0=rw op1=r rw=r8 r=cl
# sar qword ptr [rax],cl
48 D3 38, Sar_rm64_CL, Legacy, X64, fw=cszp fu=ao op0=rw op1=r r=rax r=cl rwm=ds:rax;Int64
# xlatb
D7, Xlat_m8, Legacy, INTEL8086, op0=r rw=al r=rbx rm=ds:rbx+al;UInt8
# fadd dword ptr [rax]
D8 00, Fadd_m32fp, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Float32 rw=st0
# fmul dword ptr [rax]
D8 08, Fmul_m32fp, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Float32 rw=st0
# fcom dword ptr [rax]
D8 10, Fcom_m32fp, Legacy, FPU, fc=1 fw=023 op0=r r=rax rm=ds:rax;Float32 r=st0
# fcomp dword ptr [rax]
D8 18, Fcomp_m32fp, Legacy, FPU, fc=1 fw=023 op0=r r=rax rm=ds:rax;Float32 r=st0 fpu-inc=1
# fsub dword ptr [rax]
D8 20, Fsub_m32fp, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Float32 rw=st0
# fsubr dword ptr [rax]
D8 28, Fsubr_m32fp, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Float32 rw=st0
# fdiv dword ptr [rax]
D8 30, Fdiv_m32fp, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Float32 rw=st0
# fdivr dword ptr [rax]
D8 38, Fdivr_m32fp, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Float32 rw=st0
# fadd st,st(3)
D8 C3, Fadd_st0_sti, Legacy, FPU, fw=1 fu=023 op0=rw op1=r rw=st0 r=st3
# fmul st,st(3)
D8 CB, Fmul_st0_sti, Legacy, FPU, fw=1 fu=023 op0=rw op1=r rw=st0 r=st3
# fcom st(3)
D8 D3, Fcom_st0_sti, Legacy, FPU, fc=1 fw=023 op0=r op1=r r=st0 r=st3
# fcomp st(3)
D8 DB, Fcomp_st0_sti, Legacy, FPU, fc=1 fw=023 op0=r op1=r r=st0 r=st3 fpu-inc=1
# fsub st,st(3)
D8 E3, Fsub_st0_sti, Legacy, FPU, fw=1 fu=023 op0=rw op1=r rw=st0 r=st3
# fsubr st,st(3)
D8 EB, Fsubr_st0_sti, Legacy, FPU, fw=1 fu=023 op0=rw op1=r rw=st0 r=st3
# fdiv st,st(3)
D8 F3, Fdiv_st0_sti, Legacy, FPU, fw=1 fu=023 op0=rw op1=r rw=st0 r=st3
# fdivr st,st(3)
D8 FB, Fdivr_st0_sti, Legacy, FPU, fw=1 fu=023 op0=rw op1=r rw=st0 r=st3
# fld dword ptr [rax]
D9 00, Fld_m32fp, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Float32 fpu-inc=-1
# fst dword ptr [rax]
D9 10, Fst_m32fp, Legacy, FPU, fw=1 fu=023 op0=w r=rax wm=ds:rax;Float32 r=st0
# fstp dword ptr [rax]
D9 18, Fstp_m32fp, Legacy, FPU, fw=1 fu=023 op0=w r=rax wm=ds:rax;Float32 r=st0 fpu-inc=1
# fldenv fpuenv14 ptr [rax]
66 D9 20, Fldenv_m14byte, Legacy, FPU, fpu-writes-top fw=0123 op0=r r=rax rm=ds:rax;FpuEnv14
# fldenv [rax]
D9 20, Fldenv_m28byte, Legacy, FPU387, fpu-writes-top fw=0123 op0=r r=rax rm=ds:rax;FpuEnv28
# fldcw [rax]
D9 28, Fldcw_m2byte, Legacy, FPU, fu=0123 op0=r r=rax rm=ds:rax;UInt16
# fnstenv fpuenv14 ptr [rax]
66 D9 30, Fnstenv_m14byte, Legacy, FPU, fr=0123 fu=0123 op0=w r=rax wm=ds:rax;FpuEnv14
# fnstenv [rax]
D9 30, Fnstenv_m28byte, Legacy, FPU387, fr=0123 fu=0123 op0=w r=rax wm=ds:rax;FpuEnv28
# fnstcw [rax]
D9 38, Fnstcw_m2byte, Legacy, FPU, fu=0123 op0=w r=rax wm=ds:rax;UInt16
# fld st(3)
D9 C3, Fld_sti, Legacy, FPU, fw=1 fu=023 op0=r r=st3 fpu-inc=-1
# fxch st(3)
D9 CB, Fxch_st0_sti, Legacy, FPU, fc=1 fu=023 op0=rw op1=rw rw=st0 rw=st3
# fnop
D9 D0, Fnop, Legacy, FPU,
# fchs
D9 E0, Fchs, Legacy, FPU, fc=1 fu=023 rw=st0
# fabs
D9 E1, Fabs, Legacy, FPU, fc=1 fu=023 rw=st0
# ftst
D9 E4, Ftst, Legacy, FPU, fc=1 fw=023 r=st0
# fxam
D9 E5, Fxam, Legacy, FPU, fw=0123 r=st0
# fld1
D9 E8, Fld1, Legacy, FPU, fw=1 fu=023 fpu-inc=-1
# fldl2t
D9 E9, Fldl2t, Legacy, FPU, fw=1 fu=023 fpu-inc=-1
# fldl2e
D9 EA, Fldl2e, Legacy, FPU, fw=1 fu=023 fpu-inc=-1
# fldpi
D9 EB, Fldpi, Legacy, FPU, fw=1 fu=023 fpu-inc=-1
# fldlg2
D9 EC, Fldlg2, Legacy, FPU, fw=1 fu=023 fpu-inc=-1
# fldln2
D9 ED, Fldln2, Legacy, FPU, fw=1 fu=023 fpu-inc=-1
# fldz
D9 EE, Fldz, Legacy, FPU, fw=1 fu=023 fpu-inc=-1
# f2xm1
D9 F0, F2xm1, Legacy, FPU, fw=1 fu=023 rw=st0
# fyl2x
D9 F1, Fyl2x, Legacy, FPU, fw=1 fu=023 r=st0 rw=st1 fpu-inc=1
# fptan
D9 F2, Fptan, Legacy, FPU, fw=12 fu=03 rcw=st0 fpu-inc=-1 fpu-cond
# fpatan
D9 F3, Fpatan, Legacy, FPU, fw=1 fu=023 r=st0 rw=st1 fpu-inc=1
# fxtract
D9 F4, Fxtract, Legacy, FPU, fw=1 fu=023 rw=st0 fpu-inc=-1
# fprem1
D9 F5, Fprem1, Legacy, FPU387, fw=0123 rw=st0 r=st1
# fdecstp
D9 F6, Fdecstp, Legacy, FPU, fc=1 fu=023 fpu-inc=-1
# fincstp
D9 F7, Fincstp, Legacy, FPU, fc=1 fu=023 fpu-inc=1
# fprem
D9 F8, Fprem, Legacy, FPU, fw=0123 rw=st0 r=st1
# fyl2xp1
D9 F9, Fyl2xp1, Legacy, FPU, fw=1 fu=023 r=st0 rw=st1 fpu-inc=1
# fsqrt
D9 FA, Fsqrt, Legacy, FPU, fw=1 fu=023 rw=st0
# fsincos
D9 FB, Fsincos, Legacy, FPU387, fw=12 fu=03 rcw=st0 fpu-inc=-1 fpu-cond
# frndint
D9 FC, Frndint, Legacy, FPU, fw=1 fu=023 rw=st0
# fscale
D9 FD, Fscale, Legacy, FPU, fw=1 fu=023 rw=st0 r=st1
# fsin
D9 FE, Fsin, Legacy, FPU387, fw=12 fu=03 rcw=st0
# fcos
D9 FF, Fcos, Legacy, FPU387, fw=12 fu=03 rcw=st0
# fiadd dword ptr [rax]
DA 00, Fiadd_m32int, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Int32 rw=st0
# fimul dword ptr [rax]
DA 08, Fimul_m32int, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Int32 rw=st0
# ficom dword ptr [rax]
DA 10, Ficom_m32int, Legacy, FPU, fc=1 fw=023 op0=r r=rax rm=ds:rax;Int32 r=st0
# ficomp dword ptr [rax]
DA 18, Ficomp_m32int, Legacy, FPU, fc=1 fw=023 op0=r r=rax rm=ds:rax;Int32 r=st0 fpu-inc=1
# fisub dword ptr [rax]
DA 20, Fisub_m32int, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Int32 rw=st0
# fisubr dword ptr [rax]
DA 28, Fisubr_m32int, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Int32 rw=st0
# fidiv dword ptr [rax]
DA 30, Fidiv_m32int, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Int32 rw=st0
# fidivr dword ptr [rax]
DA 38, Fidivr_m32int, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Int32 rw=st0
# fcmovb st,st(3)
DA C3, Fcmovb_st0_sti, Legacy, FPU;CMOV, fr=c fc=1 fu=023 op0=cw op1=cr cw=st0 cr=st3
# fcmove st,st(3)
DA CB, Fcmove_st0_sti, Legacy, FPU;CMOV, fr=z fc=1 fu=023 op0=cw op1=cr cw=st0 cr=st3
# fcmovbe st,st(3)
DA D3, Fcmovbe_st0_sti, Legacy, FPU;CMOV, fr=cz fc=1 fu=023 op0=cw op1=cr cw=st0 cr=st3
# fcmovu st,st(3)
DA DB, Fcmovu_st0_sti, Legacy, FPU;CMOV, fr=p fc=1 fu=023 op0=cw op1=cr cw=st0 cr=st3
# fucompp
DA E9, Fucompp, Legacy, FPU387, fc=1 fw=023 r=st0 r=st1 fpu-inc=2
# fild dword ptr [rax]
DB 00, Fild_m32int, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Int32 fpu-inc=-1
# fisttp dword ptr [rax]
DB 08, Fisttp_m32int, Legacy, FPU;SSE3, fc=1 fu=023 op0=w r=rax wm=ds:rax;Int32 r=st0 fpu-inc=1
# fist dword ptr [rax]
DB 10, Fist_m32int, Legacy, FPU, fw=1 fu=023 op0=w r=rax wm=ds:rax;Int32 r=st0
# fistp dword ptr [rax]
DB 18, Fistp_m32int, Legacy, FPU, fw=1 fu=023 op0=w r=rax wm=ds:rax;Int32 r=st0 fpu-inc=1
# fld tbyte ptr [rax]
DB 28, Fld_m80fp, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Float80 fpu-inc=-1
# fstp tbyte ptr [rax]
DB 38, Fstp_m80fp, Legacy, FPU, fw=1 fu=023 op0=w r=rax wm=ds:rax;Float80 r=st0 fpu-inc=1
# fcmovnb st,st(3)
DB C3, Fcmovnb_st0_sti, Legacy, FPU;CMOV, fr=c fc=1 fu=023 op0=cw op1=cr cw=st0 cr=st3
# fcmovne st,st(3)
DB CB, Fcmovne_st0_sti, Legacy, FPU;CMOV, fr=z fc=1 fu=023 op0=cw op1=cr cw=st0 cr=st3
# fcmovnbe st,st(3)
DB D3, Fcmovnbe_st0_sti, Legacy, FPU;CMOV, fr=cz fc=1 fu=023 op0=cw op1=cr cw=st0 cr=st3
# fcmovnu st,st(3)
DB DB, Fcmovnu_st0_sti, Legacy, FPU;CMOV, fr=p fc=1 fu=023 op0=cw op1=cr cw=st0 cr=st3
# fnclex
DB E2, Fnclex, Legacy, FPU, fu=0123
# fninit
DB E3, Fninit, Legacy, FPU, fpu-writes-top fc=0123
# fucomi st,st(3)
DB EB, Fucomi_st0_sti, Legacy, FPU;CMOV, fc=1 fw=cpz fc=aos op0=r op1=r r=st0 r=st3
# fcomi st,st(3)
DB F3, Fcomi_st0_sti, Legacy, FPU;CMOV, fc=1 fw=cpz fc=aos op0=r op1=r r=st0 r=st3
# fadd qword ptr [rax]
DC 00, Fadd_m64fp, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Float64 rw=st0
# fmul qword ptr [rax]
DC 08, Fmul_m64fp, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Float64 rw=st0
# fcom qword ptr [rax]
DC 10, Fcom_m64fp, Legacy, FPU, fc=1 fw=023 op0=r r=rax rm=ds:rax;Float64 r=st0
# fcomp qword ptr [rax]
DC 18, Fcomp_m64fp, Legacy, FPU, fc=1 fw=023 op0=r r=rax rm=ds:rax;Float64 r=st0 fpu-inc=1
# fsub qword ptr [rax]
DC 20, Fsub_m64fp, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Float64 rw=st0
# fsubr qword ptr [rax]
DC 28, Fsubr_m64fp, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Float64 rw=st0
# fdiv qword ptr [rax]
DC 30, Fdiv_m64fp, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Float64 rw=st0
# fdivr qword ptr [rax]
DC 38, Fdivr_m64fp, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Float64 rw=st0
# fadd st(3),st
DC C3, Fadd_sti_st0, Legacy, FPU, fw=1 fu=023 op0=rw op1=r rw=st3 r=st0
# fmul st(3),st
DC CB, Fmul_sti_st0, Legacy, FPU, fw=1 fu=023 op0=rw op1=r rw=st3 r=st0
# fsubr st(3),st
DC E3, Fsubr_sti_st0, Legacy, FPU, fw=1 fu=023 op0=rw op1=r rw=st3 r=st0
# fsub st(3),st
DC EB, Fsub_sti_st0, Legacy, FPU, fw=1 fu=023 op0=rw op1=r rw=st3 r=st0
# fdivr st(3),st
DC F3, Fdivr_sti_st0, Legacy, FPU, fw=1 fu=023 op0=rw op1=r rw=st3 r=st0
# fdiv st(3),st
DC FB, Fdiv_sti_st0, Legacy, FPU, fw=1 fu=023 op0=rw op1=r rw=st3 r=st0
# fld qword ptr [rax]
DD 00, Fld_m64fp, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Float64 fpu-inc=-1
# fisttp qword ptr [rax]
DD 08, Fisttp_m64int, Legacy, FPU;SSE3, fc=1 fu=023 op0=w r=rax wm=ds:rax;Int64 r=st0 fpu-inc=1
# fst qword ptr [rax]
DD 10, Fst_m64fp, Legacy, FPU, fw=1 fu=023 op0=w r=rax wm=ds:rax;Float64 r=st0
# fstp qword ptr [rax]
DD 18, Fstp_m64fp, Legacy, FPU, fw=1 fu=023 op0=w r=rax wm=ds:rax;Float64 r=st0 fpu-inc=1
# frstor fpustate94 ptr [rax]
66 DD 20, Frstor_m94byte, Legacy, FPU, fpu-writes-top fw=0123 op0=r r=rax w=st0-st7;mm0-mm7 rm=ds:rax;FpuState94
# frstor [rax]
DD 20, Frstor_m108byte, Legacy, FPU387, fpu-writes-top fw=0123 op0=r r=rax w=st0-st7;mm0-mm7 rm=ds:rax;FpuState108
# fnsave fpustate94 ptr [rax]
66 DD 30, Fnsave_m94byte, Legacy, FPU, fpu-writes-top fr=0123 fc=0123 op0=w r=rax r=st0-st7;mm0-mm7 wm=ds:rax;FpuState94
# fnsave [rax]
DD 30, Fnsave_m108byte, Legacy, FPU387, fpu-writes-top fr=0123 fc=0123 op0=w r=rax r=st0-st7;mm0-mm7 wm=ds:rax;FpuState108
# fnstsw [rax]
DD 38, Fnstsw_m2byte, Legacy, FPU, fr=0123 fu=0123 op0=w r=rax wm=ds:rax;UInt16
# ffree st(3)
DD C3, Ffree_sti, Legacy, FPU, fu=0123 op0=n
# fst st(3)
DD D3, Fst_sti, Legacy, FPU, fw=1 fu=023 op0=w w=st3 r=st0
# fstp st(3)
DD DB, Fstp_sti, Legacy, FPU, fw=1 fu=023 op0=w w=st3 r=st0 fpu-inc=1
# fucom st(3)
DD E3, Fucom_st0_sti, Legacy, FPU, fc=1 fw=023 op0=r op1=r r=st0 r=st3
# fucomp st(3)
DD EB, Fucomp_st0_sti, Legacy, FPU, fc=1 fw=023 op0=r op1=r r=st0 r=st3 fpu-inc=1
# fiadd word ptr [rax]
DE 00, Fiadd_m16int, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Int16 rw=st0
# fimul word ptr [rax]
DE 08, Fimul_m16int, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Int16 rw=st0
# ficom word ptr [rax]
DE 10, Ficom_m16int, Legacy, FPU, fc=1 fw=023 op0=r r=rax rm=ds:rax;Int16 r=st0
# ficomp word ptr [rax]
DE 18, Ficomp_m16int, Legacy, FPU, fc=1 fw=023 op0=r r=rax rm=ds:rax;Int16 r=st0 fpu-inc=1
# fisub word ptr [rax]
DE 20, Fisub_m16int, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Int16 rw=st0
# fisubr word ptr [rax]
DE 28, Fisubr_m16int, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Int16 rw=st0
# fidiv word ptr [rax]
DE 30, Fidiv_m16int, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Int16 rw=st0
# fidivr word ptr [rax]
DE 38, Fidivr_m16int, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Int16 rw=st0
# faddp st(3),st
DE C3, Faddp_sti_st0, Legacy, FPU, fw=1 fu=023 op0=rw op1=r rw=st3 r=st0 fpu-inc=1
# fmulp st(3),st
DE CB, Fmulp_sti_st0, Legacy, FPU, fw=1 fu=023 op0=rw op1=r rw=st3 r=st0 fpu-inc=1
# fcompp
DE D9, Fcompp, Legacy, FPU, fc=1 fw=023 r=st0 r=st1 fpu-inc=2
# fsubrp st(3),st
DE E3, Fsubrp_sti_st0, Legacy, FPU, fw=1 fu=023 op0=rw op1=r rw=st3 r=st0 fpu-inc=1
# fsubp st(3),st
DE EB, Fsubp_sti_st0, Legacy, FPU, fw=1 fu=023 op0=rw op1=r rw=st3 r=st0 fpu-inc=1
# fdivrp st(3),st
DE F3, Fdivrp_sti_st0, Legacy, FPU, fw=1 fu=023 op0=rw op1=r rw=st3 r=st0 fpu-inc=1
# fdivp st(3),st
DE FB, Fdivp_sti_st0, Legacy, FPU, fw=1 fu=023 op0=rw op1=r rw=st3 r=st0 fpu-inc=1
# fild word ptr [rax]
DF 00, Fild_m16int, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Int16 fpu-inc=-1
# fisttp word ptr [rax]
DF 08, Fisttp_m16int, Legacy, FPU;SSE3, fc=1 fu=023 op0=w r=rax wm=ds:rax;Int16 r=st0 fpu-inc=1
# fist word ptr [rax]
DF 10, Fist_m16int, Legacy, FPU, fw=1 fu=023 op0=w r=rax wm=ds:rax;Int16 r=st0
# fistp word ptr [rax]
DF 18, Fistp_m16int, Legacy, FPU, fw=1 fu=023 op0=w r=rax wm=ds:rax;Int16 r=st0 fpu-inc=1
# fbld tbyte ptr [rax]
DF 20, Fbld_m80bcd, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Bcd fpu-inc=-1
# fild qword ptr [rax]
DF 28, Fild_m64int, Legacy, FPU, fw=1 fu=023 op0=r r=rax rm=ds:rax;Int64 fpu-inc=-1
# fbstp tbyte ptr [rax]
DF 30, Fbstp_m80bcd, Legacy, FPU, fw=1 fu=023 op0=w r=rax wm=ds:rax;Bcd r=st0 fpu-inc=1
# fistp qword ptr [rax]
DF 38, Fistp_m64int, Legacy, FPU, fw=1 fu=023 op0=w r=rax wm=ds:rax;Int64 r=st0 fpu-inc=1
# fnstsw ax
DF E0, Fnstsw_AX, Legacy, FPU287, fr=0123 fu=0123 op0=w w=ax
# fucomip st,st(3)
DF EB, Fucomip_st0_sti, Legacy, FPU;CMOV, fc=1 fw=cpz fc=aos op0=r op1=r r=st0 r=st3 fpu-inc=1
# fcomip st,st(3)
DF F3, Fcomip_st0_sti, Legacy, FPU;CMOV, fc=1 fw=cpz fc=aos op0=r op1=r r=st0 r=st3 fpu-inc=1
# loopned 800000000000004Dh
67 E0 5A, Loopne_rel8_64_ECX, Legacy, X64, flow=ConditionalBranch fr=z op0=r r=ecx w=rcx
# loopne 800000000000004Ch
E0 5A, Loopne_rel8_64_RCX, Legacy, X64, flow=ConditionalBranch fr=z op0=r rw=rcx
# looped 800000000000004Dh
67 E1 5A, Loope_rel8_64_ECX, Legacy, X64, flow=ConditionalBranch fr=z op0=r r=ecx w=rcx
# loope 800000000000004Ch
E1 5A, Loope_rel8_64_RCX, Legacy, X64, flow=ConditionalBranch fr=z op0=r rw=rcx
# loopd 800000000000004Dh
67 E2 5A, Loop_rel8_64_ECX, Legacy, X64, flow=ConditionalBranch op0=r r=ecx w=rcx
# loop 800000000000004Ch
E2 5A, Loop_rel8_64_RCX, Legacy, X64, flow=ConditionalBranch op0=r rw=rcx
# jecxz 800000000000004Dh
67 E3 5A, Jecxz_rel8_64, Legacy, X64, flow=ConditionalBranch op0=r r=ecx
# jrcxz 800000000000004Ch
E3 5A, Jrcxz_rel8_64, Legacy, X64, flow=ConditionalBranch op0=r r=rcx
# loopned 004Eh
66 67 E0 5A, Loopne_rel8_16_ECX, Legacy, INTEL386, decopt=AMD flow=ConditionalBranch fr=z op0=r r=ecx w=rcx
# loopne 004Dh
66 E0 5A, Loopne_rel8_16_RCX, Legacy, X64, decopt=AMD flow=ConditionalBranch fr=z op0=r rw=rcx
# looped 004Eh
66 67 E1 5A, Loope_rel8_16_ECX, Legacy, INTEL386, decopt=AMD flow=ConditionalBranch fr=z op0=r r=ecx w=rcx
# loope 004Dh
66 E1 5A, Loope_rel8_16_RCX, Legacy, X64, decopt=AMD flow=ConditionalBranch fr=z op0=r rw=rcx
# loopd 004Eh
66 67 E2 5A, Loop_rel8_16_ECX, Legacy, INTEL386, decopt=AMD flow=ConditionalBranch op0=r r=ecx w=rcx
# loop 004Dh
66 E2 5A, Loop_rel8_16_RCX, Legacy, X64, decopt=AMD flow=ConditionalBranch op0=r rw=rcx
# jecxz 004Eh
66 67 E3 5A, Jecxz_rel8_16, Legacy, INTEL386, decopt=AMD flow=ConditionalBranch op0=r r=ecx
# jrcxz 004Dh
66 E3 5A, Jrcxz_rel8_16, Legacy, X64, decopt=AMD flow=ConditionalBranch op0=r r=rcx
# in al,5Ah
E4 5A, In_AL_imm8, Legacy, INTEL8086, priv op0=w op1=r w=al
# in ax,5Ah
66 E5 5A, In_AX_imm8, Legacy, INTEL8086, priv op0=w op1=r w=ax
# in eax,5Ah
E5 5A, In_EAX_imm8, Legacy, INTEL386, priv op0=w op1=r w=rax
# out 5Ah,al
E6 5A, Out_imm8_AL, Legacy, INTEL8086, priv op0=r op1=r r=al
# out 5Ah,ax
66 E7 5A, Out_imm8_AX, Legacy, INTEL8086, priv op0=r op1=r r=ax
# out 5Ah,eax
E7 5A, Out_imm8_EAX, Legacy, INTEL386, priv op0=r op1=r r=eax
# call 7FFFFFFFA55A3407h
E8 12345AA5, Call_rel32_64, Legacy, X64, flow=Call op0=r rw=xsp wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# jmp near ptr 7FFFFFFFA55A3407h
E9 12345AA5, Jmp_rel32_64, Legacy, X64, flow=UnconditionalBranch op0=r
# jmp short 800000000000004Ch
EB 5A, Jmp_rel8_64, Legacy, X64, flow=UnconditionalBranch op0=r
# in al,dx
EC, In_AL_DX, Legacy, INTEL8086, priv op0=w op1=r w=al r=dx
# in ax,dx
66 ED, In_AX_DX, Legacy, INTEL8086, priv op0=w op1=r w=ax r=dx
# in eax,dx
ED, In_EAX_DX, Legacy, INTEL386, priv op0=w op1=r w=rax r=dx
# out dx,al
EE, Out_DX_AL, Legacy, INTEL8086, priv op0=r op1=r r=dx r=al
# out dx,ax
66 EF, Out_DX_AX, Legacy, INTEL8086, priv op0=r op1=r r=dx r=ax
# out dx,eax
EF, Out_DX_EAX, Legacy, INTEL386, priv op0=r op1=r r=dx r=eax
# int1
F1, Int1, Legacy, INTEL386, flow=Interrupt
# hlt
F4, Hlt, Legacy, INTEL8086, priv
# cmc
F5, Cmc, Legacy, INTEL8086, fr=c fw=c
# test cl,5Ah
F6 C1 5A, Test_rm8_imm8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=r op1=r r=cl
# test byte ptr [rax],5Ah
F6 00 5A, Test_rm8_imm8, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=r op1=r r=rax rm=ds:rax;UInt8
# not cl
F6 D1, Not_rm8, Legacy, INTEL8086, op0=rw rw=cl
# not byte ptr [rax]
F6 10, Not_rm8, Legacy, INTEL8086, op0=rw r=rax rwm=ds:rax;UInt8
# neg dh
F6 DE, Neg_rm8, Legacy, INTEL8086, fw=acopsz op0=rw rw=dh
# neg byte ptr [rax]
F6 18, Neg_rm8, Legacy, INTEL8086, fw=acopsz op0=rw r=rax rwm=ds:rax;Int8
# mul ch
F6 E5, Mul_rm8, Legacy, INTEL8086, fw=oc fu=apsz op0=r r=ch r=al w=ax
# mul byte ptr [rax]
F6 20, Mul_rm8, Legacy, INTEL8086, fw=oc fu=apsz op0=r r=rax rm=ds:rax;UInt8 r=al w=ax
# imul dh
F6 EE, Imul_rm8, Legacy, INTEL8086, fw=oc fu=apsz op0=r r=dh r=al w=ax
# imul byte ptr [rax]
F6 28, Imul_rm8, Legacy, INTEL8086, fw=oc fu=apsz op0=r r=rax rm=ds:rax;Int8 r=al w=ax
# div bh
F6 F7, Div_rm8, Legacy, INTEL8086, fu=acopsz op0=r r=bh rw=ax
# div byte ptr [rax]
F6 30, Div_rm8, Legacy, INTEL8086, fu=acopsz op0=r r=rax rm=ds:rax;UInt8 rw=ax
# idiv al
F6 F8, Idiv_rm8, Legacy, INTEL8086, fu=acopsz op0=r r=al rw=ax
# idiv byte ptr [rax]
F6 38, Idiv_rm8, Legacy, INTEL8086, fu=acopsz op0=r r=rax rm=ds:rax;Int8 rw=ax
# test cx,0A55Ah
66 F7 C1 5AA5, Test_rm16_imm16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=r op1=r r=cx
# test word ptr [rax],0A55Ah
66 F7 00 5AA5, Test_rm16_imm16, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=r op1=r r=rax rm=ds:rax;UInt16
# test ecx,3412A55Ah
F7 C1 5AA51234, Test_rm32_imm32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=r op1=r r=ecx
# test dword ptr [rax],3412A55Ah
F7 00 5AA51234, Test_rm32_imm32, Legacy, INTEL386, fc=oc fw=szp fu=a op0=r op1=r r=rax rm=ds:rax;UInt32
# test rcx,3412A55Ah
48 F7 C1 5AA51234, Test_rm64_imm32, Legacy, X64, fc=oc fw=szp fu=a op0=r op1=r r=rcx
# test qword ptr [rax],3412A55Ah
48 F7 00 5AA51234, Test_rm64_imm32, Legacy, X64, fc=oc fw=szp fu=a op0=r op1=r r=rax rm=ds:rax;UInt64
# not cx
66 F7 D1, Not_rm16, Legacy, INTEL8086, op0=rw rw=cx
# not word ptr [rax]
66 F7 10, Not_rm16, Legacy, INTEL8086, op0=rw r=rax rwm=ds:rax;UInt16
# not ecx
F7 D1, Not_rm32, Legacy, INTEL386, op0=rw r=ecx w=rcx
# not dword ptr [rax]
F7 10, Not_rm32, Legacy, INTEL386, op0=rw r=rax rwm=ds:rax;UInt32
# not rcx
48 F7 D1, Not_rm64, Legacy, X64, op0=rw rw=rcx
# not qword ptr [rax]
48 F7 10, Not_rm64, Legacy, X64, op0=rw r=rax rwm=ds:rax;UInt64
# neg si
66 F7 DE, Neg_rm16, Legacy, INTEL8086, fw=acopsz op0=rw rw=si
# neg word ptr [rax]
66 F7 18, Neg_rm16, Legacy, INTEL8086, fw=acopsz op0=rw r=rax rwm=ds:rax;Int16
# neg esi
F7 DE, Neg_rm32, Legacy, INTEL386, fw=acopsz op0=rw r=esi w=rsi
# neg dword ptr [rax]
F7 18, Neg_rm32, Legacy, INTEL386, fw=acopsz op0=rw r=rax rwm=ds:rax;Int32
# neg rsi
48 F7 DE, Neg_rm64, Legacy, X64, fw=acopsz op0=rw rw=rsi
# neg qword ptr [rax]
48 F7 18, Neg_rm64, Legacy, X64, fw=acopsz op0=rw r=rax rwm=ds:rax;Int64
# mul bp
66 F7 E5, Mul_rm16, Legacy, INTEL8086, fw=oc fu=apsz op0=r r=bp r=ax w=dx;ax
# mul word ptr [rax]
66 F7 20, Mul_rm16, Legacy, INTEL8086, fw=oc fu=apsz op0=r r=rax rm=ds:rax;UInt16 r=ax w=dx;ax
# mul ebp
F7 E5, Mul_rm32, Legacy, INTEL386, fw=oc fu=apsz op0=r r=ebp r=eax w=rdx;rax
# mul dword ptr [rax]
F7 20, Mul_rm32, Legacy, INTEL386, fw=oc fu=apsz op0=r r=rax rm=ds:rax;UInt32 r=eax w=rdx;rax
# mul rbp
48 F7 E5, Mul_rm64, Legacy, X64, fw=oc fu=apsz op0=r r=rbp r=rax w=rdx;rax
# mul qword ptr [rax]
48 F7 20, Mul_rm64, Legacy, X64, fw=oc fu=apsz op0=r r=rax rm=ds:rax;UInt64 r=rax w=rdx;rax
# imul si
66 F7 EE, Imul_rm16, Legacy, INTEL8086, fw=oc fu=apsz op0=r r=si r=ax w=dx;ax
# imul word ptr [rax]
66 F7 28, Imul_rm16, Legacy, INTEL8086, fw=oc fu=apsz op0=r r=rax rm=ds:rax;Int16 r=ax w=dx;ax
# imul esi
F7 EE, Imul_rm32, Legacy, INTEL386, fw=oc fu=apsz op0=r r=esi r=eax w=rdx;rax
# imul dword ptr [rax]
F7 28, Imul_rm32, Legacy, INTEL386, fw=oc fu=apsz op0=r r=rax rm=ds:rax;Int32 r=eax w=rdx;rax
# imul rsi
48 F7 EE, Imul_rm64, Legacy, X64, fw=oc fu=apsz op0=r r=rsi r=rax w=rdx;rax
# imul qword ptr [rax]
48 F7 28, Imul_rm64, Legacy, X64, fw=oc fu=apsz op0=r r=rax rm=ds:rax;Int64 r=rax w=rdx;rax
# div di
66 F7 F7, Div_rm16, Legacy, INTEL8086, fu=acopsz op0=r r=di rw=dx;ax
# div word ptr [rax]
66 F7 30, Div_rm16, Legacy, INTEL8086, fu=acopsz op0=r r=rax rm=ds:rax;UInt16 rw=dx;ax
# div edi
F7 F7, Div_rm32, Legacy, INTEL386, fu=acopsz op0=r r=edi r=edx;eax w=rdx;rax
# div dword ptr [rax]
F7 30, Div_rm32, Legacy, INTEL386, fu=acopsz op0=r r=rax rm=ds:rax;UInt32 r=edx;eax w=rdx;rax
# div rdi
48 F7 F7, Div_rm64, Legacy, X64, fu=acopsz op0=r r=rdi rw=rdx;rax
# div qword ptr [rax]
48 F7 30, Div_rm64, Legacy, X64, fu=acopsz op0=r r=rax rm=ds:rax;UInt64 rw=rdx;rax
# idiv ax
66 F7 F8, Idiv_rm16, Legacy, INTEL8086, fu=acopsz op0=r r=ax rw=dx;ax
# idiv word ptr [rax]
66 F7 38, Idiv_rm16, Legacy, INTEL8086, fu=acopsz op0=r r=rax rm=ds:rax;Int16 rw=dx;ax
# idiv eax
F7 F8, Idiv_rm32, Legacy, INTEL386, fu=acopsz op0=r r=eax r=edx;eax w=rdx;rax
# idiv dword ptr [rax]
F7 38, Idiv_rm32, Legacy, INTEL386, fu=acopsz op0=r r=rax rm=ds:rax;Int32 r=edx;eax w=rdx;rax
# idiv r8
49 F7 F8, Idiv_rm64, Legacy, X64, fu=acopsz op0=r r=r8 rw=rdx;rax
# idiv qword ptr [rax]
48 F7 38, Idiv_rm64, Legacy, X64, fu=acopsz op0=r r=rax rm=ds:rax;Int64 rw=rdx;rax
# clc
F8, Clc, Legacy, INTEL8086, fc=c
# stc
F9, Stc, Legacy, INTEL8086, fs=c
# cli
FA, Cli, Legacy, INTEL8086, priv fc=i
# sti
FB, Sti, Legacy, INTEL8086, priv fs=i
# cld
FC, Cld, Legacy, INTEL8086, fc=d
# std
FD, Std, Legacy, INTEL8086, fs=d
# inc cl
FE C1, Inc_rm8, Legacy, INTEL8086, fw=oszap op0=rw rw=cl
# inc byte ptr [rax]
FE 00, Inc_rm8, Legacy, INTEL8086, fw=oszap op0=rw r=rax rwm=ds:rax;UInt8
# dec dh
FE CE, Dec_rm8, Legacy, INTEL8086, fw=oszap op0=rw rw=dh
# dec byte ptr [rax]
FE 08, Dec_rm8, Legacy, INTEL8086, fw=oszap op0=rw r=rax rwm=ds:rax;UInt8
# inc cx
66 FF C1, Inc_rm16, Legacy, INTEL8086, fw=oszap op0=rw rw=cx
# inc word ptr [rax]
66 FF 00, Inc_rm16, Legacy, INTEL8086, fw=oszap op0=rw r=rax rwm=ds:rax;UInt16
# inc ecx
FF C1, Inc_rm32, Legacy, INTEL386, fw=oszap op0=rw r=ecx w=rcx
# inc dword ptr [rax]
FF 00, Inc_rm32, Legacy, INTEL386, fw=oszap op0=rw r=rax rwm=ds:rax;UInt32
# inc rcx
48 FF C1, Inc_rm64, Legacy, X64, fw=oszap op0=rw rw=rcx
# inc qword ptr [rax]
48 FF 00, Inc_rm64, Legacy, X64, fw=oszap op0=rw r=rax rwm=ds:rax;UInt64
# dec si
66 FF CE, Dec_rm16, Legacy, INTEL8086, fw=oszap op0=rw rw=si
# dec word ptr [rax]
66 FF 08, Dec_rm16, Legacy, INTEL8086, fw=oszap op0=rw r=rax rwm=ds:rax;UInt16
# dec esi
FF CE, Dec_rm32, Legacy, INTEL386, fw=oszap op0=rw r=esi w=rsi
# dec dword ptr [rax]
FF 08, Dec_rm32, Legacy, INTEL386, fw=oszap op0=rw r=rax rwm=ds:rax;UInt32
# dec rsi
48 FF CE, Dec_rm64, Legacy, X64, fw=oszap op0=rw rw=rsi
# dec qword ptr [rax]
48 FF 08, Dec_rm64, Legacy, X64, fw=oszap op0=rw r=rax rwm=ds:rax;UInt64
# call rcx
FF D1, Call_rm64, Legacy, X64, flow=IndirectCall op0=r rw=xsp r=rcx wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# call qword ptr [rax]
FF 10, Call_rm64, Legacy, X64, flow=IndirectCall op0=r rw=xsp r=rax rm=ds:rax;QwordOffset wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# call dword ptr [rax]
66 FF 18, Call_m1616, Legacy, INTEL8086, flow=IndirectCall op0=r rw=xsp r=rax rm=ds:rax;SegPtr16 wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 wm=ss:xsp+0xFFFFFFFFFFFFFFFC;UInt16 stack=-4
# call fword ptr [rax]
FF 18, Call_m1632, Legacy, INTEL386, flow=IndirectCall op0=r rw=xsp r=rax rm=ds:rax;SegPtr32 wm=ss:xsp+0xFFFFFFFFFFFFFFFC;UInt32 wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt32 stack=-8
# call tbyte ptr [rax]
48 FF 18, Call_m1664, Legacy, X64, flow=IndirectCall op0=r rw=xsp r=rax rm=ds:rax;SegPtr64 wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 wm=ss:xsp+0xFFFFFFFFFFFFFFF0;UInt64 stack=-16
# jmp rsi
FF E6, Jmp_rm64, Legacy, X64, flow=IndirectBranch op0=r r=rsi
# jmp qword ptr [rax]
FF 20, Jmp_rm64, Legacy, X64, flow=IndirectBranch op0=r r=rax rm=ds:rax;QwordOffset
# jmp dword ptr [rax]
66 FF 28, Jmp_m1616, Legacy, INTEL8086, flow=IndirectBranch op0=r r=rax rm=ds:rax;SegPtr16
# jmp fword ptr [rax]
FF 28, Jmp_m1632, Legacy, INTEL386, flow=IndirectBranch op0=r r=rax rm=ds:rax;SegPtr32
# jmp tbyte ptr [rax]
48 FF 28, Jmp_m1664, Legacy, X64, flow=IndirectBranch op0=r r=rax rm=ds:rax;SegPtr64
# push si
66 FF F6, Push_rm16, Legacy, INTEL8086, op0=r rw=xsp r=si wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 stack=-2
# push word ptr [rax]
66 FF 30, Push_rm16, Legacy, INTEL8086, op0=r rw=xsp r=rax rm=ds:rax;UInt16 wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 stack=-2
# push rsi
FF F6, Push_rm64, Legacy, X64, op0=r rw=xsp r=rsi wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# push qword ptr [rax]
FF 30, Push_rm64, Legacy, X64, op0=r rw=xsp r=rax rm=ds:rax;UInt64 wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# sldt cx
66 0F00 C1, Sldt_rm16, Legacy, INTEL286, op0=w w=cx
# sldt word ptr [rax]
66 0F00 00, Sldt_rm16, Legacy, INTEL286, op0=w r=rax wm=ds:rax;UInt16
# sldt ecx
0F00 C1, Sldt_r32m16, Legacy, INTEL386, op0=w w=rcx
# sldt word ptr [rax]
0F00 00, Sldt_r32m16, Legacy, INTEL386, op0=w r=rax wm=ds:rax;UInt16
# sldt rcx
48 0F00 C1, Sldt_r64m16, Legacy, X64, op0=w w=rcx
# sldt word ptr [rax]
48 0F00 00, Sldt_r64m16, Legacy, X64, op0=w r=rax wm=ds:rax;UInt16
# str dx
66 0F00 CA, Str_rm16, Legacy, INTEL286, op0=w w=dx
# str word ptr [rax]
66 0F00 08, Str_rm16, Legacy, INTEL286, op0=w r=rax wm=ds:rax;UInt16
# str edx
0F00 CA, Str_r32m16, Legacy, INTEL386, op0=w w=rdx
# str word ptr [rax]
0F00 08, Str_r32m16, Legacy, INTEL386, op0=w r=rax wm=ds:rax;UInt16
# str rdx
48 0F00 CA, Str_r64m16, Legacy, X64, op0=w w=rdx
# str word ptr [rax]
48 0F00 08, Str_r64m16, Legacy, X64, op0=w r=rax wm=ds:rax;UInt16
# lldt bx
66 0F00 D3, Lldt_rm16, Legacy, INTEL286, priv op0=r r=bx
# lldt word ptr [rax]
66 0F00 10, Lldt_rm16, Legacy, INTEL286, priv op0=r r=rax rm=ds:rax;UInt16
# lldt bx
0F00 D3, Lldt_r32m16, Legacy, INTEL386, priv op0=r r=bx
# lldt r15w
41 0F00 D7, Lldt_r32m16, Legacy, INTEL386, priv op0=r r=r15w
# lldt word ptr [rax]
0F00 10, Lldt_r32m16, Legacy, INTEL386, priv op0=r r=rax rm=ds:rax;UInt16
# lldt bx
48 0F00 D3, Lldt_r64m16, Legacy, X64, priv op0=r r=bx
# lldt r15w
49 0F00 D7, Lldt_r64m16, Legacy, X64, priv op0=r r=r15w
# lldt word ptr [rax]
48 0F00 10, Lldt_r64m16, Legacy, X64, priv op0=r r=rax rm=ds:rax;UInt16
# ltr sp
66 0F00 DC, Ltr_rm16, Legacy, INTEL286, priv op0=r r=sp
# ltr word ptr [rax]
66 0F00 18, Ltr_rm16, Legacy, INTEL286, priv op0=r r=rax rm=ds:rax;UInt16
# ltr sp
0F00 DC, Ltr_r32m16, Legacy, INTEL386, priv op0=r r=sp
# ltr r15w
41 0F00 DF, Ltr_r32m16, Legacy, INTEL386, priv op0=r r=r15w
# ltr word ptr [rax]
0F00 18, Ltr_r32m16, Legacy, INTEL386, priv op0=r r=rax rm=ds:rax;UInt16
# ltr sp
48 0F00 DC, Ltr_r64m16, Legacy, X64, priv op0=r r=sp
# ltr r15w
49 0F00 DF, Ltr_r64m16, Legacy, X64, priv op0=r r=r15w
# ltr word ptr [rax]
48 0F00 18, Ltr_r64m16, Legacy, X64, priv op0=r r=rax rm=ds:rax;UInt16
# verr bp
66 0F00 E5, Verr_rm16, Legacy, INTEL286, fw=z op0=r r=bp
# verr word ptr [rax]
66 0F00 20, Verr_rm16, Legacy, INTEL286, fw=z op0=r r=rax rm=ds:rax;UInt16
# verr bp
0F00 E5, Verr_r32m16, Legacy, INTEL386, fw=z op0=r r=bp
# verr r15w
41 0F00 E7, Verr_r32m16, Legacy, INTEL386, fw=z op0=r r=r15w
# verr word ptr [rax]
0F00 20, Verr_r32m16, Legacy, INTEL386, fw=z op0=r r=rax rm=ds:rax;UInt16
# verr bp
48 0F00 E5, Verr_r64m16, Legacy, X64, fw=z op0=r r=bp
# verr r15w
49 0F00 E7, Verr_r64m16, Legacy, X64, fw=z op0=r r=r15w
# verr word ptr [rax]
48 0F00 20, Verr_r64m16, Legacy, X64, fw=z op0=r r=rax rm=ds:rax;UInt16
# verw si
66 0F00 EE, Verw_rm16, Legacy, INTEL286, fw=z op0=r r=si
# verw word ptr [rax]
66 0F00 28, Verw_rm16, Legacy, INTEL286, fw=z op0=r r=rax rm=ds:rax;UInt16
# verw si
0F00 EE, Verw_r32m16, Legacy, INTEL386, fw=z op0=r r=si
# verw r15w
41 0F00 EF, Verw_r32m16, Legacy, INTEL386, fw=z op0=r r=r15w
# verw word ptr [rax]
0F00 28, Verw_r32m16, Legacy, INTEL386, fw=z op0=r r=rax rm=ds:rax;UInt16
# verw si
48 0F00 EE, Verw_r64m16, Legacy, X64, fw=z op0=r r=si
# verw r15w
49 0F00 EF, Verw_r64m16, Legacy, X64, fw=z op0=r r=r15w
# verw word ptr [rax]
48 0F00 28, Verw_r64m16, Legacy, X64, fw=z op0=r r=rax rm=ds:rax;UInt16
# sgdt [rax]
0F01 00, Sgdt_m1664, Legacy, X64, op0=w r=rax wm=ds:rax;Fword10
# sidt [rax]
0F01 08, Sidt_m1664, Legacy, X64, op0=w r=rax wm=ds:rax;Fword10
# lgdt fword ptr [rax]
0F01 10, Lgdt_m1664, Legacy, X64, priv op0=r r=rax rm=ds:rax;Fword10
# lidt fword ptr [rax]
0F01 18, Lidt_m1664, Legacy, X64, priv op0=r r=rax rm=ds:rax;Fword10
# smsw bp
66 0F01 E5, Smsw_rm16, Legacy, INTEL286, op0=w w=bp r=cr0
# smsw word ptr [rax]
66 0F01 20, Smsw_rm16, Legacy, INTEL286, op0=w r=cr0 r=rax wm=ds:rax;UInt16
# smsw ebp
0F01 E5, Smsw_r32m16, Legacy, INTEL386, op0=w w=rbp r=cr0
# smsw word ptr [rax]
0F01 20, Smsw_r32m16, Legacy, INTEL386, op0=w r=cr0 r=rax wm=ds:rax;UInt16
# smsw rbp
48 0F01 E5, Smsw_r64m16, Legacy, X64, op0=w w=rbp r=cr0
# smsw word ptr [rax]
48 0F01 20, Smsw_r64m16, Legacy, X64, op0=w r=cr0 r=rax wm=ds:rax;UInt16
# lmsw si
66 0F01 F6, Lmsw_rm16, Legacy, INTEL286, priv op0=r r=si rw=cr0
# lmsw word ptr [rax]
66 0F01 30, Lmsw_rm16, Legacy, INTEL286, priv op0=r rw=cr0 r=rax rm=ds:rax;UInt16
# lmsw si
0F01 F6, Lmsw_r32m16, Legacy, INTEL386, priv op0=r r=si rw=cr0
# lmsw r15w
41 0F01 F7, Lmsw_r32m16, Legacy, INTEL386, priv op0=r r=r15w rw=cr0
# lmsw word ptr [rax]
0F01 30, Lmsw_r32m16, Legacy, INTEL386, priv op0=r rw=cr0 r=rax rm=ds:rax;UInt16
# lmsw si
48 0F01 F6, Lmsw_r64m16, Legacy, X64, priv op0=r r=si rw=cr0
# lmsw r15w
49 0F01 F7, Lmsw_r64m16, Legacy, X64, priv op0=r r=r15w rw=cr0
# lmsw word ptr [rax]
48 0F01 30, Lmsw_r64m16, Legacy, X64, priv op0=r rw=cr0 r=rax rm=ds:rax;UInt16
# invlpg [rax]
0F01 38, Invlpg_m, Legacy, INTEL486, priv op0=nma r=rax
# enclv
0F01 C0, Enclv, Legacy, OSS, fw=acopsz priv r=eax cw=rax cr=rcx;rdx;rbx cw=rcx;rdx;rbx
# enclv
67 64 48 0F01 C0, Enclv, Legacy, OSS, fw=acopsz priv r=eax cw=rax cr=rcx;rdx;rbx cw=rcx;rdx;rbx
# vmcall
0F01 C1, Vmcall, Legacy, VMX, fc=aops fw=cz flow=Call
# vmlaunch
0F01 C2, Vmlaunch, Legacy, VMX, fw=zc fc=osap priv flow=Call
# vmresume
0F01 C3, Vmresume, Legacy, VMX, fw=zc fc=osap priv flow=Call
# vmxoff
0F01 C4, Vmxoff, Legacy, VMX, fw=cz fc=aops priv
# monitor eax,rcx,rdx
67 0F01 C8, Monitord, Legacy, MONITOR, r=eax;ecx;edx
# monitor rax,rcx,rdx
0F01 C8, Monitorq, Legacy, MONITOR, r=rax;ecx;edx
# mwait rax,rcx
0F01 C9, Mwait, Legacy, MONITOR, r=eax;ecx
# clac
0F01 CA, Clac, Legacy, SMAP, priv fc=A
# stac
0F01 CB, Stac, Legacy, SMAP, priv fs=A
# encls
0F01 CF, Encls, Legacy, SGX1, fw=acopsz priv r=eax cw=rax cr=rcx;rdx;rbx cw=rcx;rdx;rbx
# encls
67 64 48 0F01 CF, Encls, Legacy, SGX1, fw=acopsz priv r=eax cw=rax cr=rcx;rdx;rbx cw=rcx;rdx;rbx
# xgetbv
0F01 D0, Xgetbv, Legacy, XSAVE, r=ecx w=rax;rdx
# xsetbv
0F01 D1, Xsetbv, Legacy, XSAVE, priv r=eax;ecx;edx
# vmfunc
0F01 D4, Vmfunc, Legacy, VMX, fw=acopsz r=eax r=ecx
# xend
0F01 D5, Xend, Legacy, RTM,
# xtest
0F01 D6, Xtest, Legacy, HLE_or_RTM, fw=z fc=acops
# enclu
0F01 D7, Enclu, Legacy, SGX1, fw=acopsz r=eax cw=rax cr=rcx;rdx;rbx cw=rcx;rdx;rbx
# enclu
67 64 48 0F01 D7, Enclu, Legacy, SGX1, fw=acopsz r=eax cw=rax cr=rcx;rdx;rbx cw=rcx;rdx;rbx
# rdpkru
0F01 EE, Rdpkru, Legacy, PKU, r=ecx w=rax;rdx
# wrpkru
0F01 EF, Wrpkru, Legacy, PKU, r=eax;ecx;edx
# swapgs
0F01 F8, Swapgs, Legacy, X64, priv
# rdtscp
0F01 F9, Rdtscp, Legacy, RDTSCP, w=rax;rcx;rdx
# lar cx,si
66 0F02 CE, Lar_r16_rm16, Legacy, INTEL286, fw=z op0=cw op1=r cw=cx r=si
# lar bx,word ptr [rax]
66 0F02 18, Lar_r16_rm16, Legacy, INTEL286, fw=z op0=cw op1=r cw=bx r=rax rm=ds:rax;UInt16
# lar ecx,esi
0F02 CE, Lar_r32_r32m16, Legacy, INTEL386, fw=z op0=cw op1=r cw=rcx r=si
# lar ecx,r15d
41 0F02 CF, Lar_r32_r32m16, Legacy, INTEL386, fw=z op0=cw op1=r cw=rcx r=r15w
# lar ebx,word ptr [rax]
0F02 18, Lar_r32_r32m16, Legacy, INTEL386, fw=z op0=cw op1=r cw=rbx r=rax rm=ds:rax;UInt16
# lar rcx,rsi
48 0F02 CE, Lar_r64_r64m16, Legacy, X64, fw=z op0=cw op1=r cw=rcx r=si
# lar rcx,r15
49 0F02 CF, Lar_r64_r64m16, Legacy, X64, fw=z op0=cw op1=r cw=rcx r=r15w
# lar rbx,word ptr [rax]
48 0F02 18, Lar_r64_r64m16, Legacy, X64, fw=z op0=cw op1=r cw=rbx r=rax rm=ds:rax;UInt16
# lsl cx,si
66 0F03 CE, Lsl_r16_rm16, Legacy, INTEL286, fw=z op0=cw op1=r cw=cx r=si
# lsl bx,word ptr [rax]
66 0F03 18, Lsl_r16_rm16, Legacy, INTEL286, fw=z op0=cw op1=r cw=bx r=rax rm=ds:rax;UInt16
# lsl ecx,esi
0F03 CE, Lsl_r32_r32m16, Legacy, INTEL386, fw=z op0=cw op1=r cw=rcx r=si
# lsl ecx,r15d
41 0F03 CF, Lsl_r32_r32m16, Legacy, INTEL386, fw=z op0=cw op1=r cw=rcx r=r15w
# lsl ebx,word ptr [rax]
0F03 18, Lsl_r32_r32m16, Legacy, INTEL386, fw=z op0=cw op1=r cw=rbx r=rax rm=ds:rax;UInt16
# lsl rcx,rsi
48 0F03 CE, Lsl_r64_r64m16, Legacy, X64, fw=z op0=cw op1=r cw=rcx r=si
# lsl rcx,r15
49 0F03 CF, Lsl_r64_r64m16, Legacy, X64, fw=z op0=cw op1=r cw=rcx r=r15w
# lsl rbx,word ptr [rax]
48 0F03 18, Lsl_r64_r64m16, Legacy, X64, fw=z op0=cw op1=r cw=rbx r=rax rm=ds:rax;UInt16
# syscall
0F05, Syscall, Legacy, SYSCALL, fr=acopszidA fw=acopszidA flow=Call w=rcx;r11
# clts
0F06, Clts, Legacy, INTEL286, priv rw=cr0
# sysret
0F07, Sysretd, Legacy, SYSCALL, fw=acopszidA priv flow=Return r=ecx;r11d w=cs;ss
# sysretq
48 0F07, Sysretq, Legacy, SYSCALL, fw=acopszidA priv flow=Return r=rcx;r11d w=cs;ss
# invd
0F08, Invd, Legacy, INTEL486, priv
# wbinvd
0F09, Wbinvd, Legacy, INTEL486, priv
# ud2
0F0B, Ud2, Legacy, INTEL286, flow=Exception
# prefetch [rax]
0F0D 00, Prefetch_m8, Legacy, PREFETCHW, op0=nma r=rax
# prefetchw [rax]
0F0D 08, Prefetchw_m8, Legacy, PREFETCHW, op0=nma r=rax
# prefetchwt1 [rax]
0F0D 10, Prefetchwt1_m8, Legacy, PREFETCHWT1, op0=nma r=rax
# prefetchw [rax]
0F0D 18, Prefetchreserved3_m8, Legacy, PREFETCHW, op0=nma r=rax
# prefetch [rax]
0F0D 20, Prefetchreserved4_m8, Legacy, PREFETCHW, op0=nma r=rax
# prefetch [rax]
0F0D 28, Prefetchreserved5_m8, Legacy, PREFETCHW, op0=nma r=rax
# prefetch [rax]
0F0D 30, Prefetchreserved6_m8, Legacy, PREFETCHW, op0=nma r=rax
# prefetch [rax]
0F0D 38, Prefetchreserved7_m8, Legacy, PREFETCHW, op0=nma r=rax
# movups xmm1,xmm5
0F10 CD, Movups_xmm_xmmm128, Legacy, SSE, op0=w op1=r w=xmm1 r=xmm5
# movups xmm1,[rax]
0F10 08, Movups_xmm_xmmm128, Legacy, SSE, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vmovups xmm1,xmm5
C5F8 10 CD, VEX_Vmovups_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vmovups xmm2,[rax]
C5F8 10 10, VEX_Vmovups_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Float32
# vmovups ymm1,ymm5
C5FC 10 CD, VEX_Vmovups_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm1 r=ymm5
# vmovups ymm2,[rax]
C5FC 10 10, VEX_Vmovups_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed256_Float32
# vmovups xmm2,xmm3
62 F17C08 10 D3, EVEX_Vmovups_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vmovups xmm2,[rax+10h]
62 F17C08 10 50 01, EVEX_Vmovups_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float32
# vmovups xmm2{k3},xmm3
62 F17C0B 10 D3, EVEX_Vmovups_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vmovups xmm10{k3}{z},xmm19
62 317C8B 10 D3, EVEX_Vmovups_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vmovups ymm2,ymm3
62 F17C28 10 D3, EVEX_Vmovups_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=ymm3
# vmovups ymm2,[rax+20h]
62 F17C28 10 50 01, EVEX_Vmovups_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float32
# vmovups ymm2{k3},ymm3
62 F17C2B 10 D3, EVEX_Vmovups_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vmovups ymm10{k3}{z},ymm19
62 317CAB 10 D3, EVEX_Vmovups_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=ymm19
# vmovups zmm2,zmm3
62 F17C48 10 D3, EVEX_Vmovups_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=zmm3
# vmovups zmm2,[rax+40h]
62 F17C48 10 50 01, EVEX_Vmovups_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float32
# vmovups zmm2{k3},zmm3
62 F17C4B 10 D3, EVEX_Vmovups_zmm_k1z_zmmm512, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vmovups zmm10{k3}{z},zmm19
62 317CCB 10 D3, EVEX_Vmovups_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=zmm19
# movupd xmm1,xmm5
66 0F10 CD, Movupd_xmm_xmmm128, Legacy, SSE2, op0=w op1=r w=xmm1 r=xmm5
# movupd xmm1,[rax]
66 0F10 08, Movupd_xmm_xmmm128, Legacy, SSE2, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vmovupd xmm1,xmm5
C5F9 10 CD, VEX_Vmovupd_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vmovupd xmm2,[rax]
C5F9 10 10, VEX_Vmovupd_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Float64
# vmovupd ymm1,ymm5
C5FD 10 CD, VEX_Vmovupd_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm1 r=ymm5
# vmovupd ymm2,[rax]
C5FD 10 10, VEX_Vmovupd_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed256_Float64
# vmovupd xmm2,xmm3
62 F1FD08 10 D3, EVEX_Vmovupd_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vmovupd xmm2,[rax+10h]
62 F1FD08 10 50 01, EVEX_Vmovupd_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float64
# vmovupd xmm2{k3},xmm3
62 F1FD0B 10 D3, EVEX_Vmovupd_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vmovupd xmm10{k3}{z},xmm19
62 31FD8B 10 D3, EVEX_Vmovupd_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vmovupd ymm2,ymm3
62 F1FD28 10 D3, EVEX_Vmovupd_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=ymm3
# vmovupd ymm2,[rax+20h]
62 F1FD28 10 50 01, EVEX_Vmovupd_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float64
# vmovupd ymm2{k3},ymm3
62 F1FD2B 10 D3, EVEX_Vmovupd_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vmovupd ymm10{k3}{z},ymm19
62 31FDAB 10 D3, EVEX_Vmovupd_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=ymm19
# vmovupd zmm2,zmm3
62 F1FD48 10 D3, EVEX_Vmovupd_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=zmm3
# vmovupd zmm2,[rax+40h]
62 F1FD48 10 50 01, EVEX_Vmovupd_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float64
# vmovupd zmm2{k3},zmm3
62 F1FD4B 10 D3, EVEX_Vmovupd_zmm_k1z_zmmm512, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vmovupd zmm10{k3}{z},zmm19
62 31FDCB 10 D3, EVEX_Vmovupd_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=zmm19
# movss xmm1,xmm5
F3 0F10 CD, Movss_xmm_xmmm32, Legacy, SSE, op0=rw op1=r rw=xmm1 r=xmm5
# movss xmm1,dword ptr [rax]
F3 0F10 08, Movss_xmm_xmmm32, Legacy, SSE, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Float32
# vmovss xmm1,xmm6,xmm5
C5CA 10 CD, VEX_Vmovss_xmm_xmm_xmm, VEX, AVX, op0=w op1=r op2=r w=vmm1 r=xmm6 r=xmm5
# vmovss xmm2,dword ptr [rax]
C5FA 10 10, VEX_Vmovss_xmm_m32, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Float32
# vmovss xmm2,xmm6,xmm3
62 F14E08 10 D3, EVEX_Vmovss_xmm_k1z_xmm_xmm, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vmovss xmm10{k3},xmm30,xmm19
62 310E03 10 D3, EVEX_Vmovss_xmm_k1z_xmm_xmm, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm10 r=xmm10 r=k3 r=xmm30 r=xmm19
# vmovss xmm18{k3}{z},xmm14,xmm27
62 810E8B 10 D3, EVEX_Vmovss_xmm_k1z_xmm_xmm, EVEX, AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm27
# vmovss xmm2,dword ptr [rax+4]
62 F17E08 10 50 01, EVEX_Vmovss_xmm_k1z_m32, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+4;Float32
# vmovss xmm2{k3}{z},dword ptr [rax+4]
62 F17E8B 10 50 01, EVEX_Vmovss_xmm_k1z_m32, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=rax rm=ds:rax+4;Float32
# movsd xmm1,xmm5
F2 0F10 CD, Movsd_xmm_xmmm64, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# movsd xmm1,qword ptr [rax]
F2 0F10 08, Movsd_xmm_xmmm64, Legacy, SSE2, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Float64
# vmovsd xmm1,xmm6,xmm5
C5CB 10 CD, VEX_Vmovsd_xmm_xmm_xmm, VEX, AVX, op0=w op1=r op2=r w=vmm1 r=xmm6 r=xmm5
# vmovsd xmm2,qword ptr [rax]
C5FB 10 10, VEX_Vmovsd_xmm_m64, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Float64
# vmovsd xmm2,xmm6,xmm3
62 F1CF08 10 D3, EVEX_Vmovsd_xmm_k1z_xmm_xmm, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vmovsd xmm10{k3},xmm30,xmm19
62 318F03 10 D3, EVEX_Vmovsd_xmm_k1z_xmm_xmm, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm10 r=xmm10 r=k3 r=xmm30 r=xmm19
# vmovsd xmm18{k3}{z},xmm14,xmm27
62 818F8B 10 D3, EVEX_Vmovsd_xmm_k1z_xmm_xmm, EVEX, AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm27
# vmovsd xmm2,qword ptr [rax+8]
62 F1FF08 10 50 01, EVEX_Vmovsd_xmm_k1z_m64, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Float64
# vmovsd xmm2{k3}{z},qword ptr [rax+8]
62 F1FF8B 10 50 01, EVEX_Vmovsd_xmm_k1z_m64, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=rax rm=ds:rax+8;Float64
# movups xmm5,xmm1
0F11 CD, Movups_xmmm128_xmm, Legacy, SSE, op0=w op1=r w=xmm5 r=xmm1
# movups [rax],xmm1
0F11 08, Movups_xmmm128_xmm, Legacy, SSE, op0=w op1=r r=rax r=xmm1 wm=ds:rax;Packed128_Float32
# vmovups xmm5,xmm1
C5F8 11 CD, VEX_Vmovups_xmmm128_xmm, VEX, AVX, op0=w op1=r w=vmm5 r=xmm1
# vmovups [rax],xmm2
C5F8 11 10, VEX_Vmovups_xmmm128_xmm, VEX, AVX, op0=w op1=r r=rax r=xmm2 wm=ds:rax;Packed128_Float32
# vmovups ymm5,ymm1
C5FC 11 CD, VEX_Vmovups_ymmm256_ymm, VEX, AVX, op0=w op1=r w=vmm5 r=ymm1
# vmovups [rax],ymm2
C5FC 11 10, VEX_Vmovups_ymmm256_ymm, VEX, AVX, op0=w op1=r r=rax r=ymm2 wm=ds:rax;Packed256_Float32
# vmovups xmm3,xmm2
62 F17C08 11 D3, EVEX_Vmovups_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vmovups [rax+10h],xmm2
62 F17C08 11 50 01, EVEX_Vmovups_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+0x10;Packed128_Float32
# vmovups [rax+10h]{k3},xmm2
62 F17C0B 11 50 01, EVEX_Vmovups_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+0x10;Packed128_Float32
# vmovups xmm3{k3},xmm2
62 F17C0B 11 D3, EVEX_Vmovups_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vmovups xmm19{k3}{z},xmm10
62 317C8B 11 D3, EVEX_Vmovups_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm19 r=k3 r=xmm10
# vmovups ymm3,ymm2
62 F17C28 11 D3, EVEX_Vmovups_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vmovups [rax+20h],ymm2
62 F17C28 11 50 01, EVEX_Vmovups_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+0x20;Packed256_Float32
# vmovups [rax+20h]{k3},ymm2
62 F17C2B 11 50 01, EVEX_Vmovups_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+0x20;Packed256_Float32
# vmovups ymm3{k3},ymm2
62 F17C2B 11 D3, EVEX_Vmovups_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=ymm3 r=k3 r=ymm2
# vmovups ymm19{k3}{z},ymm10
62 317CAB 11 D3, EVEX_Vmovups_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm19 r=k3 r=ymm10
# vmovups zmm3,zmm2
62 F17C48 11 D3, EVEX_Vmovups_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vmovups [rax+40h],zmm2
62 F17C48 11 50 01, EVEX_Vmovups_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x40;Packed512_Float32
# vmovups [rax+40h]{k3},zmm2
62 F17C4B 11 50 01, EVEX_Vmovups_zmmm512_k1z_zmm, EVEX, AVX512F, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x40;Packed512_Float32
# vmovups zmm3{k3},zmm2
62 F17C4B 11 D3, EVEX_Vmovups_zmmm512_k1z_zmm, EVEX, AVX512F, op0=rcw op1=r cw=vmm3 r=zmm3 r=k3 r=zmm2
# vmovups zmm19{k3}{z},zmm10
62 317CCB 11 D3, EVEX_Vmovups_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm19 r=k3 r=zmm10
# movupd xmm5,xmm1
66 0F11 CD, Movupd_xmmm128_xmm, Legacy, SSE2, op0=w op1=r w=xmm5 r=xmm1
# movupd [rax],xmm1
66 0F11 08, Movupd_xmmm128_xmm, Legacy, SSE2, op0=w op1=r r=rax r=xmm1 wm=ds:rax;Packed128_Float64
# vmovupd xmm5,xmm1
C5F9 11 CD, VEX_Vmovupd_xmmm128_xmm, VEX, AVX, op0=w op1=r w=vmm5 r=xmm1
# vmovupd [rax],xmm2
C5F9 11 10, VEX_Vmovupd_xmmm128_xmm, VEX, AVX, op0=w op1=r r=rax r=xmm2 wm=ds:rax;Packed128_Float64
# vmovupd ymm5,ymm1
C5FD 11 CD, VEX_Vmovupd_ymmm256_ymm, VEX, AVX, op0=w op1=r w=vmm5 r=ymm1
# vmovupd [rax],ymm2
C5FD 11 10, VEX_Vmovupd_ymmm256_ymm, VEX, AVX, op0=w op1=r r=rax r=ymm2 wm=ds:rax;Packed256_Float64
# vmovupd xmm3,xmm2
62 F1FD08 11 D3, EVEX_Vmovupd_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vmovupd [rax+10h],xmm2
62 F1FD08 11 50 01, EVEX_Vmovupd_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+0x10;Packed128_Float64
# vmovupd [rax+10h]{k3},xmm2
62 F1FD0B 11 50 01, EVEX_Vmovupd_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+0x10;Packed128_Float64
# vmovupd xmm3{k3},xmm2
62 F1FD0B 11 D3, EVEX_Vmovupd_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vmovupd xmm19{k3}{z},xmm10
62 31FD8B 11 D3, EVEX_Vmovupd_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm19 r=k3 r=xmm10
# vmovupd ymm3,ymm2
62 F1FD28 11 D3, EVEX_Vmovupd_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vmovupd [rax+20h],ymm2
62 F1FD28 11 50 01, EVEX_Vmovupd_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+0x20;Packed256_Float64
# vmovupd [rax+20h]{k3},ymm2
62 F1FD2B 11 50 01, EVEX_Vmovupd_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+0x20;Packed256_Float64
# vmovupd ymm3{k3},ymm2
62 F1FD2B 11 D3, EVEX_Vmovupd_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=ymm3 r=k3 r=ymm2
# vmovupd ymm19{k3}{z},ymm10
62 31FDAB 11 D3, EVEX_Vmovupd_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm19 r=k3 r=ymm10
# vmovupd zmm3,zmm2
62 F1FD48 11 D3, EVEX_Vmovupd_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vmovupd [rax+40h],zmm2
62 F1FD48 11 50 01, EVEX_Vmovupd_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x40;Packed512_Float64
# vmovupd [rax+40h]{k3},zmm2
62 F1FD4B 11 50 01, EVEX_Vmovupd_zmmm512_k1z_zmm, EVEX, AVX512F, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x40;Packed512_Float64
# vmovupd zmm3{k3},zmm2
62 F1FD4B 11 D3, EVEX_Vmovupd_zmmm512_k1z_zmm, EVEX, AVX512F, op0=rcw op1=r cw=vmm3 r=zmm3 r=k3 r=zmm2
# vmovupd zmm19{k3}{z},zmm10
62 31FDCB 11 D3, EVEX_Vmovupd_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm19 r=k3 r=zmm10
# movss xmm5,xmm1
F3 0F11 CD, Movss_xmmm32_xmm, Legacy, SSE, op0=rw op1=r rw=xmm5 r=xmm1
# movss dword ptr [rax],xmm1
F3 0F11 08, Movss_xmmm32_xmm, Legacy, SSE, op0=w op1=r r=rax r=xmm1 wm=ds:rax;Float32
# vmovss xmm5,xmm6,xmm1
C5CA 11 CD, VEX_Vmovss_xmm_xmm_xmm_0F11, VEX, AVX, op0=w op1=r op2=r w=vmm5 r=xmm6 r=xmm1
# vmovss dword ptr [rax],xmm2
C5FA 11 10, VEX_Vmovss_m32_xmm, VEX, AVX, op0=w op1=r r=rax r=xmm2 wm=ds:rax;Float32
# vmovss xmm3,xmm6,xmm2
62 F14E08 11 D3, EVEX_Vmovss_xmm_k1z_xmm_xmm_0F11, EVEX, AVX512F, op0=w op1=r op2=r w=vmm3 r=xmm6 r=xmm2
# vmovss xmm19{k3},xmm30,xmm10
62 310E03 11 D3, EVEX_Vmovss_xmm_k1z_xmm_xmm_0F11, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm19 r=xmm19 r=k3 r=xmm30 r=xmm10
# vmovss xmm27{k3}{z},xmm14,xmm18
62 810E8B 11 D3, EVEX_Vmovss_xmm_k1z_xmm_xmm_0F11, EVEX, AVX512F, op0=w op1=r op2=r w=vmm27 r=k3 r=xmm14 r=xmm18
# vmovss dword ptr [rax+4],xmm2
62 F17E08 11 50 01, EVEX_Vmovss_m32_k1_xmm, EVEX, AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+4;Float32
# vmovss dword ptr [rax+4]{k3},xmm2
62 F17E0B 11 50 01, EVEX_Vmovss_m32_k1_xmm, EVEX, AVX512F, op0=cw op1=r r=rax r=k3 r=xmm2 cwm=ds:rax+4;Float32
# movsd xmm5,xmm1
F2 0F11 CD, Movsd_xmmm64_xmm, Legacy, SSE2, op0=rw op1=r rw=xmm5 r=xmm1
# movsd qword ptr [rax],xmm1
F2 0F11 08, Movsd_xmmm64_xmm, Legacy, SSE2, op0=w op1=r r=rax r=xmm1 wm=ds:rax;Float64
# vmovsd xmm5,xmm6,xmm1
C5CB 11 CD, VEX_Vmovsd_xmm_xmm_xmm_0F11, VEX, AVX, op0=w op1=r op2=r w=vmm5 r=xmm6 r=xmm1
# vmovsd qword ptr [rax],xmm2
C5FB 11 10, VEX_Vmovsd_m64_xmm, VEX, AVX, op0=w op1=r r=rax r=xmm2 wm=ds:rax;Float64
# vmovsd xmm3,xmm6,xmm2
62 F1CF08 11 D3, EVEX_Vmovsd_xmm_k1z_xmm_xmm_0F11, EVEX, AVX512F, op0=w op1=r op2=r w=vmm3 r=xmm6 r=xmm2
# vmovsd xmm19{k3},xmm30,xmm10
62 318F03 11 D3, EVEX_Vmovsd_xmm_k1z_xmm_xmm_0F11, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm19 r=xmm19 r=k3 r=xmm30 r=xmm10
# vmovsd xmm27{k3}{z},xmm14,xmm18
62 818F8B 11 D3, EVEX_Vmovsd_xmm_k1z_xmm_xmm_0F11, EVEX, AVX512F, op0=w op1=r op2=r w=vmm27 r=k3 r=xmm14 r=xmm18
# vmovsd qword ptr [rax+8],xmm2
62 F1FF08 11 50 01, EVEX_Vmovsd_m64_k1_xmm, EVEX, AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+8;Float64
# vmovsd qword ptr [rax+8]{k3},xmm2
62 F1FF0B 11 50 01, EVEX_Vmovsd_m64_k1_xmm, EVEX, AVX512F, op0=cw op1=r r=rax r=k3 r=xmm2 cwm=ds:rax+8;Float64
# movhlps xmm1,xmm5
0F12 CD, Movhlps_xmm_xmm, Legacy, SSE, op0=rw op1=r rw=xmm1 r=xmm5
# movlps xmm1,qword ptr [rax]
0F12 08, Movlps_xmm_m64, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed64_Float32
# vmovhlps xmm2,xmm6,xmm3
C5C8 12 D3, VEX_Vmovhlps_xmm_xmm_xmm, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vmovlps xmm2,xmm6,qword ptr [rax]
C5C8 12 10, VEX_Vmovlps_xmm_xmm_m64, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed64_Float32
# vmovhlps xmm2,xmm6,xmm3
62 F14C08 12 D3, EVEX_Vmovhlps_xmm_xmm_xmm, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vmovlps xmm2,xmm6,qword ptr [rax+8]
62 F14C08 12 50 01, EVEX_Vmovlps_xmm_xmm_m64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;Packed64_Float32
# movlpd xmm1,qword ptr [rax]
66 0F12 08, Movlpd_xmm_m64, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Float64
# vmovlpd xmm2,xmm6,qword ptr [rax]
C5C9 12 10, VEX_Vmovlpd_xmm_xmm_m64, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float64
# vmovlpd xmm2,xmm6,qword ptr [rax+8]
62 F1CD08 12 50 01, EVEX_Vmovlpd_xmm_xmm_m64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# movsldup xmm1,xmm5
F3 0F12 CD, Movsldup_xmm_xmmm128, Legacy, SSE3, op0=w op1=r w=xmm1 r=xmm5
# movsldup xmm1,[rax]
F3 0F12 08, Movsldup_xmm_xmmm128, Legacy, SSE3, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vmovsldup xmm1,xmm5
C5FA 12 CD, VEX_Vmovsldup_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vmovsldup xmm2,xmmword ptr [rax]
C5FA 12 10, VEX_Vmovsldup_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Float32
# vmovsldup ymm1,ymm5
C5FE 12 CD, VEX_Vmovsldup_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm1 r=ymm5
# vmovsldup ymm2,ymmword ptr [rax]
C5FE 12 10, VEX_Vmovsldup_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed256_Float32
# vmovsldup xmm2,xmm3
62 F17E08 12 D3, EVEX_Vmovsldup_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vmovsldup xmm2,xmmword ptr [rax+10h]
62 F17E08 12 50 01, EVEX_Vmovsldup_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float32
# vmovsldup xmm2{k3},xmm3
62 F17E0B 12 D3, EVEX_Vmovsldup_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vmovsldup xmm10{k3}{z},xmm19
62 317E8B 12 D3, EVEX_Vmovsldup_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vmovsldup ymm2,ymm3
62 F17E28 12 D3, EVEX_Vmovsldup_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=ymm3
# vmovsldup ymm2,ymmword ptr [rax+20h]
62 F17E28 12 50 01, EVEX_Vmovsldup_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float32
# vmovsldup ymm2{k3},ymm3
62 F17E2B 12 D3, EVEX_Vmovsldup_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vmovsldup ymm10{k3}{z},ymm19
62 317EAB 12 D3, EVEX_Vmovsldup_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=ymm19
# vmovsldup zmm2,zmm3
62 F17E48 12 D3, EVEX_Vmovsldup_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=zmm3
# vmovsldup zmm2,zmmword ptr [rax+40h]
62 F17E48 12 50 01, EVEX_Vmovsldup_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float32
# vmovsldup zmm2{k3},zmm3
62 F17E4B 12 D3, EVEX_Vmovsldup_zmm_k1z_zmmm512, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vmovsldup zmm10{k3}{z},zmm19
62 317ECB 12 D3, EVEX_Vmovsldup_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=zmm19
# movddup xmm1,xmm5
F2 0F12 CD, Movddup_xmm_xmmm64, Legacy, SSE3, op0=w op1=r w=xmm1 r=xmm5
# movddup xmm1,qword ptr [rax]
F2 0F12 08, Movddup_xmm_xmmm64, Legacy, SSE3, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Float64
# vmovddup xmm1,xmm5
C5FB 12 CD, VEX_Vmovddup_xmm_xmmm64, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vmovddup xmm2,qword ptr [rax]
C5FB 12 10, VEX_Vmovddup_xmm_xmmm64, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Float64
# vmovddup ymm1,ymm5
C5FF 12 CD, VEX_Vmovddup_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm1 r=ymm5
# vmovddup ymm2,ymmword ptr [rax]
C5FF 12 10, VEX_Vmovddup_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed256_Float64
# vmovddup xmm2,xmm3
62 F1FF08 12 D3, EVEX_Vmovddup_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vmovddup xmm2,qword ptr [rax+8]
62 F1FF08 12 50 01, EVEX_Vmovddup_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Float64
# vmovddup xmm2{k3},xmm3
62 F1FF0B 12 D3, EVEX_Vmovddup_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vmovddup xmm10{k3}{z},xmm19
62 31FF8B 12 D3, EVEX_Vmovddup_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vmovddup ymm2,ymm3
62 F1FF28 12 D3, EVEX_Vmovddup_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=ymm3
# vmovddup ymm2,ymmword ptr [rax+20h]
62 F1FF28 12 50 01, EVEX_Vmovddup_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float64
# vmovddup ymm2{k3},ymm3
62 F1FF2B 12 D3, EVEX_Vmovddup_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vmovddup ymm10{k3}{z},ymm19
62 31FFAB 12 D3, EVEX_Vmovddup_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=ymm19
# vmovddup zmm2,zmm3
62 F1FF48 12 D3, EVEX_Vmovddup_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=zmm3
# vmovddup zmm2,zmmword ptr [rax+40h]
62 F1FF48 12 50 01, EVEX_Vmovddup_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float64
# vmovddup zmm2{k3},zmm3
62 F1FF4B 12 D3, EVEX_Vmovddup_zmm_k1z_zmmm512, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vmovddup zmm10{k3}{z},zmm19
62 31FFCB 12 D3, EVEX_Vmovddup_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=zmm19
# movlps qword ptr [rax],xmm1
0F13 08, Movlps_m64_xmm, Legacy, SSE, op0=w op1=r r=rax r=xmm1 wm=ds:rax;Packed64_Float32
# vmovlps qword ptr [rax],xmm2
C5F8 13 10, VEX_Vmovlps_m64_xmm, VEX, AVX, op0=w op1=r r=rax r=xmm2 wm=ds:rax;Packed64_Float32
# vmovlps qword ptr [rax+8],xmm2
62 F17C08 13 50 01, EVEX_Vmovlps_m64_xmm, EVEX, AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+8;Packed64_Float32
# movlpd qword ptr [rax],xmm1
66 0F13 08, Movlpd_m64_xmm, Legacy, SSE2, op0=w op1=r r=rax r=xmm1 wm=ds:rax;Float64
# vmovlpd qword ptr [rax],xmm2
C5F9 13 10, VEX_Vmovlpd_m64_xmm, VEX, AVX, op0=w op1=r r=rax r=xmm2 wm=ds:rax;Float64
# vmovlpd qword ptr [rax+8],xmm2
62 F1FD08 13 50 01, EVEX_Vmovlpd_m64_xmm, EVEX, AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+8;Float64
# unpcklps xmm1,xmm5
0F14 CD, Unpcklps_xmm_xmmm128, Legacy, SSE, op0=rw op1=r rw=xmm1 r=xmm5
# unpcklps xmm1,[rax]
0F14 08, Unpcklps_xmm_xmmm128, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vunpcklps xmm2,xmm6,xmm3
C5C8 14 D3, VEX_Vunpcklps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vunpcklps xmm2,xmm6,[rax]
C5C8 14 10, VEX_Vunpcklps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vunpcklps ymm2,ymm6,ymm3
C5CC 14 D3, VEX_Vunpcklps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vunpcklps ymm2,ymm6,[rax]
C5CC 14 10, VEX_Vunpcklps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vunpcklps xmm2,xmm6,[rax+10h]
62 F14C08 14 50 01, EVEX_Vunpcklps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vunpcklps xmm2{k3},xmm6,xmm3
62 F14C0B 14 D3, EVEX_Vunpcklps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vunpcklps xmm2{k3}{z},xmm6,xmm3
62 F14C8B 14 D3, EVEX_Vunpcklps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vunpcklps ymm2,ymm6,[rax+20h]
62 F14C28 14 50 01, EVEX_Vunpcklps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vunpcklps ymm2{k3},ymm6,ymm3
62 F14C2B 14 D3, EVEX_Vunpcklps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vunpcklps ymm2{k3}{z},ymm6,ymm3
62 F14CAB 14 D3, EVEX_Vunpcklps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vunpcklps zmm2,zmm6,[rax+40h]
62 F14C48 14 50 01, EVEX_Vunpcklps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vunpcklps zmm2{k3},zmm6,zmm3
62 F14C4B 14 D3, EVEX_Vunpcklps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vunpcklps zmm2{k3}{z},zmm6,zmm3
62 F14CCB 14 D3, EVEX_Vunpcklps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# unpcklpd xmm1,xmm5
66 0F14 CD, Unpcklpd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# unpcklpd xmm1,[rax]
66 0F14 08, Unpcklpd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vunpcklpd xmm2,xmm6,xmm3
C5C9 14 D3, VEX_Vunpcklpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vunpcklpd xmm2,xmm6,[rax]
C5C9 14 10, VEX_Vunpcklpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vunpcklpd ymm2,ymm6,ymm3
C5CD 14 D3, VEX_Vunpcklpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vunpcklpd ymm2,ymm6,[rax]
C5CD 14 10, VEX_Vunpcklpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vunpcklpd xmm2,xmm6,[rax+10h]
62 F1CD08 14 50 01, EVEX_Vunpcklpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vunpcklpd xmm18{k3},xmm14,xmm3
62 E18D0B 14 D3, EVEX_Vunpcklpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vunpcklpd xmm2{k3}{z},xmm6,xmm3
62 F1CD8B 14 D3, EVEX_Vunpcklpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vunpcklpd ymm2,ymm6,[rax+20h]
62 F1CD28 14 50 01, EVEX_Vunpcklpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vunpcklpd ymm18{k3},ymm14,ymm3
62 E18D2B 14 D3, EVEX_Vunpcklpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vunpcklpd ymm2{k3}{z},ymm6,ymm3
62 F1CDAB 14 D3, EVEX_Vunpcklpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vunpcklpd zmm2,zmm6,[rax+40h]
62 F1CD48 14 50 01, EVEX_Vunpcklpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vunpcklpd zmm18{k3},zmm14,zmm3
62 E18D4B 14 D3, EVEX_Vunpcklpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vunpcklpd zmm2{k3}{z},zmm6,zmm3
62 F1CDCB 14 D3, EVEX_Vunpcklpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# unpckhps xmm1,xmm5
0F15 CD, Unpckhps_xmm_xmmm128, Legacy, SSE, op0=rw op1=r rw=xmm1 r=xmm5
# unpckhps xmm1,[rax]
0F15 08, Unpckhps_xmm_xmmm128, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vunpckhps xmm2,xmm6,xmm3
C5C8 15 D3, VEX_Vunpckhps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vunpckhps xmm2,xmm6,[rax]
C5C8 15 10, VEX_Vunpckhps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vunpckhps ymm2,ymm6,ymm3
C5CC 15 D3, VEX_Vunpckhps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vunpckhps ymm2,ymm6,[rax]
C5CC 15 10, VEX_Vunpckhps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vunpckhps xmm2,xmm6,[rax+10h]
62 F14C08 15 50 01, EVEX_Vunpckhps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vunpckhps xmm2{k3},xmm6,xmm3
62 F14C0B 15 D3, EVEX_Vunpckhps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vunpckhps xmm2{k3}{z},xmm6,xmm3
62 F14C8B 15 D3, EVEX_Vunpckhps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vunpckhps ymm2,ymm6,[rax+20h]
62 F14C28 15 50 01, EVEX_Vunpckhps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vunpckhps ymm2{k3},ymm6,ymm3
62 F14C2B 15 D3, EVEX_Vunpckhps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vunpckhps ymm2{k3}{z},ymm6,ymm3
62 F14CAB 15 D3, EVEX_Vunpckhps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vunpckhps zmm2,zmm6,[rax+40h]
62 F14C48 15 50 01, EVEX_Vunpckhps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vunpckhps zmm2{k3},zmm6,zmm3
62 F14C4B 15 D3, EVEX_Vunpckhps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vunpckhps zmm2{k3}{z},zmm6,zmm3
62 F14CCB 15 D3, EVEX_Vunpckhps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# unpckhpd xmm1,xmm5
66 0F15 CD, Unpckhpd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# unpckhpd xmm1,[rax]
66 0F15 08, Unpckhpd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vunpckhpd xmm2,xmm6,xmm3
C5C9 15 D3, VEX_Vunpckhpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vunpckhpd xmm2,xmm6,[rax]
C5C9 15 10, VEX_Vunpckhpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vunpckhpd ymm2,ymm6,ymm3
C5CD 15 D3, VEX_Vunpckhpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vunpckhpd ymm2,ymm6,[rax]
C5CD 15 10, VEX_Vunpckhpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vunpckhpd xmm2,xmm6,[rax+10h]
62 F1CD08 15 50 01, EVEX_Vunpckhpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vunpckhpd xmm18{k3},xmm14,xmm3
62 E18D0B 15 D3, EVEX_Vunpckhpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vunpckhpd xmm2{k3}{z},xmm6,xmm3
62 F1CD8B 15 D3, EVEX_Vunpckhpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vunpckhpd ymm2,ymm6,[rax+20h]
62 F1CD28 15 50 01, EVEX_Vunpckhpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vunpckhpd ymm18{k3},ymm14,ymm3
62 E18D2B 15 D3, EVEX_Vunpckhpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vunpckhpd ymm2{k3}{z},ymm6,ymm3
62 F1CDAB 15 D3, EVEX_Vunpckhpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vunpckhpd zmm2,zmm6,[rax+40h]
62 F1CD48 15 50 01, EVEX_Vunpckhpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vunpckhpd zmm18{k3},zmm14,zmm3
62 E18D4B 15 D3, EVEX_Vunpckhpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vunpckhpd zmm2{k3}{z},zmm6,zmm3
62 F1CDCB 15 D3, EVEX_Vunpckhpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# movlhps xmm1,xmm5
0F16 CD, Movlhps_xmm_xmm, Legacy, SSE, op0=rw op1=r rw=xmm1 r=xmm5
# vmovlhps xmm2,xmm6,xmm3
C5C8 16 D3, VEX_Vmovlhps_xmm_xmm_xmm, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vmovlhps xmm2,xmm6,xmm3
62 F14C08 16 D3, EVEX_Vmovlhps_xmm_xmm_xmm, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# movhps xmm1,qword ptr [rax]
0F16 08, Movhps_xmm_m64, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed64_Float32
# vmovhps xmm2,xmm6,qword ptr [rax]
C5C8 16 10, VEX_Vmovhps_xmm_xmm_m64, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed64_Float32
# vmovhps xmm2,xmm6,qword ptr [rax+8]
62 F14C08 16 50 01, EVEX_Vmovhps_xmm_xmm_m64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;Packed64_Float32
# movhpd xmm1,qword ptr [rax]
66 0F16 08, Movhpd_xmm_m64, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Float64
# vmovhpd xmm2,xmm6,qword ptr [rax]
C5C9 16 10, VEX_Vmovhpd_xmm_xmm_m64, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float64
# vmovhpd xmm2,xmm6,qword ptr [rax+8]
62 F1CD08 16 50 01, EVEX_Vmovhpd_xmm_xmm_m64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# movshdup xmm1,xmm5
F3 0F16 CD, Movshdup_xmm_xmmm128, Legacy, SSE3, op0=w op1=r w=xmm1 r=xmm5
# movshdup xmm1,[rax]
F3 0F16 08, Movshdup_xmm_xmmm128, Legacy, SSE3, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vmovshdup xmm1,xmm5
C5FA 16 CD, VEX_Vmovshdup_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vmovshdup xmm2,xmmword ptr [rax]
C5FA 16 10, VEX_Vmovshdup_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Float32
# vmovshdup ymm1,ymm5
C5FE 16 CD, VEX_Vmovshdup_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm1 r=ymm5
# vmovshdup ymm2,ymmword ptr [rax]
C5FE 16 10, VEX_Vmovshdup_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed256_Float32
# vmovshdup xmm2,xmm3
62 F17E08 16 D3, EVEX_Vmovshdup_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vmovshdup xmm2,xmmword ptr [rax+10h]
62 F17E08 16 50 01, EVEX_Vmovshdup_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float32
# vmovshdup xmm2{k3},xmm3
62 F17E0B 16 D3, EVEX_Vmovshdup_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vmovshdup xmm10{k3}{z},xmm19
62 317E8B 16 D3, EVEX_Vmovshdup_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vmovshdup ymm2,ymm3
62 F17E28 16 D3, EVEX_Vmovshdup_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=ymm3
# vmovshdup ymm2,ymmword ptr [rax+20h]
62 F17E28 16 50 01, EVEX_Vmovshdup_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float32
# vmovshdup ymm2{k3},ymm3
62 F17E2B 16 D3, EVEX_Vmovshdup_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vmovshdup ymm10{k3}{z},ymm19
62 317EAB 16 D3, EVEX_Vmovshdup_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=ymm19
# vmovshdup zmm2,zmm3
62 F17E48 16 D3, EVEX_Vmovshdup_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=zmm3
# vmovshdup zmm2,zmmword ptr [rax+40h]
62 F17E48 16 50 01, EVEX_Vmovshdup_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float32
# vmovshdup zmm2{k3},zmm3
62 F17E4B 16 D3, EVEX_Vmovshdup_zmm_k1z_zmmm512, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vmovshdup zmm10{k3}{z},zmm19
62 317ECB 16 D3, EVEX_Vmovshdup_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=zmm19
# movhps qword ptr [rax],xmm1
0F17 08, Movhps_m64_xmm, Legacy, SSE, op0=w op1=r r=rax r=xmm1 wm=ds:rax;Packed64_Float32
# vmovhps qword ptr [rax],xmm2
C5F8 17 10, VEX_Vmovhps_m64_xmm, VEX, AVX, op0=w op1=r r=rax r=xmm2 wm=ds:rax;Packed64_Float32
# vmovhps qword ptr [rax+8],xmm2
62 F17C08 17 50 01, EVEX_Vmovhps_m64_xmm, EVEX, AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+8;Packed64_Float32
# movhpd qword ptr [rax],xmm1
66 0F17 08, Movhpd_m64_xmm, Legacy, SSE2, op0=w op1=r r=rax r=xmm1 wm=ds:rax;Float64
# vmovhpd qword ptr [rax],xmm2
C5F9 17 10, VEX_Vmovhpd_m64_xmm, VEX, AVX, op0=w op1=r r=rax r=xmm2 wm=ds:rax;Float64
# vmovhpd qword ptr [rax+8],xmm2
62 F1FD08 17 50 01, EVEX_Vmovhpd_m64_xmm, EVEX, AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+8;Float64
# prefetchnta [rax]
0F18 00, Prefetchnta_m8, Legacy, SSE, op0=nma r=rax
# prefetcht0 [rax]
0F18 08, Prefetcht0_m8, Legacy, SSE, op0=nma r=rax
# prefetcht1 [rax]
0F18 10, Prefetcht1_m8, Legacy, SSE, op0=nma r=rax
# prefetcht2 [rax]
0F18 18, Prefetcht2_m8, Legacy, SSE, op0=nma r=rax
# bndldx bnd1,qword ptr [rdx+rsi]
0F1A 0C F2, Bndldx_bnd_mib, Legacy, MPX, op0=w op1=nma w=bnd1 r=rdx;rsi decopt=MPX
# bndmov bnd1,bnd2
66 0F1A CA, Bndmov_bnd_bndm128, Legacy, MPX, op0=w op1=r w=bnd1 r=bnd2 decopt=MPX
# bndmov bnd1,oword ptr [rdx+rsi*8]
66 0F1A 0C F2, Bndmov_bnd_bndm128, Legacy, MPX, op0=w op1=r w=bnd1 r=rdx;rsi rm=ds:rdx+rsi*8;Bnd64 decopt=MPX
# bndcl bnd1,rdx
F3 0F1A CA, Bndcl_bnd_rm64, Legacy, MPX, op0=r op1=r r=bnd1 r=rdx decopt=MPX
# bndcl bnd1,[rdx+rsi*8]
F3 0F1A 0C F2, Bndcl_bnd_rm64, Legacy, MPX, op0=r op1=nma r=bnd1 r=rdx;rsi decopt=MPX
# bndcl bnd1,[rdx+rsi*8]
64 F3 0F1A 0C F2, Bndcl_bnd_rm64, Legacy, MPX, op0=r op1=nma r=bnd1 r=rdx;rsi decopt=MPX
# bndcu bnd1,rdx
F2 0F1A CA, Bndcu_bnd_rm64, Legacy, MPX, op0=r op1=r r=bnd1 r=rdx decopt=MPX
# bndcu bnd1,[rdx+rsi*8]
F2 0F1A 0C F2, Bndcu_bnd_rm64, Legacy, MPX, op0=r op1=nma r=bnd1 r=rdx;rsi decopt=MPX
# bndcu bnd1,[rdx+rsi*8]
64 F2 0F1A 0C F2, Bndcu_bnd_rm64, Legacy, MPX, op0=r op1=nma r=bnd1 r=rdx;rsi decopt=MPX
# bndstx qword ptr [rdx+rsi],bnd1
0F1B 0C F2, Bndstx_mib_bnd, Legacy, MPX, op0=nma op1=r r=rdx;rsi r=bnd1 decopt=MPX
# bndmov bnd2,bnd1
66 0F1B CA, Bndmov_bndm128_bnd, Legacy, MPX, op0=w op1=r w=bnd2 r=bnd1 decopt=MPX
# bndmov oword ptr [rdx+rsi*8],bnd1
66 0F1B 0C F2, Bndmov_bndm128_bnd, Legacy, MPX, op0=w op1=r r=rdx;rsi r=bnd1 wm=ds:rdx+rsi*8;Bnd64 decopt=MPX
# bndmk bnd1,qword ptr [rdx+rsi*8]
F3 0F1B 0C F2, Bndmk_bnd_m64, Legacy, MPX, op0=w op1=nma w=bnd1 r=rdx;rsi decopt=MPX
# bndmk bnd1,qword ptr [rdx+rsi*8]
64 F3 0F1B 0C F2, Bndmk_bnd_m64, Legacy, MPX, op0=w op1=nma w=bnd1 r=rdx;rsi decopt=MPX
# bndcn bnd1,rdx
F2 0F1B CA, Bndcn_bnd_rm64, Legacy, MPX, op0=r op1=r r=bnd1 r=rdx decopt=MPX
# bndcn bnd1,[rdx+rsi*8]
F2 0F1B 0C F2, Bndcn_bnd_rm64, Legacy, MPX, op0=r op1=nma r=bnd1 r=rdx;rsi decopt=MPX
# bndcn bnd1,[rdx+rsi*8]
64 F2 0F1B 0C F2, Bndcn_bnd_rm64, Legacy, MPX, op0=r op1=nma r=bnd1 r=rdx;rsi decopt=MPX
# nop cx
66 0F1F C1, Nop_rm16, Legacy, MULTIBYTENOP, op0=n
# nop word ptr [rax]
66 0F1F 00, Nop_rm16, Legacy, MULTIBYTENOP, op0=n
# nop ecx
0F1F C1, Nop_rm32, Legacy, MULTIBYTENOP, op0=n
# nop dword ptr [rax]
0F1F 00, Nop_rm32, Legacy, MULTIBYTENOP, op0=n
# nop rcx
48 0F1F C1, Nop_rm64, Legacy, MULTIBYTENOP, op0=n
# nop qword ptr [rax]
48 0F1F 00, Nop_rm64, Legacy, MULTIBYTENOP, op0=n
# mov rsi,cr3
0F20 DE, Mov_r64_cr, Legacy, X64, priv fu=oszacp op0=w op1=r w=rsi r=cr3
# mov rsi,dr3
0F21 DE, Mov_r64_dr, Legacy, X64, priv fu=oszacp op0=w op1=r w=rsi r=dr3
# mov cr3,rsi
0F22 DE, Mov_cr_r64, Legacy, X64, priv fu=oszacp op0=w op1=r w=cr3 r=rsi
# mov dr3,rsi
0F23 DE, Mov_dr_r64, Legacy, X64, priv fu=oszacp op0=w op1=r w=dr3 r=rsi
# movaps xmm1,xmm5
0F28 CD, Movaps_xmm_xmmm128, Legacy, SSE, op0=w op1=r w=xmm1 r=xmm5
# movaps xmm1,[rax]
0F28 08, Movaps_xmm_xmmm128, Legacy, SSE, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vmovaps xmm1,xmm5
C5F8 28 CD, VEX_Vmovaps_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vmovaps xmm2,[rax]
C5F8 28 10, VEX_Vmovaps_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Float32
# vmovaps ymm1,ymm5
C5FC 28 CD, VEX_Vmovaps_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm1 r=ymm5
# vmovaps ymm2,[rax]
C5FC 28 10, VEX_Vmovaps_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed256_Float32
# vmovaps xmm2,xmm3
62 F17C08 28 D3, EVEX_Vmovaps_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vmovaps xmm2,[rax+10h]
62 F17C08 28 50 01, EVEX_Vmovaps_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float32
# vmovaps xmm2{k3},xmm3
62 F17C0B 28 D3, EVEX_Vmovaps_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vmovaps xmm10{k3}{z},xmm19
62 317C8B 28 D3, EVEX_Vmovaps_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vmovaps ymm2,ymm3
62 F17C28 28 D3, EVEX_Vmovaps_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=ymm3
# vmovaps ymm2,[rax+20h]
62 F17C28 28 50 01, EVEX_Vmovaps_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float32
# vmovaps ymm2{k3},ymm3
62 F17C2B 28 D3, EVEX_Vmovaps_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vmovaps ymm10{k3}{z},ymm19
62 317CAB 28 D3, EVEX_Vmovaps_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=ymm19
# vmovaps zmm2,zmm3
62 F17C48 28 D3, EVEX_Vmovaps_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=zmm3
# vmovaps zmm2,[rax+40h]
62 F17C48 28 50 01, EVEX_Vmovaps_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float32
# vmovaps zmm2{k3},zmm3
62 F17C4B 28 D3, EVEX_Vmovaps_zmm_k1z_zmmm512, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vmovaps zmm10{k3}{z},zmm19
62 317CCB 28 D3, EVEX_Vmovaps_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=zmm19
# movapd xmm1,xmm5
66 0F28 CD, Movapd_xmm_xmmm128, Legacy, SSE2, op0=w op1=r w=xmm1 r=xmm5
# movapd xmm1,[rax]
66 0F28 08, Movapd_xmm_xmmm128, Legacy, SSE2, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vmovapd xmm1,xmm5
C5F9 28 CD, VEX_Vmovapd_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vmovapd xmm2,[rax]
C5F9 28 10, VEX_Vmovapd_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Float64
# vmovapd ymm1,ymm5
C5FD 28 CD, VEX_Vmovapd_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm1 r=ymm5
# vmovapd ymm2,[rax]
C5FD 28 10, VEX_Vmovapd_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed256_Float64
# vmovapd xmm2,xmm3
62 F1FD08 28 D3, EVEX_Vmovapd_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vmovapd xmm2,[rax+10h]
62 F1FD08 28 50 01, EVEX_Vmovapd_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float64
# vmovapd xmm2{k3},xmm3
62 F1FD0B 28 D3, EVEX_Vmovapd_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vmovapd xmm10{k3}{z},xmm19
62 31FD8B 28 D3, EVEX_Vmovapd_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vmovapd ymm2,ymm3
62 F1FD28 28 D3, EVEX_Vmovapd_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=ymm3
# vmovapd ymm2,[rax+20h]
62 F1FD28 28 50 01, EVEX_Vmovapd_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float64
# vmovapd ymm2{k3},ymm3
62 F1FD2B 28 D3, EVEX_Vmovapd_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vmovapd ymm10{k3}{z},ymm19
62 31FDAB 28 D3, EVEX_Vmovapd_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=ymm19
# vmovapd zmm2,zmm3
62 F1FD48 28 D3, EVEX_Vmovapd_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=zmm3
# vmovapd zmm2,[rax+40h]
62 F1FD48 28 50 01, EVEX_Vmovapd_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float64
# vmovapd zmm2{k3},zmm3
62 F1FD4B 28 D3, EVEX_Vmovapd_zmm_k1z_zmmm512, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vmovapd zmm10{k3}{z},zmm19
62 31FDCB 28 D3, EVEX_Vmovapd_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=zmm19
# movaps xmm5,xmm1
0F29 CD, Movaps_xmmm128_xmm, Legacy, SSE, op0=w op1=r w=xmm5 r=xmm1
# movaps [rax],xmm1
0F29 08, Movaps_xmmm128_xmm, Legacy, SSE, op0=w op1=r r=rax r=xmm1 wm=ds:rax;Packed128_Float32
# vmovaps xmm5,xmm1
C5F8 29 CD, VEX_Vmovaps_xmmm128_xmm, VEX, AVX, op0=w op1=r w=vmm5 r=xmm1
# vmovaps [rax],xmm2
C5F8 29 10, VEX_Vmovaps_xmmm128_xmm, VEX, AVX, op0=w op1=r r=rax r=xmm2 wm=ds:rax;Packed128_Float32
# vmovaps ymm5,ymm1
C5FC 29 CD, VEX_Vmovaps_ymmm256_ymm, VEX, AVX, op0=w op1=r w=vmm5 r=ymm1
# vmovaps [rax],ymm2
C5FC 29 10, VEX_Vmovaps_ymmm256_ymm, VEX, AVX, op0=w op1=r r=rax r=ymm2 wm=ds:rax;Packed256_Float32
# vmovaps xmm3,xmm2
62 F17C08 29 D3, EVEX_Vmovaps_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vmovaps [rax+10h],xmm2
62 F17C08 29 50 01, EVEX_Vmovaps_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+0x10;Packed128_Float32
# vmovaps [rax+10h]{k3},xmm2
62 F17C0B 29 50 01, EVEX_Vmovaps_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+0x10;Packed128_Float32
# vmovaps xmm3{k3},xmm2
62 F17C0B 29 D3, EVEX_Vmovaps_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vmovaps xmm19{k3}{z},xmm10
62 317C8B 29 D3, EVEX_Vmovaps_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm19 r=k3 r=xmm10
# vmovaps ymm3,ymm2
62 F17C28 29 D3, EVEX_Vmovaps_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vmovaps [rax+20h],ymm2
62 F17C28 29 50 01, EVEX_Vmovaps_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+0x20;Packed256_Float32
# vmovaps [rax+20h]{k3},ymm2
62 F17C2B 29 50 01, EVEX_Vmovaps_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+0x20;Packed256_Float32
# vmovaps ymm3{k3},ymm2
62 F17C2B 29 D3, EVEX_Vmovaps_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=ymm3 r=k3 r=ymm2
# vmovaps ymm19{k3}{z},ymm10
62 317CAB 29 D3, EVEX_Vmovaps_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm19 r=k3 r=ymm10
# vmovaps zmm3,zmm2
62 F17C48 29 D3, EVEX_Vmovaps_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vmovaps [rax+40h],zmm2
62 F17C48 29 50 01, EVEX_Vmovaps_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x40;Packed512_Float32
# vmovaps [rax+40h]{k3},zmm2
62 F17C4B 29 50 01, EVEX_Vmovaps_zmmm512_k1z_zmm, EVEX, AVX512F, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x40;Packed512_Float32
# vmovaps zmm3{k3},zmm2
62 F17C4B 29 D3, EVEX_Vmovaps_zmmm512_k1z_zmm, EVEX, AVX512F, op0=rcw op1=r cw=vmm3 r=zmm3 r=k3 r=zmm2
# vmovaps zmm19{k3}{z},zmm10
62 317CCB 29 D3, EVEX_Vmovaps_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm19 r=k3 r=zmm10
# movapd xmm5,xmm1
66 0F29 CD, Movapd_xmmm128_xmm, Legacy, SSE2, op0=w op1=r w=xmm5 r=xmm1
# movapd [rax],xmm1
66 0F29 08, Movapd_xmmm128_xmm, Legacy, SSE2, op0=w op1=r r=rax r=xmm1 wm=ds:rax;Packed128_Float64
# vmovapd xmm5,xmm1
C5F9 29 CD, VEX_Vmovapd_xmmm128_xmm, VEX, AVX, op0=w op1=r w=vmm5 r=xmm1
# vmovapd [rax],xmm2
C5F9 29 10, VEX_Vmovapd_xmmm128_xmm, VEX, AVX, op0=w op1=r r=rax r=xmm2 wm=ds:rax;Packed128_Float64
# vmovapd ymm5,ymm1
C5FD 29 CD, VEX_Vmovapd_ymmm256_ymm, VEX, AVX, op0=w op1=r w=vmm5 r=ymm1
# vmovapd [rax],ymm2
C5FD 29 10, VEX_Vmovapd_ymmm256_ymm, VEX, AVX, op0=w op1=r r=rax r=ymm2 wm=ds:rax;Packed256_Float64
# vmovapd xmm3,xmm2
62 F1FD08 29 D3, EVEX_Vmovapd_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vmovapd [rax+10h],xmm2
62 F1FD08 29 50 01, EVEX_Vmovapd_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+0x10;Packed128_Float64
# vmovapd [rax+10h]{k3},xmm2
62 F1FD0B 29 50 01, EVEX_Vmovapd_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+0x10;Packed128_Float64
# vmovapd xmm3{k3},xmm2
62 F1FD0B 29 D3, EVEX_Vmovapd_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vmovapd xmm19{k3}{z},xmm10
62 31FD8B 29 D3, EVEX_Vmovapd_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm19 r=k3 r=xmm10
# vmovapd ymm3,ymm2
62 F1FD28 29 D3, EVEX_Vmovapd_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vmovapd [rax+20h],ymm2
62 F1FD28 29 50 01, EVEX_Vmovapd_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+0x20;Packed256_Float64
# vmovapd [rax+20h]{k3},ymm2
62 F1FD2B 29 50 01, EVEX_Vmovapd_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+0x20;Packed256_Float64
# vmovapd ymm3{k3},ymm2
62 F1FD2B 29 D3, EVEX_Vmovapd_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=ymm3 r=k3 r=ymm2
# vmovapd ymm19{k3}{z},ymm10
62 31FDAB 29 D3, EVEX_Vmovapd_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm19 r=k3 r=ymm10
# vmovapd zmm3,zmm2
62 F1FD48 29 D3, EVEX_Vmovapd_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vmovapd [rax+40h],zmm2
62 F1FD48 29 50 01, EVEX_Vmovapd_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x40;Packed512_Float64
# vmovapd [rax+40h]{k3},zmm2
62 F1FD4B 29 50 01, EVEX_Vmovapd_zmmm512_k1z_zmm, EVEX, AVX512F, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x40;Packed512_Float64
# vmovapd zmm3{k3},zmm2
62 F1FD4B 29 D3, EVEX_Vmovapd_zmmm512_k1z_zmm, EVEX, AVX512F, op0=rcw op1=r cw=vmm3 r=zmm3 r=k3 r=zmm2
# vmovapd zmm19{k3}{z},zmm10
62 31FDCB 29 D3, EVEX_Vmovapd_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm19 r=k3 r=zmm10
# cvtpi2ps xmm1,mm5
0F2A CD, Cvtpi2ps_xmm_mmm64, Legacy, SSE, op0=rw op1=r rw=xmm1 r=mm5
# cvtpi2ps xmm1,qword ptr [rax]
0F2A 08, Cvtpi2ps_xmm_mmm64, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed64_Int32
# cvtpi2pd xmm1,mm5
66 0F2A CD, Cvtpi2pd_xmm_mmm64, Legacy, SSE2, op0=w op1=r w=xmm1 r=mm5
# cvtpi2pd xmm1,qword ptr [rax]
66 0F2A 08, Cvtpi2pd_xmm_mmm64, Legacy, SSE2, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed64_Int32
# cvtsi2ss xmm1,ebp
F3 0F2A CD, Cvtsi2ss_xmm_rm32, Legacy, SSE, op0=rw op1=r rw=xmm1 r=ebp
# cvtsi2ss xmm1,dword ptr [rax]
F3 0F2A 08, Cvtsi2ss_xmm_rm32, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Int32
# cvtsi2ss xmm1,rbp
F3 48 0F2A CD, Cvtsi2ss_xmm_rm64, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rbp
# cvtsi2ss xmm1,qword ptr [rax]
F3 48 0F2A 08, Cvtsi2ss_xmm_rm64, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Int64
# vcvtsi2ss xmm2,xmm6,ebx
C5CA 2A D3, VEX_Vcvtsi2ss_xmm_xmm_rm32, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=ebx
# vcvtsi2ss xmm2,xmm6,dword ptr [rax]
C5CA 2A 10, VEX_Vcvtsi2ss_xmm_xmm_rm32, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Int32
# vcvtsi2ss xmm2,xmm6,rbx
C4E1CA 2A D3, VEX_Vcvtsi2ss_xmm_xmm_rm64, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rbx
# vcvtsi2ss xmm2,xmm6,qword ptr [rax]
C4E1CA 2A 10, VEX_Vcvtsi2ss_xmm_xmm_rm64, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Int64
# vcvtsi2ss xmm2,xmm6,ebx
62 F14E08 2A D3, EVEX_Vcvtsi2ss_xmm_xmm_rm32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=ebx
# vcvtsi2ss xmm2,xmm6,dword ptr [rax+4]
62 F14E08 2A 50 01, EVEX_Vcvtsi2ss_xmm_xmm_rm32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+4;Int32
# vcvtsi2ss xmm2,xmm6,rbx
62 F1CE08 2A D3, EVEX_Vcvtsi2ss_xmm_xmm_rm64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rbx
# vcvtsi2ss xmm2,xmm6,qword ptr [rax+8]
62 F1CE08 2A 50 01, EVEX_Vcvtsi2ss_xmm_xmm_rm64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;Int64
# cvtsi2sd xmm1,ebp
F2 0F2A CD, Cvtsi2sd_xmm_rm32, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=ebp
# cvtsi2sd xmm1,dword ptr [rax]
F2 0F2A 08, Cvtsi2sd_xmm_rm32, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Int32
# cvtsi2sd xmm1,rbp
F2 48 0F2A CD, Cvtsi2sd_xmm_rm64, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rbp
# cvtsi2sd xmm1,qword ptr [rax]
F2 48 0F2A 08, Cvtsi2sd_xmm_rm64, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Int64
# vcvtsi2sd xmm2,xmm6,ebx
C5CB 2A D3, VEX_Vcvtsi2sd_xmm_xmm_rm32, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=ebx
# vcvtsi2sd xmm2,xmm6,dword ptr [rax]
C5CB 2A 10, VEX_Vcvtsi2sd_xmm_xmm_rm32, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Int32
# vcvtsi2sd xmm2,xmm6,rbx
C4E1CB 2A D3, VEX_Vcvtsi2sd_xmm_xmm_rm64, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rbx
# vcvtsi2sd xmm2,xmm6,qword ptr [rax]
C4E1CB 2A 10, VEX_Vcvtsi2sd_xmm_xmm_rm64, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Int64
# vcvtsi2sd xmm2,xmm6,ebx
62 F14F08 2A D3, EVEX_Vcvtsi2sd_xmm_xmm_rm32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=ebx
# vcvtsi2sd xmm2,xmm6,dword ptr [rax+4]
62 F14F08 2A 50 01, EVEX_Vcvtsi2sd_xmm_xmm_rm32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+4;Int32
# vcvtsi2sd xmm2,xmm6,rbx
62 F1CF08 2A D3, EVEX_Vcvtsi2sd_xmm_xmm_rm64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rbx
# vcvtsi2sd xmm2,xmm6,qword ptr [rax+8]
62 F1CF08 2A 50 01, EVEX_Vcvtsi2sd_xmm_xmm_rm64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;Int64
# movntps [rax],xmm1
0F2B 08, Movntps_m128_xmm, Legacy, SSE, op0=w op1=r r=rax r=xmm1 wm=ds:rax;Packed128_Float32
# vmovntps xmmword ptr [rax],xmm2
C5F8 2B 10, VEX_Vmovntps_m128_xmm, VEX, AVX, op0=w op1=r r=rax r=xmm2 wm=ds:rax;Packed128_Float32
# vmovntps ymmword ptr [rax],ymm2
C5FC 2B 10, VEX_Vmovntps_m256_ymm, VEX, AVX, op0=w op1=r r=rax r=ymm2 wm=ds:rax;Packed256_Float32
# vmovntps xmmword ptr [rax+10h],xmm2
62 F17C08 2B 50 01, EVEX_Vmovntps_m128_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+0x10;Packed128_Float32
# vmovntps ymmword ptr [rax+20h],ymm2
62 F17C28 2B 50 01, EVEX_Vmovntps_m256_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+0x20;Packed256_Float32
# vmovntps zmmword ptr [rax+40h],zmm2
62 F17C48 2B 50 01, EVEX_Vmovntps_m512_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x40;Packed512_Float32
# movntpd [rax],xmm1
66 0F2B 08, Movntpd_m128_xmm, Legacy, SSE2, op0=w op1=r r=rax r=xmm1 wm=ds:rax;Packed128_Float64
# vmovntpd xmmword ptr [rax],xmm2
C5F9 2B 10, VEX_Vmovntpd_m128_xmm, VEX, AVX, op0=w op1=r r=rax r=xmm2 wm=ds:rax;Packed128_Float64
# vmovntpd ymmword ptr [rax],ymm2
C5FD 2B 10, VEX_Vmovntpd_m256_ymm, VEX, AVX, op0=w op1=r r=rax r=ymm2 wm=ds:rax;Packed256_Float64
# vmovntpd xmmword ptr [rax+10h],xmm2
62 F1FD08 2B 50 01, EVEX_Vmovntpd_m128_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+0x10;Packed128_Float64
# vmovntpd ymmword ptr [rax+20h],ymm2
62 F1FD28 2B 50 01, EVEX_Vmovntpd_m256_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+0x20;Packed256_Float64
# vmovntpd zmmword ptr [rax+40h],zmm2
62 F1FD48 2B 50 01, EVEX_Vmovntpd_m512_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x40;Packed512_Float64
# cvttps2pi mm1,xmm5
0F2C CD, Cvttps2pi_mm_xmmm64, Legacy, SSE, op0=w op1=r w=mm1 r=xmm5
# cvttps2pi mm1,mmword ptr [rax]
0F2C 08, Cvttps2pi_mm_xmmm64, Legacy, SSE, op0=w op1=r w=mm1 r=rax rm=ds:rax;Packed64_Float32
# cvttpd2pi mm1,xmm5
66 0F2C CD, Cvttpd2pi_mm_xmmm128, Legacy, SSE2, op0=w op1=r w=mm1 r=xmm5
# cvttpd2pi mm1,[rax]
66 0F2C 08, Cvttpd2pi_mm_xmmm128, Legacy, SSE2, op0=w op1=r w=mm1 r=rax rm=ds:rax;Packed128_Float64
# cvttss2si ecx,xmm5
F3 0F2C CD, Cvttss2si_r32_xmmm32, Legacy, SSE, op0=w op1=r w=rcx r=xmm5
# cvttss2si ecx,dword ptr [rax]
F3 0F2C 08, Cvttss2si_r32_xmmm32, Legacy, SSE, op0=w op1=r w=rcx r=rax rm=ds:rax;Float32
# cvttss2si rcx,xmm5
F3 48 0F2C CD, Cvttss2si_r64_xmmm32, Legacy, SSE, op0=w op1=r w=rcx r=xmm5
# cvttss2si rcx,dword ptr [rax]
F3 48 0F2C 08, Cvttss2si_r64_xmmm32, Legacy, SSE, op0=w op1=r w=rcx r=rax rm=ds:rax;Float32
# vcvttss2si ecx,xmm5
C5FA 2C CD, VEX_Vcvttss2si_r32_xmmm32, VEX, AVX, op0=w op1=r w=rcx r=xmm5
# vcvttss2si edx,dword ptr [rax]
C5FA 2C 10, VEX_Vcvttss2si_r32_xmmm32, VEX, AVX, op0=w op1=r w=rdx r=rax rm=ds:rax;Float32
# vcvttss2si rcx,xmm5
C4E1FA 2C CD, VEX_Vcvttss2si_r64_xmmm32, VEX, AVX, op0=w op1=r w=rcx r=xmm5
# vcvttss2si rdx,dword ptr [rax]
C4E1FA 2C 10, VEX_Vcvttss2si_r64_xmmm32, VEX, AVX, op0=w op1=r w=rdx r=rax rm=ds:rax;Float32
# vcvttss2si edx,xmm3
62 F17E08 2C D3, EVEX_Vcvttss2si_r32_xmmm32_sae, EVEX, AVX512F, op0=w op1=r w=rdx r=xmm3
# vcvttss2si edx,dword ptr [rax+4]
62 F17E08 2C 50 01, EVEX_Vcvttss2si_r32_xmmm32_sae, EVEX, AVX512F, op0=w op1=r w=rdx r=rax rm=ds:rax+4;Float32
# vcvttss2si rdx,xmm3
62 F1FE08 2C D3, EVEX_Vcvttss2si_r64_xmmm32_sae, EVEX, AVX512F, op0=w op1=r w=rdx r=xmm3
# vcvttss2si rdx,dword ptr [rax+4]
62 F1FE08 2C 50 01, EVEX_Vcvttss2si_r64_xmmm32_sae, EVEX, AVX512F, op0=w op1=r w=rdx r=rax rm=ds:rax+4;Float32
# cvttsd2si ecx,xmm5
F2 0F2C CD, Cvttsd2si_r32_xmmm64, Legacy, SSE2, op0=w op1=r w=rcx r=xmm5
# cvttsd2si ecx,qword ptr [rax]
F2 0F2C 08, Cvttsd2si_r32_xmmm64, Legacy, SSE2, op0=w op1=r w=rcx r=rax rm=ds:rax;Float64
# cvttsd2si rcx,xmm5
F2 48 0F2C CD, Cvttsd2si_r64_xmmm64, Legacy, SSE2, op0=w op1=r w=rcx r=xmm5
# cvttsd2si rcx,qword ptr [rax]
F2 48 0F2C 08, Cvttsd2si_r64_xmmm64, Legacy, SSE2, op0=w op1=r w=rcx r=rax rm=ds:rax;Float64
# vcvttsd2si ecx,xmm5
C5FB 2C CD, VEX_Vcvttsd2si_r32_xmmm64, VEX, AVX, op0=w op1=r w=rcx r=xmm5
# vcvttsd2si edx,qword ptr [rax]
C5FB 2C 10, VEX_Vcvttsd2si_r32_xmmm64, VEX, AVX, op0=w op1=r w=rdx r=rax rm=ds:rax;Float64
# vcvttsd2si rcx,xmm5
C4E1FB 2C CD, VEX_Vcvttsd2si_r64_xmmm64, VEX, AVX, op0=w op1=r w=rcx r=xmm5
# vcvttsd2si rdx,qword ptr [rax]
C4E1FB 2C 10, VEX_Vcvttsd2si_r64_xmmm64, VEX, AVX, op0=w op1=r w=rdx r=rax rm=ds:rax;Float64
# vcvttsd2si edx,xmm3
62 F17F08 2C D3, EVEX_Vcvttsd2si_r32_xmmm64_sae, EVEX, AVX512F, op0=w op1=r w=rdx r=xmm3
# vcvttsd2si edx,qword ptr [rax+8]
62 F17F08 2C 50 01, EVEX_Vcvttsd2si_r32_xmmm64_sae, EVEX, AVX512F, op0=w op1=r w=rdx r=rax rm=ds:rax+8;Float64
# vcvttsd2si rdx,xmm3
62 F1FF08 2C D3, EVEX_Vcvttsd2si_r64_xmmm64_sae, EVEX, AVX512F, op0=w op1=r w=rdx r=xmm3
# vcvttsd2si rdx,qword ptr [rax+8]
62 F1FF08 2C 50 01, EVEX_Vcvttsd2si_r64_xmmm64_sae, EVEX, AVX512F, op0=w op1=r w=rdx r=rax rm=ds:rax+8;Float64
# cvtps2pi mm1,xmm5
0F2D CD, Cvtps2pi_mm_xmmm64, Legacy, SSE, op0=w op1=r w=mm1 r=xmm5
# cvtps2pi mm1,mmword ptr [rax]
0F2D 08, Cvtps2pi_mm_xmmm64, Legacy, SSE, op0=w op1=r w=mm1 r=rax rm=ds:rax;Packed64_Float32
# cvtpd2pi mm1,xmm5
66 0F2D CD, Cvtpd2pi_mm_xmmm128, Legacy, SSE2, op0=w op1=r w=mm1 r=xmm5
# cvtpd2pi mm1,[rax]
66 0F2D 08, Cvtpd2pi_mm_xmmm128, Legacy, SSE2, op0=w op1=r w=mm1 r=rax rm=ds:rax;Packed128_Float64
# cvtss2si ecx,xmm5
F3 0F2D CD, Cvtss2si_r32_xmmm32, Legacy, SSE, op0=w op1=r w=rcx r=xmm5
# cvtss2si ecx,dword ptr [rax]
F3 0F2D 08, Cvtss2si_r32_xmmm32, Legacy, SSE, op0=w op1=r w=rcx r=rax rm=ds:rax;Float32
# cvtss2si rcx,xmm5
F3 48 0F2D CD, Cvtss2si_r64_xmmm32, Legacy, SSE, op0=w op1=r w=rcx r=xmm5
# cvtss2si rcx,dword ptr [rax]
F3 48 0F2D 08, Cvtss2si_r64_xmmm32, Legacy, SSE, op0=w op1=r w=rcx r=rax rm=ds:rax;Float32
# vcvtss2si ecx,xmm5
C5FA 2D CD, VEX_Vcvtss2si_r32_xmmm32, VEX, AVX, op0=w op1=r w=rcx r=xmm5
# vcvtss2si edx,dword ptr [rax]
C5FA 2D 10, VEX_Vcvtss2si_r32_xmmm32, VEX, AVX, op0=w op1=r w=rdx r=rax rm=ds:rax;Float32
# vcvtss2si rcx,xmm5
C4E1FA 2D CD, VEX_Vcvtss2si_r64_xmmm32, VEX, AVX, op0=w op1=r w=rcx r=xmm5
# vcvtss2si rdx,dword ptr [rax]
C4E1FA 2D 10, VEX_Vcvtss2si_r64_xmmm32, VEX, AVX, op0=w op1=r w=rdx r=rax rm=ds:rax;Float32
# vcvtss2si edx,xmm3
62 F17E08 2D D3, EVEX_Vcvtss2si_r32_xmmm32_er, EVEX, AVX512F, op0=w op1=r w=rdx r=xmm3
# vcvtss2si edx,dword ptr [rax+4]
62 F17E08 2D 50 01, EVEX_Vcvtss2si_r32_xmmm32_er, EVEX, AVX512F, op0=w op1=r w=rdx r=rax rm=ds:rax+4;Float32
# vcvtss2si rdx,xmm3
62 F1FE08 2D D3, EVEX_Vcvtss2si_r64_xmmm32_er, EVEX, AVX512F, op0=w op1=r w=rdx r=xmm3
# vcvtss2si rdx,dword ptr [rax+4]
62 F1FE08 2D 50 01, EVEX_Vcvtss2si_r64_xmmm32_er, EVEX, AVX512F, op0=w op1=r w=rdx r=rax rm=ds:rax+4;Float32
# cvtsd2si ecx,xmm5
F2 0F2D CD, Cvtsd2si_r32_xmmm64, Legacy, SSE2, op0=w op1=r w=rcx r=xmm5
# cvtsd2si ecx,qword ptr [rax]
F2 0F2D 08, Cvtsd2si_r32_xmmm64, Legacy, SSE2, op0=w op1=r w=rcx r=rax rm=ds:rax;Float64
# cvtsd2si rcx,xmm5
F2 48 0F2D CD, Cvtsd2si_r64_xmmm64, Legacy, SSE2, op0=w op1=r w=rcx r=xmm5
# cvtsd2si rcx,qword ptr [rax]
F2 48 0F2D 08, Cvtsd2si_r64_xmmm64, Legacy, SSE2, op0=w op1=r w=rcx r=rax rm=ds:rax;Float64
# vcvtsd2si ecx,xmm5
C5FB 2D CD, VEX_Vcvtsd2si_r32_xmmm64, VEX, AVX, op0=w op1=r w=rcx r=xmm5
# vcvtsd2si edx,qword ptr [rax]
C5FB 2D 10, VEX_Vcvtsd2si_r32_xmmm64, VEX, AVX, op0=w op1=r w=rdx r=rax rm=ds:rax;Float64
# vcvtsd2si rcx,xmm5
C4E1FB 2D CD, VEX_Vcvtsd2si_r64_xmmm64, VEX, AVX, op0=w op1=r w=rcx r=xmm5
# vcvtsd2si rdx,qword ptr [rax]
C4E1FB 2D 10, VEX_Vcvtsd2si_r64_xmmm64, VEX, AVX, op0=w op1=r w=rdx r=rax rm=ds:rax;Float64
# vcvtsd2si edx,xmm3
62 F17F08 2D D3, EVEX_Vcvtsd2si_r32_xmmm64_er, EVEX, AVX512F, op0=w op1=r w=rdx r=xmm3
# vcvtsd2si edx,qword ptr [rax+8]
62 F17F08 2D 50 01, EVEX_Vcvtsd2si_r32_xmmm64_er, EVEX, AVX512F, op0=w op1=r w=rdx r=rax rm=ds:rax+8;Float64
# vcvtsd2si rdx,xmm3
62 F1FF08 2D D3, EVEX_Vcvtsd2si_r64_xmmm64_er, EVEX, AVX512F, op0=w op1=r w=rdx r=xmm3
# vcvtsd2si rdx,qword ptr [rax+8]
62 F1FF08 2D 50 01, EVEX_Vcvtsd2si_r64_xmmm64_er, EVEX, AVX512F, op0=w op1=r w=rdx r=rax rm=ds:rax+8;Float64
# ucomiss xmm1,xmm5
0F2E CD, Ucomiss_xmm_xmmm32, Legacy, SSE, fw=zpc fc=oas op0=r op1=r r=xmm1 r=xmm5
# ucomiss xmm1,dword ptr [rax]
0F2E 08, Ucomiss_xmm_xmmm32, Legacy, SSE, fw=zpc fc=oas op0=r op1=r r=xmm1 r=rax rm=ds:rax;Float32
# vucomiss xmm2,xmm3
C5F8 2E D3, VEX_Vucomiss_xmm_xmmm32, VEX, AVX, fw=zpc fc=oas op0=r op1=r r=xmm2 r=xmm3
# vucomiss xmm2,dword ptr [rax]
C5F8 2E 10, VEX_Vucomiss_xmm_xmmm32, VEX, AVX, fw=zpc fc=oas op0=r op1=r r=xmm2 r=rax rm=ds:rax;Float32
# vucomiss xmm2,xmm3
62 F17C08 2E D3, EVEX_Vucomiss_xmm_xmmm32_sae, EVEX, AVX512F, fw=zpc fc=oas op0=r op1=r r=xmm2 r=xmm3
# vucomiss xmm2,dword ptr [rax+4]
62 F17C08 2E 50 01, EVEX_Vucomiss_xmm_xmmm32_sae, EVEX, AVX512F, fw=zpc fc=oas op0=r op1=r r=xmm2 r=rax rm=ds:rax+4;Float32
# ucomisd xmm1,xmm5
66 0F2E CD, Ucomisd_xmm_xmmm64, Legacy, SSE2, fw=zpc fc=oas op0=r op1=r r=xmm1 r=xmm5
# ucomisd xmm1,qword ptr [rax]
66 0F2E 08, Ucomisd_xmm_xmmm64, Legacy, SSE2, fw=zpc fc=oas op0=r op1=r r=xmm1 r=rax rm=ds:rax;Float64
# vucomisd xmm2,xmm3
C5F9 2E D3, VEX_Vucomisd_xmm_xmmm64, VEX, AVX, fw=zpc fc=oas op0=r op1=r r=xmm2 r=xmm3
# vucomisd xmm2,qword ptr [rax]
C5F9 2E 10, VEX_Vucomisd_xmm_xmmm64, VEX, AVX, fw=zpc fc=oas op0=r op1=r r=xmm2 r=rax rm=ds:rax;Float64
# vucomisd xmm2,xmm3
62 F1FD08 2E D3, EVEX_Vucomisd_xmm_xmmm64_sae, EVEX, AVX512F, fw=zpc fc=oas op0=r op1=r r=xmm2 r=xmm3
# vucomisd xmm2,qword ptr [rax+8]
62 F1FD08 2E 50 01, EVEX_Vucomisd_xmm_xmmm64_sae, EVEX, AVX512F, fw=zpc fc=oas op0=r op1=r r=xmm2 r=rax rm=ds:rax+8;Float64
# comiss xmm1,xmm5
0F2F CD, Comiss_xmm_xmmm32, Legacy, SSE, fw=zpc fc=oas op0=r op1=r r=xmm1 r=xmm5
# comiss xmm1,dword ptr [rax]
0F2F 08, Comiss_xmm_xmmm32, Legacy, SSE, fw=zpc fc=oas op0=r op1=r r=xmm1 r=rax rm=ds:rax;Float32
# comisd xmm1,xmm5
66 0F2F CD, Comisd_xmm_xmmm64, Legacy, SSE2, fw=zpc fc=oas op0=r op1=r r=xmm1 r=xmm5
# comisd xmm1,qword ptr [rax]
66 0F2F 08, Comisd_xmm_xmmm64, Legacy, SSE2, fw=zpc fc=oas op0=r op1=r r=xmm1 r=rax rm=ds:rax;Float64
# vcomiss xmm2,xmm3
C5F8 2F D3, VEX_Vcomiss_xmm_xmmm32, VEX, AVX, fw=zpc fc=oas op0=r op1=r r=xmm2 r=xmm3
# vcomiss xmm2,dword ptr [rax]
C5F8 2F 10, VEX_Vcomiss_xmm_xmmm32, VEX, AVX, fw=zpc fc=oas op0=r op1=r r=xmm2 r=rax rm=ds:rax;Float32
# vcomisd xmm2,xmm3
C5F9 2F D3, VEX_Vcomisd_xmm_xmmm64, VEX, AVX, fw=zpc fc=oas op0=r op1=r r=xmm2 r=xmm3
# vcomisd xmm2,qword ptr [rax]
C5F9 2F 10, VEX_Vcomisd_xmm_xmmm64, VEX, AVX, fw=zpc fc=oas op0=r op1=r r=xmm2 r=rax rm=ds:rax;Float64
# vcomiss xmm2,xmm3
62 F17C08 2F D3, EVEX_Vcomiss_xmm_xmmm32_sae, EVEX, AVX512F, fw=zpc fc=oas op0=r op1=r r=xmm2 r=xmm3
# vcomiss xmm2,dword ptr [rax+4]
62 F17C08 2F 50 01, EVEX_Vcomiss_xmm_xmmm32_sae, EVEX, AVX512F, fw=zpc fc=oas op0=r op1=r r=xmm2 r=rax rm=ds:rax+4;Float32
# vcomisd xmm2,xmm3
62 F1FD08 2F D3, EVEX_Vcomisd_xmm_xmmm64_sae, EVEX, AVX512F, fw=zpc fc=oas op0=r op1=r r=xmm2 r=xmm3
# vcomisd xmm2,qword ptr [rax+8]
62 F1FD08 2F 50 01, EVEX_Vcomisd_xmm_xmmm64_sae, EVEX, AVX512F, fw=zpc fc=oas op0=r op1=r r=xmm2 r=rax rm=ds:rax+8;Float64
# wrmsr
0F30, Wrmsr, Legacy, MSR, priv r=eax;ecx;edx
# rdtsc
0F31, Rdtsc, Legacy, TSC, w=rax;rdx
# rdmsr
0F32, Rdmsr, Legacy, MSR, priv r=ecx w=rax;rdx
# rdpmc
0F33, Rdpmc, Legacy, RDPMC, r=ecx w=rax;rdx
# sysenter
0F34, Sysenter, Legacy, SEP, fc=i flow=Call w=rsp
# sysexit
0F35, Sysexitd, Legacy, SEP, priv flow=Return r=ecx;edx w=rsp w=cs;ss
# sysexitq
48 0F35, Sysexitq, Legacy, SEP, priv flow=Return r=rcx;rdx w=rsp w=cs;ss
# getsec
0F37, Getsecd, Legacy, SMX, save-restore r=eax
# getsecq
48 0F37, Getsecq, Legacy, SMX, save-restore r=eax
# cmovo cx,si
66 0F40 CE, Cmovo_r16_rm16, Legacy, CMOV, fr=o op0=cw op1=r cw=cx r=si
# cmovo bx,[rax]
66 0F40 18, Cmovo_r16_rm16, Legacy, CMOV, fr=o op0=cw op1=r cw=bx r=rax rm=ds:rax;UInt16
# cmovo ecx,esi
0F40 CE, Cmovo_r32_rm32, Legacy, CMOV, fr=o op0=rw op1=r w=rcx r=ecx r=esi
# cmovo ebx,[rax]
0F40 18, Cmovo_r32_rm32, Legacy, CMOV, fr=o op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt32
# cmovo rcx,rsi
48 0F40 CE, Cmovo_r64_rm64, Legacy, CMOV, fr=o op0=cw op1=r cw=rcx r=rsi
# cmovo rbx,[rax]
48 0F40 18, Cmovo_r64_rm64, Legacy, CMOV, fr=o op0=cw op1=r cw=rbx r=rax rm=ds:rax;UInt64
# cmovno cx,si
66 0F41 CE, Cmovno_r16_rm16, Legacy, CMOV, fr=o op0=cw op1=r cw=cx r=si
# cmovno bx,[rax]
66 0F41 18, Cmovno_r16_rm16, Legacy, CMOV, fr=o op0=cw op1=r cw=bx r=rax rm=ds:rax;UInt16
# cmovno ecx,esi
0F41 CE, Cmovno_r32_rm32, Legacy, CMOV, fr=o op0=rw op1=r w=rcx r=ecx r=esi
# cmovno ebx,[rax]
0F41 18, Cmovno_r32_rm32, Legacy, CMOV, fr=o op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt32
# cmovno rcx,rsi
48 0F41 CE, Cmovno_r64_rm64, Legacy, CMOV, fr=o op0=cw op1=r cw=rcx r=rsi
# cmovno rbx,[rax]
48 0F41 18, Cmovno_r64_rm64, Legacy, CMOV, fr=o op0=cw op1=r cw=rbx r=rax rm=ds:rax;UInt64
# cmovb cx,si
66 0F42 CE, Cmovb_r16_rm16, Legacy, CMOV, fr=c op0=cw op1=r cw=cx r=si
# cmovb bx,[rax]
66 0F42 18, Cmovb_r16_rm16, Legacy, CMOV, fr=c op0=cw op1=r cw=bx r=rax rm=ds:rax;UInt16
# cmovb ecx,esi
0F42 CE, Cmovb_r32_rm32, Legacy, CMOV, fr=c op0=rw op1=r w=rcx r=ecx r=esi
# cmovb ebx,[rax]
0F42 18, Cmovb_r32_rm32, Legacy, CMOV, fr=c op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt32
# cmovb rcx,rsi
48 0F42 CE, Cmovb_r64_rm64, Legacy, CMOV, fr=c op0=cw op1=r cw=rcx r=rsi
# cmovb rbx,[rax]
48 0F42 18, Cmovb_r64_rm64, Legacy, CMOV, fr=c op0=cw op1=r cw=rbx r=rax rm=ds:rax;UInt64
# cmovae cx,si
66 0F43 CE, Cmovae_r16_rm16, Legacy, CMOV, fr=c op0=cw op1=r cw=cx r=si
# cmovae bx,[rax]
66 0F43 18, Cmovae_r16_rm16, Legacy, CMOV, fr=c op0=cw op1=r cw=bx r=rax rm=ds:rax;UInt16
# cmovae ecx,esi
0F43 CE, Cmovae_r32_rm32, Legacy, CMOV, fr=c op0=rw op1=r w=rcx r=ecx r=esi
# cmovae ebx,[rax]
0F43 18, Cmovae_r32_rm32, Legacy, CMOV, fr=c op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt32
# cmovae rcx,rsi
48 0F43 CE, Cmovae_r64_rm64, Legacy, CMOV, fr=c op0=cw op1=r cw=rcx r=rsi
# cmovae rbx,[rax]
48 0F43 18, Cmovae_r64_rm64, Legacy, CMOV, fr=c op0=cw op1=r cw=rbx r=rax rm=ds:rax;UInt64
# cmove cx,si
66 0F44 CE, Cmove_r16_rm16, Legacy, CMOV, fr=z op0=cw op1=r cw=cx r=si
# cmove bx,[rax]
66 0F44 18, Cmove_r16_rm16, Legacy, CMOV, fr=z op0=cw op1=r cw=bx r=rax rm=ds:rax;UInt16
# cmove ecx,esi
0F44 CE, Cmove_r32_rm32, Legacy, CMOV, fr=z op0=rw op1=r w=rcx r=ecx r=esi
# cmove ebx,[rax]
0F44 18, Cmove_r32_rm32, Legacy, CMOV, fr=z op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt32
# cmove rcx,rsi
48 0F44 CE, Cmove_r64_rm64, Legacy, CMOV, fr=z op0=cw op1=r cw=rcx r=rsi
# cmove rbx,[rax]
48 0F44 18, Cmove_r64_rm64, Legacy, CMOV, fr=z op0=cw op1=r cw=rbx r=rax rm=ds:rax;UInt64
# cmovne cx,si
66 0F45 CE, Cmovne_r16_rm16, Legacy, CMOV, fr=z op0=cw op1=r cw=cx r=si
# cmovne bx,[rax]
66 0F45 18, Cmovne_r16_rm16, Legacy, CMOV, fr=z op0=cw op1=r cw=bx r=rax rm=ds:rax;UInt16
# cmovne ecx,esi
0F45 CE, Cmovne_r32_rm32, Legacy, CMOV, fr=z op0=rw op1=r w=rcx r=ecx r=esi
# cmovne ebx,[rax]
0F45 18, Cmovne_r32_rm32, Legacy, CMOV, fr=z op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt32
# cmovne rcx,rsi
48 0F45 CE, Cmovne_r64_rm64, Legacy, CMOV, fr=z op0=cw op1=r cw=rcx r=rsi
# cmovne rbx,[rax]
48 0F45 18, Cmovne_r64_rm64, Legacy, CMOV, fr=z op0=cw op1=r cw=rbx r=rax rm=ds:rax;UInt64
# cmovbe cx,si
66 0F46 CE, Cmovbe_r16_rm16, Legacy, CMOV, fr=cz op0=cw op1=r cw=cx r=si
# cmovbe bx,[rax]
66 0F46 18, Cmovbe_r16_rm16, Legacy, CMOV, fr=cz op0=cw op1=r cw=bx r=rax rm=ds:rax;UInt16
# cmovbe ecx,esi
0F46 CE, Cmovbe_r32_rm32, Legacy, CMOV, fr=cz op0=rw op1=r w=rcx r=ecx r=esi
# cmovbe ebx,[rax]
0F46 18, Cmovbe_r32_rm32, Legacy, CMOV, fr=cz op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt32
# cmovbe rcx,rsi
48 0F46 CE, Cmovbe_r64_rm64, Legacy, CMOV, fr=cz op0=cw op1=r cw=rcx r=rsi
# cmovbe rbx,[rax]
48 0F46 18, Cmovbe_r64_rm64, Legacy, CMOV, fr=cz op0=cw op1=r cw=rbx r=rax rm=ds:rax;UInt64
# cmova cx,si
66 0F47 CE, Cmova_r16_rm16, Legacy, CMOV, fr=cz op0=cw op1=r cw=cx r=si
# cmova bx,[rax]
66 0F47 18, Cmova_r16_rm16, Legacy, CMOV, fr=cz op0=cw op1=r cw=bx r=rax rm=ds:rax;UInt16
# cmova ecx,esi
0F47 CE, Cmova_r32_rm32, Legacy, CMOV, fr=cz op0=rw op1=r w=rcx r=ecx r=esi
# cmova ebx,[rax]
0F47 18, Cmova_r32_rm32, Legacy, CMOV, fr=cz op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt32
# cmova rcx,rsi
48 0F47 CE, Cmova_r64_rm64, Legacy, CMOV, fr=cz op0=cw op1=r cw=rcx r=rsi
# cmova rbx,[rax]
48 0F47 18, Cmova_r64_rm64, Legacy, CMOV, fr=cz op0=cw op1=r cw=rbx r=rax rm=ds:rax;UInt64
# cmovs cx,si
66 0F48 CE, Cmovs_r16_rm16, Legacy, CMOV, fr=s op0=cw op1=r cw=cx r=si
# cmovs bx,[rax]
66 0F48 18, Cmovs_r16_rm16, Legacy, CMOV, fr=s op0=cw op1=r cw=bx r=rax rm=ds:rax;UInt16
# cmovs ecx,esi
0F48 CE, Cmovs_r32_rm32, Legacy, CMOV, fr=s op0=rw op1=r w=rcx r=ecx r=esi
# cmovs ebx,[rax]
0F48 18, Cmovs_r32_rm32, Legacy, CMOV, fr=s op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt32
# cmovs rcx,rsi
48 0F48 CE, Cmovs_r64_rm64, Legacy, CMOV, fr=s op0=cw op1=r cw=rcx r=rsi
# cmovs rbx,[rax]
48 0F48 18, Cmovs_r64_rm64, Legacy, CMOV, fr=s op0=cw op1=r cw=rbx r=rax rm=ds:rax;UInt64
# cmovns cx,si
66 0F49 CE, Cmovns_r16_rm16, Legacy, CMOV, fr=s op0=cw op1=r cw=cx r=si
# cmovns bx,[rax]
66 0F49 18, Cmovns_r16_rm16, Legacy, CMOV, fr=s op0=cw op1=r cw=bx r=rax rm=ds:rax;UInt16
# cmovns ecx,esi
0F49 CE, Cmovns_r32_rm32, Legacy, CMOV, fr=s op0=rw op1=r w=rcx r=ecx r=esi
# cmovns ebx,[rax]
0F49 18, Cmovns_r32_rm32, Legacy, CMOV, fr=s op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt32
# cmovns rcx,rsi
48 0F49 CE, Cmovns_r64_rm64, Legacy, CMOV, fr=s op0=cw op1=r cw=rcx r=rsi
# cmovns rbx,[rax]
48 0F49 18, Cmovns_r64_rm64, Legacy, CMOV, fr=s op0=cw op1=r cw=rbx r=rax rm=ds:rax;UInt64
# cmovp cx,si
66 0F4A CE, Cmovp_r16_rm16, Legacy, CMOV, fr=p op0=cw op1=r cw=cx r=si
# cmovp bx,[rax]
66 0F4A 18, Cmovp_r16_rm16, Legacy, CMOV, fr=p op0=cw op1=r cw=bx r=rax rm=ds:rax;UInt16
# cmovp ecx,esi
0F4A CE, Cmovp_r32_rm32, Legacy, CMOV, fr=p op0=rw op1=r w=rcx r=ecx r=esi
# cmovp ebx,[rax]
0F4A 18, Cmovp_r32_rm32, Legacy, CMOV, fr=p op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt32
# cmovp rcx,rsi
48 0F4A CE, Cmovp_r64_rm64, Legacy, CMOV, fr=p op0=cw op1=r cw=rcx r=rsi
# cmovp rbx,[rax]
48 0F4A 18, Cmovp_r64_rm64, Legacy, CMOV, fr=p op0=cw op1=r cw=rbx r=rax rm=ds:rax;UInt64
# cmovnp cx,si
66 0F4B CE, Cmovnp_r16_rm16, Legacy, CMOV, fr=p op0=cw op1=r cw=cx r=si
# cmovnp bx,[rax]
66 0F4B 18, Cmovnp_r16_rm16, Legacy, CMOV, fr=p op0=cw op1=r cw=bx r=rax rm=ds:rax;UInt16
# cmovnp ecx,esi
0F4B CE, Cmovnp_r32_rm32, Legacy, CMOV, fr=p op0=rw op1=r w=rcx r=ecx r=esi
# cmovnp ebx,[rax]
0F4B 18, Cmovnp_r32_rm32, Legacy, CMOV, fr=p op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt32
# cmovnp rcx,rsi
48 0F4B CE, Cmovnp_r64_rm64, Legacy, CMOV, fr=p op0=cw op1=r cw=rcx r=rsi
# cmovnp rbx,[rax]
48 0F4B 18, Cmovnp_r64_rm64, Legacy, CMOV, fr=p op0=cw op1=r cw=rbx r=rax rm=ds:rax;UInt64
# cmovl cx,si
66 0F4C CE, Cmovl_r16_rm16, Legacy, CMOV, fr=so op0=cw op1=r cw=cx r=si
# cmovl bx,[rax]
66 0F4C 18, Cmovl_r16_rm16, Legacy, CMOV, fr=so op0=cw op1=r cw=bx r=rax rm=ds:rax;UInt16
# cmovl ecx,esi
0F4C CE, Cmovl_r32_rm32, Legacy, CMOV, fr=so op0=rw op1=r w=rcx r=ecx r=esi
# cmovl ebx,[rax]
0F4C 18, Cmovl_r32_rm32, Legacy, CMOV, fr=so op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt32
# cmovl rcx,rsi
48 0F4C CE, Cmovl_r64_rm64, Legacy, CMOV, fr=so op0=cw op1=r cw=rcx r=rsi
# cmovl rbx,[rax]
48 0F4C 18, Cmovl_r64_rm64, Legacy, CMOV, fr=so op0=cw op1=r cw=rbx r=rax rm=ds:rax;UInt64
# cmovge cx,si
66 0F4D CE, Cmovge_r16_rm16, Legacy, CMOV, fr=so op0=cw op1=r cw=cx r=si
# cmovge bx,[rax]
66 0F4D 18, Cmovge_r16_rm16, Legacy, CMOV, fr=so op0=cw op1=r cw=bx r=rax rm=ds:rax;UInt16
# cmovge ecx,esi
0F4D CE, Cmovge_r32_rm32, Legacy, CMOV, fr=so op0=rw op1=r w=rcx r=ecx r=esi
# cmovge ebx,[rax]
0F4D 18, Cmovge_r32_rm32, Legacy, CMOV, fr=so op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt32
# cmovge rcx,rsi
48 0F4D CE, Cmovge_r64_rm64, Legacy, CMOV, fr=so op0=cw op1=r cw=rcx r=rsi
# cmovge rbx,[rax]
48 0F4D 18, Cmovge_r64_rm64, Legacy, CMOV, fr=so op0=cw op1=r cw=rbx r=rax rm=ds:rax;UInt64
# cmovle cx,si
66 0F4E CE, Cmovle_r16_rm16, Legacy, CMOV, fr=soz op0=cw op1=r cw=cx r=si
# cmovle bx,[rax]
66 0F4E 18, Cmovle_r16_rm16, Legacy, CMOV, fr=soz op0=cw op1=r cw=bx r=rax rm=ds:rax;UInt16
# cmovle ecx,esi
0F4E CE, Cmovle_r32_rm32, Legacy, CMOV, fr=soz op0=rw op1=r w=rcx r=ecx r=esi
# cmovle ebx,[rax]
0F4E 18, Cmovle_r32_rm32, Legacy, CMOV, fr=soz op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt32
# cmovle rcx,rsi
48 0F4E CE, Cmovle_r64_rm64, Legacy, CMOV, fr=soz op0=cw op1=r cw=rcx r=rsi
# cmovle rbx,[rax]
48 0F4E 18, Cmovle_r64_rm64, Legacy, CMOV, fr=soz op0=cw op1=r cw=rbx r=rax rm=ds:rax;UInt64
# cmovg cx,si
66 0F4F CE, Cmovg_r16_rm16, Legacy, CMOV, fr=soz op0=cw op1=r cw=cx r=si
# cmovg bx,[rax]
66 0F4F 18, Cmovg_r16_rm16, Legacy, CMOV, fr=soz op0=cw op1=r cw=bx r=rax rm=ds:rax;UInt16
# cmovg ecx,esi
0F4F CE, Cmovg_r32_rm32, Legacy, CMOV, fr=soz op0=rw op1=r w=rcx r=ecx r=esi
# cmovg ebx,[rax]
0F4F 18, Cmovg_r32_rm32, Legacy, CMOV, fr=soz op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt32
# cmovg rcx,rsi
48 0F4F CE, Cmovg_r64_rm64, Legacy, CMOV, fr=soz op0=cw op1=r cw=rcx r=rsi
# cmovg rbx,[rax]
48 0F4F 18, Cmovg_r64_rm64, Legacy, CMOV, fr=soz op0=cw op1=r cw=rbx r=rax rm=ds:rax;UInt64
# kandw k2,k6,k3
C5CC 41 D3, VEX_Kandw_kr_kr_kr, VEX, AVX512F, op0=w op1=r op2=r w=k2 r=k6 r=k3
# kandq k2,k6,k3
C4E1CC 41 D3, VEX_Kandq_kr_kr_kr, VEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k6 r=k3
# kandb k2,k6,k3
C5CD 41 D3, VEX_Kandb_kr_kr_kr, VEX, AVX512DQ, op0=w op1=r op2=r w=k2 r=k6 r=k3
# kandd k2,k6,k3
C4E1CD 41 D3, VEX_Kandd_kr_kr_kr, VEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k6 r=k3
# kandnw k2,k6,k3
C5CC 42 D3, VEX_Kandnw_kr_kr_kr, VEX, AVX512F, op0=w op1=r op2=r w=k2 r=k6 r=k3
# kandnq k2,k6,k3
C4E1CC 42 D3, VEX_Kandnq_kr_kr_kr, VEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k6 r=k3
# kandnb k2,k6,k3
C5CD 42 D3, VEX_Kandnb_kr_kr_kr, VEX, AVX512DQ, op0=w op1=r op2=r w=k2 r=k6 r=k3
# kandnd k2,k6,k3
C4E1CD 42 D3, VEX_Kandnd_kr_kr_kr, VEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k6 r=k3
# knotw k2,k3
C5F8 44 D3, VEX_Knotw_kr_kr, VEX, AVX512F, op0=w op1=r w=k2 r=k3
# knotq k2,k3
C4E1F8 44 D3, VEX_Knotq_kr_kr, VEX, AVX512BW, op0=w op1=r w=k2 r=k3
# knotb k2,k3
C5F9 44 D3, VEX_Knotb_kr_kr, VEX, AVX512DQ, op0=w op1=r w=k2 r=k3
# knotd k2,k3
C4E1F9 44 D3, VEX_Knotd_kr_kr, VEX, AVX512BW, op0=w op1=r w=k2 r=k3
# korw k2,k6,k3
C5CC 45 D3, VEX_Korw_kr_kr_kr, VEX, AVX512F, op0=w op1=r op2=r w=k2 r=k6 r=k3
# korq k2,k6,k3
C4E1CC 45 D3, VEX_Korq_kr_kr_kr, VEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k6 r=k3
# korb k2,k6,k3
C5CD 45 D3, VEX_Korb_kr_kr_kr, VEX, AVX512DQ, op0=w op1=r op2=r w=k2 r=k6 r=k3
# kord k2,k6,k3
C4E1CD 45 D3, VEX_Kord_kr_kr_kr, VEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k6 r=k3
# kxnorw k2,k6,k3
C5CC 46 D3, VEX_Kxnorw_kr_kr_kr, VEX, AVX512F, op0=w op1=r op2=r w=k2 r=k6 r=k3
# kxnorq k2,k6,k3
C4E1CC 46 D3, VEX_Kxnorq_kr_kr_kr, VEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k6 r=k3
# kxnorb k2,k6,k3
C5CD 46 D3, VEX_Kxnorb_kr_kr_kr, VEX, AVX512DQ, op0=w op1=r op2=r w=k2 r=k6 r=k3
# kxnord k2,k6,k3
C4E1CD 46 D3, VEX_Kxnord_kr_kr_kr, VEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k6 r=k3
# kxorw k2,k6,k3
C5CC 47 D3, VEX_Kxorw_kr_kr_kr, VEX, AVX512F, op0=w op1=r op2=r w=k2 r=k6 r=k3
# kxorq k2,k6,k3
C4E1CC 47 D3, VEX_Kxorq_kr_kr_kr, VEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k6 r=k3
# kxorb k2,k6,k3
C5CD 47 D3, VEX_Kxorb_kr_kr_kr, VEX, AVX512DQ, op0=w op1=r op2=r w=k2 r=k6 r=k3
# kxord k2,k6,k3
C4E1CD 47 D3, VEX_Kxord_kr_kr_kr, VEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k6 r=k3
# kaddw k2,k6,k3
C5CC 4A D3, VEX_Kaddw_kr_kr_kr, VEX, AVX512DQ, op0=w op1=r op2=r w=k2 r=k6 r=k3
# kaddq k2,k6,k3
C4E1CC 4A D3, VEX_Kaddq_kr_kr_kr, VEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k6 r=k3
# kaddb k2,k6,k3
C5CD 4A D3, VEX_Kaddb_kr_kr_kr, VEX, AVX512DQ, op0=w op1=r op2=r w=k2 r=k6 r=k3
# kaddd k2,k6,k3
C4E1CD 4A D3, VEX_Kaddd_kr_kr_kr, VEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k6 r=k3
# kunpckwd k2,k6,k3
C5CC 4B D3, VEX_Kunpckwd_kr_kr_kr, VEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k6 r=k3
# kunpckdq k2,k6,k3
C4E1CC 4B D3, VEX_Kunpckdq_kr_kr_kr, VEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k6 r=k3
# kunpckbw k2,k6,k3
C5CD 4B D3, VEX_Kunpckbw_kr_kr_kr, VEX, AVX512F, op0=w op1=r op2=r w=k2 r=k6 r=k3
# movmskps ecx,xmm5
0F50 CD, Movmskps_r32_xmm, Legacy, SSE, op0=w op1=r w=rcx r=xmm5
# movmskps rcx,xmm5
48 0F50 CD, Movmskps_r64_xmm, Legacy, SSE, op0=w op1=r w=rcx r=xmm5
# vmovmskps edx,xmm3
C5F8 50 D3, VEX_Vmovmskps_r32_xmm, VEX, AVX, op0=w op1=r w=rdx r=xmm3
# vmovmskps rdx,xmm3
C4E1F8 50 D3, VEX_Vmovmskps_r64_xmm, VEX, AVX, op0=w op1=r w=rdx r=xmm3
# vmovmskps edx,ymm3
C5FC 50 D3, VEX_Vmovmskps_r32_ymm, VEX, AVX, op0=w op1=r w=rdx r=ymm3
# vmovmskps rdx,ymm3
C4E1FC 50 D3, VEX_Vmovmskps_r64_ymm, VEX, AVX, op0=w op1=r w=rdx r=ymm3
# movmskpd ecx,xmm5
66 0F50 CD, Movmskpd_r32_xmm, Legacy, SSE2, op0=w op1=r w=rcx r=xmm5
# movmskpd rcx,xmm5
66 48 0F50 CD, Movmskpd_r64_xmm, Legacy, SSE2, op0=w op1=r w=rcx r=xmm5
# vmovmskpd edx,xmm3
C5F9 50 D3, VEX_Vmovmskpd_r32_xmm, VEX, AVX, op0=w op1=r w=rdx r=xmm3
# vmovmskpd rdx,xmm3
C4E1F9 50 D3, VEX_Vmovmskpd_r64_xmm, VEX, AVX, op0=w op1=r w=rdx r=xmm3
# vmovmskpd edx,ymm3
C5FD 50 D3, VEX_Vmovmskpd_r32_ymm, VEX, AVX, op0=w op1=r w=rdx r=ymm3
# vmovmskpd rdx,ymm3
C4E1FD 50 D3, VEX_Vmovmskpd_r64_ymm, VEX, AVX, op0=w op1=r w=rdx r=ymm3
# sqrtps xmm1,xmm5
0F51 CD, Sqrtps_xmm_xmmm128, Legacy, SSE, op0=w op1=r w=xmm1 r=xmm5
# sqrtps xmm1,[rax]
0F51 08, Sqrtps_xmm_xmmm128, Legacy, SSE, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vsqrtps xmm2,xmm3
C5F8 51 D3, VEX_Vsqrtps_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=xmm3
# vsqrtps xmm2,[rax]
C5F8 51 10, VEX_Vsqrtps_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Float32
# vsqrtps ymm2,ymm3
C5FC 51 D3, VEX_Vsqrtps_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm2 r=ymm3
# vsqrtps ymm2,[rax]
C5FC 51 10, VEX_Vsqrtps_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed256_Float32
# vsqrtps xmm2,[rax+10h]
62 F17C08 51 50 01, EVEX_Vsqrtps_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float32
# vsqrtps xmm2{k3},xmm3
62 F17C0B 51 D3, EVEX_Vsqrtps_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vsqrtps xmm2{k5}{z},dword bcst [rax+4]
62 F17C9D 51 50 01, EVEX_Vsqrtps_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k5 r=rax rm=ds:rax+4;Broadcast128_Float32
# vsqrtps ymm2,[rax+20h]
62 F17C28 51 50 01, EVEX_Vsqrtps_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float32
# vsqrtps ymm2{k3},ymm3
62 F17C2B 51 D3, EVEX_Vsqrtps_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vsqrtps ymm2{k5}{z},dword bcst [rax+4]
62 F17CBD 51 50 01, EVEX_Vsqrtps_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k5 r=rax rm=ds:rax+4;Broadcast256_Float32
# vsqrtps zmm2,[rax+40h]
62 F17C48 51 50 01, EVEX_Vsqrtps_zmm_k1z_zmmm512b32_er, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float32
# vsqrtps zmm2{k3},zmm3 {rn-sae}
62 F17C1B 51 D3, EVEX_Vsqrtps_zmm_k1z_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vsqrtps zmm2{k3}{z},zmm3 {ru-sae}
62 F17CDB 51 D3, EVEX_Vsqrtps_zmm_k1z_zmmm512b32_er, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=zmm3
# sqrtpd xmm1,xmm5
66 0F51 CD, Sqrtpd_xmm_xmmm128, Legacy, SSE2, op0=w op1=r w=xmm1 r=xmm5
# sqrtpd xmm1,[rax]
66 0F51 08, Sqrtpd_xmm_xmmm128, Legacy, SSE2, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vsqrtpd xmm2,xmm3
C5F9 51 D3, VEX_Vsqrtpd_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=xmm3
# vsqrtpd xmm2,[rax]
C5F9 51 10, VEX_Vsqrtpd_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Float64
# vsqrtpd ymm2,ymm3
C5FD 51 D3, VEX_Vsqrtpd_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm2 r=ymm3
# vsqrtpd ymm2,[rax]
C5FD 51 10, VEX_Vsqrtpd_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed256_Float64
# vsqrtpd xmm2,[rax+10h]
62 F1FD08 51 50 01, EVEX_Vsqrtpd_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float64
# vsqrtpd xmm18{k3},xmm3
62 E1FD0B 51 D3, EVEX_Vsqrtpd_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm18 r=xmm18 r=k3 r=xmm3
# vsqrtpd xmm2{k3}{z},xmm3
62 F1FD8B 51 D3, EVEX_Vsqrtpd_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vsqrtpd ymm2,[rax+20h]
62 F1FD28 51 50 01, EVEX_Vsqrtpd_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float64
# vsqrtpd ymm18{k3},ymm3
62 E1FD2B 51 D3, EVEX_Vsqrtpd_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm18 r=ymm18 r=k3 r=ymm3
# vsqrtpd ymm2{k3}{z},ymm3
62 F1FDAB 51 D3, EVEX_Vsqrtpd_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vsqrtpd zmm2,[rax+40h]
62 F1FD48 51 50 01, EVEX_Vsqrtpd_zmm_k1z_zmmm512b64_er, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float64
# vsqrtpd zmm2{k3},zmm3 {rn-sae}
62 F1FD1B 51 D3, EVEX_Vsqrtpd_zmm_k1z_zmmm512b64_er, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vsqrtpd zmm2{k3}{z},zmm3 {ru-sae}
62 F1FDDB 51 D3, EVEX_Vsqrtpd_zmm_k1z_zmmm512b64_er, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=zmm3
# sqrtss xmm1,xmm5
F3 0F51 CD, Sqrtss_xmm_xmmm32, Legacy, SSE, op0=rw op1=r rw=xmm1 r=xmm5
# sqrtss xmm1,dword ptr [rax]
F3 0F51 08, Sqrtss_xmm_xmmm32, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Float32
# vsqrtss xmm2,xmm6,xmm3
C5CA 51 D3, VEX_Vsqrtss_xmm_xmm_xmmm32, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vsqrtss xmm2,xmm6,dword ptr [rax]
C5CA 51 10, VEX_Vsqrtss_xmm_xmm_xmmm32, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float32
# vsqrtss xmm2,xmm6,dword ptr [rax+4]
62 F14E08 51 50 01, EVEX_Vsqrtss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vsqrtss xmm2{k3},xmm6,xmm3
62 F14E0B 51 D3, EVEX_Vsqrtss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vsqrtss xmm2{k3}{z},xmm6,xmm3 {ru-sae}
62 F14EDB 51 D3, EVEX_Vsqrtss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# sqrtsd xmm1,xmm5
F2 0F51 CD, Sqrtsd_xmm_xmmm64, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# sqrtsd xmm1,qword ptr [rax]
F2 0F51 08, Sqrtsd_xmm_xmmm64, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Float64
# vsqrtsd xmm2,xmm6,xmm3
C5CB 51 D3, VEX_Vsqrtsd_xmm_xmm_xmmm64, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vsqrtsd xmm2,xmm6,qword ptr [rax]
C5CB 51 10, VEX_Vsqrtsd_xmm_xmm_xmmm64, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float64
# vsqrtsd xmm2,xmm6,qword ptr [rax+8]
62 F1CF08 51 50 01, EVEX_Vsqrtsd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vsqrtsd xmm18{k3},xmm14,xmm3
62 E18F0B 51 D3, EVEX_Vsqrtsd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vsqrtsd xmm2{k3}{z},xmm6,xmm3
62 F1CF8B 51 D3, EVEX_Vsqrtsd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# rsqrtps xmm1,xmm5
0F52 CD, Rsqrtps_xmm_xmmm128, Legacy, SSE, op0=w op1=r w=xmm1 r=xmm5
# rsqrtps xmm1,[rax]
0F52 08, Rsqrtps_xmm_xmmm128, Legacy, SSE, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vrsqrtps xmm2,xmm3
C5F8 52 D3, VEX_Vrsqrtps_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=xmm3
# vrsqrtps xmm2,[rax]
C5F8 52 10, VEX_Vrsqrtps_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Float32
# vrsqrtps ymm2,ymm3
C5FC 52 D3, VEX_Vrsqrtps_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm2 r=ymm3
# vrsqrtps ymm2,[rax]
C5FC 52 10, VEX_Vrsqrtps_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed256_Float32
# rsqrtss xmm1,xmm5
F3 0F52 CD, Rsqrtss_xmm_xmmm32, Legacy, SSE, op0=rw op1=r rw=xmm1 r=xmm5
# rsqrtss xmm1,dword ptr [rax]
F3 0F52 08, Rsqrtss_xmm_xmmm32, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Float32
# vrsqrtss xmm2,xmm6,xmm3
C5CA 52 D3, VEX_Vrsqrtss_xmm_xmm_xmmm32, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vrsqrtss xmm2,xmm6,dword ptr [rax]
C5CA 52 10, VEX_Vrsqrtss_xmm_xmm_xmmm32, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float32
# rcpps xmm1,xmm5
0F53 CD, Rcpps_xmm_xmmm128, Legacy, SSE, op0=w op1=r w=xmm1 r=xmm5
# rcpps xmm1,[rax]
0F53 08, Rcpps_xmm_xmmm128, Legacy, SSE, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vrcpps xmm2,xmm3
C5F8 53 D3, VEX_Vrcpps_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=xmm3
# vrcpps xmm2,[rax]
C5F8 53 10, VEX_Vrcpps_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Float32
# vrcpps ymm2,ymm3
C5FC 53 D3, VEX_Vrcpps_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm2 r=ymm3
# vrcpps ymm2,[rax]
C5FC 53 10, VEX_Vrcpps_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed256_Float32
# rcpss xmm1,xmm5
F3 0F53 CD, Rcpss_xmm_xmmm32, Legacy, SSE, op0=rw op1=r rw=xmm1 r=xmm5
# rcpss xmm1,dword ptr [rax]
F3 0F53 08, Rcpss_xmm_xmmm32, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Float32
# vrcpss xmm2,xmm6,xmm3
C5CA 53 D3, VEX_Vrcpss_xmm_xmm_xmmm32, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vrcpss xmm2,xmm6,[rax]
C5CA 53 10, VEX_Vrcpss_xmm_xmm_xmmm32, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float32
# andps xmm1,xmm5
0F54 CD, Andps_xmm_xmmm128, Legacy, SSE, op0=rw op1=r rw=xmm1 r=xmm5
# andps xmm1,[rax]
0F54 08, Andps_xmm_xmmm128, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vandps xmm2,xmm6,xmm3
C5C8 54 D3, VEX_Vandps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vandps xmm2,xmm6,[rax]
C5C8 54 10, VEX_Vandps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vandps ymm2,ymm6,ymm3
C5CC 54 D3, VEX_Vandps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vandps ymm2,ymm6,[rax]
C5CC 54 10, VEX_Vandps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vandps xmm2,xmm6,[rax+10h]
62 F14C08 54 50 01, EVEX_Vandps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vandps xmm2{k3},xmm6,xmm3
62 F14C0B 54 D3, EVEX_Vandps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vandps xmm2{k3}{z},xmm6,xmm3
62 F14C8B 54 D3, EVEX_Vandps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vandps ymm2,ymm6,[rax+20h]
62 F14C28 54 50 01, EVEX_Vandps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vandps ymm2{k3},ymm6,ymm3
62 F14C2B 54 D3, EVEX_Vandps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vandps ymm2{k3}{z},ymm6,ymm3
62 F14CAB 54 D3, EVEX_Vandps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vandps zmm2,zmm6,[rax+40h]
62 F14C48 54 50 01, EVEX_Vandps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vandps zmm2{k3},zmm6,zmm3
62 F14C4B 54 D3, EVEX_Vandps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512DQ, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vandps zmm2{k3}{z},zmm6,zmm3
62 F14CCB 54 D3, EVEX_Vandps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# andpd xmm1,xmm5
66 0F54 CD, Andpd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# andpd xmm1,[rax]
66 0F54 08, Andpd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vandpd xmm2,xmm6,xmm3
C5C9 54 D3, VEX_Vandpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vandpd xmm2,xmm6,[rax]
C5C9 54 10, VEX_Vandpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vandpd ymm2,ymm6,ymm3
C5CD 54 D3, VEX_Vandpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vandpd ymm2,ymm6,[rax]
C5CD 54 10, VEX_Vandpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vandpd xmm2,xmm6,[rax+10h]
62 F1CD08 54 50 01, EVEX_Vandpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vandpd xmm18{k3},xmm14,xmm3
62 E18D0B 54 D3, EVEX_Vandpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vandpd xmm2{k3}{z},xmm6,xmm3
62 F1CD8B 54 D3, EVEX_Vandpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vandpd ymm2,ymm6,[rax+20h]
62 F1CD28 54 50 01, EVEX_Vandpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vandpd ymm18{k3},ymm14,ymm3
62 E18D2B 54 D3, EVEX_Vandpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vandpd ymm2{k3}{z},ymm6,ymm3
62 F1CDAB 54 D3, EVEX_Vandpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vandpd zmm2,zmm6,[rax+40h]
62 F1CD48 54 50 01, EVEX_Vandpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vandpd zmm18{k3},zmm14,zmm3
62 E18D4B 54 D3, EVEX_Vandpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512DQ, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vandpd zmm2{k3}{z},zmm6,zmm3
62 F1CDCB 54 D3, EVEX_Vandpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# andnps xmm1,xmm5
0F55 CD, Andnps_xmm_xmmm128, Legacy, SSE, op0=rw op1=r rw=xmm1 r=xmm5
# andnps xmm1,[rax]
0F55 08, Andnps_xmm_xmmm128, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vandnps xmm2,xmm6,xmm3
C5C8 55 D3, VEX_Vandnps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vandnps xmm2,xmm6,[rax]
C5C8 55 10, VEX_Vandnps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vandnps ymm2,ymm6,ymm3
C5CC 55 D3, VEX_Vandnps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vandnps ymm2,ymm6,[rax]
C5CC 55 10, VEX_Vandnps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vandnps xmm2,xmm6,[rax+10h]
62 F14C08 55 50 01, EVEX_Vandnps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vandnps xmm2{k3},xmm6,xmm3
62 F14C0B 55 D3, EVEX_Vandnps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vandnps xmm2{k3}{z},xmm6,xmm3
62 F14C8B 55 D3, EVEX_Vandnps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vandnps ymm2,ymm6,[rax+20h]
62 F14C28 55 50 01, EVEX_Vandnps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vandnps ymm2{k3},ymm6,ymm3
62 F14C2B 55 D3, EVEX_Vandnps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vandnps ymm2{k3}{z},ymm6,ymm3
62 F14CAB 55 D3, EVEX_Vandnps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vandnps zmm2,zmm6,[rax+40h]
62 F14C48 55 50 01, EVEX_Vandnps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vandnps zmm2{k3},zmm6,zmm3
62 F14C4B 55 D3, EVEX_Vandnps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512DQ, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vandnps zmm2{k3}{z},zmm6,zmm3
62 F14CCB 55 D3, EVEX_Vandnps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# andnpd xmm1,xmm5
66 0F55 CD, Andnpd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# andnpd xmm1,[rax]
66 0F55 08, Andnpd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vandnpd xmm2,xmm6,xmm3
C5C9 55 D3, VEX_Vandnpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vandnpd xmm2,xmm6,[rax]
C5C9 55 10, VEX_Vandnpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vandnpd ymm2,ymm6,ymm3
C5CD 55 D3, VEX_Vandnpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vandnpd ymm2,ymm6,[rax]
C5CD 55 10, VEX_Vandnpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vandnpd xmm2,xmm6,[rax+10h]
62 F1CD08 55 50 01, EVEX_Vandnpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vandnpd xmm18{k3},xmm14,xmm3
62 E18D0B 55 D3, EVEX_Vandnpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vandnpd xmm2{k3}{z},xmm6,xmm3
62 F1CD8B 55 D3, EVEX_Vandnpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vandnpd ymm2,ymm6,[rax+20h]
62 F1CD28 55 50 01, EVEX_Vandnpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vandnpd ymm18{k3},ymm14,ymm3
62 E18D2B 55 D3, EVEX_Vandnpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vandnpd ymm2{k3}{z},ymm6,ymm3
62 F1CDAB 55 D3, EVEX_Vandnpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vandnpd zmm2,zmm6,[rax+40h]
62 F1CD48 55 50 01, EVEX_Vandnpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vandnpd zmm18{k3},zmm14,zmm3
62 E18D4B 55 D3, EVEX_Vandnpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512DQ, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vandnpd zmm2{k3}{z},zmm6,zmm3
62 F1CDCB 55 D3, EVEX_Vandnpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# orps xmm1,xmm5
0F56 CD, Orps_xmm_xmmm128, Legacy, SSE, op0=rw op1=r rw=xmm1 r=xmm5
# orps xmm1,[rax]
0F56 08, Orps_xmm_xmmm128, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vorps xmm2,xmm6,xmm3
C5C8 56 D3, VEX_Vorps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vorps xmm2,xmm6,[rax]
C5C8 56 10, VEX_Vorps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vorps ymm2,ymm6,ymm3
C5CC 56 D3, VEX_Vorps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vorps ymm2,ymm6,[rax]
C5CC 56 10, VEX_Vorps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vorps xmm2,xmm6,[rax+10h]
62 F14C08 56 50 01, EVEX_Vorps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vorps xmm2{k3},xmm6,xmm3
62 F14C0B 56 D3, EVEX_Vorps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vorps xmm2{k3}{z},xmm6,xmm3
62 F14C8B 56 D3, EVEX_Vorps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vorps ymm2,ymm6,[rax+20h]
62 F14C28 56 50 01, EVEX_Vorps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vorps ymm2{k3},ymm6,ymm3
62 F14C2B 56 D3, EVEX_Vorps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vorps ymm2{k3}{z},ymm6,ymm3
62 F14CAB 56 D3, EVEX_Vorps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vorps zmm2,zmm6,[rax+40h]
62 F14C48 56 50 01, EVEX_Vorps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vorps zmm2{k3},zmm6,zmm3
62 F14C4B 56 D3, EVEX_Vorps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512DQ, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vorps zmm2{k3}{z},zmm6,zmm3
62 F14CCB 56 D3, EVEX_Vorps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# orpd xmm1,xmm5
66 0F56 CD, Orpd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# orpd xmm1,[rax]
66 0F56 08, Orpd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vorpd xmm2,xmm6,xmm3
C5C9 56 D3, VEX_Vorpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vorpd xmm2,xmm6,[rax]
C5C9 56 10, VEX_Vorpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vorpd ymm2,ymm6,ymm3
C5CD 56 D3, VEX_Vorpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vorpd ymm2,ymm6,[rax]
C5CD 56 10, VEX_Vorpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vorpd xmm2,xmm6,[rax+10h]
62 F1CD08 56 50 01, EVEX_Vorpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vorpd xmm18{k3},xmm14,xmm3
62 E18D0B 56 D3, EVEX_Vorpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vorpd xmm2{k3}{z},xmm6,xmm3
62 F1CD8B 56 D3, EVEX_Vorpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vorpd ymm2,ymm6,[rax+20h]
62 F1CD28 56 50 01, EVEX_Vorpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vorpd ymm18{k3},ymm14,ymm3
62 E18D2B 56 D3, EVEX_Vorpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vorpd ymm2{k3}{z},ymm6,ymm3
62 F1CDAB 56 D3, EVEX_Vorpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vorpd zmm2,zmm6,[rax+40h]
62 F1CD48 56 50 01, EVEX_Vorpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vorpd zmm18{k3},zmm14,zmm3
62 E18D4B 56 D3, EVEX_Vorpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512DQ, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vorpd zmm2{k3}{z},zmm6,zmm3
62 F1CDCB 56 D3, EVEX_Vorpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# xorps xmm1,xmm5
0F57 CD, Xorps_xmm_xmmm128, Legacy, SSE, op0=rw op1=r rw=xmm1 r=xmm5
# xorps xmm1,[rax]
0F57 08, Xorps_xmm_xmmm128, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vxorps xmm2,xmm6,xmm3
C5C8 57 D3, VEX_Vxorps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vxorps xmm2,xmm6,[rax]
C5C8 57 10, VEX_Vxorps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vxorps ymm2,ymm6,ymm3
C5CC 57 D3, VEX_Vxorps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vxorps ymm2,ymm6,[rax]
C5CC 57 10, VEX_Vxorps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vxorps xmm2,xmm6,[rax+10h]
62 F14C08 57 50 01, EVEX_Vxorps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vxorps xmm2{k3},xmm6,xmm3
62 F14C0B 57 D3, EVEX_Vxorps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vxorps xmm2{k3}{z},xmm6,xmm3
62 F14C8B 57 D3, EVEX_Vxorps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vxorps ymm2,ymm6,[rax+20h]
62 F14C28 57 50 01, EVEX_Vxorps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vxorps ymm2{k3},ymm6,ymm3
62 F14C2B 57 D3, EVEX_Vxorps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vxorps ymm2{k3}{z},ymm6,ymm3
62 F14CAB 57 D3, EVEX_Vxorps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vxorps zmm2,zmm6,[rax+40h]
62 F14C48 57 50 01, EVEX_Vxorps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vxorps zmm2{k3},zmm6,zmm3
62 F14C4B 57 D3, EVEX_Vxorps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512DQ, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vxorps zmm2{k3}{z},zmm6,zmm3
62 F14CCB 57 D3, EVEX_Vxorps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# xorpd xmm1,xmm5
66 0F57 CD, Xorpd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# xorpd xmm1,[rax]
66 0F57 08, Xorpd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vxorpd xmm2,xmm6,xmm3
C5C9 57 D3, VEX_Vxorpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vxorpd xmm2,xmm6,[rax]
C5C9 57 10, VEX_Vxorpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vxorpd ymm2,ymm6,ymm3
C5CD 57 D3, VEX_Vxorpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vxorpd ymm2,ymm6,[rax]
C5CD 57 10, VEX_Vxorpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vxorpd xmm2,xmm6,[rax+10h]
62 F1CD08 57 50 01, EVEX_Vxorpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vxorpd xmm18{k3},xmm14,xmm3
62 E18D0B 57 D3, EVEX_Vxorpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vxorpd xmm2{k3}{z},xmm6,xmm3
62 F1CD8B 57 D3, EVEX_Vxorpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vxorpd ymm2,ymm6,[rax+20h]
62 F1CD28 57 50 01, EVEX_Vxorpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vxorpd ymm18{k3},ymm14,ymm3
62 E18D2B 57 D3, EVEX_Vxorpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vxorpd ymm2{k3}{z},ymm6,ymm3
62 F1CDAB 57 D3, EVEX_Vxorpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vxorpd zmm2,zmm6,[rax+40h]
62 F1CD48 57 50 01, EVEX_Vxorpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vxorpd zmm18{k3},zmm14,zmm3
62 E18D4B 57 D3, EVEX_Vxorpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512DQ, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vxorpd zmm2{k3}{z},zmm6,zmm3
62 F1CDCB 57 D3, EVEX_Vxorpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# addps xmm1,xmm5
0F58 CD, Addps_xmm_xmmm128, Legacy, SSE, op0=rw op1=r rw=xmm1 r=xmm5
# addps xmm1,[rax]
0F58 08, Addps_xmm_xmmm128, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vaddps xmm2,xmm6,xmm3
C5C8 58 D3, VEX_Vaddps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vaddps xmm2,xmm6,[rax]
C5C8 58 10, VEX_Vaddps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vaddps ymm2,ymm6,ymm3
C5CC 58 D3, VEX_Vaddps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vaddps ymm2,ymm6,[rax]
C5CC 58 10, VEX_Vaddps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vaddps xmm2,xmm6,[rax+10h]
62 F14C08 58 50 01, EVEX_Vaddps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vaddps xmm2{k3},xmm6,xmm3
62 F14C0B 58 D3, EVEX_Vaddps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vaddps xmm2{k5}{z},xmm6,dword bcst [rax+4]
62 F14C9D 58 50 01, EVEX_Vaddps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k5 r=xmm6 r=rax rm=ds:rax+4;Broadcast128_Float32
# vaddps ymm2,ymm6,[rax+20h]
62 F14C28 58 50 01, EVEX_Vaddps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vaddps ymm2{k3},ymm6,ymm3
62 F14C2B 58 D3, EVEX_Vaddps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vaddps ymm2{k5}{z},ymm6,dword bcst [rax+4]
62 F14CBD 58 50 01, EVEX_Vaddps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k5 r=ymm6 r=rax rm=ds:rax+4;Broadcast256_Float32
# vaddps zmm2,zmm6,[rax+40h]
62 F14C48 58 50 01, EVEX_Vaddps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vaddps zmm2{k3},zmm6,zmm3 {rn-sae}
62 F14C1B 58 D3, EVEX_Vaddps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vaddps zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F14CDB 58 D3, EVEX_Vaddps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# addpd xmm1,xmm5
66 0F58 CD, Addpd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# addpd xmm1,[rax]
66 0F58 08, Addpd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vaddpd xmm2,xmm6,xmm3
C5C9 58 D3, VEX_Vaddpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vaddpd xmm2,xmm6,[rax]
C5C9 58 10, VEX_Vaddpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vaddpd ymm2,ymm6,ymm3
C5CD 58 D3, VEX_Vaddpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vaddpd ymm2,ymm6,[rax]
C5CD 58 10, VEX_Vaddpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vaddpd xmm2,xmm6,[rax+10h]
62 F1CD08 58 50 01, EVEX_Vaddpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vaddpd xmm18{k3},xmm14,xmm3
62 E18D0B 58 D3, EVEX_Vaddpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vaddpd xmm2{k3}{z},xmm6,xmm3
62 F1CD8B 58 D3, EVEX_Vaddpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vaddpd ymm2,ymm6,[rax+20h]
62 F1CD28 58 50 01, EVEX_Vaddpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vaddpd ymm18{k3},ymm14,ymm3
62 E18D2B 58 D3, EVEX_Vaddpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vaddpd ymm2{k3}{z},ymm6,ymm3
62 F1CDAB 58 D3, EVEX_Vaddpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vaddpd zmm2,zmm6,[rax+40h]
62 F1CD48 58 50 01, EVEX_Vaddpd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vaddpd zmm2{k3},zmm6,zmm3 {rn-sae}
62 F1CD1B 58 D3, EVEX_Vaddpd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vaddpd zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F1CDDB 58 D3, EVEX_Vaddpd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# addss xmm1,xmm5
F3 0F58 CD, Addss_xmm_xmmm32, Legacy, SSE, op0=rw op1=r rw=xmm1 r=xmm5
# addss xmm1,dword ptr [rax]
F3 0F58 08, Addss_xmm_xmmm32, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Float32
# vaddss xmm2,xmm6,xmm3
C5CA 58 D3, VEX_Vaddss_xmm_xmm_xmmm32, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vaddss xmm2,xmm6,dword ptr [rax]
C5CA 58 10, VEX_Vaddss_xmm_xmm_xmmm32, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float32
# vaddss xmm2,xmm6,dword ptr [rax+4]
62 F14E08 58 50 01, EVEX_Vaddss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vaddss xmm2{k3},xmm6,xmm3
62 F14E0B 58 D3, EVEX_Vaddss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vaddss xmm2{k3}{z},xmm6,xmm3 {ru-sae}
62 F14EDB 58 D3, EVEX_Vaddss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# addsd xmm1,xmm5
F2 0F58 CD, Addsd_xmm_xmmm64, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# addsd xmm1,qword ptr [rax]
F2 0F58 08, Addsd_xmm_xmmm64, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Float64
# vaddsd xmm2,xmm6,xmm3
C5CB 58 D3, VEX_Vaddsd_xmm_xmm_xmmm64, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vaddsd xmm2,xmm6,qword ptr [rax]
C5CB 58 10, VEX_Vaddsd_xmm_xmm_xmmm64, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float64
# vaddsd xmm2,xmm6,qword ptr [rax+8]
62 F1CF08 58 50 01, EVEX_Vaddsd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vaddsd xmm18{k3},xmm14,xmm3
62 E18F0B 58 D3, EVEX_Vaddsd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vaddsd xmm2{k3}{z},xmm6,xmm3
62 F1CF8B 58 D3, EVEX_Vaddsd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# mulps xmm1,xmm5
0F59 CD, Mulps_xmm_xmmm128, Legacy, SSE, op0=rw op1=r rw=xmm1 r=xmm5
# mulps xmm1,[rax]
0F59 08, Mulps_xmm_xmmm128, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vmulps xmm2,xmm6,xmm3
C5C8 59 D3, VEX_Vmulps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vmulps xmm2,xmm6,[rax]
C5C8 59 10, VEX_Vmulps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vmulps ymm2,ymm6,ymm3
C5CC 59 D3, VEX_Vmulps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vmulps ymm2,ymm6,[rax]
C5CC 59 10, VEX_Vmulps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vmulps xmm2,xmm6,[rax+10h]
62 F14C08 59 50 01, EVEX_Vmulps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vmulps xmm2{k3},xmm6,xmm3
62 F14C0B 59 D3, EVEX_Vmulps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vmulps xmm2{k5}{z},xmm6,dword bcst [rax+4]
62 F14C9D 59 50 01, EVEX_Vmulps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k5 r=xmm6 r=rax rm=ds:rax+4;Broadcast128_Float32
# vmulps ymm2,ymm6,[rax+20h]
62 F14C28 59 50 01, EVEX_Vmulps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vmulps ymm2{k3},ymm6,ymm3
62 F14C2B 59 D3, EVEX_Vmulps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vmulps ymm2{k5}{z},ymm6,dword bcst [rax+4]
62 F14CBD 59 50 01, EVEX_Vmulps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k5 r=ymm6 r=rax rm=ds:rax+4;Broadcast256_Float32
# vmulps zmm2,zmm6,[rax+40h]
62 F14C48 59 50 01, EVEX_Vmulps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vmulps zmm2{k3},zmm6,zmm3 {rn-sae}
62 F14C1B 59 D3, EVEX_Vmulps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vmulps zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F14CDB 59 D3, EVEX_Vmulps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# mulpd xmm1,xmm5
66 0F59 CD, Mulpd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# mulpd xmm1,[rax]
66 0F59 08, Mulpd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vmulpd xmm2,xmm6,xmm3
C5C9 59 D3, VEX_Vmulpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vmulpd xmm2,xmm6,[rax]
C5C9 59 10, VEX_Vmulpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vmulpd ymm2,ymm6,ymm3
C5CD 59 D3, VEX_Vmulpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vmulpd ymm2,ymm6,[rax]
C5CD 59 10, VEX_Vmulpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vmulpd xmm2,xmm6,[rax+10h]
62 F1CD08 59 50 01, EVEX_Vmulpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vmulpd xmm18{k3},xmm14,xmm3
62 E18D0B 59 D3, EVEX_Vmulpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vmulpd xmm2{k3}{z},xmm6,xmm3
62 F1CD8B 59 D3, EVEX_Vmulpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vmulpd ymm2,ymm6,[rax+20h]
62 F1CD28 59 50 01, EVEX_Vmulpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vmulpd ymm18{k3},ymm14,ymm3
62 E18D2B 59 D3, EVEX_Vmulpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vmulpd ymm2{k3}{z},ymm6,ymm3
62 F1CDAB 59 D3, EVEX_Vmulpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vmulpd zmm2,zmm6,[rax+40h]
62 F1CD48 59 50 01, EVEX_Vmulpd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vmulpd zmm2{k3},zmm6,zmm3 {rn-sae}
62 F1CD1B 59 D3, EVEX_Vmulpd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vmulpd zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F1CDDB 59 D3, EVEX_Vmulpd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# mulss xmm1,xmm5
F3 0F59 CD, Mulss_xmm_xmmm32, Legacy, SSE, op0=rw op1=r rw=xmm1 r=xmm5
# mulss xmm1,dword ptr [rax]
F3 0F59 08, Mulss_xmm_xmmm32, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Float32
# vmulss xmm2,xmm6,xmm3
C5CA 59 D3, VEX_Vmulss_xmm_xmm_xmmm32, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vmulss xmm2,xmm6,dword ptr [rax]
C5CA 59 10, VEX_Vmulss_xmm_xmm_xmmm32, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float32
# vmulss xmm2,xmm6,dword ptr [rax+4]
62 F14E08 59 50 01, EVEX_Vmulss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vmulss xmm2{k3},xmm6,xmm3
62 F14E0B 59 D3, EVEX_Vmulss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vmulss xmm2{k3}{z},xmm6,xmm3 {ru-sae}
62 F14EDB 59 D3, EVEX_Vmulss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# mulsd xmm1,xmm5
F2 0F59 CD, Mulsd_xmm_xmmm64, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# mulsd xmm1,qword ptr [rax]
F2 0F59 08, Mulsd_xmm_xmmm64, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Float64
# vmulsd xmm2,xmm6,xmm3
C5CB 59 D3, VEX_Vmulsd_xmm_xmm_xmmm64, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vmulsd xmm2,xmm6,qword ptr [rax]
C5CB 59 10, VEX_Vmulsd_xmm_xmm_xmmm64, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float64
# vmulsd xmm2,xmm6,qword ptr [rax+8]
62 F1CF08 59 50 01, EVEX_Vmulsd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vmulsd xmm18{k3},xmm14,xmm3
62 E18F0B 59 D3, EVEX_Vmulsd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vmulsd xmm2{k3}{z},xmm6,xmm3
62 F1CF8B 59 D3, EVEX_Vmulsd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# cvtps2pd xmm1,xmm5
0F5A CD, Cvtps2pd_xmm_xmmm64, Legacy, SSE2, op0=w op1=r w=xmm1 r=xmm5
# cvtps2pd xmm1,qword ptr [rax]
0F5A 08, Cvtps2pd_xmm_xmmm64, Legacy, SSE2, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed64_Float32
# vcvtps2pd xmm1,xmm5
C5F8 5A CD, VEX_Vcvtps2pd_xmm_xmmm64, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vcvtps2pd xmm2,qword ptr [rax]
C5F8 5A 10, VEX_Vcvtps2pd_xmm_xmmm64, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed64_Float32
# vcvtps2pd ymm1,xmm5
C5FC 5A CD, VEX_Vcvtps2pd_ymm_xmmm128, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vcvtps2pd ymm2,xmmword ptr [rax]
C5FC 5A 10, VEX_Vcvtps2pd_ymm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Float32
# vcvtps2pd xmm2,qword ptr [rax+8]
62 F17C08 5A 50 01, EVEX_Vcvtps2pd_xmm_k1z_xmmm64b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed64_Float32
# vcvtps2pd xmm2{k3},xmm3
62 F17C0B 5A D3, EVEX_Vcvtps2pd_xmm_k1z_xmmm64b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvtps2pd xmm2{k3}{z},xmm3
62 F17C8B 5A D3, EVEX_Vcvtps2pd_xmm_k1z_xmmm64b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtps2pd ymm2,xmmword ptr [rax+10h]
62 F17C28 5A 50 01, EVEX_Vcvtps2pd_ymm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float32
# vcvtps2pd ymm2{k3},xmm3
62 F17C2B 5A D3, EVEX_Vcvtps2pd_ymm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vcvtps2pd ymm2{k3}{z},xmm3
62 F17CAB 5A D3, EVEX_Vcvtps2pd_ymm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtps2pd zmm2,ymmword ptr [rax+20h]
62 F17C48 5A 50 01, EVEX_Vcvtps2pd_zmm_k1z_ymmm256b32_sae, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float32
# vcvtps2pd zmm2{k3},ymm3
62 F17C4B 5A D3, EVEX_Vcvtps2pd_zmm_k1z_ymmm256b32_sae, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=ymm3
# vcvtps2pd zmm2{k3}{z},ymm3 {sae}
62 F17CDB 5A D3, EVEX_Vcvtps2pd_zmm_k1z_ymmm256b32_sae, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=ymm3
# cvtpd2ps xmm1,xmm5
66 0F5A CD, Cvtpd2ps_xmm_xmmm128, Legacy, SSE2, op0=w op1=r w=xmm1 r=xmm5
# cvtpd2ps xmm1,[rax]
66 0F5A 08, Cvtpd2ps_xmm_xmmm128, Legacy, SSE2, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vcvtpd2ps xmm1,xmm5
C5F9 5A CD, VEX_Vcvtpd2ps_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vcvtpd2ps xmm2,xmmword ptr [rax]
C5F9 5A 10, VEX_Vcvtpd2ps_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Float64
# vcvtpd2ps xmm1,ymm5
C5FD 5A CD, VEX_Vcvtpd2ps_xmm_ymmm256, VEX, AVX, op0=w op1=r w=vmm1 r=ymm5
# vcvtpd2ps xmm2,ymmword ptr [rax]
C5FD 5A 10, VEX_Vcvtpd2ps_xmm_ymmm256, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed256_Float64
# vcvtpd2ps xmm2,xmmword ptr [rax+10h]
62 F1FD08 5A 50 01, EVEX_Vcvtpd2ps_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float64
# vcvtpd2ps xmm2{k3},xmm3
62 F1FD0B 5A D3, EVEX_Vcvtpd2ps_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvtpd2ps xmm2{k3}{z},xmm3
62 F1FD8B 5A D3, EVEX_Vcvtpd2ps_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtpd2ps xmm2,ymmword ptr [rax+20h]
62 F1FD28 5A 50 01, EVEX_Vcvtpd2ps_xmm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float64
# vcvtpd2ps xmm2{k3},ymm3
62 F1FD2B 5A D3, EVEX_Vcvtpd2ps_xmm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=ymm3
# vcvtpd2ps xmm2{k3}{z},ymm3
62 F1FDAB 5A D3, EVEX_Vcvtpd2ps_xmm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvtpd2ps ymm2,zmmword ptr [rax+40h]
62 F1FD48 5A 50 01, EVEX_Vcvtpd2ps_ymm_k1z_zmmm512b64_er, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float64
# vcvtpd2ps ymm2{k3},zmm3
62 F1FD4B 5A D3, EVEX_Vcvtpd2ps_ymm_k1z_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=zmm3
# vcvtpd2ps ymm2{k3}{z},zmm3 {rn-sae}
62 F1FD9B 5A D3, EVEX_Vcvtpd2ps_ymm_k1z_zmmm512b64_er, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=zmm3
# cvtss2sd xmm1,xmm5
F3 0F5A CD, Cvtss2sd_xmm_xmmm32, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# cvtss2sd xmm1,dword ptr [rax]
F3 0F5A 08, Cvtss2sd_xmm_xmmm32, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Float32
# vcvtss2sd xmm2,xmm6,xmm3
C5CA 5A D3, VEX_Vcvtss2sd_xmm_xmm_xmmm32, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vcvtss2sd xmm2,xmm6,dword ptr [rax]
C5CA 5A 10, VEX_Vcvtss2sd_xmm_xmm_xmmm32, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float32
# vcvtss2sd xmm2,xmm6,xmm3
62 F14E08 5A D3, EVEX_Vcvtss2sd_xmm_k1z_xmm_xmmm32_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vcvtss2sd xmm2,xmm6,dword ptr [rax+4]
62 F14E08 5A 50 01, EVEX_Vcvtss2sd_xmm_k1z_xmm_xmmm32_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vcvtss2sd xmm10{k3},xmm22,xmm3 {sae}
62 714E33 5A D3, EVEX_Vcvtss2sd_xmm_k1z_xmm_xmmm32_sae, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm10 r=xmm10 r=k3 r=xmm22 r=xmm3
# vcvtss2sd xmm18{k3}{z},xmm14,xmm3 {sae}
62 E10E9B 5A D3, EVEX_Vcvtss2sd_xmm_k1z_xmm_xmmm32_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# cvtsd2ss xmm1,xmm5
F2 0F5A CD, Cvtsd2ss_xmm_xmmm64, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# cvtsd2ss xmm1,qword ptr [rax]
F2 0F5A 08, Cvtsd2ss_xmm_xmmm64, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Float64
# vcvtsd2ss xmm2,xmm6,xmm3
C5CB 5A D3, VEX_Vcvtsd2ss_xmm_xmm_xmmm64, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vcvtsd2ss xmm2,xmm6,qword ptr [rax]
C5CB 5A 10, VEX_Vcvtsd2ss_xmm_xmm_xmmm64, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float64
# vcvtsd2ss xmm2,xmm6,xmm3
62 F1CF08 5A D3, EVEX_Vcvtsd2ss_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vcvtsd2ss xmm2,xmm6,qword ptr [rax+8]
62 F1CF08 5A 50 01, EVEX_Vcvtsd2ss_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vcvtsd2ss xmm10{k3},xmm22,xmm3 {rd-sae}
62 71CF33 5A D3, EVEX_Vcvtsd2ss_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm10 r=xmm10 r=k3 r=xmm22 r=xmm3
# vcvtsd2ss xmm18{k3}{z},xmm14,xmm3 {rn-sae}
62 E18F9B 5A D3, EVEX_Vcvtsd2ss_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# cvtdq2ps xmm1,xmm5
0F5B CD, Cvtdq2ps_xmm_xmmm128, Legacy, SSE2, op0=w op1=r w=xmm1 r=xmm5
# cvtdq2ps xmm1,[rax]
0F5B 08, Cvtdq2ps_xmm_xmmm128, Legacy, SSE2, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed128_Int32
# vcvtdq2ps xmm1,xmm5
C5F8 5B CD, VEX_Vcvtdq2ps_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vcvtdq2ps xmm2,xmmword ptr [rax]
C5F8 5B 10, VEX_Vcvtdq2ps_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Int32
# vcvtdq2ps ymm1,ymm5
C5FC 5B CD, VEX_Vcvtdq2ps_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm1 r=ymm5
# vcvtdq2ps ymm2,ymmword ptr [rax]
C5FC 5B 10, VEX_Vcvtdq2ps_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed256_Int32
# vcvtdq2ps xmm2,xmmword ptr [rax+10h]
62 F17C08 5B 50 01, EVEX_Vcvtdq2ps_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Int32
# vcvtdq2ps xmm2{k3},xmm3
62 F17C0B 5B D3, EVEX_Vcvtdq2ps_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvtdq2ps xmm2{k3}{z},xmm3
62 F17C8B 5B D3, EVEX_Vcvtdq2ps_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtdq2ps ymm2,ymmword ptr [rax+20h]
62 F17C28 5B 50 01, EVEX_Vcvtdq2ps_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Int32
# vcvtdq2ps ymm2{k3},ymm3
62 F17C2B 5B D3, EVEX_Vcvtdq2ps_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vcvtdq2ps ymm2{k3}{z},ymm3
62 F17CAB 5B D3, EVEX_Vcvtdq2ps_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvtdq2ps zmm2,zmmword ptr [rax+40h]
62 F17C48 5B 50 01, EVEX_Vcvtdq2ps_zmm_k1z_zmmm512b32_er, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Int32
# vcvtdq2ps zmm2{k3},zmm3
62 F17C4B 5B D3, EVEX_Vcvtdq2ps_zmm_k1z_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vcvtdq2ps zmm2{k3}{z},zmm3 {rn-sae}
62 F17C9B 5B D3, EVEX_Vcvtdq2ps_zmm_k1z_zmmm512b32_er, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vcvtqq2ps xmm2,xmmword ptr [rax+10h]
62 F1FC08 5B 50 01, EVEX_Vcvtqq2ps_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Int64
# vcvtqq2ps xmm2{k3},xmm3
62 F1FC0B 5B D3, EVEX_Vcvtqq2ps_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvtqq2ps xmm2{k3}{z},xmm3
62 F1FC8B 5B D3, EVEX_Vcvtqq2ps_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtqq2ps xmm2,ymmword ptr [rax+20h]
62 F1FC28 5B 50 01, EVEX_Vcvtqq2ps_xmm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Int64
# vcvtqq2ps xmm2{k3},ymm3
62 F1FC2B 5B D3, EVEX_Vcvtqq2ps_xmm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=ymm3
# vcvtqq2ps xmm2{k3}{z},ymm3
62 F1FCAB 5B D3, EVEX_Vcvtqq2ps_xmm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvtqq2ps ymm2,zmmword ptr [rax+40h]
62 F1FC48 5B 50 01, EVEX_Vcvtqq2ps_ymm_k1z_zmmm512b64_er, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Int64
# vcvtqq2ps ymm2{k3},zmm3
62 F1FC4B 5B D3, EVEX_Vcvtqq2ps_ymm_k1z_zmmm512b64_er, EVEX, AVX512DQ, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=zmm3
# vcvtqq2ps ymm2{k3}{z},zmm3 {rn-sae}
62 F1FC9B 5B D3, EVEX_Vcvtqq2ps_ymm_k1z_zmmm512b64_er, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=zmm3
# cvtps2dq xmm1,xmm5
66 0F5B CD, Cvtps2dq_xmm_xmmm128, Legacy, SSE2, op0=w op1=r w=xmm1 r=xmm5
# cvtps2dq xmm1,[rax]
66 0F5B 08, Cvtps2dq_xmm_xmmm128, Legacy, SSE2, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vcvtps2dq xmm1,xmm5
C5F9 5B CD, VEX_Vcvtps2dq_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vcvtps2dq xmm2,xmmword ptr [rax]
C5F9 5B 10, VEX_Vcvtps2dq_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Float32
# vcvtps2dq ymm1,ymm5
C5FD 5B CD, VEX_Vcvtps2dq_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm1 r=ymm5
# vcvtps2dq ymm2,ymmword ptr [rax]
C5FD 5B 10, VEX_Vcvtps2dq_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed256_Float32
# vcvtps2dq xmm2,xmmword ptr [rax+10h]
62 F17D08 5B 50 01, EVEX_Vcvtps2dq_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float32
# vcvtps2dq xmm2{k3},xmm3
62 F17D0B 5B D3, EVEX_Vcvtps2dq_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvtps2dq xmm2{k3}{z},xmm3
62 F17D8B 5B D3, EVEX_Vcvtps2dq_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtps2dq ymm2,ymmword ptr [rax+20h]
62 F17D28 5B 50 01, EVEX_Vcvtps2dq_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float32
# vcvtps2dq ymm2{k3},ymm3
62 F17D2B 5B D3, EVEX_Vcvtps2dq_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vcvtps2dq ymm2{k3}{z},ymm3
62 F17DAB 5B D3, EVEX_Vcvtps2dq_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvtps2dq zmm2,zmmword ptr [rax+40h]
62 F17D48 5B 50 01, EVEX_Vcvtps2dq_zmm_k1z_zmmm512b32_er, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float32
# vcvtps2dq zmm2{k3},zmm3
62 F17D4B 5B D3, EVEX_Vcvtps2dq_zmm_k1z_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vcvtps2dq zmm2{k3}{z},zmm3 {rn-sae}
62 F17D9B 5B D3, EVEX_Vcvtps2dq_zmm_k1z_zmmm512b32_er, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=zmm3
# cvttps2dq xmm1,xmm5
F3 0F5B CD, Cvttps2dq_xmm_xmmm128, Legacy, SSE2, op0=w op1=r w=xmm1 r=xmm5
# cvttps2dq xmm1,[rax]
F3 0F5B 08, Cvttps2dq_xmm_xmmm128, Legacy, SSE2, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vcvttps2dq xmm1,xmm5
C5FA 5B CD, VEX_Vcvttps2dq_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vcvttps2dq xmm2,xmmword ptr [rax]
C5FA 5B 10, VEX_Vcvttps2dq_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Float32
# vcvttps2dq ymm1,ymm5
C5FE 5B CD, VEX_Vcvttps2dq_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm1 r=ymm5
# vcvttps2dq ymm2,ymmword ptr [rax]
C5FE 5B 10, VEX_Vcvttps2dq_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed256_Float32
# vcvttps2dq xmm2,xmmword ptr [rax+10h]
62 F17E08 5B 50 01, EVEX_Vcvttps2dq_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float32
# vcvttps2dq xmm2{k3},xmm3
62 F17E0B 5B D3, EVEX_Vcvttps2dq_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvttps2dq xmm2{k3}{z},xmm3
62 F17E8B 5B D3, EVEX_Vcvttps2dq_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvttps2dq ymm2,ymmword ptr [rax+20h]
62 F17E28 5B 50 01, EVEX_Vcvttps2dq_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float32
# vcvttps2dq ymm2{k3},ymm3
62 F17E2B 5B D3, EVEX_Vcvttps2dq_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vcvttps2dq ymm2{k3}{z},ymm3
62 F17EAB 5B D3, EVEX_Vcvttps2dq_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvttps2dq zmm2,zmmword ptr [rax+40h]
62 F17E48 5B 50 01, EVEX_Vcvttps2dq_zmm_k1z_zmmm512b32_sae, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float32
# vcvttps2dq zmm2{k3},zmm3
62 F17E4B 5B D3, EVEX_Vcvttps2dq_zmm_k1z_zmmm512b32_sae, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vcvttps2dq zmm2{k3}{z},zmm3 {sae}
62 F17E9B 5B D3, EVEX_Vcvttps2dq_zmm_k1z_zmmm512b32_sae, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=zmm3
# subps xmm1,xmm5
0F5C CD, Subps_xmm_xmmm128, Legacy, SSE, op0=rw op1=r rw=xmm1 r=xmm5
# subps xmm1,[rax]
0F5C 08, Subps_xmm_xmmm128, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vsubps xmm2,xmm6,xmm3
C5C8 5C D3, VEX_Vsubps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vsubps xmm2,xmm6,[rax]
C5C8 5C 10, VEX_Vsubps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vsubps ymm2,ymm6,ymm3
C5CC 5C D3, VEX_Vsubps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vsubps ymm2,ymm6,[rax]
C5CC 5C 10, VEX_Vsubps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vsubps xmm2,xmm6,[rax+10h]
62 F14C08 5C 50 01, EVEX_Vsubps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vsubps xmm2{k3},xmm6,xmm3
62 F14C0B 5C D3, EVEX_Vsubps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vsubps xmm2{k5}{z},xmm6,dword bcst [rax+4]
62 F14C9D 5C 50 01, EVEX_Vsubps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k5 r=xmm6 r=rax rm=ds:rax+4;Broadcast128_Float32
# vsubps ymm2,ymm6,[rax+20h]
62 F14C28 5C 50 01, EVEX_Vsubps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vsubps ymm2{k3},ymm6,ymm3
62 F14C2B 5C D3, EVEX_Vsubps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vsubps ymm2{k5}{z},ymm6,dword bcst [rax+4]
62 F14CBD 5C 50 01, EVEX_Vsubps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k5 r=ymm6 r=rax rm=ds:rax+4;Broadcast256_Float32
# vsubps zmm2,zmm6,[rax+40h]
62 F14C48 5C 50 01, EVEX_Vsubps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vsubps zmm2{k3},zmm6,zmm3 {rn-sae}
62 F14C1B 5C D3, EVEX_Vsubps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vsubps zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F14CDB 5C D3, EVEX_Vsubps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# subpd xmm1,xmm5
66 0F5C CD, Subpd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# subpd xmm1,[rax]
66 0F5C 08, Subpd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vsubpd xmm2,xmm6,xmm3
C5C9 5C D3, VEX_Vsubpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vsubpd xmm2,xmm6,[rax]
C5C9 5C 10, VEX_Vsubpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vsubpd ymm2,ymm6,ymm3
C5CD 5C D3, VEX_Vsubpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vsubpd ymm2,ymm6,[rax]
C5CD 5C 10, VEX_Vsubpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vsubpd xmm2,xmm6,[rax+10h]
62 F1CD08 5C 50 01, EVEX_Vsubpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vsubpd xmm18{k3},xmm14,xmm3
62 E18D0B 5C D3, EVEX_Vsubpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vsubpd xmm2{k3}{z},xmm6,xmm3
62 F1CD8B 5C D3, EVEX_Vsubpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vsubpd ymm2,ymm6,[rax+20h]
62 F1CD28 5C 50 01, EVEX_Vsubpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vsubpd ymm18{k3},ymm14,ymm3
62 E18D2B 5C D3, EVEX_Vsubpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vsubpd ymm2{k3}{z},ymm6,ymm3
62 F1CDAB 5C D3, EVEX_Vsubpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vsubpd zmm2,zmm6,[rax+40h]
62 F1CD48 5C 50 01, EVEX_Vsubpd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vsubpd zmm2{k3},zmm6,zmm3 {rn-sae}
62 F1CD1B 5C D3, EVEX_Vsubpd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vsubpd zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F1CDDB 5C D3, EVEX_Vsubpd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# subss xmm1,xmm5
F3 0F5C CD, Subss_xmm_xmmm32, Legacy, SSE, op0=rw op1=r rw=xmm1 r=xmm5
# subss xmm1,dword ptr [rax]
F3 0F5C 08, Subss_xmm_xmmm32, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Float32
# vsubss xmm2,xmm6,xmm3
C5CA 5C D3, VEX_Vsubss_xmm_xmm_xmmm32, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vsubss xmm2,xmm6,dword ptr [rax]
C5CA 5C 10, VEX_Vsubss_xmm_xmm_xmmm32, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float32
# vsubss xmm2,xmm6,dword ptr [rax+4]
62 F14E08 5C 50 01, EVEX_Vsubss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vsubss xmm2{k3},xmm6,xmm3
62 F14E0B 5C D3, EVEX_Vsubss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vsubss xmm2{k3}{z},xmm6,xmm3 {ru-sae}
62 F14EDB 5C D3, EVEX_Vsubss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# subsd xmm1,xmm5
F2 0F5C CD, Subsd_xmm_xmmm64, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# subsd xmm1,qword ptr [rax]
F2 0F5C 08, Subsd_xmm_xmmm64, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Float64
# vsubsd xmm2,xmm6,xmm3
C5CB 5C D3, VEX_Vsubsd_xmm_xmm_xmmm64, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vsubsd xmm2,xmm6,qword ptr [rax]
C5CB 5C 10, VEX_Vsubsd_xmm_xmm_xmmm64, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float64
# vsubsd xmm2,xmm6,qword ptr [rax+8]
62 F1CF08 5C 50 01, EVEX_Vsubsd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vsubsd xmm18{k3},xmm14,xmm3
62 E18F0B 5C D3, EVEX_Vsubsd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vsubsd xmm2{k3}{z},xmm6,xmm3
62 F1CF8B 5C D3, EVEX_Vsubsd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# minps xmm1,xmm5
0F5D CD, Minps_xmm_xmmm128, Legacy, SSE, op0=rw op1=r rw=xmm1 r=xmm5
# minps xmm1,[rax]
0F5D 08, Minps_xmm_xmmm128, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vminps xmm2,xmm6,xmm3
C5C8 5D D3, VEX_Vminps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vminps xmm2,xmm6,[rax]
C5C8 5D 10, VEX_Vminps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vminps ymm2,ymm6,ymm3
C5CC 5D D3, VEX_Vminps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vminps ymm2,ymm6,[rax]
C5CC 5D 10, VEX_Vminps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vminps xmm2,xmm6,[rax+10h]
62 F14C08 5D 50 01, EVEX_Vminps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vminps xmm2{k3},xmm6,xmm3
62 F14C0B 5D D3, EVEX_Vminps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vminps xmm2{k5}{z},xmm6,dword bcst [rax+4]
62 F14C9D 5D 50 01, EVEX_Vminps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k5 r=xmm6 r=rax rm=ds:rax+4;Broadcast128_Float32
# vminps ymm2,ymm6,[rax+20h]
62 F14C28 5D 50 01, EVEX_Vminps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vminps ymm2{k3},ymm6,ymm3
62 F14C2B 5D D3, EVEX_Vminps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vminps ymm2{k5}{z},ymm6,dword bcst [rax+4]
62 F14CBD 5D 50 01, EVEX_Vminps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k5 r=ymm6 r=rax rm=ds:rax+4;Broadcast256_Float32
# vminps zmm2,zmm6,[rax+40h]
62 F14C48 5D 50 01, EVEX_Vminps_zmm_k1z_zmm_zmmm512b32_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vminps zmm2{k3},zmm6,zmm3 {sae}
62 F14C1B 5D D3, EVEX_Vminps_zmm_k1z_zmm_zmmm512b32_sae, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vminps zmm2{k3}{z},zmm6,zmm3 {sae}
62 F14CDB 5D D3, EVEX_Vminps_zmm_k1z_zmm_zmmm512b32_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# minpd xmm1,xmm5
66 0F5D CD, Minpd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# minpd xmm1,[rax]
66 0F5D 08, Minpd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vminpd xmm2,xmm6,xmm3
C5C9 5D D3, VEX_Vminpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vminpd xmm2,xmm6,[rax]
C5C9 5D 10, VEX_Vminpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vminpd ymm2,ymm6,ymm3
C5CD 5D D3, VEX_Vminpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vminpd ymm2,ymm6,[rax]
C5CD 5D 10, VEX_Vminpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vminpd xmm2,xmm6,[rax+10h]
62 F1CD08 5D 50 01, EVEX_Vminpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vminpd xmm18{k3},xmm14,xmm3
62 E18D0B 5D D3, EVEX_Vminpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vminpd xmm2{k3}{z},xmm6,xmm3
62 F1CD8B 5D D3, EVEX_Vminpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vminpd ymm2,ymm6,[rax+20h]
62 F1CD28 5D 50 01, EVEX_Vminpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vminpd ymm18{k3},ymm14,ymm3
62 E18D2B 5D D3, EVEX_Vminpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vminpd ymm2{k3}{z},ymm6,ymm3
62 F1CDAB 5D D3, EVEX_Vminpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vminpd zmm2,zmm6,[rax+40h]
62 F1CD48 5D 50 01, EVEX_Vminpd_zmm_k1z_zmm_zmmm512b64_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vminpd zmm2{k3},zmm6,zmm3 {sae}
62 F1CD1B 5D D3, EVEX_Vminpd_zmm_k1z_zmm_zmmm512b64_sae, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vminpd zmm2{k3}{z},zmm6,zmm3 {sae}
62 F1CDDB 5D D3, EVEX_Vminpd_zmm_k1z_zmm_zmmm512b64_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# minss xmm1,xmm5
F3 0F5D CD, Minss_xmm_xmmm32, Legacy, SSE, op0=rw op1=r rw=xmm1 r=xmm5
# minss xmm1,dword ptr [rax]
F3 0F5D 08, Minss_xmm_xmmm32, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Float32
# vminss xmm2,xmm6,xmm3
C5CA 5D D3, VEX_Vminss_xmm_xmm_xmmm32, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vminss xmm2,xmm6,dword ptr [rax]
C5CA 5D 10, VEX_Vminss_xmm_xmm_xmmm32, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float32
# vminss xmm2,xmm6,dword ptr [rax+4]
62 F14E08 5D 50 01, EVEX_Vminss_xmm_k1z_xmm_xmmm32_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vminss xmm2{k3},xmm6,xmm3
62 F14E0B 5D D3, EVEX_Vminss_xmm_k1z_xmm_xmmm32_sae, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vminss xmm2{k3}{z},xmm6,xmm3 {sae}
62 F14EDB 5D D3, EVEX_Vminss_xmm_k1z_xmm_xmmm32_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# minsd xmm1,xmm5
F2 0F5D CD, Minsd_xmm_xmmm64, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# minsd xmm1,qword ptr [rax]
F2 0F5D 08, Minsd_xmm_xmmm64, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Float64
# vminsd xmm2,xmm6,xmm3
C5CB 5D D3, VEX_Vminsd_xmm_xmm_xmmm64, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vminsd xmm2,xmm6,qword ptr [rax]
C5CB 5D 10, VEX_Vminsd_xmm_xmm_xmmm64, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float64
# vminsd xmm2,xmm6,qword ptr [rax+8]
62 F1CF08 5D 50 01, EVEX_Vminsd_xmm_k1z_xmm_xmmm64_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vminsd xmm18{k3},xmm14,xmm3
62 E18F0B 5D D3, EVEX_Vminsd_xmm_k1z_xmm_xmmm64_sae, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vminsd xmm2{k3}{z},xmm6,xmm3
62 F1CF8B 5D D3, EVEX_Vminsd_xmm_k1z_xmm_xmmm64_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# divps xmm1,xmm5
0F5E CD, Divps_xmm_xmmm128, Legacy, SSE, op0=rw op1=r rw=xmm1 r=xmm5
# divps xmm1,[rax]
0F5E 08, Divps_xmm_xmmm128, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vdivps xmm2,xmm6,xmm3
C5C8 5E D3, VEX_Vdivps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vdivps xmm2,xmm6,[rax]
C5C8 5E 10, VEX_Vdivps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vdivps ymm2,ymm6,ymm3
C5CC 5E D3, VEX_Vdivps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vdivps ymm2,ymm6,[rax]
C5CC 5E 10, VEX_Vdivps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vdivps xmm2,xmm6,[rax+10h]
62 F14C08 5E 50 01, EVEX_Vdivps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vdivps xmm2{k3},xmm6,xmm3
62 F14C0B 5E D3, EVEX_Vdivps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vdivps xmm2{k5}{z},xmm6,dword bcst [rax+4]
62 F14C9D 5E 50 01, EVEX_Vdivps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k5 r=xmm6 r=rax rm=ds:rax+4;Broadcast128_Float32
# vdivps ymm2,ymm6,[rax+20h]
62 F14C28 5E 50 01, EVEX_Vdivps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vdivps ymm2{k3},ymm6,ymm3
62 F14C2B 5E D3, EVEX_Vdivps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vdivps ymm2{k5}{z},ymm6,dword bcst [rax+4]
62 F14CBD 5E 50 01, EVEX_Vdivps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k5 r=ymm6 r=rax rm=ds:rax+4;Broadcast256_Float32
# vdivps zmm2,zmm6,[rax+40h]
62 F14C48 5E 50 01, EVEX_Vdivps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vdivps zmm2{k3},zmm6,zmm3 {rn-sae}
62 F14C1B 5E D3, EVEX_Vdivps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vdivps zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F14CDB 5E D3, EVEX_Vdivps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# divpd xmm1,xmm5
66 0F5E CD, Divpd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# divpd xmm1,[rax]
66 0F5E 08, Divpd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vdivpd xmm2,xmm6,xmm3
C5C9 5E D3, VEX_Vdivpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vdivpd xmm2,xmm6,[rax]
C5C9 5E 10, VEX_Vdivpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vdivpd ymm2,ymm6,ymm3
C5CD 5E D3, VEX_Vdivpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vdivpd ymm2,ymm6,[rax]
C5CD 5E 10, VEX_Vdivpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vdivpd xmm2,xmm6,[rax+10h]
62 F1CD08 5E 50 01, EVEX_Vdivpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vdivpd xmm18{k3},xmm14,xmm3
62 E18D0B 5E D3, EVEX_Vdivpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vdivpd xmm2{k3}{z},xmm6,xmm3
62 F1CD8B 5E D3, EVEX_Vdivpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vdivpd ymm2,ymm6,[rax+20h]
62 F1CD28 5E 50 01, EVEX_Vdivpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vdivpd ymm18{k3},ymm14,ymm3
62 E18D2B 5E D3, EVEX_Vdivpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vdivpd ymm2{k3}{z},ymm6,ymm3
62 F1CDAB 5E D3, EVEX_Vdivpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vdivpd zmm2,zmm6,[rax+40h]
62 F1CD48 5E 50 01, EVEX_Vdivpd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vdivpd zmm2{k3},zmm6,zmm3 {rn-sae}
62 F1CD1B 5E D3, EVEX_Vdivpd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vdivpd zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F1CDDB 5E D3, EVEX_Vdivpd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# divss xmm1,xmm5
F3 0F5E CD, Divss_xmm_xmmm32, Legacy, SSE, op0=rw op1=r rw=xmm1 r=xmm5
# divss xmm1,dword ptr [rax]
F3 0F5E 08, Divss_xmm_xmmm32, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Float32
# vdivss xmm2,xmm6,xmm3
C5CA 5E D3, VEX_Vdivss_xmm_xmm_xmmm32, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vdivss xmm2,xmm6,[rax]
C5CA 5E 10, VEX_Vdivss_xmm_xmm_xmmm32, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float32
# vdivss xmm2,xmm6,dword ptr [rax+4]
62 F14E08 5E 50 01, EVEX_Vdivss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vdivss xmm2{k3},xmm6,xmm3
62 F14E0B 5E D3, EVEX_Vdivss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vdivss xmm2{k3}{z},xmm6,xmm3 {ru-sae}
62 F14EDB 5E D3, EVEX_Vdivss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# divsd xmm1,xmm5
F2 0F5E CD, Divsd_xmm_xmmm64, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# divsd xmm1,qword ptr [rax]
F2 0F5E 08, Divsd_xmm_xmmm64, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Float64
# vdivsd xmm2,xmm6,xmm3
C5CB 5E D3, VEX_Vdivsd_xmm_xmm_xmmm64, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vdivsd xmm2,xmm6,[rax]
C5CB 5E 10, VEX_Vdivsd_xmm_xmm_xmmm64, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float64
# vdivsd xmm2,xmm6,qword ptr [rax+8]
62 F1CF08 5E 50 01, EVEX_Vdivsd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vdivsd xmm18{k3},xmm14,xmm3
62 E18F0B 5E D3, EVEX_Vdivsd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vdivsd xmm2{k3}{z},xmm6,xmm3
62 F1CF8B 5E D3, EVEX_Vdivsd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# maxps xmm1,xmm5
0F5F CD, Maxps_xmm_xmmm128, Legacy, SSE, op0=rw op1=r rw=xmm1 r=xmm5
# maxps xmm1,[rax]
0F5F 08, Maxps_xmm_xmmm128, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vmaxps xmm2,xmm6,xmm3
C5C8 5F D3, VEX_Vmaxps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vmaxps xmm2,xmm6,[rax]
C5C8 5F 10, VEX_Vmaxps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vmaxps ymm2,ymm6,ymm3
C5CC 5F D3, VEX_Vmaxps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vmaxps ymm2,ymm6,[rax]
C5CC 5F 10, VEX_Vmaxps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vmaxps xmm2,xmm6,[rax+10h]
62 F14C08 5F 50 01, EVEX_Vmaxps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vmaxps xmm2{k3},xmm6,xmm3
62 F14C0B 5F D3, EVEX_Vmaxps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vmaxps xmm2{k5}{z},xmm6,dword bcst [rax+4]
62 F14C9D 5F 50 01, EVEX_Vmaxps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k5 r=xmm6 r=rax rm=ds:rax+4;Broadcast128_Float32
# vmaxps ymm2,ymm6,[rax+20h]
62 F14C28 5F 50 01, EVEX_Vmaxps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vmaxps ymm2{k3},ymm6,ymm3
62 F14C2B 5F D3, EVEX_Vmaxps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vmaxps ymm2{k5}{z},ymm6,dword bcst [rax+4]
62 F14CBD 5F 50 01, EVEX_Vmaxps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k5 r=ymm6 r=rax rm=ds:rax+4;Broadcast256_Float32
# vmaxps zmm2,zmm6,[rax+40h]
62 F14C48 5F 50 01, EVEX_Vmaxps_zmm_k1z_zmm_zmmm512b32_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vmaxps zmm2{k3},zmm6,zmm3 {sae}
62 F14C1B 5F D3, EVEX_Vmaxps_zmm_k1z_zmm_zmmm512b32_sae, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vmaxps zmm2{k3}{z},zmm6,zmm3 {sae}
62 F14CDB 5F D3, EVEX_Vmaxps_zmm_k1z_zmm_zmmm512b32_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# maxpd xmm1,xmm5
66 0F5F CD, Maxpd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# maxpd xmm1,[rax]
66 0F5F 08, Maxpd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vmaxpd xmm2,xmm6,xmm3
C5C9 5F D3, VEX_Vmaxpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vmaxpd xmm2,xmm6,[rax]
C5C9 5F 10, VEX_Vmaxpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vmaxpd ymm2,ymm6,ymm3
C5CD 5F D3, VEX_Vmaxpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vmaxpd ymm2,ymm6,[rax]
C5CD 5F 10, VEX_Vmaxpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vmaxpd xmm2,xmm6,[rax+10h]
62 F1CD08 5F 50 01, EVEX_Vmaxpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vmaxpd xmm18{k3},xmm14,xmm3
62 E18D0B 5F D3, EVEX_Vmaxpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vmaxpd xmm2{k3}{z},xmm6,xmm3
62 F1CD8B 5F D3, EVEX_Vmaxpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vmaxpd ymm2,ymm6,[rax+20h]
62 F1CD28 5F 50 01, EVEX_Vmaxpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vmaxpd ymm18{k3},ymm14,ymm3
62 E18D2B 5F D3, EVEX_Vmaxpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vmaxpd ymm2{k3}{z},ymm6,ymm3
62 F1CDAB 5F D3, EVEX_Vmaxpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vmaxpd zmm2,zmm6,[rax+40h]
62 F1CD48 5F 50 01, EVEX_Vmaxpd_zmm_k1z_zmm_zmmm512b64_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vmaxpd zmm2{k3},zmm6,zmm3 {sae}
62 F1CD1B 5F D3, EVEX_Vmaxpd_zmm_k1z_zmm_zmmm512b64_sae, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vmaxpd zmm2{k3}{z},zmm6,zmm3 {sae}
62 F1CDDB 5F D3, EVEX_Vmaxpd_zmm_k1z_zmm_zmmm512b64_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# maxss xmm1,xmm5
F3 0F5F CD, Maxss_xmm_xmmm32, Legacy, SSE, op0=rw op1=r rw=xmm1 r=xmm5
# maxss xmm1,dword ptr [rax]
F3 0F5F 08, Maxss_xmm_xmmm32, Legacy, SSE, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Float32
# vmaxss xmm2,xmm6,xmm3
C5CA 5F D3, VEX_Vmaxss_xmm_xmm_xmmm32, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vmaxss xmm2,xmm6,dword ptr [rax]
C5CA 5F 10, VEX_Vmaxss_xmm_xmm_xmmm32, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float32
# vmaxss xmm2,xmm6,dword ptr [rax+4]
62 F14E08 5F 50 01, EVEX_Vmaxss_xmm_k1z_xmm_xmmm32_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vmaxss xmm2{k3},xmm6,xmm3
62 F14E0B 5F D3, EVEX_Vmaxss_xmm_k1z_xmm_xmmm32_sae, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vmaxss xmm2{k3}{z},xmm6,xmm3 {sae}
62 F14EDB 5F D3, EVEX_Vmaxss_xmm_k1z_xmm_xmmm32_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# maxsd xmm1,xmm5
F2 0F5F CD, Maxsd_xmm_xmmm64, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# maxsd xmm1,qword ptr [rax]
F2 0F5F 08, Maxsd_xmm_xmmm64, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Float64
# vmaxsd xmm2,xmm6,xmm3
C5CB 5F D3, VEX_Vmaxsd_xmm_xmm_xmmm64, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vmaxsd xmm2,xmm6,qword ptr [rax]
C5CB 5F 10, VEX_Vmaxsd_xmm_xmm_xmmm64, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float64
# vmaxsd xmm2,xmm6,qword ptr [rax+8]
62 F1CF08 5F 50 01, EVEX_Vmaxsd_xmm_k1z_xmm_xmmm64_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vmaxsd xmm18{k3},xmm14,xmm3
62 E18F0B 5F D3, EVEX_Vmaxsd_xmm_k1z_xmm_xmmm64_sae, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vmaxsd xmm2{k3}{z},xmm6,xmm3
62 F1CF8B 5F D3, EVEX_Vmaxsd_xmm_k1z_xmm_xmmm64_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# punpcklbw mm1,mm5
0F60 CD, Punpcklbw_mm_mmm32, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# punpcklbw mm1,[rax]
0F60 08, Punpcklbw_mm_mmm32, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed32_UInt8
# punpcklbw xmm1,xmm5
66 0F60 CD, Punpcklbw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# punpcklbw xmm1,[rax]
66 0F60 08, Punpcklbw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt8
# vpunpcklbw xmm2,xmm6,xmm3
C5C9 60 D3, VEX_Vpunpcklbw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpunpcklbw xmm2,xmm6,[rax]
C5C9 60 10, VEX_Vpunpcklbw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt8
# vpunpcklbw ymm2,ymm6,ymm3
C5CD 60 D3, VEX_Vpunpcklbw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpunpcklbw ymm2,ymm6,[rax]
C5CD 60 10, VEX_Vpunpcklbw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt8
# vpunpcklbw xmm2,xmm6,[rax+10h]
62 F14D08 60 50 01, EVEX_Vpunpcklbw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vpunpcklbw xmm2{k3},xmm6,xmm3
62 F14D0B 60 D3, EVEX_Vpunpcklbw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpunpcklbw xmm18{k3}{z},xmm14,xmm3
62 E10D8B 60 D3, EVEX_Vpunpcklbw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpunpcklbw ymm2,ymm6,[rax+20h]
62 F14D28 60 50 01, EVEX_Vpunpcklbw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vpunpcklbw ymm2{k3},ymm6,ymm3
62 F14D2B 60 D3, EVEX_Vpunpcklbw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpunpcklbw ymm18{k3}{z},ymm14,ymm3
62 E10DAB 60 D3, EVEX_Vpunpcklbw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpunpcklbw zmm2,zmm6,[rax+40h]
62 F14D48 60 50 01, EVEX_Vpunpcklbw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vpunpcklbw zmm2{k3},zmm6,zmm3
62 F14D4B 60 D3, EVEX_Vpunpcklbw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpunpcklbw zmm18{k3}{z},zmm14,zmm3
62 E10DCB 60 D3, EVEX_Vpunpcklbw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# punpcklwd mm1,mm5
0F61 CD, Punpcklwd_mm_mmm32, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# punpcklwd mm1,[rax]
0F61 08, Punpcklwd_mm_mmm32, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed32_UInt16
# punpcklwd xmm1,xmm5
66 0F61 CD, Punpcklwd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# punpcklwd xmm1,[rax]
66 0F61 08, Punpcklwd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt16
# vpunpcklwd xmm2,xmm6,xmm3
C5C9 61 D3, VEX_Vpunpcklwd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpunpcklwd xmm2,xmm6,[rax]
C5C9 61 10, VEX_Vpunpcklwd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt16
# vpunpcklwd ymm2,ymm6,ymm3
C5CD 61 D3, VEX_Vpunpcklwd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpunpcklwd ymm2,ymm6,[rax]
C5CD 61 10, VEX_Vpunpcklwd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt16
# vpunpcklwd xmm2,xmm6,[rax+10h]
62 F14D08 61 50 01, EVEX_Vpunpcklwd_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpunpcklwd xmm2{k3},xmm6,xmm3
62 F14D0B 61 D3, EVEX_Vpunpcklwd_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpunpcklwd xmm18{k3}{z},xmm14,xmm3
62 E10D8B 61 D3, EVEX_Vpunpcklwd_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpunpcklwd ymm2,ymm6,[rax+20h]
62 F14D28 61 50 01, EVEX_Vpunpcklwd_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpunpcklwd ymm2{k3},ymm6,ymm3
62 F14D2B 61 D3, EVEX_Vpunpcklwd_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpunpcklwd ymm18{k3}{z},ymm14,ymm3
62 E10DAB 61 D3, EVEX_Vpunpcklwd_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpunpcklwd zmm2,zmm6,[rax+40h]
62 F14D48 61 50 01, EVEX_Vpunpcklwd_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpunpcklwd zmm2{k3},zmm6,zmm3
62 F14D4B 61 D3, EVEX_Vpunpcklwd_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpunpcklwd zmm18{k3}{z},zmm14,zmm3
62 E10DCB 61 D3, EVEX_Vpunpcklwd_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# punpckldq mm1,mm5
0F62 CD, Punpckldq_mm_mmm32, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# punpckldq mm1,[rax]
0F62 08, Punpckldq_mm_mmm32, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Int32
# punpckldq xmm1,xmm5
66 0F62 CD, Punpckldq_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# punpckldq xmm1,[rax]
66 0F62 08, Punpckldq_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt32
# vpunpckldq xmm2,xmm6,xmm3
C5C9 62 D3, VEX_Vpunpckldq_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpunpckldq xmm2,xmm6,[rax]
C5C9 62 10, VEX_Vpunpckldq_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt32
# vpunpckldq ymm2,ymm6,ymm3
C5CD 62 D3, VEX_Vpunpckldq_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpunpckldq ymm2,ymm6,[rax]
C5CD 62 10, VEX_Vpunpckldq_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt32
# vpunpckldq xmm2,xmm6,[rax+10h]
62 F14D08 62 50 01, EVEX_Vpunpckldq_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpunpckldq xmm18{k3},xmm14,xmm3
62 E10D0B 62 D3, EVEX_Vpunpckldq_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpunpckldq xmm2{k3}{z},xmm6,xmm3
62 F14D8B 62 D3, EVEX_Vpunpckldq_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpunpckldq ymm2,ymm6,[rax+20h]
62 F14D28 62 50 01, EVEX_Vpunpckldq_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpunpckldq ymm18{k3},ymm14,ymm3
62 E10D2B 62 D3, EVEX_Vpunpckldq_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpunpckldq ymm2{k3}{z},ymm6,ymm3
62 F14DAB 62 D3, EVEX_Vpunpckldq_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpunpckldq zmm2,zmm6,[rax+40h]
62 F14D48 62 50 01, EVEX_Vpunpckldq_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpunpckldq zmm18{k3},zmm14,zmm3
62 E10D4B 62 D3, EVEX_Vpunpckldq_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpunpckldq zmm2{k3}{z},zmm6,zmm3
62 F14DCB 62 D3, EVEX_Vpunpckldq_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# packsswb mm1,mm5
0F63 CD, Packsswb_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# packsswb mm1,[rax]
0F63 08, Packsswb_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_Int16
# packsswb xmm1,xmm5
66 0F63 CD, Packsswb_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# packsswb xmm1,[rax]
66 0F63 08, Packsswb_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int16
# vpacksswb xmm2,xmm6,xmm3
C5C9 63 D3, VEX_Vpacksswb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpacksswb xmm2,xmm6,[rax]
C5C9 63 10, VEX_Vpacksswb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int16
# vpacksswb ymm2,ymm6,ymm3
C5CD 63 D3, VEX_Vpacksswb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpacksswb ymm2,ymm6,[rax]
C5CD 63 10, VEX_Vpacksswb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int16
# vpacksswb xmm2,xmm6,[rax+10h]
62 F14D08 63 50 01, EVEX_Vpacksswb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int16
# vpacksswb xmm2{k3},xmm6,xmm3
62 F14D0B 63 D3, EVEX_Vpacksswb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpacksswb xmm18{k3}{z},xmm14,xmm3
62 E10D8B 63 D3, EVEX_Vpacksswb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpacksswb ymm2,ymm6,[rax+20h]
62 F14D28 63 50 01, EVEX_Vpacksswb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int16
# vpacksswb ymm2{k3},ymm6,ymm3
62 F14D2B 63 D3, EVEX_Vpacksswb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpacksswb ymm18{k3}{z},ymm14,ymm3
62 E10DAB 63 D3, EVEX_Vpacksswb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpacksswb zmm2,zmm6,[rax+40h]
62 F14D48 63 50 01, EVEX_Vpacksswb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int16
# vpacksswb zmm2{k3},zmm6,zmm3
62 F14D4B 63 D3, EVEX_Vpacksswb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpacksswb zmm18{k3}{z},zmm14,zmm3
62 E10DCB 63 D3, EVEX_Vpacksswb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# pcmpgtb mm1,mm5
0F64 CD, Pcmpgtb_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# pcmpgtb mm1,[rax]
0F64 08, Pcmpgtb_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_Int8
# pcmpgtb xmm1,xmm5
66 0F64 CD, Pcmpgtb_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# pcmpgtb xmm1,[rax]
66 0F64 08, Pcmpgtb_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int8
# vpcmpgtb xmm2,xmm6,xmm3
C5C9 64 D3, VEX_Vpcmpgtb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpcmpgtb xmm2,xmm6,[rax]
C5C9 64 10, VEX_Vpcmpgtb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int8
# vpcmpgtb ymm2,ymm6,ymm3
C5CD 64 D3, VEX_Vpcmpgtb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpcmpgtb ymm2,ymm6,[rax]
C5CD 64 10, VEX_Vpcmpgtb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int8
# vpcmpgtb k2,xmm6,[rax+10h]
62 F14D08 64 50 01, EVEX_Vpcmpgtb_kr_k1_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int8
# vpcmpgtb k2{k3},xmm6,xmm3
62 F14D0B 64 D3, EVEX_Vpcmpgtb_kr_k1_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=k3 r=xmm6 r=xmm3
# vpcmpgtb k2,ymm6,[rax+20h]
62 F14D28 64 50 01, EVEX_Vpcmpgtb_kr_k1_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int8
# vpcmpgtb k2{k3},ymm6,ymm3
62 F14D2B 64 D3, EVEX_Vpcmpgtb_kr_k1_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=k3 r=ymm6 r=ymm3
# vpcmpgtb k2,zmm6,[rax+40h]
62 F14D48 64 50 01, EVEX_Vpcmpgtb_kr_k1_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int8
# vpcmpgtb k2{k3},zmm6,zmm3
62 F14D4B 64 D3, EVEX_Vpcmpgtb_kr_k1_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k3 r=zmm6 r=zmm3
# pcmpgtw mm1,mm5
0F65 CD, Pcmpgtw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# pcmpgtw mm1,[rax]
0F65 08, Pcmpgtw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_Int16
# pcmpgtw xmm1,xmm5
66 0F65 CD, Pcmpgtw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# pcmpgtw xmm1,[rax]
66 0F65 08, Pcmpgtw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int16
# vpcmpgtw xmm2,xmm6,xmm3
C5C9 65 D3, VEX_Vpcmpgtw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpcmpgtw xmm2,xmm6,[rax]
C5C9 65 10, VEX_Vpcmpgtw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int16
# vpcmpgtw ymm2,ymm6,ymm3
C5CD 65 D3, VEX_Vpcmpgtw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpcmpgtw ymm2,ymm6,[rax]
C5CD 65 10, VEX_Vpcmpgtw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int16
# vpcmpgtw k2,xmm6,[rax+10h]
62 F14D08 65 50 01, EVEX_Vpcmpgtw_kr_k1_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int16
# vpcmpgtw k2{k3},xmm6,xmm3
62 F14D0B 65 D3, EVEX_Vpcmpgtw_kr_k1_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=k3 r=xmm6 r=xmm3
# vpcmpgtw k2,ymm6,[rax+20h]
62 F14D28 65 50 01, EVEX_Vpcmpgtw_kr_k1_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int16
# vpcmpgtw k2{k3},ymm6,ymm3
62 F14D2B 65 D3, EVEX_Vpcmpgtw_kr_k1_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=k3 r=ymm6 r=ymm3
# vpcmpgtw k2,zmm6,[rax+40h]
62 F14D48 65 50 01, EVEX_Vpcmpgtw_kr_k1_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int16
# vpcmpgtw k2{k3},zmm6,zmm3
62 F14D4B 65 D3, EVEX_Vpcmpgtw_kr_k1_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k3 r=zmm6 r=zmm3
# pcmpgtd mm1,mm5
0F66 CD, Pcmpgtd_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# pcmpgtd mm1,[rax]
0F66 08, Pcmpgtd_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_Int32
# pcmpgtd xmm1,xmm5
66 0F66 CD, Pcmpgtd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# pcmpgtd xmm1,[rax]
66 0F66 08, Pcmpgtd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int32
# vpcmpgtd xmm2,xmm6,xmm3
C5C9 66 D3, VEX_Vpcmpgtd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpcmpgtd xmm2,xmm6,[rax]
C5C9 66 10, VEX_Vpcmpgtd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int32
# vpcmpgtd ymm2,ymm6,ymm3
C5CD 66 D3, VEX_Vpcmpgtd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpcmpgtd ymm2,ymm6,[rax]
C5CD 66 10, VEX_Vpcmpgtd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int32
# vpcmpgtd k2,xmm6,[rax+10h]
62 F14D08 66 50 01, EVEX_Vpcmpgtd_kr_k1_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int32
# vpcmpgtd k2{k3},xmm6,xmm3
62 F14D0B 66 D3, EVEX_Vpcmpgtd_kr_k1_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=k3 r=xmm6 r=xmm3
# vpcmpgtd k2,ymm6,[rax+20h]
62 F14D28 66 50 01, EVEX_Vpcmpgtd_kr_k1_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int32
# vpcmpgtd k2{k3},ymm6,ymm3
62 F14D2B 66 D3, EVEX_Vpcmpgtd_kr_k1_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=k3 r=ymm6 r=ymm3
# vpcmpgtd k2,zmm6,[rax+40h]
62 F14D48 66 50 01, EVEX_Vpcmpgtd_kr_k1_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int32
# vpcmpgtd k2{k3},zmm6,zmm3
62 F14D4B 66 D3, EVEX_Vpcmpgtd_kr_k1_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=k2 r=k3 r=zmm6 r=zmm3
# packuswb mm1,mm5
0F67 CD, Packuswb_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# packuswb mm1,[rax]
0F67 08, Packuswb_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_Int16
# packuswb xmm1,xmm5
66 0F67 CD, Packuswb_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# packuswb xmm1,[rax]
66 0F67 08, Packuswb_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int16
# vpackuswb xmm2,xmm6,xmm3
C5C9 67 D3, VEX_Vpackuswb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpackuswb xmm2,xmm6,[rax]
C5C9 67 10, VEX_Vpackuswb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int16
# vpackuswb ymm2,ymm6,ymm3
C5CD 67 D3, VEX_Vpackuswb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpackuswb ymm2,ymm6,[rax]
C5CD 67 10, VEX_Vpackuswb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int16
# vpackuswb xmm2,xmm6,[rax+10h]
62 F14D08 67 50 01, EVEX_Vpackuswb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int16
# vpackuswb xmm2{k3},xmm6,xmm3
62 F14D0B 67 D3, EVEX_Vpackuswb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpackuswb xmm18{k3}{z},xmm14,xmm3
62 E10D8B 67 D3, EVEX_Vpackuswb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpackuswb ymm2,ymm6,[rax+20h]
62 F14D28 67 50 01, EVEX_Vpackuswb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int16
# vpackuswb ymm2{k3},ymm6,ymm3
62 F14D2B 67 D3, EVEX_Vpackuswb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpackuswb ymm18{k3}{z},ymm14,ymm3
62 E10DAB 67 D3, EVEX_Vpackuswb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpackuswb zmm2,zmm6,[rax+40h]
62 F14D48 67 50 01, EVEX_Vpackuswb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int16
# vpackuswb zmm2{k3},zmm6,zmm3
62 F14D4B 67 D3, EVEX_Vpackuswb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpackuswb zmm18{k3}{z},zmm14,zmm3
62 E10DCB 67 D3, EVEX_Vpackuswb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# punpckhbw mm1,mm5
0F68 CD, Punpckhbw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# punpckhbw mm1,[rax]
0F68 08, Punpckhbw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt8
# punpckhbw xmm1,xmm5
66 0F68 CD, Punpckhbw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# punpckhbw xmm1,[rax]
66 0F68 08, Punpckhbw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt8
# vpunpckhbw xmm2,xmm6,xmm3
C5C9 68 D3, VEX_Vpunpckhbw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpunpckhbw xmm2,xmm6,[rax]
C5C9 68 10, VEX_Vpunpckhbw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt8
# vpunpckhbw ymm2,ymm6,ymm3
C5CD 68 D3, VEX_Vpunpckhbw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpunpckhbw ymm2,ymm6,[rax]
C5CD 68 10, VEX_Vpunpckhbw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt8
# vpunpckhbw xmm2,xmm6,[rax+10h]
62 F14D08 68 50 01, EVEX_Vpunpckhbw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vpunpckhbw xmm2{k3},xmm6,xmm3
62 F14D0B 68 D3, EVEX_Vpunpckhbw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpunpckhbw xmm18{k3}{z},xmm14,xmm3
62 E10D8B 68 D3, EVEX_Vpunpckhbw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpunpckhbw ymm2,ymm6,[rax+20h]
62 F14D28 68 50 01, EVEX_Vpunpckhbw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vpunpckhbw ymm2{k3},ymm6,ymm3
62 F14D2B 68 D3, EVEX_Vpunpckhbw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpunpckhbw ymm18{k3}{z},ymm14,ymm3
62 E10DAB 68 D3, EVEX_Vpunpckhbw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpunpckhbw zmm2,zmm6,[rax+40h]
62 F14D48 68 50 01, EVEX_Vpunpckhbw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vpunpckhbw zmm2{k3},zmm6,zmm3
62 F14D4B 68 D3, EVEX_Vpunpckhbw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpunpckhbw zmm18{k3}{z},zmm14,zmm3
62 E10DCB 68 D3, EVEX_Vpunpckhbw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# punpckhwd mm1,mm5
0F69 CD, Punpckhwd_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# punpckhwd mm1,[rax]
0F69 08, Punpckhwd_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt16
# punpckhwd xmm1,xmm5
66 0F69 CD, Punpckhwd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# punpckhwd xmm1,[rax]
66 0F69 08, Punpckhwd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt16
# vpunpckhwd xmm2,xmm6,xmm3
C5C9 69 D3, VEX_Vpunpckhwd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpunpckhwd xmm2,xmm6,[rax]
C5C9 69 10, VEX_Vpunpckhwd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt16
# vpunpckhwd ymm2,ymm6,ymm3
C5CD 69 D3, VEX_Vpunpckhwd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpunpckhwd ymm2,ymm6,[rax]
C5CD 69 10, VEX_Vpunpckhwd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt16
# vpunpckhwd xmm2,xmm6,[rax+10h]
62 F14D08 69 50 01, EVEX_Vpunpckhwd_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpunpckhwd xmm2{k3},xmm6,xmm3
62 F14D0B 69 D3, EVEX_Vpunpckhwd_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpunpckhwd xmm18{k3}{z},xmm14,xmm3
62 E10D8B 69 D3, EVEX_Vpunpckhwd_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpunpckhwd ymm2,ymm6,[rax+20h]
62 F14D28 69 50 01, EVEX_Vpunpckhwd_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpunpckhwd ymm2{k3},ymm6,ymm3
62 F14D2B 69 D3, EVEX_Vpunpckhwd_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpunpckhwd ymm18{k3}{z},ymm14,ymm3
62 E10DAB 69 D3, EVEX_Vpunpckhwd_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpunpckhwd zmm2,zmm6,[rax+40h]
62 F14D48 69 50 01, EVEX_Vpunpckhwd_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpunpckhwd zmm2{k3},zmm6,zmm3
62 F14D4B 69 D3, EVEX_Vpunpckhwd_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpunpckhwd zmm18{k3}{z},zmm14,zmm3
62 E10DCB 69 D3, EVEX_Vpunpckhwd_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# punpckhdq mm1,mm5
0F6A CD, Punpckhdq_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# punpckhdq mm1,[rax]
0F6A 08, Punpckhdq_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt32
# punpckhdq xmm1,xmm5
66 0F6A CD, Punpckhdq_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# punpckhdq xmm1,[rax]
66 0F6A 08, Punpckhdq_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt32
# vpunpckhdq xmm2,xmm6,xmm3
C5C9 6A D3, VEX_Vpunpckhdq_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpunpckhdq xmm2,xmm6,[rax]
C5C9 6A 10, VEX_Vpunpckhdq_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt32
# vpunpckhdq ymm2,ymm6,ymm3
C5CD 6A D3, VEX_Vpunpckhdq_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpunpckhdq ymm2,ymm6,[rax]
C5CD 6A 10, VEX_Vpunpckhdq_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt32
# vpunpckhdq xmm2,xmm6,[rax+10h]
62 F14D08 6A 50 01, EVEX_Vpunpckhdq_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpunpckhdq xmm18{k3},xmm14,xmm3
62 E10D0B 6A D3, EVEX_Vpunpckhdq_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpunpckhdq xmm2{k3}{z},xmm6,xmm3
62 F14D8B 6A D3, EVEX_Vpunpckhdq_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpunpckhdq ymm2,ymm6,[rax+20h]
62 F14D28 6A 50 01, EVEX_Vpunpckhdq_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpunpckhdq ymm18{k3},ymm14,ymm3
62 E10D2B 6A D3, EVEX_Vpunpckhdq_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpunpckhdq ymm2{k3}{z},ymm6,ymm3
62 F14DAB 6A D3, EVEX_Vpunpckhdq_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpunpckhdq zmm2,zmm6,[rax+40h]
62 F14D48 6A 50 01, EVEX_Vpunpckhdq_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpunpckhdq zmm18{k3},zmm14,zmm3
62 E10D4B 6A D3, EVEX_Vpunpckhdq_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpunpckhdq zmm2{k3}{z},zmm6,zmm3
62 F14DCB 6A D3, EVEX_Vpunpckhdq_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# packssdw mm1,mm5
0F6B CD, Packssdw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# packssdw mm1,[rax]
0F6B 08, Packssdw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_Int32
# packssdw xmm1,xmm5
66 0F6B CD, Packssdw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# packssdw xmm1,[rax]
66 0F6B 08, Packssdw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int32
# vpackssdw xmm2,xmm6,xmm3
C5C9 6B D3, VEX_Vpackssdw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpackssdw xmm2,xmm6,[rax]
C5C9 6B 10, VEX_Vpackssdw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int32
# vpackssdw ymm2,ymm6,ymm3
C5CD 6B D3, VEX_Vpackssdw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpackssdw ymm2,ymm6,[rax]
C5CD 6B 10, VEX_Vpackssdw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int32
# vpackssdw xmm2,xmm6,[rax+10h]
62 F14D08 6B 50 01, EVEX_Vpackssdw_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int32
# vpackssdw xmm18{k3},xmm14,xmm3
62 E10D0B 6B D3, EVEX_Vpackssdw_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpackssdw xmm2{k3}{z},xmm6,xmm3
62 F14D8B 6B D3, EVEX_Vpackssdw_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpackssdw ymm2,ymm6,[rax+20h]
62 F14D28 6B 50 01, EVEX_Vpackssdw_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int32
# vpackssdw ymm18{k3},ymm14,ymm3
62 E10D2B 6B D3, EVEX_Vpackssdw_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpackssdw ymm2{k3}{z},ymm6,ymm3
62 F14DAB 6B D3, EVEX_Vpackssdw_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpackssdw zmm2,zmm6,[rax+40h]
62 F14D48 6B 50 01, EVEX_Vpackssdw_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int32
# vpackssdw zmm18{k3},zmm14,zmm3
62 E10D4B 6B D3, EVEX_Vpackssdw_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpackssdw zmm2{k3}{z},zmm6,zmm3
62 F14DCB 6B D3, EVEX_Vpackssdw_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# punpcklqdq xmm1,xmm5
66 0F6C CD, Punpcklqdq_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# punpcklqdq xmm1,[rax]
66 0F6C 08, Punpcklqdq_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt64
# vpunpcklqdq xmm2,xmm6,xmm3
C5C9 6C D3, VEX_Vpunpcklqdq_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpunpcklqdq xmm2,xmm6,[rax]
C5C9 6C 10, VEX_Vpunpcklqdq_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt64
# vpunpcklqdq ymm2,ymm6,ymm3
C5CD 6C D3, VEX_Vpunpcklqdq_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpunpcklqdq ymm2,ymm6,[rax]
C5CD 6C 10, VEX_Vpunpcklqdq_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt64
# vpunpcklqdq xmm2,xmm6,[rax+10h]
62 F1CD08 6C 50 01, EVEX_Vpunpcklqdq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpunpcklqdq xmm18{k3},xmm14,xmm3
62 E18D0B 6C D3, EVEX_Vpunpcklqdq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpunpcklqdq xmm2{k3}{z},xmm6,xmm3
62 F1CD8B 6C D3, EVEX_Vpunpcklqdq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpunpcklqdq ymm2,ymm6,[rax+20h]
62 F1CD28 6C 50 01, EVEX_Vpunpcklqdq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpunpcklqdq ymm18{k3},ymm14,ymm3
62 E18D2B 6C D3, EVEX_Vpunpcklqdq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpunpcklqdq ymm2{k3}{z},ymm6,ymm3
62 F1CDAB 6C D3, EVEX_Vpunpcklqdq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpunpcklqdq zmm2,zmm6,[rax+40h]
62 F1CD48 6C 50 01, EVEX_Vpunpcklqdq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpunpcklqdq zmm18{k3},zmm14,zmm3
62 E18D4B 6C D3, EVEX_Vpunpcklqdq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpunpcklqdq zmm2{k3}{z},zmm6,zmm3
62 F1CDCB 6C D3, EVEX_Vpunpcklqdq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# punpckhqdq xmm1,xmm5
66 0F6D CD, Punpckhqdq_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# punpckhqdq xmm1,[rax]
66 0F6D 08, Punpckhqdq_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt64
# vpunpckhqdq xmm2,xmm6,xmm3
C5C9 6D D3, VEX_Vpunpckhqdq_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpunpckhqdq xmm2,xmm6,[rax]
C5C9 6D 10, VEX_Vpunpckhqdq_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt64
# vpunpckhqdq ymm2,ymm6,ymm3
C5CD 6D D3, VEX_Vpunpckhqdq_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpunpckhqdq ymm2,ymm6,[rax]
C5CD 6D 10, VEX_Vpunpckhqdq_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt64
# vpunpckhqdq xmm2,xmm6,[rax+10h]
62 F1CD08 6D 50 01, EVEX_Vpunpckhqdq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpunpckhqdq xmm18{k3},xmm14,xmm3
62 E18D0B 6D D3, EVEX_Vpunpckhqdq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpunpckhqdq xmm2{k3}{z},xmm6,xmm3
62 F1CD8B 6D D3, EVEX_Vpunpckhqdq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpunpckhqdq ymm2,ymm6,[rax+20h]
62 F1CD28 6D 50 01, EVEX_Vpunpckhqdq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpunpckhqdq ymm18{k3},ymm14,ymm3
62 E18D2B 6D D3, EVEX_Vpunpckhqdq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpunpckhqdq ymm2{k3}{z},ymm6,ymm3
62 F1CDAB 6D D3, EVEX_Vpunpckhqdq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpunpckhqdq zmm2,zmm6,[rax+40h]
62 F1CD48 6D 50 01, EVEX_Vpunpckhqdq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpunpckhqdq zmm18{k3},zmm14,zmm3
62 E18D4B 6D D3, EVEX_Vpunpckhqdq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpunpckhqdq zmm2{k3}{z},zmm6,zmm3
62 F1CDCB 6D D3, EVEX_Vpunpckhqdq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# movd mm1,ebp
0F6E CD, Movd_mm_rm32, Legacy, MMX, op0=w op1=r w=mm1 r=ebp
# movd mm1,dword ptr [rax]
0F6E 08, Movd_mm_rm32, Legacy, MMX, op0=w op1=r w=mm1 r=rax rm=ds:rax;UInt32
# movq mm1,rbp
48 0F6E CD, Movq_mm_rm64, Legacy, MMX, op0=w op1=r w=mm1 r=rbp
# movq mm1,[rax]
48 0F6E 08, Movq_mm_rm64, Legacy, MMX, op0=w op1=r w=mm1 r=rax rm=ds:rax;UInt64
# movd xmm1,ebp
66 0F6E CD, Movd_xmm_rm32, Legacy, SSE2, op0=w op1=r w=xmm1 r=ebp
# movd xmm1,dword ptr [rax]
66 0F6E 08, Movd_xmm_rm32, Legacy, SSE2, op0=w op1=r w=xmm1 r=rax rm=ds:rax;UInt32
# movq xmm1,rbp
66 48 0F6E CD, Movq_xmm_rm64, Legacy, SSE2, op0=w op1=r w=xmm1 r=rbp
# movq xmm1,qword ptr [rax]
66 48 0F6E 08, Movq_xmm_rm64, Legacy, SSE2, op0=w op1=r w=xmm1 r=rax rm=ds:rax;UInt64
# vmovd xmm1,ebp
C5F9 6E CD, VEX_Vmovd_xmm_rm32, VEX, AVX, op0=w op1=r w=vmm1 r=ebp
# vmovd xmm1,dword ptr [rax]
C5F9 6E 08, VEX_Vmovd_xmm_rm32, VEX, AVX, op0=w op1=r w=vmm1 r=rax rm=ds:rax;UInt32
# vmovq xmm1,rbp
C4E1F9 6E CD, VEX_Vmovq_xmm_rm64, VEX, AVX, op0=w op1=r w=vmm1 r=rbp
# vmovq xmm1,qword ptr [rax]
C4E1F9 6E 08, VEX_Vmovq_xmm_rm64, VEX, AVX, op0=w op1=r w=vmm1 r=rax rm=ds:rax;UInt64
# vmovd xmm2,ebx
62 F17D08 6E D3, EVEX_Vmovd_xmm_rm32, EVEX, AVX512F, op0=w op1=r w=vmm2 r=ebx
# vmovd xmm2,dword ptr [rax+4]
62 F17D08 6E 50 01, EVEX_Vmovd_xmm_rm32, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+4;UInt32
# vmovq xmm2,rbx
62 F1FD08 6E D3, EVEX_Vmovq_xmm_rm64, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rbx
# vmovq xmm2,qword ptr [rax+8]
62 F1FD08 6E 50 01, EVEX_Vmovq_xmm_rm64, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;UInt64
# movq mm1,mm5
0F6F CD, Movq_mm_mmm64, Legacy, MMX, op0=w op1=r w=mm1 r=mm5
# movq mm1,[rax]
0F6F 08, Movq_mm_mmm64, Legacy, MMX, op0=w op1=r w=mm1 r=rax rm=ds:rax;UInt64
# movdqa xmm1,xmm5
66 0F6F CD, Movdqa_xmm_xmmm128, Legacy, SSE2, op0=w op1=r w=xmm1 r=xmm5
# movdqa xmm1,[rax]
66 0F6F 08, Movdqa_xmm_xmmm128, Legacy, SSE2, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed128_UInt32
# vmovdqa xmm1,xmm5
C5F9 6F CD, VEX_Vmovdqa_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vmovdqa xmm2,xmmword ptr [rax]
C5F9 6F 10, VEX_Vmovdqa_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt32
# vmovdqa ymm1,ymm5
C5FD 6F CD, VEX_Vmovdqa_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm1 r=ymm5
# vmovdqa ymm2,ymmword ptr [rax]
C5FD 6F 10, VEX_Vmovdqa_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed256_UInt32
# vmovdqa32 xmm2,xmm3
62 F17D08 6F D3, EVEX_Vmovdqa32_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vmovdqa32 xmm2,[rax+10h]
62 F17D08 6F 50 01, EVEX_Vmovdqa32_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vmovdqa32 xmm2{k3},xmm3
62 F17D0B 6F D3, EVEX_Vmovdqa32_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vmovdqa32 xmm10{k3}{z},xmm19
62 317D8B 6F D3, EVEX_Vmovdqa32_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vmovdqa32 ymm2,ymm3
62 F17D28 6F D3, EVEX_Vmovdqa32_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=ymm3
# vmovdqa32 ymm2,[rax+20h]
62 F17D28 6F 50 01, EVEX_Vmovdqa32_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vmovdqa32 ymm2{k3},ymm3
62 F17D2B 6F D3, EVEX_Vmovdqa32_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vmovdqa32 ymm10{k3}{z},ymm19
62 317DAB 6F D3, EVEX_Vmovdqa32_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=ymm19
# vmovdqa32 zmm2,zmm3
62 F17D48 6F D3, EVEX_Vmovdqa32_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=zmm3
# vmovdqa32 zmm2,[rax+40h]
62 F17D48 6F 50 01, EVEX_Vmovdqa32_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vmovdqa32 zmm2{k3},zmm3
62 F17D4B 6F D3, EVEX_Vmovdqa32_zmm_k1z_zmmm512, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vmovdqa32 zmm10{k3}{z},zmm19
62 317DCB 6F D3, EVEX_Vmovdqa32_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=zmm19
# vmovdqa64 xmm2,xmm3
62 F1FD08 6F D3, EVEX_Vmovdqa64_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vmovdqa64 xmm2,[rax+10h]
62 F1FD08 6F 50 01, EVEX_Vmovdqa64_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vmovdqa64 xmm2{k3},xmm3
62 F1FD0B 6F D3, EVEX_Vmovdqa64_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vmovdqa64 xmm10{k3}{z},xmm19
62 31FD8B 6F D3, EVEX_Vmovdqa64_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vmovdqa64 ymm2,ymm3
62 F1FD28 6F D3, EVEX_Vmovdqa64_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=ymm3
# vmovdqa64 ymm2,[rax+20h]
62 F1FD28 6F 50 01, EVEX_Vmovdqa64_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vmovdqa64 ymm2{k3},ymm3
62 F1FD2B 6F D3, EVEX_Vmovdqa64_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vmovdqa64 ymm10{k3}{z},ymm19
62 31FDAB 6F D3, EVEX_Vmovdqa64_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=ymm19
# vmovdqa64 zmm2,zmm3
62 F1FD48 6F D3, EVEX_Vmovdqa64_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=zmm3
# vmovdqa64 zmm2,[rax+40h]
62 F1FD48 6F 50 01, EVEX_Vmovdqa64_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vmovdqa64 zmm2{k3},zmm3
62 F1FD4B 6F D3, EVEX_Vmovdqa64_zmm_k1z_zmmm512, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vmovdqa64 zmm10{k3}{z},zmm19
62 31FDCB 6F D3, EVEX_Vmovdqa64_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=zmm19
# movdqu xmm1,xmm5
F3 0F6F CD, Movdqu_xmm_xmmm128, Legacy, SSE2, op0=w op1=r w=xmm1 r=xmm5
# movdqu xmm1,[rax]
F3 0F6F 08, Movdqu_xmm_xmmm128, Legacy, SSE2, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed128_UInt32
# vmovdqu xmm1,xmm5
C5FA 6F CD, VEX_Vmovdqu_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vmovdqu xmm2,xmmword ptr [rax]
C5FA 6F 10, VEX_Vmovdqu_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt32
# vmovdqu ymm1,ymm5
C5FE 6F CD, VEX_Vmovdqu_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm1 r=ymm5
# vmovdqu ymm2,ymmword ptr [rax]
C5FE 6F 10, VEX_Vmovdqu_ymm_ymmm256, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed256_UInt32
# vmovdqu32 xmm2,xmm3
62 F17E08 6F D3, EVEX_Vmovdqu32_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vmovdqu32 xmm2,[rax+10h]
62 F17E08 6F 50 01, EVEX_Vmovdqu32_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vmovdqu32 xmm2{k3},xmm3
62 F17E0B 6F D3, EVEX_Vmovdqu32_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vmovdqu32 xmm10{k3}{z},xmm19
62 317E8B 6F D3, EVEX_Vmovdqu32_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vmovdqu32 ymm2,ymm3
62 F17E28 6F D3, EVEX_Vmovdqu32_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=ymm3
# vmovdqu32 ymm2,[rax+20h]
62 F17E28 6F 50 01, EVEX_Vmovdqu32_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vmovdqu32 ymm2{k3},ymm3
62 F17E2B 6F D3, EVEX_Vmovdqu32_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vmovdqu32 ymm10{k3}{z},ymm19
62 317EAB 6F D3, EVEX_Vmovdqu32_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=ymm19
# vmovdqu32 zmm2,zmm3
62 F17E48 6F D3, EVEX_Vmovdqu32_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=zmm3
# vmovdqu32 zmm2,[rax+40h]
62 F17E48 6F 50 01, EVEX_Vmovdqu32_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vmovdqu32 zmm2{k3},zmm3
62 F17E4B 6F D3, EVEX_Vmovdqu32_zmm_k1z_zmmm512, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vmovdqu32 zmm10{k3}{z},zmm19
62 317ECB 6F D3, EVEX_Vmovdqu32_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=zmm19
# vmovdqu64 xmm2,xmm3
62 F1FE08 6F D3, EVEX_Vmovdqu64_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vmovdqu64 xmm2,[rax+10h]
62 F1FE08 6F 50 01, EVEX_Vmovdqu64_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vmovdqu64 xmm2{k3},xmm3
62 F1FE0B 6F D3, EVEX_Vmovdqu64_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vmovdqu64 xmm10{k3}{z},xmm19
62 31FE8B 6F D3, EVEX_Vmovdqu64_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vmovdqu64 ymm2,ymm3
62 F1FE28 6F D3, EVEX_Vmovdqu64_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=ymm3
# vmovdqu64 ymm2,[rax+20h]
62 F1FE28 6F 50 01, EVEX_Vmovdqu64_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vmovdqu64 ymm2{k3},ymm3
62 F1FE2B 6F D3, EVEX_Vmovdqu64_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vmovdqu64 ymm10{k3}{z},ymm19
62 31FEAB 6F D3, EVEX_Vmovdqu64_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=ymm19
# vmovdqu64 zmm2,zmm3
62 F1FE48 6F D3, EVEX_Vmovdqu64_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=zmm3
# vmovdqu64 zmm2,[rax+40h]
62 F1FE48 6F 50 01, EVEX_Vmovdqu64_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vmovdqu64 zmm2{k3},zmm3
62 F1FE4B 6F D3, EVEX_Vmovdqu64_zmm_k1z_zmmm512, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vmovdqu64 zmm10{k3}{z},zmm19
62 31FECB 6F D3, EVEX_Vmovdqu64_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=zmm19
# vmovdqu8 xmm2,xmm3
62 F17F08 6F D3, EVEX_Vmovdqu8_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=xmm3
# vmovdqu8 xmm2,[rax+10h]
62 F17F08 6F 50 01, EVEX_Vmovdqu8_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vmovdqu8 xmm2{k3},xmm3
62 F17F0B 6F D3, EVEX_Vmovdqu8_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vmovdqu8 xmm10{k3}{z},xmm19
62 317F8B 6F D3, EVEX_Vmovdqu8_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vmovdqu8 ymm2,ymm3
62 F17F28 6F D3, EVEX_Vmovdqu8_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=ymm3
# vmovdqu8 ymm2,[rax+20h]
62 F17F28 6F 50 01, EVEX_Vmovdqu8_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vmovdqu8 ymm2{k3},ymm3
62 F17F2B 6F D3, EVEX_Vmovdqu8_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vmovdqu8 ymm10{k3}{z},ymm19
62 317FAB 6F D3, EVEX_Vmovdqu8_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm10 r=k3 r=ymm19
# vmovdqu8 zmm2,zmm3
62 F17F48 6F D3, EVEX_Vmovdqu8_zmm_k1z_zmmm512, EVEX, AVX512BW, op0=w op1=r w=vmm2 r=zmm3
# vmovdqu8 zmm2,[rax+40h]
62 F17F48 6F 50 01, EVEX_Vmovdqu8_zmm_k1z_zmmm512, EVEX, AVX512BW, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vmovdqu8 zmm2{k3},zmm3
62 F17F4B 6F D3, EVEX_Vmovdqu8_zmm_k1z_zmmm512, EVEX, AVX512BW, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vmovdqu8 zmm10{k3}{z},zmm19
62 317FCB 6F D3, EVEX_Vmovdqu8_zmm_k1z_zmmm512, EVEX, AVX512BW, op0=w op1=r w=vmm10 r=k3 r=zmm19
# vmovdqu16 xmm2,xmm3
62 F1FF08 6F D3, EVEX_Vmovdqu16_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=xmm3
# vmovdqu16 xmm2,[rax+10h]
62 F1FF08 6F 50 01, EVEX_Vmovdqu16_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vmovdqu16 xmm2{k3},xmm3
62 F1FF0B 6F D3, EVEX_Vmovdqu16_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vmovdqu16 xmm10{k3}{z},xmm19
62 31FF8B 6F D3, EVEX_Vmovdqu16_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vmovdqu16 ymm2,ymm3
62 F1FF28 6F D3, EVEX_Vmovdqu16_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=ymm3
# vmovdqu16 ymm2,[rax+20h]
62 F1FF28 6F 50 01, EVEX_Vmovdqu16_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vmovdqu16 ymm2{k3},ymm3
62 F1FF2B 6F D3, EVEX_Vmovdqu16_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vmovdqu16 ymm10{k3}{z},ymm19
62 31FFAB 6F D3, EVEX_Vmovdqu16_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm10 r=k3 r=ymm19
# vmovdqu16 zmm2,zmm3
62 F1FF48 6F D3, EVEX_Vmovdqu16_zmm_k1z_zmmm512, EVEX, AVX512BW, op0=w op1=r w=vmm2 r=zmm3
# vmovdqu16 zmm2,[rax+40h]
62 F1FF48 6F 50 01, EVEX_Vmovdqu16_zmm_k1z_zmmm512, EVEX, AVX512BW, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vmovdqu16 zmm2{k3},zmm3
62 F1FF4B 6F D3, EVEX_Vmovdqu16_zmm_k1z_zmmm512, EVEX, AVX512BW, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vmovdqu16 zmm10{k3}{z},zmm19
62 31FFCB 6F D3, EVEX_Vmovdqu16_zmm_k1z_zmmm512, EVEX, AVX512BW, op0=w op1=r w=vmm10 r=k3 r=zmm19
# pshufw mm1,mm5,0A5h
0F70 CD A5, Pshufw_mm_mmm64_imm8, Legacy, SSE, op0=w op1=r op2=r w=mm1 r=mm5
# pshufw mm1,[rax],0A5h
0F70 08 A5, Pshufw_mm_mmm64_imm8, Legacy, SSE, op0=w op1=r op2=r w=mm1 r=rax rm=ds:rax;Packed64_UInt16
# pshufd xmm1,xmm5,0A5h
66 0F70 CD A5, Pshufd_xmm_xmmm128_imm8, Legacy, SSE2, op0=w op1=r op2=r w=xmm1 r=xmm5
# pshufd xmm1,[rax],0A5h
66 0F70 08 A5, Pshufd_xmm_xmmm128_imm8, Legacy, SSE2, op0=w op1=r op2=r w=xmm1 r=rax rm=ds:rax;Packed128_UInt32
# vpshufd xmm2,xmm3,0A5h
C5F9 70 D3 A5, VEX_Vpshufd_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm3
# vpshufd xmm2,[rax],0A5h
C5F9 70 10 A5, VEX_Vpshufd_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt32
# vpshufd ymm2,ymm3,0A5h
C5FD 70 D3 A5, VEX_Vpshufd_ymm_ymmm256_imm8, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm3
# vpshufd ymm2,[rax],0A5h
C5FD 70 10 A5, VEX_Vpshufd_ymm_ymmm256_imm8, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed256_UInt32
# vpshufd xmm2,xmm19,0A5h
62 B17D08 70 D3 A5, EVEX_Vpshufd_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm19
# vpshufd xmm2,[rax+10h],0A5h
62 F17D08 70 50 01 A5, EVEX_Vpshufd_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpshufd xmm18{k3},xmm3,0A5h
62 E17D0B 70 D3 A5, EVEX_Vpshufd_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm3
# vpshufd xmm2{k3}{z},xmm3,0A5h
62 F17D8B 70 D3 A5, EVEX_Vpshufd_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm3
# vpshufd ymm2,ymm19,0A5h
62 B17D28 70 D3 A5, EVEX_Vpshufd_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm19
# vpshufd ymm2,[rax+20h],0A5h
62 F17D28 70 50 01 A5, EVEX_Vpshufd_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpshufd ymm18{k3},ymm3,0A5h
62 E17D2B 70 D3 A5, EVEX_Vpshufd_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm3
# vpshufd ymm2{k3}{z},ymm3,0A5h
62 F17DAB 70 D3 A5, EVEX_Vpshufd_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm3
# vpshufd zmm2,zmm19,0A5h
62 B17D48 70 D3 A5, EVEX_Vpshufd_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm19
# vpshufd zmm2,[rax+40h],0A5h
62 F17D48 70 50 01 A5, EVEX_Vpshufd_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpshufd zmm18{k3},zmm3,0A5h
62 E17D4B 70 D3 A5, EVEX_Vpshufd_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm3
# vpshufd zmm2{k3}{z},zmm3,0A5h
62 F17DCB 70 D3 A5, EVEX_Vpshufd_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm3
# pshufhw xmm1,xmm5,0A5h
F3 0F70 CD A5, Pshufhw_xmm_xmmm128_imm8, Legacy, SSE2, op0=w op1=r op2=r w=xmm1 r=xmm5
# pshufhw xmm1,[rax],0A5h
F3 0F70 08 A5, Pshufhw_xmm_xmmm128_imm8, Legacy, SSE2, op0=w op1=r op2=r w=xmm1 r=rax rm=ds:rax;Packed128_UInt16
# vpshufhw xmm2,xmm3,0A5h
C5FA 70 D3 A5, VEX_Vpshufhw_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm3
# vpshufhw xmm2,[rax],0A5h
C5FA 70 10 A5, VEX_Vpshufhw_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt16
# vpshufhw ymm2,ymm3,0A5h
C5FE 70 D3 A5, VEX_Vpshufhw_ymm_ymmm256_imm8, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm3
# vpshufhw ymm2,[rax],0A5h
C5FE 70 10 A5, VEX_Vpshufhw_ymm_ymmm256_imm8, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed256_UInt16
# vpshufhw xmm2,xmm19,0A5h
62 B17E08 70 D3 A5, EVEX_Vpshufhw_xmm_k1z_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm19
# vpshufhw xmm2,[rax+10h],0A5h
62 F17E08 70 50 01 A5, EVEX_Vpshufhw_xmm_k1z_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpshufhw xmm18{k3},xmm3,0A5h
62 E17E0B 70 D3 A5, EVEX_Vpshufhw_xmm_k1z_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm3
# vpshufhw xmm2{k3}{z},xmm3,0A5h
62 F17E8B 70 D3 A5, EVEX_Vpshufhw_xmm_k1z_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm3
# vpshufhw ymm2,ymm19,0A5h
62 B17E28 70 D3 A5, EVEX_Vpshufhw_ymm_k1z_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm19
# vpshufhw ymm2,[rax+20h],0A5h
62 F17E28 70 50 01 A5, EVEX_Vpshufhw_ymm_k1z_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpshufhw ymm18{k3},ymm3,0A5h
62 E17E2B 70 D3 A5, EVEX_Vpshufhw_ymm_k1z_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm3
# vpshufhw ymm2{k3}{z},ymm3,0A5h
62 F17EAB 70 D3 A5, EVEX_Vpshufhw_ymm_k1z_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm3
# vpshufhw zmm2,zmm19,0A5h
62 B17E48 70 D3 A5, EVEX_Vpshufhw_zmm_k1z_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm19
# vpshufhw zmm2,[rax+40h],0A5h
62 F17E48 70 50 01 A5, EVEX_Vpshufhw_zmm_k1z_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpshufhw zmm18{k3},zmm3,0A5h
62 E17E4B 70 D3 A5, EVEX_Vpshufhw_zmm_k1z_zmmm512_imm8, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm3
# vpshufhw zmm2{k3}{z},zmm3,0A5h
62 F17ECB 70 D3 A5, EVEX_Vpshufhw_zmm_k1z_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm3
# pshuflw xmm1,xmm5,0A5h
F2 0F70 CD A5, Pshuflw_xmm_xmmm128_imm8, Legacy, SSE2, op0=w op1=r op2=r w=xmm1 r=xmm5
# pshuflw xmm1,[rax],0A5h
F2 0F70 08 A5, Pshuflw_xmm_xmmm128_imm8, Legacy, SSE2, op0=w op1=r op2=r w=xmm1 r=rax rm=ds:rax;Packed128_UInt16
# vpshuflw xmm2,xmm3,0A5h
C5FB 70 D3 A5, VEX_Vpshuflw_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm3
# vpshuflw xmm2,[rax],0A5h
C5FB 70 10 A5, VEX_Vpshuflw_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt16
# vpshuflw ymm2,ymm3,0A5h
C5FF 70 D3 A5, VEX_Vpshuflw_ymm_ymmm256_imm8, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm3
# vpshuflw ymm2,[rax],0A5h
C5FF 70 10 A5, VEX_Vpshuflw_ymm_ymmm256_imm8, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed256_UInt16
# vpshuflw xmm2,xmm19,0A5h
62 B17F08 70 D3 A5, EVEX_Vpshuflw_xmm_k1z_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm19
# vpshuflw xmm2,[rax+10h],0A5h
62 F17F08 70 50 01 A5, EVEX_Vpshuflw_xmm_k1z_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpshuflw xmm18{k3},xmm3,0A5h
62 E17F0B 70 D3 A5, EVEX_Vpshuflw_xmm_k1z_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm3
# vpshuflw xmm2{k3}{z},xmm3,0A5h
62 F17F8B 70 D3 A5, EVEX_Vpshuflw_xmm_k1z_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm3
# vpshuflw ymm2,ymm19,0A5h
62 B17F28 70 D3 A5, EVEX_Vpshuflw_ymm_k1z_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm19
# vpshuflw ymm2,[rax+20h],0A5h
62 F17F28 70 50 01 A5, EVEX_Vpshuflw_ymm_k1z_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpshuflw ymm18{k3},ymm3,0A5h
62 E17F2B 70 D3 A5, EVEX_Vpshuflw_ymm_k1z_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm3
# vpshuflw ymm2{k3}{z},ymm3,0A5h
62 F17FAB 70 D3 A5, EVEX_Vpshuflw_ymm_k1z_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm3
# vpshuflw zmm2,zmm19,0A5h
62 B17F48 70 D3 A5, EVEX_Vpshuflw_zmm_k1z_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm19
# vpshuflw zmm2,[rax+40h],0A5h
62 F17F48 70 50 01 A5, EVEX_Vpshuflw_zmm_k1z_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpshuflw zmm18{k3},zmm3,0A5h
62 E17F4B 70 D3 A5, EVEX_Vpshuflw_zmm_k1z_zmmm512_imm8, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm3
# vpshuflw zmm2{k3}{z},zmm3,0A5h
62 F17FCB 70 D3 A5, EVEX_Vpshuflw_zmm_k1z_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm3
# psrlw mm5,0A5h
0F71 D5 A5, Psrlw_mm_imm8, Legacy, MMX, op0=rw op1=r rw=mm5
# psrlw xmm5,0A5h
66 0F71 D5 A5, Psrlw_xmm_imm8, Legacy, SSE2, op0=rw op1=r rw=xmm5
# vpsrlw xmm6,xmm5,0A5h
C5C9 71 D5 A5, VEX_Vpsrlw_xmm_xmm_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm6 r=xmm5
# vpsrlw ymm6,ymm5,0A5h
C5CD 71 D5 A5, VEX_Vpsrlw_ymm_ymm_imm8, VEX, AVX2, op0=w op1=r op2=r w=vmm6 r=ymm5
# vpsrlw xmm14,xmm21,0A5h
62 B10D08 71 D5 A5, EVEX_Vpsrlw_xmm_k1z_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm14 r=xmm21
# vpsrlw xmm6,[rax+10h],0A5h
62 F14D08 71 50 01 A5, EVEX_Vpsrlw_xmm_k1z_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpsrlw xmm6{k3},xmm5,0A5h
62 F14D0B 71 D5 A5, EVEX_Vpsrlw_xmm_k1z_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm6 r=xmm6 r=k3 r=xmm5
# vpsrlw xmm6{k3}{z},xmm13,0A5h
62 D14D8B 71 D5 A5, EVEX_Vpsrlw_xmm_k1z_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm6 r=k3 r=xmm13
# vpsrlw ymm14,ymm21,0A5h
62 B10D28 71 D5 A5, EVEX_Vpsrlw_ymm_k1z_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm14 r=ymm21
# vpsrlw ymm6,[rax+20h],0A5h
62 F14D28 71 50 01 A5, EVEX_Vpsrlw_ymm_k1z_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpsrlw ymm6{k3},ymm5,0A5h
62 F14D2B 71 D5 A5, EVEX_Vpsrlw_ymm_k1z_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm6 r=ymm6 r=k3 r=ymm5
# vpsrlw ymm6{k3}{z},ymm13,0A5h
62 D14DAB 71 D5 A5, EVEX_Vpsrlw_ymm_k1z_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm6 r=k3 r=ymm13
# vpsrlw zmm14,zmm21,0A5h
62 B10D48 71 D5 A5, EVEX_Vpsrlw_zmm_k1z_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm14 r=zmm21
# vpsrlw zmm6,[rax+40h],0A5h
62 F14D48 71 50 01 A5, EVEX_Vpsrlw_zmm_k1z_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpsrlw zmm6{k3},zmm5,0A5h
62 F14D4B 71 D5 A5, EVEX_Vpsrlw_zmm_k1z_zmmm512_imm8, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm6 r=zmm6 r=k3 r=zmm5
# vpsrlw zmm6{k3}{z},zmm13,0A5h
62 D14DCB 71 D5 A5, EVEX_Vpsrlw_zmm_k1z_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm6 r=k3 r=zmm13
# psraw mm5,0A5h
0F71 E5 A5, Psraw_mm_imm8, Legacy, MMX, op0=rw op1=r rw=mm5
# psraw xmm5,0A5h
66 0F71 E5 A5, Psraw_xmm_imm8, Legacy, SSE2, op0=rw op1=r rw=xmm5
# vpsraw xmm6,xmm5,0A5h
C5C9 71 E5 A5, VEX_Vpsraw_xmm_xmm_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm6 r=xmm5
# vpsraw ymm6,ymm5,0A5h
C5CD 71 E5 A5, VEX_Vpsraw_ymm_ymm_imm8, VEX, AVX2, op0=w op1=r op2=r w=vmm6 r=ymm5
# vpsraw xmm14,xmm21,0A5h
62 B10D08 71 E5 A5, EVEX_Vpsraw_xmm_k1z_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm14 r=xmm21
# vpsraw xmm6,[rax+10h],0A5h
62 F14D08 71 60 01 A5, EVEX_Vpsraw_xmm_k1z_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x10;Packed128_Int16
# vpsraw xmm6{k3},xmm5,0A5h
62 F14D0B 71 E5 A5, EVEX_Vpsraw_xmm_k1z_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm6 r=xmm6 r=k3 r=xmm5
# vpsraw xmm6{k3}{z},xmm13,0A5h
62 D14D8B 71 E5 A5, EVEX_Vpsraw_xmm_k1z_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm6 r=k3 r=xmm13
# vpsraw ymm14,ymm21,0A5h
62 B10D28 71 E5 A5, EVEX_Vpsraw_ymm_k1z_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm14 r=ymm21
# vpsraw ymm6,[rax+20h],0A5h
62 F14D28 71 60 01 A5, EVEX_Vpsraw_ymm_k1z_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x20;Packed256_Int16
# vpsraw ymm6{k3},ymm5,0A5h
62 F14D2B 71 E5 A5, EVEX_Vpsraw_ymm_k1z_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm6 r=ymm6 r=k3 r=ymm5
# vpsraw ymm6{k3}{z},ymm13,0A5h
62 D14DAB 71 E5 A5, EVEX_Vpsraw_ymm_k1z_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm6 r=k3 r=ymm13
# vpsraw zmm14,zmm21,0A5h
62 B10D48 71 E5 A5, EVEX_Vpsraw_zmm_k1z_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm14 r=zmm21
# vpsraw zmm6,[rax+40h],0A5h
62 F14D48 71 60 01 A5, EVEX_Vpsraw_zmm_k1z_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x40;Packed512_Int16
# vpsraw zmm6{k3},zmm5,0A5h
62 F14D4B 71 E5 A5, EVEX_Vpsraw_zmm_k1z_zmmm512_imm8, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm6 r=zmm6 r=k3 r=zmm5
# vpsraw zmm6{k3}{z},zmm13,0A5h
62 D14DCB 71 E5 A5, EVEX_Vpsraw_zmm_k1z_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm6 r=k3 r=zmm13
# psllw mm5,0A5h
0F71 F5 A5, Psllw_mm_imm8, Legacy, MMX, op0=rw op1=r rw=mm5
# psllw xmm5,0A5h
66 0F71 F5 A5, Psllw_xmm_imm8, Legacy, SSE2, op0=rw op1=r rw=xmm5
# vpsllw xmm6,xmm5,0A5h
C5C9 71 F5 A5, VEX_Vpsllw_xmm_xmm_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm6 r=xmm5
# vpsllw ymm6,ymm5,0A5h
C5CD 71 F5 A5, VEX_Vpsllw_ymm_ymm_imm8, VEX, AVX2, op0=w op1=r op2=r w=vmm6 r=ymm5
# vpsllw xmm14,xmm21,0A5h
62 B10D08 71 F5 A5, EVEX_Vpsllw_xmm_k1z_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm14 r=xmm21
# vpsllw xmm6,[rax+10h],0A5h
62 F14D08 71 70 01 A5, EVEX_Vpsllw_xmm_k1z_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpsllw xmm6{k3},xmm5,0A5h
62 F14D0B 71 F5 A5, EVEX_Vpsllw_xmm_k1z_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm6 r=xmm6 r=k3 r=xmm5
# vpsllw xmm6{k3}{z},xmm13,0A5h
62 D14D8B 71 F5 A5, EVEX_Vpsllw_xmm_k1z_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm6 r=k3 r=xmm13
# vpsllw ymm14,ymm21,0A5h
62 B10D28 71 F5 A5, EVEX_Vpsllw_ymm_k1z_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm14 r=ymm21
# vpsllw ymm6,[rax+20h],0A5h
62 F14D28 71 70 01 A5, EVEX_Vpsllw_ymm_k1z_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpsllw ymm6{k3},ymm5,0A5h
62 F14D2B 71 F5 A5, EVEX_Vpsllw_ymm_k1z_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm6 r=ymm6 r=k3 r=ymm5
# vpsllw ymm6{k3}{z},ymm13,0A5h
62 D14DAB 71 F5 A5, EVEX_Vpsllw_ymm_k1z_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm6 r=k3 r=ymm13
# vpsllw zmm14,zmm21,0A5h
62 B10D48 71 F5 A5, EVEX_Vpsllw_zmm_k1z_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm14 r=zmm21
# vpsllw zmm6,[rax+40h],0A5h
62 F14D48 71 70 01 A5, EVEX_Vpsllw_zmm_k1z_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpsllw zmm6{k3},zmm5,0A5h
62 F14D4B 71 F5 A5, EVEX_Vpsllw_zmm_k1z_zmmm512_imm8, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm6 r=zmm6 r=k3 r=zmm5
# vpsllw zmm6{k3}{z},zmm13,0A5h
62 D14DCB 71 F5 A5, EVEX_Vpsllw_zmm_k1z_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm6 r=k3 r=zmm13
# vprord xmm14,xmm21,0A5h
62 B10D08 72 C5 A5, EVEX_Vprord_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm14 r=xmm21
# vprord xmm6,[rax+10h],0A5h
62 F14D08 72 40 01 A5, EVEX_Vprord_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vprord xmm6{k3},xmm5,0A5h
62 F14D0B 72 C5 A5, EVEX_Vprord_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm6 r=xmm6 r=k3 r=xmm5
# vprord xmm6{k3}{z},xmm13,0A5h
62 D14D8B 72 C5 A5, EVEX_Vprord_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=xmm13
# vprord ymm14,ymm21,0A5h
62 B10D28 72 C5 A5, EVEX_Vprord_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm14 r=ymm21
# vprord ymm6,[rax+20h],0A5h
62 F14D28 72 40 01 A5, EVEX_Vprord_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vprord ymm6{k3},ymm5,0A5h
62 F14D2B 72 C5 A5, EVEX_Vprord_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm6 r=ymm6 r=k3 r=ymm5
# vprord ymm6{k3}{z},ymm13,0A5h
62 D14DAB 72 C5 A5, EVEX_Vprord_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=ymm13
# vprord zmm14,zmm21,0A5h
62 B10D48 72 C5 A5, EVEX_Vprord_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm14 r=zmm21
# vprord zmm6,[rax+40h],0A5h
62 F14D48 72 40 01 A5, EVEX_Vprord_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vprord zmm6{k3},zmm5,0A5h
62 F14D4B 72 C5 A5, EVEX_Vprord_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm6 r=zmm6 r=k3 r=zmm5
# vprord zmm6{k3}{z},zmm13,0A5h
62 D14DCB 72 C5 A5, EVEX_Vprord_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=zmm13
# vprorq xmm14,xmm21,0A5h
62 B18D08 72 C5 A5, EVEX_Vprorq_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm14 r=xmm21
# vprorq xmm6,[rax+10h],0A5h
62 F1CD08 72 40 01 A5, EVEX_Vprorq_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vprorq xmm6{k3},xmm5,0A5h
62 F1CD0B 72 C5 A5, EVEX_Vprorq_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm6 r=xmm6 r=k3 r=xmm5
# vprorq xmm6{k3}{z},xmm13,0A5h
62 D1CD8B 72 C5 A5, EVEX_Vprorq_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=xmm13
# vprorq ymm14,ymm21,0A5h
62 B18D28 72 C5 A5, EVEX_Vprorq_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm14 r=ymm21
# vprorq ymm6,[rax+20h],0A5h
62 F1CD28 72 40 01 A5, EVEX_Vprorq_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vprorq ymm6{k3},ymm5,0A5h
62 F1CD2B 72 C5 A5, EVEX_Vprorq_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm6 r=ymm6 r=k3 r=ymm5
# vprorq ymm6{k3}{z},ymm13,0A5h
62 D1CDAB 72 C5 A5, EVEX_Vprorq_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=ymm13
# vprorq zmm14,zmm21,0A5h
62 B18D48 72 C5 A5, EVEX_Vprorq_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm14 r=zmm21
# vprorq zmm6,[rax+40h],0A5h
62 F1CD48 72 40 01 A5, EVEX_Vprorq_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vprorq zmm6{k3},zmm5,0A5h
62 F1CD4B 72 C5 A5, EVEX_Vprorq_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm6 r=zmm6 r=k3 r=zmm5
# vprorq zmm6{k3}{z},zmm13,0A5h
62 D1CDCB 72 C5 A5, EVEX_Vprorq_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=zmm13
# vprold xmm14,xmm21,0A5h
62 B10D08 72 CD A5, EVEX_Vprold_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm14 r=xmm21
# vprold xmm6,[rax+10h],0A5h
62 F14D08 72 48 01 A5, EVEX_Vprold_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vprold xmm6{k3},xmm5,0A5h
62 F14D0B 72 CD A5, EVEX_Vprold_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm6 r=xmm6 r=k3 r=xmm5
# vprold xmm6{k3}{z},xmm13,0A5h
62 D14D8B 72 CD A5, EVEX_Vprold_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=xmm13
# vprold ymm14,ymm21,0A5h
62 B10D28 72 CD A5, EVEX_Vprold_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm14 r=ymm21
# vprold ymm6,[rax+20h],0A5h
62 F14D28 72 48 01 A5, EVEX_Vprold_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vprold ymm6{k3},ymm5,0A5h
62 F14D2B 72 CD A5, EVEX_Vprold_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm6 r=ymm6 r=k3 r=ymm5
# vprold ymm6{k3}{z},ymm13,0A5h
62 D14DAB 72 CD A5, EVEX_Vprold_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=ymm13
# vprold zmm14,zmm21,0A5h
62 B10D48 72 CD A5, EVEX_Vprold_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm14 r=zmm21
# vprold zmm6,[rax+40h],0A5h
62 F14D48 72 48 01 A5, EVEX_Vprold_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vprold zmm6{k3},zmm5,0A5h
62 F14D4B 72 CD A5, EVEX_Vprold_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm6 r=zmm6 r=k3 r=zmm5
# vprold zmm6{k3}{z},zmm13,0A5h
62 D14DCB 72 CD A5, EVEX_Vprold_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=zmm13
# vprolq xmm14,xmm21,0A5h
62 B18D08 72 CD A5, EVEX_Vprolq_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm14 r=xmm21
# vprolq xmm6,[rax+10h],0A5h
62 F1CD08 72 48 01 A5, EVEX_Vprolq_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vprolq xmm6{k3},xmm5,0A5h
62 F1CD0B 72 CD A5, EVEX_Vprolq_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm6 r=xmm6 r=k3 r=xmm5
# vprolq xmm6{k3}{z},xmm13,0A5h
62 D1CD8B 72 CD A5, EVEX_Vprolq_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=xmm13
# vprolq ymm14,ymm21,0A5h
62 B18D28 72 CD A5, EVEX_Vprolq_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm14 r=ymm21
# vprolq ymm6,[rax+20h],0A5h
62 F1CD28 72 48 01 A5, EVEX_Vprolq_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vprolq ymm6{k3},ymm5,0A5h
62 F1CD2B 72 CD A5, EVEX_Vprolq_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm6 r=ymm6 r=k3 r=ymm5
# vprolq ymm6{k3}{z},ymm13,0A5h
62 D1CDAB 72 CD A5, EVEX_Vprolq_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=ymm13
# vprolq zmm14,zmm21,0A5h
62 B18D48 72 CD A5, EVEX_Vprolq_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm14 r=zmm21
# vprolq zmm6,[rax+40h],0A5h
62 F1CD48 72 48 01 A5, EVEX_Vprolq_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vprolq zmm6{k3},zmm5,0A5h
62 F1CD4B 72 CD A5, EVEX_Vprolq_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm6 r=zmm6 r=k3 r=zmm5
# vprolq zmm6{k3}{z},zmm13,0A5h
62 D1CDCB 72 CD A5, EVEX_Vprolq_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=zmm13
# psrld mm5,0A5h
0F72 D5 A5, Psrld_mm_imm8, Legacy, MMX, op0=rw op1=r rw=mm5
# psrld xmm5,0A5h
66 0F72 D5 A5, Psrld_xmm_imm8, Legacy, SSE2, op0=rw op1=r rw=xmm5
# vpsrld xmm6,xmm5,0A5h
C5C9 72 D5 A5, VEX_Vpsrld_xmm_xmm_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm6 r=xmm5
# vpsrld ymm6,ymm5,0A5h
C5CD 72 D5 A5, VEX_Vpsrld_ymm_ymm_imm8, VEX, AVX2, op0=w op1=r op2=r w=vmm6 r=ymm5
# vpsrld xmm14,xmm21,0A5h
62 B10D08 72 D5 A5, EVEX_Vpsrld_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm14 r=xmm21
# vpsrld xmm6,[rax+10h],0A5h
62 F14D08 72 50 01 A5, EVEX_Vpsrld_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpsrld xmm6{k3},xmm5,0A5h
62 F14D0B 72 D5 A5, EVEX_Vpsrld_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm6 r=xmm6 r=k3 r=xmm5
# vpsrld xmm6{k3}{z},xmm13,0A5h
62 D14D8B 72 D5 A5, EVEX_Vpsrld_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=xmm13
# vpsrld ymm14,ymm21,0A5h
62 B10D28 72 D5 A5, EVEX_Vpsrld_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm14 r=ymm21
# vpsrld ymm6,[rax+20h],0A5h
62 F14D28 72 50 01 A5, EVEX_Vpsrld_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpsrld ymm6{k3},ymm5,0A5h
62 F14D2B 72 D5 A5, EVEX_Vpsrld_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm6 r=ymm6 r=k3 r=ymm5
# vpsrld ymm6{k3}{z},ymm13,0A5h
62 D14DAB 72 D5 A5, EVEX_Vpsrld_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=ymm13
# vpsrld zmm14,zmm21,0A5h
62 B10D48 72 D5 A5, EVEX_Vpsrld_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm14 r=zmm21
# vpsrld zmm6,[rax+40h],0A5h
62 F14D48 72 50 01 A5, EVEX_Vpsrld_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpsrld zmm6{k3},zmm5,0A5h
62 F14D4B 72 D5 A5, EVEX_Vpsrld_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm6 r=zmm6 r=k3 r=zmm5
# vpsrld zmm6{k3}{z},zmm13,0A5h
62 D14DCB 72 D5 A5, EVEX_Vpsrld_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=zmm13
# psrad mm5,0A5h
0F72 E5 A5, Psrad_mm_imm8, Legacy, MMX, op0=rw op1=r rw=mm5
# psrad xmm5,0A5h
66 0F72 E5 A5, Psrad_xmm_imm8, Legacy, SSE2, op0=rw op1=r rw=xmm5
# vpsrad xmm6,xmm5,0A5h
C5C9 72 E5 A5, VEX_Vpsrad_xmm_xmm_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm6 r=xmm5
# vpsrad ymm6,ymm5,0A5h
C5CD 72 E5 A5, VEX_Vpsrad_ymm_ymm_imm8, VEX, AVX2, op0=w op1=r op2=r w=vmm6 r=ymm5
# vpsrad xmm14,xmm21,0A5h
62 B10D08 72 E5 A5, EVEX_Vpsrad_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm14 r=xmm21
# vpsrad xmm6,[rax+10h],0A5h
62 F14D08 72 60 01 A5, EVEX_Vpsrad_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x10;Packed128_Int32
# vpsrad xmm6{k3},xmm5,0A5h
62 F14D0B 72 E5 A5, EVEX_Vpsrad_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm6 r=xmm6 r=k3 r=xmm5
# vpsrad xmm6{k3}{z},xmm13,0A5h
62 D14D8B 72 E5 A5, EVEX_Vpsrad_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=xmm13
# vpsrad ymm14,ymm21,0A5h
62 B10D28 72 E5 A5, EVEX_Vpsrad_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm14 r=ymm21
# vpsrad ymm6,[rax+20h],0A5h
62 F14D28 72 60 01 A5, EVEX_Vpsrad_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x20;Packed256_Int32
# vpsrad ymm6{k3},ymm5,0A5h
62 F14D2B 72 E5 A5, EVEX_Vpsrad_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm6 r=ymm6 r=k3 r=ymm5
# vpsrad ymm6{k3}{z},ymm13,0A5h
62 D14DAB 72 E5 A5, EVEX_Vpsrad_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=ymm13
# vpsrad zmm14,zmm21,0A5h
62 B10D48 72 E5 A5, EVEX_Vpsrad_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm14 r=zmm21
# vpsrad zmm6,[rax+40h],0A5h
62 F14D48 72 60 01 A5, EVEX_Vpsrad_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x40;Packed512_Int32
# vpsrad zmm6{k3},zmm5,0A5h
62 F14D4B 72 E5 A5, EVEX_Vpsrad_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm6 r=zmm6 r=k3 r=zmm5
# vpsrad zmm6{k3}{z},zmm13,0A5h
62 D14DCB 72 E5 A5, EVEX_Vpsrad_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=zmm13
# vpsraq xmm14,xmm21,0A5h
62 B18D08 72 E5 A5, EVEX_Vpsraq_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm14 r=xmm21
# vpsraq xmm6,[rax+10h],0A5h
62 F1CD08 72 60 01 A5, EVEX_Vpsraq_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x10;Packed128_Int64
# vpsraq xmm6{k3},xmm5,0A5h
62 F1CD0B 72 E5 A5, EVEX_Vpsraq_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm6 r=xmm6 r=k3 r=xmm5
# vpsraq xmm6{k3}{z},xmm13,0A5h
62 D1CD8B 72 E5 A5, EVEX_Vpsraq_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=xmm13
# vpsraq ymm14,ymm21,0A5h
62 B18D28 72 E5 A5, EVEX_Vpsraq_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm14 r=ymm21
# vpsraq ymm6,[rax+20h],0A5h
62 F1CD28 72 60 01 A5, EVEX_Vpsraq_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x20;Packed256_Int64
# vpsraq ymm6{k3},ymm5,0A5h
62 F1CD2B 72 E5 A5, EVEX_Vpsraq_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm6 r=ymm6 r=k3 r=ymm5
# vpsraq ymm6{k3}{z},ymm13,0A5h
62 D1CDAB 72 E5 A5, EVEX_Vpsraq_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=ymm13
# vpsraq zmm14,zmm21,0A5h
62 B18D48 72 E5 A5, EVEX_Vpsraq_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm14 r=zmm21
# vpsraq zmm6,[rax+40h],0A5h
62 F1CD48 72 60 01 A5, EVEX_Vpsraq_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x40;Packed512_Int64
# vpsraq zmm6{k3},zmm5,0A5h
62 F1CD4B 72 E5 A5, EVEX_Vpsraq_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm6 r=zmm6 r=k3 r=zmm5
# vpsraq zmm6{k3}{z},zmm13,0A5h
62 D1CDCB 72 E5 A5, EVEX_Vpsraq_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=zmm13
# pslld mm5,0A5h
0F72 F5 A5, Pslld_mm_imm8, Legacy, MMX, op0=rw op1=r rw=mm5
# pslld xmm5,0A5h
66 0F72 F5 A5, Pslld_xmm_imm8, Legacy, SSE2, op0=rw op1=r rw=xmm5
# vpslld xmm6,xmm5,0A5h
C5C9 72 F5 A5, VEX_Vpslld_xmm_xmm_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm6 r=xmm5
# vpslld ymm6,ymm5,0A5h
C5CD 72 F5 A5, VEX_Vpslld_ymm_ymm_imm8, VEX, AVX2, op0=w op1=r op2=r w=vmm6 r=ymm5
# vpslld xmm14,xmm21,0A5h
62 B10D08 72 F5 A5, EVEX_Vpslld_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm14 r=xmm21
# vpslld xmm6,[rax+10h],0A5h
62 F14D08 72 70 01 A5, EVEX_Vpslld_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpslld xmm6{k3},xmm5,0A5h
62 F14D0B 72 F5 A5, EVEX_Vpslld_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm6 r=xmm6 r=k3 r=xmm5
# vpslld xmm6{k3}{z},xmm13,0A5h
62 D14D8B 72 F5 A5, EVEX_Vpslld_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=xmm13
# vpslld ymm14,ymm21,0A5h
62 B10D28 72 F5 A5, EVEX_Vpslld_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm14 r=ymm21
# vpslld ymm6,[rax+20h],0A5h
62 F14D28 72 70 01 A5, EVEX_Vpslld_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpslld ymm6{k3},ymm5,0A5h
62 F14D2B 72 F5 A5, EVEX_Vpslld_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm6 r=ymm6 r=k3 r=ymm5
# vpslld ymm6{k3}{z},ymm13,0A5h
62 D14DAB 72 F5 A5, EVEX_Vpslld_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=ymm13
# vpslld zmm14,zmm21,0A5h
62 B10D48 72 F5 A5, EVEX_Vpslld_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm14 r=zmm21
# vpslld zmm6,[rax+40h],0A5h
62 F14D48 72 70 01 A5, EVEX_Vpslld_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpslld zmm6{k3},zmm5,0A5h
62 F14D4B 72 F5 A5, EVEX_Vpslld_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm6 r=zmm6 r=k3 r=zmm5
# vpslld zmm6{k3}{z},zmm13,0A5h
62 D14DCB 72 F5 A5, EVEX_Vpslld_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=zmm13
# psrlq mm5,0A5h
0F73 D5 A5, Psrlq_mm_imm8, Legacy, MMX, op0=rw op1=r rw=mm5
# psrlq xmm5,0A5h
66 0F73 D5 A5, Psrlq_xmm_imm8, Legacy, SSE2, op0=rw op1=r rw=xmm5
# vpsrlq xmm6,xmm5,0A5h
C5C9 73 D5 A5, VEX_Vpsrlq_xmm_xmm_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm6 r=xmm5
# vpsrlq ymm6,ymm5,0A5h
C5CD 73 D5 A5, VEX_Vpsrlq_ymm_ymm_imm8, VEX, AVX2, op0=w op1=r op2=r w=vmm6 r=ymm5
# vpsrlq xmm14,xmm21,0A5h
62 B18D08 73 D5 A5, EVEX_Vpsrlq_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm14 r=xmm21
# vpsrlq xmm6,[rax+10h],0A5h
62 F1CD08 73 50 01 A5, EVEX_Vpsrlq_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpsrlq xmm6{k3},xmm5,0A5h
62 F1CD0B 73 D5 A5, EVEX_Vpsrlq_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm6 r=xmm6 r=k3 r=xmm5
# vpsrlq xmm6{k3}{z},xmm13,0A5h
62 D1CD8B 73 D5 A5, EVEX_Vpsrlq_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=xmm13
# vpsrlq ymm14,ymm21,0A5h
62 B18D28 73 D5 A5, EVEX_Vpsrlq_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm14 r=ymm21
# vpsrlq ymm6,[rax+20h],0A5h
62 F1CD28 73 50 01 A5, EVEX_Vpsrlq_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpsrlq ymm6{k3},ymm5,0A5h
62 F1CD2B 73 D5 A5, EVEX_Vpsrlq_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm6 r=ymm6 r=k3 r=ymm5
# vpsrlq ymm6{k3}{z},ymm13,0A5h
62 D1CDAB 73 D5 A5, EVEX_Vpsrlq_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=ymm13
# vpsrlq zmm14,zmm21,0A5h
62 B18D48 73 D5 A5, EVEX_Vpsrlq_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm14 r=zmm21
# vpsrlq zmm6,[rax+40h],0A5h
62 F1CD48 73 50 01 A5, EVEX_Vpsrlq_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpsrlq zmm6{k3},zmm5,0A5h
62 F1CD4B 73 D5 A5, EVEX_Vpsrlq_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm6 r=zmm6 r=k3 r=zmm5
# vpsrlq zmm6{k3}{z},zmm13,0A5h
62 D1CDCB 73 D5 A5, EVEX_Vpsrlq_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=zmm13
# psrldq xmm5,0A5h
66 0F73 DD A5, Psrldq_xmm_imm8, Legacy, SSE2, op0=rw op1=r rw=xmm5
# vpsrldq xmm6,xmm5,0A5h
C5C9 73 DD A5, VEX_Vpsrldq_xmm_xmm_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm6 r=xmm5
# vpsrldq ymm6,ymm5,0A5h
C5CD 73 DD A5, VEX_Vpsrldq_ymm_ymm_imm8, VEX, AVX2, op0=w op1=r op2=r w=vmm6 r=ymm5
# vpsrldq xmm6,xmm5,0A5h
62 F14D08 73 DD A5, EVEX_Vpsrldq_xmm_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm6 r=xmm5
# vpsrldq xmm6,[rax+10h],0A5h
62 F14D08 73 58 01 A5, EVEX_Vpsrldq_xmm_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x10;UInt128
# vpsrldq ymm6,ymm5,0A5h
62 F14D28 73 DD A5, EVEX_Vpsrldq_ymm_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm6 r=ymm5
# vpsrldq ymm6,[rax+20h],0A5h
62 F14D28 73 58 01 A5, EVEX_Vpsrldq_ymm_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x20;Packed256_UInt128
# vpsrldq zmm6,zmm5,0A5h
62 F14D48 73 DD A5, EVEX_Vpsrldq_zmm_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm6 r=zmm5
# vpsrldq zmm6,[rax+40h],0A5h
62 F14D48 73 58 01 A5, EVEX_Vpsrldq_zmm_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x40;Packed512_UInt128
# psllq mm5,0A5h
0F73 F5 A5, Psllq_mm_imm8, Legacy, MMX, op0=rw op1=r rw=mm5
# psllq xmm5,0A5h
66 0F73 F5 A5, Psllq_xmm_imm8, Legacy, SSE2, op0=rw op1=r rw=xmm5
# vpsllq xmm6,xmm5,0A5h
C5C9 73 F5 A5, VEX_Vpsllq_xmm_xmm_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm6 r=xmm5
# vpsllq ymm6,ymm5,0A5h
C5CD 73 F5 A5, VEX_Vpsllq_ymm_ymm_imm8, VEX, AVX2, op0=w op1=r op2=r w=vmm6 r=ymm5
# vpsllq xmm14,xmm21,0A5h
62 B18D08 73 F5 A5, EVEX_Vpsllq_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm14 r=xmm21
# vpsllq xmm6,[rax+10h],0A5h
62 F1CD08 73 70 01 A5, EVEX_Vpsllq_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpsllq xmm6{k3},xmm5,0A5h
62 F1CD0B 73 F5 A5, EVEX_Vpsllq_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm6 r=xmm6 r=k3 r=xmm5
# vpsllq xmm6{k3}{z},xmm13,0A5h
62 D1CD8B 73 F5 A5, EVEX_Vpsllq_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=xmm13
# vpsllq ymm14,ymm21,0A5h
62 B18D28 73 F5 A5, EVEX_Vpsllq_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm14 r=ymm21
# vpsllq ymm6,[rax+20h],0A5h
62 F1CD28 73 70 01 A5, EVEX_Vpsllq_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpsllq ymm6{k3},ymm5,0A5h
62 F1CD2B 73 F5 A5, EVEX_Vpsllq_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm6 r=ymm6 r=k3 r=ymm5
# vpsllq ymm6{k3}{z},ymm13,0A5h
62 D1CDAB 73 F5 A5, EVEX_Vpsllq_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=ymm13
# vpsllq zmm14,zmm21,0A5h
62 B18D48 73 F5 A5, EVEX_Vpsllq_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm14 r=zmm21
# vpsllq zmm6,[rax+40h],0A5h
62 F1CD48 73 70 01 A5, EVEX_Vpsllq_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpsllq zmm6{k3},zmm5,0A5h
62 F1CD4B 73 F5 A5, EVEX_Vpsllq_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm6 r=zmm6 r=k3 r=zmm5
# vpsllq zmm6{k3}{z},zmm13,0A5h
62 D1CDCB 73 F5 A5, EVEX_Vpsllq_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm6 r=k3 r=zmm13
# pslldq xmm5,0A5h
66 0F73 FD A5, Pslldq_xmm_imm8, Legacy, SSE2, op0=rw op1=r rw=xmm5
# vpslldq xmm6,xmm5,0A5h
C5C9 73 FD A5, VEX_Vpslldq_xmm_xmm_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm6 r=xmm5
# vpslldq ymm6,ymm5,0A5h
C5CD 73 FD A5, VEX_Vpslldq_ymm_ymm_imm8, VEX, AVX2, op0=w op1=r op2=r w=vmm6 r=ymm5
# vpslldq xmm6,xmm5,0A5h
62 F14D08 73 FD A5, EVEX_Vpslldq_xmm_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm6 r=xmm5
# vpslldq xmm6,[rax+10h],0A5h
62 F14D08 73 78 01 A5, EVEX_Vpslldq_xmm_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x10;UInt128
# vpslldq ymm6,ymm5,0A5h
62 F14D28 73 FD A5, EVEX_Vpslldq_ymm_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm6 r=ymm5
# vpslldq ymm6,[rax+20h],0A5h
62 F14D28 73 78 01 A5, EVEX_Vpslldq_ymm_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x20;Packed256_UInt128
# vpslldq zmm6,zmm5,0A5h
62 F14D48 73 FD A5, EVEX_Vpslldq_zmm_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm6 r=zmm5
# vpslldq zmm6,[rax+40h],0A5h
62 F14D48 73 78 01 A5, EVEX_Vpslldq_zmm_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm6 r=rax rm=ds:rax+0x40;Packed512_UInt128
# pcmpeqb mm1,mm5
0F74 CD, Pcmpeqb_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# pcmpeqb mm1,[rax]
0F74 08, Pcmpeqb_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt8
# pcmpeqb xmm1,xmm5
66 0F74 CD, Pcmpeqb_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# pcmpeqb xmm1,[rax]
66 0F74 08, Pcmpeqb_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt8
# vpcmpeqb xmm2,xmm6,xmm3
C5C9 74 D3, VEX_Vpcmpeqb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpcmpeqb xmm2,xmm6,[rax]
C5C9 74 10, VEX_Vpcmpeqb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt8
# vpcmpeqb ymm2,ymm6,ymm3
C5CD 74 D3, VEX_Vpcmpeqb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpcmpeqb ymm2,ymm6,[rax]
C5CD 74 10, VEX_Vpcmpeqb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt8
# vpcmpeqb k2,xmm6,[rax+10h]
62 F14D08 74 50 01, EVEX_Vpcmpeqb_kr_k1_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vpcmpeqb k2{k3},xmm6,xmm3
62 F14D0B 74 D3, EVEX_Vpcmpeqb_kr_k1_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=k3 r=xmm6 r=xmm3
# vpcmpeqb k2,ymm6,[rax+20h]
62 F14D28 74 50 01, EVEX_Vpcmpeqb_kr_k1_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vpcmpeqb k2{k3},ymm6,ymm3
62 F14D2B 74 D3, EVEX_Vpcmpeqb_kr_k1_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=k3 r=ymm6 r=ymm3
# vpcmpeqb k2,zmm6,[rax+40h]
62 F14D48 74 50 01, EVEX_Vpcmpeqb_kr_k1_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vpcmpeqb k2{k3},zmm6,zmm3
62 F14D4B 74 D3, EVEX_Vpcmpeqb_kr_k1_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k3 r=zmm6 r=zmm3
# pcmpeqw mm1,mm5
0F75 CD, Pcmpeqw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# pcmpeqw mm1,[rax]
0F75 08, Pcmpeqw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt16
# pcmpeqw xmm1,xmm5
66 0F75 CD, Pcmpeqw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# pcmpeqw xmm1,[rax]
66 0F75 08, Pcmpeqw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt16
# vpcmpeqw xmm2,xmm6,xmm3
C5C9 75 D3, VEX_Vpcmpeqw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpcmpeqw xmm2,xmm6,[rax]
C5C9 75 10, VEX_Vpcmpeqw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt16
# vpcmpeqw ymm2,ymm6,ymm3
C5CD 75 D3, VEX_Vpcmpeqw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpcmpeqw ymm2,ymm6,[rax]
C5CD 75 10, VEX_Vpcmpeqw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt16
# vpcmpeqw k2,xmm6,[rax+10h]
62 F14D08 75 50 01, EVEX_Vpcmpeqw_kr_k1_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpcmpeqw k2{k3},xmm6,xmm3
62 F14D0B 75 D3, EVEX_Vpcmpeqw_kr_k1_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=k3 r=xmm6 r=xmm3
# vpcmpeqw k2,ymm6,[rax+20h]
62 F14D28 75 50 01, EVEX_Vpcmpeqw_kr_k1_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpcmpeqw k2{k3},ymm6,ymm3
62 F14D2B 75 D3, EVEX_Vpcmpeqw_kr_k1_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=k3 r=ymm6 r=ymm3
# vpcmpeqw k2,zmm6,[rax+40h]
62 F14D48 75 50 01, EVEX_Vpcmpeqw_kr_k1_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpcmpeqw k2{k3},zmm6,zmm3
62 F14D4B 75 D3, EVEX_Vpcmpeqw_kr_k1_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k3 r=zmm6 r=zmm3
# pcmpeqd mm1,mm5
0F76 CD, Pcmpeqd_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# pcmpeqd mm1,[rax]
0F76 08, Pcmpeqd_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt32
# pcmpeqd xmm1,xmm5
66 0F76 CD, Pcmpeqd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# pcmpeqd xmm1,[rax]
66 0F76 08, Pcmpeqd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt32
# vpcmpeqd xmm2,xmm6,xmm3
C5C9 76 D3, VEX_Vpcmpeqd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpcmpeqd xmm2,xmm6,[rax]
C5C9 76 10, VEX_Vpcmpeqd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt32
# vpcmpeqd ymm2,ymm6,ymm3
C5CD 76 D3, VEX_Vpcmpeqd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpcmpeqd ymm2,ymm6,[rax]
C5CD 76 10, VEX_Vpcmpeqd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt32
# vpcmpeqd k2,xmm6,[rax+10h]
62 F14D08 76 50 01, EVEX_Vpcmpeqd_kr_k1_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpcmpeqd k2{k3},xmm6,xmm3
62 F14D0B 76 D3, EVEX_Vpcmpeqd_kr_k1_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=k3 r=xmm6 r=xmm3
# vpcmpeqd k2,ymm6,[rax+20h]
62 F14D28 76 50 01, EVEX_Vpcmpeqd_kr_k1_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpcmpeqd k2{k3},ymm6,ymm3
62 F14D2B 76 D3, EVEX_Vpcmpeqd_kr_k1_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=k3 r=ymm6 r=ymm3
# vpcmpeqd k2,zmm6,[rax+40h]
62 F14D48 76 50 01, EVEX_Vpcmpeqd_kr_k1_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpcmpeqd k2{k3},zmm6,zmm3
62 F14D4B 76 D3, EVEX_Vpcmpeqd_kr_k1_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=k2 r=k3 r=zmm6 r=zmm3
# emms
0F77, Emms, Legacy, MMX,
# vzeroupper
C5F8 77, VEX_Vzeroupper, VEX, AVX, r=xmm0-xmm15 w=vmm0-vmm15
# vzeroall
C5FC 77, VEX_Vzeroall, VEX, AVX, w=vmm0-vmm15
# vmread rsi,rcx
0F78 CE, Vmread_rm64_r64, Legacy, VMX, fw=cz fc=aops priv op0=w op1=r w=rsi r=rcx
# vmread qword ptr [rax],rbx
0F78 18, Vmread_rm64_r64, Legacy, VMX, fw=cz fc=aops priv op0=w op1=r r=rax r=rbx wm=ds:rax;UInt64
# vmwrite rcx,rsi
0F79 CE, Vmwrite_r64_rm64, Legacy, VMX, fw=cz fc=aops priv op0=r op1=r r=rcx r=rsi
# vmwrite rbx,qword ptr [rax]
0F79 18, Vmwrite_r64_rm64, Legacy, VMX, fw=cz fc=aops priv op0=r op1=r r=rbx r=rax rm=ds:rax;UInt64
# vcvttps2udq xmm2,xmmword ptr [rax+10h]
62 F17C08 78 50 01, EVEX_Vcvttps2udq_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float32
# vcvttps2udq xmm2{k3},xmm3
62 F17C0B 78 D3, EVEX_Vcvttps2udq_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvttps2udq xmm2{k3}{z},xmm3
62 F17C8B 78 D3, EVEX_Vcvttps2udq_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvttps2udq ymm2,ymmword ptr [rax+20h]
62 F17C28 78 50 01, EVEX_Vcvttps2udq_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float32
# vcvttps2udq ymm2{k3},ymm3
62 F17C2B 78 D3, EVEX_Vcvttps2udq_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vcvttps2udq ymm2{k3}{z},ymm3
62 F17CAB 78 D3, EVEX_Vcvttps2udq_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvttps2udq zmm2,zmmword ptr [rax+40h]
62 F17C48 78 50 01, EVEX_Vcvttps2udq_zmm_k1z_zmmm512b32_sae, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float32
# vcvttps2udq zmm2{k3},zmm3
62 F17C4B 78 D3, EVEX_Vcvttps2udq_zmm_k1z_zmmm512b32_sae, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vcvttps2udq zmm2{k3}{z},zmm3 {sae}
62 F17C9B 78 D3, EVEX_Vcvttps2udq_zmm_k1z_zmmm512b32_sae, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vcvttpd2udq xmm2,xmmword ptr [rax+10h]
62 F1FC08 78 50 01, EVEX_Vcvttpd2udq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float64
# vcvttpd2udq xmm2{k3},xmm3
62 F1FC0B 78 D3, EVEX_Vcvttpd2udq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvttpd2udq xmm2{k3}{z},xmm3
62 F1FC8B 78 D3, EVEX_Vcvttpd2udq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvttpd2udq xmm2,ymmword ptr [rax+20h]
62 F1FC28 78 50 01, EVEX_Vcvttpd2udq_xmm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float64
# vcvttpd2udq xmm2{k3},ymm3
62 F1FC2B 78 D3, EVEX_Vcvttpd2udq_xmm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=ymm3
# vcvttpd2udq xmm2{k3}{z},ymm3
62 F1FCAB 78 D3, EVEX_Vcvttpd2udq_xmm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvttpd2udq ymm2,zmmword ptr [rax+40h]
62 F1FC48 78 50 01, EVEX_Vcvttpd2udq_ymm_k1z_zmmm512b64_sae, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float64
# vcvttpd2udq ymm2{k3},zmm3
62 F1FC4B 78 D3, EVEX_Vcvttpd2udq_ymm_k1z_zmmm512b64_sae, EVEX, AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=zmm3
# vcvttpd2udq ymm2{k3}{z},zmm3 {sae}
62 F1FC9B 78 D3, EVEX_Vcvttpd2udq_ymm_k1z_zmmm512b64_sae, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vcvttps2uqq xmm2,qword ptr [rax+8]
62 F17D08 78 50 01, EVEX_Vcvttps2uqq_xmm_k1z_xmmm64b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed64_Float32
# vcvttps2uqq xmm2{k3},xmm3
62 F17D0B 78 D3, EVEX_Vcvttps2uqq_xmm_k1z_xmmm64b32, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvttps2uqq xmm2{k3}{z},xmm3
62 F17D8B 78 D3, EVEX_Vcvttps2uqq_xmm_k1z_xmmm64b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvttps2uqq ymm2,xmmword ptr [rax+10h]
62 F17D28 78 50 01, EVEX_Vcvttps2uqq_ymm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float32
# vcvttps2uqq ymm2{k3},xmm3
62 F17D2B 78 D3, EVEX_Vcvttps2uqq_ymm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vcvttps2uqq ymm2{k3}{z},xmm3
62 F17DAB 78 D3, EVEX_Vcvttps2uqq_ymm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvttps2uqq zmm2,ymmword ptr [rax+20h]
62 F17D48 78 50 01, EVEX_Vcvttps2uqq_zmm_k1z_ymmm256b32_sae, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float32
# vcvttps2uqq zmm2{k3},ymm3
62 F17D4B 78 D3, EVEX_Vcvttps2uqq_zmm_k1z_ymmm256b32_sae, EVEX, AVX512DQ, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=ymm3
# vcvttps2uqq zmm2{k3}{z},ymm3 {sae}
62 F17D9B 78 D3, EVEX_Vcvttps2uqq_zmm_k1z_ymmm256b32_sae, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvttpd2uqq xmm2,[rax+10h]
62 F1FD08 78 50 01, EVEX_Vcvttpd2uqq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float64
# vcvttpd2uqq xmm2{k3},xmm3
62 F1FD0B 78 D3, EVEX_Vcvttpd2uqq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvttpd2uqq xmm2{k3}{z},xmm3
62 F1FD8B 78 D3, EVEX_Vcvttpd2uqq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvttpd2uqq ymm2,[rax+20h]
62 F1FD28 78 50 01, EVEX_Vcvttpd2uqq_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float64
# vcvttpd2uqq ymm2{k3},ymm3
62 F1FD2B 78 D3, EVEX_Vcvttpd2uqq_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vcvttpd2uqq ymm2{k3}{z},ymm3
62 F1FDAB 78 D3, EVEX_Vcvttpd2uqq_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvttpd2uqq zmm2,[rax+40h]
62 F1FD48 78 50 01, EVEX_Vcvttpd2uqq_zmm_k1z_zmmm512b64_sae, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float64
# vcvttpd2uqq zmm2{k3},zmm3
62 F1FD4B 78 D3, EVEX_Vcvttpd2uqq_zmm_k1z_zmmm512b64_sae, EVEX, AVX512DQ, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vcvttpd2uqq zmm2{k3}{z},zmm3 {sae}
62 F1FD9B 78 D3, EVEX_Vcvttpd2uqq_zmm_k1z_zmmm512b64_sae, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vcvttss2usi edx,xmm3
62 F17E08 78 D3, EVEX_Vcvttss2usi_r32_xmmm32_sae, EVEX, AVX512F, op0=w op1=r w=rdx r=xmm3
# vcvttss2usi edx,dword ptr [rax+4]
62 F17E08 78 50 01, EVEX_Vcvttss2usi_r32_xmmm32_sae, EVEX, AVX512F, op0=w op1=r w=rdx r=rax rm=ds:rax+4;Float32
# vcvttss2usi rdx,xmm3
62 F1FE08 78 D3, EVEX_Vcvttss2usi_r64_xmmm32_sae, EVEX, AVX512F, op0=w op1=r w=rdx r=xmm3
# vcvttss2usi rdx,dword ptr [rax+4]
62 F1FE08 78 50 01, EVEX_Vcvttss2usi_r64_xmmm32_sae, EVEX, AVX512F, op0=w op1=r w=rdx r=rax rm=ds:rax+4;Float32
# vcvttsd2usi edx,xmm3
62 F17F08 78 D3, EVEX_Vcvttsd2usi_r32_xmmm64_sae, EVEX, AVX512F, op0=w op1=r w=rdx r=xmm3
# vcvttsd2usi edx,qword ptr [rax+8]
62 F17F08 78 50 01, EVEX_Vcvttsd2usi_r32_xmmm64_sae, EVEX, AVX512F, op0=w op1=r w=rdx r=rax rm=ds:rax+8;Float64
# vcvttsd2usi rdx,xmm3
62 F1FF08 78 D3, EVEX_Vcvttsd2usi_r64_xmmm64_sae, EVEX, AVX512F, op0=w op1=r w=rdx r=xmm3
# vcvttsd2usi rdx,qword ptr [rax+8]
62 F1FF08 78 50 01, EVEX_Vcvttsd2usi_r64_xmmm64_sae, EVEX, AVX512F, op0=w op1=r w=rdx r=rax rm=ds:rax+8;Float64
# vcvtps2udq xmm2,xmmword ptr [rax+10h]
62 F17C08 79 50 01, EVEX_Vcvtps2udq_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float32
# vcvtps2udq xmm2{k3},xmm3
62 F17C0B 79 D3, EVEX_Vcvtps2udq_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvtps2udq xmm2{k3}{z},xmm3
62 F17C8B 79 D3, EVEX_Vcvtps2udq_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtps2udq ymm2,ymmword ptr [rax+20h]
62 F17C28 79 50 01, EVEX_Vcvtps2udq_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float32
# vcvtps2udq ymm2{k3},ymm3
62 F17C2B 79 D3, EVEX_Vcvtps2udq_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vcvtps2udq ymm2{k3}{z},ymm3
62 F17CAB 79 D3, EVEX_Vcvtps2udq_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvtps2udq zmm2,zmmword ptr [rax+40h]
62 F17C48 79 50 01, EVEX_Vcvtps2udq_zmm_k1z_zmmm512b32_er, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float32
# vcvtps2udq zmm2{k3},zmm3
62 F17C4B 79 D3, EVEX_Vcvtps2udq_zmm_k1z_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vcvtps2udq zmm2{k3}{z},zmm3 {rn-sae}
62 F17C9B 79 D3, EVEX_Vcvtps2udq_zmm_k1z_zmmm512b32_er, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vcvtpd2udq xmm2,xmmword ptr [rax+10h]
62 F1FC08 79 50 01, EVEX_Vcvtpd2udq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float64
# vcvtpd2udq xmm2{k3},xmm3
62 F1FC0B 79 D3, EVEX_Vcvtpd2udq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvtpd2udq xmm2{k3}{z},xmm3
62 F1FC8B 79 D3, EVEX_Vcvtpd2udq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtpd2udq xmm2,ymmword ptr [rax+20h]
62 F1FC28 79 50 01, EVEX_Vcvtpd2udq_xmm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float64
# vcvtpd2udq xmm2{k3},ymm3
62 F1FC2B 79 D3, EVEX_Vcvtpd2udq_xmm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=ymm3
# vcvtpd2udq xmm2{k3}{z},ymm3
62 F1FCAB 79 D3, EVEX_Vcvtpd2udq_xmm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvtpd2udq ymm2,zmmword ptr [rax+40h]
62 F1FC48 79 50 01, EVEX_Vcvtpd2udq_ymm_k1z_zmmm512b64_er, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float64
# vcvtpd2udq ymm2{k3},zmm3
62 F1FC4B 79 D3, EVEX_Vcvtpd2udq_ymm_k1z_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=zmm3
# vcvtpd2udq ymm2{k3}{z},zmm3 {rn-sae}
62 F1FC9B 79 D3, EVEX_Vcvtpd2udq_ymm_k1z_zmmm512b64_er, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vcvtps2uqq xmm2,qword ptr [rax+8]
62 F17D08 79 50 01, EVEX_Vcvtps2uqq_xmm_k1z_xmmm64b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed64_Float32
# vcvtps2uqq xmm2{k3},xmm3
62 F17D0B 79 D3, EVEX_Vcvtps2uqq_xmm_k1z_xmmm64b32, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvtps2uqq xmm2{k3}{z},xmm3
62 F17D8B 79 D3, EVEX_Vcvtps2uqq_xmm_k1z_xmmm64b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtps2uqq ymm2,xmmword ptr [rax+10h]
62 F17D28 79 50 01, EVEX_Vcvtps2uqq_ymm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float32
# vcvtps2uqq ymm2{k3},xmm3
62 F17D2B 79 D3, EVEX_Vcvtps2uqq_ymm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vcvtps2uqq ymm2{k3}{z},xmm3
62 F17DAB 79 D3, EVEX_Vcvtps2uqq_ymm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtps2uqq zmm2,ymmword ptr [rax+20h]
62 F17D48 79 50 01, EVEX_Vcvtps2uqq_zmm_k1z_ymmm256b32_er, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float32
# vcvtps2uqq zmm2{k3},ymm3
62 F17D4B 79 D3, EVEX_Vcvtps2uqq_zmm_k1z_ymmm256b32_er, EVEX, AVX512DQ, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=ymm3
# vcvtps2uqq zmm2{k3}{z},ymm3 {rn-sae}
62 F17D9B 79 D3, EVEX_Vcvtps2uqq_zmm_k1z_ymmm256b32_er, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvtpd2uqq xmm2,[rax+10h]
62 F1FD08 79 50 01, EVEX_Vcvtpd2uqq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float64
# vcvtpd2uqq xmm2{k3},xmm3
62 F1FD0B 79 D3, EVEX_Vcvtpd2uqq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvtpd2uqq xmm2{k3}{z},xmm3
62 F1FD8B 79 D3, EVEX_Vcvtpd2uqq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtpd2uqq ymm2,[rax+20h]
62 F1FD28 79 50 01, EVEX_Vcvtpd2uqq_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float64
# vcvtpd2uqq ymm2{k3},ymm3
62 F1FD2B 79 D3, EVEX_Vcvtpd2uqq_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vcvtpd2uqq ymm2{k3}{z},ymm3
62 F1FDAB 79 D3, EVEX_Vcvtpd2uqq_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvtpd2uqq zmm2,[rax+40h]
62 F1FD48 79 50 01, EVEX_Vcvtpd2uqq_zmm_k1z_zmmm512b64_er, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float64
# vcvtpd2uqq zmm2{k3},zmm3
62 F1FD4B 79 D3, EVEX_Vcvtpd2uqq_zmm_k1z_zmmm512b64_er, EVEX, AVX512DQ, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vcvtpd2uqq zmm2{k3}{z},zmm3 {rn-sae}
62 F1FD9B 79 D3, EVEX_Vcvtpd2uqq_zmm_k1z_zmmm512b64_er, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vcvtss2usi edx,xmm3
62 F17E08 79 D3, EVEX_Vcvtss2usi_r32_xmmm32_er, EVEX, AVX512F, op0=w op1=r w=rdx r=xmm3
# vcvtss2usi edx,dword ptr [rax+4]
62 F17E08 79 50 01, EVEX_Vcvtss2usi_r32_xmmm32_er, EVEX, AVX512F, op0=w op1=r w=rdx r=rax rm=ds:rax+4;Float32
# vcvtss2usi rdx,xmm3
62 F1FE08 79 D3, EVEX_Vcvtss2usi_r64_xmmm32_er, EVEX, AVX512F, op0=w op1=r w=rdx r=xmm3
# vcvtss2usi rdx,dword ptr [rax+4]
62 F1FE08 79 50 01, EVEX_Vcvtss2usi_r64_xmmm32_er, EVEX, AVX512F, op0=w op1=r w=rdx r=rax rm=ds:rax+4;Float32
# vcvtsd2usi edx,xmm3
62 F17F08 79 D3, EVEX_Vcvtsd2usi_r32_xmmm64_er, EVEX, AVX512F, op0=w op1=r w=rdx r=xmm3
# vcvtsd2usi edx,qword ptr [rax+8]
62 F17F08 79 50 01, EVEX_Vcvtsd2usi_r32_xmmm64_er, EVEX, AVX512F, op0=w op1=r w=rdx r=rax rm=ds:rax+8;Float64
# vcvtsd2usi rdx,xmm3
62 F1FF08 79 D3, EVEX_Vcvtsd2usi_r64_xmmm64_er, EVEX, AVX512F, op0=w op1=r w=rdx r=xmm3
# vcvtsd2usi rdx,qword ptr [rax+8]
62 F1FF08 79 50 01, EVEX_Vcvtsd2usi_r64_xmmm64_er, EVEX, AVX512F, op0=w op1=r w=rdx r=rax rm=ds:rax+8;Float64
# vcvttps2qq xmm2,qword ptr [rax+8]
62 F17D08 7A 50 01, EVEX_Vcvttps2qq_xmm_k1z_xmmm64b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed64_Float32
# vcvttps2qq xmm2{k3},xmm3
62 F17D0B 7A D3, EVEX_Vcvttps2qq_xmm_k1z_xmmm64b32, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvttps2qq xmm2{k3}{z},xmm3
62 F17D8B 7A D3, EVEX_Vcvttps2qq_xmm_k1z_xmmm64b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvttps2qq ymm2,xmmword ptr [rax+10h]
62 F17D28 7A 50 01, EVEX_Vcvttps2qq_ymm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float32
# vcvttps2qq ymm2{k3},xmm3
62 F17D2B 7A D3, EVEX_Vcvttps2qq_ymm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vcvttps2qq ymm2{k3}{z},xmm3
62 F17DAB 7A D3, EVEX_Vcvttps2qq_ymm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvttps2qq zmm2,ymmword ptr [rax+20h]
62 F17D48 7A 50 01, EVEX_Vcvttps2qq_zmm_k1z_ymmm256b32_sae, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float32
# vcvttps2qq zmm2{k3},ymm3
62 F17D4B 7A D3, EVEX_Vcvttps2qq_zmm_k1z_ymmm256b32_sae, EVEX, AVX512DQ, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=ymm3
# vcvttps2qq zmm2{k3}{z},ymm3 {sae}
62 F17D9B 7A D3, EVEX_Vcvttps2qq_zmm_k1z_ymmm256b32_sae, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvttpd2qq xmm2,[rax+10h]
62 F1FD08 7A 50 01, EVEX_Vcvttpd2qq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float64
# vcvttpd2qq xmm2{k3},xmm3
62 F1FD0B 7A D3, EVEX_Vcvttpd2qq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvttpd2qq xmm2{k3}{z},xmm3
62 F1FD8B 7A D3, EVEX_Vcvttpd2qq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvttpd2qq ymm2,[rax+20h]
62 F1FD28 7A 50 01, EVEX_Vcvttpd2qq_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float64
# vcvttpd2qq ymm2{k3},ymm3
62 F1FD2B 7A D3, EVEX_Vcvttpd2qq_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vcvttpd2qq ymm2{k3}{z},ymm3
62 F1FDAB 7A D3, EVEX_Vcvttpd2qq_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvttpd2qq zmm2,[rax+40h]
62 F1FD48 7A 50 01, EVEX_Vcvttpd2qq_zmm_k1z_zmmm512b64_sae, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float64
# vcvttpd2qq zmm2{k3},zmm3
62 F1FD4B 7A D3, EVEX_Vcvttpd2qq_zmm_k1z_zmmm512b64_sae, EVEX, AVX512DQ, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vcvttpd2qq zmm2{k3}{z},zmm3 {sae}
62 F1FD9B 7A D3, EVEX_Vcvttpd2qq_zmm_k1z_zmmm512b64_sae, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vcvtudq2pd xmm2,qword ptr [rax+8]
62 F17E08 7A 50 01, EVEX_Vcvtudq2pd_xmm_k1z_xmmm64b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed64_UInt32
# vcvtudq2pd xmm2{k3},xmm3
62 F17E0B 7A D3, EVEX_Vcvtudq2pd_xmm_k1z_xmmm64b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvtudq2pd xmm2{k3}{z},xmm3
62 F17E8B 7A D3, EVEX_Vcvtudq2pd_xmm_k1z_xmmm64b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtudq2pd ymm2,xmmword ptr [rax+10h]
62 F17E28 7A 50 01, EVEX_Vcvtudq2pd_ymm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vcvtudq2pd ymm2{k3},xmm3
62 F17E2B 7A D3, EVEX_Vcvtudq2pd_ymm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vcvtudq2pd ymm2{k3}{z},xmm3
62 F17EAB 7A D3, EVEX_Vcvtudq2pd_ymm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtudq2pd zmm2,ymmword ptr [rax+20h]
62 F17E48 7A 50 01, EVEX_Vcvtudq2pd_zmm_k1z_ymmm256b32_er, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vcvtudq2pd zmm2{k3},ymm3
62 F17E4B 7A D3, EVEX_Vcvtudq2pd_zmm_k1z_ymmm256b32_er, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=ymm3
# vcvtudq2pd zmm2{k3}{z},ymm3
62 F17ECB 7A D3, EVEX_Vcvtudq2pd_zmm_k1z_ymmm256b32_er, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvtuqq2pd xmm2,[rax+10h]
62 F1FE08 7A 50 01, EVEX_Vcvtuqq2pd_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vcvtuqq2pd xmm2{k3},xmm3
62 F1FE0B 7A D3, EVEX_Vcvtuqq2pd_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvtuqq2pd xmm2{k3}{z},xmm3
62 F1FE8B 7A D3, EVEX_Vcvtuqq2pd_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtuqq2pd ymm2,[rax+20h]
62 F1FE28 7A 50 01, EVEX_Vcvtuqq2pd_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vcvtuqq2pd ymm2{k3},ymm3
62 F1FE2B 7A D3, EVEX_Vcvtuqq2pd_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vcvtuqq2pd ymm2{k3}{z},ymm3
62 F1FEAB 7A D3, EVEX_Vcvtuqq2pd_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvtuqq2pd zmm2,[rax+40h]
62 F1FE48 7A 50 01, EVEX_Vcvtuqq2pd_zmm_k1z_zmmm512b64_er, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vcvtuqq2pd zmm2{k3},zmm3
62 F1FE4B 7A D3, EVEX_Vcvtuqq2pd_zmm_k1z_zmmm512b64_er, EVEX, AVX512DQ, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vcvtuqq2pd zmm2{k3}{z},zmm3 {rn-sae}
62 F1FE9B 7A D3, EVEX_Vcvtuqq2pd_zmm_k1z_zmmm512b64_er, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vcvtudq2ps xmm2,xmmword ptr [rax+10h]
62 F17F08 7A 50 01, EVEX_Vcvtudq2ps_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vcvtudq2ps xmm2{k3},xmm3
62 F17F0B 7A D3, EVEX_Vcvtudq2ps_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvtudq2ps xmm2{k3}{z},xmm3
62 F17F8B 7A D3, EVEX_Vcvtudq2ps_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtudq2ps ymm2,ymmword ptr [rax+20h]
62 F17F28 7A 50 01, EVEX_Vcvtudq2ps_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vcvtudq2ps ymm2{k3},ymm3
62 F17F2B 7A D3, EVEX_Vcvtudq2ps_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vcvtudq2ps ymm2{k3}{z},ymm3
62 F17FAB 7A D3, EVEX_Vcvtudq2ps_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvtudq2ps zmm2,zmmword ptr [rax+40h]
62 F17F48 7A 50 01, EVEX_Vcvtudq2ps_zmm_k1z_zmmm512b32_er, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vcvtudq2ps zmm2{k3},zmm3
62 F17F4B 7A D3, EVEX_Vcvtudq2ps_zmm_k1z_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vcvtudq2ps zmm2{k3}{z},zmm3 {rn-sae}
62 F17F9B 7A D3, EVEX_Vcvtudq2ps_zmm_k1z_zmmm512b32_er, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vcvtuqq2ps xmm2,xmmword ptr [rax+10h]
62 F1FF08 7A 50 01, EVEX_Vcvtuqq2ps_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vcvtuqq2ps xmm2{k3},xmm3
62 F1FF0B 7A D3, EVEX_Vcvtuqq2ps_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvtuqq2ps xmm2{k3}{z},xmm3
62 F1FF8B 7A D3, EVEX_Vcvtuqq2ps_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtuqq2ps xmm2,ymmword ptr [rax+20h]
62 F1FF28 7A 50 01, EVEX_Vcvtuqq2ps_xmm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vcvtuqq2ps xmm2{k3},ymm3
62 F1FF2B 7A D3, EVEX_Vcvtuqq2ps_xmm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=ymm3
# vcvtuqq2ps xmm2{k3}{z},ymm3
62 F1FFAB 7A D3, EVEX_Vcvtuqq2ps_xmm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvtuqq2ps ymm2,zmmword ptr [rax+40h]
62 F1FF48 7A 50 01, EVEX_Vcvtuqq2ps_ymm_k1z_zmmm512b64_er, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vcvtuqq2ps ymm2{k3},zmm3
62 F1FF4B 7A D3, EVEX_Vcvtuqq2ps_ymm_k1z_zmmm512b64_er, EVEX, AVX512DQ, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=zmm3
# vcvtuqq2ps ymm2{k3}{z},zmm3 {rn-sae}
62 F1FF9B 7A D3, EVEX_Vcvtuqq2ps_ymm_k1z_zmmm512b64_er, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vcvtps2qq xmm2,qword ptr [rax+8]
62 F17D08 7B 50 01, EVEX_Vcvtps2qq_xmm_k1z_xmmm64b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed64_Float32
# vcvtps2qq xmm2{k3},xmm3
62 F17D0B 7B D3, EVEX_Vcvtps2qq_xmm_k1z_xmmm64b32, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvtps2qq xmm2{k3}{z},xmm3
62 F17D8B 7B D3, EVEX_Vcvtps2qq_xmm_k1z_xmmm64b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtps2qq ymm2,xmmword ptr [rax+10h]
62 F17D28 7B 50 01, EVEX_Vcvtps2qq_ymm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float32
# vcvtps2qq ymm2{k3},xmm3
62 F17D2B 7B D3, EVEX_Vcvtps2qq_ymm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vcvtps2qq ymm2{k3}{z},xmm3
62 F17DAB 7B D3, EVEX_Vcvtps2qq_ymm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtps2qq zmm2,ymmword ptr [rax+20h]
62 F17D48 7B 50 01, EVEX_Vcvtps2qq_zmm_k1z_ymmm256b32_er, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float32
# vcvtps2qq zmm2{k3},ymm3
62 F17D4B 7B D3, EVEX_Vcvtps2qq_zmm_k1z_ymmm256b32_er, EVEX, AVX512DQ, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=ymm3
# vcvtps2qq zmm2{k3}{z},ymm3 {rn-sae}
62 F17D9B 7B D3, EVEX_Vcvtps2qq_zmm_k1z_ymmm256b32_er, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvtpd2qq xmm2,[rax+10h]
62 F1FD08 7B 50 01, EVEX_Vcvtpd2qq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float64
# vcvtpd2qq xmm2{k3},xmm3
62 F1FD0B 7B D3, EVEX_Vcvtpd2qq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvtpd2qq xmm2{k3}{z},xmm3
62 F1FD8B 7B D3, EVEX_Vcvtpd2qq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtpd2qq ymm2,[rax+20h]
62 F1FD28 7B 50 01, EVEX_Vcvtpd2qq_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float64
# vcvtpd2qq ymm2{k3},ymm3
62 F1FD2B 7B D3, EVEX_Vcvtpd2qq_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vcvtpd2qq ymm2{k3}{z},ymm3
62 F1FDAB 7B D3, EVEX_Vcvtpd2qq_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvtpd2qq zmm2,[rax+40h]
62 F1FD48 7B 50 01, EVEX_Vcvtpd2qq_zmm_k1z_zmmm512b64_er, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float64
# vcvtpd2qq zmm2{k3},zmm3
62 F1FD4B 7B D3, EVEX_Vcvtpd2qq_zmm_k1z_zmmm512b64_er, EVEX, AVX512DQ, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vcvtpd2qq zmm2{k3}{z},zmm3 {rn-sae}
62 F1FD9B 7B D3, EVEX_Vcvtpd2qq_zmm_k1z_zmmm512b64_er, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vcvtusi2ss xmm2,xmm6,ebx
62 F14E08 7B D3, EVEX_Vcvtusi2ss_xmm_xmm_rm32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=ebx
# vcvtusi2ss xmm2,xmm6,dword ptr [rax+4]
62 F14E08 7B 50 01, EVEX_Vcvtusi2ss_xmm_xmm_rm32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+4;UInt32
# vcvtusi2ss xmm2,xmm6,rbx
62 F1CE08 7B D3, EVEX_Vcvtusi2ss_xmm_xmm_rm64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rbx
# vcvtusi2ss xmm2,xmm6,qword ptr [rax+8]
62 F1CE08 7B 50 01, EVEX_Vcvtusi2ss_xmm_xmm_rm64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;UInt64
# vcvtusi2sd xmm2,xmm6,ebx
62 F14F08 7B D3, EVEX_Vcvtusi2sd_xmm_xmm_rm32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=ebx
# vcvtusi2sd xmm2,xmm6,dword ptr [rax+4]
62 F14F08 7B 50 01, EVEX_Vcvtusi2sd_xmm_xmm_rm32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+4;UInt32
# vcvtusi2sd xmm2,xmm6,rbx
62 F1CF08 7B D3, EVEX_Vcvtusi2sd_xmm_xmm_rm64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rbx
# vcvtusi2sd xmm2,xmm6,qword ptr [rax+8]
62 F1CF08 7B 50 01, EVEX_Vcvtusi2sd_xmm_xmm_rm64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;UInt64
# haddpd xmm1,xmm5
66 0F7C CD, Haddpd_xmm_xmmm128, Legacy, SSE3, op0=rw op1=r rw=xmm1 r=xmm5
# haddpd xmm1,[rax]
66 0F7C 08, Haddpd_xmm_xmmm128, Legacy, SSE3, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vhaddpd xmm2,xmm6,xmm3
C5C9 7C D3, VEX_Vhaddpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vhaddpd xmm2,xmm6,[rax]
C5C9 7C 10, VEX_Vhaddpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vhaddpd ymm2,ymm6,ymm3
C5CD 7C D3, VEX_Vhaddpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vhaddpd ymm2,ymm6,[rax]
C5CD 7C 10, VEX_Vhaddpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# haddps xmm1,xmm5
F2 0F7C CD, Haddps_xmm_xmmm128, Legacy, SSE3, op0=rw op1=r rw=xmm1 r=xmm5
# haddps xmm1,[rax]
F2 0F7C 08, Haddps_xmm_xmmm128, Legacy, SSE3, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vhaddps xmm2,xmm6,xmm3
C5CB 7C D3, VEX_Vhaddps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vhaddps xmm2,xmm6,[rax]
C5CB 7C 10, VEX_Vhaddps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vhaddps ymm2,ymm6,ymm3
C5CF 7C D3, VEX_Vhaddps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vhaddps ymm2,ymm6,[rax]
C5CF 7C 10, VEX_Vhaddps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# hsubpd xmm1,xmm5
66 0F7D CD, Hsubpd_xmm_xmmm128, Legacy, SSE3, op0=rw op1=r rw=xmm1 r=xmm5
# hsubpd xmm1,[rax]
66 0F7D 08, Hsubpd_xmm_xmmm128, Legacy, SSE3, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vhsubpd xmm2,xmm6,xmm3
C5C9 7D D3, VEX_Vhsubpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vhsubpd xmm2,xmm6,[rax]
C5C9 7D 10, VEX_Vhsubpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vhsubpd ymm2,ymm6,ymm3
C5CD 7D D3, VEX_Vhsubpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vhsubpd ymm2,ymm6,[rax]
C5CD 7D 10, VEX_Vhsubpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# hsubps xmm1,xmm5
F2 0F7D CD, Hsubps_xmm_xmmm128, Legacy, SSE3, op0=rw op1=r rw=xmm1 r=xmm5
# hsubps xmm1,[rax]
F2 0F7D 08, Hsubps_xmm_xmmm128, Legacy, SSE3, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vhsubps xmm2,xmm6,xmm3
C5CB 7D D3, VEX_Vhsubps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vhsubps xmm2,xmm6,[rax]
C5CB 7D 10, VEX_Vhsubps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vhsubps ymm2,ymm6,ymm3
C5CF 7D D3, VEX_Vhsubps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vhsubps ymm2,ymm6,[rax]
C5CF 7D 10, VEX_Vhsubps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# movd ebp,mm1
0F7E CD, Movd_rm32_mm, Legacy, MMX, op0=w op1=r w=rbp r=mm1
# movd dword ptr [rax],mm1
0F7E 08, Movd_rm32_mm, Legacy, MMX, op0=w op1=r r=rax r=mm1 wm=ds:rax;UInt32
# movq rbp,mm1
48 0F7E CD, Movq_rm64_mm, Legacy, MMX, op0=w op1=r w=rbp r=mm1
# movq [rax],mm1
48 0F7E 08, Movq_rm64_mm, Legacy, MMX, op0=w op1=r r=rax r=mm1 wm=ds:rax;UInt64
# movd ebp,xmm1
66 0F7E CD, Movd_rm32_xmm, Legacy, SSE2, op0=w op1=r w=rbp r=xmm1
# movd dword ptr [rax],xmm1
66 0F7E 08, Movd_rm32_xmm, Legacy, SSE2, op0=w op1=r r=rax r=xmm1 wm=ds:rax;UInt32
# movq rbp,xmm1
66 48 0F7E CD, Movq_rm64_xmm, Legacy, SSE2, op0=w op1=r w=rbp r=xmm1
# movq qword ptr [rax],xmm1
66 48 0F7E 08, Movq_rm64_xmm, Legacy, SSE2, op0=w op1=r r=rax r=xmm1 wm=ds:rax;UInt64
# vmovd ebp,xmm1
C5F9 7E CD, VEX_Vmovd_rm32_xmm, VEX, AVX, op0=w op1=r w=rbp r=xmm1
# vmovd dword ptr [rax],xmm1
C5F9 7E 08, VEX_Vmovd_rm32_xmm, VEX, AVX, op0=w op1=r r=rax r=xmm1 wm=ds:rax;UInt32
# vmovq rbp,xmm1
C4E1F9 7E CD, VEX_Vmovq_rm64_xmm, VEX, AVX, op0=w op1=r w=rbp r=xmm1
# vmovq qword ptr [rax],xmm1
C4E1F9 7E 08, VEX_Vmovq_rm64_xmm, VEX, AVX, op0=w op1=r r=rax r=xmm1 wm=ds:rax;UInt64
# vmovd ebx,xmm2
62 F17D08 7E D3, EVEX_Vmovd_rm32_xmm, EVEX, AVX512F, op0=w op1=r w=rbx r=xmm2
# vmovd dword ptr [rax+4],xmm2
62 F17D08 7E 50 01, EVEX_Vmovd_rm32_xmm, EVEX, AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+4;UInt32
# vmovq rbx,xmm2
62 F1FD08 7E D3, EVEX_Vmovq_rm64_xmm, EVEX, AVX512F, op0=w op1=r w=rbx r=xmm2
# vmovq qword ptr [rax+8],xmm2
62 F1FD08 7E 50 01, EVEX_Vmovq_rm64_xmm, EVEX, AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+8;UInt64
# movq xmm1,xmm5
F3 0F7E CD, Movq_xmm_xmmm64, Legacy, SSE2, op0=w op1=r w=xmm1 r=xmm5
# movq xmm1,qword ptr [rax]
F3 0F7E 08, Movq_xmm_xmmm64, Legacy, SSE2, op0=w op1=r w=xmm1 r=rax rm=ds:rax;UInt64
# vmovq xmm1,xmm5
C5FA 7E CD, VEX_Vmovq_xmm_xmmm64, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vmovq xmm2,qword ptr [rax]
C5FA 7E 10, VEX_Vmovq_xmm_xmmm64, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;UInt64
# vmovq xmm2,xmm3
62 F1FE08 7E D3, EVEX_Vmovq_xmm_xmmm64, EVEX, AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vmovq xmm2,qword ptr [rax+8]
62 F1FE08 7E 50 01, EVEX_Vmovq_xmm_xmmm64, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;UInt64
# movq mm5,mm1
0F7F CD, Movq_mmm64_mm, Legacy, MMX, op0=w op1=r w=mm5 r=mm1
# movq [rax],mm1
0F7F 08, Movq_mmm64_mm, Legacy, MMX, op0=w op1=r r=rax r=mm1 wm=ds:rax;UInt64
# movdqa xmm5,xmm1
66 0F7F CD, Movdqa_xmmm128_xmm, Legacy, SSE2, op0=w op1=r w=xmm5 r=xmm1
# movdqa [rax],xmm1
66 0F7F 08, Movdqa_xmmm128_xmm, Legacy, SSE2, op0=w op1=r r=rax r=xmm1 wm=ds:rax;Packed128_UInt32
# vmovdqa xmm5,xmm1
C5F9 7F CD, VEX_Vmovdqa_xmmm128_xmm, VEX, AVX, op0=w op1=r w=vmm5 r=xmm1
# vmovdqa xmmword ptr [rax],xmm2
C5F9 7F 10, VEX_Vmovdqa_xmmm128_xmm, VEX, AVX, op0=w op1=r r=rax r=xmm2 wm=ds:rax;Packed128_UInt32
# vmovdqa ymm5,ymm1
C5FD 7F CD, VEX_Vmovdqa_ymmm256_ymm, VEX, AVX, op0=w op1=r w=vmm5 r=ymm1
# vmovdqa ymmword ptr [rax],ymm2
C5FD 7F 10, VEX_Vmovdqa_ymmm256_ymm, VEX, AVX, op0=w op1=r r=rax r=ymm2 wm=ds:rax;Packed256_UInt32
# vmovdqa32 xmm3,xmm2
62 F17D08 7F D3, EVEX_Vmovdqa32_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vmovdqa32 [rax+10h],xmm2
62 F17D08 7F 50 01, EVEX_Vmovdqa32_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+0x10;Packed128_UInt32
# vmovdqa32 [rax+10h]{k3},xmm2
62 F17D0B 7F 50 01, EVEX_Vmovdqa32_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+0x10;Packed128_UInt32
# vmovdqa32 xmm3{k3},xmm2
62 F17D0B 7F D3, EVEX_Vmovdqa32_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vmovdqa32 xmm19{k3}{z},xmm10
62 317D8B 7F D3, EVEX_Vmovdqa32_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm19 r=k3 r=xmm10
# vmovdqa32 ymm3,ymm2
62 F17D28 7F D3, EVEX_Vmovdqa32_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vmovdqa32 [rax+20h],ymm2
62 F17D28 7F 50 01, EVEX_Vmovdqa32_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+0x20;Packed256_UInt32
# vmovdqa32 [rax+20h]{k3},ymm2
62 F17D2B 7F 50 01, EVEX_Vmovdqa32_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+0x20;Packed256_UInt32
# vmovdqa32 ymm3{k3},ymm2
62 F17D2B 7F D3, EVEX_Vmovdqa32_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=ymm3 r=k3 r=ymm2
# vmovdqa32 ymm19{k3}{z},ymm10
62 317DAB 7F D3, EVEX_Vmovdqa32_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm19 r=k3 r=ymm10
# vmovdqa32 zmm3,zmm2
62 F17D48 7F D3, EVEX_Vmovdqa32_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vmovdqa32 [rax+40h],zmm2
62 F17D48 7F 50 01, EVEX_Vmovdqa32_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x40;Packed512_UInt32
# vmovdqa32 [rax+40h]{k3},zmm2
62 F17D4B 7F 50 01, EVEX_Vmovdqa32_zmmm512_k1z_zmm, EVEX, AVX512F, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x40;Packed512_UInt32
# vmovdqa32 zmm3{k3},zmm2
62 F17D4B 7F D3, EVEX_Vmovdqa32_zmmm512_k1z_zmm, EVEX, AVX512F, op0=rcw op1=r cw=vmm3 r=zmm3 r=k3 r=zmm2
# vmovdqa32 zmm19{k3}{z},zmm10
62 317DCB 7F D3, EVEX_Vmovdqa32_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm19 r=k3 r=zmm10
# vmovdqa64 xmm3,xmm2
62 F1FD08 7F D3, EVEX_Vmovdqa64_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vmovdqa64 [rax+10h],xmm2
62 F1FD08 7F 50 01, EVEX_Vmovdqa64_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+0x10;Packed128_UInt64
# vmovdqa64 [rax+10h]{k3},xmm2
62 F1FD0B 7F 50 01, EVEX_Vmovdqa64_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+0x10;Packed128_UInt64
# vmovdqa64 xmm3{k3},xmm2
62 F1FD0B 7F D3, EVEX_Vmovdqa64_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vmovdqa64 xmm19{k3}{z},xmm10
62 31FD8B 7F D3, EVEX_Vmovdqa64_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm19 r=k3 r=xmm10
# vmovdqa64 ymm3,ymm2
62 F1FD28 7F D3, EVEX_Vmovdqa64_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vmovdqa64 [rax+20h],ymm2
62 F1FD28 7F 50 01, EVEX_Vmovdqa64_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+0x20;Packed256_UInt64
# vmovdqa64 [rax+20h]{k3},ymm2
62 F1FD2B 7F 50 01, EVEX_Vmovdqa64_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+0x20;Packed256_UInt64
# vmovdqa64 ymm3{k3},ymm2
62 F1FD2B 7F D3, EVEX_Vmovdqa64_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=ymm3 r=k3 r=ymm2
# vmovdqa64 ymm19{k3}{z},ymm10
62 31FDAB 7F D3, EVEX_Vmovdqa64_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm19 r=k3 r=ymm10
# vmovdqa64 zmm3,zmm2
62 F1FD48 7F D3, EVEX_Vmovdqa64_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vmovdqa64 [rax+40h],zmm2
62 F1FD48 7F 50 01, EVEX_Vmovdqa64_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x40;Packed512_UInt64
# vmovdqa64 [rax+40h]{k3},zmm2
62 F1FD4B 7F 50 01, EVEX_Vmovdqa64_zmmm512_k1z_zmm, EVEX, AVX512F, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x40;Packed512_UInt64
# vmovdqa64 zmm3{k3},zmm2
62 F1FD4B 7F D3, EVEX_Vmovdqa64_zmmm512_k1z_zmm, EVEX, AVX512F, op0=rcw op1=r cw=vmm3 r=zmm3 r=k3 r=zmm2
# vmovdqa64 zmm19{k3}{z},zmm10
62 31FDCB 7F D3, EVEX_Vmovdqa64_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm19 r=k3 r=zmm10
# movdqu xmm5,xmm1
F3 0F7F CD, Movdqu_xmmm128_xmm, Legacy, SSE2, op0=w op1=r w=xmm5 r=xmm1
# movdqu [rax],xmm1
F3 0F7F 08, Movdqu_xmmm128_xmm, Legacy, SSE2, op0=w op1=r r=rax r=xmm1 wm=ds:rax;Packed128_UInt32
# vmovdqu xmm5,xmm1
C5FA 7F CD, VEX_Vmovdqu_xmmm128_xmm, VEX, AVX, op0=w op1=r w=vmm5 r=xmm1
# vmovdqu xmmword ptr [rax],xmm2
C5FA 7F 10, VEX_Vmovdqu_xmmm128_xmm, VEX, AVX, op0=w op1=r r=rax r=xmm2 wm=ds:rax;Packed128_UInt32
# vmovdqu ymm5,ymm1
C5FE 7F CD, VEX_Vmovdqu_ymmm256_ymm, VEX, AVX, op0=w op1=r w=vmm5 r=ymm1
# vmovdqu ymmword ptr [rax],ymm2
C5FE 7F 10, VEX_Vmovdqu_ymmm256_ymm, VEX, AVX, op0=w op1=r r=rax r=ymm2 wm=ds:rax;Packed256_UInt32
# vmovdqu32 xmm3,xmm2
62 F17E08 7F D3, EVEX_Vmovdqu32_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vmovdqu32 [rax+10h],xmm2
62 F17E08 7F 50 01, EVEX_Vmovdqu32_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+0x10;Packed128_UInt32
# vmovdqu32 [rax+10h]{k3},xmm2
62 F17E0B 7F 50 01, EVEX_Vmovdqu32_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+0x10;Packed128_UInt32
# vmovdqu32 xmm3{k3},xmm2
62 F17E0B 7F D3, EVEX_Vmovdqu32_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vmovdqu32 xmm19{k3}{z},xmm10
62 317E8B 7F D3, EVEX_Vmovdqu32_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm19 r=k3 r=xmm10
# vmovdqu32 ymm3,ymm2
62 F17E28 7F D3, EVEX_Vmovdqu32_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vmovdqu32 [rax+20h],ymm2
62 F17E28 7F 50 01, EVEX_Vmovdqu32_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+0x20;Packed256_UInt32
# vmovdqu32 [rax+20h]{k3},ymm2
62 F17E2B 7F 50 01, EVEX_Vmovdqu32_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+0x20;Packed256_UInt32
# vmovdqu32 ymm3{k3},ymm2
62 F17E2B 7F D3, EVEX_Vmovdqu32_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=ymm3 r=k3 r=ymm2
# vmovdqu32 ymm19{k3}{z},ymm10
62 317EAB 7F D3, EVEX_Vmovdqu32_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm19 r=k3 r=ymm10
# vmovdqu32 zmm3,zmm2
62 F17E48 7F D3, EVEX_Vmovdqu32_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vmovdqu32 [rax+40h],zmm2
62 F17E48 7F 50 01, EVEX_Vmovdqu32_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x40;Packed512_UInt32
# vmovdqu32 [rax+40h]{k3},zmm2
62 F17E4B 7F 50 01, EVEX_Vmovdqu32_zmmm512_k1z_zmm, EVEX, AVX512F, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x40;Packed512_UInt32
# vmovdqu32 zmm3{k3},zmm2
62 F17E4B 7F D3, EVEX_Vmovdqu32_zmmm512_k1z_zmm, EVEX, AVX512F, op0=rcw op1=r cw=vmm3 r=zmm3 r=k3 r=zmm2
# vmovdqu32 zmm19{k3}{z},zmm10
62 317ECB 7F D3, EVEX_Vmovdqu32_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm19 r=k3 r=zmm10
# vmovdqu64 xmm3,xmm2
62 F1FE08 7F D3, EVEX_Vmovdqu64_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vmovdqu64 [rax+10h],xmm2
62 F1FE08 7F 50 01, EVEX_Vmovdqu64_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+0x10;Packed128_UInt64
# vmovdqu64 [rax+10h]{k3},xmm2
62 F1FE0B 7F 50 01, EVEX_Vmovdqu64_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+0x10;Packed128_UInt64
# vmovdqu64 xmm3{k3},xmm2
62 F1FE0B 7F D3, EVEX_Vmovdqu64_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vmovdqu64 xmm19{k3}{z},xmm10
62 31FE8B 7F D3, EVEX_Vmovdqu64_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm19 r=k3 r=xmm10
# vmovdqu64 ymm3,ymm2
62 F1FE28 7F D3, EVEX_Vmovdqu64_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vmovdqu64 [rax+20h],ymm2
62 F1FE28 7F 50 01, EVEX_Vmovdqu64_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+0x20;Packed256_UInt64
# vmovdqu64 [rax+20h]{k3},ymm2
62 F1FE2B 7F 50 01, EVEX_Vmovdqu64_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+0x20;Packed256_UInt64
# vmovdqu64 ymm3{k3},ymm2
62 F1FE2B 7F D3, EVEX_Vmovdqu64_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=ymm3 r=k3 r=ymm2
# vmovdqu64 ymm19{k3}{z},ymm10
62 31FEAB 7F D3, EVEX_Vmovdqu64_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm19 r=k3 r=ymm10
# vmovdqu64 zmm3,zmm2
62 F1FE48 7F D3, EVEX_Vmovdqu64_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vmovdqu64 [rax+40h],zmm2
62 F1FE48 7F 50 01, EVEX_Vmovdqu64_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x40;Packed512_UInt64
# vmovdqu64 [rax+40h]{k3},zmm2
62 F1FE4B 7F 50 01, EVEX_Vmovdqu64_zmmm512_k1z_zmm, EVEX, AVX512F, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x40;Packed512_UInt64
# vmovdqu64 zmm3{k3},zmm2
62 F1FE4B 7F D3, EVEX_Vmovdqu64_zmmm512_k1z_zmm, EVEX, AVX512F, op0=rcw op1=r cw=vmm3 r=zmm3 r=k3 r=zmm2
# vmovdqu64 zmm19{k3}{z},zmm10
62 31FECB 7F D3, EVEX_Vmovdqu64_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm19 r=k3 r=zmm10
# vmovdqu8 xmm3,xmm2
62 F17F08 7F D3, EVEX_Vmovdqu8_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm3 r=xmm2
# vmovdqu8 [rax+10h],xmm2
62 F17F08 7F 50 01, EVEX_Vmovdqu8_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512BW, op0=w op1=r r=rax r=xmm2 wm=ds:rax+0x10;Packed128_UInt8
# vmovdqu8 [rax+10h]{k3},xmm2
62 F17F0B 7F 50 01, EVEX_Vmovdqu8_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512BW, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+0x10;Packed128_UInt8
# vmovdqu8 xmm3{k3},xmm2
62 F17F0B 7F D3, EVEX_Vmovdqu8_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vmovdqu8 xmm19{k3}{z},xmm10
62 317F8B 7F D3, EVEX_Vmovdqu8_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm19 r=k3 r=xmm10
# vmovdqu8 ymm3,ymm2
62 F17F28 7F D3, EVEX_Vmovdqu8_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm3 r=ymm2
# vmovdqu8 [rax+20h],ymm2
62 F17F28 7F 50 01, EVEX_Vmovdqu8_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512BW, op0=w op1=r r=rax r=ymm2 wm=ds:rax+0x20;Packed256_UInt8
# vmovdqu8 [rax+20h]{k3},ymm2
62 F17F2B 7F 50 01, EVEX_Vmovdqu8_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512BW, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+0x20;Packed256_UInt8
# vmovdqu8 ymm3{k3},ymm2
62 F17F2B 7F D3, EVEX_Vmovdqu8_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm3 r=ymm3 r=k3 r=ymm2
# vmovdqu8 ymm19{k3}{z},ymm10
62 317FAB 7F D3, EVEX_Vmovdqu8_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm19 r=k3 r=ymm10
# vmovdqu8 zmm3,zmm2
62 F17F48 7F D3, EVEX_Vmovdqu8_zmmm512_k1z_zmm, EVEX, AVX512BW, op0=w op1=r w=vmm3 r=zmm2
# vmovdqu8 [rax+40h],zmm2
62 F17F48 7F 50 01, EVEX_Vmovdqu8_zmmm512_k1z_zmm, EVEX, AVX512BW, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x40;Packed512_UInt8
# vmovdqu8 [rax+40h]{k3},zmm2
62 F17F4B 7F 50 01, EVEX_Vmovdqu8_zmmm512_k1z_zmm, EVEX, AVX512BW, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x40;Packed512_UInt8
# vmovdqu8 zmm3{k3},zmm2
62 F17F4B 7F D3, EVEX_Vmovdqu8_zmmm512_k1z_zmm, EVEX, AVX512BW, op0=rcw op1=r cw=vmm3 r=zmm3 r=k3 r=zmm2
# vmovdqu8 zmm19{k3}{z},zmm10
62 317FCB 7F D3, EVEX_Vmovdqu8_zmmm512_k1z_zmm, EVEX, AVX512BW, op0=w op1=r w=vmm19 r=k3 r=zmm10
# vmovdqu16 xmm3,xmm2
62 F1FF08 7F D3, EVEX_Vmovdqu16_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm3 r=xmm2
# vmovdqu16 [rax+10h],xmm2
62 F1FF08 7F 50 01, EVEX_Vmovdqu16_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512BW, op0=w op1=r r=rax r=xmm2 wm=ds:rax+0x10;Packed128_UInt16
# vmovdqu16 [rax+10h]{k3},xmm2
62 F1FF0B 7F 50 01, EVEX_Vmovdqu16_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512BW, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+0x10;Packed128_UInt16
# vmovdqu16 xmm3{k3},xmm2
62 F1FF0B 7F D3, EVEX_Vmovdqu16_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vmovdqu16 xmm19{k3}{z},xmm10
62 31FF8B 7F D3, EVEX_Vmovdqu16_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm19 r=k3 r=xmm10
# vmovdqu16 ymm3,ymm2
62 F1FF28 7F D3, EVEX_Vmovdqu16_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm3 r=ymm2
# vmovdqu16 [rax+20h],ymm2
62 F1FF28 7F 50 01, EVEX_Vmovdqu16_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512BW, op0=w op1=r r=rax r=ymm2 wm=ds:rax+0x20;Packed256_UInt16
# vmovdqu16 [rax+20h]{k3},ymm2
62 F1FF2B 7F 50 01, EVEX_Vmovdqu16_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512BW, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+0x20;Packed256_UInt16
# vmovdqu16 ymm3{k3},ymm2
62 F1FF2B 7F D3, EVEX_Vmovdqu16_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm3 r=ymm3 r=k3 r=ymm2
# vmovdqu16 ymm19{k3}{z},ymm10
62 31FFAB 7F D3, EVEX_Vmovdqu16_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm19 r=k3 r=ymm10
# vmovdqu16 zmm3,zmm2
62 F1FF48 7F D3, EVEX_Vmovdqu16_zmmm512_k1z_zmm, EVEX, AVX512BW, op0=w op1=r w=vmm3 r=zmm2
# vmovdqu16 [rax+40h],zmm2
62 F1FF48 7F 50 01, EVEX_Vmovdqu16_zmmm512_k1z_zmm, EVEX, AVX512BW, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x40;Packed512_UInt16
# vmovdqu16 [rax+40h]{k3},zmm2
62 F1FF4B 7F 50 01, EVEX_Vmovdqu16_zmmm512_k1z_zmm, EVEX, AVX512BW, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x40;Packed512_UInt16
# vmovdqu16 zmm3{k3},zmm2
62 F1FF4B 7F D3, EVEX_Vmovdqu16_zmmm512_k1z_zmm, EVEX, AVX512BW, op0=rcw op1=r cw=vmm3 r=zmm3 r=k3 r=zmm2
# vmovdqu16 zmm19{k3}{z},zmm10
62 31FFCB 7F D3, EVEX_Vmovdqu16_zmmm512_k1z_zmm, EVEX, AVX512BW, op0=w op1=r w=vmm19 r=k3 r=zmm10
# jo near ptr 800000003412A550h
0F80 5AA51234, Jo_rel32_64, Legacy, X64, flow=ConditionalBranch fr=o op0=r
# jno near ptr 800000003412A550h
0F81 5AA51234, Jno_rel32_64, Legacy, X64, flow=ConditionalBranch fr=o op0=r
# jb near ptr 800000003412A550h
0F82 5AA51234, Jb_rel32_64, Legacy, X64, flow=ConditionalBranch fr=c op0=r
# jae near ptr 800000003412A550h
0F83 5AA51234, Jae_rel32_64, Legacy, X64, flow=ConditionalBranch fr=c op0=r
# je near ptr 800000003412A550h
0F84 5AA51234, Je_rel32_64, Legacy, X64, flow=ConditionalBranch fr=z op0=r
# jne near ptr 800000003412A550h
0F85 5AA51234, Jne_rel32_64, Legacy, X64, flow=ConditionalBranch fr=z op0=r
# jbe near ptr 800000003412A550h
0F86 5AA51234, Jbe_rel32_64, Legacy, X64, flow=ConditionalBranch fr=cz op0=r
# ja near ptr 800000003412A550h
0F87 5AA51234, Ja_rel32_64, Legacy, X64, flow=ConditionalBranch fr=cz op0=r
# js near ptr 800000003412A550h
0F88 5AA51234, Js_rel32_64, Legacy, X64, flow=ConditionalBranch fr=s op0=r
# jns near ptr 800000003412A550h
0F89 5AA51234, Jns_rel32_64, Legacy, X64, flow=ConditionalBranch fr=s op0=r
# jp near ptr 800000003412A550h
0F8A 5AA51234, Jp_rel32_64, Legacy, X64, flow=ConditionalBranch fr=p op0=r
# jnp near ptr 800000003412A550h
0F8B 5AA51234, Jnp_rel32_64, Legacy, X64, flow=ConditionalBranch fr=p op0=r
# jl near ptr 800000003412A550h
0F8C 5AA51234, Jl_rel32_64, Legacy, X64, flow=ConditionalBranch fr=so op0=r
# jge near ptr 800000003412A550h
0F8D 5AA51234, Jge_rel32_64, Legacy, X64, flow=ConditionalBranch fr=so op0=r
# jle near ptr 800000003412A550h
0F8E 5AA51234, Jle_rel32_64, Legacy, X64, flow=ConditionalBranch fr=soz op0=r
# jg near ptr 800000003412A550h
0F8F 5AA51234, Jg_rel32_64, Legacy, X64, flow=ConditionalBranch fr=soz op0=r
# seto al
0F90 C0, Seto_rm8, Legacy, INTEL386, fr=o op0=w w=al
# setno al
0F91 C0, Setno_rm8, Legacy, INTEL386, fr=o op0=w w=al
# setb al
0F92 C0, Setb_rm8, Legacy, INTEL386, fr=c op0=w w=al
# setae al
0F93 C0, Setae_rm8, Legacy, INTEL386, fr=c op0=w w=al
# sete al
0F94 C0, Sete_rm8, Legacy, INTEL386, fr=z op0=w w=al
# setne al
0F95 C0, Setne_rm8, Legacy, INTEL386, fr=z op0=w w=al
# setbe al
0F96 C0, Setbe_rm8, Legacy, INTEL386, fr=cz op0=w w=al
# seta al
0F97 C0, Seta_rm8, Legacy, INTEL386, fr=cz op0=w w=al
# sets al
0F98 C0, Sets_rm8, Legacy, INTEL386, fr=s op0=w w=al
# setns al
0F99 C0, Setns_rm8, Legacy, INTEL386, fr=s op0=w w=al
# setp al
0F9A C0, Setp_rm8, Legacy, INTEL386, fr=p op0=w w=al
# setnp al
0F9B C0, Setnp_rm8, Legacy, INTEL386, fr=p op0=w w=al
# setl al
0F9C C0, Setl_rm8, Legacy, INTEL386, fr=so op0=w w=al
# setge al
0F9D C0, Setge_rm8, Legacy, INTEL386, fr=so op0=w w=al
# setle al
0F9E C0, Setle_rm8, Legacy, INTEL386, fr=soz op0=w w=al
# setg al
0F9F C0, Setg_rm8, Legacy, INTEL386, fr=soz op0=w w=al
# seto byte ptr [rax]
0F90 00, Seto_rm8, Legacy, INTEL386, fr=o op0=w r=rax wm=ds:rax;UInt8
# setno byte ptr [rax]
0F91 00, Setno_rm8, Legacy, INTEL386, fr=o op0=w r=rax wm=ds:rax;UInt8
# setb byte ptr [rax]
0F92 00, Setb_rm8, Legacy, INTEL386, fr=c op0=w r=rax wm=ds:rax;UInt8
# setae byte ptr [rax]
0F93 00, Setae_rm8, Legacy, INTEL386, fr=c op0=w r=rax wm=ds:rax;UInt8
# sete byte ptr [rax]
0F94 00, Sete_rm8, Legacy, INTEL386, fr=z op0=w r=rax wm=ds:rax;UInt8
# setne byte ptr [rax]
0F95 00, Setne_rm8, Legacy, INTEL386, fr=z op0=w r=rax wm=ds:rax;UInt8
# setbe byte ptr [rax]
0F96 00, Setbe_rm8, Legacy, INTEL386, fr=cz op0=w r=rax wm=ds:rax;UInt8
# seta byte ptr [rax]
0F97 00, Seta_rm8, Legacy, INTEL386, fr=cz op0=w r=rax wm=ds:rax;UInt8
# sets byte ptr [rax]
0F98 00, Sets_rm8, Legacy, INTEL386, fr=s op0=w r=rax wm=ds:rax;UInt8
# setns byte ptr [rax]
0F99 00, Setns_rm8, Legacy, INTEL386, fr=s op0=w r=rax wm=ds:rax;UInt8
# setp byte ptr [rax]
0F9A 00, Setp_rm8, Legacy, INTEL386, fr=p op0=w r=rax wm=ds:rax;UInt8
# setnp byte ptr [rax]
0F9B 00, Setnp_rm8, Legacy, INTEL386, fr=p op0=w r=rax wm=ds:rax;UInt8
# setl byte ptr [rax]
0F9C 00, Setl_rm8, Legacy, INTEL386, fr=so op0=w r=rax wm=ds:rax;UInt8
# setge byte ptr [rax]
0F9D 00, Setge_rm8, Legacy, INTEL386, fr=so op0=w r=rax wm=ds:rax;UInt8
# setle byte ptr [rax]
0F9E 00, Setle_rm8, Legacy, INTEL386, fr=soz op0=w r=rax wm=ds:rax;UInt8
# setg byte ptr [rax]
0F9F 00, Setg_rm8, Legacy, INTEL386, fr=soz op0=w r=rax wm=ds:rax;UInt8
# kmovw k2,k3
C5F8 90 D3, VEX_Kmovw_kr_km16, VEX, AVX512F, op0=w op1=r w=k2 r=k3
# kmovw k1,word ptr [rax]
C5F8 90 08, VEX_Kmovw_kr_km16, VEX, AVX512F, op0=w op1=r w=k1 r=rax rm=ds:rax;UInt16
# kmovq k2,k3
C4E1F8 90 D3, VEX_Kmovq_kr_km64, VEX, AVX512BW, op0=w op1=r w=k2 r=k3
# kmovq k1,qword ptr [rax]
C4E1F8 90 08, VEX_Kmovq_kr_km64, VEX, AVX512BW, op0=w op1=r w=k1 r=rax rm=ds:rax;UInt64
# kmovb k2,k3
C5F9 90 D3, VEX_Kmovb_kr_km8, VEX, AVX512DQ, op0=w op1=r w=k2 r=k3
# kmovb k1,byte ptr [rax]
C5F9 90 08, VEX_Kmovb_kr_km8, VEX, AVX512DQ, op0=w op1=r w=k1 r=rax rm=ds:rax;UInt8
# kmovd k2,k3
C4E1F9 90 D3, VEX_Kmovd_kr_km32, VEX, AVX512BW, op0=w op1=r w=k2 r=k3
# kmovd k1,dword ptr [rax]
C4E1F9 90 08, VEX_Kmovd_kr_km32, VEX, AVX512BW, op0=w op1=r w=k1 r=rax rm=ds:rax;UInt32
# kmovw word ptr [rax],k1
C5F8 91 08, VEX_Kmovw_m16_kr, VEX, AVX512F, op0=w op1=r r=rax r=k1 wm=ds:rax;UInt16
# kmovq qword ptr [rax],k1
C4E1F8 91 08, VEX_Kmovq_m64_kr, VEX, AVX512BW, op0=w op1=r r=rax r=k1 wm=ds:rax;UInt64
# kmovb byte ptr [rax],k1
C5F9 91 08, VEX_Kmovb_m8_kr, VEX, AVX512DQ, op0=w op1=r r=rax r=k1 wm=ds:rax;UInt8
# kmovd dword ptr [rax],k1
C4E1F9 91 08, VEX_Kmovd_m32_kr, VEX, AVX512BW, op0=w op1=r r=rax r=k1 wm=ds:rax;UInt32
# kmovw k2,ebx
C5F8 92 D3, VEX_Kmovw_kr_r32, VEX, AVX512F, op0=w op1=r w=k2 r=ebx
# kmovb k2,ebx
C5F9 92 D3, VEX_Kmovb_kr_r32, VEX, AVX512DQ, op0=w op1=r w=k2 r=ebx
# kmovq k2,rbx
C4E1FB 92 D3, VEX_Kmovq_kr_r64, VEX, AVX512BW, op0=w op1=r w=k2 r=rbx
# kmovd k2,ebx
C5FB 92 D3, VEX_Kmovd_kr_r32, VEX, AVX512BW, op0=w op1=r w=k2 r=ebx
# kmovw edx,k3
C5F8 93 D3, VEX_Kmovw_r32_kr, VEX, AVX512F, op0=w op1=r w=rdx r=k3
# kmovb edx,k3
C5F9 93 D3, VEX_Kmovb_r32_kr, VEX, AVX512DQ, op0=w op1=r w=rdx r=k3
# kmovq rdx,k3
C4E1FB 93 D3, VEX_Kmovq_r64_kr, VEX, AVX512BW, op0=w op1=r w=rdx r=k3
# kmovd edx,k3
C5FB 93 D3, VEX_Kmovd_r32_kr, VEX, AVX512BW, op0=w op1=r w=rdx r=k3
# kortestw k2,k3
C5F8 98 D3, VEX_Kortestw_kr_kr, VEX, AVX512F, fw=cz fc=aops op0=r op1=r r=k2 r=k3
# kortestq k2,k3
C4E1F8 98 D3, VEX_Kortestq_kr_kr, VEX, AVX512BW, fw=cz fc=aops op0=r op1=r r=k2 r=k3
# kortestb k2,k3
C5F9 98 D3, VEX_Kortestb_kr_kr, VEX, AVX512DQ, fw=cz fc=aops op0=r op1=r r=k2 r=k3
# kortestd k2,k3
C4E1F9 98 D3, VEX_Kortestd_kr_kr, VEX, AVX512BW, fw=cz fc=aops op0=r op1=r r=k2 r=k3
# ktestw k2,k3
C5F8 99 D3, VEX_Ktestw_kr_kr, VEX, AVX512DQ, fw=cz fc=aops op0=r op1=r r=k2 r=k3
# ktestq k2,k3
C4E1F8 99 D3, VEX_Ktestq_kr_kr, VEX, AVX512BW, fw=cz fc=aops op0=r op1=r r=k2 r=k3
# ktestb k2,k3
C5F9 99 D3, VEX_Ktestb_kr_kr, VEX, AVX512DQ, fw=cz fc=aops op0=r op1=r r=k2 r=k3
# ktestd k2,k3
C4E1F9 99 D3, VEX_Ktestd_kr_kr, VEX, AVX512BW, fw=cz fc=aops op0=r op1=r r=k2 r=k3
# pushw fs
66 0FA0, Pushw_FS, Legacy, INTEL386, op0=r rw=xsp r=fs wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 stack=-2
# push fs
0FA0, Pushq_FS, Legacy, X64, op0=r rw=xsp r=fs wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# popw fs
66 0FA1, Popw_FS, Legacy, INTEL386, op0=w rw=xsp w=fs rm=ss:xsp;UInt16 stack=2
# pop fs
0FA1, Popq_FS, Legacy, X64, op0=w rw=xsp w=fs rm=ss:xsp;UInt64 stack=8
# cpuid
0FA2, Cpuid, Legacy, CPUID, r=eax cr=ecx w=rax;rcx;rdx;rbx
# bt si,cx
66 0FA3 CE, Bt_rm16_r16, Legacy, INTEL386, fw=c fu=osap op0=r op1=r r=si r=cx
# bt [rax],bx
66 0FA3 18, Bt_rm16_r16, Legacy, INTEL386, fw=c fu=osap op0=r op1=r r=rax r=bx rm=ds:rax;UInt16
# bt esi,ecx
0FA3 CE, Bt_rm32_r32, Legacy, INTEL386, fw=c fu=osap op0=r op1=r r=esi r=ecx
# bt [rax],ebx
0FA3 18, Bt_rm32_r32, Legacy, INTEL386, fw=c fu=osap op0=r op1=r r=rax r=ebx rm=ds:rax;UInt32
# bt rsi,rcx
48 0FA3 CE, Bt_rm64_r64, Legacy, X64, fw=c fu=osap op0=r op1=r r=rsi r=rcx
# bt [rax],rbx
48 0FA3 18, Bt_rm64_r64, Legacy, X64, fw=c fu=osap op0=r op1=r r=rax r=rbx rm=ds:rax;UInt64
# shld si,cx,00h
66 0FA4 CE 00, Shld_rm16_r16_imm8, Legacy, INTEL386, op0=rw op1=r op2=r rw=si r=cx
# shld [rax],bx,00h
66 0FA4 18 00, Shld_rm16_r16_imm8, Legacy, INTEL386, op0=rw op1=r op2=r r=rax r=bx rwm=ds:rax;UInt16
# shld esi,ecx,00h
0FA4 CE 00, Shld_rm32_r32_imm8, Legacy, INTEL386, op0=rw op1=r op2=r w=rsi r=esi r=ecx
# shld [rax],ebx,00h
0FA4 18 00, Shld_rm32_r32_imm8, Legacy, INTEL386, op0=rw op1=r op2=r r=rax r=ebx rwm=ds:rax;UInt32
# shld rsi,rcx,00h
48 0FA4 CE 00, Shld_rm64_r64_imm8, Legacy, X64, op0=rw op1=r op2=r rw=rsi r=rcx
# shld [rax],rbx,00h
48 0FA4 18 00, Shld_rm64_r64_imm8, Legacy, X64, op0=rw op1=r op2=r r=rax r=rbx rwm=ds:rax;UInt64
# shld si,cx,01h
66 0FA4 CE 01, Shld_rm16_r16_imm8, Legacy, INTEL386, fw=coszp fu=a op0=rw op1=r op2=r rw=si r=cx
# shld [rax],bx,01h
66 0FA4 18 01, Shld_rm16_r16_imm8, Legacy, INTEL386, fw=coszp fu=a op0=rw op1=r op2=r r=rax r=bx rwm=ds:rax;UInt16
# shld esi,ecx,01h
0FA4 CE 01, Shld_rm32_r32_imm8, Legacy, INTEL386, fw=coszp fu=a op0=rw op1=r op2=r w=rsi r=esi r=ecx
# shld [rax],ebx,01h
0FA4 18 01, Shld_rm32_r32_imm8, Legacy, INTEL386, fw=coszp fu=a op0=rw op1=r op2=r r=rax r=ebx rwm=ds:rax;UInt32
# shld rsi,rcx,01h
48 0FA4 CE 01, Shld_rm64_r64_imm8, Legacy, X64, fw=coszp fu=a op0=rw op1=r op2=r rw=rsi r=rcx
# shld [rax],rbx,01h
48 0FA4 18 01, Shld_rm64_r64_imm8, Legacy, X64, fw=coszp fu=a op0=rw op1=r op2=r r=rax r=rbx rwm=ds:rax;UInt64
# shld si,cx,02h
66 0FA4 CE 02, Shld_rm16_r16_imm8, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r op2=r rw=si r=cx
# shld [rax],bx,02h
66 0FA4 18 02, Shld_rm16_r16_imm8, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r op2=r r=rax r=bx rwm=ds:rax;UInt16
# shld esi,ecx,02h
0FA4 CE 02, Shld_rm32_r32_imm8, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r op2=r w=rsi r=esi r=ecx
# shld [rax],ebx,02h
0FA4 18 02, Shld_rm32_r32_imm8, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r op2=r r=rax r=ebx rwm=ds:rax;UInt32
# shld rsi,rcx,02h
48 0FA4 CE 02, Shld_rm64_r64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r op2=r rw=rsi r=rcx
# shld [rax],rbx,02h
48 0FA4 18 02, Shld_rm64_r64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r op2=r r=rax r=rbx rwm=ds:rax;UInt64
# shld si,cx,20h
66 0FA4 CE 20, Shld_rm16_r16_imm8, Legacy, INTEL386, op0=rw op1=r op2=r rw=si r=cx
# shld [rax],bx,20h
66 0FA4 18 20, Shld_rm16_r16_imm8, Legacy, INTEL386, op0=rw op1=r op2=r r=rax r=bx rwm=ds:rax;UInt16
# shld esi,ecx,20h
0FA4 CE 20, Shld_rm32_r32_imm8, Legacy, INTEL386, op0=rw op1=r op2=r w=rsi r=esi r=ecx
# shld [rax],ebx,20h
0FA4 18 20, Shld_rm32_r32_imm8, Legacy, INTEL386, op0=rw op1=r op2=r r=rax r=ebx rwm=ds:rax;UInt32
# shld rsi,rcx,40h
48 0FA4 CE 40, Shld_rm64_r64_imm8, Legacy, X64, op0=rw op1=r op2=r rw=rsi r=rcx
# shld [rax],rbx,40h
48 0FA4 18 40, Shld_rm64_r64_imm8, Legacy, X64, op0=rw op1=r op2=r r=rax r=rbx rwm=ds:rax;UInt64
# shld rsi,rcx,20h
48 0FA4 CE 20, Shld_rm64_r64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r op2=r rw=rsi r=rcx
# shld [rax],rbx,20h
48 0FA4 18 20, Shld_rm64_r64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r op2=r r=rax r=rbx rwm=ds:rax;UInt64
# shld si,cx,cl
66 0FA5 CE, Shld_rm16_r16_CL, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r op2=r rw=si r=cx r=cl
# shld [rax],bx,cl
66 0FA5 18, Shld_rm16_r16_CL, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r op2=r r=rax r=bx r=cl rwm=ds:rax;UInt16
# shld esi,ecx,cl
0FA5 CE, Shld_rm32_r32_CL, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r op2=r w=rsi r=esi r=ecx r=cl
# shld [rax],ebx,cl
0FA5 18, Shld_rm32_r32_CL, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r op2=r r=rax r=ebx r=cl rwm=ds:rax;UInt32
# shld rsi,rcx,cl
48 0FA5 CE, Shld_rm64_r64_CL, Legacy, X64, fw=cszp fu=ao op0=rw op1=r op2=r rw=rsi r=rcx r=cl
# shld [rax],rbx,cl
48 0FA5 18, Shld_rm64_r64_CL, Legacy, X64, fw=cszp fu=ao op0=rw op1=r op2=r r=rax r=rbx r=cl rwm=ds:rax;UInt64
# pushw gs
66 0FA8, Pushw_GS, Legacy, INTEL386, op0=r rw=xsp r=gs wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 stack=-2
# push gs
0FA8, Pushq_GS, Legacy, X64, op0=r rw=xsp r=gs wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# popw gs
66 0FA9, Popw_GS, Legacy, INTEL386, op0=w rw=xsp w=gs rm=ss:xsp;UInt16 stack=2
# pop gs
0FA9, Popq_GS, Legacy, X64, op0=w rw=xsp w=gs rm=ss:xsp;UInt64 stack=8
# rsm
0FAA, Rsm, Legacy, SMM, priv save-restore fw=acopszidA flow=Return
# bts si,cx
66 0FAB CE, Bts_rm16_r16, Legacy, INTEL386, fw=c fu=osap op0=rw op1=r rw=si r=cx
# bts [rax],bx
66 0FAB 18, Bts_rm16_r16, Legacy, INTEL386, fw=c fu=osap op0=rw op1=r r=rax r=bx rwm=ds:rax;UInt16
# bts esi,ecx
0FAB CE, Bts_rm32_r32, Legacy, INTEL386, fw=c fu=osap op0=rw op1=r w=rsi r=esi r=ecx
# bts [rax],ebx
0FAB 18, Bts_rm32_r32, Legacy, INTEL386, fw=c fu=osap op0=rw op1=r r=rax r=ebx rwm=ds:rax;UInt32
# bts rsi,rcx
48 0FAB CE, Bts_rm64_r64, Legacy, X64, fw=c fu=osap op0=rw op1=r rw=rsi r=rcx
# bts [rax],rbx
48 0FAB 18, Bts_rm64_r64, Legacy, X64, fw=c fu=osap op0=rw op1=r r=rax r=rbx rwm=ds:rax;UInt64
# shrd si,cx,00h
66 0FAC CE 00, Shrd_rm16_r16_imm8, Legacy, INTEL386, op0=rw op1=r op2=r rw=si r=cx
# shrd [rax],bx,00h
66 0FAC 18 00, Shrd_rm16_r16_imm8, Legacy, INTEL386, op0=rw op1=r op2=r r=rax r=bx rwm=ds:rax;UInt16
# shrd esi,ecx,00h
0FAC CE 00, Shrd_rm32_r32_imm8, Legacy, INTEL386, op0=rw op1=r op2=r w=rsi r=esi r=ecx
# shrd [rax],ebx,00h
0FAC 18 00, Shrd_rm32_r32_imm8, Legacy, INTEL386, op0=rw op1=r op2=r r=rax r=ebx rwm=ds:rax;UInt32
# shrd rsi,rcx,00h
48 0FAC CE 00, Shrd_rm64_r64_imm8, Legacy, X64, op0=rw op1=r op2=r rw=rsi r=rcx
# shrd [rax],rbx,00h
48 0FAC 18 00, Shrd_rm64_r64_imm8, Legacy, X64, op0=rw op1=r op2=r r=rax r=rbx rwm=ds:rax;UInt64
# shrd si,cx,01h
66 0FAC CE 01, Shrd_rm16_r16_imm8, Legacy, INTEL386, fw=coszp fu=a op0=rw op1=r op2=r rw=si r=cx
# shrd [rax],bx,01h
66 0FAC 18 01, Shrd_rm16_r16_imm8, Legacy, INTEL386, fw=coszp fu=a op0=rw op1=r op2=r r=rax r=bx rwm=ds:rax;UInt16
# shrd esi,ecx,01h
0FAC CE 01, Shrd_rm32_r32_imm8, Legacy, INTEL386, fw=coszp fu=a op0=rw op1=r op2=r w=rsi r=esi r=ecx
# shrd [rax],ebx,01h
0FAC 18 01, Shrd_rm32_r32_imm8, Legacy, INTEL386, fw=coszp fu=a op0=rw op1=r op2=r r=rax r=ebx rwm=ds:rax;UInt32
# shrd rsi,rcx,01h
48 0FAC CE 01, Shrd_rm64_r64_imm8, Legacy, X64, fw=coszp fu=a op0=rw op1=r op2=r rw=rsi r=rcx
# shrd [rax],rbx,01h
48 0FAC 18 01, Shrd_rm64_r64_imm8, Legacy, X64, fw=coszp fu=a op0=rw op1=r op2=r r=rax r=rbx rwm=ds:rax;UInt64
# shrd si,cx,02h
66 0FAC CE 02, Shrd_rm16_r16_imm8, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r op2=r rw=si r=cx
# shrd [rax],bx,02h
66 0FAC 18 02, Shrd_rm16_r16_imm8, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r op2=r r=rax r=bx rwm=ds:rax;UInt16
# shrd esi,ecx,02h
0FAC CE 02, Shrd_rm32_r32_imm8, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r op2=r w=rsi r=esi r=ecx
# shrd [rax],ebx,02h
0FAC 18 02, Shrd_rm32_r32_imm8, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r op2=r r=rax r=ebx rwm=ds:rax;UInt32
# shrd rsi,rcx,02h
48 0FAC CE 02, Shrd_rm64_r64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r op2=r rw=rsi r=rcx
# shrd [rax],rbx,02h
48 0FAC 18 02, Shrd_rm64_r64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r op2=r r=rax r=rbx rwm=ds:rax;UInt64
# shrd si,cx,20h
66 0FAC CE 20, Shrd_rm16_r16_imm8, Legacy, INTEL386, op0=rw op1=r op2=r rw=si r=cx
# shrd [rax],bx,20h
66 0FAC 18 20, Shrd_rm16_r16_imm8, Legacy, INTEL386, op0=rw op1=r op2=r r=rax r=bx rwm=ds:rax;UInt16
# shrd esi,ecx,20h
0FAC CE 20, Shrd_rm32_r32_imm8, Legacy, INTEL386, op0=rw op1=r op2=r w=rsi r=esi r=ecx
# shrd [rax],ebx,20h
0FAC 18 20, Shrd_rm32_r32_imm8, Legacy, INTEL386, op0=rw op1=r op2=r r=rax r=ebx rwm=ds:rax;UInt32
# shrd rsi,rcx,40h
48 0FAC CE 40, Shrd_rm64_r64_imm8, Legacy, X64, op0=rw op1=r op2=r rw=rsi r=rcx
# shrd [rax],rbx,40h
48 0FAC 18 40, Shrd_rm64_r64_imm8, Legacy, X64, op0=rw op1=r op2=r r=rax r=rbx rwm=ds:rax;UInt64
# shrd rsi,rcx,20h
48 0FAC CE 20, Shrd_rm64_r64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r op2=r rw=rsi r=rcx
# shrd [rax],rbx,20h
48 0FAC 18 20, Shrd_rm64_r64_imm8, Legacy, X64, fw=cszp fu=ao op0=rw op1=r op2=r r=rax r=rbx rwm=ds:rax;UInt64
# shrd si,cx,cl
66 0FAD CE, Shrd_rm16_r16_CL, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r op2=r rw=si r=cx r=cl
# shrd [rax],bx,cl
66 0FAD 18, Shrd_rm16_r16_CL, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r op2=r r=rax r=bx r=cl rwm=ds:rax;UInt16
# shrd esi,ecx,cl
0FAD CE, Shrd_rm32_r32_CL, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r op2=r w=rsi r=esi r=ecx r=cl
# shrd [rax],ebx,cl
0FAD 18, Shrd_rm32_r32_CL, Legacy, INTEL386, fw=cszp fu=ao op0=rw op1=r op2=r r=rax r=ebx r=cl rwm=ds:rax;UInt32
# shrd rsi,rcx,cl
48 0FAD CE, Shrd_rm64_r64_CL, Legacy, X64, fw=cszp fu=ao op0=rw op1=r op2=r rw=rsi r=rcx r=cl
# shrd [rax],rbx,cl
48 0FAD 18, Shrd_rm64_r64_CL, Legacy, X64, fw=cszp fu=ao op0=rw op1=r op2=r r=rax r=rbx r=cl rwm=ds:rax;UInt64
# fxsave [rax]
0FAE 00, Fxsave_m512byte, Legacy, FXSR, save-restore op0=w r=rax wm=ds:rax;Fxsave_512Byte
# fxsave64 [rax]
48 0FAE 00, Fxsave64_m512byte, Legacy, FXSR, save-restore op0=w r=rax wm=ds:rax;Fxsave64_512Byte
# rdfsbase ebp
F3 0FAE C5, Rdfsbase_r32, Legacy, FSGSBASE, op0=w w=rbp
# rdfsbase rbp
F3 48 0FAE C5, Rdfsbase_r64, Legacy, FSGSBASE, op0=w w=rbp
# fxrstor [rax]
0FAE 08, Fxrstor_m512byte, Legacy, FXSR, save-restore op0=r r=rax rm=ds:rax;Fxsave_512Byte
# fxrstor64 [rax]
48 0FAE 08, Fxrstor64_m512byte, Legacy, FXSR, save-restore op0=r r=rax rm=ds:rax;Fxsave64_512Byte
# rdgsbase ebp
F3 0FAE CD, Rdgsbase_r32, Legacy, FSGSBASE, op0=w w=rbp
# rdgsbase rbp
F3 48 0FAE CD, Rdgsbase_r64, Legacy, FSGSBASE, op0=w w=rbp
# ldmxcsr [rax]
0FAE 10, Ldmxcsr_m32, Legacy, SSE, op0=r r=rax rm=ds:rax;UInt32
# wrfsbase ebp
F3 0FAE D5, Wrfsbase_r32, Legacy, FSGSBASE, op0=r r=ebp
# wrfsbase rbp
F3 48 0FAE D5, Wrfsbase_r64, Legacy, FSGSBASE, op0=r r=rbp
# vldmxcsr dword ptr [rax]
C5F8 AE 10, VEX_Vldmxcsr_m32, VEX, AVX, op0=r r=rax rm=ds:rax;UInt32
# stmxcsr [rax]
0FAE 18, Stmxcsr_m32, Legacy, SSE, op0=w r=rax wm=ds:rax;UInt32
# wrgsbase ebp
F3 0FAE DD, Wrgsbase_r32, Legacy, FSGSBASE, op0=r r=ebp
# wrgsbase rbp
F3 48 0FAE DD, Wrgsbase_r64, Legacy, FSGSBASE, op0=r r=rbp
# vstmxcsr dword ptr [rax]
C5F8 AE 18, VEX_Vstmxcsr_m32, VEX, AVX, op0=w r=rax wm=ds:rax;UInt32
# xsave [rdi]
0FAE 27, Xsave_mem, Legacy, XSAVE, save-restore op0=rw r=eax;edx r=rdi rwm=ds:rdi;Xsave
# xsave64 [rdi]
48 0FAE 27, Xsave64_mem, Legacy, XSAVE, save-restore op0=rw r=eax;edx r=rdi rwm=ds:rdi;Xsave64
# ptwrite ebp
F3 0FAE E5, Ptwrite_rm32, Legacy, PTWRITE, op0=r r=ebp
# ptwrite dword ptr [rax]
F3 0FAE 20, Ptwrite_rm32, Legacy, PTWRITE, op0=r r=rax rm=ds:rax;UInt32
# ptwrite rbp
F3 48 0FAE E5, Ptwrite_rm64, Legacy, PTWRITE, op0=r r=rbp
# ptwrite qword ptr [rax]
F3 48 0FAE 20, Ptwrite_rm64, Legacy, PTWRITE, op0=r r=rax rm=ds:rax;UInt64
# xrstor [rdi]
0FAE 2F, Xrstor_mem, Legacy, XSAVE, save-restore op0=r r=eax;edx r=rdi rm=ds:rdi;Xsave
# xrstor64 [rdi]
48 0FAE 2F, Xrstor64_mem, Legacy, XSAVE, save-restore op0=r r=eax;edx r=rdi rm=ds:rdi;Xsave64
# xsaveopt [rdi]
0FAE 37, Xsaveopt_mem, Legacy, XSAVEOPT, save-restore op0=rw r=eax;edx r=rdi rwm=ds:rdi;Xsave
# xsaveopt64 [rdi]
48 0FAE 37, Xsaveopt64_mem, Legacy, XSAVEOPT, save-restore op0=rw r=eax;edx r=rdi rwm=ds:rdi;Xsave64
# clwb [rax]
66 0FAE 30, Clwb_m8, Legacy, CLWB, op0=r r=rax rm=ds:rax;UInt8
# clflush [rax]
0FAE 38, Clflush_m8, Legacy, CLFSH, op0=r r=rax rm=ds:rax;UInt8
# clflushopt [rax]
66 0FAE 38, Clflushopt_m8, Legacy, CLFLUSHOPT, op0=r r=rax rm=ds:rax;UInt8
# lfence
0FAE E8, Lfence, Legacy, SSE2,
# lfence
0FAE E9, Lfence_E9, Legacy, SSE2,
# lfence
0FAE EA, Lfence_EA, Legacy, SSE2,
# lfence
0FAE EB, Lfence_EB, Legacy, SSE2,
# lfence
0FAE EC, Lfence_EC, Legacy, SSE2,
# lfence
0FAE ED, Lfence_ED, Legacy, SSE2,
# lfence
0FAE EE, Lfence_EE, Legacy, SSE2,
# lfence
0FAE EF, Lfence_EF, Legacy, SSE2,
# mfence
0FAE F0, Mfence, Legacy, SSE2,
# mfence
0FAE F1, Mfence_F1, Legacy, SSE2,
# mfence
0FAE F2, Mfence_F2, Legacy, SSE2,
# mfence
0FAE F3, Mfence_F3, Legacy, SSE2,
# mfence
0FAE F4, Mfence_F4, Legacy, SSE2,
# mfence
0FAE F5, Mfence_F5, Legacy, SSE2,
# mfence
0FAE F6, Mfence_F6, Legacy, SSE2,
# mfence
0FAE F7, Mfence_F7, Legacy, SSE2,
# sfence
0FAE F8, Sfence, Legacy, SSE,
# sfence
0FAE F9, Sfence_F9, Legacy, SSE,
# sfence
0FAE FA, Sfence_FA, Legacy, SSE,
# sfence
0FAE FB, Sfence_FB, Legacy, SSE,
# sfence
0FAE FC, Sfence_FC, Legacy, SSE,
# sfence
0FAE FD, Sfence_FD, Legacy, SSE,
# sfence
0FAE FE, Sfence_FE, Legacy, SSE,
# sfence
0FAE FF, Sfence_FF, Legacy, SSE,
# imul cx,si
66 0FAF CE, Imul_r16_rm16, Legacy, INTEL386, fw=oc fu=apsz op0=rw op1=r rw=cx r=si
# imul bx,[rax]
66 0FAF 18, Imul_r16_rm16, Legacy, INTEL386, fw=oc fu=apsz op0=rw op1=r rw=bx r=rax rm=ds:rax;Int16
# imul ecx,esi
0FAF CE, Imul_r32_rm32, Legacy, INTEL386, fw=oc fu=apsz op0=rw op1=r w=rcx r=ecx r=esi
# imul ebx,[rax]
0FAF 18, Imul_r32_rm32, Legacy, INTEL386, fw=oc fu=apsz op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;Int32
# imul rcx,rsi
48 0FAF CE, Imul_r64_rm64, Legacy, X64, fw=oc fu=apsz op0=rw op1=r rw=rcx r=rsi
# imul rbx,[rax]
48 0FAF 18, Imul_r64_rm64, Legacy, X64, fw=oc fu=apsz op0=rw op1=r rw=rbx r=rax rm=ds:rax;Int64
# cmpxchg dh,cl
0FB0 CE, Cmpxchg_rm8_r8, Legacy, INTEL486, op0=rcw op1=r fw=acopsz rcw=dh r=cl rcw=al
# cmpxchg [rax],bh
0FB0 38, Cmpxchg_rm8_r8, Legacy, INTEL486, op0=rcw op1=r fw=acopsz r=rax r=bh rcw=al rcwm=ds:rax;UInt8
# cmpxchg si,cx
66 0FB1 CE, Cmpxchg_rm16_r16, Legacy, INTEL486, op0=rcw op1=r fw=acopsz rcw=si r=cx rcw=ax
# cmpxchg [rax],bx
66 0FB1 18, Cmpxchg_rm16_r16, Legacy, INTEL486, op0=rcw op1=r fw=acopsz r=rax r=bx rcw=ax rcwm=ds:rax;UInt16
# cmpxchg esi,ecx
0FB1 CE, Cmpxchg_rm32_r32, Legacy, INTEL486, op0=rcw op1=r fw=acopsz cw=rsi r=esi r=ecx r=eax cw=rax
# cmpxchg [rax],ebx
0FB1 18, Cmpxchg_rm32_r32, Legacy, INTEL486, op0=rcw op1=r fw=acopsz r=rax r=ebx r=eax cw=rax rcwm=ds:rax;UInt32
# cmpxchg rsi,rcx
48 0FB1 CE, Cmpxchg_rm64_r64, Legacy, X64, op0=rcw op1=r fw=acopsz rcw=rsi r=rcx rcw=rax
# cmpxchg [rax],rbx
48 0FB1 18, Cmpxchg_rm64_r64, Legacy, X64, op0=rcw op1=r fw=acopsz r=rax r=rbx rcw=rax rcwm=ds:rax;UInt64
# lss bx,[rax]
66 0FB2 18, Lss_r16_m1616, Legacy, INTEL386, op0=w op1=r w=ss;bx r=rax rm=ds:rax;SegPtr16
# lss ebx,[rax]
0FB2 18, Lss_r32_m1632, Legacy, INTEL386, op0=w op1=r w=ss;rbx r=rax rm=ds:rax;SegPtr32
# lss rbx,[rax]
48 0FB2 18, Lss_r64_m1664, Legacy, X64, op0=w op1=r w=ss;rbx r=rax rm=ds:rax;SegPtr64
# btr si,cx
66 0FB3 CE, Btr_rm16_r16, Legacy, INTEL386, fw=c fu=osap op0=rw op1=r rw=si r=cx
# btr [rax],bx
66 0FB3 18, Btr_rm16_r16, Legacy, INTEL386, fw=c fu=osap op0=rw op1=r r=rax r=bx rwm=ds:rax;UInt16
# btr esi,ecx
0FB3 CE, Btr_rm32_r32, Legacy, INTEL386, fw=c fu=osap op0=rw op1=r w=rsi r=esi r=ecx
# btr [rax],ebx
0FB3 18, Btr_rm32_r32, Legacy, INTEL386, fw=c fu=osap op0=rw op1=r r=rax r=ebx rwm=ds:rax;UInt32
# btr rsi,rcx
48 0FB3 CE, Btr_rm64_r64, Legacy, X64, fw=c fu=osap op0=rw op1=r rw=rsi r=rcx
# btr [rax],rbx
48 0FB3 18, Btr_rm64_r64, Legacy, X64, fw=c fu=osap op0=rw op1=r r=rax r=rbx rwm=ds:rax;UInt64
# lfs bx,[rax]
66 0FB4 18, Lfs_r16_m1616, Legacy, INTEL386, op0=w op1=r w=fs;bx r=rax rm=ds:rax;SegPtr16
# lfs ebx,[rax]
0FB4 18, Lfs_r32_m1632, Legacy, INTEL386, op0=w op1=r w=fs;rbx r=rax rm=ds:rax;SegPtr32
# lfs rbx,[rax]
48 0FB4 18, Lfs_r64_m1664, Legacy, X64, op0=w op1=r w=fs;rbx r=rax rm=ds:rax;SegPtr64
# lgs bx,[rax]
66 0FB5 18, Lgs_r16_m1616, Legacy, INTEL386, op0=w op1=r w=gs;bx r=rax rm=ds:rax;SegPtr16
# lgs ebx,[rax]
0FB5 18, Lgs_r32_m1632, Legacy, INTEL386, op0=w op1=r w=gs;rbx r=rax rm=ds:rax;SegPtr32
# lgs rbx,[rax]
48 0FB5 18, Lgs_r64_m1664, Legacy, X64, op0=w op1=r w=gs;rbx r=rax rm=ds:rax;SegPtr64
# movzx cx,dh
66 0FB6 CE, Movzx_r16_rm8, Legacy, INTEL386, op0=w op1=r w=cx r=dh
# movzx bx,byte ptr [rax]
66 0FB6 18, Movzx_r16_rm8, Legacy, INTEL386, op0=w op1=r w=bx r=rax rm=ds:rax;UInt8
# movzx ecx,dh
0FB6 CE, Movzx_r32_rm8, Legacy, INTEL386, op0=w op1=r w=rcx r=dh
# movzx ebx,byte ptr [rax]
0FB6 18, Movzx_r32_rm8, Legacy, INTEL386, op0=w op1=r w=rbx r=rax rm=ds:rax;UInt8
# movzx rcx,sil
48 0FB6 CE, Movzx_r64_rm8, Legacy, X64, op0=w op1=r w=rcx r=sil
# movzx rbx,byte ptr [rax]
48 0FB6 18, Movzx_r64_rm8, Legacy, X64, op0=w op1=r w=rbx r=rax rm=ds:rax;UInt8
# movzx cx,si
66 0FB7 CE, Movzx_r16_rm16, Legacy, INTEL386, op0=w op1=r w=cx r=si
# movzx bx,word ptr [rax]
66 0FB7 18, Movzx_r16_rm16, Legacy, INTEL386, op0=w op1=r w=bx r=rax rm=ds:rax;UInt16
# movzx ecx,si
0FB7 CE, Movzx_r32_rm16, Legacy, INTEL386, op0=w op1=r w=rcx r=si
# movzx ebx,word ptr [rax]
0FB7 18, Movzx_r32_rm16, Legacy, INTEL386, op0=w op1=r w=rbx r=rax rm=ds:rax;UInt16
# movzx rcx,si
48 0FB7 CE, Movzx_r64_rm16, Legacy, X64, op0=w op1=r w=rcx r=si
# movzx rbx,word ptr [rax]
48 0FB7 18, Movzx_r64_rm16, Legacy, X64, op0=w op1=r w=rbx r=rax rm=ds:rax;UInt16
# popcnt cx,si
66 F3 0FB8 CE, Popcnt_r16_rm16, Legacy, POPCNT, fw=z fc=acops op0=w op1=r w=cx r=si
# popcnt bx,[rax]
66 F3 0FB8 18, Popcnt_r16_rm16, Legacy, POPCNT, fw=z fc=acops op0=w op1=r w=bx r=rax rm=ds:rax;UInt16
# popcnt ecx,esi
F3 0FB8 CE, Popcnt_r32_rm32, Legacy, POPCNT, fw=z fc=acops op0=w op1=r w=rcx r=esi
# popcnt ebx,[rax]
F3 0FB8 18, Popcnt_r32_rm32, Legacy, POPCNT, fw=z fc=acops op0=w op1=r w=rbx r=rax rm=ds:rax;UInt32
# popcnt rcx,rsi
F3 48 0FB8 CE, Popcnt_r64_rm64, Legacy, POPCNT, fw=z fc=acops op0=w op1=r w=rcx r=rsi
# popcnt rbx,[rax]
F3 48 0FB8 18, Popcnt_r64_rm64, Legacy, POPCNT, fw=z fc=acops op0=w op1=r w=rbx r=rax rm=ds:rax;UInt64
# ud1 cx,si
66 0FB9 CE, Ud1_r16_rm16, Legacy, INTEL286, flow=Exception op0=n op1=n
# ud1 bx,[rax]
66 0FB9 18, Ud1_r16_rm16, Legacy, INTEL286, flow=Exception op0=n op1=n
# ud1 ecx,esi
0FB9 CE, Ud1_r32_rm32, Legacy, INTEL386, flow=Exception op0=n op1=n
# ud1 ebx,[rax]
0FB9 18, Ud1_r32_rm32, Legacy, INTEL386, flow=Exception op0=n op1=n
# ud1 rcx,rsi
48 0FB9 CE, Ud1_r64_rm64, Legacy, X64, flow=Exception op0=n op1=n
# ud1 rbx,[rax]
48 0FB9 18, Ud1_r64_rm64, Legacy, X64, flow=Exception op0=n op1=n
# bt bp,5Ah
66 0FBA E5 5A, Bt_rm16_imm8, Legacy, INTEL386, fw=c fu=osap op0=r op1=r r=bp
# bt word ptr [rax],5Ah
66 0FBA 20 5A, Bt_rm16_imm8, Legacy, INTEL386, fw=c fu=osap op0=r op1=r r=rax rm=ds:rax;UInt16
# bt ebp,5Ah
0FBA E5 5A, Bt_rm32_imm8, Legacy, INTEL386, fw=c fu=osap op0=r op1=r r=ebp
# bt dword ptr [rax],5Ah
0FBA 20 5A, Bt_rm32_imm8, Legacy, INTEL386, fw=c fu=osap op0=r op1=r r=rax rm=ds:rax;UInt32
# bt rbp,5Ah
48 0FBA E5 5A, Bt_rm64_imm8, Legacy, X64, fw=c fu=osap op0=r op1=r r=rbp
# bt qword ptr [rax],5Ah
48 0FBA 20 5A, Bt_rm64_imm8, Legacy, X64, fw=c fu=osap op0=r op1=r r=rax rm=ds:rax;UInt64
# bts si,0A5h
66 0FBA EE A5, Bts_rm16_imm8, Legacy, INTEL386, fw=c fu=osap op0=rw op1=r rw=si
# bts word ptr [rax],0A5h
66 0FBA 28 A5, Bts_rm16_imm8, Legacy, INTEL386, fw=c fu=osap op0=rw op1=r r=rax rwm=ds:rax;UInt16
# bts esi,0A5h
0FBA EE A5, Bts_rm32_imm8, Legacy, INTEL386, fw=c fu=osap op0=rw op1=r w=rsi r=esi
# bts dword ptr [rax],0A5h
0FBA 28 A5, Bts_rm32_imm8, Legacy, INTEL386, fw=c fu=osap op0=rw op1=r r=rax rwm=ds:rax;UInt32
# bts rsi,0A5h
48 0FBA EE A5, Bts_rm64_imm8, Legacy, X64, fw=c fu=osap op0=rw op1=r rw=rsi
# bts qword ptr [rax],0A5h
48 0FBA 28 A5, Bts_rm64_imm8, Legacy, X64, fw=c fu=osap op0=rw op1=r r=rax rwm=ds:rax;UInt64
# btr di,5Ah
66 0FBA F7 5A, Btr_rm16_imm8, Legacy, INTEL386, fw=c fu=osap op0=rw op1=r rw=di
# btr word ptr [rax],5Ah
66 0FBA 30 5A, Btr_rm16_imm8, Legacy, INTEL386, fw=c fu=osap op0=rw op1=r r=rax rwm=ds:rax;UInt16
# btr edi,5Ah
0FBA F7 5A, Btr_rm32_imm8, Legacy, INTEL386, fw=c fu=osap op0=rw op1=r w=rdi r=edi
# btr dword ptr [rax],5Ah
0FBA 30 5A, Btr_rm32_imm8, Legacy, INTEL386, fw=c fu=osap op0=rw op1=r r=rax rwm=ds:rax;UInt32
# btr rdi,5Ah
48 0FBA F7 5A, Btr_rm64_imm8, Legacy, X64, fw=c fu=osap op0=rw op1=r rw=rdi
# btr qword ptr [rax],5Ah
48 0FBA 30 5A, Btr_rm64_imm8, Legacy, X64, fw=c fu=osap op0=rw op1=r r=rax rwm=ds:rax;UInt64
# btc ax,0A5h
66 0FBA F8 A5, Btc_rm16_imm8, Legacy, INTEL386, fw=c fu=osap op0=rw op1=r rw=ax
# btc word ptr [rax],0A5h
66 0FBA 38 A5, Btc_rm16_imm8, Legacy, INTEL386, fw=c fu=osap op0=rw op1=r r=rax rwm=ds:rax;UInt16
# btc eax,0A5h
0FBA F8 A5, Btc_rm32_imm8, Legacy, INTEL386, fw=c fu=osap op0=rw op1=r w=rax r=eax
# btc dword ptr [rax],0A5h
0FBA 38 A5, Btc_rm32_imm8, Legacy, INTEL386, fw=c fu=osap op0=rw op1=r r=rax rwm=ds:rax;UInt32
# btc r8,0A5h
49 0FBA F8 A5, Btc_rm64_imm8, Legacy, X64, fw=c fu=osap op0=rw op1=r rw=r8
# btc qword ptr [rax],0A5h
48 0FBA 38 A5, Btc_rm64_imm8, Legacy, X64, fw=c fu=osap op0=rw op1=r r=rax rwm=ds:rax;UInt64
# btc si,cx
66 0FBB CE, Btc_rm16_r16, Legacy, INTEL386, fw=c fu=osap op0=rw op1=r rw=si r=cx
# btc [rax],bx
66 0FBB 18, Btc_rm16_r16, Legacy, INTEL386, fw=c fu=osap op0=rw op1=r r=rax r=bx rwm=ds:rax;UInt16
# btc esi,ecx
0FBB CE, Btc_rm32_r32, Legacy, INTEL386, fw=c fu=osap op0=rw op1=r w=rsi r=esi r=ecx
# btc [rax],ebx
0FBB 18, Btc_rm32_r32, Legacy, INTEL386, fw=c fu=osap op0=rw op1=r r=rax r=ebx rwm=ds:rax;UInt32
# btc rsi,rcx
48 0FBB CE, Btc_rm64_r64, Legacy, X64, fw=c fu=osap op0=rw op1=r rw=rsi r=rcx
# btc [rax],rbx
48 0FBB 18, Btc_rm64_r64, Legacy, X64, fw=c fu=osap op0=rw op1=r r=rax r=rbx rwm=ds:rax;UInt64
# bsf cx,si
66 0FBC CE, Bsf_r16_rm16, Legacy, INTEL386, op0=cw op1=r fw=z fu=cosap cw=cx r=si
# bsf bx,[rax]
66 0FBC 18, Bsf_r16_rm16, Legacy, INTEL386, op0=cw op1=r fw=z fu=cosap cw=bx r=rax rm=ds:rax;UInt16
# bsf ecx,esi
0FBC CE, Bsf_r32_rm32, Legacy, INTEL386, op0=cw op1=r fw=z fu=cosap cw=rcx r=esi
# bsf ebx,[rax]
0FBC 18, Bsf_r32_rm32, Legacy, INTEL386, op0=cw op1=r fw=z fu=cosap cw=rbx r=rax rm=ds:rax;UInt32
# bsf rcx,rsi
48 0FBC CE, Bsf_r64_rm64, Legacy, X64, op0=cw op1=r fw=z fu=cosap cw=rcx r=rsi
# bsf rbx,[rax]
48 0FBC 18, Bsf_r64_rm64, Legacy, X64, op0=cw op1=r fw=z fu=cosap cw=rbx r=rax rm=ds:rax;UInt64
# bsr cx,si
66 0FBD CE, Bsr_r16_rm16, Legacy, INTEL386, op0=cw op1=r fw=z fu=cosap cw=cx r=si
# bsr bx,[rax]
66 0FBD 18, Bsr_r16_rm16, Legacy, INTEL386, op0=cw op1=r fw=z fu=cosap cw=bx r=rax rm=ds:rax;UInt16
# bsr ecx,esi
0FBD CE, Bsr_r32_rm32, Legacy, INTEL386, op0=cw op1=r fw=z fu=cosap cw=rcx r=esi
# bsr ebx,[rax]
0FBD 18, Bsr_r32_rm32, Legacy, INTEL386, op0=cw op1=r fw=z fu=cosap cw=rbx r=rax rm=ds:rax;UInt32
# bsr rcx,rsi
48 0FBD CE, Bsr_r64_rm64, Legacy, X64, op0=cw op1=r fw=z fu=cosap cw=rcx r=rsi
# bsr rbx,[rax]
48 0FBD 18, Bsr_r64_rm64, Legacy, X64, op0=cw op1=r fw=z fu=cosap cw=rbx r=rax rm=ds:rax;UInt64
# movsx cx,dh
66 0FBE CE, Movsx_r16_rm8, Legacy, INTEL386, op0=w op1=r w=cx r=dh
# movsx bx,byte ptr [rax]
66 0FBE 18, Movsx_r16_rm8, Legacy, INTEL386, op0=w op1=r w=bx r=rax rm=ds:rax;Int8
# movsx ecx,dh
0FBE CE, Movsx_r32_rm8, Legacy, INTEL386, op0=w op1=r w=rcx r=dh
# movsx ebx,byte ptr [rax]
0FBE 18, Movsx_r32_rm8, Legacy, INTEL386, op0=w op1=r w=rbx r=rax rm=ds:rax;Int8
# movsx rcx,sil
48 0FBE CE, Movsx_r64_rm8, Legacy, X64, op0=w op1=r w=rcx r=sil
# movsx rbx,byte ptr [rax]
48 0FBE 18, Movsx_r64_rm8, Legacy, X64, op0=w op1=r w=rbx r=rax rm=ds:rax;Int8
# movsx cx,si
66 0FBF CE, Movsx_r16_rm16, Legacy, INTEL386, op0=w op1=r w=cx r=si
# movsx bx,word ptr [rax]
66 0FBF 18, Movsx_r16_rm16, Legacy, INTEL386, op0=w op1=r w=bx r=rax rm=ds:rax;Int16
# movsx ecx,si
0FBF CE, Movsx_r32_rm16, Legacy, INTEL386, op0=w op1=r w=rcx r=si
# movsx ebx,word ptr [rax]
0FBF 18, Movsx_r32_rm16, Legacy, INTEL386, op0=w op1=r w=rbx r=rax rm=ds:rax;Int16
# movsx rcx,si
48 0FBF CE, Movsx_r64_rm16, Legacy, X64, op0=w op1=r w=rcx r=si
# movsx rbx,word ptr [rax]
48 0FBF 18, Movsx_r64_rm16, Legacy, X64, op0=w op1=r w=rbx r=rax rm=ds:rax;Int16
# tzcnt cx,si
66 F3 0FBC CE, Tzcnt_r16_rm16, Legacy, BMI1, fw=cz fu=aops op0=w op1=r w=cx r=si
# tzcnt bx,[rax]
66 F3 0FBC 18, Tzcnt_r16_rm16, Legacy, BMI1, fw=cz fu=aops op0=w op1=r w=bx r=rax rm=ds:rax;UInt16
# tzcnt ecx,esi
F3 0FBC CE, Tzcnt_r32_rm32, Legacy, BMI1, fw=cz fu=aops op0=w op1=r w=rcx r=esi
# tzcnt ebx,[rax]
F3 0FBC 18, Tzcnt_r32_rm32, Legacy, BMI1, fw=cz fu=aops op0=w op1=r w=rbx r=rax rm=ds:rax;UInt32
# tzcnt rcx,rsi
F3 48 0FBC CE, Tzcnt_r64_rm64, Legacy, BMI1, fw=cz fu=aops op0=w op1=r w=rcx r=rsi
# tzcnt rbx,[rax]
F3 48 0FBC 18, Tzcnt_r64_rm64, Legacy, BMI1, fw=cz fu=aops op0=w op1=r w=rbx r=rax rm=ds:rax;UInt64
# lzcnt cx,si
66 F3 0FBD CE, Lzcnt_r16_rm16, Legacy, LZCNT, fw=cz fu=aops op0=w op1=r w=cx r=si
# lzcnt bx,[rax]
66 F3 0FBD 18, Lzcnt_r16_rm16, Legacy, LZCNT, fw=cz fu=aops op0=w op1=r w=bx r=rax rm=ds:rax;UInt16
# lzcnt ecx,esi
F3 0FBD CE, Lzcnt_r32_rm32, Legacy, LZCNT, fw=cz fu=aops op0=w op1=r w=rcx r=esi
# lzcnt ebx,[rax]
F3 0FBD 18, Lzcnt_r32_rm32, Legacy, LZCNT, fw=cz fu=aops op0=w op1=r w=rbx r=rax rm=ds:rax;UInt32
# lzcnt rcx,rsi
F3 48 0FBD CE, Lzcnt_r64_rm64, Legacy, LZCNT, fw=cz fu=aops op0=w op1=r w=rcx r=rsi
# lzcnt rbx,[rax]
F3 48 0FBD 18, Lzcnt_r64_rm64, Legacy, LZCNT, fw=cz fu=aops op0=w op1=r w=rbx r=rax rm=ds:rax;UInt64
# xadd dh,cl
0FC0 CE, Xadd_rm8_r8, Legacy, INTEL486, fw=oszacp op0=rw op1=rw rw=dh rw=cl
# xadd [rax],bh
0FC0 38, Xadd_rm8_r8, Legacy, INTEL486, fw=oszacp op0=rw op1=rw r=rax rw=bh rwm=ds:rax;UInt8
# xadd si,cx
66 0FC1 CE, Xadd_rm16_r16, Legacy, INTEL486, fw=oszacp op0=rw op1=rw rw=si rw=cx
# xadd [rax],bx
66 0FC1 18, Xadd_rm16_r16, Legacy, INTEL486, fw=oszacp op0=rw op1=rw r=rax rw=bx rwm=ds:rax;UInt16
# xadd esi,ecx
0FC1 CE, Xadd_rm32_r32, Legacy, INTEL486, fw=oszacp op0=rw op1=rw w=rsi r=esi w=rcx r=ecx
# xadd [rax],ebx
0FC1 18, Xadd_rm32_r32, Legacy, INTEL486, fw=oszacp op0=rw op1=rw r=rax w=rbx r=ebx rwm=ds:rax;UInt32
# xadd rsi,rcx
48 0FC1 CE, Xadd_rm64_r64, Legacy, X64, fw=oszacp op0=rw op1=rw rw=rsi rw=rcx
# xadd [rax],rbx
48 0FC1 18, Xadd_rm64_r64, Legacy, X64, fw=oszacp op0=rw op1=rw r=rax rw=rbx rwm=ds:rax;UInt64
# cmpps xmm1,xmm5,0A5h
0FC2 CD A5, Cmpps_xmm_xmmm128_imm8, Legacy, SSE, op0=rw op1=r op2=r rw=xmm1 r=xmm5
# cmpps xmm1,[rax],0A5h
0FC2 08 A5, Cmpps_xmm_xmmm128_imm8, Legacy, SSE, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vcmpps xmm2,xmm6,xmm3,0A5h
C5C8 C2 D3 A5, VEX_Vcmpps_xmm_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vcmpps xmm2,xmm6,[rax],0A5h
C5C8 C2 10 A5, VEX_Vcmpps_xmm_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vcmpps ymm2,ymm6,ymm3,0A5h
C5CC C2 D3 A5, VEX_Vcmpps_ymm_ymm_ymmm256_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3
# vcmpps ymm2,ymm6,[rax],0A5h
C5CC C2 10 A5, VEX_Vcmpps_ymm_ymm_ymmm256_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vcmpps k2,xmm6,[rax+10h],0A5h
62 F14C08 C2 50 01 A5, EVEX_Vcmpps_kr_k1_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vcmpps k2{k3},xmm6,xmm3,0A5h
62 F14C0B C2 D3 A5, EVEX_Vcmpps_kr_k1_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=k2 r=k3 r=xmm6 r=xmm3
# vcmpps k2,ymm6,[rax+20h],0A5h
62 F14C28 C2 50 01 A5, EVEX_Vcmpps_kr_k1_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vcmpps k2{k3},ymm6,ymm3,0A5h
62 F14C2B C2 D3 A5, EVEX_Vcmpps_kr_k1_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=k2 r=k3 r=ymm6 r=ymm3
# vcmpps k2,zmm6,[rax+40h],0A5h
62 F14C48 C2 50 01 A5, EVEX_Vcmpps_kr_k1_zmm_zmmm512b32_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vcmpps k2{k3},zmm6,zmm3,0A5h {sae}
62 F14C5B C2 D3 A5, EVEX_Vcmpps_kr_k1_zmm_zmmm512b32_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=k2 r=k3 r=zmm6 r=zmm3
# cmppd xmm1,xmm5,0A5h
66 0FC2 CD A5, Cmppd_xmm_xmmm128_imm8, Legacy, SSE2, op0=rw op1=r op2=r rw=xmm1 r=xmm5
# cmppd xmm1,[rax],0A5h
66 0FC2 08 A5, Cmppd_xmm_xmmm128_imm8, Legacy, SSE2, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vcmppd xmm2,xmm6,xmm3,0A5h
C5C9 C2 D3 A5, VEX_Vcmppd_xmm_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vcmppd xmm2,xmm6,[rax],0A5h
C5C9 C2 10 A5, VEX_Vcmppd_xmm_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vcmppd ymm2,ymm6,ymm3,0A5h
C5CD C2 D3 A5, VEX_Vcmppd_ymm_ymm_ymmm256_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3
# vcmppd ymm2,ymm6,[rax],0A5h
C5CD C2 10 A5, VEX_Vcmppd_ymm_ymm_ymmm256_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vcmppd k2,xmm6,[rax+10h],0A5h
62 F1CD08 C2 50 01 A5, EVEX_Vcmppd_kr_k1_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vcmppd k2{k3},xmm6,xmm3,0A5h
62 F1CD0B C2 D3 A5, EVEX_Vcmppd_kr_k1_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=k2 r=k3 r=xmm6 r=xmm3
# vcmppd k2,ymm6,[rax+20h],0A5h
62 F1CD28 C2 50 01 A5, EVEX_Vcmppd_kr_k1_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vcmppd k2{k3},ymm6,ymm3,0A5h
62 F1CD2B C2 D3 A5, EVEX_Vcmppd_kr_k1_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=k2 r=k3 r=ymm6 r=ymm3
# vcmppd k2,zmm6,[rax+40h],0A5h
62 F1CD48 C2 50 01 A5, EVEX_Vcmppd_kr_k1_zmm_zmmm512b64_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vcmppd k2{k3},zmm6,zmm3,0A5h {sae}
62 F1CD5B C2 D3 A5, EVEX_Vcmppd_kr_k1_zmm_zmmm512b64_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=k2 r=k3 r=zmm6 r=zmm3
# cmpss xmm1,xmm5,0A5h
F3 0FC2 CD A5, Cmpss_xmm_xmmm32_imm8, Legacy, SSE, op0=rw op1=r op2=r rw=xmm1 r=xmm5
# cmpss xmm1,dword ptr [rax],0A5h
F3 0FC2 08 A5, Cmpss_xmm_xmmm32_imm8, Legacy, SSE, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;Float32
# vcmpss xmm2,xmm6,xmm3,0A5h
C5CA C2 D3 A5, VEX_Vcmpss_xmm_xmm_xmmm32_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vcmpss xmm2,xmm6,dword ptr [rax],0A5h
C5CA C2 10 A5, VEX_Vcmpss_xmm_xmm_xmmm32_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float32
# vcmpss k2,xmm6,dword ptr [rax+4],0A5h
62 F14E08 C2 50 01 A5, EVEX_Vcmpss_kr_k1_xmm_xmmm32_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=k2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vcmpss k2{k3},xmm6,xmm3,0A5h
62 F14E0B C2 D3 A5, EVEX_Vcmpss_kr_k1_xmm_xmmm32_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=k2 r=k3 r=xmm6 r=xmm3
# cmpsd xmm1,xmm5,0A5h
F2 0FC2 CD A5, Cmpsd_xmm_xmmm64_imm8, Legacy, SSE2, op0=rw op1=r op2=r rw=xmm1 r=xmm5
# cmpsd xmm1,qword ptr [rax],0A5h
F2 0FC2 08 A5, Cmpsd_xmm_xmmm64_imm8, Legacy, SSE2, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;Float64
# vcmpsd xmm2,xmm6,xmm3,0A5h
C5CB C2 D3 A5, VEX_Vcmpsd_xmm_xmm_xmmm64_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vcmpsd xmm2,xmm6,qword ptr [rax],0A5h
C5CB C2 10 A5, VEX_Vcmpsd_xmm_xmm_xmmm64_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float64
# vcmpsd k2,xmm6,qword ptr [rax+8],0A5h
62 F1CF08 C2 50 01 A5, EVEX_Vcmpsd_kr_k1_xmm_xmmm64_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=k2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vcmpsd k2{k3},xmm6,xmm3,0A5h
62 F1CF0B C2 D3 A5, EVEX_Vcmpsd_kr_k1_xmm_xmmm64_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=k2 r=k3 r=xmm6 r=xmm3
# movnti [rax],ebx
0FC3 18, Movnti_m32_r32, Legacy, SSE2, op0=w op1=r r=rax r=ebx wm=ds:rax;UInt32
# movnti [rax],rbx
48 0FC3 18, Movnti_m64_r64, Legacy, SSE2, op0=w op1=r r=rax r=rbx wm=ds:rax;UInt64
# pinsrw mm1,ebp,0A5h
0FC4 CD A5, Pinsrw_mm_r32m16_imm8, Legacy, SSE, op0=rw op1=r op2=r rw=mm1 r=bp
# pinsrw mm1,r15d,0A5h
41 0FC4 CF A5, Pinsrw_mm_r32m16_imm8, Legacy, SSE, op0=rw op1=r op2=r rw=mm1 r=r15w
# pinsrw mm1,word ptr [rax],0A5h
0FC4 08 A5, Pinsrw_mm_r32m16_imm8, Legacy, SSE, op0=rw op1=r op2=r rw=mm1 r=rax rm=ds:rax;UInt16
# pinsrw mm1,rbp,0A5h
48 0FC4 CD A5, Pinsrw_mm_r64m16_imm8, Legacy, SSE, op0=rw op1=r op2=r rw=mm1 r=bp
# pinsrw mm1,r15,0A5h
49 0FC4 CF A5, Pinsrw_mm_r64m16_imm8, Legacy, SSE, op0=rw op1=r op2=r rw=mm1 r=r15w
# pinsrw mm1,word ptr [rax],0A5h
48 0FC4 08 A5, Pinsrw_mm_r64m16_imm8, Legacy, SSE, op0=rw op1=r op2=r rw=mm1 r=rax rm=ds:rax;UInt16
# pinsrw xmm1,ebp,0A5h
66 0FC4 CD A5, Pinsrw_xmm_r32m16_imm8, Legacy, SSE2, op0=rw op1=r op2=r rw=xmm1 r=bp
# pinsrw xmm1,r15d,0A5h
66 41 0FC4 CF A5, Pinsrw_xmm_r32m16_imm8, Legacy, SSE2, op0=rw op1=r op2=r rw=xmm1 r=r15w
# pinsrw xmm1,word ptr [rax],0A5h
66 0FC4 08 A5, Pinsrw_xmm_r32m16_imm8, Legacy, SSE2, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;UInt16
# pinsrw xmm1,rbp,0A5h
66 48 0FC4 CD A5, Pinsrw_xmm_r64m16_imm8, Legacy, SSE2, op0=rw op1=r op2=r rw=xmm1 r=bp
# pinsrw xmm1,r15,0A5h
66 49 0FC4 CF A5, Pinsrw_xmm_r64m16_imm8, Legacy, SSE2, op0=rw op1=r op2=r rw=xmm1 r=r15w
# pinsrw xmm1,word ptr [rax],0A5h
66 48 0FC4 08 A5, Pinsrw_xmm_r64m16_imm8, Legacy, SSE2, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;UInt16
# vpinsrw xmm2,xmm6,ebx,0A5h
C5C9 C4 D3 A5, VEX_Vpinsrw_xmm_xmm_r32m16_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=bx
# vpinsrw xmm2,xmm6,r15d,0A5h
C4C149 C4 D7 A5, VEX_Vpinsrw_xmm_xmm_r32m16_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=r15w
# vpinsrw xmm2,xmm6,word ptr [rax],0A5h
C5C9 C4 10 A5, VEX_Vpinsrw_xmm_xmm_r32m16_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;UInt16
# vpinsrw xmm2,xmm6,ebx,0A5h
C4E1C9 C4 D3 A5, VEX_Vpinsrw_xmm_xmm_r64m16_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=bx
# vpinsrw xmm2,xmm6,r15d,0A5h
C4C1C9 C4 D7 A5, VEX_Vpinsrw_xmm_xmm_r64m16_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=r15w
# vpinsrw xmm2,xmm6,word ptr [rax],0A5h
C4E1C9 C4 10 A5, VEX_Vpinsrw_xmm_xmm_r64m16_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;UInt16
# vpinsrw xmm2,xmm6,ebx,0A5h
62 F14D08 C4 D3 A5, EVEX_Vpinsrw_xmm_xmm_r32m16_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=bx
# vpinsrw xmm2,xmm6,r15d,0A5h
62 D14D08 C4 D7 A5, EVEX_Vpinsrw_xmm_xmm_r32m16_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=r15w
# vpinsrw xmm2,xmm6,word ptr [rax+2],0A5h
62 F14D08 C4 50 01 A5, EVEX_Vpinsrw_xmm_xmm_r32m16_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+2;UInt16
# vpinsrw xmm2,xmm6,ebx,0A5h
62 F1CD08 C4 D3 A5, EVEX_Vpinsrw_xmm_xmm_r64m16_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=bx
# vpinsrw xmm2,xmm6,r15d,0A5h
62 D1CD08 C4 D7 A5, EVEX_Vpinsrw_xmm_xmm_r64m16_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=r15w
# vpinsrw xmm2,xmm6,word ptr [rax+2],0A5h
62 F1CD08 C4 50 01 A5, EVEX_Vpinsrw_xmm_xmm_r64m16_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+2;UInt16
# pextrw ecx,mm5,0A5h
0FC5 CD A5, Pextrw_r32_mm_imm8, Legacy, SSE, op0=w op1=r op2=r w=rcx r=mm5
# pextrw rcx,mm5,0A5h
48 0FC5 CD A5, Pextrw_r64_mm_imm8, Legacy, SSE, op0=w op1=r op2=r w=rcx r=mm5
# pextrw ecx,xmm5,0A5h
66 0FC5 CD A5, Pextrw_r32_xmm_imm8, Legacy, SSE2, op0=w op1=r op2=r w=rcx r=xmm5
# pextrw rcx,xmm5,0A5h
66 48 0FC5 CD A5, Pextrw_r64_xmm_imm8, Legacy, SSE2, op0=w op1=r op2=r w=rcx r=xmm5
# vpextrw edx,xmm3,0A5h
C5F9 C5 D3 A5, VEX_Vpextrw_r32_xmm_imm8, VEX, AVX, op0=w op1=r op2=r w=rdx r=xmm3
# vpextrw rdx,xmm3,0A5h
C4E1F9 C5 D3 A5, VEX_Vpextrw_r64_xmm_imm8, VEX, AVX, op0=w op1=r op2=r w=rdx r=xmm3
# vpextrw edx,xmm3,0A5h
62 F17D08 C5 D3 A5, EVEX_Vpextrw_r32_xmm_imm8, EVEX, AVX512BW, op0=w op1=r op2=r w=rdx r=xmm3
# vpextrw rdx,xmm3,0A5h
62 F1FD08 C5 D3 A5, EVEX_Vpextrw_r64_xmm_imm8, EVEX, AVX512BW, op0=w op1=r op2=r w=rdx r=xmm3
# shufps xmm1,xmm5,0A5h
0FC6 CD A5, Shufps_xmm_xmmm128_imm8, Legacy, SSE, op0=rw op1=r op2=r rw=xmm1 r=xmm5
# shufps xmm1,[rax],0A5h
0FC6 08 A5, Shufps_xmm_xmmm128_imm8, Legacy, SSE, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vshufps xmm2,xmm6,xmm3,0A5h
C5C8 C6 D3 A5, VEX_Vshufps_xmm_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vshufps xmm2,xmm6,[rax],0A5h
C5C8 C6 10 A5, VEX_Vshufps_xmm_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vshufps ymm2,ymm6,ymm3,0A5h
C5CC C6 D3 A5, VEX_Vshufps_ymm_ymm_ymmm256_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3
# vshufps ymm2,ymm6,[rax],0A5h
C5CC C6 10 A5, VEX_Vshufps_ymm_ymm_ymmm256_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vshufps xmm2,xmm6,[rax+10h],0A5h
62 F14C08 C6 50 01 A5, EVEX_Vshufps_xmm_k1z_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vshufps xmm2{k3},xmm6,xmm3,0A5h
62 F14C0B C6 D3 A5, EVEX_Vshufps_xmm_k1z_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vshufps xmm2{k3}{z},xmm6,xmm3,0A5h
62 F14C8B C6 D3 A5, EVEX_Vshufps_xmm_k1z_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vshufps ymm2,ymm6,[rax+20h],0A5h
62 F14C28 C6 50 01 A5, EVEX_Vshufps_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vshufps ymm2{k3},ymm6,ymm3,0A5h
62 F14C2B C6 D3 A5, EVEX_Vshufps_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vshufps ymm2{k3}{z},ymm6,ymm3,0A5h
62 F14CAB C6 D3 A5, EVEX_Vshufps_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vshufps zmm2,zmm6,[rax+40h],0A5h
62 F14C48 C6 50 01 A5, EVEX_Vshufps_zmm_k1z_zmm_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vshufps zmm2{k3},zmm6,zmm3,0A5h
62 F14C4B C6 D3 A5, EVEX_Vshufps_zmm_k1z_zmm_zmmm512b32_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r op3=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vshufps zmm2{k3}{z},zmm6,zmm3,0A5h
62 F14CCB C6 D3 A5, EVEX_Vshufps_zmm_k1z_zmm_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=zmm6 r=zmm3
# shufpd xmm1,xmm5,0A5h
66 0FC6 CD A5, Shufpd_xmm_xmmm128_imm8, Legacy, SSE2, op0=rw op1=r op2=r rw=xmm1 r=xmm5
# shufpd xmm1,[rax],0A5h
66 0FC6 08 A5, Shufpd_xmm_xmmm128_imm8, Legacy, SSE2, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vshufpd xmm2,xmm6,xmm3,0A5h
C5C9 C6 D3 A5, VEX_Vshufpd_xmm_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vshufpd xmm2,xmm6,[rax],0A5h
C5C9 C6 10 A5, VEX_Vshufpd_xmm_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vshufpd ymm2,ymm6,ymm3,0A5h
C5CD C6 D3 A5, VEX_Vshufpd_ymm_ymm_ymmm256_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3
# vshufpd ymm2,ymm6,[rax],0A5h
C5CD C6 10 A5, VEX_Vshufpd_ymm_ymm_ymmm256_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vshufpd xmm2,xmm6,[rax+10h],0A5h
62 F1CD08 C6 50 01 A5, EVEX_Vshufpd_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vshufpd xmm18{k3},xmm14,xmm3,0A5h
62 E18D0B C6 D3 A5, EVEX_Vshufpd_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vshufpd xmm2{k3}{z},xmm6,xmm3,0A5h
62 F1CD8B C6 D3 A5, EVEX_Vshufpd_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vshufpd ymm2,ymm6,[rax+20h],0A5h
62 F1CD28 C6 50 01 A5, EVEX_Vshufpd_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vshufpd ymm18{k3},ymm14,ymm3,0A5h
62 E18D2B C6 D3 A5, EVEX_Vshufpd_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vshufpd ymm2{k3}{z},ymm6,ymm3,0A5h
62 F1CDAB C6 D3 A5, EVEX_Vshufpd_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vshufpd zmm2,zmm6,[rax+40h],0A5h
62 F1CD48 C6 50 01 A5, EVEX_Vshufpd_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vshufpd zmm18{k3},zmm14,zmm3,0A5h
62 E18D4B C6 D3 A5, EVEX_Vshufpd_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r op3=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vshufpd zmm2{k3}{z},zmm6,zmm3,0A5h
62 F1CDCB C6 D3 A5, EVEX_Vshufpd_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=zmm6 r=zmm3
# cmpxchg8b qword ptr [rax]
0FC7 08, Cmpxchg8b_m64, Legacy, CX8, fw=z op0=rcw r=edx;eax cw=rdx;rax cr=ecx;ebx r=rax rcwm=ds:rax;UInt64
# cmpxchg16b [rax]
48 0FC7 08, Cmpxchg16b_m128, Legacy, CMPXCHG16B, fw=z op0=rcw rcw=rdx;rax cr=rcx;rbx r=rax rcwm=ds:rax;UInt128
# xrstors [rdi]
0FC7 1F, Xrstors_mem, Legacy, XSAVES, save-restore priv op0=r r=eax;edx r=rdi rm=ds:rdi;Xsave
# xrstors64 [rdi]
48 0FC7 1F, Xrstors64_mem, Legacy, XSAVES, save-restore priv op0=r r=eax;edx r=rdi rm=ds:rdi;Xsave64
# xsavec [rdi]
0FC7 27, Xsavec_mem, Legacy, XSAVEC, save-restore op0=w r=eax;edx r=rdi wm=ds:rdi;Xsave
# xsavec64 [rdi]
48 0FC7 27, Xsavec64_mem, Legacy, XSAVEC, save-restore op0=w r=eax;edx r=rdi wm=ds:rdi;Xsave64
# xsaves [rdi]
0FC7 2F, Xsaves_mem, Legacy, XSAVES, save-restore priv op0=w r=eax;edx r=rdi wm=ds:rdi;Xsave
# xsaves64 [rdi]
48 0FC7 2F, Xsaves64_mem, Legacy, XSAVES, save-restore priv op0=w r=eax;edx r=rdi wm=ds:rdi;Xsave64
# vmptrld qword ptr [rax]
0FC7 30, Vmptrld_m64, Legacy, VMX, fw=cz fc=aops priv op0=r r=rax rm=ds:rax;UInt64
# vmclear qword ptr [rax]
66 0FC7 30, Vmclear_m64, Legacy, VMX, fw=cz fc=aops priv op0=r r=rax rm=ds:rax;UInt64
# vmxon qword ptr [rax]
F3 0FC7 30, Vmxon_m64, Legacy, VMX, fw=cz fc=aops priv op0=r r=rax rm=ds:rax;UInt64
# rdrand dx
66 0FC7 F2, Rdrand_r16, Legacy, RDRAND, fw=c fc=oszap op0=w w=dx
# rdrand edx
0FC7 F2, Rdrand_r32, Legacy, RDRAND, fw=c fc=oszap op0=w w=rdx
# rdrand rdx
48 0FC7 F2, Rdrand_r64, Legacy, RDRAND, fw=c fc=oszap op0=w w=rdx
# vmptrst qword ptr [rax]
0FC7 38, Vmptrst_m64, Legacy, VMX, fc=oszacp priv op0=w r=rax wm=ds:rax;UInt64
# rdseed dx
66 0FC7 FA, Rdseed_r16, Legacy, RDSEED, fw=c fc=oszap op0=w w=dx
# rdseed edx
0FC7 FA, Rdseed_r32, Legacy, RDSEED, fw=c fc=oszap op0=w w=rdx
# rdseed rdx
48 0FC7 FA, Rdseed_r64, Legacy, RDSEED, fw=c fc=oszap op0=w w=rdx
# rdpid rdx
F3 0FC7 FA, Rdpid_r64, Legacy, RDPID, op0=w w=rdx
# bswap ax
66 0FC8, Bswap_r16, Legacy, INTEL486, op0=rw rw=ax
# bswap r8w
66 41 0FC8, Bswap_r16, Legacy, INTEL486, op0=rw rw=r8w
# bswap eax
0FC8, Bswap_r32, Legacy, INTEL486, op0=rw w=rax r=eax
# bswap r8d
41 0FC8, Bswap_r32, Legacy, INTEL486, op0=rw w=r8 r=r8d
# bswap rax
48 0FC8, Bswap_r64, Legacy, X64, op0=rw rw=rax
# bswap r8
49 0FC8, Bswap_r64, Legacy, X64, op0=rw rw=r8
# bswap cx
66 0FC9, Bswap_r16, Legacy, INTEL486, op0=rw rw=cx
# bswap r9w
66 41 0FC9, Bswap_r16, Legacy, INTEL486, op0=rw rw=r9w
# bswap ecx
0FC9, Bswap_r32, Legacy, INTEL486, op0=rw w=rcx r=ecx
# bswap r9d
41 0FC9, Bswap_r32, Legacy, INTEL486, op0=rw w=r9 r=r9d
# bswap rcx
48 0FC9, Bswap_r64, Legacy, X64, op0=rw rw=rcx
# bswap r9
49 0FC9, Bswap_r64, Legacy, X64, op0=rw rw=r9
# bswap dx
66 0FCA, Bswap_r16, Legacy, INTEL486, op0=rw rw=dx
# bswap r10w
66 41 0FCA, Bswap_r16, Legacy, INTEL486, op0=rw rw=r10w
# bswap edx
0FCA, Bswap_r32, Legacy, INTEL486, op0=rw w=rdx r=edx
# bswap r10d
41 0FCA, Bswap_r32, Legacy, INTEL486, op0=rw w=r10 r=r10d
# bswap rdx
48 0FCA, Bswap_r64, Legacy, X64, op0=rw rw=rdx
# bswap r10
49 0FCA, Bswap_r64, Legacy, X64, op0=rw rw=r10
# bswap bx
66 0FCB, Bswap_r16, Legacy, INTEL486, op0=rw rw=bx
# bswap r11w
66 41 0FCB, Bswap_r16, Legacy, INTEL486, op0=rw rw=r11w
# bswap ebx
0FCB, Bswap_r32, Legacy, INTEL486, op0=rw w=rbx r=ebx
# bswap r11d
41 0FCB, Bswap_r32, Legacy, INTEL486, op0=rw w=r11 r=r11d
# bswap rbx
48 0FCB, Bswap_r64, Legacy, X64, op0=rw rw=rbx
# bswap r11
49 0FCB, Bswap_r64, Legacy, X64, op0=rw rw=r11
# bswap sp
66 0FCC, Bswap_r16, Legacy, INTEL486, op0=rw rw=sp
# bswap r12w
66 41 0FCC, Bswap_r16, Legacy, INTEL486, op0=rw rw=r12w
# bswap esp
0FCC, Bswap_r32, Legacy, INTEL486, op0=rw w=rsp r=esp
# bswap r12d
41 0FCC, Bswap_r32, Legacy, INTEL486, op0=rw w=r12 r=r12d
# bswap rsp
48 0FCC, Bswap_r64, Legacy, X64, op0=rw rw=rsp
# bswap r12
49 0FCC, Bswap_r64, Legacy, X64, op0=rw rw=r12
# bswap bp
66 0FCD, Bswap_r16, Legacy, INTEL486, op0=rw rw=bp
# bswap r13w
66 41 0FCD, Bswap_r16, Legacy, INTEL486, op0=rw rw=r13w
# bswap ebp
0FCD, Bswap_r32, Legacy, INTEL486, op0=rw w=rbp r=ebp
# bswap r13d
41 0FCD, Bswap_r32, Legacy, INTEL486, op0=rw w=r13 r=r13d
# bswap rbp
48 0FCD, Bswap_r64, Legacy, X64, op0=rw rw=rbp
# bswap r13
49 0FCD, Bswap_r64, Legacy, X64, op0=rw rw=r13
# bswap si
66 0FCE, Bswap_r16, Legacy, INTEL486, op0=rw rw=si
# bswap r14w
66 41 0FCE, Bswap_r16, Legacy, INTEL486, op0=rw rw=r14w
# bswap esi
0FCE, Bswap_r32, Legacy, INTEL486, op0=rw w=rsi r=esi
# bswap r14d
41 0FCE, Bswap_r32, Legacy, INTEL486, op0=rw w=r14 r=r14d
# bswap rsi
48 0FCE, Bswap_r64, Legacy, X64, op0=rw rw=rsi
# bswap r14
49 0FCE, Bswap_r64, Legacy, X64, op0=rw rw=r14
# bswap di
66 0FCF, Bswap_r16, Legacy, INTEL486, op0=rw rw=di
# bswap r15w
66 41 0FCF, Bswap_r16, Legacy, INTEL486, op0=rw rw=r15w
# bswap edi
0FCF, Bswap_r32, Legacy, INTEL486, op0=rw w=rdi r=edi
# bswap r15d
41 0FCF, Bswap_r32, Legacy, INTEL486, op0=rw w=r15 r=r15d
# bswap rdi
48 0FCF, Bswap_r64, Legacy, X64, op0=rw rw=rdi
# bswap r15
49 0FCF, Bswap_r64, Legacy, X64, op0=rw rw=r15
# addsubpd xmm1,xmm5
66 0FD0 CD, Addsubpd_xmm_xmmm128, Legacy, SSE3, op0=rw op1=r rw=xmm1 r=xmm5
# addsubpd xmm1,[rax]
66 0FD0 08, Addsubpd_xmm_xmmm128, Legacy, SSE3, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vaddsubpd xmm2,xmm6,xmm3
C5C9 D0 D3, VEX_Vaddsubpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vaddsubpd xmm2,xmm6,[rax]
C5C9 D0 10, VEX_Vaddsubpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vaddsubpd ymm2,ymm6,ymm3
C5CD D0 D3, VEX_Vaddsubpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vaddsubpd ymm2,ymm6,[rax]
C5CD D0 10, VEX_Vaddsubpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# addsubps xmm1,xmm5
F2 0FD0 CD, Addsubps_xmm_xmmm128, Legacy, SSE3, op0=rw op1=r rw=xmm1 r=xmm5
# addsubps xmm1,[rax]
F2 0FD0 08, Addsubps_xmm_xmmm128, Legacy, SSE3, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vaddsubps xmm2,xmm6,xmm3
C5CB D0 D3, VEX_Vaddsubps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vaddsubps xmm2,xmm6,[rax]
C5CB D0 10, VEX_Vaddsubps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vaddsubps ymm2,ymm6,ymm3
C5CF D0 D3, VEX_Vaddsubps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vaddsubps ymm2,ymm6,[rax]
C5CF D0 10, VEX_Vaddsubps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# psrlw mm1,mm5
0FD1 CD, Psrlw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# psrlw mm1,[rax]
0FD1 08, Psrlw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt16
# psrlw xmm1,xmm5
66 0FD1 CD, Psrlw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# psrlw xmm1,[rax]
66 0FD1 08, Psrlw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt16
# vpsrlw xmm2,xmm6,xmm3
C5C9 D1 D3, VEX_Vpsrlw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpsrlw xmm2,xmm6,[rax]
C5C9 D1 10, VEX_Vpsrlw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt16
# vpsrlw ymm2,ymm6,xmm3
C5CD D1 D3, VEX_Vpsrlw_ymm_ymm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=xmm3
# vpsrlw ymm2,ymm6,[rax]
C5CD D1 10, VEX_Vpsrlw_ymm_ymm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed128_UInt16
# vpsrlw xmm2,xmm6,[rax+10h]
62 F14D08 D1 50 01, EVEX_Vpsrlw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpsrlw xmm2{k3},xmm6,xmm3
62 F14D0B D1 D3, EVEX_Vpsrlw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpsrlw xmm18{k3}{z},xmm14,xmm3
62 E10D8B D1 D3, EVEX_Vpsrlw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpsrlw ymm2,ymm6,[rax+10h]
62 F14D28 D1 50 01, EVEX_Vpsrlw_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpsrlw ymm2{k3},ymm6,xmm3
62 F14D2B D1 D3, EVEX_Vpsrlw_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=xmm3
# vpsrlw ymm18{k3}{z},ymm14,xmm3
62 E10DAB D1 D3, EVEX_Vpsrlw_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=xmm3
# vpsrlw zmm2,zmm6,[rax+10h]
62 F14D48 D1 50 01, EVEX_Vpsrlw_zmm_k1z_zmm_xmmm128, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpsrlw zmm2{k3},zmm6,xmm3
62 F14D4B D1 D3, EVEX_Vpsrlw_zmm_k1z_zmm_xmmm128, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=xmm3
# vpsrlw zmm18{k3}{z},zmm14,xmm3
62 E10DCB D1 D3, EVEX_Vpsrlw_zmm_k1z_zmm_xmmm128, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=xmm3
# psrld mm1,mm5
0FD2 CD, Psrld_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# psrld mm1,[rax]
0FD2 08, Psrld_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt32
# psrld xmm1,xmm5
66 0FD2 CD, Psrld_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# psrld xmm1,[rax]
66 0FD2 08, Psrld_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt32
# vpsrld xmm2,xmm6,xmm3
C5C9 D2 D3, VEX_Vpsrld_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpsrld xmm2,xmm6,[rax]
C5C9 D2 10, VEX_Vpsrld_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt32
# vpsrld ymm2,ymm6,xmm3
C5CD D2 D3, VEX_Vpsrld_ymm_ymm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=xmm3
# vpsrld ymm2,ymm6,[rax]
C5CD D2 10, VEX_Vpsrld_ymm_ymm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed128_UInt32
# vpsrld xmm2,xmm6,[rax+10h]
62 F14D08 D2 50 01, EVEX_Vpsrld_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpsrld xmm2{k3},xmm6,xmm3
62 F14D0B D2 D3, EVEX_Vpsrld_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpsrld xmm18{k3}{z},xmm14,xmm3
62 E10D8B D2 D3, EVEX_Vpsrld_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpsrld ymm2,ymm6,[rax+10h]
62 F14D28 D2 50 01, EVEX_Vpsrld_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpsrld ymm2{k3},ymm6,xmm3
62 F14D2B D2 D3, EVEX_Vpsrld_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=xmm3
# vpsrld ymm18{k3}{z},ymm14,xmm3
62 E10DAB D2 D3, EVEX_Vpsrld_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=xmm3
# vpsrld zmm2,zmm6,[rax+10h]
62 F14D48 D2 50 01, EVEX_Vpsrld_zmm_k1z_zmm_xmmm128, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpsrld zmm2{k3},zmm6,xmm3
62 F14D4B D2 D3, EVEX_Vpsrld_zmm_k1z_zmm_xmmm128, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=xmm3
# vpsrld zmm18{k3}{z},zmm14,xmm3
62 E10DCB D2 D3, EVEX_Vpsrld_zmm_k1z_zmm_xmmm128, EVEX, AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=xmm3
# psrlq mm1,mm5
0FD3 CD, Psrlq_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# psrlq mm1,[rax]
0FD3 08, Psrlq_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;UInt64
# psrlq xmm1,xmm5
66 0FD3 CD, Psrlq_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# psrlq xmm1,[rax]
66 0FD3 08, Psrlq_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt64
# vpsrlq xmm2,xmm6,xmm3
C5C9 D3 D3, VEX_Vpsrlq_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpsrlq xmm2,xmm6,[rax]
C5C9 D3 10, VEX_Vpsrlq_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt64
# vpsrlq ymm2,ymm6,xmm3
C5CD D3 D3, VEX_Vpsrlq_ymm_ymm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=xmm3
# vpsrlq ymm2,ymm6,[rax]
C5CD D3 10, VEX_Vpsrlq_ymm_ymm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed128_UInt64
# vpsrlq xmm2,xmm6,[rax+10h]
62 F1CD08 D3 50 01, EVEX_Vpsrlq_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpsrlq xmm2{k3},xmm6,xmm3
62 F1CD0B D3 D3, EVEX_Vpsrlq_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpsrlq xmm18{k3}{z},xmm14,xmm3
62 E18D8B D3 D3, EVEX_Vpsrlq_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpsrlq ymm2,ymm6,[rax+10h]
62 F1CD28 D3 50 01, EVEX_Vpsrlq_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpsrlq ymm2{k3},ymm6,xmm3
62 F1CD2B D3 D3, EVEX_Vpsrlq_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=xmm3
# vpsrlq ymm18{k3}{z},ymm14,xmm3
62 E18DAB D3 D3, EVEX_Vpsrlq_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=xmm3
# vpsrlq zmm2,zmm6,[rax+10h]
62 F1CD48 D3 50 01, EVEX_Vpsrlq_zmm_k1z_zmm_xmmm128, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpsrlq zmm2{k3},zmm6,xmm3
62 F1CD4B D3 D3, EVEX_Vpsrlq_zmm_k1z_zmm_xmmm128, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=xmm3
# vpsrlq zmm18{k3}{z},zmm14,xmm3
62 E18DCB D3 D3, EVEX_Vpsrlq_zmm_k1z_zmm_xmmm128, EVEX, AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=xmm3
# paddq mm1,mm5
0FD4 CD, Paddq_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# paddq mm1,[rax]
0FD4 08, Paddq_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;UInt64
# paddq xmm1,xmm5
66 0FD4 CD, Paddq_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# paddq xmm1,[rax]
66 0FD4 08, Paddq_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt64
# vpaddq xmm2,xmm6,xmm3
C5C9 D4 D3, VEX_Vpaddq_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpaddq xmm2,xmm6,[rax]
C5C9 D4 10, VEX_Vpaddq_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt64
# vpaddq ymm2,ymm6,ymm3
C5CD D4 D3, VEX_Vpaddq_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpaddq ymm2,ymm6,[rax]
C5CD D4 10, VEX_Vpaddq_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt64
# vpaddq xmm2,xmm6,[rax+10h]
62 F1CD08 D4 50 01, EVEX_Vpaddq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpaddq xmm18{k3},xmm14,xmm3
62 E18D0B D4 D3, EVEX_Vpaddq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpaddq xmm2{k3}{z},xmm6,xmm3
62 F1CD8B D4 D3, EVEX_Vpaddq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpaddq ymm2,ymm6,[rax+20h]
62 F1CD28 D4 50 01, EVEX_Vpaddq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpaddq ymm18{k3},ymm14,ymm3
62 E18D2B D4 D3, EVEX_Vpaddq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpaddq ymm2{k3}{z},ymm6,ymm3
62 F1CDAB D4 D3, EVEX_Vpaddq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpaddq zmm2,zmm6,[rax+40h]
62 F1CD48 D4 50 01, EVEX_Vpaddq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpaddq zmm18{k3},zmm14,zmm3
62 E18D4B D4 D3, EVEX_Vpaddq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpaddq zmm2{k3}{z},zmm6,zmm3
62 F1CDCB D4 D3, EVEX_Vpaddq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# pmullw mm1,mm5
0FD5 CD, Pmullw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# pmullw mm1,[rax]
0FD5 08, Pmullw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_Int16
# pmullw xmm1,xmm5
66 0FD5 CD, Pmullw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# pmullw xmm1,[rax]
66 0FD5 08, Pmullw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int16
# vpmullw xmm2,xmm6,xmm3
C5C9 D5 D3, VEX_Vpmullw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpmullw xmm2,xmm6,[rax]
C5C9 D5 10, VEX_Vpmullw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int16
# vpmullw ymm2,ymm6,ymm3
C5CD D5 D3, VEX_Vpmullw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpmullw ymm2,ymm6,[rax]
C5CD D5 10, VEX_Vpmullw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int16
# vpmullw xmm2,xmm6,[rax+10h]
62 F14D08 D5 50 01, EVEX_Vpmullw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int16
# vpmullw xmm2{k3},xmm6,xmm3
62 F14D0B D5 D3, EVEX_Vpmullw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpmullw xmm18{k3}{z},xmm14,xmm3
62 E10D8B D5 D3, EVEX_Vpmullw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpmullw ymm2,ymm6,[rax+20h]
62 F14D28 D5 50 01, EVEX_Vpmullw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int16
# vpmullw ymm2{k3},ymm6,ymm3
62 F14D2B D5 D3, EVEX_Vpmullw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpmullw ymm18{k3}{z},ymm14,ymm3
62 E10DAB D5 D3, EVEX_Vpmullw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpmullw zmm2,zmm6,[rax+40h]
62 F14D48 D5 50 01, EVEX_Vpmullw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int16
# vpmullw zmm2{k3},zmm6,zmm3
62 F14D4B D5 D3, EVEX_Vpmullw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpmullw zmm18{k3}{z},zmm14,zmm3
62 E10DCB D5 D3, EVEX_Vpmullw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# movq xmm5,xmm1
66 0FD6 CD, Movq_xmmm64_xmm, Legacy, SSE2, op0=w op1=r w=xmm5 r=xmm1
# movq qword ptr [rax],xmm1
66 0FD6 08, Movq_xmmm64_xmm, Legacy, SSE2, op0=w op1=r r=rax r=xmm1 wm=ds:rax;UInt64
# vmovq xmm5,xmm1
C5F9 D6 CD, VEX_Vmovq_xmmm64_xmm, VEX, AVX, op0=w op1=r w=vmm5 r=xmm1
# vmovq qword ptr [rax],xmm2
C5F9 D6 10, VEX_Vmovq_xmmm64_xmm, VEX, AVX, op0=w op1=r r=rax r=xmm2 wm=ds:rax;UInt64
# vmovq xmm3,xmm2
62 F1FD08 D6 D3, EVEX_Vmovq_xmmm64_xmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vmovq qword ptr [rax+8],xmm2
62 F1FD08 D6 50 01, EVEX_Vmovq_xmmm64_xmm, EVEX, AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+8;UInt64
# movq2dq xmm1,mm5
F3 0FD6 CD, Movq2dq_xmm_mm, Legacy, SSE2, op0=w op1=r w=xmm1 r=mm5
# movdq2q mm1,xmm5
F2 0FD6 CD, Movdq2q_mm_xmm, Legacy, SSE2, op0=w op1=r w=mm1 r=xmm5
# pmovmskb ecx,mm5
0FD7 CD, Pmovmskb_r32_mm, Legacy, SSE, op0=w op1=r w=rcx r=mm5
# pmovmskb rcx,mm5
48 0FD7 CD, Pmovmskb_r64_mm, Legacy, SSE, op0=w op1=r w=rcx r=mm5
# pmovmskb ecx,xmm5
66 0FD7 CD, Pmovmskb_r32_xmm, Legacy, SSE2, op0=w op1=r w=rcx r=xmm5
# pmovmskb rcx,xmm5
66 48 0FD7 CD, Pmovmskb_r64_xmm, Legacy, SSE2, op0=w op1=r w=rcx r=xmm5
# vpmovmskb ecx,xmm5
C5F9 D7 CD, VEX_Vpmovmskb_r32_xmm, VEX, AVX, op0=w op1=r w=rcx r=xmm5
# vpmovmskb rcx,xmm5
C4E1F9 D7 CD, VEX_Vpmovmskb_r64_xmm, VEX, AVX, op0=w op1=r w=rcx r=xmm5
# vpmovmskb ecx,ymm5
C5FD D7 CD, VEX_Vpmovmskb_r32_ymm, VEX, AVX2, op0=w op1=r w=rcx r=ymm5
# vpmovmskb rcx,ymm5
C4E1FD D7 CD, VEX_Vpmovmskb_r64_ymm, VEX, AVX2, op0=w op1=r w=rcx r=ymm5
# psubusb mm1,mm5
0FD8 CD, Psubusb_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# psubusb mm1,[rax]
0FD8 08, Psubusb_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt8
# psubusb xmm1,xmm5
66 0FD8 CD, Psubusb_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# psubusb xmm1,[rax]
66 0FD8 08, Psubusb_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt8
# vpsubusb xmm2,xmm6,xmm3
C5C9 D8 D3, VEX_Vpsubusb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpsubusb xmm2,xmm6,[rax]
C5C9 D8 10, VEX_Vpsubusb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt8
# vpsubusb ymm2,ymm6,ymm3
C5CD D8 D3, VEX_Vpsubusb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpsubusb ymm2,ymm6,[rax]
C5CD D8 10, VEX_Vpsubusb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt8
# vpsubusb xmm2,xmm6,[rax+10h]
62 F14D08 D8 50 01, EVEX_Vpsubusb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vpsubusb xmm2{k3},xmm6,xmm3
62 F14D0B D8 D3, EVEX_Vpsubusb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpsubusb xmm18{k3}{z},xmm14,xmm3
62 E10D8B D8 D3, EVEX_Vpsubusb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpsubusb ymm2,ymm6,[rax+20h]
62 F14D28 D8 50 01, EVEX_Vpsubusb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vpsubusb ymm2{k3},ymm6,ymm3
62 F14D2B D8 D3, EVEX_Vpsubusb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpsubusb ymm18{k3}{z},ymm14,ymm3
62 E10DAB D8 D3, EVEX_Vpsubusb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpsubusb zmm2,zmm6,[rax+40h]
62 F14D48 D8 50 01, EVEX_Vpsubusb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vpsubusb zmm2{k3},zmm6,zmm3
62 F14D4B D8 D3, EVEX_Vpsubusb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpsubusb zmm18{k3}{z},zmm14,zmm3
62 E10DCB D8 D3, EVEX_Vpsubusb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# psubusw mm1,mm5
0FD9 CD, Psubusw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# psubusw mm1,[rax]
0FD9 08, Psubusw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt16
# psubusw xmm1,xmm5
66 0FD9 CD, Psubusw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# psubusw xmm1,[rax]
66 0FD9 08, Psubusw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt16
# vpsubusw xmm2,xmm6,xmm3
C5C9 D9 D3, VEX_Vpsubusw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpsubusw xmm2,xmm6,[rax]
C5C9 D9 10, VEX_Vpsubusw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt16
# vpsubusw ymm2,ymm6,ymm3
C5CD D9 D3, VEX_Vpsubusw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpsubusw ymm2,ymm6,[rax]
C5CD D9 10, VEX_Vpsubusw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt16
# vpsubusw xmm2,xmm6,[rax+10h]
62 F14D08 D9 50 01, EVEX_Vpsubusw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpsubusw xmm2{k3},xmm6,xmm3
62 F14D0B D9 D3, EVEX_Vpsubusw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpsubusw xmm18{k3}{z},xmm14,xmm3
62 E10D8B D9 D3, EVEX_Vpsubusw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpsubusw ymm2,ymm6,[rax+20h]
62 F14D28 D9 50 01, EVEX_Vpsubusw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpsubusw ymm2{k3},ymm6,ymm3
62 F14D2B D9 D3, EVEX_Vpsubusw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpsubusw ymm18{k3}{z},ymm14,ymm3
62 E10DAB D9 D3, EVEX_Vpsubusw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpsubusw zmm2,zmm6,[rax+40h]
62 F14D48 D9 50 01, EVEX_Vpsubusw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpsubusw zmm2{k3},zmm6,zmm3
62 F14D4B D9 D3, EVEX_Vpsubusw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpsubusw zmm18{k3}{z},zmm14,zmm3
62 E10DCB D9 D3, EVEX_Vpsubusw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# pminub mm1,mm5
0FDA CD, Pminub_mm_mmm64, Legacy, SSE, op0=rw op1=r rw=mm1 r=mm5
# pminub mm1,[rax]
0FDA 08, Pminub_mm_mmm64, Legacy, SSE, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt8
# pminub xmm1,xmm5
66 0FDA CD, Pminub_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# pminub xmm1,[rax]
66 0FDA 08, Pminub_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt8
# vpminub xmm2,xmm6,xmm3
C5C9 DA D3, VEX_Vpminub_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpminub xmm2,xmm6,[rax]
C5C9 DA 10, VEX_Vpminub_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt8
# vpminub ymm2,ymm6,ymm3
C5CD DA D3, VEX_Vpminub_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpminub ymm2,ymm6,[rax]
C5CD DA 10, VEX_Vpminub_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt8
# vpminub xmm2,xmm6,[rax+10h]
62 F14D08 DA 50 01, EVEX_Vpminub_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vpminub xmm2{k3},xmm6,xmm3
62 F14D0B DA D3, EVEX_Vpminub_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpminub xmm18{k3}{z},xmm14,xmm3
62 E10D8B DA D3, EVEX_Vpminub_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpminub ymm2,ymm6,[rax+20h]
62 F14D28 DA 50 01, EVEX_Vpminub_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vpminub ymm2{k3},ymm6,ymm3
62 F14D2B DA D3, EVEX_Vpminub_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpminub ymm18{k3}{z},ymm14,ymm3
62 E10DAB DA D3, EVEX_Vpminub_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpminub zmm2,zmm6,[rax+40h]
62 F14D48 DA 50 01, EVEX_Vpminub_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vpminub zmm2{k3},zmm6,zmm3
62 F14D4B DA D3, EVEX_Vpminub_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpminub zmm18{k3}{z},zmm14,zmm3
62 E10DCB DA D3, EVEX_Vpminub_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# pand mm1,mm5
0FDB CD, Pand_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# pand mm1,[rax]
0FDB 08, Pand_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;UInt64
# pand xmm1,xmm5
66 0FDB CD, Pand_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# pand xmm1,[rax]
66 0FDB 08, Pand_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;UInt128
# vpand xmm2,xmm6,xmm3
C5C9 DB D3, VEX_Vpand_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpand xmm2,xmm6,[rax]
C5C9 DB 10, VEX_Vpand_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;UInt128
# vpand ymm2,ymm6,ymm3
C5CD DB D3, VEX_Vpand_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpand ymm2,ymm6,[rax]
C5CD DB 10, VEX_Vpand_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt128
# vpandd xmm2,xmm6,[rax+10h]
62 F14D08 DB 50 01, EVEX_Vpandd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpandd xmm18{k3},xmm14,xmm3
62 E10D0B DB D3, EVEX_Vpandd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpandd xmm2{k3}{z},xmm6,xmm3
62 F14D8B DB D3, EVEX_Vpandd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpandd ymm2,ymm6,[rax+20h]
62 F14D28 DB 50 01, EVEX_Vpandd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpandd ymm18{k3},ymm14,ymm3
62 E10D2B DB D3, EVEX_Vpandd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpandd ymm2{k3}{z},ymm6,ymm3
62 F14DAB DB D3, EVEX_Vpandd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpandd zmm2,zmm6,[rax+40h]
62 F14D48 DB 50 01, EVEX_Vpandd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpandd zmm18{k3},zmm14,zmm3
62 E10D4B DB D3, EVEX_Vpandd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpandd zmm2{k3}{z},zmm6,zmm3
62 F14DCB DB D3, EVEX_Vpandd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpandq xmm2,xmm6,[rax+10h]
62 F1CD08 DB 50 01, EVEX_Vpandq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpandq xmm18{k3},xmm14,xmm3
62 E18D0B DB D3, EVEX_Vpandq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpandq xmm2{k3}{z},xmm6,xmm3
62 F1CD8B DB D3, EVEX_Vpandq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpandq ymm2,ymm6,[rax+20h]
62 F1CD28 DB 50 01, EVEX_Vpandq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpandq ymm18{k3},ymm14,ymm3
62 E18D2B DB D3, EVEX_Vpandq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpandq ymm2{k3}{z},ymm6,ymm3
62 F1CDAB DB D3, EVEX_Vpandq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpandq zmm2,zmm6,[rax+40h]
62 F1CD48 DB 50 01, EVEX_Vpandq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpandq zmm18{k3},zmm14,zmm3
62 E18D4B DB D3, EVEX_Vpandq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpandq zmm2{k3}{z},zmm6,zmm3
62 F1CDCB DB D3, EVEX_Vpandq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# paddusb mm1,mm5
0FDC CD, Paddusb_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# paddusb mm1,[rax]
0FDC 08, Paddusb_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt8
# paddusb xmm1,xmm5
66 0FDC CD, Paddusb_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# paddusb xmm1,[rax]
66 0FDC 08, Paddusb_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt8
# vpaddusb xmm2,xmm6,xmm3
C5C9 DC D3, VEX_Vpaddusb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpaddusb xmm2,xmm6,[rax]
C5C9 DC 10, VEX_Vpaddusb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt8
# vpaddusb ymm2,ymm6,ymm3
C5CD DC D3, VEX_Vpaddusb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpaddusb ymm2,ymm6,[rax]
C5CD DC 10, VEX_Vpaddusb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt8
# vpaddusb xmm2,xmm6,[rax+10h]
62 F14D08 DC 50 01, EVEX_Vpaddusb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vpaddusb xmm2{k3},xmm6,xmm3
62 F14D0B DC D3, EVEX_Vpaddusb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpaddusb xmm18{k3}{z},xmm14,xmm3
62 E10D8B DC D3, EVEX_Vpaddusb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpaddusb ymm2,ymm6,[rax+20h]
62 F14D28 DC 50 01, EVEX_Vpaddusb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vpaddusb ymm2{k3},ymm6,ymm3
62 F14D2B DC D3, EVEX_Vpaddusb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpaddusb ymm18{k3}{z},ymm14,ymm3
62 E10DAB DC D3, EVEX_Vpaddusb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpaddusb zmm2,zmm6,[rax+40h]
62 F14D48 DC 50 01, EVEX_Vpaddusb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vpaddusb zmm2{k3},zmm6,zmm3
62 F14D4B DC D3, EVEX_Vpaddusb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpaddusb zmm18{k3}{z},zmm14,zmm3
62 E10DCB DC D3, EVEX_Vpaddusb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# paddusw mm1,mm5
0FDD CD, Paddusw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# paddusw mm1,[rax]
0FDD 08, Paddusw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt16
# paddusw xmm1,xmm5
66 0FDD CD, Paddusw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# paddusw xmm1,[rax]
66 0FDD 08, Paddusw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt16
# vpaddusw xmm2,xmm6,xmm3
C5C9 DD D3, VEX_Vpaddusw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpaddusw xmm2,xmm6,[rax]
C5C9 DD 10, VEX_Vpaddusw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt16
# vpaddusw ymm2,ymm6,ymm3
C5CD DD D3, VEX_Vpaddusw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpaddusw ymm2,ymm6,[rax]
C5CD DD 10, VEX_Vpaddusw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt16
# vpaddusw xmm2,xmm6,[rax+10h]
62 F14D08 DD 50 01, EVEX_Vpaddusw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpaddusw xmm2{k3},xmm6,xmm3
62 F14D0B DD D3, EVEX_Vpaddusw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpaddusw xmm18{k3}{z},xmm14,xmm3
62 E10D8B DD D3, EVEX_Vpaddusw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpaddusw ymm2,ymm6,[rax+20h]
62 F14D28 DD 50 01, EVEX_Vpaddusw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpaddusw ymm2{k3},ymm6,ymm3
62 F14D2B DD D3, EVEX_Vpaddusw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpaddusw ymm18{k3}{z},ymm14,ymm3
62 E10DAB DD D3, EVEX_Vpaddusw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpaddusw zmm2,zmm6,[rax+40h]
62 F14D48 DD 50 01, EVEX_Vpaddusw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpaddusw zmm2{k3},zmm6,zmm3
62 F14D4B DD D3, EVEX_Vpaddusw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpaddusw zmm18{k3}{z},zmm14,zmm3
62 E10DCB DD D3, EVEX_Vpaddusw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# pmaxub mm1,mm5
0FDE CD, Pmaxub_mm_mmm64, Legacy, SSE, op0=rw op1=r rw=mm1 r=mm5
# pmaxub mm1,[rax]
0FDE 08, Pmaxub_mm_mmm64, Legacy, SSE, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt8
# pmaxub xmm1,xmm5
66 0FDE CD, Pmaxub_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# pmaxub xmm1,[rax]
66 0FDE 08, Pmaxub_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt8
# vpmaxub xmm2,xmm6,xmm3
C5C9 DE D3, VEX_Vpmaxub_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpmaxub xmm2,xmm6,[rax]
C5C9 DE 10, VEX_Vpmaxub_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt8
# vpmaxub ymm2,ymm6,ymm3
C5CD DE D3, VEX_Vpmaxub_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpmaxub ymm2,ymm6,[rax]
C5CD DE 10, VEX_Vpmaxub_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt8
# vpmaxub xmm2,xmm6,[rax+10h]
62 F14D08 DE 50 01, EVEX_Vpmaxub_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vpmaxub xmm2{k3},xmm6,xmm3
62 F14D0B DE D3, EVEX_Vpmaxub_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpmaxub xmm18{k3}{z},xmm14,xmm3
62 E10D8B DE D3, EVEX_Vpmaxub_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpmaxub ymm2,ymm6,[rax+20h]
62 F14D28 DE 50 01, EVEX_Vpmaxub_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vpmaxub ymm2{k3},ymm6,ymm3
62 F14D2B DE D3, EVEX_Vpmaxub_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpmaxub ymm18{k3}{z},ymm14,ymm3
62 E10DAB DE D3, EVEX_Vpmaxub_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpmaxub zmm2,zmm6,[rax+40h]
62 F14D48 DE 50 01, EVEX_Vpmaxub_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vpmaxub zmm2{k3},zmm6,zmm3
62 F14D4B DE D3, EVEX_Vpmaxub_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpmaxub zmm18{k3}{z},zmm14,zmm3
62 E10DCB DE D3, EVEX_Vpmaxub_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# pandn mm1,mm5
0FDF CD, Pandn_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# pandn mm1,[rax]
0FDF 08, Pandn_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;UInt64
# pandn xmm1,xmm5
66 0FDF CD, Pandn_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# pandn xmm1,[rax]
66 0FDF 08, Pandn_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;UInt128
# vpandn xmm2,xmm6,xmm3
C5C9 DF D3, VEX_Vpandn_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpandn xmm2,xmm6,[rax]
C5C9 DF 10, VEX_Vpandn_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;UInt128
# vpandn ymm2,ymm6,ymm3
C5CD DF D3, VEX_Vpandn_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpandn ymm2,ymm6,[rax]
C5CD DF 10, VEX_Vpandn_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt128
# vpandnd xmm2,xmm6,[rax+10h]
62 F14D08 DF 50 01, EVEX_Vpandnd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpandnd xmm18{k3},xmm14,xmm3
62 E10D0B DF D3, EVEX_Vpandnd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpandnd xmm2{k3}{z},xmm6,xmm3
62 F14D8B DF D3, EVEX_Vpandnd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpandnd ymm2,ymm6,[rax+20h]
62 F14D28 DF 50 01, EVEX_Vpandnd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpandnd ymm18{k3},ymm14,ymm3
62 E10D2B DF D3, EVEX_Vpandnd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpandnd ymm2{k3}{z},ymm6,ymm3
62 F14DAB DF D3, EVEX_Vpandnd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpandnd zmm2,zmm6,[rax+40h]
62 F14D48 DF 50 01, EVEX_Vpandnd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpandnd zmm18{k3},zmm14,zmm3
62 E10D4B DF D3, EVEX_Vpandnd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpandnd zmm2{k3}{z},zmm6,zmm3
62 F14DCB DF D3, EVEX_Vpandnd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpandnq xmm2,xmm6,[rax+10h]
62 F1CD08 DF 50 01, EVEX_Vpandnq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpandnq xmm18{k3},xmm14,xmm3
62 E18D0B DF D3, EVEX_Vpandnq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpandnq xmm2{k3}{z},xmm6,xmm3
62 F1CD8B DF D3, EVEX_Vpandnq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpandnq ymm2,ymm6,[rax+20h]
62 F1CD28 DF 50 01, EVEX_Vpandnq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpandnq ymm18{k3},ymm14,ymm3
62 E18D2B DF D3, EVEX_Vpandnq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpandnq ymm2{k3}{z},ymm6,ymm3
62 F1CDAB DF D3, EVEX_Vpandnq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpandnq zmm2,zmm6,[rax+40h]
62 F1CD48 DF 50 01, EVEX_Vpandnq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpandnq zmm18{k3},zmm14,zmm3
62 E18D4B DF D3, EVEX_Vpandnq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpandnq zmm2{k3}{z},zmm6,zmm3
62 F1CDCB DF D3, EVEX_Vpandnq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# pavgb mm1,mm5
0FE0 CD, Pavgb_mm_mmm64, Legacy, SSE, op0=rw op1=r rw=mm1 r=mm5
# pavgb mm1,[rax]
0FE0 08, Pavgb_mm_mmm64, Legacy, SSE, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt8
# pavgb xmm1,xmm5
66 0FE0 CD, Pavgb_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# pavgb xmm1,[rax]
66 0FE0 08, Pavgb_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt8
# vpavgb xmm2,xmm6,xmm3
C5C9 E0 D3, VEX_Vpavgb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpavgb xmm2,xmm6,[rax]
C5C9 E0 10, VEX_Vpavgb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt8
# vpavgb ymm2,ymm6,ymm3
C5CD E0 D3, VEX_Vpavgb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpavgb ymm2,ymm6,[rax]
C5CD E0 10, VEX_Vpavgb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt8
# vpavgb xmm2,xmm6,[rax+10h]
62 F14D08 E0 50 01, EVEX_Vpavgb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vpavgb xmm2{k3},xmm6,xmm3
62 F14D0B E0 D3, EVEX_Vpavgb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpavgb xmm18{k3}{z},xmm14,xmm3
62 E10D8B E0 D3, EVEX_Vpavgb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpavgb ymm2,ymm6,[rax+20h]
62 F14D28 E0 50 01, EVEX_Vpavgb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vpavgb ymm2{k3},ymm6,ymm3
62 F14D2B E0 D3, EVEX_Vpavgb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpavgb ymm18{k3}{z},ymm14,ymm3
62 E10DAB E0 D3, EVEX_Vpavgb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpavgb zmm2,zmm6,[rax+40h]
62 F14D48 E0 50 01, EVEX_Vpavgb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vpavgb zmm2{k3},zmm6,zmm3
62 F14D4B E0 D3, EVEX_Vpavgb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpavgb zmm18{k3}{z},zmm14,zmm3
62 E10DCB E0 D3, EVEX_Vpavgb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# psraw mm1,mm5
0FE1 CD, Psraw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# psraw mm1,[rax]
0FE1 08, Psraw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_Int16
# psraw xmm1,xmm5
66 0FE1 CD, Psraw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# psraw xmm1,[rax]
66 0FE1 08, Psraw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int16
# vpsraw xmm2,xmm6,xmm3
C5C9 E1 D3, VEX_Vpsraw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpsraw xmm2,xmm6,[rax]
C5C9 E1 10, VEX_Vpsraw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int16
# vpsraw ymm2,ymm6,xmm3
C5CD E1 D3, VEX_Vpsraw_ymm_ymm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=xmm3
# vpsraw ymm2,ymm6,[rax]
C5CD E1 10, VEX_Vpsraw_ymm_ymm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed128_Int16
# vpsraw xmm2,xmm6,[rax+10h]
62 F14D08 E1 50 01, EVEX_Vpsraw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int16
# vpsraw xmm2{k3},xmm6,xmm3
62 F14D0B E1 D3, EVEX_Vpsraw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpsraw xmm18{k3}{z},xmm14,xmm3
62 E10D8B E1 D3, EVEX_Vpsraw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpsraw ymm2,ymm6,[rax+10h]
62 F14D28 E1 50 01, EVEX_Vpsraw_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x10;Packed128_Int16
# vpsraw ymm2{k3},ymm6,xmm3
62 F14D2B E1 D3, EVEX_Vpsraw_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=xmm3
# vpsraw ymm18{k3}{z},ymm14,xmm3
62 E10DAB E1 D3, EVEX_Vpsraw_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=xmm3
# vpsraw zmm2,zmm6,[rax+10h]
62 F14D48 E1 50 01, EVEX_Vpsraw_zmm_k1z_zmm_xmmm128, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x10;Packed128_Int16
# vpsraw zmm2{k3},zmm6,xmm3
62 F14D4B E1 D3, EVEX_Vpsraw_zmm_k1z_zmm_xmmm128, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=xmm3
# vpsraw zmm18{k3}{z},zmm14,xmm3
62 E10DCB E1 D3, EVEX_Vpsraw_zmm_k1z_zmm_xmmm128, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=xmm3
# psrad mm1,mm5
0FE2 CD, Psrad_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# psrad mm1,[rax]
0FE2 08, Psrad_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_Int32
# psrad xmm1,xmm5
66 0FE2 CD, Psrad_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# psrad xmm1,[rax]
66 0FE2 08, Psrad_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int32
# vpsrad xmm2,xmm6,xmm3
C5C9 E2 D3, VEX_Vpsrad_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpsrad xmm2,xmm6,[rax]
C5C9 E2 10, VEX_Vpsrad_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int32
# vpsrad ymm2,ymm6,xmm3
C5CD E2 D3, VEX_Vpsrad_ymm_ymm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=xmm3
# vpsrad ymm2,ymm6,[rax]
C5CD E2 10, VEX_Vpsrad_ymm_ymm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed128_Int32
# vpsrad xmm2,xmm6,[rax+10h]
62 F14D08 E2 50 01, EVEX_Vpsrad_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int32
# vpsrad xmm2{k3},xmm6,xmm3
62 F14D0B E2 D3, EVEX_Vpsrad_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpsrad xmm18{k3}{z},xmm14,xmm3
62 E10D8B E2 D3, EVEX_Vpsrad_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpsrad ymm2,ymm6,[rax+10h]
62 F14D28 E2 50 01, EVEX_Vpsrad_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x10;Packed128_Int32
# vpsrad ymm2{k3},ymm6,xmm3
62 F14D2B E2 D3, EVEX_Vpsrad_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=xmm3
# vpsrad ymm18{k3}{z},ymm14,xmm3
62 E10DAB E2 D3, EVEX_Vpsrad_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=xmm3
# vpsrad zmm2,zmm6,[rax+10h]
62 F14D48 E2 50 01, EVEX_Vpsrad_zmm_k1z_zmm_xmmm128, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x10;Packed128_Int32
# vpsrad zmm2{k3},zmm6,xmm3
62 F14D4B E2 D3, EVEX_Vpsrad_zmm_k1z_zmm_xmmm128, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=xmm3
# vpsrad zmm18{k3}{z},zmm14,xmm3
62 E10DCB E2 D3, EVEX_Vpsrad_zmm_k1z_zmm_xmmm128, EVEX, AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=xmm3
# vpsraq xmm2,xmm6,[rax+10h]
62 F1CD08 E2 50 01, EVEX_Vpsraq_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int64
# vpsraq xmm2{k3},xmm6,xmm3
62 F1CD0B E2 D3, EVEX_Vpsraq_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpsraq xmm18{k3}{z},xmm14,xmm3
62 E18D8B E2 D3, EVEX_Vpsraq_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpsraq ymm2,ymm6,[rax+10h]
62 F1CD28 E2 50 01, EVEX_Vpsraq_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x10;Packed128_Int64
# vpsraq ymm2{k3},ymm6,xmm3
62 F1CD2B E2 D3, EVEX_Vpsraq_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=xmm3
# vpsraq ymm18{k3}{z},ymm14,xmm3
62 E18DAB E2 D3, EVEX_Vpsraq_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=xmm3
# vpsraq zmm2,zmm6,[rax+10h]
62 F1CD48 E2 50 01, EVEX_Vpsraq_zmm_k1z_zmm_xmmm128, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x10;Packed128_Int64
# vpsraq zmm2{k3},zmm6,xmm3
62 F1CD4B E2 D3, EVEX_Vpsraq_zmm_k1z_zmm_xmmm128, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=xmm3
# vpsraq zmm18{k3}{z},zmm14,xmm3
62 E18DCB E2 D3, EVEX_Vpsraq_zmm_k1z_zmm_xmmm128, EVEX, AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=xmm3
# pavgw mm1,mm5
0FE3 CD, Pavgw_mm_mmm64, Legacy, SSE, op0=rw op1=r rw=mm1 r=mm5
# pavgw mm1,[rax]
0FE3 08, Pavgw_mm_mmm64, Legacy, SSE, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt16
# pavgw xmm1,xmm5
66 0FE3 CD, Pavgw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# pavgw xmm1,[rax]
66 0FE3 08, Pavgw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt16
# vpavgw xmm2,xmm6,xmm3
C5C9 E3 D3, VEX_Vpavgw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpavgw xmm2,xmm6,[rax]
C5C9 E3 10, VEX_Vpavgw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt16
# vpavgw ymm2,ymm6,ymm3
C5CD E3 D3, VEX_Vpavgw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpavgw ymm2,ymm6,[rax]
C5CD E3 10, VEX_Vpavgw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt16
# vpavgw xmm2,xmm6,[rax+10h]
62 F14D08 E3 50 01, EVEX_Vpavgw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpavgw xmm2{k3},xmm6,xmm3
62 F14D0B E3 D3, EVEX_Vpavgw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpavgw xmm18{k3}{z},xmm14,xmm3
62 E10D8B E3 D3, EVEX_Vpavgw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpavgw ymm2,ymm6,[rax+20h]
62 F14D28 E3 50 01, EVEX_Vpavgw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpavgw ymm2{k3},ymm6,ymm3
62 F14D2B E3 D3, EVEX_Vpavgw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpavgw ymm18{k3}{z},ymm14,ymm3
62 E10DAB E3 D3, EVEX_Vpavgw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpavgw zmm2,zmm6,[rax+40h]
62 F14D48 E3 50 01, EVEX_Vpavgw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpavgw zmm2{k3},zmm6,zmm3
62 F14D4B E3 D3, EVEX_Vpavgw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpavgw zmm18{k3}{z},zmm14,zmm3
62 E10DCB E3 D3, EVEX_Vpavgw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# pmulhuw mm1,mm5
0FE4 CD, Pmulhuw_mm_mmm64, Legacy, SSE, op0=rw op1=r rw=mm1 r=mm5
# pmulhuw mm1,[rax]
0FE4 08, Pmulhuw_mm_mmm64, Legacy, SSE, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt16
# pmulhuw xmm1,xmm5
66 0FE4 CD, Pmulhuw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# pmulhuw xmm1,[rax]
66 0FE4 08, Pmulhuw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt16
# vpmulhuw xmm2,xmm6,xmm3
C5C9 E4 D3, VEX_Vpmulhuw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpmulhuw xmm2,xmm6,[rax]
C5C9 E4 10, VEX_Vpmulhuw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt16
# vpmulhuw ymm2,ymm6,ymm3
C5CD E4 D3, VEX_Vpmulhuw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpmulhuw ymm2,ymm6,[rax]
C5CD E4 10, VEX_Vpmulhuw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt16
# vpmulhuw xmm2,xmm6,[rax+10h]
62 F14D08 E4 50 01, EVEX_Vpmulhuw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpmulhuw xmm2{k3},xmm6,xmm3
62 F14D0B E4 D3, EVEX_Vpmulhuw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpmulhuw xmm18{k3}{z},xmm14,xmm3
62 E10D8B E4 D3, EVEX_Vpmulhuw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpmulhuw ymm2,ymm6,[rax+20h]
62 F14D28 E4 50 01, EVEX_Vpmulhuw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpmulhuw ymm2{k3},ymm6,ymm3
62 F14D2B E4 D3, EVEX_Vpmulhuw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpmulhuw ymm18{k3}{z},ymm14,ymm3
62 E10DAB E4 D3, EVEX_Vpmulhuw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpmulhuw zmm2,zmm6,[rax+40h]
62 F14D48 E4 50 01, EVEX_Vpmulhuw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpmulhuw zmm2{k3},zmm6,zmm3
62 F14D4B E4 D3, EVEX_Vpmulhuw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpmulhuw zmm18{k3}{z},zmm14,zmm3
62 E10DCB E4 D3, EVEX_Vpmulhuw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# pmulhw mm1,mm5
0FE5 CD, Pmulhw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# pmulhw mm1,[rax]
0FE5 08, Pmulhw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_Int16
# pmulhw xmm1,xmm5
66 0FE5 CD, Pmulhw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# pmulhw xmm1,[rax]
66 0FE5 08, Pmulhw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int16
# vpmulhw xmm2,xmm6,xmm3
C5C9 E5 D3, VEX_Vpmulhw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpmulhw xmm2,xmm6,[rax]
C5C9 E5 10, VEX_Vpmulhw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int16
# vpmulhw ymm2,ymm6,ymm3
C5CD E5 D3, VEX_Vpmulhw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpmulhw ymm2,ymm6,[rax]
C5CD E5 10, VEX_Vpmulhw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int16
# vpmulhw xmm2,xmm6,[rax+10h]
62 F14D08 E5 50 01, EVEX_Vpmulhw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int16
# vpmulhw xmm2{k3},xmm6,xmm3
62 F14D0B E5 D3, EVEX_Vpmulhw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpmulhw xmm18{k3}{z},xmm14,xmm3
62 E10D8B E5 D3, EVEX_Vpmulhw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpmulhw ymm2,ymm6,[rax+20h]
62 F14D28 E5 50 01, EVEX_Vpmulhw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int16
# vpmulhw ymm2{k3},ymm6,ymm3
62 F14D2B E5 D3, EVEX_Vpmulhw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpmulhw ymm18{k3}{z},ymm14,ymm3
62 E10DAB E5 D3, EVEX_Vpmulhw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpmulhw zmm2,zmm6,[rax+40h]
62 F14D48 E5 50 01, EVEX_Vpmulhw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int16
# vpmulhw zmm2{k3},zmm6,zmm3
62 F14D4B E5 D3, EVEX_Vpmulhw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpmulhw zmm18{k3}{z},zmm14,zmm3
62 E10DCB E5 D3, EVEX_Vpmulhw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# cvttpd2dq xmm1,xmm5
66 0FE6 CD, Cvttpd2dq_xmm_xmmm128, Legacy, SSE2, op0=w op1=r w=xmm1 r=xmm5
# cvttpd2dq xmm1,[rax]
66 0FE6 08, Cvttpd2dq_xmm_xmmm128, Legacy, SSE2, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vcvttpd2dq xmm1,xmm5
C5F9 E6 CD, VEX_Vcvttpd2dq_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vcvttpd2dq xmm2,xmmword ptr [rax]
C5F9 E6 10, VEX_Vcvttpd2dq_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Float64
# vcvttpd2dq xmm1,ymm5
C5FD E6 CD, VEX_Vcvttpd2dq_xmm_ymmm256, VEX, AVX, op0=w op1=r w=vmm1 r=ymm5
# vcvttpd2dq xmm2,ymmword ptr [rax]
C5FD E6 10, VEX_Vcvttpd2dq_xmm_ymmm256, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed256_Float64
# vcvttpd2dq xmm2,xmmword ptr [rax+10h]
62 F1FD08 E6 50 01, EVEX_Vcvttpd2dq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float64
# vcvttpd2dq xmm2{k3},xmm3
62 F1FD0B E6 D3, EVEX_Vcvttpd2dq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvttpd2dq xmm2{k3}{z},xmm3
62 F1FD8B E6 D3, EVEX_Vcvttpd2dq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvttpd2dq xmm2,ymmword ptr [rax+20h]
62 F1FD28 E6 50 01, EVEX_Vcvttpd2dq_xmm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float64
# vcvttpd2dq xmm2{k3},ymm3
62 F1FD2B E6 D3, EVEX_Vcvttpd2dq_xmm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=ymm3
# vcvttpd2dq xmm2{k3}{z},ymm3
62 F1FDAB E6 D3, EVEX_Vcvttpd2dq_xmm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvttpd2dq ymm2,zmmword ptr [rax+40h]
62 F1FD48 E6 50 01, EVEX_Vcvttpd2dq_ymm_k1z_zmmm512b64_sae, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float64
# vcvttpd2dq ymm2{k3},zmm3
62 F1FD4B E6 D3, EVEX_Vcvttpd2dq_ymm_k1z_zmmm512b64_sae, EVEX, AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=zmm3
# vcvttpd2dq ymm2{k3}{z},zmm3 {sae}
62 F1FDDB E6 D3, EVEX_Vcvttpd2dq_ymm_k1z_zmmm512b64_sae, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=zmm3
# cvtdq2pd xmm1,xmm5
F3 0FE6 CD, Cvtdq2pd_xmm_xmmm64, Legacy, SSE2, op0=w op1=r w=xmm1 r=xmm5
# cvtdq2pd xmm1,qword ptr [rax]
F3 0FE6 08, Cvtdq2pd_xmm_xmmm64, Legacy, SSE2, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed64_Int32
# vcvtdq2pd xmm1,xmm5
C5FA E6 CD, VEX_Vcvtdq2pd_xmm_xmmm64, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vcvtdq2pd xmm2,qword ptr [rax]
C5FA E6 10, VEX_Vcvtdq2pd_xmm_xmmm64, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed64_Int32
# vcvtdq2pd ymm1,xmm5
C5FE E6 CD, VEX_Vcvtdq2pd_ymm_xmmm128, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vcvtdq2pd ymm2,xmmword ptr [rax]
C5FE E6 10, VEX_Vcvtdq2pd_ymm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Int32
# vcvtdq2pd xmm2,qword ptr [rax+8]
62 F17E08 E6 50 01, EVEX_Vcvtdq2pd_xmm_k1z_xmmm64b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed64_Int32
# vcvtdq2pd xmm2{k3},xmm3
62 F17E0B E6 D3, EVEX_Vcvtdq2pd_xmm_k1z_xmmm64b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvtdq2pd xmm2{k3}{z},xmm3
62 F17E8B E6 D3, EVEX_Vcvtdq2pd_xmm_k1z_xmmm64b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtdq2pd ymm2,xmmword ptr [rax+10h]
62 F17E28 E6 50 01, EVEX_Vcvtdq2pd_ymm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Int32
# vcvtdq2pd ymm2{k3},xmm3
62 F17E2B E6 D3, EVEX_Vcvtdq2pd_ymm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vcvtdq2pd ymm2{k3}{z},xmm3
62 F17EAB E6 D3, EVEX_Vcvtdq2pd_ymm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtdq2pd zmm2,ymmword ptr [rax+20h]
62 F17E48 E6 50 01, EVEX_Vcvtdq2pd_zmm_k1z_ymmm256b32_er, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Int32
# vcvtdq2pd zmm2{k3},ymm3
62 F17E4B E6 D3, EVEX_Vcvtdq2pd_zmm_k1z_ymmm256b32_er, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=ymm3
# vcvtdq2pd zmm2{k3}{z},ymm3
62 F17ECB E6 D3, EVEX_Vcvtdq2pd_zmm_k1z_ymmm256b32_er, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvtqq2pd xmm2,[rax+10h]
62 F1FE08 E6 50 01, EVEX_Vcvtqq2pd_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Int64
# vcvtqq2pd xmm2{k3},xmm3
62 F1FE0B E6 D3, EVEX_Vcvtqq2pd_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvtqq2pd xmm2{k3}{z},xmm3
62 F1FE8B E6 D3, EVEX_Vcvtqq2pd_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtqq2pd ymm2,[rax+20h]
62 F1FE28 E6 50 01, EVEX_Vcvtqq2pd_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Int64
# vcvtqq2pd ymm2{k3},ymm3
62 F1FE2B E6 D3, EVEX_Vcvtqq2pd_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vcvtqq2pd ymm2{k3}{z},ymm3
62 F1FEAB E6 D3, EVEX_Vcvtqq2pd_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvtqq2pd zmm2,[rax+40h]
62 F1FE48 E6 50 01, EVEX_Vcvtqq2pd_zmm_k1z_zmmm512b64_er, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Int64
# vcvtqq2pd zmm2{k3},zmm3
62 F1FE4B E6 D3, EVEX_Vcvtqq2pd_zmm_k1z_zmmm512b64_er, EVEX, AVX512DQ, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vcvtqq2pd zmm2{k3}{z},zmm3 {rn-sae}
62 F1FE9B E6 D3, EVEX_Vcvtqq2pd_zmm_k1z_zmmm512b64_er, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=zmm3
# cvtpd2dq xmm1,xmm5
F2 0FE6 CD, Cvtpd2dq_xmm_xmmm128, Legacy, SSE2, op0=w op1=r w=xmm1 r=xmm5
# cvtpd2dq xmm1,[rax]
F2 0FE6 08, Cvtpd2dq_xmm_xmmm128, Legacy, SSE2, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vcvtpd2dq xmm1,xmm5
C5FB E6 CD, VEX_Vcvtpd2dq_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vcvtpd2dq xmm2,xmmword ptr [rax]
C5FB E6 10, VEX_Vcvtpd2dq_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Float64
# vcvtpd2dq xmm1,ymm5
C5FF E6 CD, VEX_Vcvtpd2dq_xmm_ymmm256, VEX, AVX, op0=w op1=r w=vmm1 r=ymm5
# vcvtpd2dq xmm2,ymmword ptr [rax]
C5FF E6 10, VEX_Vcvtpd2dq_xmm_ymmm256, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed256_Float64
# vcvtpd2dq xmm2,xmmword ptr [rax+10h]
62 F1FF08 E6 50 01, EVEX_Vcvtpd2dq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float64
# vcvtpd2dq xmm2{k3},xmm3
62 F1FF0B E6 D3, EVEX_Vcvtpd2dq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vcvtpd2dq xmm2{k3}{z},xmm3
62 F1FF8B E6 D3, EVEX_Vcvtpd2dq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtpd2dq xmm2,ymmword ptr [rax+20h]
62 F1FF28 E6 50 01, EVEX_Vcvtpd2dq_xmm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float64
# vcvtpd2dq xmm2{k3},ymm3
62 F1FF2B E6 D3, EVEX_Vcvtpd2dq_xmm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=ymm3
# vcvtpd2dq xmm2{k3}{z},ymm3
62 F1FFAB E6 D3, EVEX_Vcvtpd2dq_xmm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvtpd2dq ymm2,zmmword ptr [rax+40h]
62 F1FF48 E6 50 01, EVEX_Vcvtpd2dq_ymm_k1z_zmmm512b64_er, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float64
# vcvtpd2dq ymm2{k3},zmm3
62 F1FF4B E6 D3, EVEX_Vcvtpd2dq_ymm_k1z_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=zmm3
# vcvtpd2dq ymm2{k3}{z},zmm3 {rn-sae}
62 F1FF9B E6 D3, EVEX_Vcvtpd2dq_ymm_k1z_zmmm512b64_er, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=zmm3
# movntq [rax],mm1
0FE7 08, Movntq_m64_mm, Legacy, SSE, op0=w op1=r r=rax r=mm1 wm=ds:rax;Packed64_UInt32
# movntdq [rax],xmm1
66 0FE7 08, Movntdq_m128_xmm, Legacy, SSE2, op0=w op1=r r=rax r=xmm1 wm=ds:rax;Packed128_UInt32
# vmovntdq xmmword ptr [rax],xmm2
C5F9 E7 10, VEX_Vmovntdq_m128_xmm, VEX, AVX, op0=w op1=r r=rax r=xmm2 wm=ds:rax;Packed128_UInt32
# vmovntdq ymmword ptr [rax],ymm2
C5FD E7 10, VEX_Vmovntdq_m256_ymm, VEX, AVX, op0=w op1=r r=rax r=ymm2 wm=ds:rax;Packed256_UInt32
# vmovntdq xmmword ptr [rax+10h],xmm2
62 F17D08 E7 50 01, EVEX_Vmovntdq_m128_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+0x10;Packed128_UInt32
# vmovntdq ymmword ptr [rax+20h],ymm2
62 F17D28 E7 50 01, EVEX_Vmovntdq_m256_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+0x20;Packed256_UInt32
# vmovntdq zmmword ptr [rax+40h],zmm2
62 F17D48 E7 50 01, EVEX_Vmovntdq_m512_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x40;Packed512_UInt32
# psubsb mm1,mm5
0FE8 CD, Psubsb_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# psubsb mm1,[rax]
0FE8 08, Psubsb_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_Int8
# psubsb xmm1,xmm5
66 0FE8 CD, Psubsb_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# psubsb xmm1,[rax]
66 0FE8 08, Psubsb_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int8
# vpsubsb xmm2,xmm6,xmm3
C5C9 E8 D3, VEX_Vpsubsb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpsubsb xmm2,xmm6,[rax]
C5C9 E8 10, VEX_Vpsubsb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int8
# vpsubsb ymm2,ymm6,ymm3
C5CD E8 D3, VEX_Vpsubsb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpsubsb ymm2,ymm6,[rax]
C5CD E8 10, VEX_Vpsubsb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int8
# vpsubsb xmm2,xmm6,[rax+10h]
62 F14D08 E8 50 01, EVEX_Vpsubsb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int8
# vpsubsb xmm2{k3},xmm6,xmm3
62 F14D0B E8 D3, EVEX_Vpsubsb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpsubsb xmm18{k3}{z},xmm14,xmm3
62 E10D8B E8 D3, EVEX_Vpsubsb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpsubsb ymm2,ymm6,[rax+20h]
62 F14D28 E8 50 01, EVEX_Vpsubsb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int8
# vpsubsb ymm2{k3},ymm6,ymm3
62 F14D2B E8 D3, EVEX_Vpsubsb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpsubsb ymm18{k3}{z},ymm14,ymm3
62 E10DAB E8 D3, EVEX_Vpsubsb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpsubsb zmm2,zmm6,[rax+40h]
62 F14D48 E8 50 01, EVEX_Vpsubsb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int8
# vpsubsb zmm2{k3},zmm6,zmm3
62 F14D4B E8 D3, EVEX_Vpsubsb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpsubsb zmm18{k3}{z},zmm14,zmm3
62 E10DCB E8 D3, EVEX_Vpsubsb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# psubsw mm1,mm5
0FE9 CD, Psubsw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# psubsw mm1,[rax]
0FE9 08, Psubsw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_Int16
# psubsw xmm1,xmm5
66 0FE9 CD, Psubsw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# psubsw xmm1,[rax]
66 0FE9 08, Psubsw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int16
# vpsubsw xmm2,xmm6,xmm3
C5C9 E9 D3, VEX_Vpsubsw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpsubsw xmm2,xmm6,[rax]
C5C9 E9 10, VEX_Vpsubsw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int16
# vpsubsw ymm2,ymm6,ymm3
C5CD E9 D3, VEX_Vpsubsw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpsubsw ymm2,ymm6,[rax]
C5CD E9 10, VEX_Vpsubsw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int16
# vpsubsw xmm2,xmm6,[rax+10h]
62 F14D08 E9 50 01, EVEX_Vpsubsw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int16
# vpsubsw xmm2{k3},xmm6,xmm3
62 F14D0B E9 D3, EVEX_Vpsubsw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpsubsw xmm18{k3}{z},xmm14,xmm3
62 E10D8B E9 D3, EVEX_Vpsubsw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpsubsw ymm2,ymm6,[rax+20h]
62 F14D28 E9 50 01, EVEX_Vpsubsw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int16
# vpsubsw ymm2{k3},ymm6,ymm3
62 F14D2B E9 D3, EVEX_Vpsubsw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpsubsw ymm18{k3}{z},ymm14,ymm3
62 E10DAB E9 D3, EVEX_Vpsubsw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpsubsw zmm2,zmm6,[rax+40h]
62 F14D48 E9 50 01, EVEX_Vpsubsw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int16
# vpsubsw zmm2{k3},zmm6,zmm3
62 F14D4B E9 D3, EVEX_Vpsubsw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpsubsw zmm18{k3}{z},zmm14,zmm3
62 E10DCB E9 D3, EVEX_Vpsubsw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# pminsw mm1,mm5
0FEA CD, Pminsw_mm_mmm64, Legacy, SSE, op0=rw op1=r rw=mm1 r=mm5
# pminsw mm1,[rax]
0FEA 08, Pminsw_mm_mmm64, Legacy, SSE, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_Int16
# pminsw xmm1,xmm5
66 0FEA CD, Pminsw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# pminsw xmm1,[rax]
66 0FEA 08, Pminsw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int16
# vpminsw xmm2,xmm6,xmm3
C5C9 EA D3, VEX_Vpminsw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpminsw xmm2,xmm6,[rax]
C5C9 EA 10, VEX_Vpminsw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int16
# vpminsw ymm2,ymm6,ymm3
C5CD EA D3, VEX_Vpminsw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpminsw ymm2,ymm6,[rax]
C5CD EA 10, VEX_Vpminsw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int16
# vpminsw xmm2,xmm6,[rax+10h]
62 F14D08 EA 50 01, EVEX_Vpminsw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int16
# vpminsw xmm2{k3},xmm6,xmm3
62 F14D0B EA D3, EVEX_Vpminsw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpminsw xmm18{k3}{z},xmm14,xmm3
62 E10D8B EA D3, EVEX_Vpminsw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpminsw ymm2,ymm6,[rax+20h]
62 F14D28 EA 50 01, EVEX_Vpminsw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int16
# vpminsw ymm2{k3},ymm6,ymm3
62 F14D2B EA D3, EVEX_Vpminsw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpminsw ymm18{k3}{z},ymm14,ymm3
62 E10DAB EA D3, EVEX_Vpminsw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpminsw zmm2,zmm6,[rax+40h]
62 F14D48 EA 50 01, EVEX_Vpminsw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int16
# vpminsw zmm2{k3},zmm6,zmm3
62 F14D4B EA D3, EVEX_Vpminsw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpminsw zmm18{k3}{z},zmm14,zmm3
62 E10DCB EA D3, EVEX_Vpminsw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# por mm1,mm5
0FEB CD, Por_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# por mm1,[rax]
0FEB 08, Por_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;UInt64
# por xmm1,xmm5
66 0FEB CD, Por_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# por xmm1,[rax]
66 0FEB 08, Por_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;UInt128
# vpor xmm2,xmm6,xmm3
C5C9 EB D3, VEX_Vpor_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpor xmm2,xmm6,[rax]
C5C9 EB 10, VEX_Vpor_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;UInt128
# vpor ymm2,ymm6,ymm3
C5CD EB D3, VEX_Vpor_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpor ymm2,ymm6,[rax]
C5CD EB 10, VEX_Vpor_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt128
# vpord xmm2,xmm6,[rax+10h]
62 F14D08 EB 50 01, EVEX_Vpord_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpord xmm18{k3},xmm14,xmm3
62 E10D0B EB D3, EVEX_Vpord_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpord xmm2{k3}{z},xmm6,xmm3
62 F14D8B EB D3, EVEX_Vpord_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpord ymm2,ymm6,[rax+20h]
62 F14D28 EB 50 01, EVEX_Vpord_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpord ymm18{k3},ymm14,ymm3
62 E10D2B EB D3, EVEX_Vpord_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpord ymm2{k3}{z},ymm6,ymm3
62 F14DAB EB D3, EVEX_Vpord_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpord zmm2,zmm6,[rax+40h]
62 F14D48 EB 50 01, EVEX_Vpord_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpord zmm18{k3},zmm14,zmm3
62 E10D4B EB D3, EVEX_Vpord_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpord zmm2{k3}{z},zmm6,zmm3
62 F14DCB EB D3, EVEX_Vpord_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vporq xmm2,xmm6,[rax+10h]
62 F1CD08 EB 50 01, EVEX_Vporq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vporq xmm18{k3},xmm14,xmm3
62 E18D0B EB D3, EVEX_Vporq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vporq xmm2{k3}{z},xmm6,xmm3
62 F1CD8B EB D3, EVEX_Vporq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vporq ymm2,ymm6,[rax+20h]
62 F1CD28 EB 50 01, EVEX_Vporq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vporq ymm18{k3},ymm14,ymm3
62 E18D2B EB D3, EVEX_Vporq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vporq ymm2{k3}{z},ymm6,ymm3
62 F1CDAB EB D3, EVEX_Vporq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vporq zmm2,zmm6,[rax+40h]
62 F1CD48 EB 50 01, EVEX_Vporq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vporq zmm18{k3},zmm14,zmm3
62 E18D4B EB D3, EVEX_Vporq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vporq zmm2{k3}{z},zmm6,zmm3
62 F1CDCB EB D3, EVEX_Vporq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# paddsb mm1,mm5
0FEC CD, Paddsb_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# paddsb mm1,[rax]
0FEC 08, Paddsb_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_Int8
# paddsb xmm1,xmm5
66 0FEC CD, Paddsb_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# paddsb xmm1,[rax]
66 0FEC 08, Paddsb_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int8
# vpaddsb xmm2,xmm6,xmm3
C5C9 EC D3, VEX_Vpaddsb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpaddsb xmm2,xmm6,[rax]
C5C9 EC 10, VEX_Vpaddsb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int8
# vpaddsb ymm2,ymm6,ymm3
C5CD EC D3, VEX_Vpaddsb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpaddsb ymm2,ymm6,[rax]
C5CD EC 10, VEX_Vpaddsb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int8
# vpaddsb xmm2,xmm6,[rax+10h]
62 F14D08 EC 50 01, EVEX_Vpaddsb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int8
# vpaddsb xmm2{k3},xmm6,xmm3
62 F14D0B EC D3, EVEX_Vpaddsb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpaddsb xmm18{k3}{z},xmm14,xmm3
62 E10D8B EC D3, EVEX_Vpaddsb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpaddsb ymm2,ymm6,[rax+20h]
62 F14D28 EC 50 01, EVEX_Vpaddsb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int8
# vpaddsb ymm2{k3},ymm6,ymm3
62 F14D2B EC D3, EVEX_Vpaddsb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpaddsb ymm18{k3}{z},ymm14,ymm3
62 E10DAB EC D3, EVEX_Vpaddsb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpaddsb zmm2,zmm6,[rax+40h]
62 F14D48 EC 50 01, EVEX_Vpaddsb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int8
# vpaddsb zmm2{k3},zmm6,zmm3
62 F14D4B EC D3, EVEX_Vpaddsb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpaddsb zmm18{k3}{z},zmm14,zmm3
62 E10DCB EC D3, EVEX_Vpaddsb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# paddsw mm1,mm5
0FED CD, Paddsw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# paddsw mm1,[rax]
0FED 08, Paddsw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_Int16
# paddsw xmm1,xmm5
66 0FED CD, Paddsw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# paddsw xmm1,[rax]
66 0FED 08, Paddsw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int16
# vpaddsw xmm2,xmm6,xmm3
C5C9 ED D3, VEX_Vpaddsw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpaddsw xmm2,xmm6,[rax]
C5C9 ED 10, VEX_Vpaddsw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int16
# vpaddsw ymm2,ymm6,ymm3
C5CD ED D3, VEX_Vpaddsw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpaddsw ymm2,ymm6,[rax]
C5CD ED 10, VEX_Vpaddsw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int16
# vpaddsw xmm2,xmm6,[rax+10h]
62 F14D08 ED 50 01, EVEX_Vpaddsw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int16
# vpaddsw xmm2{k3},xmm6,xmm3
62 F14D0B ED D3, EVEX_Vpaddsw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpaddsw xmm18{k3}{z},xmm14,xmm3
62 E10D8B ED D3, EVEX_Vpaddsw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpaddsw ymm2,ymm6,[rax+20h]
62 F14D28 ED 50 01, EVEX_Vpaddsw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int16
# vpaddsw ymm2{k3},ymm6,ymm3
62 F14D2B ED D3, EVEX_Vpaddsw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpaddsw ymm18{k3}{z},ymm14,ymm3
62 E10DAB ED D3, EVEX_Vpaddsw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpaddsw zmm2,zmm6,[rax+40h]
62 F14D48 ED 50 01, EVEX_Vpaddsw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int16
# vpaddsw zmm2{k3},zmm6,zmm3
62 F14D4B ED D3, EVEX_Vpaddsw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpaddsw zmm18{k3}{z},zmm14,zmm3
62 E10DCB ED D3, EVEX_Vpaddsw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# pmaxsw mm1,mm5
0FEE CD, Pmaxsw_mm_mmm64, Legacy, SSE, op0=rw op1=r rw=mm1 r=mm5
# pmaxsw mm1,[rax]
0FEE 08, Pmaxsw_mm_mmm64, Legacy, SSE, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_Int16
# pmaxsw xmm1,xmm5
66 0FEE CD, Pmaxsw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# pmaxsw xmm1,[rax]
66 0FEE 08, Pmaxsw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int16
# vpmaxsw xmm2,xmm6,xmm3
C5C9 EE D3, VEX_Vpmaxsw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpmaxsw xmm2,xmm6,[rax]
C5C9 EE 10, VEX_Vpmaxsw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int16
# vpmaxsw ymm2,ymm6,ymm3
C5CD EE D3, VEX_Vpmaxsw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpmaxsw ymm2,ymm6,[rax]
C5CD EE 10, VEX_Vpmaxsw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int16
# vpmaxsw xmm2,xmm6,[rax+10h]
62 F14D08 EE 50 01, EVEX_Vpmaxsw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int16
# vpmaxsw xmm2{k3},xmm6,xmm3
62 F14D0B EE D3, EVEX_Vpmaxsw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpmaxsw xmm18{k3}{z},xmm14,xmm3
62 E10D8B EE D3, EVEX_Vpmaxsw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpmaxsw ymm2,ymm6,[rax+20h]
62 F14D28 EE 50 01, EVEX_Vpmaxsw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int16
# vpmaxsw ymm2{k3},ymm6,ymm3
62 F14D2B EE D3, EVEX_Vpmaxsw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpmaxsw ymm18{k3}{z},ymm14,ymm3
62 E10DAB EE D3, EVEX_Vpmaxsw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpmaxsw zmm2,zmm6,[rax+40h]
62 F14D48 EE 50 01, EVEX_Vpmaxsw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int16
# vpmaxsw zmm2{k3},zmm6,zmm3
62 F14D4B EE D3, EVEX_Vpmaxsw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpmaxsw zmm18{k3}{z},zmm14,zmm3
62 E10DCB EE D3, EVEX_Vpmaxsw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# pxor mm1,mm5
0FEF CD, Pxor_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# pxor mm1,[rax]
0FEF 08, Pxor_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;UInt64
# pxor xmm1,xmm5
66 0FEF CD, Pxor_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# pxor xmm1,[rax]
66 0FEF 08, Pxor_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;UInt128
# vpxor xmm2,xmm6,xmm3
C5C9 EF D3, VEX_Vpxor_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpxor xmm2,xmm6,[rax]
C5C9 EF 10, VEX_Vpxor_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;UInt128
# vpxor ymm2,ymm6,ymm3
C5CD EF D3, VEX_Vpxor_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpxor ymm2,ymm6,[rax]
C5CD EF 10, VEX_Vpxor_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt128
# vpxord xmm2,xmm6,[rax+10h]
62 F14D08 EF 50 01, EVEX_Vpxord_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpxord xmm18{k3},xmm14,xmm3
62 E10D0B EF D3, EVEX_Vpxord_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpxord xmm2{k3}{z},xmm6,xmm3
62 F14D8B EF D3, EVEX_Vpxord_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpxord ymm2,ymm6,[rax+20h]
62 F14D28 EF 50 01, EVEX_Vpxord_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpxord ymm18{k3},ymm14,ymm3
62 E10D2B EF D3, EVEX_Vpxord_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpxord ymm2{k3}{z},ymm6,ymm3
62 F14DAB EF D3, EVEX_Vpxord_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpxord zmm2,zmm6,[rax+40h]
62 F14D48 EF 50 01, EVEX_Vpxord_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpxord zmm18{k3},zmm14,zmm3
62 E10D4B EF D3, EVEX_Vpxord_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpxord zmm2{k3}{z},zmm6,zmm3
62 F14DCB EF D3, EVEX_Vpxord_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpxorq xmm2,xmm6,[rax+10h]
62 F1CD08 EF 50 01, EVEX_Vpxorq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpxorq xmm18{k3},xmm14,xmm3
62 E18D0B EF D3, EVEX_Vpxorq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpxorq xmm2{k3}{z},xmm6,xmm3
62 F1CD8B EF D3, EVEX_Vpxorq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpxorq ymm2,ymm6,[rax+20h]
62 F1CD28 EF 50 01, EVEX_Vpxorq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpxorq ymm18{k3},ymm14,ymm3
62 E18D2B EF D3, EVEX_Vpxorq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpxorq ymm2{k3}{z},ymm6,ymm3
62 F1CDAB EF D3, EVEX_Vpxorq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpxorq zmm2,zmm6,[rax+40h]
62 F1CD48 EF 50 01, EVEX_Vpxorq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpxorq zmm18{k3},zmm14,zmm3
62 E18D4B EF D3, EVEX_Vpxorq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpxorq zmm2{k3}{z},zmm6,zmm3
62 F1CDCB EF D3, EVEX_Vpxorq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# lddqu xmm1,xmmword ptr [rax]
F2 0FF0 08, Lddqu_xmm_m128, Legacy, SSE3, op0=w op1=r w=xmm1 r=rax rm=ds:rax;UInt128
# vlddqu xmm2,xmmword ptr [rax]
C5FB F0 10, VEX_Vlddqu_xmm_m128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;UInt128
# vlddqu ymm2,ymmword ptr [rax]
C5FF F0 10, VEX_Vlddqu_ymm_m256, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;UInt256
# psllw mm1,mm5
0FF1 CD, Psllw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# psllw mm1,[rax]
0FF1 08, Psllw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt16
# psllw xmm1,xmm5
66 0FF1 CD, Psllw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# psllw xmm1,[rax]
66 0FF1 08, Psllw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt16
# vpsllw xmm2,xmm6,xmm3
C5C9 F1 D3, VEX_Vpsllw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpsllw xmm2,xmm6,[rax]
C5C9 F1 10, VEX_Vpsllw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt16
# vpsllw ymm2,ymm6,xmm3
C5CD F1 D3, VEX_Vpsllw_ymm_ymm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=xmm3
# vpsllw ymm2,ymm6,[rax]
C5CD F1 10, VEX_Vpsllw_ymm_ymm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed128_UInt16
# vpsllw xmm2,xmm6,[rax+10h]
62 F14D08 F1 50 01, EVEX_Vpsllw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpsllw xmm2{k3},xmm6,xmm3
62 F14D0B F1 D3, EVEX_Vpsllw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpsllw xmm18{k3}{z},xmm14,xmm3
62 E10D8B F1 D3, EVEX_Vpsllw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpsllw ymm2,ymm6,[rax+10h]
62 F14D28 F1 50 01, EVEX_Vpsllw_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpsllw ymm2{k3},ymm6,xmm3
62 F14D2B F1 D3, EVEX_Vpsllw_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=xmm3
# vpsllw ymm18{k3}{z},ymm14,xmm3
62 E10DAB F1 D3, EVEX_Vpsllw_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=xmm3
# vpsllw zmm2,zmm6,[rax+10h]
62 F14D48 F1 50 01, EVEX_Vpsllw_zmm_k1z_zmm_xmmm128, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpsllw zmm2{k3},zmm6,xmm3
62 F14D4B F1 D3, EVEX_Vpsllw_zmm_k1z_zmm_xmmm128, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=xmm3
# vpsllw zmm18{k3}{z},zmm14,xmm3
62 E10DCB F1 D3, EVEX_Vpsllw_zmm_k1z_zmm_xmmm128, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=xmm3
# pslld mm1,mm5
0FF2 CD, Pslld_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# pslld mm1,[rax]
0FF2 08, Pslld_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt32
# pslld xmm1,xmm5
66 0FF2 CD, Pslld_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# pslld xmm1,[rax]
66 0FF2 08, Pslld_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt32
# vpslld xmm2,xmm6,xmm3
C5C9 F2 D3, VEX_Vpslld_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpslld xmm2,xmm6,[rax]
C5C9 F2 10, VEX_Vpslld_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt32
# vpslld ymm2,ymm6,xmm3
C5CD F2 D3, VEX_Vpslld_ymm_ymm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=xmm3
# vpslld ymm2,ymm6,[rax]
C5CD F2 10, VEX_Vpslld_ymm_ymm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed128_UInt32
# vpslld xmm2,xmm6,[rax+10h]
62 F14D08 F2 50 01, EVEX_Vpslld_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpslld xmm2{k3},xmm6,xmm3
62 F14D0B F2 D3, EVEX_Vpslld_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpslld xmm18{k3}{z},xmm14,xmm3
62 E10D8B F2 D3, EVEX_Vpslld_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpslld ymm2,ymm6,[rax+10h]
62 F14D28 F2 50 01, EVEX_Vpslld_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpslld ymm2{k3},ymm6,xmm3
62 F14D2B F2 D3, EVEX_Vpslld_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=xmm3
# vpslld ymm18{k3}{z},ymm14,xmm3
62 E10DAB F2 D3, EVEX_Vpslld_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=xmm3
# vpslld zmm2,zmm6,[rax+10h]
62 F14D48 F2 50 01, EVEX_Vpslld_zmm_k1z_zmm_xmmm128, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpslld zmm2{k3},zmm6,xmm3
62 F14D4B F2 D3, EVEX_Vpslld_zmm_k1z_zmm_xmmm128, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=xmm3
# vpslld zmm18{k3}{z},zmm14,xmm3
62 E10DCB F2 D3, EVEX_Vpslld_zmm_k1z_zmm_xmmm128, EVEX, AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=xmm3
# psllq mm1,mm5
0FF3 CD, Psllq_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# psllq mm1,[rax]
0FF3 08, Psllq_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;UInt64
# psllq xmm1,xmm5
66 0FF3 CD, Psllq_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# psllq xmm1,[rax]
66 0FF3 08, Psllq_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt64
# vpsllq xmm2,xmm6,xmm3
C5C9 F3 D3, VEX_Vpsllq_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpsllq xmm2,xmm6,[rax]
C5C9 F3 10, VEX_Vpsllq_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt64
# vpsllq ymm2,ymm6,xmm3
C5CD F3 D3, VEX_Vpsllq_ymm_ymm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=xmm3
# vpsllq ymm2,ymm6,[rax]
C5CD F3 10, VEX_Vpsllq_ymm_ymm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed128_UInt64
# vpsllq xmm2,xmm6,[rax+10h]
62 F1CD08 F3 50 01, EVEX_Vpsllq_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpsllq xmm2{k3},xmm6,xmm3
62 F1CD0B F3 D3, EVEX_Vpsllq_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpsllq xmm18{k3}{z},xmm14,xmm3
62 E18D8B F3 D3, EVEX_Vpsllq_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpsllq ymm2,ymm6,[rax+10h]
62 F1CD28 F3 50 01, EVEX_Vpsllq_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpsllq ymm2{k3},ymm6,xmm3
62 F1CD2B F3 D3, EVEX_Vpsllq_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=xmm3
# vpsllq ymm18{k3}{z},ymm14,xmm3
62 E18DAB F3 D3, EVEX_Vpsllq_ymm_k1z_ymm_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=xmm3
# vpsllq zmm2,zmm6,[rax+10h]
62 F1CD48 F3 50 01, EVEX_Vpsllq_zmm_k1z_zmm_xmmm128, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpsllq zmm2{k3},zmm6,xmm3
62 F1CD4B F3 D3, EVEX_Vpsllq_zmm_k1z_zmm_xmmm128, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=xmm3
# vpsllq zmm18{k3}{z},zmm14,xmm3
62 E18DCB F3 D3, EVEX_Vpsllq_zmm_k1z_zmm_xmmm128, EVEX, AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=xmm3
# pmuludq mm1,mm5
0FF4 CD, Pmuludq_mm_mmm64, Legacy, SSE2, op0=rw op1=r rw=mm1 r=mm5
# pmuludq mm1,[rax]
0FF4 08, Pmuludq_mm_mmm64, Legacy, SSE2, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt32
# pmuludq xmm1,xmm5
66 0FF4 CD, Pmuludq_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# pmuludq xmm1,[rax]
66 0FF4 08, Pmuludq_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt32
# vpmuludq xmm2,xmm6,xmm3
C5C9 F4 D3, VEX_Vpmuludq_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpmuludq xmm2,xmm6,[rax]
C5C9 F4 10, VEX_Vpmuludq_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt32
# vpmuludq ymm2,ymm6,ymm3
C5CD F4 D3, VEX_Vpmuludq_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpmuludq ymm2,ymm6,[rax]
C5CD F4 10, VEX_Vpmuludq_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt32
# vpmuludq xmm2,xmm6,[rax+10h]
62 F1CD08 F4 50 01, EVEX_Vpmuludq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpmuludq xmm18{k3},xmm14,xmm3
62 E18D0B F4 D3, EVEX_Vpmuludq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpmuludq xmm2{k3}{z},xmm6,xmm3
62 F1CD8B F4 D3, EVEX_Vpmuludq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpmuludq ymm2,ymm6,[rax+20h]
62 F1CD28 F4 50 01, EVEX_Vpmuludq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpmuludq ymm18{k3},ymm14,ymm3
62 E18D2B F4 D3, EVEX_Vpmuludq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpmuludq ymm2{k3}{z},ymm6,ymm3
62 F1CDAB F4 D3, EVEX_Vpmuludq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpmuludq zmm2,zmm6,[rax+40h]
62 F1CD48 F4 50 01, EVEX_Vpmuludq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpmuludq zmm18{k3},zmm14,zmm3
62 E18D4B F4 D3, EVEX_Vpmuludq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpmuludq zmm2{k3}{z},zmm6,zmm3
62 F1CDCB F4 D3, EVEX_Vpmuludq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# pmaddwd mm1,mm5
0FF5 CD, Pmaddwd_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# pmaddwd mm1,[rax]
0FF5 08, Pmaddwd_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_Int16
# pmaddwd xmm1,xmm5
66 0FF5 CD, Pmaddwd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# pmaddwd xmm1,[rax]
66 0FF5 08, Pmaddwd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int16
# vpmaddwd xmm2,xmm6,xmm3
C5C9 F5 D3, VEX_Vpmaddwd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpmaddwd xmm2,xmm6,[rax]
C5C9 F5 10, VEX_Vpmaddwd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int16
# vpmaddwd ymm2,ymm6,ymm3
C5CD F5 D3, VEX_Vpmaddwd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpmaddwd ymm2,ymm6,[rax]
C5CD F5 10, VEX_Vpmaddwd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int16
# vpmaddwd xmm2,xmm6,[rax+10h]
62 F14D08 F5 50 01, EVEX_Vpmaddwd_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int16
# vpmaddwd xmm2{k3},xmm6,xmm3
62 F14D0B F5 D3, EVEX_Vpmaddwd_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpmaddwd xmm18{k3}{z},xmm14,xmm3
62 E10D8B F5 D3, EVEX_Vpmaddwd_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpmaddwd ymm2,ymm6,[rax+20h]
62 F14D28 F5 50 01, EVEX_Vpmaddwd_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int16
# vpmaddwd ymm2{k3},ymm6,ymm3
62 F14D2B F5 D3, EVEX_Vpmaddwd_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpmaddwd ymm18{k3}{z},ymm14,ymm3
62 E10DAB F5 D3, EVEX_Vpmaddwd_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpmaddwd zmm2,zmm6,[rax+40h]
62 F14D48 F5 50 01, EVEX_Vpmaddwd_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int16
# vpmaddwd zmm2{k3},zmm6,zmm3
62 F14D4B F5 D3, EVEX_Vpmaddwd_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpmaddwd zmm18{k3}{z},zmm14,zmm3
62 E10DCB F5 D3, EVEX_Vpmaddwd_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# psadbw mm1,mm5
0FF6 CD, Psadbw_mm_mmm64, Legacy, SSE, op0=rw op1=r rw=mm1 r=mm5
# psadbw mm1,[rax]
0FF6 08, Psadbw_mm_mmm64, Legacy, SSE, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt8
# psadbw xmm1,xmm5
66 0FF6 CD, Psadbw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# psadbw xmm1,[rax]
66 0FF6 08, Psadbw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt8
# vpsadbw xmm2,xmm6,xmm3
C5C9 F6 D3, VEX_Vpsadbw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpsadbw xmm2,xmm6,[rax]
C5C9 F6 10, VEX_Vpsadbw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt8
# vpsadbw ymm2,ymm6,ymm3
C5CD F6 D3, VEX_Vpsadbw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpsadbw ymm2,ymm6,[rax]
C5CD F6 10, VEX_Vpsadbw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt8
# vpsadbw xmm2,xmm6,xmm3
62 F14D08 F6 D3, EVEX_Vpsadbw_xmm_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpsadbw xmm2,xmm6,[rax+10h]
62 F14D08 F6 50 01, EVEX_Vpsadbw_xmm_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vpsadbw ymm2,ymm6,ymm3
62 F14D28 F6 D3, EVEX_Vpsadbw_ymm_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpsadbw ymm2,ymm6,[rax+20h]
62 F14D28 F6 50 01, EVEX_Vpsadbw_ymm_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vpsadbw zmm2,zmm6,zmm3
62 F14D48 F6 D3, EVEX_Vpsadbw_zmm_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=zmm3
# vpsadbw zmm2,zmm6,[rax+40h]
62 F14D48 F6 50 01, EVEX_Vpsadbw_zmm_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8
# maskmovq mm2,mm3
0FF7 D3, Maskmovq_rDI_mm_mm, Legacy, SSE, op0=w op1=r op2=r r=rdi r=mm2 r=mm3 wm=ds:rdi;UInt64
# maskmovq fs:[rdi],mm2,mm3
64 0FF7 D3, Maskmovq_rDI_mm_mm, Legacy, SSE, op0=w op1=r op2=r r=fs;rdi r=mm2 r=mm3 wm=fs:rdi;UInt64
# maskmovdqu xmm2,xmm3
66 0FF7 D3, Maskmovdqu_rDI_xmm_xmm, Legacy, SSE2, op0=w op1=r op2=r r=rdi r=xmm2 r=xmm3 wm=ds:rdi;UInt128
# maskmovdqu fs:[rdi],xmm2,xmm3
64 66 0FF7 D3, Maskmovdqu_rDI_xmm_xmm, Legacy, SSE2, op0=w op1=r op2=r r=fs;rdi r=xmm2 r=xmm3 wm=fs:rdi;UInt128
# vmaskmovdqu xmm2,xmm3
C5F9 F7 D3, VEX_Vmaskmovdqu_rDI_xmm_xmm, VEX, AVX, op0=w op1=r op2=r r=rdi r=xmm2 r=xmm3 wm=ds:rdi;UInt128
# vmaskmovdqu fs:[rdi],xmm2,xmm3
64 C5F9 F7 D3, VEX_Vmaskmovdqu_rDI_xmm_xmm, VEX, AVX, op0=w op1=r op2=r r=fs;rdi r=xmm2 r=xmm3 wm=fs:rdi;UInt128
# psubb mm1,mm5
0FF8 CD, Psubb_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# psubb mm1,[rax]
0FF8 08, Psubb_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt8
# psubb xmm1,xmm5
66 0FF8 CD, Psubb_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# psubb xmm1,[rax]
66 0FF8 08, Psubb_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt8
# vpsubb xmm2,xmm6,xmm3
C5C9 F8 D3, VEX_Vpsubb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpsubb xmm2,xmm6,[rax]
C5C9 F8 10, VEX_Vpsubb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt8
# vpsubb ymm2,ymm6,ymm3
C5CD F8 D3, VEX_Vpsubb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpsubb ymm2,ymm6,[rax]
C5CD F8 10, VEX_Vpsubb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt8
# vpsubb xmm2,xmm6,[rax+10h]
62 F14D08 F8 50 01, EVEX_Vpsubb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vpsubb xmm2{k3},xmm6,xmm3
62 F14D0B F8 D3, EVEX_Vpsubb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpsubb xmm18{k3}{z},xmm14,xmm3
62 E10D8B F8 D3, EVEX_Vpsubb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpsubb ymm2,ymm6,[rax+20h]
62 F14D28 F8 50 01, EVEX_Vpsubb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vpsubb ymm2{k3},ymm6,ymm3
62 F14D2B F8 D3, EVEX_Vpsubb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpsubb ymm18{k3}{z},ymm14,ymm3
62 E10DAB F8 D3, EVEX_Vpsubb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpsubb zmm2,zmm6,[rax+40h]
62 F14D48 F8 50 01, EVEX_Vpsubb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vpsubb zmm2{k3},zmm6,zmm3
62 F14D4B F8 D3, EVEX_Vpsubb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpsubb zmm18{k3}{z},zmm14,zmm3
62 E10DCB F8 D3, EVEX_Vpsubb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# psubw mm1,mm5
0FF9 CD, Psubw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# psubw mm1,[rax]
0FF9 08, Psubw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt16
# psubw xmm1,xmm5
66 0FF9 CD, Psubw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# psubw xmm1,[rax]
66 0FF9 08, Psubw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt16
# vpsubw xmm2,xmm6,xmm3
C5C9 F9 D3, VEX_Vpsubw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpsubw xmm2,xmm6,[rax]
C5C9 F9 10, VEX_Vpsubw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt16
# vpsubw ymm2,ymm6,ymm3
C5CD F9 D3, VEX_Vpsubw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpsubw ymm2,ymm6,[rax]
C5CD F9 10, VEX_Vpsubw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt16
# vpsubw xmm2,xmm6,[rax+10h]
62 F14D08 F9 50 01, EVEX_Vpsubw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpsubw xmm2{k3},xmm6,xmm3
62 F14D0B F9 D3, EVEX_Vpsubw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpsubw xmm18{k3}{z},xmm14,xmm3
62 E10D8B F9 D3, EVEX_Vpsubw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpsubw ymm2,ymm6,[rax+20h]
62 F14D28 F9 50 01, EVEX_Vpsubw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpsubw ymm2{k3},ymm6,ymm3
62 F14D2B F9 D3, EVEX_Vpsubw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpsubw ymm18{k3}{z},ymm14,ymm3
62 E10DAB F9 D3, EVEX_Vpsubw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpsubw zmm2,zmm6,[rax+40h]
62 F14D48 F9 50 01, EVEX_Vpsubw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpsubw zmm2{k3},zmm6,zmm3
62 F14D4B F9 D3, EVEX_Vpsubw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpsubw zmm18{k3}{z},zmm14,zmm3
62 E10DCB F9 D3, EVEX_Vpsubw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# psubd mm1,mm5
0FFA CD, Psubd_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# psubd mm1,[rax]
0FFA 08, Psubd_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt32
# psubd xmm1,xmm5
66 0FFA CD, Psubd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# psubd xmm1,[rax]
66 0FFA 08, Psubd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt32
# vpsubd xmm2,xmm6,xmm3
C5C9 FA D3, VEX_Vpsubd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpsubd xmm2,xmm6,[rax]
C5C9 FA 10, VEX_Vpsubd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt32
# vpsubd ymm2,ymm6,ymm3
C5CD FA D3, VEX_Vpsubd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpsubd ymm2,ymm6,[rax]
C5CD FA 10, VEX_Vpsubd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt32
# vpsubd xmm2,xmm6,[rax+10h]
62 F14D08 FA 50 01, EVEX_Vpsubd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpsubd xmm18{k3},xmm14,xmm3
62 E10D0B FA D3, EVEX_Vpsubd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpsubd xmm2{k3}{z},xmm6,xmm3
62 F14D8B FA D3, EVEX_Vpsubd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpsubd ymm2,ymm6,[rax+20h]
62 F14D28 FA 50 01, EVEX_Vpsubd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpsubd ymm18{k3},ymm14,ymm3
62 E10D2B FA D3, EVEX_Vpsubd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpsubd ymm2{k3}{z},ymm6,ymm3
62 F14DAB FA D3, EVEX_Vpsubd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpsubd zmm2,zmm6,[rax+40h]
62 F14D48 FA 50 01, EVEX_Vpsubd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpsubd zmm18{k3},zmm14,zmm3
62 E10D4B FA D3, EVEX_Vpsubd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpsubd zmm2{k3}{z},zmm6,zmm3
62 F14DCB FA D3, EVEX_Vpsubd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# psubq mm1,mm5
0FFB CD, Psubq_mm_mmm64, Legacy, SSE2, op0=rw op1=r rw=mm1 r=mm5
# psubq mm1,[rax]
0FFB 08, Psubq_mm_mmm64, Legacy, SSE2, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Int64
# psubq xmm1,xmm5
66 0FFB CD, Psubq_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# psubq xmm1,[rax]
66 0FFB 08, Psubq_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt64
# vpsubq xmm2,xmm6,xmm3
C5C9 FB D3, VEX_Vpsubq_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpsubq xmm2,xmm6,[rax]
C5C9 FB 10, VEX_Vpsubq_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt64
# vpsubq ymm2,ymm6,ymm3
C5CD FB D3, VEX_Vpsubq_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpsubq ymm2,ymm6,[rax]
C5CD FB 10, VEX_Vpsubq_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt64
# vpsubq xmm2,xmm6,[rax+10h]
62 F1CD08 FB 50 01, EVEX_Vpsubq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpsubq xmm18{k3},xmm14,xmm3
62 E18D0B FB D3, EVEX_Vpsubq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpsubq xmm2{k3}{z},xmm6,xmm3
62 F1CD8B FB D3, EVEX_Vpsubq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpsubq ymm2,ymm6,[rax+20h]
62 F1CD28 FB 50 01, EVEX_Vpsubq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpsubq ymm18{k3},ymm14,ymm3
62 E18D2B FB D3, EVEX_Vpsubq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpsubq ymm2{k3}{z},ymm6,ymm3
62 F1CDAB FB D3, EVEX_Vpsubq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpsubq zmm2,zmm6,[rax+40h]
62 F1CD48 FB 50 01, EVEX_Vpsubq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpsubq zmm18{k3},zmm14,zmm3
62 E18D4B FB D3, EVEX_Vpsubq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpsubq zmm2{k3}{z},zmm6,zmm3
62 F1CDCB FB D3, EVEX_Vpsubq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# paddb mm1,mm5
0FFC CD, Paddb_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# paddb mm1,[rax]
0FFC 08, Paddb_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt8
# paddb xmm1,xmm5
66 0FFC CD, Paddb_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# paddb xmm1,[rax]
66 0FFC 08, Paddb_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt8
# vpaddb xmm2,xmm6,xmm3
C5C9 FC D3, VEX_Vpaddb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpaddb xmm2,xmm6,[rax]
C5C9 FC 10, VEX_Vpaddb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt8
# vpaddb ymm2,ymm6,ymm3
C5CD FC D3, VEX_Vpaddb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpaddb ymm2,ymm6,[rax]
C5CD FC 10, VEX_Vpaddb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt8
# vpaddb xmm2,xmm6,[rax+10h]
62 F14D08 FC 50 01, EVEX_Vpaddb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vpaddb xmm2{k3},xmm6,xmm3
62 F14D0B FC D3, EVEX_Vpaddb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpaddb xmm18{k3}{z},xmm14,xmm3
62 E10D8B FC D3, EVEX_Vpaddb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpaddb ymm2,ymm6,[rax+20h]
62 F14D28 FC 50 01, EVEX_Vpaddb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vpaddb ymm2{k3},ymm6,ymm3
62 F14D2B FC D3, EVEX_Vpaddb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpaddb ymm18{k3}{z},ymm14,ymm3
62 E10DAB FC D3, EVEX_Vpaddb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpaddb zmm2,zmm6,[rax+40h]
62 F14D48 FC 50 01, EVEX_Vpaddb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vpaddb zmm2{k3},zmm6,zmm3
62 F14D4B FC D3, EVEX_Vpaddb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpaddb zmm18{k3}{z},zmm14,zmm3
62 E10DCB FC D3, EVEX_Vpaddb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# paddw mm1,mm5
0FFD CD, Paddw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# paddw mm1,[rax]
0FFD 08, Paddw_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt16
# paddw xmm1,xmm5
66 0FFD CD, Paddw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# paddw xmm1,[rax]
66 0FFD 08, Paddw_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt16
# vpaddw xmm2,xmm6,xmm3
C5C9 FD D3, VEX_Vpaddw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpaddw xmm2,xmm6,[rax]
C5C9 FD 10, VEX_Vpaddw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt16
# vpaddw ymm2,ymm6,ymm3
C5CD FD D3, VEX_Vpaddw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpaddw ymm2,ymm6,[rax]
C5CD FD 10, VEX_Vpaddw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt16
# vpaddw xmm2,xmm6,[rax+10h]
62 F14D08 FD 50 01, EVEX_Vpaddw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpaddw xmm2{k3},xmm6,xmm3
62 F14D0B FD D3, EVEX_Vpaddw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpaddw xmm18{k3}{z},xmm14,xmm3
62 E10D8B FD D3, EVEX_Vpaddw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpaddw ymm2,ymm6,[rax+20h]
62 F14D28 FD 50 01, EVEX_Vpaddw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpaddw ymm2{k3},ymm6,ymm3
62 F14D2B FD D3, EVEX_Vpaddw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpaddw ymm18{k3}{z},ymm14,ymm3
62 E10DAB FD D3, EVEX_Vpaddw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpaddw zmm2,zmm6,[rax+40h]
62 F14D48 FD 50 01, EVEX_Vpaddw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpaddw zmm2{k3},zmm6,zmm3
62 F14D4B FD D3, EVEX_Vpaddw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpaddw zmm18{k3}{z},zmm14,zmm3
62 E10DCB FD D3, EVEX_Vpaddw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# paddd mm1,mm5
0FFE CD, Paddd_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=mm5
# paddd mm1,[rax]
0FFE 08, Paddd_mm_mmm64, Legacy, MMX, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt32
# paddd xmm1,xmm5
66 0FFE CD, Paddd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=xmm5
# paddd xmm1,[rax]
66 0FFE 08, Paddd_xmm_xmmm128, Legacy, SSE2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt32
# vpaddd xmm2,xmm6,xmm3
C5C9 FE D3, VEX_Vpaddd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpaddd xmm2,xmm6,[rax]
C5C9 FE 10, VEX_Vpaddd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt32
# vpaddd ymm2,ymm6,ymm3
C5CD FE D3, VEX_Vpaddd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpaddd ymm2,ymm6,[rax]
C5CD FE 10, VEX_Vpaddd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt32
# vpaddd xmm2,xmm6,[rax+10h]
62 F14D08 FE 50 01, EVEX_Vpaddd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpaddd xmm18{k3},xmm14,xmm3
62 E10D0B FE D3, EVEX_Vpaddd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpaddd xmm2{k3}{z},xmm6,xmm3
62 F14D8B FE D3, EVEX_Vpaddd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpaddd ymm2,ymm6,[rax+20h]
62 F14D28 FE 50 01, EVEX_Vpaddd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpaddd ymm18{k3},ymm14,ymm3
62 E10D2B FE D3, EVEX_Vpaddd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpaddd ymm2{k3}{z},ymm6,ymm3
62 F14DAB FE D3, EVEX_Vpaddd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpaddd zmm2,zmm6,[rax+40h]
62 F14D48 FE 50 01, EVEX_Vpaddd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpaddd zmm18{k3},zmm14,zmm3
62 E10D4B FE D3, EVEX_Vpaddd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpaddd zmm2{k3}{z},zmm6,zmm3
62 F14DCB FE D3, EVEX_Vpaddd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# ud0 cx,si
66 0FFF CE, Ud0_r16_rm16, Legacy, INTEL286, flow=Exception op0=n op1=n
# ud0 bx,[rax]
66 0FFF 18, Ud0_r16_rm16, Legacy, INTEL286, flow=Exception op0=n op1=n
# ud0 ecx,esi
0FFF CE, Ud0_r32_rm32, Legacy, INTEL386, flow=Exception op0=n op1=n
# ud0 ebx,[rax]
0FFF 18, Ud0_r32_rm32, Legacy, INTEL386, flow=Exception op0=n op1=n
# ud0 rcx,rsi
48 0FFF CE, Ud0_r64_rm64, Legacy, X64, flow=Exception op0=n op1=n
# ud0 rbx,[rax]
48 0FFF 18, Ud0_r64_rm64, Legacy, X64, flow=Exception op0=n op1=n
# pshufb mm1,mm5
0F3800 CD, Pshufb_mm_mmm64, Legacy, SSSE3, op0=rw op1=r rw=mm1 r=mm5
# pshufb mm1,[rax]
0F3800 08, Pshufb_mm_mmm64, Legacy, SSSE3, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt8
# pshufb xmm1,xmm5
66 0F3800 CD, Pshufb_xmm_xmmm128, Legacy, SSSE3, op0=rw op1=r rw=xmm1 r=xmm5
# pshufb xmm1,[rax]
66 0F3800 08, Pshufb_xmm_xmmm128, Legacy, SSSE3, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt8
# vpshufb xmm2,xmm6,xmm3
C4E249 00 D3, VEX_Vpshufb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpshufb xmm2,xmm6,[rax]
C4E249 00 10, VEX_Vpshufb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt8
# vpshufb ymm2,ymm6,ymm3
C4E24D 00 D3, VEX_Vpshufb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpshufb ymm2,ymm6,[rax]
C4E24D 00 10, VEX_Vpshufb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt8
# vpshufb xmm2,xmm6,[rax+10h]
62 F24D08 00 50 01, EVEX_Vpshufb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vpshufb xmm2{k3},xmm6,xmm3
62 F24D0B 00 D3, EVEX_Vpshufb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpshufb xmm18{k3}{z},xmm14,xmm3
62 E20D8B 00 D3, EVEX_Vpshufb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpshufb ymm2,ymm6,[rax+20h]
62 F24D28 00 50 01, EVEX_Vpshufb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vpshufb ymm2{k3},ymm6,ymm3
62 F24D2B 00 D3, EVEX_Vpshufb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpshufb ymm18{k3}{z},ymm14,ymm3
62 E20DAB 00 D3, EVEX_Vpshufb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpshufb zmm2,zmm6,[rax+40h]
62 F24D48 00 50 01, EVEX_Vpshufb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vpshufb zmm2{k3},zmm6,zmm3
62 F24D4B 00 D3, EVEX_Vpshufb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpshufb zmm18{k3}{z},zmm14,zmm3
62 E20DCB 00 D3, EVEX_Vpshufb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# phaddw mm1,mm5
0F3801 CD, Phaddw_mm_mmm64, Legacy, SSSE3, op0=rw op1=r rw=mm1 r=mm5
# phaddw mm1,[rax]
0F3801 08, Phaddw_mm_mmm64, Legacy, SSSE3, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt16
# phaddw xmm1,xmm5
66 0F3801 CD, Phaddw_xmm_xmmm128, Legacy, SSSE3, op0=rw op1=r rw=xmm1 r=xmm5
# phaddw xmm1,[rax]
66 0F3801 08, Phaddw_xmm_xmmm128, Legacy, SSSE3, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt16
# vphaddw xmm2,xmm6,xmm3
C4E249 01 D3, VEX_Vphaddw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vphaddw xmm2,xmm6,[rax]
C4E249 01 10, VEX_Vphaddw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt16
# vphaddw ymm2,ymm6,ymm3
C4E24D 01 D3, VEX_Vphaddw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vphaddw ymm2,ymm6,[rax]
C4E24D 01 10, VEX_Vphaddw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt16
# phaddd mm1,mm5
0F3802 CD, Phaddd_mm_mmm64, Legacy, SSSE3, op0=rw op1=r rw=mm1 r=mm5
# phaddd mm1,[rax]
0F3802 08, Phaddd_mm_mmm64, Legacy, SSSE3, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt32
# phaddd xmm1,xmm5
66 0F3802 CD, Phaddd_xmm_xmmm128, Legacy, SSSE3, op0=rw op1=r rw=xmm1 r=xmm5
# phaddd xmm1,[rax]
66 0F3802 08, Phaddd_xmm_xmmm128, Legacy, SSSE3, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt32
# vphaddd xmm2,xmm6,xmm3
C4E249 02 D3, VEX_Vphaddd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vphaddd xmm2,xmm6,[rax]
C4E249 02 10, VEX_Vphaddd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt32
# vphaddd ymm2,ymm6,ymm3
C4E24D 02 D3, VEX_Vphaddd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vphaddd ymm2,ymm6,[rax]
C4E24D 02 10, VEX_Vphaddd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt32
# phaddsw mm1,mm5
0F3803 CD, Phaddsw_mm_mmm64, Legacy, SSSE3, op0=rw op1=r rw=mm1 r=mm5
# phaddsw mm1,[rax]
0F3803 08, Phaddsw_mm_mmm64, Legacy, SSSE3, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_Int16
# phaddsw xmm1,xmm5
66 0F3803 CD, Phaddsw_xmm_xmmm128, Legacy, SSSE3, op0=rw op1=r rw=xmm1 r=xmm5
# phaddsw xmm1,[rax]
66 0F3803 08, Phaddsw_xmm_xmmm128, Legacy, SSSE3, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int16
# vphaddsw xmm2,xmm6,xmm3
C4E249 03 D3, VEX_Vphaddsw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vphaddsw xmm2,xmm6,[rax]
C4E249 03 10, VEX_Vphaddsw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int16
# vphaddsw ymm2,ymm6,ymm3
C4E24D 03 D3, VEX_Vphaddsw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vphaddsw ymm2,ymm6,[rax]
C4E24D 03 10, VEX_Vphaddsw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int16
# pmaddubsw mm1,mm5
0F3804 CD, Pmaddubsw_mm_mmm64, Legacy, SSSE3, op0=rw op1=r rw=mm1 r=mm5
# pmaddubsw mm1,[rax]
0F3804 08, Pmaddubsw_mm_mmm64, Legacy, SSSE3, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_Int8
# pmaddubsw xmm1,xmm5
66 0F3804 CD, Pmaddubsw_xmm_xmmm128, Legacy, SSSE3, op0=rw op1=r rw=xmm1 r=xmm5
# pmaddubsw xmm1,[rax]
66 0F3804 08, Pmaddubsw_xmm_xmmm128, Legacy, SSSE3, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int8
# vpmaddubsw xmm2,xmm6,xmm3
C4E249 04 D3, VEX_Vpmaddubsw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpmaddubsw xmm2,xmm6,[rax]
C4E249 04 10, VEX_Vpmaddubsw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int8
# vpmaddubsw ymm2,ymm6,ymm3
C4E24D 04 D3, VEX_Vpmaddubsw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpmaddubsw ymm2,ymm6,[rax]
C4E24D 04 10, VEX_Vpmaddubsw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int8
# vpmaddubsw xmm2,xmm6,[rax+10h]
62 F24D08 04 50 01, EVEX_Vpmaddubsw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int8
# vpmaddubsw xmm2{k3},xmm6,xmm3
62 F24D0B 04 D3, EVEX_Vpmaddubsw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpmaddubsw xmm18{k3}{z},xmm14,xmm3
62 E20D8B 04 D3, EVEX_Vpmaddubsw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpmaddubsw ymm2,ymm6,[rax+20h]
62 F24D28 04 50 01, EVEX_Vpmaddubsw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int8
# vpmaddubsw ymm2{k3},ymm6,ymm3
62 F24D2B 04 D3, EVEX_Vpmaddubsw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpmaddubsw ymm18{k3}{z},ymm14,ymm3
62 E20DAB 04 D3, EVEX_Vpmaddubsw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpmaddubsw zmm2,zmm6,[rax+40h]
62 F24D48 04 50 01, EVEX_Vpmaddubsw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int8
# vpmaddubsw zmm2{k3},zmm6,zmm3
62 F24D4B 04 D3, EVEX_Vpmaddubsw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpmaddubsw zmm18{k3}{z},zmm14,zmm3
62 E20DCB 04 D3, EVEX_Vpmaddubsw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# phsubw mm1,mm5
0F3805 CD, Phsubw_mm_mmm64, Legacy, SSSE3, op0=rw op1=r rw=mm1 r=mm5
# phsubw mm1,[rax]
0F3805 08, Phsubw_mm_mmm64, Legacy, SSSE3, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt16
# phsubw xmm1,xmm5
66 0F3805 CD, Phsubw_xmm_xmmm128, Legacy, SSSE3, op0=rw op1=r rw=xmm1 r=xmm5
# phsubw xmm1,[rax]
66 0F3805 08, Phsubw_xmm_xmmm128, Legacy, SSSE3, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt16
# vphsubw xmm2,xmm6,xmm3
C4E249 05 D3, VEX_Vphsubw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vphsubw xmm2,xmm6,[rax]
C4E249 05 10, VEX_Vphsubw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt16
# vphsubw ymm2,ymm6,ymm3
C4E24D 05 D3, VEX_Vphsubw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vphsubw ymm2,ymm6,[rax]
C4E24D 05 10, VEX_Vphsubw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt16
# phsubd mm1,mm5
0F3806 CD, Phsubd_mm_mmm64, Legacy, SSSE3, op0=rw op1=r rw=mm1 r=mm5
# phsubd mm1,[rax]
0F3806 08, Phsubd_mm_mmm64, Legacy, SSSE3, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt32
# phsubd xmm1,xmm5
66 0F3806 CD, Phsubd_xmm_xmmm128, Legacy, SSSE3, op0=rw op1=r rw=xmm1 r=xmm5
# phsubd xmm1,[rax]
66 0F3806 08, Phsubd_xmm_xmmm128, Legacy, SSSE3, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt32
# vphsubd xmm2,xmm6,xmm3
C4E249 06 D3, VEX_Vphsubd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vphsubd xmm2,xmm6,[rax]
C4E249 06 10, VEX_Vphsubd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt32
# vphsubd ymm2,ymm6,ymm3
C4E24D 06 D3, VEX_Vphsubd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vphsubd ymm2,ymm6,[rax]
C4E24D 06 10, VEX_Vphsubd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt32
# phsubsw mm1,mm5
0F3807 CD, Phsubsw_mm_mmm64, Legacy, SSSE3, op0=rw op1=r rw=mm1 r=mm5
# phsubsw mm1,[rax]
0F3807 08, Phsubsw_mm_mmm64, Legacy, SSSE3, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_Int16
# phsubsw xmm1,xmm5
66 0F3807 CD, Phsubsw_xmm_xmmm128, Legacy, SSSE3, op0=rw op1=r rw=xmm1 r=xmm5
# phsubsw xmm1,[rax]
66 0F3807 08, Phsubsw_xmm_xmmm128, Legacy, SSSE3, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int16
# vphsubsw xmm2,xmm6,xmm3
C4E249 07 D3, VEX_Vphsubsw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vphsubsw xmm2,xmm6,[rax]
C4E249 07 10, VEX_Vphsubsw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int16
# vphsubsw ymm2,ymm6,ymm3
C4E24D 07 D3, VEX_Vphsubsw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vphsubsw ymm2,ymm6,[rax]
C4E24D 07 10, VEX_Vphsubsw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int16
# psignb mm1,mm5
0F3808 CD, Psignb_mm_mmm64, Legacy, SSSE3, op0=rw op1=r rw=mm1 r=mm5
# psignb mm1,[rax]
0F3808 08, Psignb_mm_mmm64, Legacy, SSSE3, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_Int8
# psignb xmm1,xmm5
66 0F3808 CD, Psignb_xmm_xmmm128, Legacy, SSSE3, op0=rw op1=r rw=xmm1 r=xmm5
# psignb xmm1,[rax]
66 0F3808 08, Psignb_xmm_xmmm128, Legacy, SSSE3, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int8
# vpsignb xmm2,xmm6,xmm3
C4E249 08 D3, VEX_Vpsignb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpsignb xmm2,xmm6,[rax]
C4E249 08 10, VEX_Vpsignb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int8
# vpsignb ymm2,ymm6,ymm3
C4E24D 08 D3, VEX_Vpsignb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpsignb ymm2,ymm6,[rax]
C4E24D 08 10, VEX_Vpsignb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int8
# psignw mm1,mm5
0F3809 CD, Psignw_mm_mmm64, Legacy, SSSE3, op0=rw op1=r rw=mm1 r=mm5
# psignw mm1,[rax]
0F3809 08, Psignw_mm_mmm64, Legacy, SSSE3, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_Int16
# psignw xmm1,xmm5
66 0F3809 CD, Psignw_xmm_xmmm128, Legacy, SSSE3, op0=rw op1=r rw=xmm1 r=xmm5
# psignw xmm1,[rax]
66 0F3809 08, Psignw_xmm_xmmm128, Legacy, SSSE3, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int16
# vpsignw xmm2,xmm6,xmm3
C4E249 09 D3, VEX_Vpsignw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpsignw xmm2,xmm6,[rax]
C4E249 09 10, VEX_Vpsignw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int16
# vpsignw ymm2,ymm6,ymm3
C4E24D 09 D3, VEX_Vpsignw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpsignw ymm2,ymm6,[rax]
C4E24D 09 10, VEX_Vpsignw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int16
# psignd mm1,mm5
0F380A CD, Psignd_mm_mmm64, Legacy, SSSE3, op0=rw op1=r rw=mm1 r=mm5
# psignd mm1,[rax]
0F380A 08, Psignd_mm_mmm64, Legacy, SSSE3, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_Int32
# psignd xmm1,xmm5
66 0F380A CD, Psignd_xmm_xmmm128, Legacy, SSSE3, op0=rw op1=r rw=xmm1 r=xmm5
# psignd xmm1,[rax]
66 0F380A 08, Psignd_xmm_xmmm128, Legacy, SSSE3, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int32
# vpsignd xmm2,xmm6,xmm3
C4E249 0A D3, VEX_Vpsignd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpsignd xmm2,xmm6,[rax]
C4E249 0A 10, VEX_Vpsignd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int32
# vpsignd ymm2,ymm6,ymm3
C4E24D 0A D3, VEX_Vpsignd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpsignd ymm2,ymm6,[rax]
C4E24D 0A 10, VEX_Vpsignd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int32
# pmulhrsw mm1,mm5
0F380B CD, Pmulhrsw_mm_mmm64, Legacy, SSSE3, op0=rw op1=r rw=mm1 r=mm5
# pmulhrsw mm1,[rax]
0F380B 08, Pmulhrsw_mm_mmm64, Legacy, SSSE3, op0=rw op1=r rw=mm1 r=rax rm=ds:rax;Packed64_Int16
# pmulhrsw xmm1,xmm5
66 0F380B CD, Pmulhrsw_xmm_xmmm128, Legacy, SSSE3, op0=rw op1=r rw=xmm1 r=xmm5
# pmulhrsw xmm1,[rax]
66 0F380B 08, Pmulhrsw_xmm_xmmm128, Legacy, SSSE3, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int16
# vpmulhrsw xmm2,xmm6,xmm3
C4E249 0B D3, VEX_Vpmulhrsw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpmulhrsw xmm2,xmm6,[rax]
C4E249 0B 10, VEX_Vpmulhrsw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int16
# vpmulhrsw ymm2,ymm6,ymm3
C4E24D 0B D3, VEX_Vpmulhrsw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpmulhrsw ymm2,ymm6,[rax]
C4E24D 0B 10, VEX_Vpmulhrsw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int16
# vpmulhrsw xmm2,xmm6,[rax+10h]
62 F24D08 0B 50 01, EVEX_Vpmulhrsw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int16
# vpmulhrsw xmm2{k3},xmm6,xmm3
62 F24D0B 0B D3, EVEX_Vpmulhrsw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpmulhrsw xmm18{k3}{z},xmm14,xmm3
62 E20D8B 0B D3, EVEX_Vpmulhrsw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpmulhrsw ymm2,ymm6,[rax+20h]
62 F24D28 0B 50 01, EVEX_Vpmulhrsw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int16
# vpmulhrsw ymm2{k3},ymm6,ymm3
62 F24D2B 0B D3, EVEX_Vpmulhrsw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpmulhrsw ymm18{k3}{z},ymm14,ymm3
62 E20DAB 0B D3, EVEX_Vpmulhrsw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpmulhrsw zmm2,zmm6,[rax+40h]
62 F24D48 0B 50 01, EVEX_Vpmulhrsw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int16
# vpmulhrsw zmm2{k3},zmm6,zmm3
62 F24D4B 0B D3, EVEX_Vpmulhrsw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpmulhrsw zmm18{k3}{z},zmm14,zmm3
62 E20DCB 0B D3, EVEX_Vpmulhrsw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# vpermilps xmm2,xmm6,xmm3
C4E249 0C D3, VEX_Vpermilps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpermilps xmm2,xmm6,[rax]
C4E249 0C 10, VEX_Vpermilps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vpermilps ymm2,ymm6,ymm3
C4E24D 0C D3, VEX_Vpermilps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpermilps ymm2,ymm6,[rax]
C4E24D 0C 10, VEX_Vpermilps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vpermilps xmm2,xmm6,[rax+10h]
62 F24D08 0C 50 01, EVEX_Vpermilps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vpermilps xmm18{k3},xmm14,xmm3
62 E20D0B 0C D3, EVEX_Vpermilps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpermilps xmm2{k3}{z},xmm6,xmm3
62 F24D8B 0C D3, EVEX_Vpermilps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpermilps ymm2,ymm6,[rax+20h]
62 F24D28 0C 50 01, EVEX_Vpermilps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vpermilps ymm18{k3},ymm14,ymm3
62 E20D2B 0C D3, EVEX_Vpermilps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpermilps ymm2{k3}{z},ymm6,ymm3
62 F24DAB 0C D3, EVEX_Vpermilps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpermilps zmm2,zmm6,[rax+40h]
62 F24D48 0C 50 01, EVEX_Vpermilps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vpermilps zmm18{k3},zmm14,zmm3
62 E20D4B 0C D3, EVEX_Vpermilps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpermilps zmm2{k3}{z},zmm6,zmm3
62 F24DCB 0C D3, EVEX_Vpermilps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpermilpd xmm2,xmm6,xmm3
C4E249 0D D3, VEX_Vpermilpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpermilpd xmm2,xmm6,[rax]
C4E249 0D 10, VEX_Vpermilpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vpermilpd ymm2,ymm6,ymm3
C4E24D 0D D3, VEX_Vpermilpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpermilpd ymm2,ymm6,[rax]
C4E24D 0D 10, VEX_Vpermilpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vpermilpd xmm2,xmm6,[rax+10h]
62 F2CD08 0D 50 01, EVEX_Vpermilpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vpermilpd xmm18{k3},xmm14,xmm3
62 E28D0B 0D D3, EVEX_Vpermilpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpermilpd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 0D D3, EVEX_Vpermilpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpermilpd ymm2,ymm6,[rax+20h]
62 F2CD28 0D 50 01, EVEX_Vpermilpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vpermilpd ymm18{k3},ymm14,ymm3
62 E28D2B 0D D3, EVEX_Vpermilpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpermilpd ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 0D D3, EVEX_Vpermilpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpermilpd zmm2,zmm6,[rax+40h]
62 F2CD48 0D 50 01, EVEX_Vpermilpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vpermilpd zmm18{k3},zmm14,zmm3
62 E28D4B 0D D3, EVEX_Vpermilpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpermilpd zmm2{k3}{z},zmm6,zmm3
62 F2CDCB 0D D3, EVEX_Vpermilpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vtestps xmm1,xmm5
C4E279 0E CD, VEX_Vtestps_xmm_xmmm128, VEX, AVX, fw=cz fc=aops op0=r op1=r r=xmm1 r=xmm5
# vtestps xmm2,[rax]
C4E279 0E 10, VEX_Vtestps_xmm_xmmm128, VEX, AVX, fw=cz fc=aops op0=r op1=r r=xmm2 r=rax rm=ds:rax;Packed128_Float32
# vtestps ymm1,ymm5
C4E27D 0E CD, VEX_Vtestps_ymm_ymmm256, VEX, AVX, fw=cz fc=aops op0=r op1=r r=ymm1 r=ymm5
# vtestps ymm2,[rax]
C4E27D 0E 10, VEX_Vtestps_ymm_ymmm256, VEX, AVX, fw=cz fc=aops op0=r op1=r r=ymm2 r=rax rm=ds:rax;Packed256_Float32
# vtestpd xmm1,xmm5
C4E279 0F CD, VEX_Vtestpd_xmm_xmmm128, VEX, AVX, fw=cz fc=aops op0=r op1=r r=xmm1 r=xmm5
# vtestpd xmm2,[rax]
C4E279 0F 10, VEX_Vtestpd_xmm_xmmm128, VEX, AVX, fw=cz fc=aops op0=r op1=r r=xmm2 r=rax rm=ds:rax;Packed128_Float64
# vtestpd ymm1,ymm5
C4E27D 0F CD, VEX_Vtestpd_ymm_ymmm256, VEX, AVX, fw=cz fc=aops op0=r op1=r r=ymm1 r=ymm5
# vtestpd ymm2,[rax]
C4E27D 0F 10, VEX_Vtestpd_ymm_ymmm256, VEX, AVX, fw=cz fc=aops op0=r op1=r r=ymm2 r=rax rm=ds:rax;Packed256_Float64
# pblendvb xmm1,xmm5,xmm0
66 0F3810 CD, Pblendvb_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=xmm5 r=xmm0
# pblendvb xmm1,[rax],xmm0
66 0F3810 08, Pblendvb_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt8 r=xmm0
# vpsrlvw xmm2,xmm6,[rax+10h]
62 F2CD08 10 50 01, EVEX_Vpsrlvw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpsrlvw xmm2{k3},xmm6,xmm3
62 F2CD0B 10 D3, EVEX_Vpsrlvw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpsrlvw xmm18{k3}{z},xmm14,xmm3
62 E28D8B 10 D3, EVEX_Vpsrlvw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpsrlvw ymm2,ymm6,[rax+20h]
62 F2CD28 10 50 01, EVEX_Vpsrlvw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpsrlvw ymm2{k3},ymm6,ymm3
62 F2CD2B 10 D3, EVEX_Vpsrlvw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpsrlvw ymm18{k3}{z},ymm14,ymm3
62 E28DAB 10 D3, EVEX_Vpsrlvw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpsrlvw zmm2,zmm6,[rax+40h]
62 F2CD48 10 50 01, EVEX_Vpsrlvw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpsrlvw zmm2{k3},zmm6,zmm3
62 F2CD4B 10 D3, EVEX_Vpsrlvw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpsrlvw zmm18{k3}{z},zmm14,zmm3
62 E28DCB 10 D3, EVEX_Vpsrlvw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# vpmovuswb xmm3,xmm2
62 F27E08 10 D3, EVEX_Vpmovuswb_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm3 r=xmm2
# vpmovuswb qword ptr [rax+8],xmm2
62 F27E08 10 50 01, EVEX_Vpmovuswb_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512BW, op0=w op1=r r=rax r=xmm2 wm=ds:rax+8;Packed64_UInt8
# vpmovuswb qword ptr [rax+8]{k3},xmm2
62 F27E0B 10 50 01, EVEX_Vpmovuswb_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512BW, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+8;Packed64_UInt8
# vpmovuswb xmm3{k3},xmm2
62 F27E0B 10 D3, EVEX_Vpmovuswb_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vpmovuswb xmm3{k3}{z},xmm18
62 E27E8B 10 D3, EVEX_Vpmovuswb_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm3 r=k3 r=xmm18
# vpmovuswb xmm3,ymm2
62 F27E28 10 D3, EVEX_Vpmovuswb_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm3 r=ymm2
# vpmovuswb xmmword ptr [rax+10h],ymm2
62 F27E28 10 50 01, EVEX_Vpmovuswb_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512BW, op0=w op1=r r=rax r=ymm2 wm=ds:rax+0x10;Packed128_UInt8
# vpmovuswb xmmword ptr [rax+10h]{k3},ymm2
62 F27E2B 10 50 01, EVEX_Vpmovuswb_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512BW, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+0x10;Packed128_UInt8
# vpmovuswb xmm3{k3},ymm2
62 F27E2B 10 D3, EVEX_Vpmovuswb_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=ymm2
# vpmovuswb xmm3{k3}{z},ymm18
62 E27EAB 10 D3, EVEX_Vpmovuswb_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm3 r=k3 r=ymm18
# vpmovuswb ymm3,zmm2
62 F27E48 10 D3, EVEX_Vpmovuswb_ymmm256_k1z_zmm, EVEX, AVX512BW, op0=w op1=r w=vmm3 r=zmm2
# vpmovuswb ymmword ptr [rax+20h],zmm2
62 F27E48 10 50 01, EVEX_Vpmovuswb_ymmm256_k1z_zmm, EVEX, AVX512BW, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x20;Packed256_UInt8
# vpmovuswb ymmword ptr [rax+20h]{k3},zmm2
62 F27E4B 10 50 01, EVEX_Vpmovuswb_ymmm256_k1z_zmm, EVEX, AVX512BW, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x20;Packed256_UInt8
# vpmovuswb ymm3{k3},zmm2
62 F27E4B 10 D3, EVEX_Vpmovuswb_ymmm256_k1z_zmm, EVEX, AVX512BW, op0=rw op1=r w=vmm3 r=ymm3 r=k3 r=zmm2
# vpmovuswb ymm3{k3}{z},zmm18
62 E27ECB 10 D3, EVEX_Vpmovuswb_ymmm256_k1z_zmm, EVEX, AVX512BW, op0=w op1=r w=vmm3 r=k3 r=zmm18
# vpsravw xmm2,xmm6,[rax+10h]
62 F2CD08 11 50 01, EVEX_Vpsravw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpsravw xmm2{k3},xmm6,xmm3
62 F2CD0B 11 D3, EVEX_Vpsravw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpsravw xmm18{k3}{z},xmm14,xmm3
62 E28D8B 11 D3, EVEX_Vpsravw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpsravw ymm2,ymm6,[rax+20h]
62 F2CD28 11 50 01, EVEX_Vpsravw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpsravw ymm2{k3},ymm6,ymm3
62 F2CD2B 11 D3, EVEX_Vpsravw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpsravw ymm18{k3}{z},ymm14,ymm3
62 E28DAB 11 D3, EVEX_Vpsravw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpsravw zmm2,zmm6,[rax+40h]
62 F2CD48 11 50 01, EVEX_Vpsravw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpsravw zmm2{k3},zmm6,zmm3
62 F2CD4B 11 D3, EVEX_Vpsravw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpsravw zmm18{k3}{z},zmm14,zmm3
62 E28DCB 11 D3, EVEX_Vpsravw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# vpmovusdb xmm3,xmm2
62 F27E08 11 D3, EVEX_Vpmovusdb_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vpmovusdb dword ptr [rax+4],xmm2
62 F27E08 11 50 01, EVEX_Vpmovusdb_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+4;Packed32_UInt8
# vpmovusdb dword ptr [rax+4]{k3},xmm2
62 F27E0B 11 50 01, EVEX_Vpmovusdb_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+4;Packed32_UInt8
# vpmovusdb xmm3{k3},xmm2
62 F27E0B 11 D3, EVEX_Vpmovusdb_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vpmovusdb xmm3{k3}{z},xmm18
62 E27E8B 11 D3, EVEX_Vpmovusdb_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=xmm18
# vpmovusdb xmm3,ymm2
62 F27E28 11 D3, EVEX_Vpmovusdb_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vpmovusdb qword ptr [rax+8],ymm2
62 F27E28 11 50 01, EVEX_Vpmovusdb_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+8;Packed64_UInt8
# vpmovusdb qword ptr [rax+8]{k3},ymm2
62 F27E2B 11 50 01, EVEX_Vpmovusdb_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+8;Packed64_UInt8
# vpmovusdb xmm3{k3},ymm2
62 F27E2B 11 D3, EVEX_Vpmovusdb_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=ymm2
# vpmovusdb xmm3{k3}{z},ymm18
62 E27EAB 11 D3, EVEX_Vpmovusdb_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=ymm18
# vpmovusdb xmm3,zmm2
62 F27E48 11 D3, EVEX_Vpmovusdb_xmmm128_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vpmovusdb xmmword ptr [rax+10h],zmm2
62 F27E48 11 50 01, EVEX_Vpmovusdb_xmmm128_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x10;Packed128_UInt8
# vpmovusdb xmmword ptr [rax+10h]{k3},zmm2
62 F27E4B 11 50 01, EVEX_Vpmovusdb_xmmm128_k1z_zmm, EVEX, AVX512F, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x10;Packed128_UInt8
# vpmovusdb xmm3{k3},zmm2
62 F27E4B 11 D3, EVEX_Vpmovusdb_xmmm128_k1z_zmm, EVEX, AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=zmm2
# vpmovusdb xmm3{k3}{z},zmm18
62 E27ECB 11 D3, EVEX_Vpmovusdb_xmmm128_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=k3 r=zmm18
# vpsllvw xmm2,xmm6,[rax+10h]
62 F2CD08 12 50 01, EVEX_Vpsllvw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpsllvw xmm2{k3},xmm6,xmm3
62 F2CD0B 12 D3, EVEX_Vpsllvw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpsllvw xmm18{k3}{z},xmm14,xmm3
62 E28D8B 12 D3, EVEX_Vpsllvw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpsllvw ymm2,ymm6,[rax+20h]
62 F2CD28 12 50 01, EVEX_Vpsllvw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpsllvw ymm2{k3},ymm6,ymm3
62 F2CD2B 12 D3, EVEX_Vpsllvw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpsllvw ymm18{k3}{z},ymm14,ymm3
62 E28DAB 12 D3, EVEX_Vpsllvw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpsllvw zmm2,zmm6,[rax+40h]
62 F2CD48 12 50 01, EVEX_Vpsllvw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpsllvw zmm2{k3},zmm6,zmm3
62 F2CD4B 12 D3, EVEX_Vpsllvw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpsllvw zmm18{k3}{z},zmm14,zmm3
62 E28DCB 12 D3, EVEX_Vpsllvw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# vpmovusqb xmm3,xmm2
62 F27E08 12 D3, EVEX_Vpmovusqb_xmmm16_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vpmovusqb word ptr [rax+2],xmm2
62 F27E08 12 50 01, EVEX_Vpmovusqb_xmmm16_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+2;Packed16_UInt8
# vpmovusqb word ptr [rax+2]{k3},xmm2
62 F27E0B 12 50 01, EVEX_Vpmovusqb_xmmm16_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+2;Packed16_UInt8
# vpmovusqb xmm3{k3},xmm2
62 F27E0B 12 D3, EVEX_Vpmovusqb_xmmm16_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vpmovusqb xmm3{k3}{z},xmm18
62 E27E8B 12 D3, EVEX_Vpmovusqb_xmmm16_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=xmm18
# vpmovusqb xmm3,ymm2
62 F27E28 12 D3, EVEX_Vpmovusqb_xmmm32_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vpmovusqb dword ptr [rax+4],ymm2
62 F27E28 12 50 01, EVEX_Vpmovusqb_xmmm32_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+4;Packed32_UInt8
# vpmovusqb dword ptr [rax+4]{k3},ymm2
62 F27E2B 12 50 01, EVEX_Vpmovusqb_xmmm32_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+4;Packed32_UInt8
# vpmovusqb xmm3{k3},ymm2
62 F27E2B 12 D3, EVEX_Vpmovusqb_xmmm32_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=ymm2
# vpmovusqb xmm3{k3}{z},ymm18
62 E27EAB 12 D3, EVEX_Vpmovusqb_xmmm32_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=ymm18
# vpmovusqb xmm3,zmm2
62 F27E48 12 D3, EVEX_Vpmovusqb_xmmm64_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vpmovusqb qword ptr [rax+8],zmm2
62 F27E48 12 50 01, EVEX_Vpmovusqb_xmmm64_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+8;Packed64_UInt8
# vpmovusqb qword ptr [rax+8]{k3},zmm2
62 F27E4B 12 50 01, EVEX_Vpmovusqb_xmmm64_k1z_zmm, EVEX, AVX512F, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+8;Packed64_UInt8
# vpmovusqb xmm3{k3},zmm2
62 F27E4B 12 D3, EVEX_Vpmovusqb_xmmm64_k1z_zmm, EVEX, AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=zmm2
# vpmovusqb xmm3{k3}{z},zmm18
62 E27ECB 12 D3, EVEX_Vpmovusqb_xmmm64_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=k3 r=zmm18
# vcvtph2ps xmm1,xmm5
C4E279 13 CD, VEX_Vcvtph2ps_xmm_xmmm64, VEX, F16C, op0=w op1=r w=vmm1 r=xmm5
# vcvtph2ps xmm2,qword ptr [rax]
C4E279 13 10, VEX_Vcvtph2ps_xmm_xmmm64, VEX, F16C, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed64_Float16
# vcvtph2ps ymm1,xmm5
C4E27D 13 CD, VEX_Vcvtph2ps_ymm_xmmm128, VEX, F16C, op0=w op1=r w=vmm1 r=xmm5
# vcvtph2ps ymm2,xmmword ptr [rax]
C4E27D 13 10, VEX_Vcvtph2ps_ymm_xmmm128, VEX, F16C, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Float16
# vcvtph2ps xmm2,qword ptr [rax+8]
62 F27D08 13 50 01, EVEX_Vcvtph2ps_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed64_Float16
# vcvtph2ps xmm18{k3},xmm3
62 E27D0B 13 D3, EVEX_Vcvtph2ps_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm18 r=xmm18 r=k3 r=xmm3
# vcvtph2ps xmm2{k3}{z},xmm3
62 F27D8B 13 D3, EVEX_Vcvtph2ps_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtph2ps ymm2,xmmword ptr [rax+10h]
62 F27D28 13 50 01, EVEX_Vcvtph2ps_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float16
# vcvtph2ps ymm18{k3},xmm3
62 E27D2B 13 D3, EVEX_Vcvtph2ps_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm18 r=ymm18 r=k3 r=xmm3
# vcvtph2ps ymm2{k3}{z},xmm3
62 F27DAB 13 D3, EVEX_Vcvtph2ps_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtph2ps zmm2,ymmword ptr [rax+20h]
62 F27D48 13 50 01, EVEX_Vcvtph2ps_zmm_k1z_ymmm256_sae, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float16
# vcvtph2ps zmm2{k3},ymm3 {sae}
62 F27D1B 13 D3, EVEX_Vcvtph2ps_zmm_k1z_ymmm256_sae, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=ymm3
# vcvtph2ps zmm2{k3}{z},ymm3 {sae}
62 F27DDB 13 D3, EVEX_Vcvtph2ps_zmm_k1z_ymmm256_sae, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vpmovusdw xmm3,xmm2
62 F27E08 13 D3, EVEX_Vpmovusdw_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vpmovusdw qword ptr [rax+8],xmm2
62 F27E08 13 50 01, EVEX_Vpmovusdw_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+8;Packed64_UInt16
# vpmovusdw qword ptr [rax+8]{k3},xmm2
62 F27E0B 13 50 01, EVEX_Vpmovusdw_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+8;Packed64_UInt16
# vpmovusdw xmm3{k3},xmm2
62 F27E0B 13 D3, EVEX_Vpmovusdw_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vpmovusdw xmm3{k3}{z},xmm18
62 E27E8B 13 D3, EVEX_Vpmovusdw_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=xmm18
# vpmovusdw xmm3,ymm2
62 F27E28 13 D3, EVEX_Vpmovusdw_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vpmovusdw xmmword ptr [rax+10h],ymm2
62 F27E28 13 50 01, EVEX_Vpmovusdw_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+0x10;Packed128_UInt16
# vpmovusdw xmmword ptr [rax+10h]{k3},ymm2
62 F27E2B 13 50 01, EVEX_Vpmovusdw_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+0x10;Packed128_UInt16
# vpmovusdw xmm3{k3},ymm2
62 F27E2B 13 D3, EVEX_Vpmovusdw_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=ymm2
# vpmovusdw xmm3{k3}{z},ymm18
62 E27EAB 13 D3, EVEX_Vpmovusdw_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=ymm18
# vpmovusdw ymm3,zmm2
62 F27E48 13 D3, EVEX_Vpmovusdw_ymmm256_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vpmovusdw ymmword ptr [rax+20h],zmm2
62 F27E48 13 50 01, EVEX_Vpmovusdw_ymmm256_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x20;Packed256_UInt16
# vpmovusdw ymmword ptr [rax+20h]{k3},zmm2
62 F27E4B 13 50 01, EVEX_Vpmovusdw_ymmm256_k1z_zmm, EVEX, AVX512F, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x20;Packed256_UInt16
# vpmovusdw ymm3{k3},zmm2
62 F27E4B 13 D3, EVEX_Vpmovusdw_ymmm256_k1z_zmm, EVEX, AVX512F, op0=rw op1=r w=vmm3 r=ymm3 r=k3 r=zmm2
# vpmovusdw ymm3{k3}{z},zmm18
62 E27ECB 13 D3, EVEX_Vpmovusdw_ymmm256_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=k3 r=zmm18
# blendvps xmm1,xmm5,xmm0
66 0F3814 CD, Blendvps_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=xmm5 r=xmm0
# blendvps xmm1,[rax],xmm0
66 0F3814 08, Blendvps_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=rax r=xmm0 rm=ds:rax;Packed128_Float32
# vprorvd xmm2,xmm6,[rax+10h]
62 F24D08 14 50 01, EVEX_Vprorvd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vprorvd xmm18{k3},xmm14,xmm3
62 E20D0B 14 D3, EVEX_Vprorvd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vprorvd xmm2{k3}{z},xmm6,xmm3
62 F24D8B 14 D3, EVEX_Vprorvd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vprorvd ymm2,ymm6,[rax+20h]
62 F24D28 14 50 01, EVEX_Vprorvd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vprorvd ymm18{k3},ymm14,ymm3
62 E20D2B 14 D3, EVEX_Vprorvd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vprorvd ymm2{k3}{z},ymm6,ymm3
62 F24DAB 14 D3, EVEX_Vprorvd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vprorvd zmm2,zmm6,[rax+40h]
62 F24D48 14 50 01, EVEX_Vprorvd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vprorvd zmm18{k3},zmm14,zmm3
62 E20D4B 14 D3, EVEX_Vprorvd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vprorvd zmm2{k3}{z},zmm6,zmm3
62 F24DCB 14 D3, EVEX_Vprorvd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vprorvq xmm2,xmm6,[rax+10h]
62 F2CD08 14 50 01, EVEX_Vprorvq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vprorvq xmm18{k3},xmm14,xmm3
62 E28D0B 14 D3, EVEX_Vprorvq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vprorvq xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 14 D3, EVEX_Vprorvq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vprorvq ymm2,ymm6,[rax+20h]
62 F2CD28 14 50 01, EVEX_Vprorvq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vprorvq ymm18{k3},ymm14,ymm3
62 E28D2B 14 D3, EVEX_Vprorvq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vprorvq ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 14 D3, EVEX_Vprorvq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vprorvq zmm2,zmm6,[rax+40h]
62 F2CD48 14 50 01, EVEX_Vprorvq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vprorvq zmm18{k3},zmm14,zmm3
62 E28D4B 14 D3, EVEX_Vprorvq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vprorvq zmm2{k3}{z},zmm6,zmm3
62 F2CDCB 14 D3, EVEX_Vprorvq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpmovusqw xmm3,xmm2
62 F27E08 14 D3, EVEX_Vpmovusqw_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vpmovusqw dword ptr [rax+4],xmm2
62 F27E08 14 50 01, EVEX_Vpmovusqw_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+4;Packed32_UInt16
# vpmovusqw dword ptr [rax+4]{k3},xmm2
62 F27E0B 14 50 01, EVEX_Vpmovusqw_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+4;Packed32_UInt16
# vpmovusqw xmm3{k3},xmm2
62 F27E0B 14 D3, EVEX_Vpmovusqw_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vpmovusqw xmm3{k3}{z},xmm18
62 E27E8B 14 D3, EVEX_Vpmovusqw_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=xmm18
# vpmovusqw xmm3,ymm2
62 F27E28 14 D3, EVEX_Vpmovusqw_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vpmovusqw qword ptr [rax+8],ymm2
62 F27E28 14 50 01, EVEX_Vpmovusqw_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+8;Packed64_UInt16
# vpmovusqw qword ptr [rax+8]{k3},ymm2
62 F27E2B 14 50 01, EVEX_Vpmovusqw_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+8;Packed64_UInt16
# vpmovusqw xmm3{k3},ymm2
62 F27E2B 14 D3, EVEX_Vpmovusqw_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=ymm2
# vpmovusqw xmm3{k3}{z},ymm18
62 E27EAB 14 D3, EVEX_Vpmovusqw_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=ymm18
# vpmovusqw xmm3,zmm2
62 F27E48 14 D3, EVEX_Vpmovusqw_xmmm128_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vpmovusqw xmmword ptr [rax+10h],zmm2
62 F27E48 14 50 01, EVEX_Vpmovusqw_xmmm128_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x10;Packed128_UInt16
# vpmovusqw xmmword ptr [rax+10h]{k3},zmm2
62 F27E4B 14 50 01, EVEX_Vpmovusqw_xmmm128_k1z_zmm, EVEX, AVX512F, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x10;Packed128_UInt16
# vpmovusqw xmm3{k3},zmm2
62 F27E4B 14 D3, EVEX_Vpmovusqw_xmmm128_k1z_zmm, EVEX, AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=zmm2
# vpmovusqw xmm3{k3}{z},zmm18
62 E27ECB 14 D3, EVEX_Vpmovusqw_xmmm128_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=k3 r=zmm18
# blendvpd xmm1,xmm5,xmm0
66 0F3815 CD, Blendvpd_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=xmm5 r=xmm0
# blendvpd xmm1,[rax],xmm0
66 0F3815 08, Blendvpd_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=rax r=xmm0 rm=ds:rax;Packed128_Float64
# vprolvd xmm2,xmm6,[rax+10h]
62 F24D08 15 50 01, EVEX_Vprolvd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vprolvd xmm18{k3},xmm14,xmm3
62 E20D0B 15 D3, EVEX_Vprolvd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vprolvd xmm2{k3}{z},xmm6,xmm3
62 F24D8B 15 D3, EVEX_Vprolvd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vprolvd ymm2,ymm6,[rax+20h]
62 F24D28 15 50 01, EVEX_Vprolvd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vprolvd ymm18{k3},ymm14,ymm3
62 E20D2B 15 D3, EVEX_Vprolvd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vprolvd ymm2{k3}{z},ymm6,ymm3
62 F24DAB 15 D3, EVEX_Vprolvd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vprolvd zmm2,zmm6,[rax+40h]
62 F24D48 15 50 01, EVEX_Vprolvd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vprolvd zmm18{k3},zmm14,zmm3
62 E20D4B 15 D3, EVEX_Vprolvd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vprolvd zmm2{k3}{z},zmm6,zmm3
62 F24DCB 15 D3, EVEX_Vprolvd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vprolvq xmm2,xmm6,[rax+10h]
62 F2CD08 15 50 01, EVEX_Vprolvq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vprolvq xmm18{k3},xmm14,xmm3
62 E28D0B 15 D3, EVEX_Vprolvq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vprolvq xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 15 D3, EVEX_Vprolvq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vprolvq ymm2,ymm6,[rax+20h]
62 F2CD28 15 50 01, EVEX_Vprolvq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vprolvq ymm18{k3},ymm14,ymm3
62 E28D2B 15 D3, EVEX_Vprolvq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vprolvq ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 15 D3, EVEX_Vprolvq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vprolvq zmm2,zmm6,[rax+40h]
62 F2CD48 15 50 01, EVEX_Vprolvq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vprolvq zmm18{k3},zmm14,zmm3
62 E28D4B 15 D3, EVEX_Vprolvq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vprolvq zmm2{k3}{z},zmm6,zmm3
62 F2CDCB 15 D3, EVEX_Vprolvq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpmovusqd xmm3,xmm2
62 F27E08 15 D3, EVEX_Vpmovusqd_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vpmovusqd qword ptr [rax+8],xmm2
62 F27E08 15 50 01, EVEX_Vpmovusqd_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+8;Packed64_UInt32
# vpmovusqd qword ptr [rax+8]{k3},xmm2
62 F27E0B 15 50 01, EVEX_Vpmovusqd_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+8;Packed64_UInt32
# vpmovusqd xmm3{k3},xmm2
62 F27E0B 15 D3, EVEX_Vpmovusqd_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vpmovusqd xmm3{k3}{z},xmm18
62 E27E8B 15 D3, EVEX_Vpmovusqd_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=xmm18
# vpmovusqd xmm3,ymm2
62 F27E28 15 D3, EVEX_Vpmovusqd_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vpmovusqd xmmword ptr [rax+10h],ymm2
62 F27E28 15 50 01, EVEX_Vpmovusqd_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+0x10;Packed128_UInt32
# vpmovusqd xmmword ptr [rax+10h]{k3},ymm2
62 F27E2B 15 50 01, EVEX_Vpmovusqd_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+0x10;Packed128_UInt32
# vpmovusqd xmm3{k3},ymm2
62 F27E2B 15 D3, EVEX_Vpmovusqd_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=ymm2
# vpmovusqd xmm3{k3}{z},ymm18
62 E27EAB 15 D3, EVEX_Vpmovusqd_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=ymm18
# vpmovusqd ymm3,zmm2
62 F27E48 15 D3, EVEX_Vpmovusqd_ymmm256_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vpmovusqd ymmword ptr [rax+20h],zmm2
62 F27E48 15 50 01, EVEX_Vpmovusqd_ymmm256_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x20;Packed256_UInt32
# vpmovusqd ymmword ptr [rax+20h]{k3},zmm2
62 F27E4B 15 50 01, EVEX_Vpmovusqd_ymmm256_k1z_zmm, EVEX, AVX512F, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x20;Packed256_UInt32
# vpmovusqd ymm3{k3},zmm2
62 F27E4B 15 D3, EVEX_Vpmovusqd_ymmm256_k1z_zmm, EVEX, AVX512F, op0=rw op1=r w=vmm3 r=ymm3 r=k3 r=zmm2
# vpmovusqd ymm3{k3}{z},zmm18
62 E27ECB 15 D3, EVEX_Vpmovusqd_ymmm256_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=k3 r=zmm18
# vpermps ymm2,ymm6,ymm3
C4E24D 16 D3, VEX_Vpermps_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpermps ymm2,ymm6,[rax]
C4E24D 16 10, VEX_Vpermps_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vpermps ymm2,ymm6,[rax+20h]
62 F24D28 16 50 01, EVEX_Vpermps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vpermps ymm18{k3},ymm14,ymm3
62 E20D2B 16 D3, EVEX_Vpermps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpermps ymm2{k3}{z},ymm6,ymm3
62 F24DAB 16 D3, EVEX_Vpermps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpermps zmm2,zmm6,[rax+40h]
62 F24D48 16 50 01, EVEX_Vpermps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vpermps zmm18{k3},zmm14,zmm3
62 E20D4B 16 D3, EVEX_Vpermps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpermps zmm2{k3}{z},zmm6,zmm3
62 F24DCB 16 D3, EVEX_Vpermps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpermpd ymm2,ymm6,[rax+20h]
62 F2CD28 16 50 01, EVEX_Vpermpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vpermpd ymm18{k3},ymm14,ymm3
62 E28D2B 16 D3, EVEX_Vpermpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpermpd ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 16 D3, EVEX_Vpermpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpermpd zmm2,zmm6,[rax+40h]
62 F2CD48 16 50 01, EVEX_Vpermpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vpermpd zmm18{k3},zmm14,zmm3
62 E28D4B 16 D3, EVEX_Vpermpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpermpd zmm2{k3}{z},zmm6,zmm3
62 F2CDCB 16 D3, EVEX_Vpermpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# ptest xmm1,xmm5
66 0F3817 CD, Ptest_xmm_xmmm128, Legacy, SSE4_1, fw=cz fc=aops op0=r op1=r r=xmm1 r=xmm5
# ptest xmm1,xmmword ptr [rax]
66 0F3817 08, Ptest_xmm_xmmm128, Legacy, SSE4_1, fw=cz fc=aops op0=r op1=r r=xmm1 r=rax rm=ds:rax;UInt128
# vptest xmm1,xmm5
C4E279 17 CD, VEX_Vptest_xmm_xmmm128, VEX, AVX, fw=cz fc=aops op0=r op1=r r=xmm1 r=xmm5
# vptest xmm2,xmmword ptr [rax]
C4E279 17 10, VEX_Vptest_xmm_xmmm128, VEX, AVX, fw=cz fc=aops op0=r op1=r r=xmm2 r=rax rm=ds:rax;UInt128
# vptest ymm1,ymm5
C4E27D 17 CD, VEX_Vptest_ymm_ymmm256, VEX, AVX, fw=cz fc=aops op0=r op1=r r=ymm1 r=ymm5
# vptest ymm2,ymmword ptr [rax]
C4E27D 17 10, VEX_Vptest_ymm_ymmm256, VEX, AVX, fw=cz fc=aops op0=r op1=r r=ymm2 r=rax rm=ds:rax;UInt256
# vbroadcastss xmm1,xmm5
C4E279 18 CD, VEX_Vbroadcastss_xmm_xmm, VEX, AVX2, op0=w op1=r w=vmm1 r=xmm5
# vbroadcastss xmm2,dword ptr [rax]
C4E279 18 10, VEX_Vbroadcastss_xmm_m32, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Float32
# vbroadcastss ymm1,xmm5
C4E27D 18 CD, VEX_Vbroadcastss_ymm_xmm, VEX, AVX2, op0=w op1=r w=vmm1 r=xmm5
# vbroadcastss ymm2,dword ptr [rax]
C4E27D 18 10, VEX_Vbroadcastss_ymm_m32, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Float32
# vbroadcastss xmm2,xmm3
62 F27D08 18 D3, EVEX_Vbroadcastss_xmm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vbroadcastss xmm2,dword ptr [rax+4]
62 F27D08 18 50 01, EVEX_Vbroadcastss_xmm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+4;Float32
# vbroadcastss xmm2{k3},xmm3
62 F27D0B 18 D3, EVEX_Vbroadcastss_xmm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vbroadcastss xmm10{k3}{z},xmm19
62 327D8B 18 D3, EVEX_Vbroadcastss_xmm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vbroadcastss ymm2,xmm3
62 F27D28 18 D3, EVEX_Vbroadcastss_ymm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vbroadcastss ymm2,dword ptr [rax+4]
62 F27D28 18 50 01, EVEX_Vbroadcastss_ymm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+4;Float32
# vbroadcastss ymm2{k3},xmm3
62 F27D2B 18 D3, EVEX_Vbroadcastss_ymm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vbroadcastss ymm10{k3}{z},xmm19
62 327DAB 18 D3, EVEX_Vbroadcastss_ymm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vbroadcastss zmm2,xmm3
62 F27D48 18 D3, EVEX_Vbroadcastss_zmm_k1z_xmmm32, EVEX, AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vbroadcastss zmm2,dword ptr [rax+4]
62 F27D48 18 50 01, EVEX_Vbroadcastss_zmm_k1z_xmmm32, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+4;Float32
# vbroadcastss zmm2{k3},xmm3
62 F27D4B 18 D3, EVEX_Vbroadcastss_zmm_k1z_xmmm32, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=xmm3
# vbroadcastss zmm10{k3}{z},xmm19
62 327DCB 18 D3, EVEX_Vbroadcastss_zmm_k1z_xmmm32, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vbroadcastsd ymm1,xmm5
C4E27D 19 CD, VEX_Vbroadcastsd_ymm_xmm, VEX, AVX2, op0=w op1=r w=vmm1 r=xmm5
# vbroadcastsd ymm2,qword ptr [rax]
C4E27D 19 10, VEX_Vbroadcastsd_ymm_m64, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Float64
# vbroadcastf32x2 ymm2,xmm3
62 F27D28 19 D3, EVEX_Vbroadcastf32x2_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=xmm3
# vbroadcastf32x2 ymm2,qword ptr [rax+8]
62 F27D28 19 50 01, EVEX_Vbroadcastf32x2_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed64_Float32
# vbroadcastf32x2 ymm2{k3},xmm3
62 F27D2B 19 D3, EVEX_Vbroadcastf32x2_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vbroadcastf32x2 ymm10{k3}{z},xmm19
62 327DAB 19 D3, EVEX_Vbroadcastf32x2_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vbroadcastf32x2 zmm2,xmm3
62 F27D48 19 D3, EVEX_Vbroadcastf32x2_zmm_k1z_xmmm64, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=xmm3
# vbroadcastf32x2 zmm2,qword ptr [rax+8]
62 F27D48 19 50 01, EVEX_Vbroadcastf32x2_zmm_k1z_xmmm64, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed64_Float32
# vbroadcastf32x2 zmm2{k3},xmm3
62 F27D4B 19 D3, EVEX_Vbroadcastf32x2_zmm_k1z_xmmm64, EVEX, AVX512DQ, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=xmm3
# vbroadcastf32x2 zmm10{k3}{z},xmm19
62 327DCB 19 D3, EVEX_Vbroadcastf32x2_zmm_k1z_xmmm64, EVEX, AVX512DQ, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vbroadcastsd ymm2,xmm3
62 F2FD28 19 D3, EVEX_Vbroadcastsd_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vbroadcastsd ymm2,qword ptr [rax+8]
62 F2FD28 19 50 01, EVEX_Vbroadcastsd_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Float64
# vbroadcastsd ymm2{k3},xmm3
62 F2FD2B 19 D3, EVEX_Vbroadcastsd_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vbroadcastsd ymm10{k3}{z},xmm19
62 32FDAB 19 D3, EVEX_Vbroadcastsd_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vbroadcastsd zmm2,xmm3
62 F2FD48 19 D3, EVEX_Vbroadcastsd_zmm_k1z_xmmm64, EVEX, AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vbroadcastsd zmm2,qword ptr [rax+8]
62 F2FD48 19 50 01, EVEX_Vbroadcastsd_zmm_k1z_xmmm64, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Float64
# vbroadcastsd zmm2{k3},xmm3
62 F2FD4B 19 D3, EVEX_Vbroadcastsd_zmm_k1z_xmmm64, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=xmm3
# vbroadcastsd zmm10{k3}{z},xmm19
62 32FDCB 19 D3, EVEX_Vbroadcastsd_zmm_k1z_xmmm64, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vbroadcastf128 ymm2,xmmword ptr [rax]
C4E27D 1A 10, VEX_Vbroadcastf128_ymm_m128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Float128
# vbroadcastf32x4 ymm2,xmmword ptr [rax+10h]
62 F27D28 1A 50 01, EVEX_Vbroadcastf32x4_ymm_k1z_m128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float32
# vbroadcastf32x4 ymm2{k3}{z},xmmword ptr [rax+10h]
62 F27DAB 1A 50 01, EVEX_Vbroadcastf32x4_ymm_k1z_m128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=rax rm=ds:rax+0x10;Packed128_Float32
# vbroadcastf32x4 zmm2,xmmword ptr [rax+10h]
62 F27D48 1A 50 01, EVEX_Vbroadcastf32x4_zmm_k1z_m128, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float32
# vbroadcastf32x4 zmm2{k3}{z},xmmword ptr [rax+10h]
62 F27DCB 1A 50 01, EVEX_Vbroadcastf32x4_zmm_k1z_m128, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=rax rm=ds:rax+0x10;Packed128_Float32
# vbroadcastf64x2 ymm2,xmmword ptr [rax+10h]
62 F2FD28 1A 50 01, EVEX_Vbroadcastf64x2_ymm_k1z_m128, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float64
# vbroadcastf64x2 ymm2{k3}{z},xmmword ptr [rax+10h]
62 F2FDAB 1A 50 01, EVEX_Vbroadcastf64x2_ymm_k1z_m128, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=rax rm=ds:rax+0x10;Packed128_Float64
# vbroadcastf64x2 zmm2,xmmword ptr [rax+10h]
62 F2FD48 1A 50 01, EVEX_Vbroadcastf64x2_zmm_k1z_m128, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float64
# vbroadcastf64x2 zmm2{k3}{z},xmmword ptr [rax+10h]
62 F2FDCB 1A 50 01, EVEX_Vbroadcastf64x2_zmm_k1z_m128, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=rax rm=ds:rax+0x10;Packed128_Float64
# vbroadcastf32x8 zmm2,ymmword ptr [rax+20h]
62 F27D48 1B 50 01, EVEX_Vbroadcastf32x8_zmm_k1z_m256, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float32
# vbroadcastf32x8 zmm2{k3}{z},ymmword ptr [rax+20h]
62 F27DCB 1B 50 01, EVEX_Vbroadcastf32x8_zmm_k1z_m256, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=rax rm=ds:rax+0x20;Packed256_Float32
# vbroadcastf64x4 zmm2,ymmword ptr [rax+20h]
62 F2FD48 1B 50 01, EVEX_Vbroadcastf64x4_zmm_k1z_m256, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float64
# vbroadcastf64x4 zmm2{k3}{z},ymmword ptr [rax+20h]
62 F2FDCB 1B 50 01, EVEX_Vbroadcastf64x4_zmm_k1z_m256, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=rax rm=ds:rax+0x20;Packed256_Float64
# pabsb mm1,mm5
0F381C CD, Pabsb_mm_mmm64, Legacy, SSSE3, op0=w op1=r w=mm1 r=mm5
# pabsb mm1,[rax]
0F381C 08, Pabsb_mm_mmm64, Legacy, SSSE3, op0=w op1=r w=mm1 r=rax rm=ds:rax;Packed64_Int8
# pabsb xmm1,xmm5
66 0F381C CD, Pabsb_xmm_xmmm128, Legacy, SSSE3, op0=w op1=r w=xmm1 r=xmm5
# pabsb xmm1,[rax]
66 0F381C 08, Pabsb_xmm_xmmm128, Legacy, SSSE3, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed128_Int8
# vpabsb xmm1,xmm5
C4E279 1C CD, VEX_Vpabsb_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vpabsb xmm2,[rax]
C4E279 1C 10, VEX_Vpabsb_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Int8
# vpabsb ymm1,ymm5
C4E27D 1C CD, VEX_Vpabsb_ymm_ymmm256, VEX, AVX2, op0=w op1=r w=vmm1 r=ymm5
# vpabsb ymm2,[rax]
C4E27D 1C 10, VEX_Vpabsb_ymm_ymmm256, VEX, AVX2, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed256_Int8
# vpabsb xmm2,xmm3
62 F27D08 1C D3, EVEX_Vpabsb_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=xmm3
# vpabsb xmm2,[rax+10h]
62 F27D08 1C 50 01, EVEX_Vpabsb_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Int8
# vpabsb xmm2{k3},xmm3
62 F27D0B 1C D3, EVEX_Vpabsb_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vpabsb xmm10{k3}{z},xmm19
62 327D8B 1C D3, EVEX_Vpabsb_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpabsb ymm2,ymm3
62 F27D28 1C D3, EVEX_Vpabsb_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=ymm3
# vpabsb ymm2,[rax+20h]
62 F27D28 1C 50 01, EVEX_Vpabsb_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Int8
# vpabsb ymm2{k3},ymm3
62 F27D2B 1C D3, EVEX_Vpabsb_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vpabsb ymm10{k3}{z},ymm19
62 327DAB 1C D3, EVEX_Vpabsb_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm10 r=k3 r=ymm19
# vpabsb zmm2,zmm3
62 F27D48 1C D3, EVEX_Vpabsb_zmm_k1z_zmmm512, EVEX, AVX512BW, op0=w op1=r w=vmm2 r=zmm3
# vpabsb zmm2,[rax+40h]
62 F27D48 1C 50 01, EVEX_Vpabsb_zmm_k1z_zmmm512, EVEX, AVX512BW, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Int8
# vpabsb zmm2{k3},zmm3
62 F27D4B 1C D3, EVEX_Vpabsb_zmm_k1z_zmmm512, EVEX, AVX512BW, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vpabsb zmm10{k3}{z},zmm19
62 327DCB 1C D3, EVEX_Vpabsb_zmm_k1z_zmmm512, EVEX, AVX512BW, op0=w op1=r w=vmm10 r=k3 r=zmm19
# pabsw mm1,mm5
0F381D CD, Pabsw_mm_mmm64, Legacy, SSSE3, op0=w op1=r w=mm1 r=mm5
# pabsw mm1,[rax]
0F381D 08, Pabsw_mm_mmm64, Legacy, SSSE3, op0=w op1=r w=mm1 r=rax rm=ds:rax;Packed64_Int16
# pabsw xmm1,xmm5
66 0F381D CD, Pabsw_xmm_xmmm128, Legacy, SSSE3, op0=w op1=r w=xmm1 r=xmm5
# pabsw xmm1,[rax]
66 0F381D 08, Pabsw_xmm_xmmm128, Legacy, SSSE3, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed128_Int16
# vpabsw xmm1,xmm5
C4E279 1D CD, VEX_Vpabsw_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vpabsw xmm2,[rax]
C4E279 1D 10, VEX_Vpabsw_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Int16
# vpabsw ymm1,ymm5
C4E27D 1D CD, VEX_Vpabsw_ymm_ymmm256, VEX, AVX2, op0=w op1=r w=vmm1 r=ymm5
# vpabsw ymm2,[rax]
C4E27D 1D 10, VEX_Vpabsw_ymm_ymmm256, VEX, AVX2, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed256_Int16
# vpabsw xmm2,xmm3
62 F27D08 1D D3, EVEX_Vpabsw_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=xmm3
# vpabsw xmm2,[rax+10h]
62 F27D08 1D 50 01, EVEX_Vpabsw_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Int16
# vpabsw xmm2{k3},xmm3
62 F27D0B 1D D3, EVEX_Vpabsw_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vpabsw xmm10{k3}{z},xmm19
62 327D8B 1D D3, EVEX_Vpabsw_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpabsw ymm2,ymm3
62 F27D28 1D D3, EVEX_Vpabsw_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=ymm3
# vpabsw ymm2,[rax+20h]
62 F27D28 1D 50 01, EVEX_Vpabsw_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Int16
# vpabsw ymm2{k3},ymm3
62 F27D2B 1D D3, EVEX_Vpabsw_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vpabsw ymm10{k3}{z},ymm19
62 327DAB 1D D3, EVEX_Vpabsw_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm10 r=k3 r=ymm19
# vpabsw zmm2,zmm3
62 F27D48 1D D3, EVEX_Vpabsw_zmm_k1z_zmmm512, EVEX, AVX512BW, op0=w op1=r w=vmm2 r=zmm3
# vpabsw zmm2,[rax+40h]
62 F27D48 1D 50 01, EVEX_Vpabsw_zmm_k1z_zmmm512, EVEX, AVX512BW, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Int16
# vpabsw zmm2{k3},zmm3
62 F27D4B 1D D3, EVEX_Vpabsw_zmm_k1z_zmmm512, EVEX, AVX512BW, op0=rcw op1=r cw=vmm2 r=zmm2 r=zmm2 r=k3 r=zmm3
# vpabsw zmm10{k3}{z},zmm19
62 327DCB 1D D3, EVEX_Vpabsw_zmm_k1z_zmmm512, EVEX, AVX512BW, op0=w op1=r w=vmm10 r=k3 r=zmm19
# pabsd mm1,mm5
0F381E CD, Pabsd_mm_mmm64, Legacy, SSSE3, op0=w op1=r w=mm1 r=mm5
# pabsd mm1,[rax]
0F381E 08, Pabsd_mm_mmm64, Legacy, SSSE3, op0=w op1=r w=mm1 r=rax rm=ds:rax;Packed64_Int32
# pabsd xmm1,xmm5
66 0F381E CD, Pabsd_xmm_xmmm128, Legacy, SSSE3, op0=w op1=r w=xmm1 r=xmm5
# pabsd xmm1,[rax]
66 0F381E 08, Pabsd_xmm_xmmm128, Legacy, SSSE3, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed128_Int32
# vpabsd xmm2,xmm3
C4E279 1E D3, VEX_Vpabsd_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=xmm3
# vpabsd xmm2,[rax]
C4E279 1E 10, VEX_Vpabsd_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Int32
# vpabsd ymm2,ymm3
C4E27D 1E D3, VEX_Vpabsd_ymm_ymmm256, VEX, AVX2, op0=w op1=r w=vmm2 r=ymm3
# vpabsd ymm2,[rax]
C4E27D 1E 10, VEX_Vpabsd_ymm_ymmm256, VEX, AVX2, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed256_Int32
# vpabsd xmm2,[rax+10h]
62 F27D08 1E 50 01, EVEX_Vpabsd_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Int32
# vpabsd xmm18{k3},xmm3
62 E27D0B 1E D3, EVEX_Vpabsd_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm18 r=xmm18 r=k3 r=xmm3
# vpabsd xmm2{k3}{z},xmm3
62 F27D8B 1E D3, EVEX_Vpabsd_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vpabsd ymm2,[rax+20h]
62 F27D28 1E 50 01, EVEX_Vpabsd_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Int32
# vpabsd ymm18{k3},ymm3
62 E27D2B 1E D3, EVEX_Vpabsd_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm18 r=ymm18 r=k3 r=ymm3
# vpabsd ymm2{k3}{z},ymm3
62 F27DAB 1E D3, EVEX_Vpabsd_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vpabsd zmm2,[rax+40h]
62 F27D48 1E 50 01, EVEX_Vpabsd_zmm_k1z_zmmm512b32, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Int32
# vpabsd zmm18{k3},zmm3
62 E27D4B 1E D3, EVEX_Vpabsd_zmm_k1z_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r cw=vmm18 r=zmm18 r=k3 r=zmm3
# vpabsd zmm2{k3}{z},zmm3
62 F27DCB 1E D3, EVEX_Vpabsd_zmm_k1z_zmmm512b32, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vpabsq xmm2,[rax+10h]
62 F2FD08 1F 50 01, EVEX_Vpabsq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Int64
# vpabsq xmm18{k3},xmm3
62 E2FD0B 1F D3, EVEX_Vpabsq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm18 r=xmm18 r=k3 r=xmm3
# vpabsq xmm2{k3}{z},xmm3
62 F2FD8B 1F D3, EVEX_Vpabsq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vpabsq ymm2,[rax+20h]
62 F2FD28 1F 50 01, EVEX_Vpabsq_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Int64
# vpabsq ymm18{k3},ymm3
62 E2FD2B 1F D3, EVEX_Vpabsq_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm18 r=ymm18 r=k3 r=ymm3
# vpabsq ymm2{k3}{z},ymm3
62 F2FDAB 1F D3, EVEX_Vpabsq_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vpabsq zmm2,[rax+40h]
62 F2FD48 1F 50 01, EVEX_Vpabsq_zmm_k1z_zmmm512b64, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Int64
# vpabsq zmm18{k3},zmm3
62 E2FD4B 1F D3, EVEX_Vpabsq_zmm_k1z_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r cw=vmm18 r=zmm18 r=k3 r=zmm3
# vpabsq zmm2{k3}{z},zmm3
62 F2FDCB 1F D3, EVEX_Vpabsq_zmm_k1z_zmmm512b64, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=zmm3
# pmovsxbw xmm1,xmm5
66 0F3820 CD, Pmovsxbw_xmm_xmmm64, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=xmm5
# pmovsxbw xmm1,[rax]
66 0F3820 08, Pmovsxbw_xmm_xmmm64, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed64_Int8
# vpmovsxbw xmm1,xmm5
C4E279 20 CD, VEX_Vpmovsxbw_xmm_xmmm64, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vpmovsxbw xmm2,qword ptr [rax]
C4E279 20 10, VEX_Vpmovsxbw_xmm_xmmm64, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed64_Int8
# vpmovsxbw ymm1,xmm5
C4E27D 20 CD, VEX_Vpmovsxbw_ymm_xmmm128, VEX, AVX2, op0=w op1=r w=vmm1 r=xmm5
# vpmovsxbw ymm2,xmmword ptr [rax]
C4E27D 20 10, VEX_Vpmovsxbw_ymm_xmmm128, VEX, AVX2, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Int8
# vpmovsxbw xmm2,xmm3
62 F27D08 20 D3, EVEX_Vpmovsxbw_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=xmm3
# vpmovsxbw xmm2,qword ptr [rax+8]
62 F27D08 20 50 01, EVEX_Vpmovsxbw_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed64_Int8
# vpmovsxbw xmm2{k3},xmm3
62 F27D0B 20 D3, EVEX_Vpmovsxbw_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vpmovsxbw xmm10{k3}{z},xmm19
62 327D8B 20 D3, EVEX_Vpmovsxbw_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovsxbw ymm2,xmm3
62 F27D28 20 D3, EVEX_Vpmovsxbw_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=xmm3
# vpmovsxbw ymm2,xmmword ptr [rax+10h]
62 F27D28 20 50 01, EVEX_Vpmovsxbw_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Int8
# vpmovsxbw ymm2{k3},xmm3
62 F27D2B 20 D3, EVEX_Vpmovsxbw_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vpmovsxbw ymm10{k3}{z},xmm19
62 327DAB 20 D3, EVEX_Vpmovsxbw_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovsxbw zmm2,ymm3
62 F27D48 20 D3, EVEX_Vpmovsxbw_zmm_k1z_ymmm256, EVEX, AVX512BW, op0=w op1=r w=vmm2 r=ymm3
# vpmovsxbw zmm2,ymmword ptr [rax+20h]
62 F27D48 20 50 01, EVEX_Vpmovsxbw_zmm_k1z_ymmm256, EVEX, AVX512BW, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Int8
# vpmovsxbw zmm2{k3},ymm3
62 F27D4B 20 D3, EVEX_Vpmovsxbw_zmm_k1z_ymmm256, EVEX, AVX512BW, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=ymm3
# vpmovsxbw zmm10{k3}{z},ymm19
62 327DCB 20 D3, EVEX_Vpmovsxbw_zmm_k1z_ymmm256, EVEX, AVX512BW, op0=w op1=r w=vmm10 r=k3 r=ymm19
# vpmovswb xmm3,xmm2
62 F27E08 20 D3, EVEX_Vpmovswb_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm3 r=xmm2
# vpmovswb qword ptr [rax+8],xmm2
62 F27E08 20 50 01, EVEX_Vpmovswb_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512BW, op0=w op1=r r=rax r=xmm2 wm=ds:rax+8;Packed64_Int8
# vpmovswb qword ptr [rax+8]{k3},xmm2
62 F27E0B 20 50 01, EVEX_Vpmovswb_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512BW, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+8;Packed64_Int8
# vpmovswb xmm3{k3},xmm2
62 F27E0B 20 D3, EVEX_Vpmovswb_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vpmovswb xmm3{k3}{z},xmm18
62 E27E8B 20 D3, EVEX_Vpmovswb_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm3 r=k3 r=xmm18
# vpmovswb xmm3,ymm2
62 F27E28 20 D3, EVEX_Vpmovswb_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm3 r=ymm2
# vpmovswb xmmword ptr [rax+10h],ymm2
62 F27E28 20 50 01, EVEX_Vpmovswb_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512BW, op0=w op1=r r=rax r=ymm2 wm=ds:rax+0x10;Packed128_Int8
# vpmovswb xmmword ptr [rax+10h]{k3},ymm2
62 F27E2B 20 50 01, EVEX_Vpmovswb_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512BW, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+0x10;Packed128_Int8
# vpmovswb xmm3{k3},ymm2
62 F27E2B 20 D3, EVEX_Vpmovswb_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=ymm2
# vpmovswb xmm3{k3}{z},ymm18
62 E27EAB 20 D3, EVEX_Vpmovswb_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm3 r=k3 r=ymm18
# vpmovswb ymm3,zmm2
62 F27E48 20 D3, EVEX_Vpmovswb_ymmm256_k1z_zmm, EVEX, AVX512BW, op0=w op1=r w=vmm3 r=zmm2
# vpmovswb ymmword ptr [rax+20h],zmm2
62 F27E48 20 50 01, EVEX_Vpmovswb_ymmm256_k1z_zmm, EVEX, AVX512BW, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x20;Packed256_Int8
# vpmovswb ymmword ptr [rax+20h]{k3},zmm2
62 F27E4B 20 50 01, EVEX_Vpmovswb_ymmm256_k1z_zmm, EVEX, AVX512BW, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x20;Packed256_Int8
# vpmovswb ymm3{k3},zmm2
62 F27E4B 20 D3, EVEX_Vpmovswb_ymmm256_k1z_zmm, EVEX, AVX512BW, op0=rw op1=r w=vmm3 r=ymm3 r=k3 r=zmm2
# vpmovswb ymm3{k3}{z},zmm18
62 E27ECB 20 D3, EVEX_Vpmovswb_ymmm256_k1z_zmm, EVEX, AVX512BW, op0=w op1=r w=vmm3 r=k3 r=zmm18
# pmovsxbd xmm1,xmm5
66 0F3821 CD, Pmovsxbd_xmm_xmmm32, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=xmm5
# pmovsxbd xmm1,[rax]
66 0F3821 08, Pmovsxbd_xmm_xmmm32, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed32_Int8
# vpmovsxbd xmm1,xmm5
C4E279 21 CD, VEX_Vpmovsxbd_xmm_xmmm32, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vpmovsxbd xmm2,dword ptr [rax]
C4E279 21 10, VEX_Vpmovsxbd_xmm_xmmm32, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed32_Int8
# vpmovsxbd ymm1,xmm5
C4E27D 21 CD, VEX_Vpmovsxbd_ymm_xmmm64, VEX, AVX2, op0=w op1=r w=vmm1 r=xmm5
# vpmovsxbd ymm2,qword ptr [rax]
C4E27D 21 10, VEX_Vpmovsxbd_ymm_xmmm64, VEX, AVX2, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed64_Int8
# vpmovsxbd xmm2,xmm3
62 F27D08 21 D3, EVEX_Vpmovsxbd_xmm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovsxbd xmm2,dword ptr [rax+4]
62 F27D08 21 50 01, EVEX_Vpmovsxbd_xmm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+4;Packed32_Int8
# vpmovsxbd xmm2{k3},xmm3
62 F27D0B 21 D3, EVEX_Vpmovsxbd_xmm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vpmovsxbd xmm10{k3}{z},xmm19
62 327D8B 21 D3, EVEX_Vpmovsxbd_xmm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovsxbd ymm2,xmm3
62 F27D28 21 D3, EVEX_Vpmovsxbd_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovsxbd ymm2,qword ptr [rax+8]
62 F27D28 21 50 01, EVEX_Vpmovsxbd_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed64_Int8
# vpmovsxbd ymm2{k3},xmm3
62 F27D2B 21 D3, EVEX_Vpmovsxbd_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vpmovsxbd ymm10{k3}{z},xmm19
62 327DAB 21 D3, EVEX_Vpmovsxbd_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovsxbd zmm2,xmm3
62 F27D48 21 D3, EVEX_Vpmovsxbd_zmm_k1z_xmmm128, EVEX, AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovsxbd zmm2,xmmword ptr [rax+10h]
62 F27D48 21 50 01, EVEX_Vpmovsxbd_zmm_k1z_xmmm128, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Int8
# vpmovsxbd zmm2{k3},xmm3
62 F27D4B 21 D3, EVEX_Vpmovsxbd_zmm_k1z_xmmm128, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=xmm3
# vpmovsxbd zmm10{k3}{z},xmm19
62 327DCB 21 D3, EVEX_Vpmovsxbd_zmm_k1z_xmmm128, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovsdb xmm3,xmm2
62 F27E08 21 D3, EVEX_Vpmovsdb_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vpmovsdb dword ptr [rax+4],xmm2
62 F27E08 21 50 01, EVEX_Vpmovsdb_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+4;Packed32_Int8
# vpmovsdb dword ptr [rax+4]{k3},xmm2
62 F27E0B 21 50 01, EVEX_Vpmovsdb_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+4;Packed32_Int8
# vpmovsdb xmm3{k3},xmm2
62 F27E0B 21 D3, EVEX_Vpmovsdb_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vpmovsdb xmm3{k3}{z},xmm18
62 E27E8B 21 D3, EVEX_Vpmovsdb_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=xmm18
# vpmovsdb xmm3,ymm2
62 F27E28 21 D3, EVEX_Vpmovsdb_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vpmovsdb qword ptr [rax+8],ymm2
62 F27E28 21 50 01, EVEX_Vpmovsdb_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+8;Packed64_Int8
# vpmovsdb qword ptr [rax+8]{k3},ymm2
62 F27E2B 21 50 01, EVEX_Vpmovsdb_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+8;Packed64_Int8
# vpmovsdb xmm3{k3},ymm2
62 F27E2B 21 D3, EVEX_Vpmovsdb_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=ymm2
# vpmovsdb xmm3{k3}{z},ymm18
62 E27EAB 21 D3, EVEX_Vpmovsdb_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=ymm18
# vpmovsdb xmm3,zmm2
62 F27E48 21 D3, EVEX_Vpmovsdb_xmmm128_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vpmovsdb xmmword ptr [rax+10h],zmm2
62 F27E48 21 50 01, EVEX_Vpmovsdb_xmmm128_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x10;Packed128_Int8
# vpmovsdb xmmword ptr [rax+10h]{k3},zmm2
62 F27E4B 21 50 01, EVEX_Vpmovsdb_xmmm128_k1z_zmm, EVEX, AVX512F, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x10;Packed128_Int8
# vpmovsdb xmm3{k3},zmm2
62 F27E4B 21 D3, EVEX_Vpmovsdb_xmmm128_k1z_zmm, EVEX, AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=zmm2
# vpmovsdb xmm3{k3}{z},zmm18
62 E27ECB 21 D3, EVEX_Vpmovsdb_xmmm128_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=k3 r=zmm18
# pmovsxbq xmm1,xmm5
66 0F3822 CD, Pmovsxbq_xmm_xmmm16, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=xmm5
# pmovsxbq xmm1,[rax]
66 0F3822 08, Pmovsxbq_xmm_xmmm16, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed16_Int8
# vpmovsxbq xmm1,xmm5
C4E279 22 CD, VEX_Vpmovsxbq_xmm_xmmm16, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vpmovsxbq xmm2,word ptr [rax]
C4E279 22 10, VEX_Vpmovsxbq_xmm_xmmm16, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed16_Int8
# vpmovsxbq ymm1,xmm5
C4E27D 22 CD, VEX_Vpmovsxbq_ymm_xmmm32, VEX, AVX2, op0=w op1=r w=vmm1 r=xmm5
# vpmovsxbq ymm2,dword ptr [rax]
C4E27D 22 10, VEX_Vpmovsxbq_ymm_xmmm32, VEX, AVX2, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed32_Int8
# vpmovsxbq xmm2,xmm3
62 F27D08 22 D3, EVEX_Vpmovsxbq_xmm_k1z_xmmm16, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovsxbq xmm2,word ptr [rax+2]
62 F27D08 22 50 01, EVEX_Vpmovsxbq_xmm_k1z_xmmm16, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+2;Packed16_Int8
# vpmovsxbq xmm2{k3},xmm3
62 F27D0B 22 D3, EVEX_Vpmovsxbq_xmm_k1z_xmmm16, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vpmovsxbq xmm10{k3}{z},xmm19
62 327D8B 22 D3, EVEX_Vpmovsxbq_xmm_k1z_xmmm16, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovsxbq ymm2,xmm3
62 F27D28 22 D3, EVEX_Vpmovsxbq_ymm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovsxbq ymm2,dword ptr [rax+4]
62 F27D28 22 50 01, EVEX_Vpmovsxbq_ymm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+4;Packed32_Int8
# vpmovsxbq ymm2{k3},xmm3
62 F27D2B 22 D3, EVEX_Vpmovsxbq_ymm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vpmovsxbq ymm10{k3}{z},xmm19
62 327DAB 22 D3, EVEX_Vpmovsxbq_ymm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovsxbq zmm2,xmm3
62 F27D48 22 D3, EVEX_Vpmovsxbq_zmm_k1z_xmmm64, EVEX, AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovsxbq zmm2,qword ptr [rax+8]
62 F27D48 22 50 01, EVEX_Vpmovsxbq_zmm_k1z_xmmm64, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed64_Int8
# vpmovsxbq zmm2{k3},xmm3
62 F27D4B 22 D3, EVEX_Vpmovsxbq_zmm_k1z_xmmm64, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=xmm3
# vpmovsxbq zmm10{k3}{z},xmm19
62 327DCB 22 D3, EVEX_Vpmovsxbq_zmm_k1z_xmmm64, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovsqb xmm3,xmm2
62 F27E08 22 D3, EVEX_Vpmovsqb_xmmm16_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vpmovsqb word ptr [rax+2],xmm2
62 F27E08 22 50 01, EVEX_Vpmovsqb_xmmm16_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+2;Packed16_Int8
# vpmovsqb word ptr [rax+2]{k3},xmm2
62 F27E0B 22 50 01, EVEX_Vpmovsqb_xmmm16_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+2;Packed16_Int8
# vpmovsqb xmm3{k3},xmm2
62 F27E0B 22 D3, EVEX_Vpmovsqb_xmmm16_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vpmovsqb xmm3{k3}{z},xmm18
62 E27E8B 22 D3, EVEX_Vpmovsqb_xmmm16_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=xmm18
# vpmovsqb xmm3,ymm2
62 F27E28 22 D3, EVEX_Vpmovsqb_xmmm32_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vpmovsqb dword ptr [rax+4],ymm2
62 F27E28 22 50 01, EVEX_Vpmovsqb_xmmm32_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+4;Packed32_Int8
# vpmovsqb dword ptr [rax+4]{k3},ymm2
62 F27E2B 22 50 01, EVEX_Vpmovsqb_xmmm32_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+4;Packed32_Int8
# vpmovsqb xmm3{k3},ymm2
62 F27E2B 22 D3, EVEX_Vpmovsqb_xmmm32_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=ymm2
# vpmovsqb xmm3{k3}{z},ymm18
62 E27EAB 22 D3, EVEX_Vpmovsqb_xmmm32_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=ymm18
# vpmovsqb xmm3,zmm2
62 F27E48 22 D3, EVEX_Vpmovsqb_xmmm64_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vpmovsqb qword ptr [rax+8],zmm2
62 F27E48 22 50 01, EVEX_Vpmovsqb_xmmm64_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+8;Packed64_Int8
# vpmovsqb qword ptr [rax+8]{k3},zmm2
62 F27E4B 22 50 01, EVEX_Vpmovsqb_xmmm64_k1z_zmm, EVEX, AVX512F, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+8;Packed64_Int8
# vpmovsqb xmm3{k3},zmm2
62 F27E4B 22 D3, EVEX_Vpmovsqb_xmmm64_k1z_zmm, EVEX, AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=zmm2
# vpmovsqb xmm3{k3}{z},zmm18
62 E27ECB 22 D3, EVEX_Vpmovsqb_xmmm64_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=k3 r=zmm18
# pmovsxwd xmm1,xmm5
66 0F3823 CD, Pmovsxwd_xmm_xmmm64, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=xmm5
# pmovsxwd xmm1,[rax]
66 0F3823 08, Pmovsxwd_xmm_xmmm64, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed64_Int16
# vpmovsxwd xmm1,xmm5
C4E279 23 CD, VEX_Vpmovsxwd_xmm_xmmm64, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vpmovsxwd xmm2,qword ptr [rax]
C4E279 23 10, VEX_Vpmovsxwd_xmm_xmmm64, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed64_Int16
# vpmovsxwd ymm1,xmm5
C4E27D 23 CD, VEX_Vpmovsxwd_ymm_xmmm128, VEX, AVX2, op0=w op1=r w=vmm1 r=xmm5
# vpmovsxwd ymm2,xmmword ptr [rax]
C4E27D 23 10, VEX_Vpmovsxwd_ymm_xmmm128, VEX, AVX2, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Int16
# vpmovsxwd xmm2,xmm3
62 F27D08 23 D3, EVEX_Vpmovsxwd_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovsxwd xmm2,qword ptr [rax+8]
62 F27D08 23 50 01, EVEX_Vpmovsxwd_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed64_Int16
# vpmovsxwd xmm2{k3},xmm3
62 F27D0B 23 D3, EVEX_Vpmovsxwd_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vpmovsxwd xmm10{k3}{z},xmm19
62 327D8B 23 D3, EVEX_Vpmovsxwd_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovsxwd ymm2,xmm3
62 F27D28 23 D3, EVEX_Vpmovsxwd_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovsxwd ymm2,xmmword ptr [rax+10h]
62 F27D28 23 50 01, EVEX_Vpmovsxwd_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Int16
# vpmovsxwd ymm2{k3},xmm3
62 F27D2B 23 D3, EVEX_Vpmovsxwd_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vpmovsxwd ymm10{k3}{z},xmm19
62 327DAB 23 D3, EVEX_Vpmovsxwd_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovsxwd zmm2,ymm3
62 F27D48 23 D3, EVEX_Vpmovsxwd_zmm_k1z_ymmm256, EVEX, AVX512F, op0=w op1=r w=vmm2 r=ymm3
# vpmovsxwd zmm2,ymmword ptr [rax+20h]
62 F27D48 23 50 01, EVEX_Vpmovsxwd_zmm_k1z_ymmm256, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Int16
# vpmovsxwd zmm2{k3},ymm3
62 F27D4B 23 D3, EVEX_Vpmovsxwd_zmm_k1z_ymmm256, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=ymm3
# vpmovsxwd zmm10{k3}{z},ymm19
62 327DCB 23 D3, EVEX_Vpmovsxwd_zmm_k1z_ymmm256, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=ymm19
# vpmovsdw xmm3,xmm2
62 F27E08 23 D3, EVEX_Vpmovsdw_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vpmovsdw qword ptr [rax+8],xmm2
62 F27E08 23 50 01, EVEX_Vpmovsdw_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+8;Packed64_Int16
# vpmovsdw qword ptr [rax+8]{k3},xmm2
62 F27E0B 23 50 01, EVEX_Vpmovsdw_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+8;Packed64_Int16
# vpmovsdw xmm3{k3},xmm2
62 F27E0B 23 D3, EVEX_Vpmovsdw_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vpmovsdw xmm3{k3}{z},xmm18
62 E27E8B 23 D3, EVEX_Vpmovsdw_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=xmm18
# vpmovsdw xmm3,ymm2
62 F27E28 23 D3, EVEX_Vpmovsdw_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vpmovsdw xmmword ptr [rax+10h],ymm2
62 F27E28 23 50 01, EVEX_Vpmovsdw_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+0x10;Packed128_Int16
# vpmovsdw xmmword ptr [rax+10h]{k3},ymm2
62 F27E2B 23 50 01, EVEX_Vpmovsdw_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+0x10;Packed128_Int16
# vpmovsdw xmm3{k3},ymm2
62 F27E2B 23 D3, EVEX_Vpmovsdw_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=ymm2
# vpmovsdw xmm3{k3}{z},ymm18
62 E27EAB 23 D3, EVEX_Vpmovsdw_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=ymm18
# vpmovsdw ymm3,zmm2
62 F27E48 23 D3, EVEX_Vpmovsdw_ymmm256_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vpmovsdw ymmword ptr [rax+20h],zmm2
62 F27E48 23 50 01, EVEX_Vpmovsdw_ymmm256_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x20;Packed256_Int16
# vpmovsdw ymmword ptr [rax+20h]{k3},zmm2
62 F27E4B 23 50 01, EVEX_Vpmovsdw_ymmm256_k1z_zmm, EVEX, AVX512F, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x20;Packed256_Int16
# vpmovsdw ymm3{k3},zmm2
62 F27E4B 23 D3, EVEX_Vpmovsdw_ymmm256_k1z_zmm, EVEX, AVX512F, op0=rw op1=r w=vmm3 r=ymm3 r=k3 r=zmm2
# vpmovsdw ymm3{k3}{z},zmm18
62 E27ECB 23 D3, EVEX_Vpmovsdw_ymmm256_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=k3 r=zmm18
# pmovsxwq xmm1,xmm5
66 0F3824 CD, Pmovsxwq_xmm_xmmm32, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=xmm5
# pmovsxwq xmm1,[rax]
66 0F3824 08, Pmovsxwq_xmm_xmmm32, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed32_Int16
# vpmovsxwq xmm1,xmm5
C4E279 24 CD, VEX_Vpmovsxwq_xmm_xmmm32, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vpmovsxwq xmm2,dword ptr [rax]
C4E279 24 10, VEX_Vpmovsxwq_xmm_xmmm32, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed32_Int16
# vpmovsxwq ymm1,xmm5
C4E27D 24 CD, VEX_Vpmovsxwq_ymm_xmmm64, VEX, AVX2, op0=w op1=r w=vmm1 r=xmm5
# vpmovsxwq ymm2,qword ptr [rax]
C4E27D 24 10, VEX_Vpmovsxwq_ymm_xmmm64, VEX, AVX2, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed64_Int16
# vpmovsxwq xmm2,xmm3
62 F27D08 24 D3, EVEX_Vpmovsxwq_xmm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovsxwq xmm2,dword ptr [rax+4]
62 F27D08 24 50 01, EVEX_Vpmovsxwq_xmm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+4;Packed32_Int16
# vpmovsxwq xmm2{k3},xmm3
62 F27D0B 24 D3, EVEX_Vpmovsxwq_xmm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vpmovsxwq xmm10{k3}{z},xmm19
62 327D8B 24 D3, EVEX_Vpmovsxwq_xmm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovsxwq ymm2,xmm3
62 F27D28 24 D3, EVEX_Vpmovsxwq_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovsxwq ymm2,qword ptr [rax+8]
62 F27D28 24 50 01, EVEX_Vpmovsxwq_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed64_Int16
# vpmovsxwq ymm2{k3},xmm3
62 F27D2B 24 D3, EVEX_Vpmovsxwq_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vpmovsxwq ymm10{k3}{z},xmm19
62 327DAB 24 D3, EVEX_Vpmovsxwq_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovsxwq zmm2,xmm3
62 F27D48 24 D3, EVEX_Vpmovsxwq_zmm_k1z_xmmm128, EVEX, AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovsxwq zmm2,xmmword ptr [rax+10h]
62 F27D48 24 50 01, EVEX_Vpmovsxwq_zmm_k1z_xmmm128, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Int16
# vpmovsxwq zmm2{k3},xmm3
62 F27D4B 24 D3, EVEX_Vpmovsxwq_zmm_k1z_xmmm128, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=xmm3
# vpmovsxwq zmm10{k3}{z},xmm19
62 327DCB 24 D3, EVEX_Vpmovsxwq_zmm_k1z_xmmm128, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovsqw xmm3,xmm2
62 F27E08 24 D3, EVEX_Vpmovsqw_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vpmovsqw dword ptr [rax+4],xmm2
62 F27E08 24 50 01, EVEX_Vpmovsqw_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+4;Packed32_Int16
# vpmovsqw dword ptr [rax+4]{k3},xmm2
62 F27E0B 24 50 01, EVEX_Vpmovsqw_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+4;Packed32_Int16
# vpmovsqw xmm3{k3},xmm2
62 F27E0B 24 D3, EVEX_Vpmovsqw_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vpmovsqw xmm3{k3}{z},xmm18
62 E27E8B 24 D3, EVEX_Vpmovsqw_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=xmm18
# vpmovsqw xmm3,ymm2
62 F27E28 24 D3, EVEX_Vpmovsqw_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vpmovsqw qword ptr [rax+8],ymm2
62 F27E28 24 50 01, EVEX_Vpmovsqw_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+8;Packed64_Int16
# vpmovsqw qword ptr [rax+8]{k3},ymm2
62 F27E2B 24 50 01, EVEX_Vpmovsqw_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+8;Packed64_Int16
# vpmovsqw xmm3{k3},ymm2
62 F27E2B 24 D3, EVEX_Vpmovsqw_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=ymm2
# vpmovsqw xmm3{k3}{z},ymm18
62 E27EAB 24 D3, EVEX_Vpmovsqw_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=ymm18
# vpmovsqw xmm3,zmm2
62 F27E48 24 D3, EVEX_Vpmovsqw_xmmm128_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vpmovsqw xmmword ptr [rax+10h],zmm2
62 F27E48 24 50 01, EVEX_Vpmovsqw_xmmm128_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x10;Packed128_Int16
# vpmovsqw xmmword ptr [rax+10h]{k3},zmm2
62 F27E4B 24 50 01, EVEX_Vpmovsqw_xmmm128_k1z_zmm, EVEX, AVX512F, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x10;Packed128_Int16
# vpmovsqw xmm3{k3},zmm2
62 F27E4B 24 D3, EVEX_Vpmovsqw_xmmm128_k1z_zmm, EVEX, AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=zmm2
# vpmovsqw xmm3{k3}{z},zmm18
62 E27ECB 24 D3, EVEX_Vpmovsqw_xmmm128_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=k3 r=zmm18
# pmovsxdq xmm1,xmm5
66 0F3825 CD, Pmovsxdq_xmm_xmmm64, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=xmm5
# pmovsxdq xmm1,[rax]
66 0F3825 08, Pmovsxdq_xmm_xmmm64, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed64_Int32
# vpmovsxdq xmm1,xmm5
C4E279 25 CD, VEX_Vpmovsxdq_xmm_xmmm64, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vpmovsxdq xmm2,qword ptr [rax]
C4E279 25 10, VEX_Vpmovsxdq_xmm_xmmm64, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed64_Int32
# vpmovsxdq ymm1,xmm5
C4E27D 25 CD, VEX_Vpmovsxdq_ymm_xmmm128, VEX, AVX2, op0=w op1=r w=vmm1 r=xmm5
# vpmovsxdq ymm2,xmmword ptr [rax]
C4E27D 25 10, VEX_Vpmovsxdq_ymm_xmmm128, VEX, AVX2, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Int32
# vpmovsxdq xmm2,xmm3
62 F27D08 25 D3, EVEX_Vpmovsxdq_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovsxdq xmm2,qword ptr [rax+8]
62 F27D08 25 50 01, EVEX_Vpmovsxdq_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed64_Int32
# vpmovsxdq xmm2{k3},xmm3
62 F27D0B 25 D3, EVEX_Vpmovsxdq_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vpmovsxdq xmm10{k3}{z},xmm19
62 327D8B 25 D3, EVEX_Vpmovsxdq_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovsxdq ymm2,xmm3
62 F27D28 25 D3, EVEX_Vpmovsxdq_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovsxdq ymm2,xmmword ptr [rax+10h]
62 F27D28 25 50 01, EVEX_Vpmovsxdq_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Int32
# vpmovsxdq ymm2{k3},xmm3
62 F27D2B 25 D3, EVEX_Vpmovsxdq_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vpmovsxdq ymm10{k3}{z},xmm19
62 327DAB 25 D3, EVEX_Vpmovsxdq_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovsxdq zmm2,ymm3
62 F27D48 25 D3, EVEX_Vpmovsxdq_zmm_k1z_ymmm256, EVEX, AVX512F, op0=w op1=r w=vmm2 r=ymm3
# vpmovsxdq zmm2,ymmword ptr [rax+20h]
62 F27D48 25 50 01, EVEX_Vpmovsxdq_zmm_k1z_ymmm256, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Int32
# vpmovsxdq zmm2{k3},ymm3
62 F27D4B 25 D3, EVEX_Vpmovsxdq_zmm_k1z_ymmm256, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=ymm3
# vpmovsxdq zmm10{k3}{z},ymm19
62 327DCB 25 D3, EVEX_Vpmovsxdq_zmm_k1z_ymmm256, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=ymm19
# vpmovsqd xmm3,xmm2
62 F27E08 25 D3, EVEX_Vpmovsqd_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vpmovsqd qword ptr [rax+8],xmm2
62 F27E08 25 50 01, EVEX_Vpmovsqd_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+8;Packed64_Int32
# vpmovsqd qword ptr [rax+8]{k3},xmm2
62 F27E0B 25 50 01, EVEX_Vpmovsqd_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+8;Packed64_Int32
# vpmovsqd xmm3{k3},xmm2
62 F27E0B 25 D3, EVEX_Vpmovsqd_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vpmovsqd xmm3{k3}{z},xmm18
62 E27E8B 25 D3, EVEX_Vpmovsqd_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=xmm18
# vpmovsqd xmm3,ymm2
62 F27E28 25 D3, EVEX_Vpmovsqd_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vpmovsqd xmmword ptr [rax+10h],ymm2
62 F27E28 25 50 01, EVEX_Vpmovsqd_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+0x10;Packed128_Int32
# vpmovsqd xmmword ptr [rax+10h]{k3},ymm2
62 F27E2B 25 50 01, EVEX_Vpmovsqd_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+0x10;Packed128_Int32
# vpmovsqd xmm3{k3},ymm2
62 F27E2B 25 D3, EVEX_Vpmovsqd_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=ymm2
# vpmovsqd xmm3{k3}{z},ymm18
62 E27EAB 25 D3, EVEX_Vpmovsqd_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=ymm18
# vpmovsqd ymm3,zmm2
62 F27E48 25 D3, EVEX_Vpmovsqd_ymmm256_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vpmovsqd ymmword ptr [rax+20h],zmm2
62 F27E48 25 50 01, EVEX_Vpmovsqd_ymmm256_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x20;Packed256_Int32
# vpmovsqd ymmword ptr [rax+20h]{k3},zmm2
62 F27E4B 25 50 01, EVEX_Vpmovsqd_ymmm256_k1z_zmm, EVEX, AVX512F, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x20;Packed256_Int32
# vpmovsqd ymm3{k3},zmm2
62 F27E4B 25 D3, EVEX_Vpmovsqd_ymmm256_k1z_zmm, EVEX, AVX512F, op0=rw op1=r w=vmm3 r=ymm3 r=k3 r=zmm2
# vpmovsqd ymm3{k3}{z},zmm18
62 E27ECB 25 D3, EVEX_Vpmovsqd_ymmm256_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=k3 r=zmm18
# vptestmb k2,xmm6,[rax+10h]
62 F24D08 26 50 01, EVEX_Vptestmb_kr_k1_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vptestmb k2{k3},xmm6,xmm3
62 F24D0B 26 D3, EVEX_Vptestmb_kr_k1_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=k3 r=xmm6 r=xmm3
# vptestmb k2,ymm6,[rax+20h]
62 F24D28 26 50 01, EVEX_Vptestmb_kr_k1_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vptestmb k2{k3},ymm6,ymm3
62 F24D2B 26 D3, EVEX_Vptestmb_kr_k1_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=k3 r=ymm6 r=ymm3
# vptestmb k2,zmm6,[rax+40h]
62 F24D48 26 50 01, EVEX_Vptestmb_kr_k1_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vptestmb k2{k3},zmm6,zmm3
62 F24D4B 26 D3, EVEX_Vptestmb_kr_k1_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k3 r=zmm6 r=zmm3
# vptestmw k2,xmm6,[rax+10h]
62 F2CD08 26 50 01, EVEX_Vptestmw_kr_k1_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vptestmw k2{k3},xmm6,xmm3
62 F2CD0B 26 D3, EVEX_Vptestmw_kr_k1_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=k3 r=xmm6 r=xmm3
# vptestmw k2,ymm6,[rax+20h]
62 F2CD28 26 50 01, EVEX_Vptestmw_kr_k1_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vptestmw k2{k3},ymm6,ymm3
62 F2CD2B 26 D3, EVEX_Vptestmw_kr_k1_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=k3 r=ymm6 r=ymm3
# vptestmw k2,zmm6,[rax+40h]
62 F2CD48 26 50 01, EVEX_Vptestmw_kr_k1_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vptestmw k2{k3},zmm6,zmm3
62 F2CD4B 26 D3, EVEX_Vptestmw_kr_k1_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k3 r=zmm6 r=zmm3
# vptestnmb k2,xmm6,[rax+10h]
62 F24E08 26 50 01, EVEX_Vptestnmb_kr_k1_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vptestnmb k2{k3},xmm6,xmm3
62 F24E0B 26 D3, EVEX_Vptestnmb_kr_k1_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=k3 r=xmm6 r=xmm3
# vptestnmb k2,ymm6,[rax+20h]
62 F24E28 26 50 01, EVEX_Vptestnmb_kr_k1_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vptestnmb k2{k3},ymm6,ymm3
62 F24E2B 26 D3, EVEX_Vptestnmb_kr_k1_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=k3 r=ymm6 r=ymm3
# vptestnmb k2,zmm6,[rax+40h]
62 F24E48 26 50 01, EVEX_Vptestnmb_kr_k1_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vptestnmb k2{k3},zmm6,zmm3
62 F24E4B 26 D3, EVEX_Vptestnmb_kr_k1_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k3 r=zmm6 r=zmm3
# vptestnmw k2,xmm6,[rax+10h]
62 F2CE08 26 50 01, EVEX_Vptestnmw_kr_k1_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vptestnmw k2{k3},xmm6,xmm3
62 F2CE0B 26 D3, EVEX_Vptestnmw_kr_k1_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=k3 r=xmm6 r=xmm3
# vptestnmw k2,ymm6,[rax+20h]
62 F2CE28 26 50 01, EVEX_Vptestnmw_kr_k1_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vptestnmw k2{k3},ymm6,ymm3
62 F2CE2B 26 D3, EVEX_Vptestnmw_kr_k1_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=k2 r=k3 r=ymm6 r=ymm3
# vptestnmw k2,zmm6,[rax+40h]
62 F2CE48 26 50 01, EVEX_Vptestnmw_kr_k1_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vptestnmw k2{k3},zmm6,zmm3
62 F2CE4B 26 D3, EVEX_Vptestnmw_kr_k1_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k3 r=zmm6 r=zmm3
# vptestmd k2,xmm6,[rax+10h]
62 F24D08 27 50 01, EVEX_Vptestmd_kr_k1_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vptestmd k2{k3},xmm6,xmm3
62 F24D0B 27 D3, EVEX_Vptestmd_kr_k1_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=k3 r=xmm6 r=xmm3
# vptestmd k2,ymm6,[rax+20h]
62 F24D28 27 50 01, EVEX_Vptestmd_kr_k1_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vptestmd k2{k3},ymm6,ymm3
62 F24D2B 27 D3, EVEX_Vptestmd_kr_k1_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=k3 r=ymm6 r=ymm3
# vptestmd k2,zmm6,[rax+40h]
62 F24D48 27 50 01, EVEX_Vptestmd_kr_k1_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vptestmd k2{k3},zmm6,zmm3
62 F24D4B 27 D3, EVEX_Vptestmd_kr_k1_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=k2 r=k3 r=zmm6 r=zmm3
# vptestmq k2,xmm6,[rax+10h]
62 F2CD08 27 50 01, EVEX_Vptestmq_kr_k1_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vptestmq k2{k3},xmm6,xmm3
62 F2CD0B 27 D3, EVEX_Vptestmq_kr_k1_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=k3 r=xmm6 r=xmm3
# vptestmq k2,ymm6,[rax+20h]
62 F2CD28 27 50 01, EVEX_Vptestmq_kr_k1_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vptestmq k2{k3},ymm6,ymm3
62 F2CD2B 27 D3, EVEX_Vptestmq_kr_k1_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=k3 r=ymm6 r=ymm3
# vptestmq k2,zmm6,[rax+40h]
62 F2CD48 27 50 01, EVEX_Vptestmq_kr_k1_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vptestmq k2{k3},zmm6,zmm3
62 F2CD4B 27 D3, EVEX_Vptestmq_kr_k1_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=k2 r=k3 r=zmm6 r=zmm3
# vptestnmd k2,xmm6,[rax+10h]
62 F24E08 27 50 01, EVEX_Vptestnmd_kr_k1_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vptestnmd k2{k3},xmm6,xmm3
62 F24E0B 27 D3, EVEX_Vptestnmd_kr_k1_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=k3 r=xmm6 r=xmm3
# vptestnmd k2,ymm6,[rax+20h]
62 F24E28 27 50 01, EVEX_Vptestnmd_kr_k1_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vptestnmd k2{k3},ymm6,ymm3
62 F24E2B 27 D3, EVEX_Vptestnmd_kr_k1_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=k3 r=ymm6 r=ymm3
# vptestnmd k2,zmm6,[rax+40h]
62 F24E48 27 50 01, EVEX_Vptestnmd_kr_k1_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vptestnmd k2{k3},zmm6,zmm3
62 F24E4B 27 D3, EVEX_Vptestnmd_kr_k1_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=k2 r=k3 r=zmm6 r=zmm3
# vptestnmq k2,xmm6,[rax+10h]
62 F2CE08 27 50 01, EVEX_Vptestnmq_kr_k1_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vptestnmq k2{k3},xmm6,xmm3
62 F2CE0B 27 D3, EVEX_Vptestnmq_kr_k1_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=k3 r=xmm6 r=xmm3
# vptestnmq k2,ymm6,[rax+20h]
62 F2CE28 27 50 01, EVEX_Vptestnmq_kr_k1_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vptestnmq k2{k3},ymm6,ymm3
62 F2CE2B 27 D3, EVEX_Vptestnmq_kr_k1_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=k3 r=ymm6 r=ymm3
# vptestnmq k2,zmm6,[rax+40h]
62 F2CE48 27 50 01, EVEX_Vptestnmq_kr_k1_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vptestnmq k2{k3},zmm6,zmm3
62 F2CE4B 27 D3, EVEX_Vptestnmq_kr_k1_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=k2 r=k3 r=zmm6 r=zmm3
# pmuldq xmm1,xmm5
66 0F3828 CD, Pmuldq_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=xmm5
# pmuldq xmm1,[rax]
66 0F3828 08, Pmuldq_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int32
# vpmuldq xmm2,xmm6,xmm3
C4E249 28 D3, VEX_Vpmuldq_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpmuldq xmm2,xmm6,[rax]
C4E249 28 10, VEX_Vpmuldq_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int32
# vpmuldq ymm2,ymm6,ymm3
C4E24D 28 D3, VEX_Vpmuldq_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpmuldq ymm2,ymm6,[rax]
C4E24D 28 10, VEX_Vpmuldq_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int32
# vpmuldq xmm2,xmm6,[rax+10h]
62 F2CD08 28 50 01, EVEX_Vpmuldq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int32
# vpmuldq xmm18{k3},xmm14,xmm3
62 E28D0B 28 D3, EVEX_Vpmuldq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpmuldq xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 28 D3, EVEX_Vpmuldq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpmuldq ymm2,ymm6,[rax+20h]
62 F2CD28 28 50 01, EVEX_Vpmuldq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int32
# vpmuldq ymm18{k3},ymm14,ymm3
62 E28D2B 28 D3, EVEX_Vpmuldq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpmuldq ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 28 D3, EVEX_Vpmuldq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpmuldq zmm2,zmm6,[rax+40h]
62 F2CD48 28 50 01, EVEX_Vpmuldq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int32
# vpmuldq zmm18{k3},zmm14,zmm3
62 E28D4B 28 D3, EVEX_Vpmuldq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpmuldq zmm2{k3}{z},zmm6,zmm3
62 F2CDCB 28 D3, EVEX_Vpmuldq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpmovm2b xmm2,k3
62 F27E08 28 D3, EVEX_Vpmovm2b_xmm_kr, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=k3
# vpmovm2b ymm2,k3
62 F27E28 28 D3, EVEX_Vpmovm2b_ymm_kr, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=k3
# vpmovm2b zmm2,k3
62 F27E48 28 D3, EVEX_Vpmovm2b_zmm_kr, EVEX, AVX512BW, op0=w op1=r w=vmm2 r=k3
# vpmovm2w xmm2,k3
62 F2FE08 28 D3, EVEX_Vpmovm2w_xmm_kr, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=k3
# vpmovm2w ymm2,k3
62 F2FE28 28 D3, EVEX_Vpmovm2w_ymm_kr, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=k3
# vpmovm2w zmm2,k3
62 F2FE48 28 D3, EVEX_Vpmovm2w_zmm_kr, EVEX, AVX512BW, op0=w op1=r w=vmm2 r=k3
# pcmpeqq xmm1,xmm5
66 0F3829 CD, Pcmpeqq_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=xmm5
# pcmpeqq xmm1,[rax]
66 0F3829 08, Pcmpeqq_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt64
# vpcmpeqq xmm2,xmm6,xmm3
C4E249 29 D3, VEX_Vpcmpeqq_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpcmpeqq xmm2,xmm6,[rax]
C4E249 29 10, VEX_Vpcmpeqq_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt64
# vpcmpeqq ymm2,ymm6,ymm3
C4E24D 29 D3, VEX_Vpcmpeqq_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpcmpeqq ymm2,ymm6,[rax]
C4E24D 29 10, VEX_Vpcmpeqq_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt64
# vpcmpeqq k2,xmm6,xmm3
62 F2CD08 29 D3, EVEX_Vpcmpeqq_kr_k1_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=xmm6 r=xmm3
# vpcmpeqq k2,xmm6,[rax+10h]
62 F2CD08 29 50 01, EVEX_Vpcmpeqq_kr_k1_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpcmpeqq k2{k3},xmm6,xmm3
62 F2CD0B 29 D3, EVEX_Vpcmpeqq_kr_k1_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=k3 r=xmm6 r=xmm3
# vpcmpeqq k2,ymm6,ymm3
62 F2CD28 29 D3, EVEX_Vpcmpeqq_kr_k1_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=ymm6 r=ymm3
# vpcmpeqq k2,ymm6,[rax+20h]
62 F2CD28 29 50 01, EVEX_Vpcmpeqq_kr_k1_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpcmpeqq k2{k3},ymm6,ymm3
62 F2CD2B 29 D3, EVEX_Vpcmpeqq_kr_k1_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=k3 r=ymm6 r=ymm3
# vpcmpeqq k2,zmm6,zmm3
62 F2CD48 29 D3, EVEX_Vpcmpeqq_kr_k1_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=k2 r=zmm6 r=zmm3
# vpcmpeqq k2,zmm6,[rax+40h]
62 F2CD48 29 50 01, EVEX_Vpcmpeqq_kr_k1_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpcmpeqq k2{k3},zmm6,zmm3
62 F2CD4B 29 D3, EVEX_Vpcmpeqq_kr_k1_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=k2 r=k3 r=zmm6 r=zmm3
# vpmovb2m k2,xmm3
62 F27E08 29 D3, EVEX_Vpmovb2m_kr_xmm, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=k2 r=xmm3
# vpmovb2m k2,ymm3
62 F27E28 29 D3, EVEX_Vpmovb2m_kr_ymm, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=k2 r=ymm3
# vpmovb2m k2,zmm3
62 F27E48 29 D3, EVEX_Vpmovb2m_kr_zmm, EVEX, AVX512BW, op0=w op1=r w=k2 r=zmm3
# vpmovw2m k2,xmm3
62 F2FE08 29 D3, EVEX_Vpmovw2m_kr_xmm, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=k2 r=xmm3
# vpmovw2m k2,ymm3
62 F2FE28 29 D3, EVEX_Vpmovw2m_kr_ymm, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=k2 r=ymm3
# vpmovw2m k2,zmm3
62 F2FE48 29 D3, EVEX_Vpmovw2m_kr_zmm, EVEX, AVX512BW, op0=w op1=r w=k2 r=zmm3
# movntdqa xmm1,xmmword ptr [rax]
66 0F382A 08, Movntdqa_xmm_m128, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=rax rm=ds:rax;UInt128
# vmovntdqa xmm2,xmmword ptr [rax]
C4E279 2A 10, VEX_Vmovntdqa_xmm_m128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;UInt128
# vmovntdqa ymm2,ymmword ptr [rax]
C4E27D 2A 10, VEX_Vmovntdqa_ymm_m256, VEX, AVX2, op0=w op1=r w=vmm2 r=rax rm=ds:rax;UInt256
# vmovntdqa xmm2,xmmword ptr [rax+10h]
62 F27D08 2A 50 01, EVEX_Vmovntdqa_xmm_m128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;UInt128
# vmovntdqa ymm2,ymmword ptr [rax+20h]
62 F27D28 2A 50 01, EVEX_Vmovntdqa_ymm_m256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;UInt256
# vmovntdqa zmm2,zmmword ptr [rax+40h]
62 F27D48 2A 50 01, EVEX_Vmovntdqa_zmm_m512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;UInt512
# vpbroadcastmb2q xmm2,k3
62 F2FE08 2A D3, EVEX_Vpbroadcastmb2q_xmm_kr, EVEX, AVX512VL;AVX512CD, op0=w op1=r w=vmm2 r=k3
# vpbroadcastmb2q ymm2,k3
62 F2FE28 2A D3, EVEX_Vpbroadcastmb2q_ymm_kr, EVEX, AVX512VL;AVX512CD, op0=w op1=r w=vmm2 r=k3
# vpbroadcastmb2q zmm2,k3
62 F2FE48 2A D3, EVEX_Vpbroadcastmb2q_zmm_kr, EVEX, AVX512CD, op0=w op1=r w=vmm2 r=k3
# packusdw xmm1,xmm5
66 0F382B CD, Packusdw_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=xmm5
# packusdw xmm1,[rax]
66 0F382B 08, Packusdw_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int32
# vpackusdw xmm2,xmm6,xmm3
C4E249 2B D3, VEX_Vpackusdw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpackusdw xmm2,xmm6,[rax]
C4E249 2B 10, VEX_Vpackusdw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int32
# vpackusdw ymm2,ymm6,ymm3
C4E24D 2B D3, VEX_Vpackusdw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpackusdw ymm2,ymm6,[rax]
C4E24D 2B 10, VEX_Vpackusdw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int32
# vpackusdw xmm2,xmm6,[rax+10h]
62 F24D08 2B 50 01, EVEX_Vpackusdw_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int32
# vpackusdw xmm18{k3},xmm14,xmm3
62 E20D0B 2B D3, EVEX_Vpackusdw_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpackusdw xmm2{k3}{z},xmm6,xmm3
62 F24D8B 2B D3, EVEX_Vpackusdw_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpackusdw ymm2,ymm6,[rax+20h]
62 F24D28 2B 50 01, EVEX_Vpackusdw_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int32
# vpackusdw ymm18{k3},ymm14,ymm3
62 E20D2B 2B D3, EVEX_Vpackusdw_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpackusdw ymm2{k3}{z},ymm6,ymm3
62 F24DAB 2B D3, EVEX_Vpackusdw_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpackusdw zmm2,zmm6,[rax+40h]
62 F24D48 2B 50 01, EVEX_Vpackusdw_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int32
# vpackusdw zmm18{k3},zmm14,zmm3
62 E20D4B 2B D3, EVEX_Vpackusdw_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpackusdw zmm2{k3}{z},zmm6,zmm3
62 F24DCB 2B D3, EVEX_Vpackusdw_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vmaskmovps xmm2,xmm6,[rax]
C4E249 2C 10, VEX_Vmaskmovps_xmm_xmm_m128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vmaskmovps ymm2,ymm6,[rax]
C4E24D 2C 10, VEX_Vmaskmovps_ymm_ymm_m256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vscalefps xmm2,xmm6,[rax+10h]
62 F24D08 2C 50 01, EVEX_Vscalefps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vscalefps xmm18{k3},xmm14,xmm3
62 E20D0B 2C D3, EVEX_Vscalefps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vscalefps xmm2{k3}{z},xmm6,xmm3
62 F24D8B 2C D3, EVEX_Vscalefps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vscalefps ymm2,ymm6,[rax+20h]
62 F24D28 2C 50 01, EVEX_Vscalefps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vscalefps ymm18{k3},ymm14,ymm3
62 E20D2B 2C D3, EVEX_Vscalefps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vscalefps ymm2{k3}{z},ymm6,ymm3
62 F24DAB 2C D3, EVEX_Vscalefps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vscalefps zmm2,zmm6,[rax+40h]
62 F24D48 2C 50 01, EVEX_Vscalefps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vscalefps zmm2{k3},zmm6,zmm3 {rn-sae}
62 F24D1B 2C D3, EVEX_Vscalefps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vscalefps zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F24DDB 2C D3, EVEX_Vscalefps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vscalefpd xmm2,xmm6,[rax+10h]
62 F2CD08 2C 50 01, EVEX_Vscalefpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vscalefpd xmm18{k3},xmm14,xmm3
62 E28D0B 2C D3, EVEX_Vscalefpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vscalefpd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 2C D3, EVEX_Vscalefpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vscalefpd ymm2,ymm6,[rax+20h]
62 F2CD28 2C 50 01, EVEX_Vscalefpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vscalefpd ymm18{k3},ymm14,ymm3
62 E28D2B 2C D3, EVEX_Vscalefpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vscalefpd ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 2C D3, EVEX_Vscalefpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vscalefpd zmm2,zmm6,[rax+40h]
62 F2CD48 2C 50 01, EVEX_Vscalefpd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vscalefpd zmm2{k3},zmm6,zmm3 {rn-sae}
62 F2CD1B 2C D3, EVEX_Vscalefpd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vscalefpd zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F2CDDB 2C D3, EVEX_Vscalefpd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vmaskmovpd xmm2,xmm6,[rax]
C4E249 2D 10, VEX_Vmaskmovpd_xmm_xmm_m128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vmaskmovpd ymm2,ymm6,[rax]
C4E24D 2D 10, VEX_Vmaskmovpd_ymm_ymm_m256, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vscalefss xmm2,xmm6,dword ptr [rax+4]
62 F24D08 2D 50 01, EVEX_Vscalefss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vscalefss xmm2{k3},xmm6,xmm3
62 F24D0B 2D D3, EVEX_Vscalefss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vscalefss xmm2{k3}{z},xmm6,xmm3 {ru-sae}
62 F24DDB 2D D3, EVEX_Vscalefss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vscalefsd xmm2,xmm6,qword ptr [rax+8]
62 F2CD08 2D 50 01, EVEX_Vscalefsd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vscalefsd xmm18{k3},xmm14,xmm3
62 E28D0B 2D D3, EVEX_Vscalefsd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vscalefsd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 2D D3, EVEX_Vscalefsd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vmaskmovps [rax],xmm6,xmm2
C4E249 2E 10, VEX_Vmaskmovps_m128_xmm_xmm, VEX, AVX, op0=w op1=r op2=r r=rax r=xmm6 r=xmm2 wm=ds:rax;Packed128_Float32
# vmaskmovps [rax],ymm6,ymm2
C4E24D 2E 10, VEX_Vmaskmovps_m256_ymm_ymm, VEX, AVX, op0=w op1=r op2=r r=rax r=ymm6 r=ymm2 wm=ds:rax;Packed256_Float32
# vmaskmovpd [rax],xmm6,xmm2
C4E249 2F 10, VEX_Vmaskmovpd_m128_xmm_xmm, VEX, AVX, op0=w op1=r op2=r r=rax r=xmm6 r=xmm2 wm=ds:rax;Packed128_Float64
# vmaskmovpd [rax],ymm6,ymm2
C4E24D 2F 10, VEX_Vmaskmovpd_m256_ymm_ymm, VEX, AVX, op0=w op1=r op2=r r=rax r=ymm6 r=ymm2 wm=ds:rax;Packed256_Float64
# pmovzxbw xmm1,xmm5
66 0F3830 CD, Pmovzxbw_xmm_xmmm64, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=xmm5
# pmovzxbw xmm1,[rax]
66 0F3830 08, Pmovzxbw_xmm_xmmm64, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed64_UInt8
# vpmovzxbw xmm1,xmm5
C4E279 30 CD, VEX_Vpmovzxbw_xmm_xmmm64, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vpmovzxbw xmm2,qword ptr [rax]
C4E279 30 10, VEX_Vpmovzxbw_xmm_xmmm64, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed64_UInt8
# vpmovzxbw ymm1,xmm5
C4E27D 30 CD, VEX_Vpmovzxbw_ymm_xmmm128, VEX, AVX2, op0=w op1=r w=vmm1 r=xmm5
# vpmovzxbw ymm2,xmmword ptr [rax]
C4E27D 30 10, VEX_Vpmovzxbw_ymm_xmmm128, VEX, AVX2, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt8
# vpmovzxbw xmm2,xmm3
62 F27D08 30 D3, EVEX_Vpmovzxbw_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=xmm3
# vpmovzxbw xmm2,qword ptr [rax+8]
62 F27D08 30 50 01, EVEX_Vpmovzxbw_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed64_UInt8
# vpmovzxbw xmm2{k3},xmm3
62 F27D0B 30 D3, EVEX_Vpmovzxbw_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vpmovzxbw xmm10{k3}{z},xmm19
62 327D8B 30 D3, EVEX_Vpmovzxbw_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovzxbw ymm2,xmm3
62 F27D28 30 D3, EVEX_Vpmovzxbw_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=xmm3
# vpmovzxbw ymm2,xmmword ptr [rax+10h]
62 F27D28 30 50 01, EVEX_Vpmovzxbw_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vpmovzxbw ymm2{k3},xmm3
62 F27D2B 30 D3, EVEX_Vpmovzxbw_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vpmovzxbw ymm10{k3}{z},xmm19
62 327DAB 30 D3, EVEX_Vpmovzxbw_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovzxbw zmm2,ymm3
62 F27D48 30 D3, EVEX_Vpmovzxbw_zmm_k1z_ymmm256, EVEX, AVX512BW, op0=w op1=r w=vmm2 r=ymm3
# vpmovzxbw zmm2,ymmword ptr [rax+20h]
62 F27D48 30 50 01, EVEX_Vpmovzxbw_zmm_k1z_ymmm256, EVEX, AVX512BW, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vpmovzxbw zmm2{k3},ymm3
62 F27D4B 30 D3, EVEX_Vpmovzxbw_zmm_k1z_ymmm256, EVEX, AVX512BW, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=ymm3
# vpmovzxbw zmm10{k3}{z},ymm19
62 327DCB 30 D3, EVEX_Vpmovzxbw_zmm_k1z_ymmm256, EVEX, AVX512BW, op0=w op1=r w=vmm10 r=k3 r=ymm19
# vpmovwb xmm3,xmm2
62 F27E08 30 D3, EVEX_Vpmovwb_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm3 r=xmm2
# vpmovwb qword ptr [rax+8],xmm2
62 F27E08 30 50 01, EVEX_Vpmovwb_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512BW, op0=w op1=r r=rax r=xmm2 wm=ds:rax+8;Packed64_UInt8
# vpmovwb qword ptr [rax+8]{k3},xmm2
62 F27E0B 30 50 01, EVEX_Vpmovwb_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512BW, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+8;Packed64_UInt8
# vpmovwb xmm3{k3},xmm2
62 F27E0B 30 D3, EVEX_Vpmovwb_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vpmovwb xmm3{k3}{z},xmm18
62 E27E8B 30 D3, EVEX_Vpmovwb_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm3 r=k3 r=xmm18
# vpmovwb xmm3,ymm2
62 F27E28 30 D3, EVEX_Vpmovwb_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm3 r=ymm2
# vpmovwb xmmword ptr [rax+10h],ymm2
62 F27E28 30 50 01, EVEX_Vpmovwb_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512BW, op0=w op1=r r=rax r=ymm2 wm=ds:rax+0x10;Packed128_UInt8
# vpmovwb xmmword ptr [rax+10h]{k3},ymm2
62 F27E2B 30 50 01, EVEX_Vpmovwb_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512BW, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+0x10;Packed128_UInt8
# vpmovwb xmm3{k3},ymm2
62 F27E2B 30 D3, EVEX_Vpmovwb_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=ymm2
# vpmovwb xmm3{k3}{z},ymm18
62 E27EAB 30 D3, EVEX_Vpmovwb_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm3 r=k3 r=ymm18
# vpmovwb ymm3,zmm2
62 F27E48 30 D3, EVEX_Vpmovwb_ymmm256_k1z_zmm, EVEX, AVX512BW, op0=w op1=r w=vmm3 r=zmm2
# vpmovwb ymmword ptr [rax+20h],zmm2
62 F27E48 30 50 01, EVEX_Vpmovwb_ymmm256_k1z_zmm, EVEX, AVX512BW, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x20;Packed256_UInt8
# vpmovwb ymmword ptr [rax+20h]{k3},zmm2
62 F27E4B 30 50 01, EVEX_Vpmovwb_ymmm256_k1z_zmm, EVEX, AVX512BW, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x20;Packed256_UInt8
# vpmovwb ymm3{k3},zmm2
62 F27E4B 30 D3, EVEX_Vpmovwb_ymmm256_k1z_zmm, EVEX, AVX512BW, op0=rw op1=r w=vmm3 r=ymm3 r=k3 r=zmm2
# vpmovwb ymm3{k3}{z},zmm18
62 E27ECB 30 D3, EVEX_Vpmovwb_ymmm256_k1z_zmm, EVEX, AVX512BW, op0=w op1=r w=vmm3 r=k3 r=zmm18
# pmovzxbd xmm1,xmm5
66 0F3831 CD, Pmovzxbd_xmm_xmmm32, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=xmm5
# pmovzxbd xmm1,[rax]
66 0F3831 08, Pmovzxbd_xmm_xmmm32, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed32_UInt8
# vpmovzxbd xmm1,xmm5
C4E279 31 CD, VEX_Vpmovzxbd_xmm_xmmm32, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vpmovzxbd xmm2,dword ptr [rax]
C4E279 31 10, VEX_Vpmovzxbd_xmm_xmmm32, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed32_UInt8
# vpmovzxbd ymm1,xmm5
C4E27D 31 CD, VEX_Vpmovzxbd_ymm_xmmm64, VEX, AVX2, op0=w op1=r w=vmm1 r=xmm5
# vpmovzxbd ymm2,qword ptr [rax]
C4E27D 31 10, VEX_Vpmovzxbd_ymm_xmmm64, VEX, AVX2, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed64_UInt8
# vpmovzxbd xmm2,xmm3
62 F27D08 31 D3, EVEX_Vpmovzxbd_xmm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovzxbd xmm2,dword ptr [rax+4]
62 F27D08 31 50 01, EVEX_Vpmovzxbd_xmm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+4;Packed32_UInt8
# vpmovzxbd xmm2{k3},xmm3
62 F27D0B 31 D3, EVEX_Vpmovzxbd_xmm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vpmovzxbd xmm10{k3}{z},xmm19
62 327D8B 31 D3, EVEX_Vpmovzxbd_xmm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovzxbd ymm2,xmm3
62 F27D28 31 D3, EVEX_Vpmovzxbd_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovzxbd ymm2,qword ptr [rax+8]
62 F27D28 31 50 01, EVEX_Vpmovzxbd_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed64_UInt8
# vpmovzxbd ymm2{k3},xmm3
62 F27D2B 31 D3, EVEX_Vpmovzxbd_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vpmovzxbd ymm10{k3}{z},xmm19
62 327DAB 31 D3, EVEX_Vpmovzxbd_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovzxbd zmm2,xmm3
62 F27D48 31 D3, EVEX_Vpmovzxbd_zmm_k1z_xmmm128, EVEX, AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovzxbd zmm2,xmmword ptr [rax+10h]
62 F27D48 31 50 01, EVEX_Vpmovzxbd_zmm_k1z_xmmm128, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vpmovzxbd zmm2{k3},xmm3
62 F27D4B 31 D3, EVEX_Vpmovzxbd_zmm_k1z_xmmm128, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=xmm3
# vpmovzxbd zmm10{k3}{z},xmm19
62 327DCB 31 D3, EVEX_Vpmovzxbd_zmm_k1z_xmmm128, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovdb xmm3,xmm2
62 F27E08 31 D3, EVEX_Vpmovdb_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vpmovdb dword ptr [rax+4],xmm2
62 F27E08 31 50 01, EVEX_Vpmovdb_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+4;Packed32_UInt8
# vpmovdb dword ptr [rax+4]{k3},xmm2
62 F27E0B 31 50 01, EVEX_Vpmovdb_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+4;Packed32_UInt8
# vpmovdb xmm3{k3},xmm2
62 F27E0B 31 D3, EVEX_Vpmovdb_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vpmovdb xmm3{k3}{z},xmm18
62 E27E8B 31 D3, EVEX_Vpmovdb_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=xmm18
# vpmovdb xmm3,ymm2
62 F27E28 31 D3, EVEX_Vpmovdb_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vpmovdb qword ptr [rax+8],ymm2
62 F27E28 31 50 01, EVEX_Vpmovdb_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+8;Packed64_UInt8
# vpmovdb qword ptr [rax+8]{k3},ymm2
62 F27E2B 31 50 01, EVEX_Vpmovdb_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+8;Packed64_UInt8
# vpmovdb xmm3{k3},ymm2
62 F27E2B 31 D3, EVEX_Vpmovdb_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=ymm2
# vpmovdb xmm3{k3}{z},ymm18
62 E27EAB 31 D3, EVEX_Vpmovdb_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=ymm18
# vpmovdb xmm3,zmm2
62 F27E48 31 D3, EVEX_Vpmovdb_xmmm128_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vpmovdb xmmword ptr [rax+10h],zmm2
62 F27E48 31 50 01, EVEX_Vpmovdb_xmmm128_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x10;Packed128_UInt8
# vpmovdb xmmword ptr [rax+10h]{k3},zmm2
62 F27E4B 31 50 01, EVEX_Vpmovdb_xmmm128_k1z_zmm, EVEX, AVX512F, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x10;Packed128_UInt8
# vpmovdb xmm3{k3},zmm2
62 F27E4B 31 D3, EVEX_Vpmovdb_xmmm128_k1z_zmm, EVEX, AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=zmm2
# vpmovdb xmm3{k3}{z},zmm18
62 E27ECB 31 D3, EVEX_Vpmovdb_xmmm128_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=k3 r=zmm18
# pmovzxbq xmm1,xmm5
66 0F3832 CD, Pmovzxbq_xmm_xmmm16, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=xmm5
# pmovzxbq xmm1,[rax]
66 0F3832 08, Pmovzxbq_xmm_xmmm16, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed16_UInt8
# vpmovzxbq xmm1,xmm5
C4E279 32 CD, VEX_Vpmovzxbq_xmm_xmmm16, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vpmovzxbq xmm2,word ptr [rax]
C4E279 32 10, VEX_Vpmovzxbq_xmm_xmmm16, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed16_UInt8
# vpmovzxbq ymm1,xmm5
C4E27D 32 CD, VEX_Vpmovzxbq_ymm_xmmm32, VEX, AVX2, op0=w op1=r w=vmm1 r=xmm5
# vpmovzxbq ymm2,dword ptr [rax]
C4E27D 32 10, VEX_Vpmovzxbq_ymm_xmmm32, VEX, AVX2, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed32_UInt8
# vpmovzxbq xmm2,xmm3
62 F27D08 32 D3, EVEX_Vpmovzxbq_xmm_k1z_xmmm16, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovzxbq xmm2,word ptr [rax+2]
62 F27D08 32 50 01, EVEX_Vpmovzxbq_xmm_k1z_xmmm16, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+2;Packed16_UInt8
# vpmovzxbq xmm2{k3},xmm3
62 F27D0B 32 D3, EVEX_Vpmovzxbq_xmm_k1z_xmmm16, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vpmovzxbq xmm10{k3}{z},xmm19
62 327D8B 32 D3, EVEX_Vpmovzxbq_xmm_k1z_xmmm16, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovzxbq ymm2,xmm3
62 F27D28 32 D3, EVEX_Vpmovzxbq_ymm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovzxbq ymm2,dword ptr [rax+4]
62 F27D28 32 50 01, EVEX_Vpmovzxbq_ymm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+4;Packed32_UInt8
# vpmovzxbq ymm2{k3},xmm3
62 F27D2B 32 D3, EVEX_Vpmovzxbq_ymm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vpmovzxbq ymm10{k3}{z},xmm19
62 327DAB 32 D3, EVEX_Vpmovzxbq_ymm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovzxbq zmm2,xmm3
62 F27D48 32 D3, EVEX_Vpmovzxbq_zmm_k1z_xmmm64, EVEX, AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovzxbq zmm2,qword ptr [rax+8]
62 F27D48 32 50 01, EVEX_Vpmovzxbq_zmm_k1z_xmmm64, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed64_UInt8
# vpmovzxbq zmm2{k3},xmm3
62 F27D4B 32 D3, EVEX_Vpmovzxbq_zmm_k1z_xmmm64, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=xmm3
# vpmovzxbq zmm10{k3}{z},xmm19
62 327DCB 32 D3, EVEX_Vpmovzxbq_zmm_k1z_xmmm64, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovqb xmm3,xmm2
62 F27E08 32 D3, EVEX_Vpmovqb_xmmm16_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vpmovqb word ptr [rax+2],xmm2
62 F27E08 32 50 01, EVEX_Vpmovqb_xmmm16_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+2;Packed16_UInt8
# vpmovqb word ptr [rax+2]{k3},xmm2
62 F27E0B 32 50 01, EVEX_Vpmovqb_xmmm16_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+2;Packed16_UInt8
# vpmovqb xmm3{k3},xmm2
62 F27E0B 32 D3, EVEX_Vpmovqb_xmmm16_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vpmovqb xmm3{k3}{z},xmm18
62 E27E8B 32 D3, EVEX_Vpmovqb_xmmm16_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=xmm18
# vpmovqb xmm3,ymm2
62 F27E28 32 D3, EVEX_Vpmovqb_xmmm32_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vpmovqb dword ptr [rax+4],ymm2
62 F27E28 32 50 01, EVEX_Vpmovqb_xmmm32_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+4;Packed32_UInt8
# vpmovqb dword ptr [rax+4]{k3},ymm2
62 F27E2B 32 50 01, EVEX_Vpmovqb_xmmm32_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+4;Packed32_UInt8
# vpmovqb xmm3{k3},ymm2
62 F27E2B 32 D3, EVEX_Vpmovqb_xmmm32_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=ymm2
# vpmovqb xmm3{k3}{z},ymm18
62 E27EAB 32 D3, EVEX_Vpmovqb_xmmm32_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=ymm18
# vpmovqb xmm3,zmm2
62 F27E48 32 D3, EVEX_Vpmovqb_xmmm64_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vpmovqb qword ptr [rax+8],zmm2
62 F27E48 32 50 01, EVEX_Vpmovqb_xmmm64_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+8;Packed64_UInt8
# vpmovqb qword ptr [rax+8]{k3},zmm2
62 F27E4B 32 50 01, EVEX_Vpmovqb_xmmm64_k1z_zmm, EVEX, AVX512F, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+8;Packed64_UInt8
# vpmovqb xmm3{k3},zmm2
62 F27E4B 32 D3, EVEX_Vpmovqb_xmmm64_k1z_zmm, EVEX, AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=zmm2
# vpmovqb xmm3{k3}{z},zmm18
62 E27ECB 32 D3, EVEX_Vpmovqb_xmmm64_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=k3 r=zmm18
# pmovzxwd xmm1,xmm5
66 0F3833 CD, Pmovzxwd_xmm_xmmm64, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=xmm5
# pmovzxwd xmm1,[rax]
66 0F3833 08, Pmovzxwd_xmm_xmmm64, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed64_UInt16
# vpmovzxwd xmm1,xmm5
C4E279 33 CD, VEX_Vpmovzxwd_xmm_xmmm64, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vpmovzxwd xmm2,qword ptr [rax]
C4E279 33 10, VEX_Vpmovzxwd_xmm_xmmm64, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed64_UInt16
# vpmovzxwd ymm1,xmm5
C4E27D 33 CD, VEX_Vpmovzxwd_ymm_xmmm128, VEX, AVX2, op0=w op1=r w=vmm1 r=xmm5
# vpmovzxwd ymm2,xmmword ptr [rax]
C4E27D 33 10, VEX_Vpmovzxwd_ymm_xmmm128, VEX, AVX2, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt16
# vpmovzxwd xmm2,xmm3
62 F27D08 33 D3, EVEX_Vpmovzxwd_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovzxwd xmm2,qword ptr [rax+8]
62 F27D08 33 50 01, EVEX_Vpmovzxwd_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed64_UInt16
# vpmovzxwd xmm2{k3},xmm3
62 F27D0B 33 D3, EVEX_Vpmovzxwd_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vpmovzxwd xmm10{k3}{z},xmm19
62 327D8B 33 D3, EVEX_Vpmovzxwd_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovzxwd ymm2,xmm3
62 F27D28 33 D3, EVEX_Vpmovzxwd_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovzxwd ymm2,xmmword ptr [rax+10h]
62 F27D28 33 50 01, EVEX_Vpmovzxwd_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpmovzxwd ymm2{k3},xmm3
62 F27D2B 33 D3, EVEX_Vpmovzxwd_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vpmovzxwd ymm10{k3}{z},xmm19
62 327DAB 33 D3, EVEX_Vpmovzxwd_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovzxwd zmm2,ymm3
62 F27D48 33 D3, EVEX_Vpmovzxwd_zmm_k1z_ymmm256, EVEX, AVX512F, op0=w op1=r w=vmm2 r=ymm3
# vpmovzxwd zmm2,ymmword ptr [rax+20h]
62 F27D48 33 50 01, EVEX_Vpmovzxwd_zmm_k1z_ymmm256, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpmovzxwd zmm2{k3},ymm3
62 F27D4B 33 D3, EVEX_Vpmovzxwd_zmm_k1z_ymmm256, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=ymm3
# vpmovzxwd zmm10{k3}{z},ymm19
62 327DCB 33 D3, EVEX_Vpmovzxwd_zmm_k1z_ymmm256, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=ymm19
# vpmovdw xmm3,xmm2
62 F27E08 33 D3, EVEX_Vpmovdw_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vpmovdw qword ptr [rax+8],xmm2
62 F27E08 33 50 01, EVEX_Vpmovdw_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+8;Packed64_UInt16
# vpmovdw qword ptr [rax+8]{k3},xmm2
62 F27E0B 33 50 01, EVEX_Vpmovdw_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+8;Packed64_UInt16
# vpmovdw xmm3{k3},xmm2
62 F27E0B 33 D3, EVEX_Vpmovdw_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vpmovdw xmm3{k3}{z},xmm18
62 E27E8B 33 D3, EVEX_Vpmovdw_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=xmm18
# vpmovdw xmm3,ymm2
62 F27E28 33 D3, EVEX_Vpmovdw_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vpmovdw xmmword ptr [rax+10h],ymm2
62 F27E28 33 50 01, EVEX_Vpmovdw_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+0x10;Packed128_UInt16
# vpmovdw xmmword ptr [rax+10h]{k3},ymm2
62 F27E2B 33 50 01, EVEX_Vpmovdw_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+0x10;Packed128_UInt16
# vpmovdw xmm3{k3},ymm2
62 F27E2B 33 D3, EVEX_Vpmovdw_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=ymm2
# vpmovdw xmm3{k3}{z},ymm18
62 E27EAB 33 D3, EVEX_Vpmovdw_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=ymm18
# vpmovdw ymm3,zmm2
62 F27E48 33 D3, EVEX_Vpmovdw_ymmm256_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vpmovdw ymmword ptr [rax+20h],zmm2
62 F27E48 33 50 01, EVEX_Vpmovdw_ymmm256_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x20;Packed256_UInt16
# vpmovdw ymmword ptr [rax+20h]{k3},zmm2
62 F27E4B 33 50 01, EVEX_Vpmovdw_ymmm256_k1z_zmm, EVEX, AVX512F, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x20;Packed256_UInt16
# vpmovdw ymm3{k3},zmm2
62 F27E4B 33 D3, EVEX_Vpmovdw_ymmm256_k1z_zmm, EVEX, AVX512F, op0=rw op1=r w=vmm3 r=ymm3 r=k3 r=zmm2
# vpmovdw ymm3{k3}{z},zmm18
62 E27ECB 33 D3, EVEX_Vpmovdw_ymmm256_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=k3 r=zmm18
# pmovzxwq xmm1,xmm5
66 0F3834 CD, Pmovzxwq_xmm_xmmm32, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=xmm5
# pmovzxwq xmm1,[rax]
66 0F3834 08, Pmovzxwq_xmm_xmmm32, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed32_UInt16
# vpmovzxwq xmm1,xmm5
C4E279 34 CD, VEX_Vpmovzxwq_xmm_xmmm32, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vpmovzxwq xmm2,dword ptr [rax]
C4E279 34 10, VEX_Vpmovzxwq_xmm_xmmm32, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed32_UInt16
# vpmovzxwq ymm1,xmm5
C4E27D 34 CD, VEX_Vpmovzxwq_ymm_xmmm64, VEX, AVX2, op0=w op1=r w=vmm1 r=xmm5
# vpmovzxwq ymm2,qword ptr [rax]
C4E27D 34 10, VEX_Vpmovzxwq_ymm_xmmm64, VEX, AVX2, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed64_UInt16
# vpmovzxwq xmm2,xmm3
62 F27D08 34 D3, EVEX_Vpmovzxwq_xmm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovzxwq xmm2,dword ptr [rax+4]
62 F27D08 34 50 01, EVEX_Vpmovzxwq_xmm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+4;Packed32_UInt16
# vpmovzxwq xmm2{k3},xmm3
62 F27D0B 34 D3, EVEX_Vpmovzxwq_xmm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vpmovzxwq xmm10{k3}{z},xmm19
62 327D8B 34 D3, EVEX_Vpmovzxwq_xmm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovzxwq ymm2,xmm3
62 F27D28 34 D3, EVEX_Vpmovzxwq_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovzxwq ymm2,qword ptr [rax+8]
62 F27D28 34 50 01, EVEX_Vpmovzxwq_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed64_UInt16
# vpmovzxwq ymm2{k3},xmm3
62 F27D2B 34 D3, EVEX_Vpmovzxwq_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vpmovzxwq ymm10{k3}{z},xmm19
62 327DAB 34 D3, EVEX_Vpmovzxwq_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovzxwq zmm2,xmm3
62 F27D48 34 D3, EVEX_Vpmovzxwq_zmm_k1z_xmmm128, EVEX, AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovzxwq zmm2,xmmword ptr [rax+10h]
62 F27D48 34 50 01, EVEX_Vpmovzxwq_zmm_k1z_xmmm128, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpmovzxwq zmm2{k3},xmm3
62 F27D4B 34 D3, EVEX_Vpmovzxwq_zmm_k1z_xmmm128, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=xmm3
# vpmovzxwq zmm10{k3}{z},xmm19
62 327DCB 34 D3, EVEX_Vpmovzxwq_zmm_k1z_xmmm128, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovqw xmm3,xmm2
62 F27E08 34 D3, EVEX_Vpmovqw_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vpmovqw dword ptr [rax+4],xmm2
62 F27E08 34 50 01, EVEX_Vpmovqw_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+4;Packed32_UInt16
# vpmovqw dword ptr [rax+4]{k3},xmm2
62 F27E0B 34 50 01, EVEX_Vpmovqw_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+4;Packed32_UInt16
# vpmovqw xmm3{k3},xmm2
62 F27E0B 34 D3, EVEX_Vpmovqw_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vpmovqw xmm3{k3}{z},xmm18
62 E27E8B 34 D3, EVEX_Vpmovqw_xmmm32_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=xmm18
# vpmovqw xmm3,ymm2
62 F27E28 34 D3, EVEX_Vpmovqw_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vpmovqw qword ptr [rax+8],ymm2
62 F27E28 34 50 01, EVEX_Vpmovqw_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+8;Packed64_UInt16
# vpmovqw qword ptr [rax+8]{k3},ymm2
62 F27E2B 34 50 01, EVEX_Vpmovqw_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+8;Packed64_UInt16
# vpmovqw xmm3{k3},ymm2
62 F27E2B 34 D3, EVEX_Vpmovqw_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=ymm2
# vpmovqw xmm3{k3}{z},ymm18
62 E27EAB 34 D3, EVEX_Vpmovqw_xmmm64_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=ymm18
# vpmovqw xmm3,zmm2
62 F27E48 34 D3, EVEX_Vpmovqw_xmmm128_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vpmovqw xmmword ptr [rax+10h],zmm2
62 F27E48 34 50 01, EVEX_Vpmovqw_xmmm128_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x10;Packed128_UInt16
# vpmovqw xmmword ptr [rax+10h]{k3},zmm2
62 F27E4B 34 50 01, EVEX_Vpmovqw_xmmm128_k1z_zmm, EVEX, AVX512F, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x10;Packed128_UInt16
# vpmovqw xmm3{k3},zmm2
62 F27E4B 34 D3, EVEX_Vpmovqw_xmmm128_k1z_zmm, EVEX, AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=zmm2
# vpmovqw xmm3{k3}{z},zmm18
62 E27ECB 34 D3, EVEX_Vpmovqw_xmmm128_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=k3 r=zmm18
# pmovzxdq xmm1,xmm5
66 0F3835 CD, Pmovzxdq_xmm_xmmm64, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=xmm5
# pmovzxdq xmm1,[rax]
66 0F3835 08, Pmovzxdq_xmm_xmmm64, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed64_UInt32
# vpmovzxdq xmm1,xmm5
C4E279 35 CD, VEX_Vpmovzxdq_xmm_xmmm64, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vpmovzxdq xmm2,qword ptr [rax]
C4E279 35 10, VEX_Vpmovzxdq_xmm_xmmm64, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed64_UInt32
# vpmovzxdq ymm1,xmm5
C4E27D 35 CD, VEX_Vpmovzxdq_ymm_xmmm128, VEX, AVX2, op0=w op1=r w=vmm1 r=xmm5
# vpmovzxdq ymm2,xmmword ptr [rax]
C4E27D 35 10, VEX_Vpmovzxdq_ymm_xmmm128, VEX, AVX2, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt32
# vpmovzxdq xmm2,xmm3
62 F27D08 35 D3, EVEX_Vpmovzxdq_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovzxdq xmm2,qword ptr [rax+8]
62 F27D08 35 50 01, EVEX_Vpmovzxdq_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed64_UInt32
# vpmovzxdq xmm2{k3},xmm3
62 F27D0B 35 D3, EVEX_Vpmovzxdq_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vpmovzxdq xmm10{k3}{z},xmm19
62 327D8B 35 D3, EVEX_Vpmovzxdq_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovzxdq ymm2,xmm3
62 F27D28 35 D3, EVEX_Vpmovzxdq_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpmovzxdq ymm2,xmmword ptr [rax+10h]
62 F27D28 35 50 01, EVEX_Vpmovzxdq_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpmovzxdq ymm2{k3},xmm3
62 F27D2B 35 D3, EVEX_Vpmovzxdq_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vpmovzxdq ymm10{k3}{z},xmm19
62 327DAB 35 D3, EVEX_Vpmovzxdq_ymm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpmovzxdq zmm2,ymm3
62 F27D48 35 D3, EVEX_Vpmovzxdq_zmm_k1z_ymmm256, EVEX, AVX512F, op0=w op1=r w=vmm2 r=ymm3
# vpmovzxdq zmm2,ymmword ptr [rax+20h]
62 F27D48 35 50 01, EVEX_Vpmovzxdq_zmm_k1z_ymmm256, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpmovzxdq zmm2{k3},ymm3
62 F27D4B 35 D3, EVEX_Vpmovzxdq_zmm_k1z_ymmm256, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=ymm3
# vpmovzxdq zmm10{k3}{z},ymm19
62 327DCB 35 D3, EVEX_Vpmovzxdq_zmm_k1z_ymmm256, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=ymm19
# vpmovqd xmm3,xmm2
62 F27E08 35 D3, EVEX_Vpmovqd_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vpmovqd qword ptr [rax+8],xmm2
62 F27E08 35 50 01, EVEX_Vpmovqd_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+8;Packed64_UInt32
# vpmovqd qword ptr [rax+8]{k3},xmm2
62 F27E0B 35 50 01, EVEX_Vpmovqd_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=xmm2 r=k3 cwm=ds:rax+8;Packed64_UInt32
# vpmovqd xmm3{k3},xmm2
62 F27E0B 35 D3, EVEX_Vpmovqd_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vpmovqd xmm3{k3}{z},xmm18
62 E27E8B 35 D3, EVEX_Vpmovqd_xmmm64_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=xmm18
# vpmovqd xmm3,ymm2
62 F27E28 35 D3, EVEX_Vpmovqd_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vpmovqd xmmword ptr [rax+10h],ymm2
62 F27E28 35 50 01, EVEX_Vpmovqd_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+0x10;Packed128_UInt32
# vpmovqd xmmword ptr [rax+10h]{k3},ymm2
62 F27E2B 35 50 01, EVEX_Vpmovqd_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rax r=ymm2 r=k3 cwm=ds:rax+0x10;Packed128_UInt32
# vpmovqd xmm3{k3},ymm2
62 F27E2B 35 D3, EVEX_Vpmovqd_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=ymm2
# vpmovqd xmm3{k3}{z},ymm18
62 E27EAB 35 D3, EVEX_Vpmovqd_xmmm128_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=k3 r=ymm18
# vpmovqd ymm3,zmm2
62 F27E48 35 D3, EVEX_Vpmovqd_ymmm256_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vpmovqd ymmword ptr [rax+20h],zmm2
62 F27E48 35 50 01, EVEX_Vpmovqd_ymmm256_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+0x20;Packed256_UInt32
# vpmovqd ymmword ptr [rax+20h]{k3},zmm2
62 F27E4B 35 50 01, EVEX_Vpmovqd_ymmm256_k1z_zmm, EVEX, AVX512F, op0=cw op1=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x20;Packed256_UInt32
# vpmovqd ymm3{k3},zmm2
62 F27E4B 35 D3, EVEX_Vpmovqd_ymmm256_k1z_zmm, EVEX, AVX512F, op0=rw op1=r w=vmm3 r=ymm3 r=k3 r=zmm2
# vpmovqd ymm3{k3}{z},zmm18
62 E27ECB 35 D3, EVEX_Vpmovqd_ymmm256_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=k3 r=zmm18
# vpermd ymm2,ymm6,ymm3
C4E24D 36 D3, VEX_Vpermd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpermd ymm2,ymm6,[rax]
C4E24D 36 10, VEX_Vpermd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt32
# vpermd ymm2,ymm6,[rax+20h]
62 F24D28 36 50 01, EVEX_Vpermd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpermd ymm18{k3},ymm14,ymm3
62 E20D2B 36 D3, EVEX_Vpermd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpermd ymm2{k3}{z},ymm6,ymm3
62 F24DAB 36 D3, EVEX_Vpermd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpermd zmm2,zmm6,[rax+40h]
62 F24D48 36 50 01, EVEX_Vpermd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpermd zmm18{k3},zmm14,zmm3
62 E20D4B 36 D3, EVEX_Vpermd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpermd zmm2{k3}{z},zmm6,zmm3
62 F24DCB 36 D3, EVEX_Vpermd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpermq ymm2,ymm6,[rax+20h]
62 F2CD28 36 50 01, EVEX_Vpermq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpermq ymm18{k3},ymm14,ymm3
62 E28D2B 36 D3, EVEX_Vpermq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpermq ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 36 D3, EVEX_Vpermq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpermq zmm2,zmm6,[rax+40h]
62 F2CD48 36 50 01, EVEX_Vpermq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpermq zmm18{k3},zmm14,zmm3
62 E28D4B 36 D3, EVEX_Vpermq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpermq zmm2{k3}{z},zmm6,zmm3
62 F2CDCB 36 D3, EVEX_Vpermq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# pcmpgtq xmm1,xmm5
66 0F3837 CD, Pcmpgtq_xmm_xmmm128, Legacy, SSE4_2, op0=rw op1=r rw=xmm1 r=xmm5
# pcmpgtq xmm1,[rax]
66 0F3837 08, Pcmpgtq_xmm_xmmm128, Legacy, SSE4_2, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int64
# vpcmpgtq xmm2,xmm6,xmm3
C4E249 37 D3, VEX_Vpcmpgtq_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpcmpgtq xmm2,xmm6,[rax]
C4E249 37 10, VEX_Vpcmpgtq_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int64
# vpcmpgtq ymm2,ymm6,ymm3
C4E24D 37 D3, VEX_Vpcmpgtq_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpcmpgtq ymm2,ymm6,[rax]
C4E24D 37 10, VEX_Vpcmpgtq_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int64
# vpcmpgtq k2,xmm6,xmm3
62 F2CD08 37 D3, EVEX_Vpcmpgtq_kr_k1_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=xmm6 r=xmm3
# vpcmpgtq k2,xmm6,[rax+10h]
62 F2CD08 37 50 01, EVEX_Vpcmpgtq_kr_k1_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int64
# vpcmpgtq k2{k3},xmm6,xmm3
62 F2CD0B 37 D3, EVEX_Vpcmpgtq_kr_k1_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=k3 r=xmm6 r=xmm3
# vpcmpgtq k2,ymm6,ymm3
62 F2CD28 37 D3, EVEX_Vpcmpgtq_kr_k1_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=ymm6 r=ymm3
# vpcmpgtq k2,ymm6,[rax+20h]
62 F2CD28 37 50 01, EVEX_Vpcmpgtq_kr_k1_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int64
# vpcmpgtq k2{k3},ymm6,ymm3
62 F2CD2B 37 D3, EVEX_Vpcmpgtq_kr_k1_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=k2 r=k3 r=ymm6 r=ymm3
# vpcmpgtq k2,zmm6,zmm3
62 F2CD48 37 D3, EVEX_Vpcmpgtq_kr_k1_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=k2 r=zmm6 r=zmm3
# vpcmpgtq k2,zmm6,[rax+40h]
62 F2CD48 37 50 01, EVEX_Vpcmpgtq_kr_k1_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int64
# vpcmpgtq k2{k3},zmm6,zmm3
62 F2CD4B 37 D3, EVEX_Vpcmpgtq_kr_k1_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=k2 r=k3 r=zmm6 r=zmm3
# pminsb xmm1,xmm5
66 0F3838 CD, Pminsb_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=xmm5
# pminsb xmm1,[rax]
66 0F3838 08, Pminsb_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int8
# vpminsb xmm2,xmm6,xmm3
C4E249 38 D3, VEX_Vpminsb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpminsb xmm2,xmm6,[rax]
C4E249 38 10, VEX_Vpminsb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int8
# vpminsb ymm2,ymm6,ymm3
C4E24D 38 D3, VEX_Vpminsb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpminsb ymm2,ymm6,[rax]
C4E24D 38 10, VEX_Vpminsb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int8
# vpminsb xmm2,xmm6,[rax+10h]
62 F24D08 38 50 01, EVEX_Vpminsb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int8
# vpminsb xmm2{k3},xmm6,xmm3
62 F24D0B 38 D3, EVEX_Vpminsb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpminsb xmm18{k3}{z},xmm14,xmm3
62 E20D8B 38 D3, EVEX_Vpminsb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpminsb ymm2,ymm6,[rax+20h]
62 F24D28 38 50 01, EVEX_Vpminsb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int8
# vpminsb ymm2{k3},ymm6,ymm3
62 F24D2B 38 D3, EVEX_Vpminsb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpminsb ymm18{k3}{z},ymm14,ymm3
62 E20DAB 38 D3, EVEX_Vpminsb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpminsb zmm2,zmm6,[rax+40h]
62 F24D48 38 50 01, EVEX_Vpminsb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int8
# vpminsb zmm2{k3},zmm6,zmm3
62 F24D4B 38 D3, EVEX_Vpminsb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpminsb zmm18{k3}{z},zmm14,zmm3
62 E20DCB 38 D3, EVEX_Vpminsb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# vpmovm2d xmm2,k3
62 F27E08 38 D3, EVEX_Vpmovm2d_xmm_kr, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3
# vpmovm2d ymm2,k3
62 F27E28 38 D3, EVEX_Vpmovm2d_ymm_kr, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3
# vpmovm2d zmm2,k3
62 F27E48 38 D3, EVEX_Vpmovm2d_zmm_kr, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=k3
# vpmovm2q xmm2,k3
62 F2FE08 38 D3, EVEX_Vpmovm2q_xmm_kr, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3
# vpmovm2q ymm2,k3
62 F2FE28 38 D3, EVEX_Vpmovm2q_ymm_kr, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3
# vpmovm2q zmm2,k3
62 F2FE48 38 D3, EVEX_Vpmovm2q_zmm_kr, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=k3
# pminsd xmm1,xmm5
66 0F3839 CD, Pminsd_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=xmm5
# pminsd xmm1,[rax]
66 0F3839 08, Pminsd_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int32
# vpminsd xmm2,xmm6,xmm3
C4E249 39 D3, VEX_Vpminsd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpminsd xmm2,xmm6,[rax]
C4E249 39 10, VEX_Vpminsd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int32
# vpminsd ymm2,ymm6,ymm3
C4E24D 39 D3, VEX_Vpminsd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpminsd ymm2,ymm6,[rax]
C4E24D 39 10, VEX_Vpminsd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int32
# vpminsd xmm2,xmm6,[rax+10h]
62 F24D08 39 50 01, EVEX_Vpminsd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int32
# vpminsd xmm18{k3},xmm14,xmm3
62 E20D0B 39 D3, EVEX_Vpminsd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpminsd xmm2{k3}{z},xmm6,xmm3
62 F24D8B 39 D3, EVEX_Vpminsd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpminsd ymm2,ymm6,[rax+20h]
62 F24D28 39 50 01, EVEX_Vpminsd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int32
# vpminsd ymm18{k3},ymm14,ymm3
62 E20D2B 39 D3, EVEX_Vpminsd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpminsd ymm2{k3}{z},ymm6,ymm3
62 F24DAB 39 D3, EVEX_Vpminsd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpminsd zmm2,zmm6,[rax+40h]
62 F24D48 39 50 01, EVEX_Vpminsd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int32
# vpminsd zmm18{k3},zmm14,zmm3
62 E20D4B 39 D3, EVEX_Vpminsd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpminsd zmm2{k3}{z},zmm6,zmm3
62 F24DCB 39 D3, EVEX_Vpminsd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpminsq xmm2,xmm6,[rax+10h]
62 F2CD08 39 50 01, EVEX_Vpminsq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int64
# vpminsq xmm18{k3},xmm14,xmm3
62 E28D0B 39 D3, EVEX_Vpminsq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpminsq xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 39 D3, EVEX_Vpminsq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpminsq ymm2,ymm6,[rax+20h]
62 F2CD28 39 50 01, EVEX_Vpminsq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int64
# vpminsq ymm18{k3},ymm14,ymm3
62 E28D2B 39 D3, EVEX_Vpminsq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpminsq ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 39 D3, EVEX_Vpminsq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpminsq zmm2,zmm6,[rax+40h]
62 F2CD48 39 50 01, EVEX_Vpminsq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int64
# vpminsq zmm18{k3},zmm14,zmm3
62 E28D4B 39 D3, EVEX_Vpminsq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpminsq zmm2{k3}{z},zmm6,zmm3
62 F2CDCB 39 D3, EVEX_Vpminsq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpmovd2m k2,xmm3
62 F27E08 39 D3, EVEX_Vpmovd2m_kr_xmm, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=k2 r=xmm3
# vpmovd2m k2,ymm3
62 F27E28 39 D3, EVEX_Vpmovd2m_kr_ymm, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=k2 r=ymm3
# vpmovd2m k2,zmm3
62 F27E48 39 D3, EVEX_Vpmovd2m_kr_zmm, EVEX, AVX512DQ, op0=w op1=r w=k2 r=zmm3
# vpmovq2m k2,xmm3
62 F2FE08 39 D3, EVEX_Vpmovq2m_kr_xmm, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=k2 r=xmm3
# vpmovq2m k2,ymm3
62 F2FE28 39 D3, EVEX_Vpmovq2m_kr_ymm, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=k2 r=ymm3
# vpmovq2m k2,zmm3
62 F2FE48 39 D3, EVEX_Vpmovq2m_kr_zmm, EVEX, AVX512DQ, op0=w op1=r w=k2 r=zmm3
# pminuw xmm1,xmm5
66 0F383A CD, Pminuw_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=xmm5
# pminuw xmm1,[rax]
66 0F383A 08, Pminuw_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt16
# vpminuw xmm2,xmm6,xmm3
C4E249 3A D3, VEX_Vpminuw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpminuw xmm2,xmm6,[rax]
C4E249 3A 10, VEX_Vpminuw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt16
# vpminuw ymm2,ymm6,ymm3
C4E24D 3A D3, VEX_Vpminuw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpminuw ymm2,ymm6,[rax]
C4E24D 3A 10, VEX_Vpminuw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt16
# vpminuw xmm2,xmm6,[rax+10h]
62 F24D08 3A 50 01, EVEX_Vpminuw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpminuw xmm2{k3},xmm6,xmm3
62 F24D0B 3A D3, EVEX_Vpminuw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpminuw xmm18{k3}{z},xmm14,xmm3
62 E20D8B 3A D3, EVEX_Vpminuw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpminuw ymm2,ymm6,[rax+20h]
62 F24D28 3A 50 01, EVEX_Vpminuw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpminuw ymm2{k3},ymm6,ymm3
62 F24D2B 3A D3, EVEX_Vpminuw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpminuw ymm18{k3}{z},ymm14,ymm3
62 E20DAB 3A D3, EVEX_Vpminuw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpminuw zmm2,zmm6,[rax+40h]
62 F24D48 3A 50 01, EVEX_Vpminuw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpminuw zmm2{k3},zmm6,zmm3
62 F24D4B 3A D3, EVEX_Vpminuw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpminuw zmm18{k3}{z},zmm14,zmm3
62 E20DCB 3A D3, EVEX_Vpminuw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# vpbroadcastmw2d xmm2,k3
62 F27E08 3A D3, EVEX_Vpbroadcastmw2d_xmm_kr, EVEX, AVX512VL;AVX512CD, op0=w op1=r w=vmm2 r=k3
# vpbroadcastmw2d ymm2,k3
62 F27E28 3A D3, EVEX_Vpbroadcastmw2d_ymm_kr, EVEX, AVX512VL;AVX512CD, op0=w op1=r w=vmm2 r=k3
# vpbroadcastmw2d zmm2,k3
62 F27E48 3A D3, EVEX_Vpbroadcastmw2d_zmm_kr, EVEX, AVX512CD, op0=w op1=r w=vmm2 r=k3
# pminud xmm1,xmm5
66 0F383B CD, Pminud_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=xmm5
# pminud xmm1,[rax]
66 0F383B 08, Pminud_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt32
# vpminud xmm2,xmm6,xmm3
C4E249 3B D3, VEX_Vpminud_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpminud xmm2,xmm6,[rax]
C4E249 3B 10, VEX_Vpminud_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt32
# vpminud ymm2,ymm6,ymm3
C4E24D 3B D3, VEX_Vpminud_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpminud ymm2,ymm6,[rax]
C4E24D 3B 10, VEX_Vpminud_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt32
# vpminud xmm2,xmm6,[rax+10h]
62 F24D08 3B 50 01, EVEX_Vpminud_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpminud xmm18{k3},xmm14,xmm3
62 E20D0B 3B D3, EVEX_Vpminud_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpminud xmm2{k3}{z},xmm6,xmm3
62 F24D8B 3B D3, EVEX_Vpminud_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpminud ymm2,ymm6,[rax+20h]
62 F24D28 3B 50 01, EVEX_Vpminud_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpminud ymm18{k3},ymm14,ymm3
62 E20D2B 3B D3, EVEX_Vpminud_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpminud ymm2{k3}{z},ymm6,ymm3
62 F24DAB 3B D3, EVEX_Vpminud_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpminud zmm2,zmm6,[rax+40h]
62 F24D48 3B 50 01, EVEX_Vpminud_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpminud zmm18{k3},zmm14,zmm3
62 E20D4B 3B D3, EVEX_Vpminud_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpminud zmm2{k3}{z},zmm6,zmm3
62 F24DCB 3B D3, EVEX_Vpminud_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpminuq xmm2,xmm6,[rax+10h]
62 F2CD08 3B 50 01, EVEX_Vpminuq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpminuq xmm18{k3},xmm14,xmm3
62 E28D0B 3B D3, EVEX_Vpminuq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpminuq xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 3B D3, EVEX_Vpminuq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpminuq ymm2,ymm6,[rax+20h]
62 F2CD28 3B 50 01, EVEX_Vpminuq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpminuq ymm18{k3},ymm14,ymm3
62 E28D2B 3B D3, EVEX_Vpminuq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpminuq ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 3B D3, EVEX_Vpminuq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpminuq zmm2,zmm6,[rax+40h]
62 F2CD48 3B 50 01, EVEX_Vpminuq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpminuq zmm18{k3},zmm14,zmm3
62 E28D4B 3B D3, EVEX_Vpminuq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpminuq zmm2{k3}{z},zmm6,zmm3
62 F2CDCB 3B D3, EVEX_Vpminuq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# pmaxsb xmm1,xmm5
66 0F383C CD, Pmaxsb_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=xmm5
# pmaxsb xmm1,[rax]
66 0F383C 08, Pmaxsb_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int8
# vpmaxsb xmm2,xmm6,xmm3
C4E249 3C D3, VEX_Vpmaxsb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpmaxsb xmm2,xmm6,[rax]
C4E249 3C 10, VEX_Vpmaxsb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int8
# vpmaxsb ymm2,ymm6,ymm3
C4E24D 3C D3, VEX_Vpmaxsb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpmaxsb ymm2,ymm6,[rax]
C4E24D 3C 10, VEX_Vpmaxsb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int8
# vpmaxsb xmm2,xmm6,[rax+10h]
62 F24D08 3C 50 01, EVEX_Vpmaxsb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int8
# vpmaxsb xmm2{k3},xmm6,xmm3
62 F24D0B 3C D3, EVEX_Vpmaxsb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpmaxsb xmm18{k3}{z},xmm14,xmm3
62 E20D8B 3C D3, EVEX_Vpmaxsb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpmaxsb ymm2,ymm6,[rax+20h]
62 F24D28 3C 50 01, EVEX_Vpmaxsb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int8
# vpmaxsb ymm2{k3},ymm6,ymm3
62 F24D2B 3C D3, EVEX_Vpmaxsb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpmaxsb ymm18{k3}{z},ymm14,ymm3
62 E20DAB 3C D3, EVEX_Vpmaxsb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpmaxsb zmm2,zmm6,[rax+40h]
62 F24D48 3C 50 01, EVEX_Vpmaxsb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int8
# vpmaxsb zmm2{k3},zmm6,zmm3
62 F24D4B 3C D3, EVEX_Vpmaxsb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpmaxsb zmm18{k3}{z},zmm14,zmm3
62 E20DCB 3C D3, EVEX_Vpmaxsb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# pmaxsd xmm1,xmm5
66 0F383D CD, Pmaxsd_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=xmm5
# pmaxsd xmm1,[rax]
66 0F383D 08, Pmaxsd_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int32
# vpmaxsd xmm2,xmm6,xmm3
C4E249 3D D3, VEX_Vpmaxsd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpmaxsd xmm2,xmm6,[rax]
C4E249 3D 10, VEX_Vpmaxsd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int32
# vpmaxsd ymm2,ymm6,ymm3
C4E24D 3D D3, VEX_Vpmaxsd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpmaxsd ymm2,ymm6,[rax]
C4E24D 3D 10, VEX_Vpmaxsd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int32
# vpmaxsd xmm2,xmm6,[rax+10h]
62 F24D08 3D 50 01, EVEX_Vpmaxsd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int32
# vpmaxsd xmm18{k3},xmm14,xmm3
62 E20D0B 3D D3, EVEX_Vpmaxsd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpmaxsd xmm2{k3}{z},xmm6,xmm3
62 F24D8B 3D D3, EVEX_Vpmaxsd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpmaxsd ymm2,ymm6,[rax+20h]
62 F24D28 3D 50 01, EVEX_Vpmaxsd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int32
# vpmaxsd ymm18{k3},ymm14,ymm3
62 E20D2B 3D D3, EVEX_Vpmaxsd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpmaxsd ymm2{k3}{z},ymm6,ymm3
62 F24DAB 3D D3, EVEX_Vpmaxsd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpmaxsd zmm2,zmm6,[rax+40h]
62 F24D48 3D 50 01, EVEX_Vpmaxsd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int32
# vpmaxsd zmm18{k3},zmm14,zmm3
62 E20D4B 3D D3, EVEX_Vpmaxsd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpmaxsd zmm2{k3}{z},zmm6,zmm3
62 F24DCB 3D D3, EVEX_Vpmaxsd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpmaxsq xmm2,xmm6,[rax+10h]
62 F2CD08 3D 50 01, EVEX_Vpmaxsq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int64
# vpmaxsq xmm18{k3},xmm14,xmm3
62 E28D0B 3D D3, EVEX_Vpmaxsq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpmaxsq xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 3D D3, EVEX_Vpmaxsq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpmaxsq ymm2,ymm6,[rax+20h]
62 F2CD28 3D 50 01, EVEX_Vpmaxsq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int64
# vpmaxsq ymm18{k3},ymm14,ymm3
62 E28D2B 3D D3, EVEX_Vpmaxsq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpmaxsq ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 3D D3, EVEX_Vpmaxsq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpmaxsq zmm2,zmm6,[rax+40h]
62 F2CD48 3D 50 01, EVEX_Vpmaxsq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int64
# vpmaxsq zmm18{k3},zmm14,zmm3
62 E28D4B 3D D3, EVEX_Vpmaxsq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpmaxsq zmm2{k3}{z},zmm6,zmm3
62 F2CDCB 3D D3, EVEX_Vpmaxsq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# pmaxuw xmm1,xmm5
66 0F383E CD, Pmaxuw_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=xmm5
# pmaxuw xmm1,[rax]
66 0F383E 08, Pmaxuw_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt16
# vpmaxuw xmm2,xmm6,xmm3
C4E249 3E D3, VEX_Vpmaxuw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpmaxuw xmm2,xmm6,[rax]
C4E249 3E 10, VEX_Vpmaxuw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt16
# vpmaxuw ymm2,ymm6,ymm3
C4E24D 3E D3, VEX_Vpmaxuw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpmaxuw ymm2,ymm6,[rax]
C4E24D 3E 10, VEX_Vpmaxuw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt16
# vpmaxuw xmm2,xmm6,[rax+10h]
62 F24D08 3E 50 01, EVEX_Vpmaxuw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpmaxuw xmm2{k3},xmm6,xmm3
62 F24D0B 3E D3, EVEX_Vpmaxuw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpmaxuw xmm18{k3}{z},xmm14,xmm3
62 E20D8B 3E D3, EVEX_Vpmaxuw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpmaxuw ymm2,ymm6,[rax+20h]
62 F24D28 3E 50 01, EVEX_Vpmaxuw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpmaxuw ymm2{k3},ymm6,ymm3
62 F24D2B 3E D3, EVEX_Vpmaxuw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpmaxuw ymm18{k3}{z},ymm14,ymm3
62 E20DAB 3E D3, EVEX_Vpmaxuw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpmaxuw zmm2,zmm6,[rax+40h]
62 F24D48 3E 50 01, EVEX_Vpmaxuw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpmaxuw zmm2{k3},zmm6,zmm3
62 F24D4B 3E D3, EVEX_Vpmaxuw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpmaxuw zmm18{k3}{z},zmm14,zmm3
62 E20DCB 3E D3, EVEX_Vpmaxuw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# pmaxud xmm1,xmm5
66 0F383F CD, Pmaxud_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=xmm5
# pmaxud xmm1,[rax]
66 0F383F 08, Pmaxud_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt32
# vpmaxud xmm2,xmm6,xmm3
C4E249 3F D3, VEX_Vpmaxud_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpmaxud xmm2,xmm6,[rax]
C4E249 3F 10, VEX_Vpmaxud_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt32
# vpmaxud ymm2,ymm6,ymm3
C4E24D 3F D3, VEX_Vpmaxud_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpmaxud ymm2,ymm6,[rax]
C4E24D 3F 10, VEX_Vpmaxud_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt32
# vpmaxud xmm2,xmm6,[rax+10h]
62 F24D08 3F 50 01, EVEX_Vpmaxud_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpmaxud xmm18{k3},xmm14,xmm3
62 E20D0B 3F D3, EVEX_Vpmaxud_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpmaxud xmm2{k3}{z},xmm6,xmm3
62 F24D8B 3F D3, EVEX_Vpmaxud_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpmaxud ymm2,ymm6,[rax+20h]
62 F24D28 3F 50 01, EVEX_Vpmaxud_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpmaxud ymm18{k3},ymm14,ymm3
62 E20D2B 3F D3, EVEX_Vpmaxud_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpmaxud ymm2{k3}{z},ymm6,ymm3
62 F24DAB 3F D3, EVEX_Vpmaxud_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpmaxud zmm2,zmm6,[rax+40h]
62 F24D48 3F 50 01, EVEX_Vpmaxud_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpmaxud zmm18{k3},zmm14,zmm3
62 E20D4B 3F D3, EVEX_Vpmaxud_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpmaxud zmm2{k3}{z},zmm6,zmm3
62 F24DCB 3F D3, EVEX_Vpmaxud_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpmaxuq xmm2,xmm6,[rax+10h]
62 F2CD08 3F 50 01, EVEX_Vpmaxuq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpmaxuq xmm18{k3},xmm14,xmm3
62 E28D0B 3F D3, EVEX_Vpmaxuq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpmaxuq xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 3F D3, EVEX_Vpmaxuq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpmaxuq ymm2,ymm6,[rax+20h]
62 F2CD28 3F 50 01, EVEX_Vpmaxuq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpmaxuq ymm18{k3},ymm14,ymm3
62 E28D2B 3F D3, EVEX_Vpmaxuq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpmaxuq ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 3F D3, EVEX_Vpmaxuq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpmaxuq zmm2,zmm6,[rax+40h]
62 F2CD48 3F 50 01, EVEX_Vpmaxuq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpmaxuq zmm18{k3},zmm14,zmm3
62 E28D4B 3F D3, EVEX_Vpmaxuq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpmaxuq zmm2{k3}{z},zmm6,zmm3
62 F2CDCB 3F D3, EVEX_Vpmaxuq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# pmulld xmm1,xmm5
66 0F3840 CD, Pmulld_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=xmm5
# pmulld xmm1,[rax]
66 0F3840 08, Pmulld_xmm_xmmm128, Legacy, SSE4_1, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_Int32
# vpmulld xmm2,xmm6,xmm3
C4E249 40 D3, VEX_Vpmulld_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpmulld xmm2,xmm6,[rax]
C4E249 40 10, VEX_Vpmulld_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int32
# vpmulld ymm2,ymm6,ymm3
C4E24D 40 D3, VEX_Vpmulld_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpmulld ymm2,ymm6,[rax]
C4E24D 40 10, VEX_Vpmulld_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int32
# vpmulld xmm2,xmm6,[rax+10h]
62 F24D08 40 50 01, EVEX_Vpmulld_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int32
# vpmulld xmm18{k3},xmm14,xmm3
62 E20D0B 40 D3, EVEX_Vpmulld_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpmulld xmm2{k3}{z},xmm6,xmm3
62 F24D8B 40 D3, EVEX_Vpmulld_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpmulld ymm2,ymm6,[rax+20h]
62 F24D28 40 50 01, EVEX_Vpmulld_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int32
# vpmulld ymm18{k3},ymm14,ymm3
62 E20D2B 40 D3, EVEX_Vpmulld_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpmulld ymm2{k3}{z},ymm6,ymm3
62 F24DAB 40 D3, EVEX_Vpmulld_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpmulld zmm2,zmm6,[rax+40h]
62 F24D48 40 50 01, EVEX_Vpmulld_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int32
# vpmulld zmm18{k3},zmm14,zmm3
62 E20D4B 40 D3, EVEX_Vpmulld_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpmulld zmm2{k3}{z},zmm6,zmm3
62 F24DCB 40 D3, EVEX_Vpmulld_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpmullq xmm2,xmm6,[rax+10h]
62 F2CD08 40 50 01, EVEX_Vpmullq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int64
# vpmullq xmm18{k3},xmm14,xmm3
62 E28D0B 40 D3, EVEX_Vpmullq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpmullq xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 40 D3, EVEX_Vpmullq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpmullq ymm2,ymm6,[rax+20h]
62 F2CD28 40 50 01, EVEX_Vpmullq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int64
# vpmullq ymm18{k3},ymm14,ymm3
62 E28D2B 40 D3, EVEX_Vpmullq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpmullq ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 40 D3, EVEX_Vpmullq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpmullq zmm2,zmm6,[rax+40h]
62 F2CD48 40 50 01, EVEX_Vpmullq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int64
# vpmullq zmm18{k3},zmm14,zmm3
62 E28D4B 40 D3, EVEX_Vpmullq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512DQ, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpmullq zmm2{k3}{z},zmm6,zmm3
62 F2CDCB 40 D3, EVEX_Vpmullq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# phminposuw xmm1,xmm5
66 0F3841 CD, Phminposuw_xmm_xmmm128, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=xmm5
# phminposuw xmm1,[rax]
66 0F3841 08, Phminposuw_xmm_xmmm128, Legacy, SSE4_1, op0=w op1=r w=xmm1 r=rax rm=ds:rax;Packed128_UInt16
# vphminposuw xmm1,xmm5
C4E279 41 CD, VEX_Vphminposuw_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm1 r=xmm5
# vphminposuw xmm2,[rax]
C4E279 41 10, VEX_Vphminposuw_xmm_xmmm128, VEX, AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt16
# vgetexpps xmm2,[rax+10h]
62 F27D08 42 50 01, EVEX_Vgetexpps_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float32
# vgetexpps xmm2{k3},xmm3
62 F27D0B 42 D3, EVEX_Vgetexpps_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vgetexpps xmm2{k3}{z},xmm3
62 F27D8B 42 D3, EVEX_Vgetexpps_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vgetexpps ymm2,[rax+20h]
62 F27D28 42 50 01, EVEX_Vgetexpps_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float32
# vgetexpps ymm2{k3},ymm3
62 F27D2B 42 D3, EVEX_Vgetexpps_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vgetexpps ymm2{k3}{z},ymm3
62 F27DAB 42 D3, EVEX_Vgetexpps_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vgetexpps zmm2,[rax+40h]
62 F27D48 42 50 01, EVEX_Vgetexpps_zmm_k1z_zmmm512b32_sae, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float32
# vgetexpps zmm2{k3},zmm3
62 F27D4B 42 D3, EVEX_Vgetexpps_zmm_k1z_zmmm512b32_sae, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vgetexpps zmm2{k3}{z},zmm3 {sae}
62 F27D9B 42 D3, EVEX_Vgetexpps_zmm_k1z_zmmm512b32_sae, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vgetexppd xmm2,[rax+10h]
62 F2FD08 42 50 01, EVEX_Vgetexppd_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float64
# vgetexppd xmm2{k3},xmm3
62 F2FD0B 42 D3, EVEX_Vgetexppd_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vgetexppd xmm2{k3}{z},xmm3
62 F2FD8B 42 D3, EVEX_Vgetexppd_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vgetexppd ymm2,[rax+20h]
62 F2FD28 42 50 01, EVEX_Vgetexppd_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float64
# vgetexppd ymm2{k3},ymm3
62 F2FD2B 42 D3, EVEX_Vgetexppd_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vgetexppd ymm2{k3}{z},ymm3
62 F2FDAB 42 D3, EVEX_Vgetexppd_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vgetexppd zmm2,[rax+40h]
62 F2FD48 42 50 01, EVEX_Vgetexppd_zmm_k1z_zmmm512b64_sae, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float64
# vgetexppd zmm2{k3},zmm3
62 F2FD4B 42 D3, EVEX_Vgetexppd_zmm_k1z_zmmm512b64_sae, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vgetexppd zmm2{k3}{z},zmm3 {sae}
62 F2FD9B 42 D3, EVEX_Vgetexppd_zmm_k1z_zmmm512b64_sae, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vgetexpss xmm2,xmm6,[rax+4]
62 F24D08 43 50 01, EVEX_Vgetexpss_xmm_k1z_xmm_xmmm32_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vgetexpss xmm2{k3},xmm6,xmm3
62 F24D0B 43 D3, EVEX_Vgetexpss_xmm_k1z_xmm_xmmm32_sae, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vgetexpss xmm2{k3}{z},xmm6,xmm3 {sae}
62 F24DDB 43 D3, EVEX_Vgetexpss_xmm_k1z_xmm_xmmm32_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vgetexpsd xmm2,xmm6,[rax+8]
62 F2CD08 43 50 01, EVEX_Vgetexpsd_xmm_k1z_xmm_xmmm64_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vgetexpsd xmm18{k3},xmm14,xmm3
62 E28D0B 43 D3, EVEX_Vgetexpsd_xmm_k1z_xmm_xmmm64_sae, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vgetexpsd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 43 D3, EVEX_Vgetexpsd_xmm_k1z_xmm_xmmm64_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vplzcntd xmm2,[rax+10h]
62 F27D08 44 50 01, EVEX_Vplzcntd_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512CD, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vplzcntd xmm18{k3},xmm3
62 E27D0B 44 D3, EVEX_Vplzcntd_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512CD, op0=rw op1=r w=vmm18 r=xmm18 r=k3 r=xmm3
# vplzcntd xmm2{k3}{z},xmm3
62 F27D8B 44 D3, EVEX_Vplzcntd_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512CD, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vplzcntd ymm2,[rax+20h]
62 F27D28 44 50 01, EVEX_Vplzcntd_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512CD, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vplzcntd ymm18{k3},ymm3
62 E27D2B 44 D3, EVEX_Vplzcntd_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512CD, op0=rw op1=r w=vmm18 r=ymm18 r=k3 r=ymm3
# vplzcntd ymm2{k3}{z},ymm3
62 F27DAB 44 D3, EVEX_Vplzcntd_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512CD, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vplzcntd zmm2,[rax+40h]
62 F27D48 44 50 01, EVEX_Vplzcntd_zmm_k1z_zmmm512b32, EVEX, AVX512CD, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vplzcntd zmm18{k3},zmm3
62 E27D4B 44 D3, EVEX_Vplzcntd_zmm_k1z_zmmm512b32, EVEX, AVX512CD, op0=rcw op1=r cw=vmm18 r=zmm18 r=k3 r=zmm3
# vplzcntd zmm2{k3}{z},zmm3
62 F27DCB 44 D3, EVEX_Vplzcntd_zmm_k1z_zmmm512b32, EVEX, AVX512CD, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vplzcntq xmm2,[rax+10h]
62 F2FD08 44 50 01, EVEX_Vplzcntq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512CD, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vplzcntq xmm18{k3},xmm3
62 E2FD0B 44 D3, EVEX_Vplzcntq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512CD, op0=rw op1=r w=vmm18 r=xmm18 r=k3 r=xmm3
# vplzcntq xmm2{k3}{z},xmm3
62 F2FD8B 44 D3, EVEX_Vplzcntq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512CD, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vplzcntq ymm2,[rax+20h]
62 F2FD28 44 50 01, EVEX_Vplzcntq_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512CD, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vplzcntq ymm18{k3},ymm3
62 E2FD2B 44 D3, EVEX_Vplzcntq_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512CD, op0=rw op1=r w=vmm18 r=ymm18 r=k3 r=ymm3
# vplzcntq ymm2{k3}{z},ymm3
62 F2FDAB 44 D3, EVEX_Vplzcntq_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512CD, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vplzcntq zmm2,[rax+40h]
62 F2FD48 44 50 01, EVEX_Vplzcntq_zmm_k1z_zmmm512b64, EVEX, AVX512CD, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vplzcntq zmm18{k3},zmm3
62 E2FD4B 44 D3, EVEX_Vplzcntq_zmm_k1z_zmmm512b64, EVEX, AVX512CD, op0=rcw op1=r cw=vmm18 r=zmm18 r=k3 r=zmm3
# vplzcntq zmm2{k3}{z},zmm3
62 F2FDCB 44 D3, EVEX_Vplzcntq_zmm_k1z_zmmm512b64, EVEX, AVX512CD, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vpsrlvd xmm2,xmm6,xmm3
C4E249 45 D3, VEX_Vpsrlvd_xmm_xmm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpsrlvd xmm2,xmm6,[rax]
C4E249 45 10, VEX_Vpsrlvd_xmm_xmm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt32
# vpsrlvd ymm2,ymm6,ymm3
C4E24D 45 D3, VEX_Vpsrlvd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpsrlvd ymm2,ymm6,[rax]
C4E24D 45 10, VEX_Vpsrlvd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt32
# vpsrlvq xmm2,xmm6,xmm3
C4E2C9 45 D3, VEX_Vpsrlvq_xmm_xmm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpsrlvq xmm2,xmm6,[rax]
C4E2C9 45 10, VEX_Vpsrlvq_xmm_xmm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt64
# vpsrlvq ymm2,ymm6,ymm3
C4E2CD 45 D3, VEX_Vpsrlvq_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpsrlvq ymm2,ymm6,[rax]
C4E2CD 45 10, VEX_Vpsrlvq_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt64
# vpsrlvd xmm2,xmm6,[rax+10h]
62 F24D08 45 50 01, EVEX_Vpsrlvd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpsrlvd xmm18{k3},xmm14,xmm3
62 E20D0B 45 D3, EVEX_Vpsrlvd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpsrlvd xmm2{k3}{z},xmm6,xmm3
62 F24D8B 45 D3, EVEX_Vpsrlvd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpsrlvd ymm2,ymm6,[rax+20h]
62 F24D28 45 50 01, EVEX_Vpsrlvd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpsrlvd ymm18{k3},ymm14,ymm3
62 E20D2B 45 D3, EVEX_Vpsrlvd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpsrlvd ymm2{k3}{z},ymm6,ymm3
62 F24DAB 45 D3, EVEX_Vpsrlvd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpsrlvd zmm2,zmm6,[rax+40h]
62 F24D48 45 50 01, EVEX_Vpsrlvd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpsrlvd zmm18{k3},zmm14,zmm3
62 E20D4B 45 D3, EVEX_Vpsrlvd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpsrlvd zmm2{k3}{z},zmm6,zmm3
62 F24DCB 45 D3, EVEX_Vpsrlvd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpsrlvq xmm2,xmm6,[rax+10h]
62 F2CD08 45 50 01, EVEX_Vpsrlvq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpsrlvq xmm18{k3},xmm14,xmm3
62 E28D0B 45 D3, EVEX_Vpsrlvq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpsrlvq xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 45 D3, EVEX_Vpsrlvq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpsrlvq ymm2,ymm6,[rax+20h]
62 F2CD28 45 50 01, EVEX_Vpsrlvq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpsrlvq ymm18{k3},ymm14,ymm3
62 E28D2B 45 D3, EVEX_Vpsrlvq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpsrlvq ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 45 D3, EVEX_Vpsrlvq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpsrlvq zmm2,zmm6,[rax+40h]
62 F2CD48 45 50 01, EVEX_Vpsrlvq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpsrlvq zmm18{k3},zmm14,zmm3
62 E28D4B 45 D3, EVEX_Vpsrlvq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpsrlvq zmm2{k3}{z},zmm6,zmm3
62 F2CDCB 45 D3, EVEX_Vpsrlvq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpsravd xmm2,xmm6,xmm3
C4E249 46 D3, VEX_Vpsravd_xmm_xmm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpsravd xmm2,xmm6,[rax]
C4E249 46 10, VEX_Vpsravd_xmm_xmm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt32
# vpsravd ymm2,ymm6,ymm3
C4E24D 46 D3, VEX_Vpsravd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpsravd ymm2,ymm6,[rax]
C4E24D 46 10, VEX_Vpsravd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt32
# vpsravd xmm2,xmm6,[rax+10h]
62 F24D08 46 50 01, EVEX_Vpsravd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpsravd xmm18{k3},xmm14,xmm3
62 E20D0B 46 D3, EVEX_Vpsravd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpsravd xmm2{k3}{z},xmm6,xmm3
62 F24D8B 46 D3, EVEX_Vpsravd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpsravd ymm2,ymm6,[rax+20h]
62 F24D28 46 50 01, EVEX_Vpsravd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpsravd ymm18{k3},ymm14,ymm3
62 E20D2B 46 D3, EVEX_Vpsravd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpsravd ymm2{k3}{z},ymm6,ymm3
62 F24DAB 46 D3, EVEX_Vpsravd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpsravd zmm2,zmm6,[rax+40h]
62 F24D48 46 50 01, EVEX_Vpsravd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpsravd zmm18{k3},zmm14,zmm3
62 E20D4B 46 D3, EVEX_Vpsravd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpsravd zmm2{k3}{z},zmm6,zmm3
62 F24DCB 46 D3, EVEX_Vpsravd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpsravq xmm2,xmm6,[rax+10h]
62 F2CD08 46 50 01, EVEX_Vpsravq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpsravq xmm18{k3},xmm14,xmm3
62 E28D0B 46 D3, EVEX_Vpsravq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpsravq xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 46 D3, EVEX_Vpsravq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpsravq ymm2,ymm6,[rax+20h]
62 F2CD28 46 50 01, EVEX_Vpsravq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpsravq ymm18{k3},ymm14,ymm3
62 E28D2B 46 D3, EVEX_Vpsravq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpsravq ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 46 D3, EVEX_Vpsravq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpsravq zmm2,zmm6,[rax+40h]
62 F2CD48 46 50 01, EVEX_Vpsravq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpsravq zmm18{k3},zmm14,zmm3
62 E28D4B 46 D3, EVEX_Vpsravq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpsravq zmm2{k3}{z},zmm6,zmm3
62 F2CDCB 46 D3, EVEX_Vpsravq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpsllvd xmm2,xmm6,xmm3
C4E249 47 D3, VEX_Vpsllvd_xmm_xmm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpsllvd xmm2,xmm6,[rax]
C4E249 47 10, VEX_Vpsllvd_xmm_xmm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt32
# vpsllvd ymm2,ymm6,ymm3
C4E24D 47 D3, VEX_Vpsllvd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpsllvd ymm2,ymm6,[rax]
C4E24D 47 10, VEX_Vpsllvd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt32
# vpsllvq xmm2,xmm6,xmm3
C4E2C9 47 D3, VEX_Vpsllvq_xmm_xmm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpsllvq xmm2,xmm6,[rax]
C4E2C9 47 10, VEX_Vpsllvq_xmm_xmm_xmmm128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt64
# vpsllvq ymm2,ymm6,ymm3
C4E2CD 47 D3, VEX_Vpsllvq_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vpsllvq ymm2,ymm6,[rax]
C4E2CD 47 10, VEX_Vpsllvq_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt64
# vpsllvd xmm2,xmm6,[rax+10h]
62 F24D08 47 50 01, EVEX_Vpsllvd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpsllvd xmm18{k3},xmm14,xmm3
62 E20D0B 47 D3, EVEX_Vpsllvd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpsllvd xmm2{k3}{z},xmm6,xmm3
62 F24D8B 47 D3, EVEX_Vpsllvd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpsllvd ymm2,ymm6,[rax+20h]
62 F24D28 47 50 01, EVEX_Vpsllvd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpsllvd ymm18{k3},ymm14,ymm3
62 E20D2B 47 D3, EVEX_Vpsllvd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpsllvd ymm2{k3}{z},ymm6,ymm3
62 F24DAB 47 D3, EVEX_Vpsllvd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpsllvd zmm2,zmm6,[rax+40h]
62 F24D48 47 50 01, EVEX_Vpsllvd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpsllvd zmm18{k3},zmm14,zmm3
62 E20D4B 47 D3, EVEX_Vpsllvd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpsllvd zmm2{k3}{z},zmm6,zmm3
62 F24DCB 47 D3, EVEX_Vpsllvd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpsllvq xmm2,xmm6,[rax+10h]
62 F2CD08 47 50 01, EVEX_Vpsllvq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpsllvq xmm18{k3},xmm14,xmm3
62 E28D0B 47 D3, EVEX_Vpsllvq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpsllvq xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 47 D3, EVEX_Vpsllvq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpsllvq ymm2,ymm6,[rax+20h]
62 F2CD28 47 50 01, EVEX_Vpsllvq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpsllvq ymm18{k3},ymm14,ymm3
62 E28D2B 47 D3, EVEX_Vpsllvq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpsllvq ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 47 D3, EVEX_Vpsllvq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpsllvq zmm2,zmm6,[rax+40h]
62 F2CD48 47 50 01, EVEX_Vpsllvq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpsllvq zmm18{k3},zmm14,zmm3
62 E28D4B 47 D3, EVEX_Vpsllvq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpsllvq zmm2{k3}{z},zmm6,zmm3
62 F2CDCB 47 D3, EVEX_Vpsllvq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vrcp14ps xmm2,[rax+10h]
62 F27D08 4C 50 01, EVEX_Vrcp14ps_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float32
# vrcp14ps xmm18{k3},xmm3
62 E27D0B 4C D3, EVEX_Vrcp14ps_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm18 r=xmm18 r=k3 r=xmm3
# vrcp14ps xmm2{k3}{z},xmm3
62 F27D8B 4C D3, EVEX_Vrcp14ps_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vrcp14ps ymm2,[rax+20h]
62 F27D28 4C 50 01, EVEX_Vrcp14ps_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float32
# vrcp14ps ymm18{k3},ymm3
62 E27D2B 4C D3, EVEX_Vrcp14ps_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm18 r=ymm18 r=k3 r=ymm3
# vrcp14ps ymm2{k3}{z},ymm3
62 F27DAB 4C D3, EVEX_Vrcp14ps_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vrcp14ps zmm2,[rax+40h]
62 F27D48 4C 50 01, EVEX_Vrcp14ps_zmm_k1z_zmmm512b32, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float32
# vrcp14ps zmm18{k3},zmm3
62 E27D4B 4C D3, EVEX_Vrcp14ps_zmm_k1z_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r cw=vmm18 r=zmm18 r=k3 r=zmm3
# vrcp14ps zmm2{k3}{z},zmm3
62 F27DCB 4C D3, EVEX_Vrcp14ps_zmm_k1z_zmmm512b32, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vrcp14pd xmm2,[rax+10h]
62 F2FD08 4C 50 01, EVEX_Vrcp14pd_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float64
# vrcp14pd xmm18{k3},xmm3
62 E2FD0B 4C D3, EVEX_Vrcp14pd_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm18 r=xmm18 r=k3 r=xmm3
# vrcp14pd xmm2{k3}{z},xmm3
62 F2FD8B 4C D3, EVEX_Vrcp14pd_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vrcp14pd ymm2,[rax+20h]
62 F2FD28 4C 50 01, EVEX_Vrcp14pd_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float64
# vrcp14pd ymm18{k3},ymm3
62 E2FD2B 4C D3, EVEX_Vrcp14pd_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm18 r=ymm18 r=k3 r=ymm3
# vrcp14pd ymm2{k3}{z},ymm3
62 F2FDAB 4C D3, EVEX_Vrcp14pd_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vrcp14pd zmm2,[rax+40h]
62 F2FD48 4C 50 01, EVEX_Vrcp14pd_zmm_k1z_zmmm512b64, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float64
# vrcp14pd zmm18{k3},zmm3
62 E2FD4B 4C D3, EVEX_Vrcp14pd_zmm_k1z_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r cw=vmm18 r=zmm18 r=k3 r=zmm3
# vrcp14pd zmm2{k3}{z},zmm3
62 F2FDCB 4C D3, EVEX_Vrcp14pd_zmm_k1z_zmmm512b64, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vrcp14ss xmm2,xmm6,dword ptr [rax+4]
62 F24D08 4D 50 01, EVEX_Vrcp14ss_xmm_k1z_xmm_xmmm32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vrcp14ss xmm2{k3},xmm6,xmm3
62 F24D0B 4D D3, EVEX_Vrcp14ss_xmm_k1z_xmm_xmmm32, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vrcp14ss xmm18{k3}{z},xmm14,xmm3
62 E20D8B 4D D3, EVEX_Vrcp14ss_xmm_k1z_xmm_xmmm32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vrcp14sd xmm2,xmm6,qword ptr [rax+8]
62 F2CD08 4D 50 01, EVEX_Vrcp14sd_xmm_k1z_xmm_xmmm64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vrcp14sd xmm2{k3},xmm6,xmm3
62 F2CD0B 4D D3, EVEX_Vrcp14sd_xmm_k1z_xmm_xmmm64, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vrcp14sd xmm18{k3}{z},xmm14,xmm3
62 E28D8B 4D D3, EVEX_Vrcp14sd_xmm_k1z_xmm_xmmm64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vrsqrt14ps xmm2,[rax+10h]
62 F27D08 4E 50 01, EVEX_Vrsqrt14ps_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float32
# vrsqrt14ps xmm18{k3},xmm3
62 E27D0B 4E D3, EVEX_Vrsqrt14ps_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm18 r=xmm18 r=k3 r=xmm3
# vrsqrt14ps xmm2{k3}{z},xmm3
62 F27D8B 4E D3, EVEX_Vrsqrt14ps_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vrsqrt14ps ymm2,[rax+20h]
62 F27D28 4E 50 01, EVEX_Vrsqrt14ps_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float32
# vrsqrt14ps ymm18{k3},ymm3
62 E27D2B 4E D3, EVEX_Vrsqrt14ps_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm18 r=ymm18 r=k3 r=ymm3
# vrsqrt14ps ymm2{k3}{z},ymm3
62 F27DAB 4E D3, EVEX_Vrsqrt14ps_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vrsqrt14ps zmm2,[rax+40h]
62 F27D48 4E 50 01, EVEX_Vrsqrt14ps_zmm_k1z_zmmm512b32, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float32
# vrsqrt14ps zmm18{k3},zmm3
62 E27D4B 4E D3, EVEX_Vrsqrt14ps_zmm_k1z_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r cw=vmm18 r=zmm18 r=k3 r=zmm3
# vrsqrt14ps zmm2{k3}{z},zmm3
62 F27DCB 4E D3, EVEX_Vrsqrt14ps_zmm_k1z_zmmm512b32, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vrsqrt14pd xmm2,[rax+10h]
62 F2FD08 4E 50 01, EVEX_Vrsqrt14pd_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float64
# vrsqrt14pd xmm18{k3},xmm3
62 E2FD0B 4E D3, EVEX_Vrsqrt14pd_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm18 r=xmm18 r=k3 r=xmm3
# vrsqrt14pd xmm2{k3}{z},xmm3
62 F2FD8B 4E D3, EVEX_Vrsqrt14pd_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vrsqrt14pd ymm2,[rax+20h]
62 F2FD28 4E 50 01, EVEX_Vrsqrt14pd_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float64
# vrsqrt14pd ymm18{k3},ymm3
62 E2FD2B 4E D3, EVEX_Vrsqrt14pd_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm18 r=ymm18 r=k3 r=ymm3
# vrsqrt14pd ymm2{k3}{z},ymm3
62 F2FDAB 4E D3, EVEX_Vrsqrt14pd_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vrsqrt14pd zmm2,[rax+40h]
62 F2FD48 4E 50 01, EVEX_Vrsqrt14pd_zmm_k1z_zmmm512b64, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float64
# vrsqrt14pd zmm18{k3},zmm3
62 E2FD4B 4E D3, EVEX_Vrsqrt14pd_zmm_k1z_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r cw=vmm18 r=zmm18 r=k3 r=zmm3
# vrsqrt14pd zmm2{k3}{z},zmm3
62 F2FDCB 4E D3, EVEX_Vrsqrt14pd_zmm_k1z_zmmm512b64, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vrsqrt14ss xmm2,xmm6,dword ptr [rax+4]
62 F24D08 4F 50 01, EVEX_Vrsqrt14ss_xmm_k1z_xmm_xmmm32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vrsqrt14ss xmm2{k3},xmm6,xmm3
62 F24D0B 4F D3, EVEX_Vrsqrt14ss_xmm_k1z_xmm_xmmm32, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vrsqrt14ss xmm18{k3}{z},xmm14,xmm3
62 E20D8B 4F D3, EVEX_Vrsqrt14ss_xmm_k1z_xmm_xmmm32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vrsqrt14sd xmm2,xmm6,qword ptr [rax+8]
62 F2CD08 4F 50 01, EVEX_Vrsqrt14sd_xmm_k1z_xmm_xmmm64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vrsqrt14sd xmm2{k3},xmm6,xmm3
62 F2CD0B 4F D3, EVEX_Vrsqrt14sd_xmm_k1z_xmm_xmmm64, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vrsqrt14sd xmm18{k3}{z},xmm14,xmm3
62 E28D8B 4F D3, EVEX_Vrsqrt14sd_xmm_k1z_xmm_xmmm64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vdpbf16ps xmm2,xmm6,[rax+10h]
62 F24E08 52 50 01, EVEX_Vdpbf16ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_BF16, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_2xBFloat16
# vdpbf16ps xmm2{k3},xmm6,[rax+10h]
62 F24E0B 52 50 01, EVEX_Vdpbf16ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_BF16, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_2xBFloat16 r=k3
# vdpbf16ps xmm2{k5}{z},xmm6,dword bcst [rax+4]
62 F24E9D 52 50 01, EVEX_Vdpbf16ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_BF16, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x4;Broadcast128_2xBFloat16 r=k5
# vdpbf16ps ymm2,ymm6,[rax+20h]
62 F24E28 52 50 01, EVEX_Vdpbf16ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_BF16, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_2xBFloat16
# vdpbf16ps ymm2{k3},ymm6,[rax+20h]
62 F24E2B 52 50 01, EVEX_Vdpbf16ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_BF16, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_2xBFloat16 r=k3
# vdpbf16ps ymm2{k5}{z},ymm6,dword bcst [rax+4]
62 F24EBD 52 50 01, EVEX_Vdpbf16ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_BF16, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x4;Broadcast256_2xBFloat16 r=k5
# vdpbf16ps zmm2,zmm6,[rax+40h]
62 F24E48 52 50 01, EVEX_Vdpbf16ps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F;AVX512_BF16, op0=rw op1=r op2=r r=zmm2 w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_2xBFloat16
# vdpbf16ps zmm2{k3},zmm6,[rax+40h]
62 F24E4B 52 50 01, EVEX_Vdpbf16ps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F;AVX512_BF16, op0=rcw op1=r op2=r r=zmm2 cw=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_2xBFloat16 r=k3
# vdpbf16ps zmm2{k5}{z},zmm6,dword bcst [rax+4]
62 F24EDD 52 50 01, EVEX_Vdpbf16ps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F;AVX512_BF16, op0=rw op1=r op2=r r=zmm2 w=vmm2 r=zmm6 r=rax rm=ds:rax+0x4;Broadcast512_2xBFloat16 r=k5
# vp4dpwssd zmm10,zmm22,xmmword ptr [rax+10h]
62 724F40 52 50 01, EVEX_Vp4dpwssd_zmm_k1z_zmmp3_m128, EVEX, AVX512_4VNNIW, op0=rw op1=r op2=r w=vmm10 r=zmm10 r=zmm20 r=zmm21 r=zmm22 r=zmm23 r=rax rm=ds:rax+0x10;Packed128_Int16
# vp4dpwssd zmm2{k3},zmm6,xmmword ptr [rax+10h]
62 F24F4B 52 50 01, EVEX_Vp4dpwssd_zmm_k1z_zmmp3_m128, EVEX, AVX512_4VNNIW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=zmm2 r=k3 r=zmm4 r=zmm5 r=zmm6 r=zmm7 r=rax rm=ds:rax+0x10;Packed128_Int16
# vp4dpwssd zmm18{k3}{z},zmm14,xmmword ptr [rax+10h]
62 E20FCB 52 50 01, EVEX_Vp4dpwssd_zmm_k1z_zmmp3_m128, EVEX, AVX512_4VNNIW, op0=rw op1=r op2=r w=vmm18 r=zmm18 r=k3 r=zmm12 r=zmm13 r=zmm14 r=zmm15 r=rax rm=ds:rax+0x10;Packed128_Int16
# vp4dpwssds zmm10,zmm22,xmmword ptr [rax+10h]
62 724F40 53 50 01, EVEX_Vp4dpwssds_zmm_k1z_zmmp3_m128, EVEX, AVX512_4VNNIW, op0=rw op1=r op2=r w=vmm10 r=zmm10 r=zmm20 r=zmm21 r=zmm22 r=zmm23 r=rax rm=ds:rax+0x10;Packed128_Int16
# vp4dpwssds zmm2{k3},zmm6,xmmword ptr [rax+10h]
62 F24F4B 53 50 01, EVEX_Vp4dpwssds_zmm_k1z_zmmp3_m128, EVEX, AVX512_4VNNIW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=zmm2 r=k3 r=zmm4 r=zmm5 r=zmm6 r=zmm7 r=rax rm=ds:rax+0x10;Packed128_Int16
# vp4dpwssds zmm18{k3}{z},zmm14,xmmword ptr [rax+10h]
62 E20FCB 53 50 01, EVEX_Vp4dpwssds_zmm_k1z_zmmp3_m128, EVEX, AVX512_4VNNIW, op0=rw op1=r op2=r w=vmm18 r=zmm18 r=k3 r=zmm12 r=zmm13 r=zmm14 r=zmm15 r=rax rm=ds:rax+0x10;Packed128_Int16
# vpbroadcastd xmm1,xmm5
C4E279 58 CD, VEX_Vpbroadcastd_xmm_xmmm32, VEX, AVX2, op0=w op1=r w=vmm1 r=xmm5
# vpbroadcastd xmm2,dword ptr [rax]
C4E279 58 10, VEX_Vpbroadcastd_xmm_xmmm32, VEX, AVX2, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Int32
# vpbroadcastd ymm1,xmm5
C4E27D 58 CD, VEX_Vpbroadcastd_ymm_xmmm32, VEX, AVX2, op0=w op1=r w=vmm1 r=xmm5
# vpbroadcastd ymm2,dword ptr [rax]
C4E27D 58 10, VEX_Vpbroadcastd_ymm_xmmm32, VEX, AVX2, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Int32
# vpbroadcastd xmm2,xmm3
62 F27D08 58 D3, EVEX_Vpbroadcastd_xmm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpbroadcastd xmm2,dword ptr [rax+4]
62 F27D08 58 50 01, EVEX_Vpbroadcastd_xmm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+4;Int32
# vpbroadcastd xmm2{k3},xmm3
62 F27D0B 58 D3, EVEX_Vpbroadcastd_xmm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vpbroadcastd xmm10{k3}{z},xmm19
62 327D8B 58 D3, EVEX_Vpbroadcastd_xmm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpbroadcastd ymm2,xmm3
62 F27D28 58 D3, EVEX_Vpbroadcastd_ymm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpbroadcastd ymm2,dword ptr [rax+4]
62 F27D28 58 50 01, EVEX_Vpbroadcastd_ymm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+4;Int32
# vpbroadcastd ymm2{k3},xmm3
62 F27D2B 58 D3, EVEX_Vpbroadcastd_ymm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vpbroadcastd ymm10{k3}{z},xmm19
62 327DAB 58 D3, EVEX_Vpbroadcastd_ymm_k1z_xmmm32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpbroadcastd zmm2,xmm3
62 F27D48 58 D3, EVEX_Vpbroadcastd_zmm_k1z_xmmm32, EVEX, AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpbroadcastd zmm2,dword ptr [rax+4]
62 F27D48 58 50 01, EVEX_Vpbroadcastd_zmm_k1z_xmmm32, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+4;Int32
# vpbroadcastd zmm2{k3},xmm3
62 F27D4B 58 D3, EVEX_Vpbroadcastd_zmm_k1z_xmmm32, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=xmm3
# vpbroadcastd zmm10{k3}{z},xmm19
62 327DCB 58 D3, EVEX_Vpbroadcastd_zmm_k1z_xmmm32, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpbroadcastq xmm1,xmm5
C4E279 59 CD, VEX_Vpbroadcastq_xmm_xmmm64, VEX, AVX2, op0=w op1=r w=vmm1 r=xmm5
# vpbroadcastq xmm2,qword ptr [rax]
C4E279 59 10, VEX_Vpbroadcastq_xmm_xmmm64, VEX, AVX2, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Int64
# vpbroadcastq ymm1,xmm5
C4E27D 59 CD, VEX_Vpbroadcastq_ymm_xmmm64, VEX, AVX2, op0=w op1=r w=vmm1 r=xmm5
# vpbroadcastq ymm2,qword ptr [rax]
C4E27D 59 10, VEX_Vpbroadcastq_ymm_xmmm64, VEX, AVX2, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Int64
# vbroadcasti32x2 xmm2,xmm3
62 F27D08 59 D3, EVEX_Vbroadcasti32x2_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=xmm3
# vbroadcasti32x2 xmm2,qword ptr [rax+8]
62 F27D08 59 50 01, EVEX_Vbroadcasti32x2_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed64_UInt32
# vbroadcasti32x2 xmm2{k3},xmm3
62 F27D0B 59 D3, EVEX_Vbroadcasti32x2_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vbroadcasti32x2 xmm10{k3}{z},xmm19
62 327D8B 59 D3, EVEX_Vbroadcasti32x2_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vbroadcasti32x2 ymm2,xmm3
62 F27D28 59 D3, EVEX_Vbroadcasti32x2_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=xmm3
# vbroadcasti32x2 ymm2,qword ptr [rax+8]
62 F27D28 59 50 01, EVEX_Vbroadcasti32x2_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed64_UInt32
# vbroadcasti32x2 ymm2{k3},xmm3
62 F27D2B 59 D3, EVEX_Vbroadcasti32x2_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vbroadcasti32x2 ymm10{k3}{z},xmm19
62 327DAB 59 D3, EVEX_Vbroadcasti32x2_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vbroadcasti32x2 zmm2,xmm3
62 F27D48 59 D3, EVEX_Vbroadcasti32x2_zmm_k1z_xmmm64, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=xmm3
# vbroadcasti32x2 zmm2,qword ptr [rax+8]
62 F27D48 59 50 01, EVEX_Vbroadcasti32x2_zmm_k1z_xmmm64, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed64_UInt32
# vbroadcasti32x2 zmm2{k3},xmm3
62 F27D4B 59 D3, EVEX_Vbroadcasti32x2_zmm_k1z_xmmm64, EVEX, AVX512DQ, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=xmm3
# vbroadcasti32x2 zmm10{k3}{z},xmm19
62 327DCB 59 D3, EVEX_Vbroadcasti32x2_zmm_k1z_xmmm64, EVEX, AVX512DQ, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpbroadcastq xmm2,xmm3
62 F2FD08 59 D3, EVEX_Vpbroadcastq_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpbroadcastq xmm2,qword ptr [rax+8]
62 F2FD08 59 50 01, EVEX_Vpbroadcastq_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Int64
# vpbroadcastq xmm2{k3},xmm3
62 F2FD0B 59 D3, EVEX_Vpbroadcastq_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vpbroadcastq xmm10{k3}{z},xmm19
62 32FD8B 59 D3, EVEX_Vpbroadcastq_xmm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpbroadcastq ymm2,xmm3
62 F2FD28 59 D3, EVEX_Vpbroadcastq_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpbroadcastq ymm2,qword ptr [rax+8]
62 F2FD28 59 50 01, EVEX_Vpbroadcastq_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Int64
# vpbroadcastq ymm2{k3},xmm3
62 F2FD2B 59 D3, EVEX_Vpbroadcastq_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vpbroadcastq ymm10{k3}{z},xmm19
62 32FDAB 59 D3, EVEX_Vpbroadcastq_ymm_k1z_xmmm64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpbroadcastq zmm2,xmm3
62 F2FD48 59 D3, EVEX_Vpbroadcastq_zmm_k1z_xmmm64, EVEX, AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpbroadcastq zmm2,qword ptr [rax+8]
62 F2FD48 59 50 01, EVEX_Vpbroadcastq_zmm_k1z_xmmm64, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Int64
# vpbroadcastq zmm2{k3},xmm3
62 F2FD4B 59 D3, EVEX_Vpbroadcastq_zmm_k1z_xmmm64, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=xmm3
# vpbroadcastq zmm10{k3}{z},xmm19
62 32FDCB 59 D3, EVEX_Vpbroadcastq_zmm_k1z_xmmm64, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vbroadcasti128 ymm2,xmmword ptr [rax]
C4E27D 5A 10, VEX_Vbroadcasti128_ymm_m128, VEX, AVX2, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Int128
# vbroadcasti32x4 ymm2,xmmword ptr [rax+10h]
62 F27D28 5A 50 01, EVEX_Vbroadcasti32x4_ymm_k1z_m128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vbroadcasti32x4 ymm2{k3}{z},xmmword ptr [rax+10h]
62 F27DAB 5A 50 01, EVEX_Vbroadcasti32x4_ymm_k1z_m128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=k3 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vbroadcasti32x4 zmm2,xmmword ptr [rax+10h]
62 F27D48 5A 50 01, EVEX_Vbroadcasti32x4_zmm_k1z_m128, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vbroadcasti32x4 zmm2{k3}{z},xmmword ptr [rax+10h]
62 F27DCB 5A 50 01, EVEX_Vbroadcasti32x4_zmm_k1z_m128, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vbroadcasti64x2 ymm2,xmmword ptr [rax+10h]
62 F2FD28 5A 50 01, EVEX_Vbroadcasti64x2_ymm_k1z_m128, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vbroadcasti64x2 ymm2{k3}{z},xmmword ptr [rax+10h]
62 F2FDAB 5A 50 01, EVEX_Vbroadcasti64x2_ymm_k1z_m128, EVEX, AVX512VL;AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vbroadcasti64x2 zmm2,xmmword ptr [rax+10h]
62 F2FD48 5A 50 01, EVEX_Vbroadcasti64x2_zmm_k1z_m128, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vbroadcasti64x2 zmm2{k3}{z},xmmword ptr [rax+10h]
62 F2FDCB 5A 50 01, EVEX_Vbroadcasti64x2_zmm_k1z_m128, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vbroadcasti32x8 zmm2,ymmword ptr [rax+20h]
62 F27D48 5B 50 01, EVEX_Vbroadcasti32x8_zmm_k1z_m256, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vbroadcasti32x8 zmm2{k3}{z},ymmword ptr [rax+20h]
62 F27DCB 5B 50 01, EVEX_Vbroadcasti32x8_zmm_k1z_m256, EVEX, AVX512DQ, op0=w op1=r w=vmm2 r=k3 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vbroadcasti64x4 zmm2,ymmword ptr [rax+20h]
62 F2FD48 5B 50 01, EVEX_Vbroadcasti64x4_zmm_k1z_m256, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vbroadcasti64x4 zmm2{k3}{z},ymmword ptr [rax+20h]
62 F2FDCB 5B 50 01, EVEX_Vbroadcasti64x4_zmm_k1z_m256, EVEX, AVX512F, op0=w op1=r w=vmm2 r=k3 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpblendmd xmm2,xmm6,[rax+10h]
62 F24D08 64 50 01, EVEX_Vpblendmd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpblendmd xmm18{k3},xmm14,xmm3
62 E20D0B 64 D3, EVEX_Vpblendmd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpblendmd xmm2{k3}{z},xmm6,xmm3
62 F24D8B 64 D3, EVEX_Vpblendmd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpblendmd ymm2,ymm6,[rax+20h]
62 F24D28 64 50 01, EVEX_Vpblendmd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpblendmd ymm18{k3},ymm14,ymm3
62 E20D2B 64 D3, EVEX_Vpblendmd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpblendmd ymm2{k3}{z},ymm6,ymm3
62 F24DAB 64 D3, EVEX_Vpblendmd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpblendmd zmm2,zmm6,[rax+40h]
62 F24D48 64 50 01, EVEX_Vpblendmd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpblendmd zmm18{k3},zmm14,zmm3
62 E20D4B 64 D3, EVEX_Vpblendmd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# vpblendmd zmm2{k3}{z},zmm6,zmm3
62 F24DCB 64 D3, EVEX_Vpblendmd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpblendmq xmm2,xmm6,[rax+10h]
62 F2CD08 64 50 01, EVEX_Vpblendmq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpblendmq xmm18{k3},xmm14,xmm3
62 E28D0B 64 D3, EVEX_Vpblendmq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpblendmq xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 64 D3, EVEX_Vpblendmq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpblendmq ymm2,ymm6,[rax+20h]
62 F2CD28 64 50 01, EVEX_Vpblendmq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpblendmq ymm18{k3},ymm14,ymm3
62 E28D2B 64 D3, EVEX_Vpblendmq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpblendmq ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 64 D3, EVEX_Vpblendmq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpblendmq zmm2,zmm6,[rax+40h]
62 F2CD48 64 50 01, EVEX_Vpblendmq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpblendmq zmm18{k3},zmm14,zmm3
62 E28D4B 64 D3, EVEX_Vpblendmq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# vpblendmq zmm2{k3}{z},zmm6,zmm3
62 F2CDCB 64 D3, EVEX_Vpblendmq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vblendmps xmm2,xmm6,[rax+10h]
62 F24D08 65 50 01, EVEX_Vblendmps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vblendmps xmm18{k3},xmm14,xmm3
62 E20D0B 65 D3, EVEX_Vblendmps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vblendmps xmm2{k3}{z},xmm6,xmm3
62 F24D8B 65 D3, EVEX_Vblendmps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vblendmps ymm2,ymm6,[rax+20h]
62 F24D28 65 50 01, EVEX_Vblendmps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vblendmps ymm18{k3},ymm14,ymm3
62 E20D2B 65 D3, EVEX_Vblendmps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vblendmps ymm2{k3}{z},ymm6,ymm3
62 F24DAB 65 D3, EVEX_Vblendmps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vblendmps zmm2,zmm6,[rax+40h]
62 F24D48 65 50 01, EVEX_Vblendmps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vblendmps zmm18{k3},zmm14,zmm3
62 E20D4B 65 D3, EVEX_Vblendmps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# vblendmps zmm2{k3}{z},zmm6,zmm3
62 F24DCB 65 D3, EVEX_Vblendmps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vblendmpd xmm2,xmm6,[rax+10h]
62 F2CD08 65 50 01, EVEX_Vblendmpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vblendmpd xmm18{k3},xmm14,xmm3
62 E28D0B 65 D3, EVEX_Vblendmpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vblendmpd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 65 D3, EVEX_Vblendmpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vblendmpd ymm2,ymm6,[rax+20h]
62 F2CD28 65 50 01, EVEX_Vblendmpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vblendmpd ymm18{k3},ymm14,ymm3
62 E28D2B 65 D3, EVEX_Vblendmpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vblendmpd ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 65 D3, EVEX_Vblendmpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vblendmpd zmm2,zmm6,[rax+40h]
62 F2CD48 65 50 01, EVEX_Vblendmpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vblendmpd zmm18{k3},zmm14,zmm3
62 E28D4B 65 D3, EVEX_Vblendmpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# vblendmpd zmm2{k3}{z},zmm6,zmm3
62 F2CDCB 65 D3, EVEX_Vblendmpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpblendmb xmm2,xmm6,[rax+10h]
62 F24D08 66 50 01, EVEX_Vpblendmb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vpblendmb xmm2{k3},xmm6,xmm3
62 F24D0B 66 D3, EVEX_Vpblendmb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpblendmb xmm18{k3}{z},xmm14,xmm3
62 E20D8B 66 D3, EVEX_Vpblendmb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpblendmb ymm2,ymm6,[rax+20h]
62 F24D28 66 50 01, EVEX_Vpblendmb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vpblendmb ymm2{k3},ymm6,ymm3
62 F24D2B 66 D3, EVEX_Vpblendmb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpblendmb ymm18{k3}{z},ymm14,ymm3
62 E20DAB 66 D3, EVEX_Vpblendmb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpblendmb zmm2,zmm6,[rax+40h]
62 F24D48 66 50 01, EVEX_Vpblendmb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vpblendmb zmm2{k3},zmm6,zmm3
62 F24D4B 66 D3, EVEX_Vpblendmb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpblendmb zmm18{k3}{z},zmm14,zmm3
62 E20DCB 66 D3, EVEX_Vpblendmb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# vpblendmw xmm2,xmm6,[rax+10h]
62 F2CD08 66 50 01, EVEX_Vpblendmw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpblendmw xmm2{k3},xmm6,xmm3
62 F2CD0B 66 D3, EVEX_Vpblendmw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpblendmw xmm18{k3}{z},xmm14,xmm3
62 E28D8B 66 D3, EVEX_Vpblendmw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpblendmw ymm2,ymm6,[rax+20h]
62 F2CD28 66 50 01, EVEX_Vpblendmw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpblendmw ymm2{k3},ymm6,ymm3
62 F2CD2B 66 D3, EVEX_Vpblendmw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpblendmw ymm18{k3}{z},ymm14,ymm3
62 E28DAB 66 D3, EVEX_Vpblendmw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpblendmw zmm2,zmm6,[rax+40h]
62 F2CD48 66 50 01, EVEX_Vpblendmw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpblendmw zmm2{k3},zmm6,zmm3
62 F2CD4B 66 D3, EVEX_Vpblendmw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpblendmw zmm18{k3}{z},zmm14,zmm3
62 E28DCB 66 D3, EVEX_Vpblendmw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# vp2intersectd k2,xmm6,[rax+10h]
62 F24F08 68 50 01, EVEX_Vp2intersectd_kp1_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_VP2INTERSECT, op0=w op1=r op2=r w=k2;k3 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vp2intersectd k3,xmm6,xmm3
62 F24F08 68 DB, EVEX_Vp2intersectd_kp1_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_VP2INTERSECT, op0=w op1=r op2=r w=k2;k3 r=xmm6 r=xmm3
# vp2intersectd k2,ymm6,[rax+20h]
62 F24F28 68 50 01, EVEX_Vp2intersectd_kp1_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_VP2INTERSECT, op0=w op1=r op2=r w=k2;k3 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vp2intersectd k3,ymm6,ymm3
62 F24F28 68 DB, EVEX_Vp2intersectd_kp1_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_VP2INTERSECT, op0=w op1=r op2=r w=k2;k3 r=ymm6 r=ymm3
# vp2intersectd k2,zmm6,[rax+40h]
62 F24F48 68 50 01, EVEX_Vp2intersectd_kp1_zmm_zmmm512b32, EVEX, AVX512F;AVX512_VP2INTERSECT, op0=w op1=r op2=r w=k2;k3 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vp2intersectd k3,zmm6,zmm3
62 F24F48 68 DB, EVEX_Vp2intersectd_kp1_zmm_zmmm512b32, EVEX, AVX512F;AVX512_VP2INTERSECT, op0=w op1=r op2=r w=k2;k3 r=zmm6 r=zmm3
# vp2intersectq k2,xmm6,[rax+10h]
62 F2CF08 68 50 01, EVEX_Vp2intersectq_kp1_xmm_xmmm128b64, EVEX, AVX512VL;AVX512_VP2INTERSECT, op0=w op1=r op2=r w=k2;k3 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vp2intersectq k3,xmm6,xmm3
62 F2CF08 68 DB, EVEX_Vp2intersectq_kp1_xmm_xmmm128b64, EVEX, AVX512VL;AVX512_VP2INTERSECT, op0=w op1=r op2=r w=k2;k3 r=xmm6 r=xmm3
# vp2intersectq k2,ymm6,[rax+20h]
62 F2CF28 68 50 01, EVEX_Vp2intersectq_kp1_ymm_ymmm256b64, EVEX, AVX512VL;AVX512_VP2INTERSECT, op0=w op1=r op2=r w=k2;k3 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vp2intersectq k3,ymm6,ymm3
62 F2CF28 68 DB, EVEX_Vp2intersectq_kp1_ymm_ymmm256b64, EVEX, AVX512VL;AVX512_VP2INTERSECT, op0=w op1=r op2=r w=k2;k3 r=ymm6 r=ymm3
# vp2intersectq k2,zmm6,[rax+40h]
62 F2CF48 68 50 01, EVEX_Vp2intersectq_kp1_zmm_zmmm512b64, EVEX, AVX512F;AVX512_VP2INTERSECT, op0=w op1=r op2=r w=k2;k3 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vp2intersectq k3,zmm6,zmm3
62 F2CF48 68 DB, EVEX_Vp2intersectq_kp1_zmm_zmmm512b64, EVEX, AVX512F;AVX512_VP2INTERSECT, op0=w op1=r op2=r w=k2;k3 r=zmm6 r=zmm3
# vpermi2b xmm2,xmm6,[rax+10h]
62 F24D08 75 50 01, EVEX_Vpermi2b_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512_VBMI, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vpermi2b xmm2{k3},xmm6,xmm3
62 F24D0B 75 D3, EVEX_Vpermi2b_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512_VBMI, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpermi2b xmm18{k3}{z},xmm14,xmm3
62 E20D8B 75 D3, EVEX_Vpermi2b_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512_VBMI, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpermi2b ymm2,ymm6,[rax+20h]
62 F24D28 75 50 01, EVEX_Vpermi2b_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512_VBMI, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vpermi2b ymm2{k3},ymm6,ymm3
62 F24D2B 75 D3, EVEX_Vpermi2b_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512_VBMI, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpermi2b ymm18{k3}{z},ymm14,ymm3
62 E20DAB 75 D3, EVEX_Vpermi2b_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512_VBMI, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpermi2b zmm2,zmm6,[rax+40h]
62 F24D48 75 50 01, EVEX_Vpermi2b_zmm_k1z_zmm_zmmm512, EVEX, AVX512_VBMI, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vpermi2b zmm2{k3},zmm6,zmm3
62 F24D4B 75 D3, EVEX_Vpermi2b_zmm_k1z_zmm_zmmm512, EVEX, AVX512_VBMI, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpermi2b zmm18{k3}{z},zmm14,zmm3
62 E20DCB 75 D3, EVEX_Vpermi2b_zmm_k1z_zmm_zmmm512, EVEX, AVX512_VBMI, op0=rw op1=r op2=r w=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpermi2w xmm2,xmm6,[rax+10h]
62 F2CD08 75 50 01, EVEX_Vpermi2w_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpermi2w xmm2{k3},xmm6,xmm3
62 F2CD0B 75 D3, EVEX_Vpermi2w_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpermi2w xmm18{k3}{z},xmm14,xmm3
62 E28D8B 75 D3, EVEX_Vpermi2w_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpermi2w ymm2,ymm6,[rax+20h]
62 F2CD28 75 50 01, EVEX_Vpermi2w_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpermi2w ymm2{k3},ymm6,ymm3
62 F2CD2B 75 D3, EVEX_Vpermi2w_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpermi2w ymm18{k3}{z},ymm14,ymm3
62 E28DAB 75 D3, EVEX_Vpermi2w_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpermi2w zmm2,zmm6,[rax+40h]
62 F2CD48 75 50 01, EVEX_Vpermi2w_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpermi2w zmm2{k3},zmm6,zmm3
62 F2CD4B 75 D3, EVEX_Vpermi2w_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpermi2w zmm18{k3}{z},zmm14,zmm3
62 E28DCB 75 D3, EVEX_Vpermi2w_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rw op1=r op2=r w=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpermi2d xmm2,xmm6,[rax+10h]
62 F24D08 76 50 01, EVEX_Vpermi2d_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpermi2d xmm18{k3},xmm14,xmm3
62 E20D0B 76 D3, EVEX_Vpermi2d_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpermi2d xmm2{k3}{z},xmm6,xmm3
62 F24D8B 76 D3, EVEX_Vpermi2d_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpermi2d ymm2,ymm6,[rax+20h]
62 F24D28 76 50 01, EVEX_Vpermi2d_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpermi2d ymm18{k3},ymm14,ymm3
62 E20D2B 76 D3, EVEX_Vpermi2d_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpermi2d ymm2{k3}{z},ymm6,ymm3
62 F24DAB 76 D3, EVEX_Vpermi2d_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpermi2d zmm2,zmm6,[rax+40h]
62 F24D48 76 50 01, EVEX_Vpermi2d_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpermi2d zmm18{k3},zmm14,zmm3
62 E20D4B 76 D3, EVEX_Vpermi2d_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpermi2d zmm2{k3}{z},zmm6,zmm3
62 F24DCB 76 D3, EVEX_Vpermi2d_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpermi2q xmm2,xmm6,[rax+10h]
62 F2CD08 76 50 01, EVEX_Vpermi2q_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpermi2q xmm18{k3},xmm14,xmm3
62 E28D0B 76 D3, EVEX_Vpermi2q_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpermi2q xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 76 D3, EVEX_Vpermi2q_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpermi2q ymm2,ymm6,[rax+20h]
62 F2CD28 76 50 01, EVEX_Vpermi2q_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpermi2q ymm18{k3},ymm14,ymm3
62 E28D2B 76 D3, EVEX_Vpermi2q_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpermi2q ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 76 D3, EVEX_Vpermi2q_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpermi2q zmm2,zmm6,[rax+40h]
62 F2CD48 76 50 01, EVEX_Vpermi2q_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm6 r=zmm2 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpermi2q zmm18{k3},zmm14,zmm3
62 E28D4B 76 D3, EVEX_Vpermi2q_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpermi2q zmm2{k3}{z},zmm6,zmm3
62 F2CDCB 76 D3, EVEX_Vpermi2q_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpermi2ps xmm2,xmm6,[rax+10h]
62 F24D08 77 50 01, EVEX_Vpermi2ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vpermi2ps xmm18{k3},xmm14,xmm3
62 E20D0B 77 D3, EVEX_Vpermi2ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpermi2ps xmm2{k3}{z},xmm6,xmm3
62 F24D8B 77 D3, EVEX_Vpermi2ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpermi2ps ymm2,ymm6,[rax+20h]
62 F24D28 77 50 01, EVEX_Vpermi2ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vpermi2ps ymm18{k3},ymm14,ymm3
62 E20D2B 77 D3, EVEX_Vpermi2ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpermi2ps ymm2{k3}{z},ymm6,ymm3
62 F24DAB 77 D3, EVEX_Vpermi2ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpermi2ps zmm2,zmm6,[rax+40h]
62 F24D48 77 50 01, EVEX_Vpermi2ps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vpermi2ps zmm18{k3},zmm14,zmm3
62 E20D4B 77 D3, EVEX_Vpermi2ps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpermi2ps zmm2{k3}{z},zmm6,zmm3
62 F24DCB 77 D3, EVEX_Vpermi2ps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpermi2pd xmm2,xmm6,[rax+10h]
62 F2CD08 77 50 01, EVEX_Vpermi2pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vpermi2pd xmm18{k3},xmm14,xmm3
62 E28D0B 77 D3, EVEX_Vpermi2pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpermi2pd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 77 D3, EVEX_Vpermi2pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpermi2pd ymm2,ymm6,[rax+20h]
62 F2CD28 77 50 01, EVEX_Vpermi2pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vpermi2pd ymm18{k3},ymm14,ymm3
62 E28D2B 77 D3, EVEX_Vpermi2pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpermi2pd ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 77 D3, EVEX_Vpermi2pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpermi2pd zmm2,zmm6,[rax+40h]
62 F2CD48 77 50 01, EVEX_Vpermi2pd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vpermi2pd zmm18{k3},zmm14,zmm3
62 E28D4B 77 D3, EVEX_Vpermi2pd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpermi2pd zmm2{k3}{z},zmm6,zmm3
62 F2CDCB 77 D3, EVEX_Vpermi2pd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpbroadcastb xmm1,xmm5
C4E279 78 CD, VEX_Vpbroadcastb_xmm_xmmm8, VEX, AVX2, op0=w op1=r w=vmm1 r=xmm5
# vpbroadcastb xmm2,byte ptr [rax]
C4E279 78 10, VEX_Vpbroadcastb_xmm_xmmm8, VEX, AVX2, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Int8
# vpbroadcastb ymm1,xmm5
C4E27D 78 CD, VEX_Vpbroadcastb_ymm_xmmm8, VEX, AVX2, op0=w op1=r w=vmm1 r=xmm5
# vpbroadcastb ymm2,byte ptr [rax]
C4E27D 78 10, VEX_Vpbroadcastb_ymm_xmmm8, VEX, AVX2, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Int8
# vpbroadcastb xmm2,xmm3
62 F27D08 78 D3, EVEX_Vpbroadcastb_xmm_k1z_xmmm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=xmm3
# vpbroadcastb xmm2,byte ptr [rax+1]
62 F27D08 78 50 01, EVEX_Vpbroadcastb_xmm_k1z_xmmm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=rax rm=ds:rax+1;Int8
# vpbroadcastb xmm2{k3},xmm3
62 F27D0B 78 D3, EVEX_Vpbroadcastb_xmm_k1z_xmmm8, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vpbroadcastb xmm10{k3}{z},xmm19
62 327D8B 78 D3, EVEX_Vpbroadcastb_xmm_k1z_xmmm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpbroadcastb ymm2,xmm3
62 F27D28 78 D3, EVEX_Vpbroadcastb_ymm_k1z_xmmm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=xmm3
# vpbroadcastb ymm2,byte ptr [rax+1]
62 F27D28 78 50 01, EVEX_Vpbroadcastb_ymm_k1z_xmmm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=rax rm=ds:rax+1;Int8
# vpbroadcastb ymm2{k3},xmm3
62 F27D2B 78 D3, EVEX_Vpbroadcastb_ymm_k1z_xmmm8, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vpbroadcastb ymm10{k3}{z},xmm19
62 327DAB 78 D3, EVEX_Vpbroadcastb_ymm_k1z_xmmm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpbroadcastb zmm2,xmm3
62 F27D48 78 D3, EVEX_Vpbroadcastb_zmm_k1z_xmmm8, EVEX, AVX512BW, op0=w op1=r w=vmm2 r=xmm3
# vpbroadcastb zmm2,byte ptr [rax+1]
62 F27D48 78 50 01, EVEX_Vpbroadcastb_zmm_k1z_xmmm8, EVEX, AVX512BW, op0=w op1=r w=vmm2 r=rax rm=ds:rax+1;Int8
# vpbroadcastb zmm2{k3},xmm3
62 F27D4B 78 D3, EVEX_Vpbroadcastb_zmm_k1z_xmmm8, EVEX, AVX512BW, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=xmm3
# vpbroadcastb zmm10{k3}{z},xmm19
62 327DCB 78 D3, EVEX_Vpbroadcastb_zmm_k1z_xmmm8, EVEX, AVX512BW, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpbroadcastw xmm1,xmm5
C4E279 79 CD, VEX_Vpbroadcastw_xmm_xmmm16, VEX, AVX2, op0=w op1=r w=vmm1 r=xmm5
# vpbroadcastw xmm2,word ptr [rax]
C4E279 79 10, VEX_Vpbroadcastw_xmm_xmmm16, VEX, AVX2, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Int16
# vpbroadcastw ymm1,xmm5
C4E27D 79 CD, VEX_Vpbroadcastw_ymm_xmmm16, VEX, AVX2, op0=w op1=r w=vmm1 r=xmm5
# vpbroadcastw ymm2,word ptr [rax]
C4E27D 79 10, VEX_Vpbroadcastw_ymm_xmmm16, VEX, AVX2, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Int16
# vpbroadcastw xmm2,xmm3
62 F27D08 79 D3, EVEX_Vpbroadcastw_xmm_k1z_xmmm16, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=xmm3
# vpbroadcastw xmm2,word ptr [rax+2]
62 F27D08 79 50 01, EVEX_Vpbroadcastw_xmm_k1z_xmmm16, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=rax rm=ds:rax+2;Int16
# vpbroadcastw xmm2{k3},xmm3
62 F27D0B 79 D3, EVEX_Vpbroadcastw_xmm_k1z_xmmm16, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vpbroadcastw xmm10{k3}{z},xmm19
62 327D8B 79 D3, EVEX_Vpbroadcastw_xmm_k1z_xmmm16, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpbroadcastw ymm2,xmm3
62 F27D28 79 D3, EVEX_Vpbroadcastw_ymm_k1z_xmmm16, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=xmm3
# vpbroadcastw ymm2,word ptr [rax+2]
62 F27D28 79 50 01, EVEX_Vpbroadcastw_ymm_k1z_xmmm16, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=rax rm=ds:rax+2;Int16
# vpbroadcastw ymm2{k3},xmm3
62 F27D2B 79 D3, EVEX_Vpbroadcastw_ymm_k1z_xmmm16, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=xmm3
# vpbroadcastw ymm10{k3}{z},xmm19
62 327DAB 79 D3, EVEX_Vpbroadcastw_ymm_k1z_xmmm16, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpbroadcastw zmm2,xmm3
62 F27D48 79 D3, EVEX_Vpbroadcastw_zmm_k1z_xmmm16, EVEX, AVX512BW, op0=w op1=r w=vmm2 r=xmm3
# vpbroadcastw zmm2,word ptr [rax+2]
62 F27D48 79 50 01, EVEX_Vpbroadcastw_zmm_k1z_xmmm16, EVEX, AVX512BW, op0=w op1=r w=vmm2 r=rax rm=ds:rax+2;Int16
# vpbroadcastw zmm2{k3},xmm3
62 F27D4B 79 D3, EVEX_Vpbroadcastw_zmm_k1z_xmmm16, EVEX, AVX512BW, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=xmm3
# vpbroadcastw zmm10{k3}{z},xmm19
62 327DCB 79 D3, EVEX_Vpbroadcastw_zmm_k1z_xmmm16, EVEX, AVX512BW, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpbroadcastb xmm2,ebx
62 F27D08 7A D3, EVEX_Vpbroadcastb_xmm_k1z_r32, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=bl
# vpbroadcastb xmm2{k3},esp
62 F27D0B 7A D4, EVEX_Vpbroadcastb_xmm_k1z_r32, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=spl
# vpbroadcastb xmm18{k3}{z},r11d
62 C27D8B 7A D3, EVEX_Vpbroadcastb_xmm_k1z_r32, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm18 r=k3 r=r11l
# vpbroadcastb ymm2,ebx
62 F27D28 7A D3, EVEX_Vpbroadcastb_ymm_k1z_r32, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=bl
# vpbroadcastb ymm2{k3},esp
62 F27D2B 7A D4, EVEX_Vpbroadcastb_ymm_k1z_r32, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=spl
# vpbroadcastb ymm18{k3}{z},r11d
62 C27DAB 7A D3, EVEX_Vpbroadcastb_ymm_k1z_r32, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm18 r=k3 r=r11l
# vpbroadcastb zmm2,ebx
62 F27D48 7A D3, EVEX_Vpbroadcastb_zmm_k1z_r32, EVEX, AVX512BW, op0=w op1=r w=vmm2 r=bl
# vpbroadcastb zmm2{k3},esp
62 F27D4B 7A D4, EVEX_Vpbroadcastb_zmm_k1z_r32, EVEX, AVX512BW, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=spl
# vpbroadcastb zmm18{k3}{z},r11d
62 C27DCB 7A D3, EVEX_Vpbroadcastb_zmm_k1z_r32, EVEX, AVX512BW, op0=w op1=r w=vmm18 r=k3 r=r11l
# vpbroadcastw xmm2,ebx
62 F27D08 7B D3, EVEX_Vpbroadcastw_xmm_k1z_r32, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=bx
# vpbroadcastw xmm2{k3},ebx
62 F27D0B 7B D3, EVEX_Vpbroadcastw_xmm_k1z_r32, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=bx
# vpbroadcastw xmm18{k3}{z},r11d
62 C27D8B 7B D3, EVEX_Vpbroadcastw_xmm_k1z_r32, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm18 r=k3 r=r11w
# vpbroadcastw ymm2,ebx
62 F27D28 7B D3, EVEX_Vpbroadcastw_ymm_k1z_r32, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm2 r=bx
# vpbroadcastw ymm2{k3},ebx
62 F27D2B 7B D3, EVEX_Vpbroadcastw_ymm_k1z_r32, EVEX, AVX512VL;AVX512BW, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=bx
# vpbroadcastw ymm18{k3}{z},r11d
62 C27DAB 7B D3, EVEX_Vpbroadcastw_ymm_k1z_r32, EVEX, AVX512VL;AVX512BW, op0=w op1=r w=vmm18 r=k3 r=r11w
# vpbroadcastw zmm2,ebx
62 F27D48 7B D3, EVEX_Vpbroadcastw_zmm_k1z_r32, EVEX, AVX512BW, op0=w op1=r w=vmm2 r=bx
# vpbroadcastw zmm2{k3},ebx
62 F27D4B 7B D3, EVEX_Vpbroadcastw_zmm_k1z_r32, EVEX, AVX512BW, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=bx
# vpbroadcastw zmm18{k3}{z},r11d
62 C27DCB 7B D3, EVEX_Vpbroadcastw_zmm_k1z_r32, EVEX, AVX512BW, op0=w op1=r w=vmm18 r=k3 r=r11w
# vpbroadcastd xmm2,ebx
62 F27D08 7C D3, EVEX_Vpbroadcastd_xmm_k1z_r32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=ebx
# vpbroadcastd xmm2{k3},ebx
62 F27D0B 7C D3, EVEX_Vpbroadcastd_xmm_k1z_r32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=ebx
# vpbroadcastd xmm18{k3}{z},r11d
62 C27D8B 7C D3, EVEX_Vpbroadcastd_xmm_k1z_r32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm18 r=k3 r=r11d
# vpbroadcastd ymm2,ebx
62 F27D28 7C D3, EVEX_Vpbroadcastd_ymm_k1z_r32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=ebx
# vpbroadcastd ymm2{k3},ebx
62 F27D2B 7C D3, EVEX_Vpbroadcastd_ymm_k1z_r32, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ebx
# vpbroadcastd ymm18{k3}{z},r11d
62 C27DAB 7C D3, EVEX_Vpbroadcastd_ymm_k1z_r32, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm18 r=k3 r=r11d
# vpbroadcastd zmm2,ebx
62 F27D48 7C D3, EVEX_Vpbroadcastd_zmm_k1z_r32, EVEX, AVX512F, op0=w op1=r w=vmm2 r=ebx
# vpbroadcastd zmm2{k3},ebx
62 F27D4B 7C D3, EVEX_Vpbroadcastd_zmm_k1z_r32, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=ebx
# vpbroadcastd zmm18{k3}{z},r11d
62 C27DCB 7C D3, EVEX_Vpbroadcastd_zmm_k1z_r32, EVEX, AVX512F, op0=w op1=r w=vmm18 r=k3 r=r11d
# vpbroadcastq xmm2,rbx
62 F2FD08 7C D3, EVEX_Vpbroadcastq_xmm_k1z_r64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rbx
# vpbroadcastq xmm2{k3},rbx
62 F2FD0B 7C D3, EVEX_Vpbroadcastq_xmm_k1z_r64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=rbx
# vpbroadcastq xmm18{k3}{z},r11
62 C2FD8B 7C D3, EVEX_Vpbroadcastq_xmm_k1z_r64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm18 r=k3 r=r11
# vpbroadcastq ymm2,rbx
62 F2FD28 7C D3, EVEX_Vpbroadcastq_ymm_k1z_r64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rbx
# vpbroadcastq ymm2{k3},rbx
62 F2FD2B 7C D3, EVEX_Vpbroadcastq_ymm_k1z_r64, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=rbx
# vpbroadcastq ymm18{k3}{z},r11
62 C2FDAB 7C D3, EVEX_Vpbroadcastq_ymm_k1z_r64, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm18 r=k3 r=r11
# vpbroadcastq zmm2,rbx
62 F2FD48 7C D3, EVEX_Vpbroadcastq_zmm_k1z_r64, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rbx
# vpbroadcastq zmm2{k3},rbx
62 F2FD4B 7C D3, EVEX_Vpbroadcastq_zmm_k1z_r64, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=rbx
# vpbroadcastq zmm18{k3}{z},r11
62 C2FDCB 7C D3, EVEX_Vpbroadcastq_zmm_k1z_r64, EVEX, AVX512F, op0=w op1=r w=vmm18 r=k3 r=r11
# vpermt2b xmm2,xmm6,[rax+10h]
62 F24D08 7D 50 01, EVEX_Vpermt2b_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512_VBMI, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vpermt2b xmm2{k3},xmm6,xmm3
62 F24D0B 7D D3, EVEX_Vpermt2b_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512_VBMI, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpermt2b xmm18{k3}{z},xmm14,xmm3
62 E20D8B 7D D3, EVEX_Vpermt2b_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512_VBMI, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpermt2b ymm2,ymm6,[rax+20h]
62 F24D28 7D 50 01, EVEX_Vpermt2b_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512_VBMI, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vpermt2b ymm2{k3},ymm6,ymm3
62 F24D2B 7D D3, EVEX_Vpermt2b_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512_VBMI, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpermt2b ymm18{k3}{z},ymm14,ymm3
62 E20DAB 7D D3, EVEX_Vpermt2b_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512_VBMI, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpermt2b zmm2,zmm6,[rax+40h]
62 F24D48 7D 50 01, EVEX_Vpermt2b_zmm_k1z_zmm_zmmm512, EVEX, AVX512_VBMI, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vpermt2b zmm2{k3},zmm6,zmm3
62 F24D4B 7D D3, EVEX_Vpermt2b_zmm_k1z_zmm_zmmm512, EVEX, AVX512_VBMI, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpermt2b zmm18{k3}{z},zmm14,zmm3
62 E20DCB 7D D3, EVEX_Vpermt2b_zmm_k1z_zmm_zmmm512, EVEX, AVX512_VBMI, op0=rw op1=r op2=r w=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpermt2w xmm2,xmm6,[rax+10h]
62 F2CD08 7D 50 01, EVEX_Vpermt2w_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpermt2w xmm2{k3},xmm6,xmm3
62 F2CD0B 7D D3, EVEX_Vpermt2w_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpermt2w xmm18{k3}{z},xmm14,xmm3
62 E28D8B 7D D3, EVEX_Vpermt2w_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpermt2w ymm2,ymm6,[rax+20h]
62 F2CD28 7D 50 01, EVEX_Vpermt2w_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpermt2w ymm2{k3},ymm6,ymm3
62 F2CD2B 7D D3, EVEX_Vpermt2w_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpermt2w ymm18{k3}{z},ymm14,ymm3
62 E28DAB 7D D3, EVEX_Vpermt2w_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpermt2w zmm2,zmm6,[rax+40h]
62 F2CD48 7D 50 01, EVEX_Vpermt2w_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpermt2w zmm2{k3},zmm6,zmm3
62 F2CD4B 7D D3, EVEX_Vpermt2w_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpermt2w zmm18{k3}{z},zmm14,zmm3
62 E28DCB 7D D3, EVEX_Vpermt2w_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rw op1=r op2=r w=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpermt2d xmm2,xmm6,[rax+10h]
62 F24D08 7E 50 01, EVEX_Vpermt2d_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpermt2d xmm18{k3},xmm14,xmm3
62 E20D0B 7E D3, EVEX_Vpermt2d_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpermt2d xmm2{k3}{z},xmm6,xmm3
62 F24D8B 7E D3, EVEX_Vpermt2d_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpermt2d ymm2,ymm6,[rax+20h]
62 F24D28 7E 50 01, EVEX_Vpermt2d_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpermt2d ymm18{k3},ymm14,ymm3
62 E20D2B 7E D3, EVEX_Vpermt2d_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpermt2d ymm2{k3}{z},ymm6,ymm3
62 F24DAB 7E D3, EVEX_Vpermt2d_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpermt2d zmm2,zmm6,[rax+40h]
62 F24D48 7E 50 01, EVEX_Vpermt2d_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpermt2d zmm18{k3},zmm14,zmm3
62 E20D4B 7E D3, EVEX_Vpermt2d_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpermt2d zmm2{k3}{z},zmm6,zmm3
62 F24DCB 7E D3, EVEX_Vpermt2d_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpermt2q xmm2,xmm6,[rax+10h]
62 F2CD08 7E 50 01, EVEX_Vpermt2q_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpermt2q xmm18{k3},xmm14,xmm3
62 E28D0B 7E D3, EVEX_Vpermt2q_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpermt2q xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 7E D3, EVEX_Vpermt2q_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpermt2q ymm2,ymm6,[rax+20h]
62 F2CD28 7E 50 01, EVEX_Vpermt2q_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpermt2q ymm18{k3},ymm14,ymm3
62 E28D2B 7E D3, EVEX_Vpermt2q_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpermt2q ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 7E D3, EVEX_Vpermt2q_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpermt2q zmm2,zmm6,[rax+40h]
62 F2CD48 7E 50 01, EVEX_Vpermt2q_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpermt2q zmm18{k3},zmm14,zmm3
62 E28D4B 7E D3, EVEX_Vpermt2q_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpermt2q zmm2{k3}{z},zmm6,zmm3
62 F2CDCB 7E D3, EVEX_Vpermt2q_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpermt2ps xmm2,xmm6,[rax+10h]
62 F24D08 7F 50 01, EVEX_Vpermt2ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vpermt2ps xmm18{k3},xmm14,xmm3
62 E20D0B 7F D3, EVEX_Vpermt2ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpermt2ps xmm2{k3}{z},xmm6,xmm3
62 F24D8B 7F D3, EVEX_Vpermt2ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpermt2ps ymm2,ymm6,[rax+20h]
62 F24D28 7F 50 01, EVEX_Vpermt2ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vpermt2ps ymm18{k3},ymm14,ymm3
62 E20D2B 7F D3, EVEX_Vpermt2ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpermt2ps ymm2{k3}{z},ymm6,ymm3
62 F24DAB 7F D3, EVEX_Vpermt2ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpermt2ps zmm2,zmm6,[rax+40h]
62 F24D48 7F 50 01, EVEX_Vpermt2ps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vpermt2ps zmm18{k3},zmm14,zmm3
62 E20D4B 7F D3, EVEX_Vpermt2ps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpermt2ps zmm2{k3}{z},zmm6,zmm3
62 F24DCB 7F D3, EVEX_Vpermt2ps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpermt2pd xmm2,xmm6,[rax+10h]
62 F2CD08 7F 50 01, EVEX_Vpermt2pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vpermt2pd xmm18{k3},xmm14,xmm3
62 E28D0B 7F D3, EVEX_Vpermt2pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpermt2pd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 7F D3, EVEX_Vpermt2pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpermt2pd ymm2,ymm6,[rax+20h]
62 F2CD28 7F 50 01, EVEX_Vpermt2pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vpermt2pd ymm18{k3},ymm14,ymm3
62 E28D2B 7F D3, EVEX_Vpermt2pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpermt2pd ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 7F D3, EVEX_Vpermt2pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpermt2pd zmm2,zmm6,[rax+40h]
62 F2CD48 7F 50 01, EVEX_Vpermt2pd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vpermt2pd zmm18{k3},zmm14,zmm3
62 E28D4B 7F D3, EVEX_Vpermt2pd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpermt2pd zmm2{k3}{z},zmm6,zmm3
62 F2CDCB 7F D3, EVEX_Vpermt2pd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# invept rdx,oword ptr [rax]
66 0F3880 10, Invept_r64_m128, Legacy, VMX;INVEPT, fw=cz fc=aops priv op0=r op1=r r=rdx r=rax rm=ds:rax;UInt128
# invvpid rdx,oword ptr [rax]
66 0F3881 10, Invvpid_r64_m128, Legacy, VMX;INVVPID, fw=cz fc=aops priv op0=r op1=r r=rdx r=rax rm=ds:rax;UInt128
# invpcid rdx,oword ptr [rax]
66 0F3882 10, Invpcid_r64_m128, Legacy, INVPCID, priv op0=r op1=r r=rdx r=rax rm=ds:rax;UInt128
# vpmultishiftqb xmm2,xmm6,[rax+10h]
62 F2CD08 83 50 01, EVEX_Vpmultishiftqb_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512_VBMI, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpmultishiftqb xmm18{k3},xmm14,xmm3
62 E28D0B 83 D3, EVEX_Vpmultishiftqb_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512_VBMI, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpmultishiftqb xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 83 D3, EVEX_Vpmultishiftqb_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512_VBMI, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vpmultishiftqb ymm2,ymm6,[rax+20h]
62 F2CD28 83 50 01, EVEX_Vpmultishiftqb_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512_VBMI, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpmultishiftqb ymm18{k3},ymm14,ymm3
62 E28D2B 83 D3, EVEX_Vpmultishiftqb_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512_VBMI, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpmultishiftqb ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 83 D3, EVEX_Vpmultishiftqb_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512_VBMI, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vpmultishiftqb zmm2,zmm6,[rax+40h]
62 F2CD48 83 50 01, EVEX_Vpmultishiftqb_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512_VBMI, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpmultishiftqb zmm18{k3},zmm14,zmm3
62 E28D4B 83 D3, EVEX_Vpmultishiftqb_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512_VBMI, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpmultishiftqb zmm2{k3}{z},zmm6,zmm3
62 F2CDCB 83 D3, EVEX_Vpmultishiftqb_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512_VBMI, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vexpandps xmm2,xmm3
62 F27D08 88 D3, EVEX_Vexpandps_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vexpandps xmm2,[rax+4]
62 F27D08 88 50 01, EVEX_Vexpandps_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+4;Packed128_Float32
# vexpandps xmm2{k3},xmm3
62 F27D0B 88 D3, EVEX_Vexpandps_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vexpandps xmm10{k3}{z},xmm19
62 327D8B 88 D3, EVEX_Vexpandps_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vexpandps ymm2,ymm3
62 F27D28 88 D3, EVEX_Vexpandps_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=ymm3
# vexpandps ymm2,[rax+4]
62 F27D28 88 50 01, EVEX_Vexpandps_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+4;Packed256_Float32
# vexpandps ymm2{k3},ymm3
62 F27D2B 88 D3, EVEX_Vexpandps_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vexpandps ymm10{k3}{z},ymm19
62 327DAB 88 D3, EVEX_Vexpandps_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=ymm19
# vexpandps zmm2,zmm3
62 F27D48 88 D3, EVEX_Vexpandps_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=zmm3
# vexpandps zmm2,[rax+4]
62 F27D48 88 50 01, EVEX_Vexpandps_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+4;Packed512_Float32
# vexpandps zmm2{k3},zmm3
62 F27D4B 88 D3, EVEX_Vexpandps_zmm_k1z_zmmm512, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vexpandps zmm10{k3}{z},zmm19
62 327DCB 88 D3, EVEX_Vexpandps_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=zmm19
# vexpandpd xmm2,xmm3
62 F2FD08 88 D3, EVEX_Vexpandpd_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vexpandpd xmm2,[rax+8]
62 F2FD08 88 50 01, EVEX_Vexpandpd_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed128_Float64
# vexpandpd xmm2{k3},xmm3
62 F2FD0B 88 D3, EVEX_Vexpandpd_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vexpandpd xmm10{k3}{z},xmm19
62 32FD8B 88 D3, EVEX_Vexpandpd_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vexpandpd ymm2,ymm3
62 F2FD28 88 D3, EVEX_Vexpandpd_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=ymm3
# vexpandpd ymm2,[rax+8]
62 F2FD28 88 50 01, EVEX_Vexpandpd_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed256_Float64
# vexpandpd ymm2{k3},ymm3
62 F2FD2B 88 D3, EVEX_Vexpandpd_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vexpandpd ymm10{k3}{z},ymm19
62 32FDAB 88 D3, EVEX_Vexpandpd_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=ymm19
# vexpandpd zmm2,zmm3
62 F2FD48 88 D3, EVEX_Vexpandpd_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=zmm3
# vexpandpd zmm2,[rax+8]
62 F2FD48 88 50 01, EVEX_Vexpandpd_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed512_Float64
# vexpandpd zmm2{k3},zmm3
62 F2FD4B 88 D3, EVEX_Vexpandpd_zmm_k1z_zmmm512, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vexpandpd zmm10{k3}{z},zmm19
62 32FDCB 88 D3, EVEX_Vexpandpd_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=zmm19
# vpexpandd xmm2,xmm3
62 F27D08 89 D3, EVEX_Vpexpandd_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpexpandd xmm2,[rax+4]
62 F27D08 89 50 01, EVEX_Vpexpandd_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+4;Packed128_UInt32
# vpexpandd xmm2{k3},xmm3
62 F27D0B 89 D3, EVEX_Vpexpandd_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vpexpandd xmm10{k3}{z},xmm19
62 327D8B 89 D3, EVEX_Vpexpandd_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpexpandd ymm2,ymm3
62 F27D28 89 D3, EVEX_Vpexpandd_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=ymm3
# vpexpandd ymm2,[rax+4]
62 F27D28 89 50 01, EVEX_Vpexpandd_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+4;Packed256_UInt32
# vpexpandd ymm2{k3},ymm3
62 F27D2B 89 D3, EVEX_Vpexpandd_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vpexpandd ymm10{k3}{z},ymm19
62 327DAB 89 D3, EVEX_Vpexpandd_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=ymm19
# vpexpandd zmm2,zmm3
62 F27D48 89 D3, EVEX_Vpexpandd_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=zmm3
# vpexpandd zmm2,[rax+4]
62 F27D48 89 50 01, EVEX_Vpexpandd_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+4;Packed512_UInt32
# vpexpandd zmm2{k3},zmm3
62 F27D4B 89 D3, EVEX_Vpexpandd_zmm_k1z_zmmm512, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vpexpandd zmm10{k3}{z},zmm19
62 327DCB 89 D3, EVEX_Vpexpandd_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=zmm19
# vpexpandq xmm2,xmm3
62 F2FD08 89 D3, EVEX_Vpexpandq_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=xmm3
# vpexpandq xmm2,[rax+8]
62 F2FD08 89 50 01, EVEX_Vpexpandq_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed128_UInt64
# vpexpandq xmm2{k3},xmm3
62 F2FD0B 89 D3, EVEX_Vpexpandq_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vpexpandq xmm10{k3}{z},xmm19
62 32FD8B 89 D3, EVEX_Vpexpandq_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=xmm19
# vpexpandq ymm2,ymm3
62 F2FD28 89 D3, EVEX_Vpexpandq_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=ymm3
# vpexpandq ymm2,[rax+8]
62 F2FD28 89 50 01, EVEX_Vpexpandq_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed256_UInt64
# vpexpandq ymm2{k3},ymm3
62 F2FD2B 89 D3, EVEX_Vpexpandq_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vpexpandq ymm10{k3}{z},ymm19
62 32FDAB 89 D3, EVEX_Vpexpandq_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm10 r=k3 r=ymm19
# vpexpandq zmm2,zmm3
62 F2FD48 89 D3, EVEX_Vpexpandq_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=zmm3
# vpexpandq zmm2,[rax+8]
62 F2FD48 89 50 01, EVEX_Vpexpandq_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm2 r=rax rm=ds:rax+8;Packed512_UInt64
# vpexpandq zmm2{k3},zmm3
62 F2FD4B 89 D3, EVEX_Vpexpandq_zmm_k1z_zmmm512, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vpexpandq zmm10{k3}{z},zmm19
62 32FDCB 89 D3, EVEX_Vpexpandq_zmm_k1z_zmmm512, EVEX, AVX512F, op0=w op1=r w=vmm10 r=k3 r=zmm19
# vcompressps xmm3,xmm2
62 F27D08 8A D3, EVEX_Vcompressps_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vcompressps [rax+4],xmm2
62 F27D08 8A 50 01, EVEX_Vcompressps_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+4;Packed128_Float32
# vcompressps xmm3{k3},xmm2
62 F27D0B 8A D3, EVEX_Vcompressps_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vcompressps xmm19{k3},xmm10
62 327D0B 8A D3, EVEX_Vcompressps_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r r=xmm19 w=vmm19 r=k3 r=xmm10
# vcompressps xmm19{k3}{z},xmm10
62 327D8B 8A D3, EVEX_Vcompressps_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm19 r=k3 r=xmm10
# vcompressps ymm3,ymm2
62 F27D28 8A D3, EVEX_Vcompressps_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vcompressps [rax+4],ymm2
62 F27D28 8A 50 01, EVEX_Vcompressps_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+4;Packed256_Float32
# vcompressps ymm3{k3},ymm2
62 F27D2B 8A D3, EVEX_Vcompressps_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=ymm3 r=k3 r=ymm2
# vcompressps ymm19{k3},ymm10
62 327D2B 8A D3, EVEX_Vcompressps_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r r=ymm19 w=vmm19 r=k3 r=ymm10
# vcompressps ymm19{k3}{z},ymm10
62 327DAB 8A D3, EVEX_Vcompressps_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm19 r=k3 r=ymm10
# vcompressps zmm3,zmm2
62 F27D48 8A D3, EVEX_Vcompressps_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vcompressps [rax+4],zmm2
62 F27D48 8A 50 01, EVEX_Vcompressps_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+4;Packed512_Float32
# vcompressps zmm3{k3},zmm2
62 F27D4B 8A D3, EVEX_Vcompressps_zmmm512_k1z_zmm, EVEX, AVX512F, op0=rcw op1=r cw=vmm3 r=zmm3 r=k3 r=zmm2
# vcompressps zmm19{k3},zmm10
62 327D4B 8A D3, EVEX_Vcompressps_zmmm512_k1z_zmm, EVEX, AVX512F, op0=rcw op1=r r=zmm19 cw=vmm19 r=k3 r=zmm10
# vcompressps zmm19{k3}{z},zmm10
62 327DCB 8A D3, EVEX_Vcompressps_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm19 r=k3 r=zmm10
# vcompresspd xmm3,xmm2
62 F2FD08 8A D3, EVEX_Vcompresspd_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vcompresspd [rax+8],xmm2
62 F2FD08 8A 50 01, EVEX_Vcompresspd_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+8;Packed128_Float64
# vcompresspd xmm3{k3},xmm2
62 F2FD0B 8A D3, EVEX_Vcompresspd_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vcompresspd xmm19{k3},xmm10
62 32FD0B 8A D3, EVEX_Vcompresspd_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r r=xmm19 w=vmm19 r=k3 r=xmm10
# vcompresspd xmm19{k3}{z},xmm10
62 32FD8B 8A D3, EVEX_Vcompresspd_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm19 r=k3 r=xmm10
# vcompresspd ymm3,ymm2
62 F2FD28 8A D3, EVEX_Vcompresspd_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vcompresspd [rax+8],ymm2
62 F2FD28 8A 50 01, EVEX_Vcompresspd_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+8;Packed256_Float64
# vcompresspd ymm3{k3},ymm2
62 F2FD2B 8A D3, EVEX_Vcompresspd_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=ymm3 r=k3 r=ymm2
# vcompresspd ymm19{k3},ymm10
62 32FD2B 8A D3, EVEX_Vcompresspd_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r r=ymm19 w=vmm19 r=k3 r=ymm10
# vcompresspd ymm19{k3}{z},ymm10
62 32FDAB 8A D3, EVEX_Vcompresspd_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm19 r=k3 r=ymm10
# vcompresspd zmm3,zmm2
62 F2FD48 8A D3, EVEX_Vcompresspd_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vcompresspd [rax+8],zmm2
62 F2FD48 8A 50 01, EVEX_Vcompresspd_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+8;Packed512_Float64
# vcompresspd zmm3{k3},zmm2
62 F2FD4B 8A D3, EVEX_Vcompresspd_zmmm512_k1z_zmm, EVEX, AVX512F, op0=rcw op1=r cw=vmm3 r=zmm3 r=k3 r=zmm2
# vcompresspd zmm19{k3},zmm10
62 32FD4B 8A D3, EVEX_Vcompresspd_zmmm512_k1z_zmm, EVEX, AVX512F, op0=rcw op1=r r=zmm19 cw=vmm19 r=k3 r=zmm10
# vcompresspd zmm19{k3}{z},zmm10
62 32FDCB 8A D3, EVEX_Vcompresspd_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm19 r=k3 r=zmm10
# vpcompressd xmm3,xmm2
62 F27D08 8B D3, EVEX_Vpcompressd_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vpcompressd [rax+4],xmm2
62 F27D08 8B 50 01, EVEX_Vpcompressd_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+4;Packed128_UInt32
# vpcompressd xmm3{k3},xmm2
62 F27D0B 8B D3, EVEX_Vpcompressd_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vpcompressd xmm19{k3},xmm10
62 327D0B 8B D3, EVEX_Vpcompressd_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r r=xmm19 w=vmm19 r=k3 r=xmm10
# vpcompressd xmm19{k3}{z},xmm10
62 327D8B 8B D3, EVEX_Vpcompressd_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm19 r=k3 r=xmm10
# vpcompressd ymm3,ymm2
62 F27D28 8B D3, EVEX_Vpcompressd_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vpcompressd [rax+4],ymm2
62 F27D28 8B 50 01, EVEX_Vpcompressd_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+4;Packed256_UInt32
# vpcompressd ymm3{k3},ymm2
62 F27D2B 8B D3, EVEX_Vpcompressd_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=ymm3 r=k3 r=ymm2
# vpcompressd ymm19{k3},ymm10
62 327D2B 8B D3, EVEX_Vpcompressd_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r r=ymm19 w=vmm19 r=k3 r=ymm10
# vpcompressd ymm19{k3}{z},ymm10
62 327DAB 8B D3, EVEX_Vpcompressd_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm19 r=k3 r=ymm10
# vpcompressd zmm3,zmm2
62 F27D48 8B D3, EVEX_Vpcompressd_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vpcompressd [rax+4],zmm2
62 F27D48 8B 50 01, EVEX_Vpcompressd_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+4;Packed512_UInt32
# vpcompressd zmm3{k3},zmm2
62 F27D4B 8B D3, EVEX_Vpcompressd_zmmm512_k1z_zmm, EVEX, AVX512F, op0=rcw op1=r cw=vmm3 r=zmm3 r=k3 r=zmm2
# vpcompressd zmm19{k3},zmm10
62 327D4B 8B D3, EVEX_Vpcompressd_zmmm512_k1z_zmm, EVEX, AVX512F, op0=rcw op1=r r=zmm19 cw=vmm19 r=k3 r=zmm10
# vpcompressd zmm19{k3}{z},zmm10
62 327DCB 8B D3, EVEX_Vpcompressd_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm19 r=k3 r=zmm10
# vpcompressq xmm3,xmm2
62 F2FD08 8B D3, EVEX_Vpcompressq_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=xmm2
# vpcompressq [rax+8],xmm2
62 F2FD08 8B 50 01, EVEX_Vpcompressq_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=xmm2 wm=ds:rax+8;Packed128_UInt64
# vpcompressq xmm3{k3},xmm2
62 F2FD0B 8B D3, EVEX_Vpcompressq_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=xmm3 r=k3 r=xmm2
# vpcompressq xmm19{k3},xmm10
62 32FD0B 8B D3, EVEX_Vpcompressq_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=rw op1=r r=xmm19 w=vmm19 r=k3 r=xmm10
# vpcompressq xmm19{k3}{z},xmm10
62 32FD8B 8B D3, EVEX_Vpcompressq_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm19 r=k3 r=xmm10
# vpcompressq ymm3,ymm2
62 F2FD28 8B D3, EVEX_Vpcompressq_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm3 r=ymm2
# vpcompressq [rax+8],ymm2
62 F2FD28 8B 50 01, EVEX_Vpcompressq_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r r=rax r=ymm2 wm=ds:rax+8;Packed256_UInt64
# vpcompressq ymm3{k3},ymm2
62 F2FD2B 8B D3, EVEX_Vpcompressq_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm3 r=ymm3 r=k3 r=ymm2
# vpcompressq ymm19{k3},ymm10
62 32FD2B 8B D3, EVEX_Vpcompressq_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=rw op1=r r=ymm19 w=vmm19 r=k3 r=ymm10
# vpcompressq ymm19{k3}{z},ymm10
62 32FDAB 8B D3, EVEX_Vpcompressq_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512F, op0=w op1=r w=vmm19 r=k3 r=ymm10
# vpcompressq zmm3,zmm2
62 F2FD48 8B D3, EVEX_Vpcompressq_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm3 r=zmm2
# vpcompressq [rax+8],zmm2
62 F2FD48 8B 50 01, EVEX_Vpcompressq_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r r=rax r=zmm2 wm=ds:rax+8;Packed512_UInt64
# vpcompressq zmm3{k3},zmm2
62 F2FD4B 8B D3, EVEX_Vpcompressq_zmmm512_k1z_zmm, EVEX, AVX512F, op0=rcw op1=r cw=vmm3 r=zmm3 r=k3 r=zmm2
# vpcompressq zmm19{k3},zmm10
62 32FD4B 8B D3, EVEX_Vpcompressq_zmmm512_k1z_zmm, EVEX, AVX512F, op0=rcw op1=r r=zmm19 cw=vmm19 r=k3 r=zmm10
# vpcompressq zmm19{k3}{z},zmm10
62 32FDCB 8B D3, EVEX_Vpcompressq_zmmm512_k1z_zmm, EVEX, AVX512F, op0=w op1=r w=vmm19 r=k3 r=zmm10
# vpmaskmovd xmm2,xmm6,[rax]
C4E249 8C 10, VEX_Vpmaskmovd_xmm_xmm_m128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt32
# vpmaskmovd ymm2,ymm6,[rax]
C4E24D 8C 10, VEX_Vpmaskmovd_ymm_ymm_m256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt32
# vpmaskmovq xmm2,xmm6,[rax]
C4E2C9 8C 10, VEX_Vpmaskmovq_xmm_xmm_m128, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt64
# vpmaskmovq ymm2,ymm6,[rax]
C4E2CD 8C 10, VEX_Vpmaskmovq_ymm_ymm_m256, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt64
# vpermb xmm2,xmm6,[rax+10h]
62 F24D08 8D 50 01, EVEX_Vpermb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512_VBMI, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vpermb xmm2{k3},xmm6,xmm3
62 F24D0B 8D D3, EVEX_Vpermb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512_VBMI, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpermb xmm18{k3}{z},xmm14,xmm3
62 E20D8B 8D D3, EVEX_Vpermb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512_VBMI, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpermb ymm2,ymm6,[rax+20h]
62 F24D28 8D 50 01, EVEX_Vpermb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512_VBMI, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vpermb ymm2{k3},ymm6,ymm3
62 F24D2B 8D D3, EVEX_Vpermb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512_VBMI, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpermb ymm18{k3}{z},ymm14,ymm3
62 E20DAB 8D D3, EVEX_Vpermb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512_VBMI, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpermb zmm2,zmm6,[rax+40h]
62 F24D48 8D 50 01, EVEX_Vpermb_zmm_k1z_zmm_zmmm512, EVEX, AVX512_VBMI, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vpermb zmm2{k3},zmm6,zmm3
62 F24D4B 8D D3, EVEX_Vpermb_zmm_k1z_zmm_zmmm512, EVEX, AVX512_VBMI, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpermb zmm18{k3}{z},zmm14,zmm3
62 E20DCB 8D D3, EVEX_Vpermb_zmm_k1z_zmm_zmmm512, EVEX, AVX512_VBMI, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# vpermw xmm2,xmm6,[rax+10h]
62 F2CD08 8D 50 01, EVEX_Vpermw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpermw xmm2{k3},xmm6,xmm3
62 F2CD0B 8D D3, EVEX_Vpermw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpermw xmm18{k3}{z},xmm14,xmm3
62 E28D8B 8D D3, EVEX_Vpermw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpermw ymm2,ymm6,[rax+20h]
62 F2CD28 8D 50 01, EVEX_Vpermw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpermw ymm2{k3},ymm6,ymm3
62 F2CD2B 8D D3, EVEX_Vpermw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpermw ymm18{k3}{z},ymm14,ymm3
62 E28DAB 8D D3, EVEX_Vpermw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpermw zmm2,zmm6,[rax+40h]
62 F2CD48 8D 50 01, EVEX_Vpermw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpermw zmm2{k3},zmm6,zmm3
62 F2CD4B 8D D3, EVEX_Vpermw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpermw zmm18{k3}{z},zmm14,zmm3
62 E28DCB 8D D3, EVEX_Vpermw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=r op2=r w=vmm18 r=k3 r=zmm14 r=zmm3
# vpmaskmovd [rax],xmm6,xmm2
C4E249 8E 10, VEX_Vpmaskmovd_m128_xmm_xmm, VEX, AVX2, op0=w op1=r op2=r r=rax r=xmm6 r=xmm2 wm=ds:rax;Packed128_UInt32
# vpmaskmovd [rax],ymm6,ymm2
C4E24D 8E 10, VEX_Vpmaskmovd_m256_ymm_ymm, VEX, AVX2, op0=w op1=r op2=r r=rax r=ymm6 r=ymm2 wm=ds:rax;Packed256_UInt32
# vpmaskmovq [rax],xmm6,xmm2
C4E2C9 8E 10, VEX_Vpmaskmovq_m128_xmm_xmm, VEX, AVX2, op0=w op1=r op2=r r=rax r=xmm6 r=xmm2 wm=ds:rax;Packed128_UInt64
# vpmaskmovq [rax],ymm6,ymm2
C4E2CD 8E 10, VEX_Vpmaskmovq_m256_ymm_ymm, VEX, AVX2, op0=w op1=r op2=r r=rax r=ymm6 r=ymm2 wm=ds:rax;Packed256_UInt64
# vpgatherdd xmm2,[rcx+xmm4*4+1],xmm6
C4E249 90 54 A1 01, VEX_Vpgatherdd_xmm_vm32x_xmm, VEX, AVX2, op0=rw op1=r op2=rw w=vmm2 r=xmm2 r=rcx r=xmm4 w=vmm6 r=xmm6 rm=ds:rcx+xmm4*4+1|vsib32;Int32
# vpgatherdd ymm2,[rcx+ymm4*4+1],ymm6
C4E24D 90 54 A1 01, VEX_Vpgatherdd_ymm_vm32y_ymm, VEX, AVX2, op0=rw op1=r op2=rw w=vmm2 r=ymm2 r=rcx r=ymm4 w=vmm6 r=ymm6 rm=ds:rcx+ymm4*4+1|vsib32;Int32
# vpgatherdq xmm2,[rcx+xmm4*4+1],xmm6
C4E2C9 90 54 A1 01, VEX_Vpgatherdq_xmm_vm32x_xmm, VEX, AVX2, op0=rw op1=r op2=rw w=vmm2 r=xmm2 r=rcx r=xmm4 w=vmm6 r=xmm6 rm=ds:rcx+xmm4*4+1|vsib32;Int64
# vpgatherdq ymm2,[rcx+xmm4*4+1],ymm6
C4E2CD 90 54 A1 01, VEX_Vpgatherdq_ymm_vm32x_ymm, VEX, AVX2, op0=rw op1=r op2=rw w=vmm2 r=ymm2 r=rcx r=xmm4 w=vmm6 r=ymm6 rm=ds:rcx+xmm4*4+1|vsib32;Int64
# vpgatherdd xmm2{k3},[rcx+xmm4*4+4]
62 F27D0B 90 54 A1 01, EVEX_Vpgatherdd_xmm_k1_vm32x, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 rw=k3 r=rcx r=xmm4 rm=ds:rcx+xmm4*4+4|vsib32;Int32
# vpgatherdd ymm2{k3},[rcx+ymm4*4+4]
62 F27D2B 90 54 A1 01, EVEX_Vpgatherdd_ymm_k1_vm32y, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 rw=k3 r=rcx r=ymm4 rm=ds:rcx+ymm4*4+4|vsib32;Int32
# vpgatherdd zmm2{k3},[rcx+zmm4*4+4]
62 F27D4B 90 54 A1 01, EVEX_Vpgatherdd_zmm_k1_vm32z, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 rw=k3 r=rcx r=zmm4 rm=ds:rcx+zmm4*4+4|vsib32;Int32
# vpgatherdq xmm2{k3},[rcx+xmm4*4+8]
62 F2FD0B 90 54 A1 01, EVEX_Vpgatherdq_xmm_k1_vm32x, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 rw=k3 r=rcx r=xmm4 rm=ds:rcx+xmm4*4+8|vsib32;Int64
# vpgatherdq ymm2{k3},[rcx+xmm4*4+8]
62 F2FD2B 90 54 A1 01, EVEX_Vpgatherdq_ymm_k1_vm32x, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 rw=k3 r=rcx r=xmm4 rm=ds:rcx+xmm4*4+8|vsib32;Int64
# vpgatherdq zmm2{k3},[rcx+ymm4*4+8]
62 F2FD4B 90 54 A1 01, EVEX_Vpgatherdq_zmm_k1_vm32y, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 rw=k3 r=rcx r=ymm4 rm=ds:rcx+ymm4*4+8|vsib32;Int64
# vpgatherqd xmm2,[rcx+xmm4*4+1],xmm6
C4E249 91 54 A1 01, VEX_Vpgatherqd_xmm_vm64x_xmm, VEX, AVX2, op0=rw op1=r op2=rw w=vmm2 r=xmm2 r=rcx r=xmm4 w=vmm6 r=xmm6 rm=ds:rcx+xmm4*4+1|vsib64;Int32
# vpgatherqd xmm2,[rcx+ymm4*4+1],xmm6
C4E24D 91 54 A1 01, VEX_Vpgatherqd_xmm_vm64y_xmm, VEX, AVX2, op0=rw op1=r op2=rw w=vmm2 r=xmm2 r=rcx r=ymm4 w=vmm6 r=xmm6 rm=ds:rcx+ymm4*4+1|vsib64;Int32
# vpgatherqq xmm2,[rcx+xmm4*4+1],xmm6
C4E2C9 91 54 A1 01, VEX_Vpgatherqq_xmm_vm64x_xmm, VEX, AVX2, op0=rw op1=r op2=rw w=vmm2 r=xmm2 r=rcx r=xmm4 w=vmm6 r=xmm6 rm=ds:rcx+xmm4*4+1|vsib64;Int64
# vpgatherqq ymm2,[rcx+ymm4*4+1],ymm6
C4E2CD 91 54 A1 01, VEX_Vpgatherqq_ymm_vm64y_ymm, VEX, AVX2, op0=rw op1=r op2=rw w=vmm2 r=ymm2 r=rcx r=ymm4 w=vmm6 r=ymm6 rm=ds:rcx+ymm4*4+1|vsib64;Int64
# vpgatherqd xmm2{k3},[rcx+xmm4*4+4]
62 F27D0B 91 54 A1 01, EVEX_Vpgatherqd_xmm_k1_vm64x, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 rw=k3 r=rcx r=xmm4 rm=ds:rcx+xmm4*4+4|vsib64;Int32
# vpgatherqd xmm2{k3},[rcx+ymm4*4+4]
62 F27D2B 91 54 A1 01, EVEX_Vpgatherqd_xmm_k1_vm64y, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 rw=k3 r=rcx r=ymm4 rm=ds:rcx+ymm4*4+4|vsib64;Int32
# vpgatherqd ymm2{k3},[rcx+zmm4*4+4]
62 F27D4B 91 54 A1 01, EVEX_Vpgatherqd_ymm_k1_vm64z, EVEX, AVX512F, op0=rw op1=r w=vmm2 r=ymm2 rw=k3 r=rcx r=zmm4 rm=ds:rcx+zmm4*4+4|vsib64;Int32
# vpgatherqq xmm2{k3},[rcx+xmm4*4+8]
62 F2FD0B 91 54 A1 01, EVEX_Vpgatherqq_xmm_k1_vm64x, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 rw=k3 r=rcx r=xmm4 rm=ds:rcx+xmm4*4+8|vsib64;Int64
# vpgatherqq ymm2{k3},[rcx+ymm4*4+8]
62 F2FD2B 91 54 A1 01, EVEX_Vpgatherqq_ymm_k1_vm64y, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 rw=k3 r=rcx r=ymm4 rm=ds:rcx+ymm4*4+8|vsib64;Int64
# vpgatherqq zmm2{k3},[rcx+zmm4*4+8]
62 F2FD4B 91 54 A1 01, EVEX_Vpgatherqq_zmm_k1_vm64z, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 rw=k3 r=rcx r=zmm4 rm=ds:rcx+zmm4*4+8|vsib64;Int64
# vgatherdps xmm2,[rcx+xmm4*4+1],xmm6
C4E249 92 54 A1 01, VEX_Vgatherdps_xmm_vm32x_xmm, VEX, AVX2, op0=rw op1=r op2=rw w=vmm2 r=xmm2 r=rcx r=xmm4 w=vmm6 r=xmm6 rm=ds:rcx+xmm4*4+1|vsib32;Float32
# vgatherdps ymm2,[rcx+ymm4*4+1],ymm6
C4E24D 92 54 A1 01, VEX_Vgatherdps_ymm_vm32y_ymm, VEX, AVX2, op0=rw op1=r op2=rw w=vmm2 r=ymm2 r=rcx r=ymm4 w=vmm6 r=ymm6 rm=ds:rcx+ymm4*4+1|vsib32;Float32
# vgatherdpd xmm2,[rcx+xmm4*4+1],xmm6
C4E2C9 92 54 A1 01, VEX_Vgatherdpd_xmm_vm32x_xmm, VEX, AVX2, op0=rw op1=r op2=rw w=vmm2 r=xmm2 r=rcx r=xmm4 w=vmm6 r=xmm6 rm=ds:rcx+xmm4*4+1|vsib32;Float64
# vgatherdpd ymm2,[rcx+xmm4*4+1],ymm6
C4E2CD 92 54 A1 01, VEX_Vgatherdpd_ymm_vm32x_ymm, VEX, AVX2, op0=rw op1=r op2=rw w=vmm2 r=ymm2 r=rcx r=xmm4 w=vmm6 r=ymm6 rm=ds:rcx+xmm4*4+1|vsib32;Float64
# vgatherdps xmm2{k3},[rcx+xmm4*4+4]
62 F27D0B 92 54 A1 01, EVEX_Vgatherdps_xmm_k1_vm32x, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 rw=k3 r=rcx r=xmm4 rm=ds:rcx+xmm4*4+4|vsib32;Float32
# vgatherdps ymm2{k3},[rcx+ymm4*4+4]
62 F27D2B 92 54 A1 01, EVEX_Vgatherdps_ymm_k1_vm32y, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 rw=k3 r=rcx r=ymm4 rm=ds:rcx+ymm4*4+4|vsib32;Float32
# vgatherdps zmm2{k3},[rcx+zmm4*4+4]
62 F27D4B 92 54 A1 01, EVEX_Vgatherdps_zmm_k1_vm32z, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 rw=k3 r=rcx r=zmm4 rm=ds:rcx+zmm4*4+4|vsib32;Float32
# vgatherdpd xmm2{k3},[rcx+xmm4*4+8]
62 F2FD0B 92 54 A1 01, EVEX_Vgatherdpd_xmm_k1_vm32x, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 rw=k3 r=rcx r=xmm4 rm=ds:rcx+xmm4*4+8|vsib32;Float64
# vgatherdpd ymm2{k3},[rcx+xmm4*4+8]
62 F2FD2B 92 54 A1 01, EVEX_Vgatherdpd_ymm_k1_vm32x, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 rw=k3 r=rcx r=xmm4 rm=ds:rcx+xmm4*4+8|vsib32;Float64
# vgatherdpd zmm2{k3},[rcx+ymm4*4+8]
62 F2FD4B 92 54 A1 01, EVEX_Vgatherdpd_zmm_k1_vm32y, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 rw=k3 r=rcx r=ymm4 rm=ds:rcx+ymm4*4+8|vsib32;Float64
# vgatherqps xmm2,[rcx+xmm4*4+1],xmm6
C4E249 93 54 A1 01, VEX_Vgatherqps_xmm_vm64x_xmm, VEX, AVX2, op0=rw op1=r op2=rw w=vmm2 r=xmm2 r=rcx r=xmm4 w=vmm6 r=xmm6 rm=ds:rcx+xmm4*4+1|vsib64;Float32
# vgatherqps xmm2,[rcx+ymm4*4+1],xmm6
C4E24D 93 54 A1 01, VEX_Vgatherqps_xmm_vm64y_xmm, VEX, AVX2, op0=rw op1=r op2=rw w=vmm2 r=xmm2 r=rcx r=ymm4 w=vmm6 r=xmm6 rm=ds:rcx+ymm4*4+1|vsib64;Float32
# vgatherqpd xmm2,[rcx+xmm4*4+1],xmm6
C4E2C9 93 54 A1 01, VEX_Vgatherqpd_xmm_vm64x_xmm, VEX, AVX2, op0=rw op1=r op2=rw w=vmm2 r=xmm2 r=rcx r=xmm4 w=vmm6 r=xmm6 rm=ds:rcx+xmm4*4+1|vsib64;Float64
# vgatherqpd ymm2,[rcx+ymm4*4+1],ymm6
C4E2CD 93 54 A1 01, VEX_Vgatherqpd_ymm_vm64y_ymm, VEX, AVX2, op0=rw op1=r op2=rw w=vmm2 r=ymm2 r=rcx r=ymm4 w=vmm6 r=ymm6 rm=ds:rcx+ymm4*4+1|vsib64;Float64
# vgatherqps xmm2{k3},[rcx+xmm4*4+4]
62 F27D0B 93 54 A1 01, EVEX_Vgatherqps_xmm_k1_vm64x, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 rw=k3 r=rcx r=xmm4 rm=ds:rcx+xmm4*4+4|vsib64;Float32
# vgatherqps xmm2{k3},[rcx+ymm4*4+4]
62 F27D2B 93 54 A1 01, EVEX_Vgatherqps_xmm_k1_vm64y, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 rw=k3 r=rcx r=ymm4 rm=ds:rcx+ymm4*4+4|vsib64;Float32
# vgatherqps ymm2{k3},[rcx+zmm4*4+4]
62 F27D4B 93 54 A1 01, EVEX_Vgatherqps_ymm_k1_vm64z, EVEX, AVX512F, op0=rw op1=r w=vmm2 r=ymm2 rw=k3 r=rcx r=zmm4 rm=ds:rcx+zmm4*4+4|vsib64;Float32
# vgatherqpd xmm2{k3},[rcx+xmm4*4+8]
62 F2FD0B 93 54 A1 01, EVEX_Vgatherqpd_xmm_k1_vm64x, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=xmm2 rw=k3 r=rcx r=xmm4 rm=ds:rcx+xmm4*4+8|vsib64;Float64
# vgatherqpd ymm2{k3},[rcx+ymm4*4+8]
62 F2FD2B 93 54 A1 01, EVEX_Vgatherqpd_ymm_k1_vm64y, EVEX, AVX512VL;AVX512F, op0=rw op1=r w=vmm2 r=ymm2 rw=k3 r=rcx r=ymm4 rm=ds:rcx+ymm4*4+8|vsib64;Float64
# vgatherqpd zmm2{k3},[rcx+zmm4*4+8]
62 F2FD4B 93 54 A1 01, EVEX_Vgatherqpd_zmm_k1_vm64z, EVEX, AVX512F, op0=rcw op1=r cw=vmm2 r=zmm2 rw=k3 r=rcx r=zmm4 rm=ds:rcx+zmm4*4+8|vsib64;Float64
# vfmaddsub132ps xmm2,xmm6,xmm3
C4E249 96 D3, VEX_Vfmaddsub132ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmaddsub132ps xmm2,xmm6,[rax]
C4E249 96 10, VEX_Vfmaddsub132ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vfmaddsub132ps ymm2,ymm6,ymm3
C4E24D 96 D3, VEX_Vfmaddsub132ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfmaddsub132ps ymm2,ymm6,[rax]
C4E24D 96 10, VEX_Vfmaddsub132ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vfmaddsub132pd xmm2,xmm6,xmm3
C4E2C9 96 D3, VEX_Vfmaddsub132pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmaddsub132pd xmm2,xmm6,[rax]
C4E2C9 96 10, VEX_Vfmaddsub132pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vfmaddsub132pd ymm2,ymm6,ymm3
C4E2CD 96 D3, VEX_Vfmaddsub132pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfmaddsub132pd ymm2,ymm6,[rax]
C4E2CD 96 10, VEX_Vfmaddsub132pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vfmaddsub132ps xmm2,xmm6,[rax+10h]
62 F24D08 96 50 01, EVEX_Vfmaddsub132ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vfmaddsub132ps xmm18{k3},xmm14,xmm3
62 E20D0B 96 D3, EVEX_Vfmaddsub132ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmaddsub132ps xmm2{k3}{z},xmm6,xmm3
62 F24D8B 96 D3, EVEX_Vfmaddsub132ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmaddsub132ps ymm2,ymm6,[rax+20h]
62 F24D28 96 50 01, EVEX_Vfmaddsub132ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vfmaddsub132ps ymm18{k3},ymm14,ymm3
62 E20D2B 96 D3, EVEX_Vfmaddsub132ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfmaddsub132ps ymm2{k3}{z},ymm6,ymm3
62 F24DAB 96 D3, EVEX_Vfmaddsub132ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfmaddsub132ps zmm2,zmm6,[rax+40h]
62 F24D48 96 50 01, EVEX_Vfmaddsub132ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vfmaddsub132ps zmm2{k3},zmm6,zmm3 {rn-sae}
62 F24D1B 96 D3, EVEX_Vfmaddsub132ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmaddsub132ps zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F24DDB 96 D3, EVEX_Vfmaddsub132ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmaddsub132pd xmm2,xmm6,[rax+10h]
62 F2CD08 96 50 01, EVEX_Vfmaddsub132pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vfmaddsub132pd xmm18{k3},xmm14,xmm3
62 E28D0B 96 D3, EVEX_Vfmaddsub132pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmaddsub132pd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 96 D3, EVEX_Vfmaddsub132pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmaddsub132pd ymm2,ymm6,[rax+20h]
62 F2CD28 96 50 01, EVEX_Vfmaddsub132pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vfmaddsub132pd ymm18{k3},ymm14,ymm3
62 E28D2B 96 D3, EVEX_Vfmaddsub132pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfmaddsub132pd ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 96 D3, EVEX_Vfmaddsub132pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfmaddsub132pd zmm2,zmm6,[rax+40h]
62 F2CD48 96 50 01, EVEX_Vfmaddsub132pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vfmaddsub132pd zmm2{k3},zmm6,zmm3 {rn-sae}
62 F2CD1B 96 D3, EVEX_Vfmaddsub132pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmaddsub132pd zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F2CDDB 96 D3, EVEX_Vfmaddsub132pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmsubadd132ps xmm2,xmm6,xmm3
C4E249 97 D3, VEX_Vfmsubadd132ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmsubadd132ps xmm2,xmm6,[rax]
C4E249 97 10, VEX_Vfmsubadd132ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vfmsubadd132ps ymm2,ymm6,ymm3
C4E24D 97 D3, VEX_Vfmsubadd132ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfmsubadd132ps ymm2,ymm6,[rax]
C4E24D 97 10, VEX_Vfmsubadd132ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vfmsubadd132pd xmm2,xmm6,xmm3
C4E2C9 97 D3, VEX_Vfmsubadd132pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmsubadd132pd xmm2,xmm6,[rax]
C4E2C9 97 10, VEX_Vfmsubadd132pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vfmsubadd132pd ymm2,ymm6,ymm3
C4E2CD 97 D3, VEX_Vfmsubadd132pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfmsubadd132pd ymm2,ymm6,[rax]
C4E2CD 97 10, VEX_Vfmsubadd132pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vfmsubadd132ps xmm2,xmm6,[rax+10h]
62 F24D08 97 50 01, EVEX_Vfmsubadd132ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vfmsubadd132ps xmm18{k3},xmm14,xmm3
62 E20D0B 97 D3, EVEX_Vfmsubadd132ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmsubadd132ps xmm2{k3}{z},xmm6,xmm3
62 F24D8B 97 D3, EVEX_Vfmsubadd132ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmsubadd132ps ymm2,ymm6,[rax+20h]
62 F24D28 97 50 01, EVEX_Vfmsubadd132ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vfmsubadd132ps ymm18{k3},ymm14,ymm3
62 E20D2B 97 D3, EVEX_Vfmsubadd132ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfmsubadd132ps ymm2{k3}{z},ymm6,ymm3
62 F24DAB 97 D3, EVEX_Vfmsubadd132ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfmsubadd132ps zmm2,zmm6,[rax+40h]
62 F24D48 97 50 01, EVEX_Vfmsubadd132ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vfmsubadd132ps zmm2{k3},zmm6,zmm3 {rn-sae}
62 F24D1B 97 D3, EVEX_Vfmsubadd132ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmsubadd132ps zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F24DDB 97 D3, EVEX_Vfmsubadd132ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmsubadd132pd xmm2,xmm6,[rax+10h]
62 F2CD08 97 50 01, EVEX_Vfmsubadd132pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vfmsubadd132pd xmm18{k3},xmm14,xmm3
62 E28D0B 97 D3, EVEX_Vfmsubadd132pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmsubadd132pd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 97 D3, EVEX_Vfmsubadd132pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmsubadd132pd ymm2,ymm6,[rax+20h]
62 F2CD28 97 50 01, EVEX_Vfmsubadd132pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vfmsubadd132pd ymm18{k3},ymm14,ymm3
62 E28D2B 97 D3, EVEX_Vfmsubadd132pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfmsubadd132pd ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 97 D3, EVEX_Vfmsubadd132pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfmsubadd132pd zmm2,zmm6,[rax+40h]
62 F2CD48 97 50 01, EVEX_Vfmsubadd132pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vfmsubadd132pd zmm2{k3},zmm6,zmm3 {rn-sae}
62 F2CD1B 97 D3, EVEX_Vfmsubadd132pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmsubadd132pd zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F2CDDB 97 D3, EVEX_Vfmsubadd132pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmadd132ps xmm2,xmm6,xmm3
C4E249 98 D3, VEX_Vfmadd132ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmadd132ps xmm2,xmm6,[rax]
C4E249 98 10, VEX_Vfmadd132ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vfmadd132ps ymm2,ymm6,ymm3
C4E24D 98 D3, VEX_Vfmadd132ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfmadd132ps ymm2,ymm6,[rax]
C4E24D 98 10, VEX_Vfmadd132ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vfmadd132pd xmm2,xmm6,xmm3
C4E2C9 98 D3, VEX_Vfmadd132pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmadd132pd xmm2,xmm6,[rax]
C4E2C9 98 10, VEX_Vfmadd132pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vfmadd132pd ymm2,ymm6,ymm3
C4E2CD 98 D3, VEX_Vfmadd132pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfmadd132pd ymm2,ymm6,[rax]
C4E2CD 98 10, VEX_Vfmadd132pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vfmadd132ps xmm2,xmm6,[rax+10h]
62 F24D08 98 50 01, EVEX_Vfmadd132ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vfmadd132ps xmm18{k3},xmm14,xmm3
62 E20D0B 98 D3, EVEX_Vfmadd132ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmadd132ps xmm2{k3}{z},xmm6,xmm3
62 F24D8B 98 D3, EVEX_Vfmadd132ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmadd132ps ymm2,ymm6,[rax+20h]
62 F24D28 98 50 01, EVEX_Vfmadd132ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vfmadd132ps ymm18{k3},ymm14,ymm3
62 E20D2B 98 D3, EVEX_Vfmadd132ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfmadd132ps ymm2{k3}{z},ymm6,ymm3
62 F24DAB 98 D3, EVEX_Vfmadd132ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfmadd132ps zmm2,zmm6,[rax+40h]
62 F24D48 98 50 01, EVEX_Vfmadd132ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vfmadd132ps zmm2{k3},zmm6,zmm3 {rn-sae}
62 F24D1B 98 D3, EVEX_Vfmadd132ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmadd132ps zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F24DDB 98 D3, EVEX_Vfmadd132ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmadd132pd xmm2,xmm6,[rax+10h]
62 F2CD08 98 50 01, EVEX_Vfmadd132pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vfmadd132pd xmm18{k3},xmm14,xmm3
62 E28D0B 98 D3, EVEX_Vfmadd132pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmadd132pd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 98 D3, EVEX_Vfmadd132pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmadd132pd ymm2,ymm6,[rax+20h]
62 F2CD28 98 50 01, EVEX_Vfmadd132pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vfmadd132pd ymm18{k3},ymm14,ymm3
62 E28D2B 98 D3, EVEX_Vfmadd132pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfmadd132pd ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 98 D3, EVEX_Vfmadd132pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfmadd132pd zmm2,zmm6,[rax+40h]
62 F2CD48 98 50 01, EVEX_Vfmadd132pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vfmadd132pd zmm2{k3},zmm6,zmm3 {rn-sae}
62 F2CD1B 98 D3, EVEX_Vfmadd132pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmadd132pd zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F2CDDB 98 D3, EVEX_Vfmadd132pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmadd132ss xmm2,xmm6,xmm3
C4E249 99 D3, VEX_Vfmadd132ss_xmm_xmm_xmmm32, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmadd132ss xmm2,xmm6,[rax]
C4E249 99 10, VEX_Vfmadd132ss_xmm_xmm_xmmm32, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Float32
# vfmadd132sd xmm2,xmm6,xmm3
C4E2C9 99 D3, VEX_Vfmadd132sd_xmm_xmm_xmmm64, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmadd132sd xmm2,xmm6,[rax]
C4E2C9 99 10, VEX_Vfmadd132sd_xmm_xmm_xmmm64, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Float64
# vfmadd132ss xmm2,xmm6,[rax+4]
62 F24D08 99 50 01, EVEX_Vfmadd132ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vfmadd132ss xmm18{k3},xmm14,xmm3
62 E20D0B 99 D3, EVEX_Vfmadd132ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmadd132ss xmm2{k3}{z},xmm6,xmm3
62 F24D8B 99 D3, EVEX_Vfmadd132ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmadd132sd xmm2,xmm6,[rax+8]
62 F2CD08 99 50 01, EVEX_Vfmadd132sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vfmadd132sd xmm18{k3},xmm14,xmm3
62 E28D0B 99 D3, EVEX_Vfmadd132sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmadd132sd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 99 D3, EVEX_Vfmadd132sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmsub132ps xmm2,xmm6,xmm3
C4E249 9A D3, VEX_Vfmsub132ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmsub132ps xmm2,xmm6,[rax]
C4E249 9A 10, VEX_Vfmsub132ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vfmsub132ps ymm2,ymm6,ymm3
C4E24D 9A D3, VEX_Vfmsub132ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfmsub132ps ymm2,ymm6,[rax]
C4E24D 9A 10, VEX_Vfmsub132ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vfmsub132pd xmm2,xmm6,xmm3
C4E2C9 9A D3, VEX_Vfmsub132pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmsub132pd xmm2,xmm6,[rax]
C4E2C9 9A 10, VEX_Vfmsub132pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vfmsub132pd ymm2,ymm6,ymm3
C4E2CD 9A D3, VEX_Vfmsub132pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfmsub132pd ymm2,ymm6,[rax]
C4E2CD 9A 10, VEX_Vfmsub132pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vfmsub132ps xmm2,xmm6,[rax+10h]
62 F24D08 9A 50 01, EVEX_Vfmsub132ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vfmsub132ps xmm18{k3},xmm14,xmm3
62 E20D0B 9A D3, EVEX_Vfmsub132ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmsub132ps xmm2{k3}{z},xmm6,xmm3
62 F24D8B 9A D3, EVEX_Vfmsub132ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmsub132ps ymm2,ymm6,[rax+20h]
62 F24D28 9A 50 01, EVEX_Vfmsub132ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vfmsub132ps ymm18{k3},ymm14,ymm3
62 E20D2B 9A D3, EVEX_Vfmsub132ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfmsub132ps ymm2{k3}{z},ymm6,ymm3
62 F24DAB 9A D3, EVEX_Vfmsub132ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfmsub132ps zmm2,zmm6,[rax+40h]
62 F24D48 9A 50 01, EVEX_Vfmsub132ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vfmsub132ps zmm2{k3},zmm6,zmm3 {rn-sae}
62 F24D1B 9A D3, EVEX_Vfmsub132ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmsub132ps zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F24DDB 9A D3, EVEX_Vfmsub132ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmsub132pd xmm2,xmm6,[rax+10h]
62 F2CD08 9A 50 01, EVEX_Vfmsub132pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vfmsub132pd xmm18{k3},xmm14,xmm3
62 E28D0B 9A D3, EVEX_Vfmsub132pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmsub132pd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 9A D3, EVEX_Vfmsub132pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmsub132pd ymm2,ymm6,[rax+20h]
62 F2CD28 9A 50 01, EVEX_Vfmsub132pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vfmsub132pd ymm18{k3},ymm14,ymm3
62 E28D2B 9A D3, EVEX_Vfmsub132pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfmsub132pd ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 9A D3, EVEX_Vfmsub132pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfmsub132pd zmm2,zmm6,[rax+40h]
62 F2CD48 9A 50 01, EVEX_Vfmsub132pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vfmsub132pd zmm2{k3},zmm6,zmm3 {rn-sae}
62 F2CD1B 9A D3, EVEX_Vfmsub132pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmsub132pd zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F2CDDB 9A D3, EVEX_Vfmsub132pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# v4fmaddps zmm10,zmm22,xmmword ptr [rax+10h]
62 724F40 9A 50 01, EVEX_V4fmaddps_zmm_k1z_zmmp3_m128, EVEX, AVX512_4FMAPS, op0=rw op1=r op2=r w=vmm10 r=zmm10 r=zmm20 r=zmm21 r=zmm22 r=zmm23 r=rax rm=ds:rax+0x10;Packed128_Float32
# v4fmaddps zmm2{k3},zmm6,xmmword ptr [rax+10h]
62 F24F4B 9A 50 01, EVEX_V4fmaddps_zmm_k1z_zmmp3_m128, EVEX, AVX512_4FMAPS, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm4 r=zmm5 r=zmm6 r=zmm7 r=rax rm=ds:rax+0x10;Packed128_Float32
# v4fmaddps zmm18{k3}{z},zmm14,xmmword ptr [rax+10h]
62 E20FCB 9A 50 01, EVEX_V4fmaddps_zmm_k1z_zmmp3_m128, EVEX, AVX512_4FMAPS, op0=rw op1=r op2=r w=vmm18 r=zmm18 r=k3 r=zmm12 r=zmm13 r=zmm14 r=zmm15 r=rax rm=ds:rax+0x10;Packed128_Float32
# vfmsub132ss xmm2,xmm6,xmm3
C4E249 9B D3, VEX_Vfmsub132ss_xmm_xmm_xmmm32, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmsub132ss xmm2,xmm6,[rax]
C4E249 9B 10, VEX_Vfmsub132ss_xmm_xmm_xmmm32, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Float32
# vfmsub132sd xmm2,xmm6,xmm3
C4E2C9 9B D3, VEX_Vfmsub132sd_xmm_xmm_xmmm64, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmsub132sd xmm2,xmm6,[rax]
C4E2C9 9B 10, VEX_Vfmsub132sd_xmm_xmm_xmmm64, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Float64
# vfmsub132ss xmm2,xmm6,[rax+4]
62 F24D08 9B 50 01, EVEX_Vfmsub132ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vfmsub132ss xmm18{k3},xmm14,xmm3
62 E20D0B 9B D3, EVEX_Vfmsub132ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmsub132ss xmm2{k3}{z},xmm6,xmm3
62 F24D8B 9B D3, EVEX_Vfmsub132ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmsub132sd xmm2,xmm6,[rax+8]
62 F2CD08 9B 50 01, EVEX_Vfmsub132sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vfmsub132sd xmm18{k3},xmm14,xmm3
62 E28D0B 9B D3, EVEX_Vfmsub132sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmsub132sd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 9B D3, EVEX_Vfmsub132sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# v4fmaddss xmm10,xmm22,xmmword ptr [rax+10h]
62 724F00 9B 50 01, EVEX_V4fmaddss_xmm_k1z_xmmp3_m128, EVEX, AVX512_4FMAPS, op0=rw op1=r op2=r w=vmm10 r=xmm10 r=xmm20 r=xmm21 r=xmm22 r=xmm23 r=rax rm=ds:rax+0x10;Packed128_Float32
# v4fmaddss xmm2{k3},xmm6,xmmword ptr [rax+10h]
62 F24F0B 9B 50 01, EVEX_V4fmaddss_xmm_k1z_xmmp3_m128, EVEX, AVX512_4FMAPS, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm4 r=xmm5 r=xmm6 r=xmm7 r=rax rm=ds:rax+0x10;Packed128_Float32
# v4fmaddss xmm18{k3}{z},xmm14,xmmword ptr [rax+10h]
62 E20F8B 9B 50 01, EVEX_V4fmaddss_xmm_k1z_xmmp3_m128, EVEX, AVX512_4FMAPS, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm12 r=xmm13 r=xmm14 r=xmm15 r=rax rm=ds:rax+0x10;Packed128_Float32
# vfnmadd132ps xmm2,xmm6,xmm3
C4E249 9C D3, VEX_Vfnmadd132ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfnmadd132ps xmm2,xmm6,[rax]
C4E249 9C 10, VEX_Vfnmadd132ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vfnmadd132ps ymm2,ymm6,ymm3
C4E24D 9C D3, VEX_Vfnmadd132ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfnmadd132ps ymm2,ymm6,[rax]
C4E24D 9C 10, VEX_Vfnmadd132ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vfnmadd132pd xmm2,xmm6,xmm3
C4E2C9 9C D3, VEX_Vfnmadd132pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfnmadd132pd xmm2,xmm6,[rax]
C4E2C9 9C 10, VEX_Vfnmadd132pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vfnmadd132pd ymm2,ymm6,ymm3
C4E2CD 9C D3, VEX_Vfnmadd132pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfnmadd132pd ymm2,ymm6,[rax]
C4E2CD 9C 10, VEX_Vfnmadd132pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vfnmadd132ps xmm2,xmm6,[rax+10h]
62 F24D08 9C 50 01, EVEX_Vfnmadd132ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vfnmadd132ps xmm18{k3},xmm14,xmm3
62 E20D0B 9C D3, EVEX_Vfnmadd132ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfnmadd132ps xmm2{k3}{z},xmm6,xmm3
62 F24D8B 9C D3, EVEX_Vfnmadd132ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfnmadd132ps ymm2,ymm6,[rax+20h]
62 F24D28 9C 50 01, EVEX_Vfnmadd132ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vfnmadd132ps ymm18{k3},ymm14,ymm3
62 E20D2B 9C D3, EVEX_Vfnmadd132ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfnmadd132ps ymm2{k3}{z},ymm6,ymm3
62 F24DAB 9C D3, EVEX_Vfnmadd132ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfnmadd132ps zmm2,zmm6,[rax+40h]
62 F24D48 9C 50 01, EVEX_Vfnmadd132ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vfnmadd132ps zmm2{k3},zmm6,zmm3 {rn-sae}
62 F24D1B 9C D3, EVEX_Vfnmadd132ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfnmadd132ps zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F24DDB 9C D3, EVEX_Vfnmadd132ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfnmadd132pd xmm2,xmm6,[rax+10h]
62 F2CD08 9C 50 01, EVEX_Vfnmadd132pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vfnmadd132pd xmm18{k3},xmm14,xmm3
62 E28D0B 9C D3, EVEX_Vfnmadd132pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfnmadd132pd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 9C D3, EVEX_Vfnmadd132pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfnmadd132pd ymm2,ymm6,[rax+20h]
62 F2CD28 9C 50 01, EVEX_Vfnmadd132pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vfnmadd132pd ymm18{k3},ymm14,ymm3
62 E28D2B 9C D3, EVEX_Vfnmadd132pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfnmadd132pd ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 9C D3, EVEX_Vfnmadd132pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfnmadd132pd zmm2,zmm6,[rax+40h]
62 F2CD48 9C 50 01, EVEX_Vfnmadd132pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vfnmadd132pd zmm2{k3},zmm6,zmm3 {rn-sae}
62 F2CD1B 9C D3, EVEX_Vfnmadd132pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfnmadd132pd zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F2CDDB 9C D3, EVEX_Vfnmadd132pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfnmadd132ss xmm2,xmm6,xmm3
C4E249 9D D3, VEX_Vfnmadd132ss_xmm_xmm_xmmm32, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfnmadd132ss xmm2,xmm6,[rax]
C4E249 9D 10, VEX_Vfnmadd132ss_xmm_xmm_xmmm32, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Float32
# vfnmadd132sd xmm2,xmm6,xmm3
C4E2C9 9D D3, VEX_Vfnmadd132sd_xmm_xmm_xmmm64, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfnmadd132sd xmm2,xmm6,[rax]
C4E2C9 9D 10, VEX_Vfnmadd132sd_xmm_xmm_xmmm64, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Float64
# vfnmadd132ss xmm2,xmm6,[rax+4]
62 F24D08 9D 50 01, EVEX_Vfnmadd132ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vfnmadd132ss xmm18{k3},xmm14,xmm3
62 E20D0B 9D D3, EVEX_Vfnmadd132ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfnmadd132ss xmm2{k3}{z},xmm6,xmm3
62 F24D8B 9D D3, EVEX_Vfnmadd132ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfnmadd132sd xmm2,xmm6,[rax+8]
62 F2CD08 9D 50 01, EVEX_Vfnmadd132sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vfnmadd132sd xmm18{k3},xmm14,xmm3
62 E28D0B 9D D3, EVEX_Vfnmadd132sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfnmadd132sd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 9D D3, EVEX_Vfnmadd132sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfnmsub132ps xmm2,xmm6,xmm3
C4E249 9E D3, VEX_Vfnmsub132ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfnmsub132ps xmm2,xmm6,[rax]
C4E249 9E 10, VEX_Vfnmsub132ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vfnmsub132ps ymm2,ymm6,ymm3
C4E24D 9E D3, VEX_Vfnmsub132ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfnmsub132ps ymm2,ymm6,[rax]
C4E24D 9E 10, VEX_Vfnmsub132ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vfnmsub132pd xmm2,xmm6,xmm3
C4E2C9 9E D3, VEX_Vfnmsub132pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfnmsub132pd xmm2,xmm6,[rax]
C4E2C9 9E 10, VEX_Vfnmsub132pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vfnmsub132pd ymm2,ymm6,ymm3
C4E2CD 9E D3, VEX_Vfnmsub132pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfnmsub132pd ymm2,ymm6,[rax]
C4E2CD 9E 10, VEX_Vfnmsub132pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vfnmsub132ps xmm2,xmm6,[rax+10h]
62 F24D08 9E 50 01, EVEX_Vfnmsub132ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vfnmsub132ps xmm18{k3},xmm14,xmm3
62 E20D0B 9E D3, EVEX_Vfnmsub132ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfnmsub132ps xmm2{k3}{z},xmm6,xmm3
62 F24D8B 9E D3, EVEX_Vfnmsub132ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfnmsub132ps ymm2,ymm6,[rax+20h]
62 F24D28 9E 50 01, EVEX_Vfnmsub132ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vfnmsub132ps ymm18{k3},ymm14,ymm3
62 E20D2B 9E D3, EVEX_Vfnmsub132ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfnmsub132ps ymm2{k3}{z},ymm6,ymm3
62 F24DAB 9E D3, EVEX_Vfnmsub132ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfnmsub132ps zmm2,zmm6,[rax+40h]
62 F24D48 9E 50 01, EVEX_Vfnmsub132ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vfnmsub132ps zmm2{k3},zmm6,zmm3 {rn-sae}
62 F24D1B 9E D3, EVEX_Vfnmsub132ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfnmsub132ps zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F24DDB 9E D3, EVEX_Vfnmsub132ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfnmsub132pd xmm2,xmm6,[rax+10h]
62 F2CD08 9E 50 01, EVEX_Vfnmsub132pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vfnmsub132pd xmm18{k3},xmm14,xmm3
62 E28D0B 9E D3, EVEX_Vfnmsub132pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfnmsub132pd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 9E D3, EVEX_Vfnmsub132pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfnmsub132pd ymm2,ymm6,[rax+20h]
62 F2CD28 9E 50 01, EVEX_Vfnmsub132pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vfnmsub132pd ymm18{k3},ymm14,ymm3
62 E28D2B 9E D3, EVEX_Vfnmsub132pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfnmsub132pd ymm2{k3}{z},ymm6,ymm3
62 F2CDAB 9E D3, EVEX_Vfnmsub132pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfnmsub132pd zmm2,zmm6,[rax+40h]
62 F2CD48 9E 50 01, EVEX_Vfnmsub132pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vfnmsub132pd zmm2{k3},zmm6,zmm3 {rn-sae}
62 F2CD1B 9E D3, EVEX_Vfnmsub132pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfnmsub132pd zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F2CDDB 9E D3, EVEX_Vfnmsub132pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfnmsub132ss xmm2,xmm6,xmm3
C4E249 9F D3, VEX_Vfnmsub132ss_xmm_xmm_xmmm32, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfnmsub132ss xmm2,xmm6,[rax]
C4E249 9F 10, VEX_Vfnmsub132ss_xmm_xmm_xmmm32, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Float32
# vfnmsub132sd xmm2,xmm6,xmm3
C4E2C9 9F D3, VEX_Vfnmsub132sd_xmm_xmm_xmmm64, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfnmsub132sd xmm2,xmm6,[rax]
C4E2C9 9F 10, VEX_Vfnmsub132sd_xmm_xmm_xmmm64, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Float64
# vfnmsub132ss xmm2,xmm6,[rax+4]
62 F24D08 9F 50 01, EVEX_Vfnmsub132ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vfnmsub132ss xmm18{k3},xmm14,xmm3
62 E20D0B 9F D3, EVEX_Vfnmsub132ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfnmsub132ss xmm2{k3}{z},xmm6,xmm3
62 F24D8B 9F D3, EVEX_Vfnmsub132ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfnmsub132sd xmm2,xmm6,[rax+8]
62 F2CD08 9F 50 01, EVEX_Vfnmsub132sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vfnmsub132sd xmm18{k3},xmm14,xmm3
62 E28D0B 9F D3, EVEX_Vfnmsub132sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfnmsub132sd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B 9F D3, EVEX_Vfnmsub132sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpscatterdd [rcx+xmm4*4+4]{k3},xmm2
62 F27D0B A0 54 A1 01, EVEX_Vpscatterdd_vm32x_k1_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rcx r=xmm4 rw=k3 r=xmm2 cwm=ds:rcx+xmm4*4+4|vsib32;Int32
# vpscatterdd [rcx+ymm4*4+4]{k3},ymm2
62 F27D2B A0 54 A1 01, EVEX_Vpscatterdd_vm32y_k1_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rcx r=ymm4 rw=k3 r=ymm2 cwm=ds:rcx+ymm4*4+4|vsib32;Int32
# vpscatterdd [rcx+zmm4*4+4]{k3},zmm2
62 F27D4B A0 54 A1 01, EVEX_Vpscatterdd_vm32z_k1_zmm, EVEX, AVX512F, op0=cw op1=r r=rcx r=zmm4 rw=k3 r=zmm2 cwm=ds:rcx+zmm4*4+4|vsib32;Int32
# vpscatterdq [rcx+xmm4*4+8]{k3},xmm2
62 F2FD0B A0 54 A1 01, EVEX_Vpscatterdq_vm32x_k1_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rcx r=xmm4 rw=k3 r=xmm2 cwm=ds:rcx+xmm4*4+8|vsib32;Int64
# vpscatterdq [rcx+xmm4*4+8]{k3},ymm2
62 F2FD2B A0 54 A1 01, EVEX_Vpscatterdq_vm32x_k1_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rcx r=xmm4 rw=k3 r=ymm2 cwm=ds:rcx+xmm4*4+8|vsib32;Int64
# vpscatterdq [rcx+ymm4*4+8]{k3},zmm2
62 F2FD4B A0 54 A1 01, EVEX_Vpscatterdq_vm32y_k1_zmm, EVEX, AVX512F, op0=cw op1=r r=rcx r=ymm4 rw=k3 r=zmm2 cwm=ds:rcx+ymm4*4+8|vsib32;Int64
# vpscatterqd [rcx+xmm4*4+4]{k3},xmm2
62 F27D0B A1 54 A1 01, EVEX_Vpscatterqd_vm64x_k1_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rcx r=xmm4 rw=k3 r=xmm2 cwm=ds:rcx+xmm4*4+4|vsib64;Int32
# vpscatterqd [rcx+ymm4*4+4]{k3},xmm2
62 F27D2B A1 54 A1 01, EVEX_Vpscatterqd_vm64y_k1_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rcx r=ymm4 rw=k3 r=xmm2 cwm=ds:rcx+ymm4*4+4|vsib64;Int32
# vpscatterqd [rcx+zmm4*4+4]{k3},ymm2
62 F27D4B A1 54 A1 01, EVEX_Vpscatterqd_vm64z_k1_ymm, EVEX, AVX512F, op0=cw op1=r r=rcx r=zmm4 rw=k3 r=ymm2 cwm=ds:rcx+zmm4*4+4|vsib64;Int32
# vpscatterqq [rcx+xmm4*4+8]{k3},xmm2
62 F2FD0B A1 54 A1 01, EVEX_Vpscatterqq_vm64x_k1_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rcx r=xmm4 rw=k3 r=xmm2 cwm=ds:rcx+xmm4*4+8|vsib64;Int64
# vpscatterqq [rcx+ymm4*4+8]{k3},ymm2
62 F2FD2B A1 54 A1 01, EVEX_Vpscatterqq_vm64y_k1_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rcx r=ymm4 rw=k3 r=ymm2 cwm=ds:rcx+ymm4*4+8|vsib64;Int64
# vpscatterqq [rcx+zmm4*4+8]{k3},zmm2
62 F2FD4B A1 54 A1 01, EVEX_Vpscatterqq_vm64z_k1_zmm, EVEX, AVX512F, op0=cw op1=r r=rcx r=zmm4 rw=k3 r=zmm2 cwm=ds:rcx+zmm4*4+8|vsib64;Int64
# vscatterdps [rcx+xmm4*4+4]{k3},xmm2
62 F27D0B A2 54 A1 01, EVEX_Vscatterdps_vm32x_k1_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rcx r=xmm4 rw=k3 r=xmm2 cwm=ds:rcx+xmm4*4+4|vsib32;Float32
# vscatterdps [rcx+ymm4*4+4]{k3},ymm2
62 F27D2B A2 54 A1 01, EVEX_Vscatterdps_vm32y_k1_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rcx r=ymm4 rw=k3 r=ymm2 cwm=ds:rcx+ymm4*4+4|vsib32;Float32
# vscatterdps [rcx+zmm4*4+4]{k3},zmm2
62 F27D4B A2 54 A1 01, EVEX_Vscatterdps_vm32z_k1_zmm, EVEX, AVX512F, op0=cw op1=r r=rcx r=zmm4 rw=k3 r=zmm2 cwm=ds:rcx+zmm4*4+4|vsib32;Float32
# vscatterdpd [rcx+xmm4*4+8]{k3},xmm2
62 F2FD0B A2 54 A1 01, EVEX_Vscatterdpd_vm32x_k1_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rcx r=xmm4 rw=k3 r=xmm2 cwm=ds:rcx+xmm4*4+8|vsib32;Float64
# vscatterdpd [rcx+xmm4*4+8]{k3},ymm2
62 F2FD2B A2 54 A1 01, EVEX_Vscatterdpd_vm32x_k1_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rcx r=xmm4 rw=k3 r=ymm2 cwm=ds:rcx+xmm4*4+8|vsib32;Float64
# vscatterdpd [rcx+ymm4*4+8]{k3},zmm2
62 F2FD4B A2 54 A1 01, EVEX_Vscatterdpd_vm32y_k1_zmm, EVEX, AVX512F, op0=cw op1=r r=rcx r=ymm4 rw=k3 r=zmm2 cwm=ds:rcx+ymm4*4+8|vsib32;Float64
# vscatterqps [rcx+xmm4*4+4]{k3},xmm2
62 F27D0B A3 54 A1 01, EVEX_Vscatterqps_vm64x_k1_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rcx r=xmm4 rw=k3 r=xmm2 cwm=ds:rcx+xmm4*4+4|vsib64;Float32
# vscatterqps [rcx+ymm4*4+4]{k3},xmm2
62 F27D2B A3 54 A1 01, EVEX_Vscatterqps_vm64y_k1_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rcx r=ymm4 rw=k3 r=xmm2 cwm=ds:rcx+ymm4*4+4|vsib64;Float32
# vscatterqps [rcx+zmm4*4+4]{k3},ymm2
62 F27D4B A3 54 A1 01, EVEX_Vscatterqps_vm64z_k1_ymm, EVEX, AVX512F, op0=cw op1=r r=rcx r=zmm4 rw=k3 r=ymm2 cwm=ds:rcx+zmm4*4+4|vsib64;Float32
# vscatterqpd [rcx+xmm4*4+8]{k3},xmm2
62 F2FD0B A3 54 A1 01, EVEX_Vscatterqpd_vm64x_k1_xmm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rcx r=xmm4 rw=k3 r=xmm2 cwm=ds:rcx+xmm4*4+8|vsib64;Float64
# vscatterqpd [rcx+ymm4*4+8]{k3},ymm2
62 F2FD2B A3 54 A1 01, EVEX_Vscatterqpd_vm64y_k1_ymm, EVEX, AVX512VL;AVX512F, op0=cw op1=r r=rcx r=ymm4 rw=k3 r=ymm2 cwm=ds:rcx+ymm4*4+8|vsib64;Float64
# vscatterqpd [rcx+zmm4*4+8]{k3},zmm2
62 F2FD4B A3 54 A1 01, EVEX_Vscatterqpd_vm64z_k1_zmm, EVEX, AVX512F, op0=cw op1=r r=rcx r=zmm4 rw=k3 r=zmm2 cwm=ds:rcx+zmm4*4+8|vsib64;Float64
# vfmaddsub213ps xmm2,xmm6,xmm3
C4E249 A6 D3, VEX_Vfmaddsub213ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmaddsub213ps xmm2,xmm6,[rax]
C4E249 A6 10, VEX_Vfmaddsub213ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vfmaddsub213ps ymm2,ymm6,ymm3
C4E24D A6 D3, VEX_Vfmaddsub213ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfmaddsub213ps ymm2,ymm6,[rax]
C4E24D A6 10, VEX_Vfmaddsub213ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vfmaddsub213pd xmm2,xmm6,xmm3
C4E2C9 A6 D3, VEX_Vfmaddsub213pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmaddsub213pd xmm2,xmm6,[rax]
C4E2C9 A6 10, VEX_Vfmaddsub213pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vfmaddsub213pd ymm2,ymm6,ymm3
C4E2CD A6 D3, VEX_Vfmaddsub213pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfmaddsub213pd ymm2,ymm6,[rax]
C4E2CD A6 10, VEX_Vfmaddsub213pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vfmaddsub213ps xmm2,xmm6,[rax+10h]
62 F24D08 A6 50 01, EVEX_Vfmaddsub213ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vfmaddsub213ps xmm18{k3},xmm14,xmm3
62 E20D0B A6 D3, EVEX_Vfmaddsub213ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmaddsub213ps xmm2{k3}{z},xmm6,xmm3
62 F24D8B A6 D3, EVEX_Vfmaddsub213ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmaddsub213ps ymm2,ymm6,[rax+20h]
62 F24D28 A6 50 01, EVEX_Vfmaddsub213ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vfmaddsub213ps ymm18{k3},ymm14,ymm3
62 E20D2B A6 D3, EVEX_Vfmaddsub213ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfmaddsub213ps ymm2{k3}{z},ymm6,ymm3
62 F24DAB A6 D3, EVEX_Vfmaddsub213ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfmaddsub213ps zmm2,zmm6,[rax+40h]
62 F24D48 A6 50 01, EVEX_Vfmaddsub213ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vfmaddsub213ps zmm2{k3},zmm6,zmm3 {rn-sae}
62 F24D1B A6 D3, EVEX_Vfmaddsub213ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmaddsub213ps zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F24DDB A6 D3, EVEX_Vfmaddsub213ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmaddsub213pd xmm2,xmm6,[rax+10h]
62 F2CD08 A6 50 01, EVEX_Vfmaddsub213pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vfmaddsub213pd xmm18{k3},xmm14,xmm3
62 E28D0B A6 D3, EVEX_Vfmaddsub213pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmaddsub213pd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B A6 D3, EVEX_Vfmaddsub213pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmaddsub213pd ymm2,ymm6,[rax+20h]
62 F2CD28 A6 50 01, EVEX_Vfmaddsub213pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vfmaddsub213pd ymm18{k3},ymm14,ymm3
62 E28D2B A6 D3, EVEX_Vfmaddsub213pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfmaddsub213pd ymm2{k3}{z},ymm6,ymm3
62 F2CDAB A6 D3, EVEX_Vfmaddsub213pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfmaddsub213pd zmm2,zmm6,[rax+40h]
62 F2CD48 A6 50 01, EVEX_Vfmaddsub213pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vfmaddsub213pd zmm2{k3},zmm6,zmm3 {rn-sae}
62 F2CD1B A6 D3, EVEX_Vfmaddsub213pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmaddsub213pd zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F2CDDB A6 D3, EVEX_Vfmaddsub213pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmsubadd213ps xmm2,xmm6,xmm3
C4E249 A7 D3, VEX_Vfmsubadd213ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmsubadd213ps xmm2,xmm6,[rax]
C4E249 A7 10, VEX_Vfmsubadd213ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vfmsubadd213ps ymm2,ymm6,ymm3
C4E24D A7 D3, VEX_Vfmsubadd213ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfmsubadd213ps ymm2,ymm6,[rax]
C4E24D A7 10, VEX_Vfmsubadd213ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vfmsubadd213pd xmm2,xmm6,xmm3
C4E2C9 A7 D3, VEX_Vfmsubadd213pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmsubadd213pd xmm2,xmm6,[rax]
C4E2C9 A7 10, VEX_Vfmsubadd213pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vfmsubadd213pd ymm2,ymm6,ymm3
C4E2CD A7 D3, VEX_Vfmsubadd213pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfmsubadd213pd ymm2,ymm6,[rax]
C4E2CD A7 10, VEX_Vfmsubadd213pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vfmsubadd213ps xmm2,xmm6,[rax+10h]
62 F24D08 A7 50 01, EVEX_Vfmsubadd213ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vfmsubadd213ps xmm18{k3},xmm14,xmm3
62 E20D0B A7 D3, EVEX_Vfmsubadd213ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmsubadd213ps xmm2{k3}{z},xmm6,xmm3
62 F24D8B A7 D3, EVEX_Vfmsubadd213ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmsubadd213ps ymm2,ymm6,[rax+20h]
62 F24D28 A7 50 01, EVEX_Vfmsubadd213ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vfmsubadd213ps ymm18{k3},ymm14,ymm3
62 E20D2B A7 D3, EVEX_Vfmsubadd213ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfmsubadd213ps ymm2{k3}{z},ymm6,ymm3
62 F24DAB A7 D3, EVEX_Vfmsubadd213ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfmsubadd213ps zmm2,zmm6,[rax+40h]
62 F24D48 A7 50 01, EVEX_Vfmsubadd213ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vfmsubadd213ps zmm2{k3},zmm6,zmm3 {rn-sae}
62 F24D1B A7 D3, EVEX_Vfmsubadd213ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmsubadd213ps zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F24DDB A7 D3, EVEX_Vfmsubadd213ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmsubadd213pd xmm2,xmm6,[rax+10h]
62 F2CD08 A7 50 01, EVEX_Vfmsubadd213pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vfmsubadd213pd xmm18{k3},xmm14,xmm3
62 E28D0B A7 D3, EVEX_Vfmsubadd213pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmsubadd213pd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B A7 D3, EVEX_Vfmsubadd213pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmsubadd213pd ymm2,ymm6,[rax+20h]
62 F2CD28 A7 50 01, EVEX_Vfmsubadd213pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vfmsubadd213pd ymm18{k3},ymm14,ymm3
62 E28D2B A7 D3, EVEX_Vfmsubadd213pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfmsubadd213pd ymm2{k3}{z},ymm6,ymm3
62 F2CDAB A7 D3, EVEX_Vfmsubadd213pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfmsubadd213pd zmm2,zmm6,[rax+40h]
62 F2CD48 A7 50 01, EVEX_Vfmsubadd213pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vfmsubadd213pd zmm2{k3},zmm6,zmm3 {rn-sae}
62 F2CD1B A7 D3, EVEX_Vfmsubadd213pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmsubadd213pd zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F2CDDB A7 D3, EVEX_Vfmsubadd213pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmadd213ps xmm2,xmm6,xmm3
C4E249 A8 D3, VEX_Vfmadd213ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmadd213ps xmm2,xmm6,[rax]
C4E249 A8 10, VEX_Vfmadd213ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vfmadd213ps ymm2,ymm6,ymm3
C4E24D A8 D3, VEX_Vfmadd213ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfmadd213ps ymm2,ymm6,[rax]
C4E24D A8 10, VEX_Vfmadd213ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vfmadd213pd xmm2,xmm6,xmm3
C4E2C9 A8 D3, VEX_Vfmadd213pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmadd213pd xmm2,xmm6,[rax]
C4E2C9 A8 10, VEX_Vfmadd213pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vfmadd213pd ymm2,ymm6,ymm3
C4E2CD A8 D3, VEX_Vfmadd213pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfmadd213pd ymm2,ymm6,[rax]
C4E2CD A8 10, VEX_Vfmadd213pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vfmadd213ps xmm2,xmm6,[rax+10h]
62 F24D08 A8 50 01, EVEX_Vfmadd213ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vfmadd213ps xmm18{k3},xmm14,xmm3
62 E20D0B A8 D3, EVEX_Vfmadd213ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmadd213ps xmm2{k3}{z},xmm6,xmm3
62 F24D8B A8 D3, EVEX_Vfmadd213ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmadd213ps ymm2,ymm6,[rax+20h]
62 F24D28 A8 50 01, EVEX_Vfmadd213ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vfmadd213ps ymm18{k3},ymm14,ymm3
62 E20D2B A8 D3, EVEX_Vfmadd213ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfmadd213ps ymm2{k3}{z},ymm6,ymm3
62 F24DAB A8 D3, EVEX_Vfmadd213ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfmadd213ps zmm2,zmm6,[rax+40h]
62 F24D48 A8 50 01, EVEX_Vfmadd213ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vfmadd213ps zmm2{k3},zmm6,zmm3 {rn-sae}
62 F24D1B A8 D3, EVEX_Vfmadd213ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmadd213ps zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F24DDB A8 D3, EVEX_Vfmadd213ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmadd213pd xmm2,xmm6,[rax+10h]
62 F2CD08 A8 50 01, EVEX_Vfmadd213pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vfmadd213pd xmm18{k3},xmm14,xmm3
62 E28D0B A8 D3, EVEX_Vfmadd213pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmadd213pd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B A8 D3, EVEX_Vfmadd213pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmadd213pd ymm2,ymm6,[rax+20h]
62 F2CD28 A8 50 01, EVEX_Vfmadd213pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vfmadd213pd ymm18{k3},ymm14,ymm3
62 E28D2B A8 D3, EVEX_Vfmadd213pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfmadd213pd ymm2{k3}{z},ymm6,ymm3
62 F2CDAB A8 D3, EVEX_Vfmadd213pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfmadd213pd zmm2,zmm6,[rax+40h]
62 F2CD48 A8 50 01, EVEX_Vfmadd213pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vfmadd213pd zmm2{k3},zmm6,zmm3 {rn-sae}
62 F2CD1B A8 D3, EVEX_Vfmadd213pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmadd213pd zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F2CDDB A8 D3, EVEX_Vfmadd213pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmadd213ss xmm2,xmm6,xmm3
C4E249 A9 D3, VEX_Vfmadd213ss_xmm_xmm_xmmm32, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmadd213ss xmm2,xmm6,[rax]
C4E249 A9 10, VEX_Vfmadd213ss_xmm_xmm_xmmm32, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Float32
# vfmadd213sd xmm2,xmm6,xmm3
C4E2C9 A9 D3, VEX_Vfmadd213sd_xmm_xmm_xmmm64, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmadd213sd xmm2,xmm6,[rax]
C4E2C9 A9 10, VEX_Vfmadd213sd_xmm_xmm_xmmm64, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Float64
# vfmadd213ss xmm2,xmm6,[rax+4]
62 F24D08 A9 50 01, EVEX_Vfmadd213ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vfmadd213ss xmm18{k3},xmm14,xmm3
62 E20D0B A9 D3, EVEX_Vfmadd213ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmadd213ss xmm2{k3}{z},xmm6,xmm3
62 F24D8B A9 D3, EVEX_Vfmadd213ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmadd213sd xmm2,xmm6,[rax+8]
62 F2CD08 A9 50 01, EVEX_Vfmadd213sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vfmadd213sd xmm18{k3},xmm14,xmm3
62 E28D0B A9 D3, EVEX_Vfmadd213sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmadd213sd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B A9 D3, EVEX_Vfmadd213sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmsub213ps xmm2,xmm6,xmm3
C4E249 AA D3, VEX_Vfmsub213ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmsub213ps xmm2,xmm6,[rax]
C4E249 AA 10, VEX_Vfmsub213ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vfmsub213ps ymm2,ymm6,ymm3
C4E24D AA D3, VEX_Vfmsub213ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfmsub213ps ymm2,ymm6,[rax]
C4E24D AA 10, VEX_Vfmsub213ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vfmsub213pd xmm2,xmm6,xmm3
C4E2C9 AA D3, VEX_Vfmsub213pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmsub213pd xmm2,xmm6,[rax]
C4E2C9 AA 10, VEX_Vfmsub213pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vfmsub213pd ymm2,ymm6,ymm3
C4E2CD AA D3, VEX_Vfmsub213pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfmsub213pd ymm2,ymm6,[rax]
C4E2CD AA 10, VEX_Vfmsub213pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vfmsub213ps xmm2,xmm6,[rax+10h]
62 F24D08 AA 50 01, EVEX_Vfmsub213ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vfmsub213ps xmm18{k3},xmm14,xmm3
62 E20D0B AA D3, EVEX_Vfmsub213ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmsub213ps xmm2{k3}{z},xmm6,xmm3
62 F24D8B AA D3, EVEX_Vfmsub213ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmsub213ps ymm2,ymm6,[rax+20h]
62 F24D28 AA 50 01, EVEX_Vfmsub213ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vfmsub213ps ymm18{k3},ymm14,ymm3
62 E20D2B AA D3, EVEX_Vfmsub213ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfmsub213ps ymm2{k3}{z},ymm6,ymm3
62 F24DAB AA D3, EVEX_Vfmsub213ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfmsub213ps zmm2,zmm6,[rax+40h]
62 F24D48 AA 50 01, EVEX_Vfmsub213ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vfmsub213ps zmm2{k3},zmm6,zmm3 {rn-sae}
62 F24D1B AA D3, EVEX_Vfmsub213ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmsub213ps zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F24DDB AA D3, EVEX_Vfmsub213ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmsub213pd xmm2,xmm6,[rax+10h]
62 F2CD08 AA 50 01, EVEX_Vfmsub213pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vfmsub213pd xmm18{k3},xmm14,xmm3
62 E28D0B AA D3, EVEX_Vfmsub213pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmsub213pd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B AA D3, EVEX_Vfmsub213pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmsub213pd ymm2,ymm6,[rax+20h]
62 F2CD28 AA 50 01, EVEX_Vfmsub213pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vfmsub213pd ymm18{k3},ymm14,ymm3
62 E28D2B AA D3, EVEX_Vfmsub213pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfmsub213pd ymm2{k3}{z},ymm6,ymm3
62 F2CDAB AA D3, EVEX_Vfmsub213pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfmsub213pd zmm2,zmm6,[rax+40h]
62 F2CD48 AA 50 01, EVEX_Vfmsub213pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vfmsub213pd zmm2{k3},zmm6,zmm3 {rn-sae}
62 F2CD1B AA D3, EVEX_Vfmsub213pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmsub213pd zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F2CDDB AA D3, EVEX_Vfmsub213pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# v4fnmaddps zmm10,zmm22,[rax+10h]
62 724F40 AA 50 01, EVEX_V4fnmaddps_zmm_k1z_zmmp3_m128, EVEX, AVX512_4FMAPS, op0=rw op1=r op2=r w=vmm10 r=zmm10 r=zmm20 r=zmm21 r=zmm22 r=zmm23 r=rax rm=ds:rax+0x10;Packed128_Float32
# v4fnmaddps zmm2{k3},zmm6,[rax+10h]
62 F24F4B AA 50 01, EVEX_V4fnmaddps_zmm_k1z_zmmp3_m128, EVEX, AVX512_4FMAPS, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=zmm2 r=k3 r=zmm4 r=zmm5 r=zmm6 r=zmm7 r=rax rm=ds:rax+0x10;Packed128_Float32
# v4fnmaddps zmm18{k3}{z},zmm14,[rax+10h]
62 E20FCB AA 50 01, EVEX_V4fnmaddps_zmm_k1z_zmmp3_m128, EVEX, AVX512_4FMAPS, op0=rw op1=r op2=r w=vmm18 r=zmm18 r=k3 r=zmm12 r=zmm13 r=zmm14 r=zmm15 r=rax rm=ds:rax+0x10;Packed128_Float32
# vfmsub213ss xmm2,xmm6,xmm3
C4E249 AB D3, VEX_Vfmsub213ss_xmm_xmm_xmmm32, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmsub213ss xmm2,xmm6,[rax]
C4E249 AB 10, VEX_Vfmsub213ss_xmm_xmm_xmmm32, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Float32
# vfmsub213sd xmm2,xmm6,xmm3
C4E2C9 AB D3, VEX_Vfmsub213sd_xmm_xmm_xmmm64, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmsub213sd xmm2,xmm6,[rax]
C4E2C9 AB 10, VEX_Vfmsub213sd_xmm_xmm_xmmm64, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Float64
# vfmsub213ss xmm2,xmm6,[rax+4]
62 F24D08 AB 50 01, EVEX_Vfmsub213ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vfmsub213ss xmm18{k3},xmm14,xmm3
62 E20D0B AB D3, EVEX_Vfmsub213ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmsub213ss xmm2{k3}{z},xmm6,xmm3
62 F24D8B AB D3, EVEX_Vfmsub213ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmsub213sd xmm2,xmm6,[rax+8]
62 F2CD08 AB 50 01, EVEX_Vfmsub213sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vfmsub213sd xmm18{k3},xmm14,xmm3
62 E28D0B AB D3, EVEX_Vfmsub213sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmsub213sd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B AB D3, EVEX_Vfmsub213sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# v4fnmaddss xmm10,xmm22,xmmword ptr [rax+10h]
62 724F00 AB 50 01, EVEX_V4fnmaddss_xmm_k1z_xmmp3_m128, EVEX, AVX512_4FMAPS, op0=rw op1=r op2=r w=vmm10 r=xmm10 r=xmm20 r=xmm21 r=xmm22 r=xmm23 r=rax rm=ds:rax+0x10;Packed128_Float32
# v4fnmaddss xmm2{k3},xmm6,xmmword ptr [rax+10h]
62 F24F0B AB 50 01, EVEX_V4fnmaddss_xmm_k1z_xmmp3_m128, EVEX, AVX512_4FMAPS, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm2 r=k3 r=xmm4 r=xmm5 r=xmm6 r=xmm7 r=rax rm=ds:rax+0x10;Packed128_Float32
# v4fnmaddss xmm18{k3}{z},xmm14,xmmword ptr [rax+10h]
62 E20F8B AB 50 01, EVEX_V4fnmaddss_xmm_k1z_xmmp3_m128, EVEX, AVX512_4FMAPS, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm12 r=xmm13 r=xmm14 r=xmm15 r=rax rm=ds:rax+0x10;Packed128_Float32
# vfnmadd213ps xmm2,xmm6,xmm3
C4E249 AC D3, VEX_Vfnmadd213ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfnmadd213ps xmm2,xmm6,[rax]
C4E249 AC 10, VEX_Vfnmadd213ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vfnmadd213ps ymm2,ymm6,ymm3
C4E24D AC D3, VEX_Vfnmadd213ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfnmadd213ps ymm2,ymm6,[rax]
C4E24D AC 10, VEX_Vfnmadd213ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vfnmadd213pd xmm2,xmm6,xmm3
C4E2C9 AC D3, VEX_Vfnmadd213pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfnmadd213pd xmm2,xmm6,[rax]
C4E2C9 AC 10, VEX_Vfnmadd213pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vfnmadd213pd ymm2,ymm6,ymm3
C4E2CD AC D3, VEX_Vfnmadd213pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfnmadd213pd ymm2,ymm6,[rax]
C4E2CD AC 10, VEX_Vfnmadd213pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vfnmadd213ps xmm2,xmm6,[rax+10h]
62 F24D08 AC 50 01, EVEX_Vfnmadd213ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vfnmadd213ps xmm18{k3},xmm14,xmm3
62 E20D0B AC D3, EVEX_Vfnmadd213ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfnmadd213ps xmm2{k3}{z},xmm6,xmm3
62 F24D8B AC D3, EVEX_Vfnmadd213ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfnmadd213ps ymm2,ymm6,[rax+20h]
62 F24D28 AC 50 01, EVEX_Vfnmadd213ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vfnmadd213ps ymm18{k3},ymm14,ymm3
62 E20D2B AC D3, EVEX_Vfnmadd213ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfnmadd213ps ymm2{k3}{z},ymm6,ymm3
62 F24DAB AC D3, EVEX_Vfnmadd213ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfnmadd213ps zmm2,zmm6,[rax+40h]
62 F24D48 AC 50 01, EVEX_Vfnmadd213ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vfnmadd213ps zmm2{k3},zmm6,zmm3 {rn-sae}
62 F24D1B AC D3, EVEX_Vfnmadd213ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfnmadd213ps zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F24DDB AC D3, EVEX_Vfnmadd213ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfnmadd213pd xmm2,xmm6,[rax+10h]
62 F2CD08 AC 50 01, EVEX_Vfnmadd213pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vfnmadd213pd xmm18{k3},xmm14,xmm3
62 E28D0B AC D3, EVEX_Vfnmadd213pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfnmadd213pd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B AC D3, EVEX_Vfnmadd213pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfnmadd213pd ymm2,ymm6,[rax+20h]
62 F2CD28 AC 50 01, EVEX_Vfnmadd213pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vfnmadd213pd ymm18{k3},ymm14,ymm3
62 E28D2B AC D3, EVEX_Vfnmadd213pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfnmadd213pd ymm2{k3}{z},ymm6,ymm3
62 F2CDAB AC D3, EVEX_Vfnmadd213pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfnmadd213pd zmm2,zmm6,[rax+40h]
62 F2CD48 AC 50 01, EVEX_Vfnmadd213pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vfnmadd213pd zmm2{k3},zmm6,zmm3 {rn-sae}
62 F2CD1B AC D3, EVEX_Vfnmadd213pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfnmadd213pd zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F2CDDB AC D3, EVEX_Vfnmadd213pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfnmadd213ss xmm2,xmm6,xmm3
C4E249 AD D3, VEX_Vfnmadd213ss_xmm_xmm_xmmm32, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfnmadd213ss xmm2,xmm6,[rax]
C4E249 AD 10, VEX_Vfnmadd213ss_xmm_xmm_xmmm32, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Float32
# vfnmadd213sd xmm2,xmm6,xmm3
C4E2C9 AD D3, VEX_Vfnmadd213sd_xmm_xmm_xmmm64, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfnmadd213sd xmm2,xmm6,[rax]
C4E2C9 AD 10, VEX_Vfnmadd213sd_xmm_xmm_xmmm64, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Float64
# vfnmadd213ss xmm2,xmm6,[rax+4]
62 F24D08 AD 50 01, EVEX_Vfnmadd213ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vfnmadd213ss xmm18{k3},xmm14,xmm3
62 E20D0B AD D3, EVEX_Vfnmadd213ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfnmadd213ss xmm2{k3}{z},xmm6,xmm3
62 F24D8B AD D3, EVEX_Vfnmadd213ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfnmadd213sd xmm2,xmm6,[rax+8]
62 F2CD08 AD 50 01, EVEX_Vfnmadd213sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vfnmadd213sd xmm18{k3},xmm14,xmm3
62 E28D0B AD D3, EVEX_Vfnmadd213sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfnmadd213sd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B AD D3, EVEX_Vfnmadd213sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfnmsub213ps xmm2,xmm6,xmm3
C4E249 AE D3, VEX_Vfnmsub213ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfnmsub213ps xmm2,xmm6,[rax]
C4E249 AE 10, VEX_Vfnmsub213ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vfnmsub213ps ymm2,ymm6,ymm3
C4E24D AE D3, VEX_Vfnmsub213ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfnmsub213ps ymm2,ymm6,[rax]
C4E24D AE 10, VEX_Vfnmsub213ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vfnmsub213pd xmm2,xmm6,xmm3
C4E2C9 AE D3, VEX_Vfnmsub213pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfnmsub213pd xmm2,xmm6,[rax]
C4E2C9 AE 10, VEX_Vfnmsub213pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vfnmsub213pd ymm2,ymm6,ymm3
C4E2CD AE D3, VEX_Vfnmsub213pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfnmsub213pd ymm2,ymm6,[rax]
C4E2CD AE 10, VEX_Vfnmsub213pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vfnmsub213ps xmm2,xmm6,[rax+10h]
62 F24D08 AE 50 01, EVEX_Vfnmsub213ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vfnmsub213ps xmm18{k3},xmm14,xmm3
62 E20D0B AE D3, EVEX_Vfnmsub213ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfnmsub213ps xmm2{k3}{z},xmm6,xmm3
62 F24D8B AE D3, EVEX_Vfnmsub213ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfnmsub213ps ymm2,ymm6,[rax+20h]
62 F24D28 AE 50 01, EVEX_Vfnmsub213ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vfnmsub213ps ymm18{k3},ymm14,ymm3
62 E20D2B AE D3, EVEX_Vfnmsub213ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfnmsub213ps ymm2{k3}{z},ymm6,ymm3
62 F24DAB AE D3, EVEX_Vfnmsub213ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfnmsub213ps zmm2,zmm6,[rax+40h]
62 F24D48 AE 50 01, EVEX_Vfnmsub213ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vfnmsub213ps zmm2{k3},zmm6,zmm3 {rn-sae}
62 F24D1B AE D3, EVEX_Vfnmsub213ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfnmsub213ps zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F24DDB AE D3, EVEX_Vfnmsub213ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfnmsub213pd xmm2,xmm6,[rax+10h]
62 F2CD08 AE 50 01, EVEX_Vfnmsub213pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vfnmsub213pd xmm18{k3},xmm14,xmm3
62 E28D0B AE D3, EVEX_Vfnmsub213pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfnmsub213pd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B AE D3, EVEX_Vfnmsub213pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfnmsub213pd ymm2,ymm6,[rax+20h]
62 F2CD28 AE 50 01, EVEX_Vfnmsub213pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vfnmsub213pd ymm18{k3},ymm14,ymm3
62 E28D2B AE D3, EVEX_Vfnmsub213pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfnmsub213pd ymm2{k3}{z},ymm6,ymm3
62 F2CDAB AE D3, EVEX_Vfnmsub213pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfnmsub213pd zmm2,zmm6,[rax+40h]
62 F2CD48 AE 50 01, EVEX_Vfnmsub213pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vfnmsub213pd zmm2{k3},zmm6,zmm3 {rn-sae}
62 F2CD1B AE D3, EVEX_Vfnmsub213pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfnmsub213pd zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F2CDDB AE D3, EVEX_Vfnmsub213pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfnmsub213ss xmm2,xmm6,xmm3
C4E249 AF D3, VEX_Vfnmsub213ss_xmm_xmm_xmmm32, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfnmsub213ss xmm2,xmm6,[rax]
C4E249 AF 10, VEX_Vfnmsub213ss_xmm_xmm_xmmm32, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Float32
# vfnmsub213sd xmm2,xmm6,xmm3
C4E2C9 AF D3, VEX_Vfnmsub213sd_xmm_xmm_xmmm64, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfnmsub213sd xmm2,xmm6,[rax]
C4E2C9 AF 10, VEX_Vfnmsub213sd_xmm_xmm_xmmm64, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Float64
# vfnmsub213ss xmm2,xmm6,[rax+4]
62 F24D08 AF 50 01, EVEX_Vfnmsub213ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vfnmsub213ss xmm18{k3},xmm14,xmm3
62 E20D0B AF D3, EVEX_Vfnmsub213ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfnmsub213ss xmm2{k3}{z},xmm6,xmm3
62 F24D8B AF D3, EVEX_Vfnmsub213ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfnmsub213sd xmm2,xmm6,[rax+8]
62 F2CD08 AF 50 01, EVEX_Vfnmsub213sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vfnmsub213sd xmm18{k3},xmm14,xmm3
62 E28D0B AF D3, EVEX_Vfnmsub213sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfnmsub213sd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B AF D3, EVEX_Vfnmsub213sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpmadd52luq xmm2,xmm6,[rax+10h]
62 F2CD08 B4 50 01, EVEX_Vpmadd52luq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512_IFMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt52
# vpmadd52luq xmm18{k3},xmm14,xmm3
62 E28D0B B4 D3, EVEX_Vpmadd52luq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512_IFMA, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpmadd52luq xmm2{k3}{z},xmm6,xmm3
62 F2CD8B B4 D3, EVEX_Vpmadd52luq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512_IFMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpmadd52luq ymm2,ymm6,[rax+20h]
62 F2CD28 B4 50 01, EVEX_Vpmadd52luq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512_IFMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt52
# vpmadd52luq ymm18{k3},ymm14,ymm3
62 E28D2B B4 D3, EVEX_Vpmadd52luq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512_IFMA, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpmadd52luq ymm2{k3}{z},ymm6,ymm3
62 F2CDAB B4 D3, EVEX_Vpmadd52luq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512_IFMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpmadd52luq zmm2,zmm6,[rax+40h]
62 F2CD48 B4 50 01, EVEX_Vpmadd52luq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512_IFMA, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt52
# vpmadd52luq zmm18{k3},zmm14,zmm3
62 E28D4B B4 D3, EVEX_Vpmadd52luq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512_IFMA, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpmadd52luq zmm2{k3}{z},zmm6,zmm3
62 F2CDCB B4 D3, EVEX_Vpmadd52luq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512_IFMA, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpmadd52huq xmm2,xmm6,[rax+10h]
62 F2CD08 B5 50 01, EVEX_Vpmadd52huq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512_IFMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt52
# vpmadd52huq xmm18{k3},xmm14,xmm3
62 E28D0B B5 D3, EVEX_Vpmadd52huq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512_IFMA, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpmadd52huq xmm2{k3}{z},xmm6,xmm3
62 F2CD8B B5 D3, EVEX_Vpmadd52huq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512_IFMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpmadd52huq ymm2,ymm6,[rax+20h]
62 F2CD28 B5 50 01, EVEX_Vpmadd52huq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512_IFMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt52
# vpmadd52huq ymm18{k3},ymm14,ymm3
62 E28D2B B5 D3, EVEX_Vpmadd52huq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512_IFMA, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpmadd52huq ymm2{k3}{z},ymm6,ymm3
62 F2CDAB B5 D3, EVEX_Vpmadd52huq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512_IFMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpmadd52huq zmm2,zmm6,[rax+40h]
62 F2CD48 B5 50 01, EVEX_Vpmadd52huq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512_IFMA, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt52
# vpmadd52huq zmm18{k3},zmm14,zmm3
62 E28D4B B5 D3, EVEX_Vpmadd52huq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512_IFMA, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpmadd52huq zmm2{k3}{z},zmm6,zmm3
62 F2CDCB B5 D3, EVEX_Vpmadd52huq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512_IFMA, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmaddsub231ps xmm2,xmm6,xmm3
C4E249 B6 D3, VEX_Vfmaddsub231ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmaddsub231ps xmm2,xmm6,[rax]
C4E249 B6 10, VEX_Vfmaddsub231ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vfmaddsub231ps ymm2,ymm6,ymm3
C4E24D B6 D3, VEX_Vfmaddsub231ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfmaddsub231ps ymm2,ymm6,[rax]
C4E24D B6 10, VEX_Vfmaddsub231ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vfmaddsub231pd xmm2,xmm6,xmm3
C4E2C9 B6 D3, VEX_Vfmaddsub231pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmaddsub231pd xmm2,xmm6,[rax]
C4E2C9 B6 10, VEX_Vfmaddsub231pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vfmaddsub231pd ymm2,ymm6,ymm3
C4E2CD B6 D3, VEX_Vfmaddsub231pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfmaddsub231pd ymm2,ymm6,[rax]
C4E2CD B6 10, VEX_Vfmaddsub231pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vfmaddsub231ps xmm2,xmm6,[rax+10h]
62 F24D08 B6 50 01, EVEX_Vfmaddsub231ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vfmaddsub231ps xmm18{k3},xmm14,xmm3
62 E20D0B B6 D3, EVEX_Vfmaddsub231ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmaddsub231ps xmm2{k3}{z},xmm6,xmm3
62 F24D8B B6 D3, EVEX_Vfmaddsub231ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmaddsub231ps ymm2,ymm6,[rax+20h]
62 F24D28 B6 50 01, EVEX_Vfmaddsub231ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vfmaddsub231ps ymm18{k3},ymm14,ymm3
62 E20D2B B6 D3, EVEX_Vfmaddsub231ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfmaddsub231ps ymm2{k3}{z},ymm6,ymm3
62 F24DAB B6 D3, EVEX_Vfmaddsub231ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfmaddsub231ps zmm2,zmm6,[rax+40h]
62 F24D48 B6 50 01, EVEX_Vfmaddsub231ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm6 r=zmm2 r=rax rm=ds:rax+0x40;Packed512_Float32
# vfmaddsub231ps zmm2{k3},zmm6,zmm3 {rn-sae}
62 F24D1B B6 D3, EVEX_Vfmaddsub231ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmaddsub231ps zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F24DDB B6 D3, EVEX_Vfmaddsub231ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmaddsub231pd xmm2,xmm6,[rax+10h]
62 F2CD08 B6 50 01, EVEX_Vfmaddsub231pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vfmaddsub231pd xmm18{k3},xmm14,xmm3
62 E28D0B B6 D3, EVEX_Vfmaddsub231pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmaddsub231pd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B B6 D3, EVEX_Vfmaddsub231pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmaddsub231pd ymm2,ymm6,[rax+20h]
62 F2CD28 B6 50 01, EVEX_Vfmaddsub231pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vfmaddsub231pd ymm18{k3},ymm14,ymm3
62 E28D2B B6 D3, EVEX_Vfmaddsub231pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfmaddsub231pd ymm2{k3}{z},ymm6,ymm3
62 F2CDAB B6 D3, EVEX_Vfmaddsub231pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfmaddsub231pd zmm2,zmm6,[rax+40h]
62 F2CD48 B6 50 01, EVEX_Vfmaddsub231pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vfmaddsub231pd zmm2{k3},zmm6,zmm3 {rn-sae}
62 F2CD1B B6 D3, EVEX_Vfmaddsub231pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmaddsub231pd zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F2CDDB B6 D3, EVEX_Vfmaddsub231pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmsubadd231ps xmm2,xmm6,xmm3
C4E249 B7 D3, VEX_Vfmsubadd231ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmsubadd231ps xmm2,xmm6,[rax]
C4E249 B7 10, VEX_Vfmsubadd231ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vfmsubadd231ps ymm2,ymm6,ymm3
C4E24D B7 D3, VEX_Vfmsubadd231ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfmsubadd231ps ymm2,ymm6,[rax]
C4E24D B7 10, VEX_Vfmsubadd231ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vfmsubadd231pd xmm2,xmm6,xmm3
C4E2C9 B7 D3, VEX_Vfmsubadd231pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmsubadd231pd xmm2,xmm6,[rax]
C4E2C9 B7 10, VEX_Vfmsubadd231pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vfmsubadd231pd ymm2,ymm6,ymm3
C4E2CD B7 D3, VEX_Vfmsubadd231pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfmsubadd231pd ymm2,ymm6,[rax]
C4E2CD B7 10, VEX_Vfmsubadd231pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vfmsubadd231ps xmm2,xmm6,[rax+10h]
62 F24D08 B7 50 01, EVEX_Vfmsubadd231ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vfmsubadd231ps xmm18{k3},xmm14,xmm3
62 E20D0B B7 D3, EVEX_Vfmsubadd231ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmsubadd231ps xmm2{k3}{z},xmm6,xmm3
62 F24D8B B7 D3, EVEX_Vfmsubadd231ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmsubadd231ps ymm2,ymm6,[rax+20h]
62 F24D28 B7 50 01, EVEX_Vfmsubadd231ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vfmsubadd231ps ymm18{k3},ymm14,ymm3
62 E20D2B B7 D3, EVEX_Vfmsubadd231ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfmsubadd231ps ymm2{k3}{z},ymm6,ymm3
62 F24DAB B7 D3, EVEX_Vfmsubadd231ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfmsubadd231ps zmm2,zmm6,[rax+40h]
62 F24D48 B7 50 01, EVEX_Vfmsubadd231ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vfmsubadd231ps zmm2{k3},zmm6,zmm3 {rn-sae}
62 F24D1B B7 D3, EVEX_Vfmsubadd231ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmsubadd231ps zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F24DDB B7 D3, EVEX_Vfmsubadd231ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmsubadd231pd xmm2,xmm6,[rax+10h]
62 F2CD08 B7 50 01, EVEX_Vfmsubadd231pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vfmsubadd231pd xmm18{k3},xmm14,xmm3
62 E28D0B B7 D3, EVEX_Vfmsubadd231pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmsubadd231pd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B B7 D3, EVEX_Vfmsubadd231pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmsubadd231pd ymm2,ymm6,[rax+20h]
62 F2CD28 B7 50 01, EVEX_Vfmsubadd231pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vfmsubadd231pd ymm18{k3},ymm14,ymm3
62 E28D2B B7 D3, EVEX_Vfmsubadd231pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfmsubadd231pd ymm2{k3}{z},ymm6,ymm3
62 F2CDAB B7 D3, EVEX_Vfmsubadd231pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfmsubadd231pd zmm2,zmm6,[rax+40h]
62 F2CD48 B7 50 01, EVEX_Vfmsubadd231pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vfmsubadd231pd zmm2{k3},zmm6,zmm3 {rn-sae}
62 F2CD1B B7 D3, EVEX_Vfmsubadd231pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmsubadd231pd zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F2CDDB B7 D3, EVEX_Vfmsubadd231pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmadd231ps xmm2,xmm6,xmm3
C4E249 B8 D3, VEX_Vfmadd231ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmadd231ps xmm2,xmm6,[rax]
C4E249 B8 10, VEX_Vfmadd231ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vfmadd231ps ymm2,ymm6,ymm3
C4E24D B8 D3, VEX_Vfmadd231ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfmadd231ps ymm2,ymm6,[rax]
C4E24D B8 10, VEX_Vfmadd231ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vfmadd231pd xmm2,xmm6,xmm3
C4E2C9 B8 D3, VEX_Vfmadd231pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmadd231pd xmm2,xmm6,[rax]
C4E2C9 B8 10, VEX_Vfmadd231pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vfmadd231pd ymm2,ymm6,ymm3
C4E2CD B8 D3, VEX_Vfmadd231pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfmadd231pd ymm2,ymm6,[rax]
C4E2CD B8 10, VEX_Vfmadd231pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vfmadd231ps xmm2,xmm6,[rax+10h]
62 F24D08 B8 50 01, EVEX_Vfmadd231ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vfmadd231ps xmm18{k3},xmm14,xmm3
62 E20D0B B8 D3, EVEX_Vfmadd231ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmadd231ps xmm2{k3}{z},xmm6,xmm3
62 F24D8B B8 D3, EVEX_Vfmadd231ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=k3 r=xmm6 r=xmm3
# vfmadd231ps ymm2,ymm6,[rax+20h]
62 F24D28 B8 50 01, EVEX_Vfmadd231ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vfmadd231ps ymm18{k3},ymm14,ymm3
62 E20D2B B8 D3, EVEX_Vfmadd231ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfmadd231ps ymm2{k3}{z},ymm6,ymm3
62 F24DAB B8 D3, EVEX_Vfmadd231ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfmadd231ps zmm2,zmm6,[rax+40h]
62 F24D48 B8 50 01, EVEX_Vfmadd231ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vfmadd231ps zmm2{k3},zmm6,zmm3 {rn-sae}
62 F24D1B B8 D3, EVEX_Vfmadd231ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmadd231ps zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F24DDB B8 D3, EVEX_Vfmadd231ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmadd231pd xmm2,xmm6,[rax+10h]
62 F2CD08 B8 50 01, EVEX_Vfmadd231pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vfmadd231pd xmm18{k3},xmm14,xmm3
62 E28D0B B8 D3, EVEX_Vfmadd231pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmadd231pd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B B8 D3, EVEX_Vfmadd231pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmadd231pd ymm2,ymm6,[rax+20h]
62 F2CD28 B8 50 01, EVEX_Vfmadd231pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vfmadd231pd ymm18{k3},ymm14,ymm3
62 E28D2B B8 D3, EVEX_Vfmadd231pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfmadd231pd ymm2{k3}{z},ymm6,ymm3
62 F2CDAB B8 D3, EVEX_Vfmadd231pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfmadd231pd zmm2,zmm6,[rax+40h]
62 F2CD48 B8 50 01, EVEX_Vfmadd231pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vfmadd231pd zmm2{k3},zmm6,zmm3 {rn-sae}
62 F2CD1B B8 D3, EVEX_Vfmadd231pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmadd231pd zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F2CDDB B8 D3, EVEX_Vfmadd231pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmadd231ss xmm2,xmm6,xmm3
C4E249 B9 D3, VEX_Vfmadd231ss_xmm_xmm_xmmm32, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmadd231ss xmm2,xmm6,[rax]
C4E249 B9 10, VEX_Vfmadd231ss_xmm_xmm_xmmm32, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Float32
# vfmadd231sd xmm2,xmm6,xmm3
C4E2C9 B9 D3, VEX_Vfmadd231sd_xmm_xmm_xmmm64, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmadd231sd xmm2,xmm6,[rax]
C4E2C9 B9 10, VEX_Vfmadd231sd_xmm_xmm_xmmm64, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Float64
# vfmadd231ss xmm2,xmm6,[rax+4]
62 F24D08 B9 50 01, EVEX_Vfmadd231ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vfmadd231ss xmm18{k3},xmm14,xmm3
62 E20D0B B9 D3, EVEX_Vfmadd231ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmadd231ss xmm2{k3}{z},xmm6,xmm3
62 F24D8B B9 D3, EVEX_Vfmadd231ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmadd231sd xmm2,xmm6,[rax+8]
62 F2CD08 B9 50 01, EVEX_Vfmadd231sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vfmadd231sd xmm18{k3},xmm14,xmm3
62 E28D0B B9 D3, EVEX_Vfmadd231sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmadd231sd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B B9 D3, EVEX_Vfmadd231sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmsub231ps xmm2,xmm6,xmm3
C4E249 BA D3, VEX_Vfmsub231ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmsub231ps xmm2,xmm6,[rax]
C4E249 BA 10, VEX_Vfmsub231ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vfmsub231ps ymm2,ymm6,ymm3
C4E24D BA D3, VEX_Vfmsub231ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfmsub231ps ymm2,ymm6,[rax]
C4E24D BA 10, VEX_Vfmsub231ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vfmsub231pd xmm2,xmm6,xmm3
C4E2C9 BA D3, VEX_Vfmsub231pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmsub231pd xmm2,xmm6,[rax]
C4E2C9 BA 10, VEX_Vfmsub231pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vfmsub231pd ymm2,ymm6,ymm3
C4E2CD BA D3, VEX_Vfmsub231pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfmsub231pd ymm2,ymm6,[rax]
C4E2CD BA 10, VEX_Vfmsub231pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vfmsub231ps xmm2,xmm6,[rax+10h]
62 F24D08 BA 50 01, EVEX_Vfmsub231ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vfmsub231ps xmm18{k3},xmm14,xmm3
62 E20D0B BA D3, EVEX_Vfmsub231ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmsub231ps xmm2{k3}{z},xmm6,xmm3
62 F24D8B BA D3, EVEX_Vfmsub231ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmsub231ps ymm2,ymm6,[rax+20h]
62 F24D28 BA 50 01, EVEX_Vfmsub231ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vfmsub231ps ymm18{k3},ymm14,ymm3
62 E20D2B BA D3, EVEX_Vfmsub231ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfmsub231ps ymm2{k3}{z},ymm6,ymm3
62 F24DAB BA D3, EVEX_Vfmsub231ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfmsub231ps zmm2,zmm6,[rax+40h]
62 F24D48 BA 50 01, EVEX_Vfmsub231ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vfmsub231ps zmm2{k3},zmm6,zmm3 {rn-sae}
62 F24D1B BA D3, EVEX_Vfmsub231ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmsub231ps zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F24DDB BA D3, EVEX_Vfmsub231ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmsub231pd xmm2,xmm6,[rax+10h]
62 F2CD08 BA 50 01, EVEX_Vfmsub231pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vfmsub231pd xmm18{k3},xmm14,xmm3
62 E28D0B BA D3, EVEX_Vfmsub231pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmsub231pd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B BA D3, EVEX_Vfmsub231pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmsub231pd ymm2,ymm6,[rax+20h]
62 F2CD28 BA 50 01, EVEX_Vfmsub231pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vfmsub231pd ymm18{k3},ymm14,ymm3
62 E28D2B BA D3, EVEX_Vfmsub231pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfmsub231pd ymm2{k3}{z},ymm6,ymm3
62 F2CDAB BA D3, EVEX_Vfmsub231pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfmsub231pd zmm2,zmm6,[rax+40h]
62 F2CD48 BA 50 01, EVEX_Vfmsub231pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vfmsub231pd zmm2{k3},zmm6,zmm3 {rn-sae}
62 F2CD1B BA D3, EVEX_Vfmsub231pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmsub231pd zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F2CDDB BA D3, EVEX_Vfmsub231pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfmsub231ss xmm2,xmm6,xmm3
C4E249 BB D3, VEX_Vfmsub231ss_xmm_xmm_xmmm32, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmsub231ss xmm2,xmm6,[rax]
C4E249 BB 10, VEX_Vfmsub231ss_xmm_xmm_xmmm32, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Float32
# vfmsub231sd xmm2,xmm6,xmm3
C4E2C9 BB D3, VEX_Vfmsub231sd_xmm_xmm_xmmm64, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfmsub231sd xmm2,xmm6,[rax]
C4E2C9 BB 10, VEX_Vfmsub231sd_xmm_xmm_xmmm64, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Float64
# vfmsub231ss xmm2,xmm6,[rax+4]
62 F24D08 BB 50 01, EVEX_Vfmsub231ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vfmsub231ss xmm18{k3},xmm14,xmm3
62 E20D0B BB D3, EVEX_Vfmsub231ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmsub231ss xmm2{k3}{z},xmm6,xmm3
62 F24D8B BB D3, EVEX_Vfmsub231ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfmsub231sd xmm2,xmm6,[rax+8]
62 F2CD08 BB 50 01, EVEX_Vfmsub231sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vfmsub231sd xmm18{k3},xmm14,xmm3
62 E28D0B BB D3, EVEX_Vfmsub231sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfmsub231sd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B BB D3, EVEX_Vfmsub231sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfnmadd231ps xmm2,xmm6,xmm3
C4E249 BC D3, VEX_Vfnmadd231ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfnmadd231ps xmm2,xmm6,[rax]
C4E249 BC 10, VEX_Vfnmadd231ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vfnmadd231ps ymm2,ymm6,ymm3
C4E24D BC D3, VEX_Vfnmadd231ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfnmadd231ps ymm2,ymm6,[rax]
C4E24D BC 10, VEX_Vfnmadd231ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vfnmadd231pd xmm2,xmm6,xmm3
C4E2C9 BC D3, VEX_Vfnmadd231pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfnmadd231pd xmm2,xmm6,[rax]
C4E2C9 BC 10, VEX_Vfnmadd231pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vfnmadd231pd ymm2,ymm6,ymm3
C4E2CD BC D3, VEX_Vfnmadd231pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfnmadd231pd ymm2,ymm6,[rax]
C4E2CD BC 10, VEX_Vfnmadd231pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vfnmadd231ps xmm2,xmm6,[rax+10h]
62 F24D08 BC 50 01, EVEX_Vfnmadd231ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vfnmadd231ps xmm18{k3},xmm14,xmm3
62 E20D0B BC D3, EVEX_Vfnmadd231ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfnmadd231ps xmm2{k3}{z},xmm6,xmm3
62 F24D8B BC D3, EVEX_Vfnmadd231ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfnmadd231ps ymm2,ymm6,[rax+20h]
62 F24D28 BC 50 01, EVEX_Vfnmadd231ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vfnmadd231ps ymm18{k3},ymm14,ymm3
62 E20D2B BC D3, EVEX_Vfnmadd231ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfnmadd231ps ymm2{k3}{z},ymm6,ymm3
62 F24DAB BC D3, EVEX_Vfnmadd231ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfnmadd231ps zmm2,zmm6,[rax+40h]
62 F24D48 BC 50 01, EVEX_Vfnmadd231ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vfnmadd231ps zmm2{k3},zmm6,zmm3 {rn-sae}
62 F24D1B BC D3, EVEX_Vfnmadd231ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfnmadd231ps zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F24DDB BC D3, EVEX_Vfnmadd231ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfnmadd231pd xmm2,xmm6,[rax+10h]
62 F2CD08 BC 50 01, EVEX_Vfnmadd231pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vfnmadd231pd xmm18{k3},xmm14,xmm3
62 E28D0B BC D3, EVEX_Vfnmadd231pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfnmadd231pd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B BC D3, EVEX_Vfnmadd231pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfnmadd231pd ymm2,ymm6,[rax+20h]
62 F2CD28 BC 50 01, EVEX_Vfnmadd231pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vfnmadd231pd ymm18{k3},ymm14,ymm3
62 E28D2B BC D3, EVEX_Vfnmadd231pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfnmadd231pd ymm2{k3}{z},ymm6,ymm3
62 F2CDAB BC D3, EVEX_Vfnmadd231pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfnmadd231pd zmm2,zmm6,[rax+40h]
62 F2CD48 BC 50 01, EVEX_Vfnmadd231pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vfnmadd231pd zmm2{k3},zmm6,zmm3 {rn-sae}
62 F2CD1B BC D3, EVEX_Vfnmadd231pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfnmadd231pd zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F2CDDB BC D3, EVEX_Vfnmadd231pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfnmadd231ss xmm2,xmm6,xmm3
C4E249 BD D3, VEX_Vfnmadd231ss_xmm_xmm_xmmm32, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfnmadd231ss xmm2,xmm6,[rax]
C4E249 BD 10, VEX_Vfnmadd231ss_xmm_xmm_xmmm32, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Float32
# vfnmadd231sd xmm2,xmm6,xmm3
C4E2C9 BD D3, VEX_Vfnmadd231sd_xmm_xmm_xmmm64, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfnmadd231sd xmm2,xmm6,[rax]
C4E2C9 BD 10, VEX_Vfnmadd231sd_xmm_xmm_xmmm64, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Float64
# vfnmadd231ss xmm2,xmm6,[rax+4]
62 F24D08 BD 50 01, EVEX_Vfnmadd231ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vfnmadd231ss xmm18{k3},xmm14,xmm3
62 E20D0B BD D3, EVEX_Vfnmadd231ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfnmadd231ss xmm2{k3}{z},xmm6,xmm3
62 F24D8B BD D3, EVEX_Vfnmadd231ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfnmadd231sd xmm2,xmm6,[rax+8]
62 F2CD08 BD 50 01, EVEX_Vfnmadd231sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vfnmadd231sd xmm18{k3},xmm14,xmm3
62 E28D0B BD D3, EVEX_Vfnmadd231sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfnmadd231sd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B BD D3, EVEX_Vfnmadd231sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfnmsub231ps xmm2,xmm6,xmm3
C4E249 BE D3, VEX_Vfnmsub231ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfnmsub231ps xmm2,xmm6,[rax]
C4E249 BE 10, VEX_Vfnmsub231ps_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vfnmsub231ps ymm2,ymm6,ymm3
C4E24D BE D3, VEX_Vfnmsub231ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfnmsub231ps ymm2,ymm6,[rax]
C4E24D BE 10, VEX_Vfnmsub231ps_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# vfnmsub231pd xmm2,xmm6,xmm3
C4E2C9 BE D3, VEX_Vfnmsub231pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfnmsub231pd xmm2,xmm6,[rax]
C4E2C9 BE 10, VEX_Vfnmsub231pd_xmm_xmm_xmmm128, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vfnmsub231pd ymm2,ymm6,ymm3
C4E2CD BE D3, VEX_Vfnmsub231pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=ymm3
# vfnmsub231pd ymm2,ymm6,[rax]
C4E2CD BE 10, VEX_Vfnmsub231pd_ymm_ymm_ymmm256, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# vfnmsub231ps xmm2,xmm6,[rax+10h]
62 F24D08 BE 50 01, EVEX_Vfnmsub231ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vfnmsub231ps xmm18{k3},xmm14,xmm3
62 E20D0B BE D3, EVEX_Vfnmsub231ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfnmsub231ps xmm2{k3}{z},xmm6,xmm3
62 F24D8B BE D3, EVEX_Vfnmsub231ps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfnmsub231ps ymm2,ymm6,[rax+20h]
62 F24D28 BE 50 01, EVEX_Vfnmsub231ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vfnmsub231ps ymm18{k3},ymm14,ymm3
62 E20D2B BE D3, EVEX_Vfnmsub231ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfnmsub231ps ymm2{k3}{z},ymm6,ymm3
62 F24DAB BE D3, EVEX_Vfnmsub231ps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfnmsub231ps zmm2,zmm6,[rax+40h]
62 F24D48 BE 50 01, EVEX_Vfnmsub231ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vfnmsub231ps zmm2{k3},zmm6,zmm3 {rn-sae}
62 F24D1B BE D3, EVEX_Vfnmsub231ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfnmsub231ps zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F24DDB BE D3, EVEX_Vfnmsub231ps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfnmsub231pd xmm2,xmm6,[rax+10h]
62 F2CD08 BE 50 01, EVEX_Vfnmsub231pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vfnmsub231pd xmm18{k3},xmm14,xmm3
62 E28D0B BE D3, EVEX_Vfnmsub231pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfnmsub231pd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B BE D3, EVEX_Vfnmsub231pd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfnmsub231pd ymm2,ymm6,[rax+20h]
62 F2CD28 BE 50 01, EVEX_Vfnmsub231pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vfnmsub231pd ymm18{k3},ymm14,ymm3
62 E28D2B BE D3, EVEX_Vfnmsub231pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfnmsub231pd ymm2{k3}{z},ymm6,ymm3
62 F2CDAB BE D3, EVEX_Vfnmsub231pd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfnmsub231pd zmm2,zmm6,[rax+40h]
62 F2CD48 BE 50 01, EVEX_Vfnmsub231pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vfnmsub231pd zmm2{k3},zmm6,zmm3 {rn-sae}
62 F2CD1B BE D3, EVEX_Vfnmsub231pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfnmsub231pd zmm2{k3}{z},zmm6,zmm3 {ru-sae}
62 F2CDDB BE D3, EVEX_Vfnmsub231pd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfnmsub231ss xmm2,xmm6,xmm3
C4E249 BF D3, VEX_Vfnmsub231ss_xmm_xmm_xmmm32, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfnmsub231ss xmm2,xmm6,[rax]
C4E249 BF 10, VEX_Vfnmsub231ss_xmm_xmm_xmmm32, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Float32
# vfnmsub231sd xmm2,xmm6,xmm3
C4E2C9 BF D3, VEX_Vfnmsub231sd_xmm_xmm_xmmm64, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=xmm3
# vfnmsub231sd xmm2,xmm6,[rax]
C4E2C9 BF 10, VEX_Vfnmsub231sd_xmm_xmm_xmmm64, VEX, FMA, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax;Float64
# vfnmsub231ss xmm2,xmm6,[rax+4]
62 F24D08 BF 50 01, EVEX_Vfnmsub231ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vfnmsub231ss xmm18{k3},xmm14,xmm3
62 E20D0B BF D3, EVEX_Vfnmsub231ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfnmsub231ss xmm2{k3}{z},xmm6,xmm3
62 F24D8B BF D3, EVEX_Vfnmsub231ss_xmm_k1z_xmm_xmmm32_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfnmsub231sd xmm2,xmm6,[rax+8]
62 F2CD08 BF 50 01, EVEX_Vfnmsub231sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vfnmsub231sd xmm18{k3},xmm14,xmm3
62 E28D0B BF D3, EVEX_Vfnmsub231sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfnmsub231sd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B BF D3, EVEX_Vfnmsub231sd_xmm_k1z_xmm_xmmm64_er, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpconflictd xmm2,[rax+10h]
62 F27D08 C4 50 01, EVEX_Vpconflictd_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512CD, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpconflictd xmm18{k3},xmm3
62 E27D0B C4 D3, EVEX_Vpconflictd_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512CD, op0=rw op1=r w=vmm18 r=xmm18 r=k3 r=xmm3
# vpconflictd xmm2{k3}{z},xmm3
62 F27D8B C4 D3, EVEX_Vpconflictd_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512CD, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vpconflictd ymm2,[rax+20h]
62 F27D28 C4 50 01, EVEX_Vpconflictd_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512CD, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpconflictd ymm18{k3},ymm3
62 E27D2B C4 D3, EVEX_Vpconflictd_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512CD, op0=rw op1=r w=vmm18 r=ymm18 r=k3 r=ymm3
# vpconflictd ymm2{k3}{z},ymm3
62 F27DAB C4 D3, EVEX_Vpconflictd_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512CD, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vpconflictd zmm2,[rax+40h]
62 F27D48 C4 50 01, EVEX_Vpconflictd_zmm_k1z_zmmm512b32, EVEX, AVX512CD, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpconflictd zmm18{k3},zmm3
62 E27D4B C4 D3, EVEX_Vpconflictd_zmm_k1z_zmmm512b32, EVEX, AVX512CD, op0=rcw op1=r cw=vmm18 r=zmm18 r=k3 r=zmm3
# vpconflictd zmm2{k3}{z},zmm3
62 F27DCB C4 D3, EVEX_Vpconflictd_zmm_k1z_zmmm512b32, EVEX, AVX512CD, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vpconflictq xmm2,[rax+10h]
62 F2FD08 C4 50 01, EVEX_Vpconflictq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512CD, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpconflictq xmm18{k3},xmm3
62 E2FD0B C4 D3, EVEX_Vpconflictq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512CD, op0=rw op1=r w=vmm18 r=xmm18 r=k3 r=xmm3
# vpconflictq xmm2{k3}{z},xmm3
62 F2FD8B C4 D3, EVEX_Vpconflictq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512CD, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vpconflictq ymm2,[rax+20h]
62 F2FD28 C4 50 01, EVEX_Vpconflictq_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512CD, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpconflictq ymm18{k3},ymm3
62 E2FD2B C4 D3, EVEX_Vpconflictq_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512CD, op0=rw op1=r w=vmm18 r=ymm18 r=k3 r=ymm3
# vpconflictq ymm2{k3}{z},ymm3
62 F2FDAB C4 D3, EVEX_Vpconflictq_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512CD, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vpconflictq zmm2,[rax+40h]
62 F2FD48 C4 50 01, EVEX_Vpconflictq_zmm_k1z_zmmm512b64, EVEX, AVX512CD, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpconflictq zmm18{k3},zmm3
62 E2FD4B C4 D3, EVEX_Vpconflictq_zmm_k1z_zmmm512b64, EVEX, AVX512CD, op0=rcw op1=r cw=vmm18 r=zmm18 r=k3 r=zmm3
# vpconflictq zmm2{k3}{z},zmm3
62 F2FDCB C4 D3, EVEX_Vpconflictq_zmm_k1z_zmmm512b64, EVEX, AVX512CD, op0=w op1=r w=vmm2 r=k3 r=zmm3
# sha1nexte xmm1,xmm5
0F38C8 CD, Sha1nexte_xmm_xmmm128, Legacy, SHA, op0=rw op1=r rw=xmm1 r=xmm5
# sha1nexte xmm1,[rax]
0F38C8 08, Sha1nexte_xmm_xmmm128, Legacy, SHA, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt32
# sha1msg1 xmm1,xmm5
0F38C9 CD, Sha1msg1_xmm_xmmm128, Legacy, SHA, op0=rw op1=r rw=xmm1 r=xmm5
# sha1msg1 xmm1,[rax]
0F38C9 08, Sha1msg1_xmm_xmmm128, Legacy, SHA, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt32
# sha1msg2 xmm1,xmm5
0F38CA CD, Sha1msg2_xmm_xmmm128, Legacy, SHA, op0=rw op1=r rw=xmm1 r=xmm5
# sha1msg2 xmm1,[rax]
0F38CA 08, Sha1msg2_xmm_xmmm128, Legacy, SHA, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt32
# sha256rnds2 xmm1,xmm5,xmm0
0F38CB CD, Sha256rnds2_xmm_xmmm128, Legacy, SHA, op0=rw op1=r rw=xmm1 r=xmm5 r=xmm0
# sha256rnds2 xmm1,[rax],xmm0
0F38CB 08, Sha256rnds2_xmm_xmmm128, Legacy, SHA, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt32 r=xmm0
# sha256msg1 xmm1,xmm5
0F38CC CD, Sha256msg1_xmm_xmmm128, Legacy, SHA, op0=rw op1=r rw=xmm1 r=xmm5
# sha256msg1 xmm1,[rax]
0F38CC 08, Sha256msg1_xmm_xmmm128, Legacy, SHA, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt32
# sha256msg2 xmm1,xmm5
0F38CD CD, Sha256msg2_xmm_xmmm128, Legacy, SHA, op0=rw op1=r rw=xmm1 r=xmm5
# sha256msg2 xmm1,[rax]
0F38CD 08, Sha256msg2_xmm_xmmm128, Legacy, SHA, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt32
# vgatherpf0dps [rcx+zmm4*4+4]{k3}
62 F27D4B C6 4C A1 01, EVEX_Vgatherpf0dps_vm32z_k1, EVEX, AVX512PF, op0=nma r=rcx r=zmm4 r=k3
# vgatherpf0dpd [rcx+ymm4*4+8]{k3}
62 F2FD4B C6 4C A1 01, EVEX_Vgatherpf0dpd_vm32y_k1, EVEX, AVX512PF, op0=nma r=rcx r=ymm4 r=k3
# vgatherpf1dps [rcx+zmm4*4+4]{k3}
62 F27D4B C6 54 A1 01, EVEX_Vgatherpf1dps_vm32z_k1, EVEX, AVX512PF, op0=nma r=rcx r=zmm4 r=k3
# vgatherpf1dpd [rcx+ymm4*4+8]{k3}
62 F2FD4B C6 54 A1 01, EVEX_Vgatherpf1dpd_vm32y_k1, EVEX, AVX512PF, op0=nma r=rcx r=ymm4 r=k3
# vscatterpf0dps [rcx+zmm4*4+4]{k3}
62 F27D4B C6 6C A1 01, EVEX_Vscatterpf0dps_vm32z_k1, EVEX, AVX512PF, op0=nma r=rcx r=zmm4 r=k3
# vscatterpf0dpd [rcx+ymm4*4+8]{k3}
62 F2FD4B C6 6C A1 01, EVEX_Vscatterpf0dpd_vm32y_k1, EVEX, AVX512PF, op0=nma r=rcx r=ymm4 r=k3
# vscatterpf1dps [rcx+zmm4*4+4]{k3}
62 F27D4B C6 74 A1 01, EVEX_Vscatterpf1dps_vm32z_k1, EVEX, AVX512PF, op0=nma r=rcx r=zmm4 r=k3
# vscatterpf1dpd [rcx+ymm4*4+8]{k3}
62 F2FD4B C6 74 A1 01, EVEX_Vscatterpf1dpd_vm32y_k1, EVEX, AVX512PF, op0=nma r=rcx r=ymm4 r=k3
# vgatherpf0qps [rcx+zmm4*4+4]{k3}
62 F27D4B C7 4C A1 01, EVEX_Vgatherpf0qps_vm64z_k1, EVEX, AVX512PF, op0=nma r=rcx r=zmm4 r=k3
# vgatherpf0qpd [rcx+zmm4*4+8]{k3}
62 F2FD4B C7 4C A1 01, EVEX_Vgatherpf0qpd_vm64z_k1, EVEX, AVX512PF, op0=nma r=rcx r=zmm4 r=k3
# vgatherpf1qps [rcx+zmm4*4+4]{k3}
62 F27D4B C7 54 A1 01, EVEX_Vgatherpf1qps_vm64z_k1, EVEX, AVX512PF, op0=nma r=rcx r=zmm4 r=k3
# vgatherpf1qpd [rcx+zmm4*4+8]{k3}
62 F2FD4B C7 54 A1 01, EVEX_Vgatherpf1qpd_vm64z_k1, EVEX, AVX512PF, op0=nma r=rcx r=zmm4 r=k3
# vscatterpf0qps [rcx+zmm4*4+4]{k3}
62 F27D4B C7 6C A1 01, EVEX_Vscatterpf0qps_vm64z_k1, EVEX, AVX512PF, op0=nma r=rcx r=zmm4 r=k3
# vscatterpf0qpd [rcx+zmm4*4+8]{k3}
62 F2FD4B C7 6C A1 01, EVEX_Vscatterpf0qpd_vm64z_k1, EVEX, AVX512PF, op0=nma r=rcx r=zmm4 r=k3
# vscatterpf1qps [rcx+zmm4*4+4]{k3}
62 F27D4B C7 74 A1 01, EVEX_Vscatterpf1qps_vm64z_k1, EVEX, AVX512PF, op0=nma r=rcx r=zmm4 r=k3
# vscatterpf1qpd [rcx+zmm4*4+8]{k3}
62 F2FD4B C7 74 A1 01, EVEX_Vscatterpf1qpd_vm64z_k1, EVEX, AVX512PF, op0=nma r=rcx r=zmm4 r=k3
# vexp2ps zmm2,[rax+40h]
62 F27D48 C8 50 01, EVEX_Vexp2ps_zmm_k1z_zmmm512b32_sae, EVEX, AVX512ER, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float32
# vexp2ps zmm2{k3},zmm3
62 F27D4B C8 D3, EVEX_Vexp2ps_zmm_k1z_zmmm512b32_sae, EVEX, AVX512ER, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vexp2ps zmm2{k3}{z},zmm3 {sae}
62 F27D9B C8 D3, EVEX_Vexp2ps_zmm_k1z_zmmm512b32_sae, EVEX, AVX512ER, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vexp2pd zmm2,[rax+40h]
62 F2FD48 C8 50 01, EVEX_Vexp2pd_zmm_k1z_zmmm512b64_sae, EVEX, AVX512ER, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float64
# vexp2pd zmm2{k3},zmm3
62 F2FD4B C8 D3, EVEX_Vexp2pd_zmm_k1z_zmmm512b64_sae, EVEX, AVX512ER, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vexp2pd zmm2{k3}{z},zmm3 {sae}
62 F2FD9B C8 D3, EVEX_Vexp2pd_zmm_k1z_zmmm512b64_sae, EVEX, AVX512ER, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vrcp28ps zmm2,[rax+40h]
62 F27D48 CA 50 01, EVEX_Vrcp28ps_zmm_k1z_zmmm512b32_sae, EVEX, AVX512ER, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float32
# vrcp28ps zmm2{k3},zmm3
62 F27D4B CA D3, EVEX_Vrcp28ps_zmm_k1z_zmmm512b32_sae, EVEX, AVX512ER, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vrcp28ps zmm2{k3}{z},zmm3 {sae}
62 F27D9B CA D3, EVEX_Vrcp28ps_zmm_k1z_zmmm512b32_sae, EVEX, AVX512ER, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vrcp28pd zmm2,[rax+40h]
62 F2FD48 CA 50 01, EVEX_Vrcp28pd_zmm_k1z_zmmm512b64_sae, EVEX, AVX512ER, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float64
# vrcp28pd zmm2{k3},zmm3
62 F2FD4B CA D3, EVEX_Vrcp28pd_zmm_k1z_zmmm512b64_sae, EVEX, AVX512ER, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vrcp28pd zmm2{k3}{z},zmm3 {sae}
62 F2FD9B CA D3, EVEX_Vrcp28pd_zmm_k1z_zmmm512b64_sae, EVEX, AVX512ER, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vrcp28ss xmm2,xmm6,dword ptr [rax+4]
62 F24D08 CB 50 01, EVEX_Vrcp28ss_xmm_k1z_xmm_xmmm32_sae, EVEX, AVX512ER, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vrcp28ss xmm2{k3},xmm6,xmm3
62 F24D0B CB D3, EVEX_Vrcp28ss_xmm_k1z_xmm_xmmm32_sae, EVEX, AVX512ER, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vrcp28ss xmm2{k3}{z},xmm6,xmm3 {sae}
62 F24DDB CB D3, EVEX_Vrcp28ss_xmm_k1z_xmm_xmmm32_sae, EVEX, AVX512ER, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vrcp28sd xmm2,xmm6,qword ptr [rax+8]
62 F2CD08 CB 50 01, EVEX_Vrcp28sd_xmm_k1z_xmm_xmmm64_sae, EVEX, AVX512ER, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vrcp28sd xmm18{k3},xmm14,xmm3
62 E28D0B CB D3, EVEX_Vrcp28sd_xmm_k1z_xmm_xmmm64_sae, EVEX, AVX512ER, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vrcp28sd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B CB D3, EVEX_Vrcp28sd_xmm_k1z_xmm_xmmm64_sae, EVEX, AVX512ER, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vrsqrt28ps zmm2,[rax+40h]
62 F27D48 CC 50 01, EVEX_Vrsqrt28ps_zmm_k1z_zmmm512b32_sae, EVEX, AVX512ER, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float32
# vrsqrt28ps zmm2{k3},zmm3
62 F27D4B CC D3, EVEX_Vrsqrt28ps_zmm_k1z_zmmm512b32_sae, EVEX, AVX512ER, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vrsqrt28ps zmm2{k3}{z},zmm3 {sae}
62 F27D9B CC D3, EVEX_Vrsqrt28ps_zmm_k1z_zmmm512b32_sae, EVEX, AVX512ER, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vrsqrt28pd zmm2,[rax+40h]
62 F2FD48 CC 50 01, EVEX_Vrsqrt28pd_zmm_k1z_zmmm512b64_sae, EVEX, AVX512ER, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float64
# vrsqrt28pd zmm2{k3},zmm3
62 F2FD4B CC D3, EVEX_Vrsqrt28pd_zmm_k1z_zmmm512b64_sae, EVEX, AVX512ER, op0=rcw op1=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vrsqrt28pd zmm2{k3}{z},zmm3 {sae}
62 F2FD9B CC D3, EVEX_Vrsqrt28pd_zmm_k1z_zmmm512b64_sae, EVEX, AVX512ER, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vrsqrt28ss xmm2,xmm6,dword ptr [rax+4]
62 F24D08 CD 50 01, EVEX_Vrsqrt28ss_xmm_k1z_xmm_xmmm32_sae, EVEX, AVX512ER, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vrsqrt28ss xmm2{k3},xmm6,xmm3
62 F24D0B CD D3, EVEX_Vrsqrt28ss_xmm_k1z_xmm_xmmm32_sae, EVEX, AVX512ER, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vrsqrt28ss xmm2{k3}{z},xmm6,xmm3 {sae}
62 F24DDB CD D3, EVEX_Vrsqrt28ss_xmm_k1z_xmm_xmmm32_sae, EVEX, AVX512ER, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vrsqrt28sd xmm2,xmm6,qword ptr [rax+8]
62 F2CD08 CD 50 01, EVEX_Vrsqrt28sd_xmm_k1z_xmm_xmmm64_sae, EVEX, AVX512ER, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vrsqrt28sd xmm18{k3},xmm14,xmm3
62 E28D0B CD D3, EVEX_Vrsqrt28sd_xmm_k1z_xmm_xmmm64_sae, EVEX, AVX512ER, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vrsqrt28sd xmm2{k3}{z},xmm6,xmm3
62 F2CD8B CD D3, EVEX_Vrsqrt28sd_xmm_k1z_xmm_xmmm64_sae, EVEX, AVX512ER, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm6 r=xmm3
# aesimc xmm1,xmm5
66 0F38DB CD, Aesimc_xmm_xmmm128, Legacy, AES, op0=w op1=r w=xmm1 r=xmm5
# aesimc xmm1,[rax]
66 0F38DB 08, Aesimc_xmm_xmmm128, Legacy, AES, op0=w op1=r w=xmm1 r=rax rm=ds:rax;UInt128
# vaesimc xmm2,xmm3
C4E279 DB D3, VEX_Vaesimc_xmm_xmmm128, VEX, AES;AVX, op0=w op1=r w=vmm2 r=xmm3
# vaesimc xmm2,[rax]
C4E279 DB 10, VEX_Vaesimc_xmm_xmmm128, VEX, AES;AVX, op0=w op1=r w=vmm2 r=rax rm=ds:rax;UInt128
# aesenc xmm1,xmm5
66 0F38DC CD, Aesenc_xmm_xmmm128, Legacy, AES, op0=rw op1=r rw=xmm1 r=xmm5
# aesenc xmm1,[rax]
66 0F38DC 08, Aesenc_xmm_xmmm128, Legacy, AES, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;UInt128
# vaesenc xmm2,xmm6,xmm3
C4E249 DC D3, VEX_Vaesenc_xmm_xmm_xmmm128, VEX, AES;AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vaesenc xmm2,xmm6,[rax]
C4E249 DC 10, VEX_Vaesenc_xmm_xmm_xmmm128, VEX, AES;AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;UInt128
# aesenclast xmm1,xmm5
66 0F38DD CD, Aesenclast_xmm_xmmm128, Legacy, AES, op0=rw op1=r rw=xmm1 r=xmm5
# aesenclast xmm1,[rax]
66 0F38DD 08, Aesenclast_xmm_xmmm128, Legacy, AES, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;UInt128
# vaesenclast xmm2,xmm6,xmm3
C4E249 DD D3, VEX_Vaesenclast_xmm_xmm_xmmm128, VEX, AES;AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vaesenclast xmm2,xmm6,[rax]
C4E249 DD 10, VEX_Vaesenclast_xmm_xmm_xmmm128, VEX, AES;AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;UInt128
# aesdec xmm1,xmm5
66 0F38DE CD, Aesdec_xmm_xmmm128, Legacy, AES, op0=rw op1=r rw=xmm1 r=xmm5
# aesdec xmm1,[rax]
66 0F38DE 08, Aesdec_xmm_xmmm128, Legacy, AES, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;UInt128
# vaesdec xmm2,xmm6,xmm3
C4E249 DE D3, VEX_Vaesdec_xmm_xmm_xmmm128, VEX, AES;AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vaesdec xmm2,xmm6,[rax]
C4E249 DE 10, VEX_Vaesdec_xmm_xmm_xmmm128, VEX, AES;AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;UInt128
# aesdeclast xmm1,xmm5
66 0F38DF CD, Aesdeclast_xmm_xmmm128, Legacy, AES, op0=rw op1=r rw=xmm1 r=xmm5
# aesdeclast xmm1,[rax]
66 0F38DF 08, Aesdeclast_xmm_xmmm128, Legacy, AES, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;UInt128
# vaesdeclast xmm2,xmm6,xmm3
C4E249 DF D3, VEX_Vaesdeclast_xmm_xmm_xmmm128, VEX, AES;AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vaesdeclast xmm2,xmm6,[rax]
C4E249 DF 10, VEX_Vaesdeclast_xmm_xmm_xmmm128, VEX, AES;AVX, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;UInt128
# movbe bx,[rax]
66 0F38F0 18, Movbe_r16_m16, Legacy, MOVBE, op0=w op1=r w=bx r=rax rm=ds:rax;UInt16
# movbe ebx,[rax]
0F38F0 18, Movbe_r32_m32, Legacy, MOVBE, op0=w op1=r w=rbx r=rax rm=ds:rax;UInt32
# movbe rbx,[rax]
48 0F38F0 18, Movbe_r64_m64, Legacy, MOVBE, op0=w op1=r w=rbx r=rax rm=ds:rax;UInt64
# movbe [rax],bx
66 0F38F1 18, Movbe_m16_r16, Legacy, MOVBE, op0=w op1=r r=rax r=bx wm=ds:rax;UInt16
# movbe [rax],ebx
0F38F1 18, Movbe_m32_r32, Legacy, MOVBE, op0=w op1=r r=rax r=ebx wm=ds:rax;UInt32
# movbe [rax],rbx
48 0F38F1 18, Movbe_m64_r64, Legacy, MOVBE, op0=w op1=r r=rax r=rbx wm=ds:rax;UInt64
# crc32 ecx,dh
F2 0F38F0 CE, Crc32_r32_rm8, Legacy, SSE4_2, op0=rw op1=r w=rcx r=ecx r=dh
# crc32 ebx,byte ptr [rax]
F2 0F38F0 18, Crc32_r32_rm8, Legacy, SSE4_2, op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt8
# crc32 rcx,sil
F2 48 0F38F0 CE, Crc32_r64_rm8, Legacy, SSE4_2, op0=rw op1=r rw=rcx r=sil
# crc32 rbx,byte ptr [rax]
F2 48 0F38F0 18, Crc32_r64_rm8, Legacy, SSE4_2, op0=rw op1=r rw=rbx r=rax rm=ds:rax;UInt8
# crc32 ecx,si
66 F2 0F38F1 CE, Crc32_r32_rm16, Legacy, SSE4_2, op0=rw op1=r w=rcx r=ecx r=si
# crc32 ebx,word ptr [rax]
66 F2 0F38F1 18, Crc32_r32_rm16, Legacy, SSE4_2, op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt16
# crc32 ecx,esi
F2 0F38F1 CE, Crc32_r32_rm32, Legacy, SSE4_2, op0=rw op1=r w=rcx r=ecx r=esi
# crc32 ebx,dword ptr [rax]
F2 0F38F1 18, Crc32_r32_rm32, Legacy, SSE4_2, op0=rw op1=r w=rbx r=ebx r=rax rm=ds:rax;UInt32
# crc32 rcx,rsi
F2 48 0F38F1 CE, Crc32_r64_rm64, Legacy, SSE4_2, op0=rw op1=r rw=rcx r=rsi
# crc32 rbx,qword ptr [rax]
F2 48 0F38F1 18, Crc32_r64_rm64, Legacy, SSE4_2, op0=rw op1=r rw=rbx r=rax rm=ds:rax;UInt64
# andn edx,esi,ebx
C4E248 F2 D3, VEX_Andn_r32_r32_rm32, VEX, BMI1, op0=w op1=r op2=r fc=oc fw=sz fu=ap w=rdx r=esi r=ebx
# andn edx,esi,[rax]
C4E248 F2 10, VEX_Andn_r32_r32_rm32, VEX, BMI1, op0=w op1=r op2=r fc=oc fw=sz fu=ap w=rdx r=esi r=rax rm=ds:rax;UInt32
# andn rdx,rsi,rbx
C4E2C8 F2 D3, VEX_Andn_r64_r64_rm64, VEX, BMI1, op0=w op1=r op2=r fc=oc fw=sz fu=ap w=rdx r=rsi r=rbx
# andn rdx,rsi,[rax]
C4E2C8 F2 10, VEX_Andn_r64_r64_rm64, VEX, BMI1, op0=w op1=r op2=r fc=oc fw=sz fu=ap w=rdx r=rsi r=rax rm=ds:rax;UInt64
# blsr esi,ebx
C4E248 F3 CB, VEX_Blsr_r32_rm32, VEX, BMI1, op0=w op1=r fc=o fw=zsc fu=ap w=rsi r=ebx
# blsr esi,[rax]
C4E248 F3 08, VEX_Blsr_r32_rm32, VEX, BMI1, op0=w op1=r fc=o fw=zsc fu=ap w=rsi r=rax rm=ds:rax;UInt32
# blsr rsi,rbx
C4E2C8 F3 CB, VEX_Blsr_r64_rm64, VEX, BMI1, op0=w op1=r fc=o fw=zsc fu=ap w=rsi r=rbx
# blsr rsi,[rax]
C4E2C8 F3 08, VEX_Blsr_r64_rm64, VEX, BMI1, op0=w op1=r fc=o fw=zsc fu=ap w=rsi r=rax rm=ds:rax;UInt64
# blsmsk esi,ebx
C4E248 F3 D3, VEX_Blsmsk_r32_rm32, VEX, BMI1, op0=w op1=r fc=zo fw=sc fu=ap w=rsi r=ebx
# blsmsk esi,[rax]
C4E248 F3 10, VEX_Blsmsk_r32_rm32, VEX, BMI1, op0=w op1=r fc=zo fw=sc fu=ap w=rsi r=rax rm=ds:rax;UInt32
# blsmsk rsi,rbx
C4E2C8 F3 D3, VEX_Blsmsk_r64_rm64, VEX, BMI1, op0=w op1=r fc=zo fw=sc fu=ap w=rsi r=rbx
# blsmsk rsi,[rax]
C4E2C8 F3 10, VEX_Blsmsk_r64_rm64, VEX, BMI1, op0=w op1=r fc=zo fw=sc fu=ap w=rsi r=rax rm=ds:rax;UInt64
# blsi esi,ebx
C4E248 F3 DB, VEX_Blsi_r32_rm32, VEX, BMI1, op0=w op1=r fc=o fw=zsc fu=ap w=rsi r=ebx
# blsi esi,[rax]
C4E248 F3 18, VEX_Blsi_r32_rm32, VEX, BMI1, op0=w op1=r fc=o fw=zsc fu=ap w=rsi r=rax rm=ds:rax;UInt32
# blsi rsi,rbx
C4E2C8 F3 DB, VEX_Blsi_r64_rm64, VEX, BMI1, op0=w op1=r fc=o fw=zsc fu=ap w=rsi r=rbx
# blsi rsi,[rax]
C4E2C8 F3 18, VEX_Blsi_r64_rm64, VEX, BMI1, op0=w op1=r fc=o fw=zsc fu=ap w=rsi r=rax rm=ds:rax;UInt64
# bzhi edx,esi,ebx
C4E260 F5 D6, VEX_Bzhi_r32_rm32_r32, VEX, BMI2, op0=w op1=r op2=r fc=o fw=zcs fu=ap w=rdx r=esi r=bl
# bzhi edx,esi,esp
C4E258 F5 D6, VEX_Bzhi_r32_rm32_r32, VEX, BMI2, op0=w op1=r op2=r fc=o fw=zcs fu=ap w=rdx r=esi r=spl
# bzhi edx,[rax],esi
C4E248 F5 10, VEX_Bzhi_r32_rm32_r32, VEX, BMI2, op0=w op1=r op2=r fc=o fw=zcs fu=ap w=rdx r=rax r=sil rm=ds:rax;UInt32
# bzhi rdx,rsi,rbx
C4E2E0 F5 D6, VEX_Bzhi_r64_rm64_r64, VEX, BMI2, op0=w op1=r op2=r fc=o fw=zcs fu=ap w=rdx r=rsi r=bl
# bzhi rdx,rsi,rsp
C4E2D8 F5 D6, VEX_Bzhi_r64_rm64_r64, VEX, BMI2, op0=w op1=r op2=r fc=o fw=zcs fu=ap w=rdx r=rsi r=spl
# bzhi rdx,[rax],rsi
C4E2C8 F5 10, VEX_Bzhi_r64_rm64_r64, VEX, BMI2, op0=w op1=r op2=r fc=o fw=zcs fu=ap w=rdx r=rax r=sil rm=ds:rax;UInt64
# pext edx,esi,ebx
C4E24A F5 D3, VEX_Pext_r32_r32_rm32, VEX, BMI2, op0=w op1=cr op2=r w=rdx cr=esi r=ebx
# pext edx,esi,[rax]
C4E24A F5 10, VEX_Pext_r32_r32_rm32, VEX, BMI2, op0=w op1=cr op2=r w=rdx cr=esi r=rax rm=ds:rax;UInt32
# pext rdx,rsi,rbx
C4E2CA F5 D3, VEX_Pext_r64_r64_rm64, VEX, BMI2, op0=w op1=cr op2=r w=rdx cr=rsi r=rbx
# pext rdx,rsi,[rax]
C4E2CA F5 10, VEX_Pext_r64_r64_rm64, VEX, BMI2, op0=w op1=cr op2=r w=rdx cr=rsi r=rax rm=ds:rax;UInt64
# pdep edx,esi,ebx
C4E24B F5 D3, VEX_Pdep_r32_r32_rm32, VEX, BMI2, op0=w op1=cr op2=r w=rdx cr=esi r=ebx
# pdep edx,esi,[rax]
C4E24B F5 10, VEX_Pdep_r32_r32_rm32, VEX, BMI2, op0=w op1=cr op2=r w=rdx cr=esi r=rax rm=ds:rax;UInt32
# pdep rdx,rsi,rbx
C4E2CB F5 D3, VEX_Pdep_r64_r64_rm64, VEX, BMI2, op0=w op1=cr op2=r w=rdx cr=rsi r=rbx
# pdep rdx,rsi,[rax]
C4E2CB F5 10, VEX_Pdep_r64_r64_rm64, VEX, BMI2, op0=w op1=cr op2=r w=rdx cr=rsi r=rax rm=ds:rax;UInt64
# adcx ecx,esi
66 0F38F6 CE, Adcx_r32_rm32, Legacy, ADX, op0=rw op1=r fr=c fw=c w=rcx r=ecx r=esi
# adcx ebx,[rax]
66 0F38F6 18, Adcx_r32_rm32, Legacy, ADX, op0=rw op1=r fr=c fw=c w=rbx r=ebx r=rax rm=ds:rax;UInt32
# adcx rcx,rsi
66 48 0F38F6 CE, Adcx_r64_rm64, Legacy, ADX, op0=rw op1=r fr=c fw=c rw=rcx r=rsi
# adcx rbx,[rax]
66 48 0F38F6 18, Adcx_r64_rm64, Legacy, ADX, op0=rw op1=r fr=c fw=c rw=rbx r=rax rm=ds:rax;UInt64
# adox ecx,esi
F3 0F38F6 CE, Adox_r32_rm32, Legacy, ADX, op0=rw op1=r fr=o fw=o w=rcx r=ecx r=esi
# adox ebx,[rax]
F3 0F38F6 18, Adox_r32_rm32, Legacy, ADX, op0=rw op1=r fr=o fw=o w=rbx r=ebx r=rax rm=ds:rax;UInt32
# adox rcx,rsi
F3 48 0F38F6 CE, Adox_r64_rm64, Legacy, ADX, op0=rw op1=r fr=o fw=o rw=rcx r=rsi
# adox rbx,[rax]
F3 48 0F38F6 18, Adox_r64_rm64, Legacy, ADX, op0=rw op1=r fr=o fw=o rw=rbx r=rax rm=ds:rax;UInt64
# mulx ecx,esi,ebx
C4E24B F6 CB, VEX_Mulx_r32_r32_rm32, VEX, BMI2, op0=w op1=w op2=r w=rcx w=rsi r=ebx r=edx
# mulx edx,esi,[rax]
C4E24B F6 10, VEX_Mulx_r32_r32_rm32, VEX, BMI2, op0=w op1=w op2=r w=rdx w=rsi r=rax rm=ds:rax;UInt32 r=edx
# mulx rcx,rsi,rbx
C4E2CB F6 CB, VEX_Mulx_r64_r64_rm64, VEX, BMI2, op0=w op1=w op2=r w=rcx w=rsi r=rbx r=rdx
# mulx rdx,rsi,[rax]
C4E2CB F6 10, VEX_Mulx_r64_r64_rm64, VEX, BMI2, op0=w op1=w op2=r w=rdx w=rsi r=rax rm=ds:rax;UInt64 r=rdx
# bextr edx,ebx,esi
C4E248 F7 D3, VEX_Bextr_r32_rm32_r32, VEX, BMI1, op0=w op1=r op2=r fc=co fw=z fu=asp w=rdx r=ebx r=si
# bextr edx,[rax],esi
C4E248 F7 10, VEX_Bextr_r32_rm32_r32, VEX, BMI1, op0=w op1=r op2=r fc=co fw=z fu=asp w=rdx r=rax r=si rm=ds:rax;UInt32
# bextr rdx,rbx,rsi
C4E2C8 F7 D3, VEX_Bextr_r64_rm64_r64, VEX, BMI1, op0=w op1=r op2=r fc=co fw=z fu=asp w=rdx r=rbx r=si
# bextr rdx,[rax],rsi
C4E2C8 F7 10, VEX_Bextr_r64_rm64_r64, VEX, BMI1, op0=w op1=r op2=r fc=co fw=z fu=asp w=rdx r=rax r=si rm=ds:rax;UInt64
# shlx edx,esi,ebx
C4E261 F7 D6, VEX_Shlx_r32_rm32_r32, VEX, BMI2, op0=w op1=r op2=r w=rdx r=esi r=bl
# shlx edx,esi,esp
C4E259 F7 D6, VEX_Shlx_r32_rm32_r32, VEX, BMI2, op0=w op1=r op2=r w=rdx r=esi r=spl
# shlx edx,[rax],esi
C4E249 F7 10, VEX_Shlx_r32_rm32_r32, VEX, BMI2, op0=w op1=r op2=r w=rdx r=rax r=sil rm=ds:rax;UInt32
# shlx rdx,rsi,rbx
C4E2E1 F7 D6, VEX_Shlx_r64_rm64_r64, VEX, BMI2, op0=w op1=r op2=r w=rdx r=rsi r=bl
# shlx rdx,rsi,rsp
C4E2D9 F7 D6, VEX_Shlx_r64_rm64_r64, VEX, BMI2, op0=w op1=r op2=r w=rdx r=rsi r=spl
# shlx rdx,[rax],rsi
C4E2C9 F7 10, VEX_Shlx_r64_rm64_r64, VEX, BMI2, op0=w op1=r op2=r w=rdx r=rax r=sil rm=ds:rax;UInt64
# sarx edx,esi,ebx
C4E262 F7 D6, VEX_Sarx_r32_rm32_r32, VEX, BMI2, op0=w op1=r op2=r w=rdx r=esi r=bl
# sarx edx,esi,esp
C4E25A F7 D6, VEX_Sarx_r32_rm32_r32, VEX, BMI2, op0=w op1=r op2=r w=rdx r=esi r=spl
# sarx edx,[rax],esi
C4E24A F7 10, VEX_Sarx_r32_rm32_r32, VEX, BMI2, op0=w op1=r op2=r w=rdx r=rax r=sil rm=ds:rax;Int32
# sarx rdx,rsi,rbx
C4E2E2 F7 D6, VEX_Sarx_r64_rm64_r64, VEX, BMI2, op0=w op1=r op2=r w=rdx r=rsi r=bl
# sarx rdx,rsi,rsp
C4E2DA F7 D6, VEX_Sarx_r64_rm64_r64, VEX, BMI2, op0=w op1=r op2=r w=rdx r=rsi r=spl
# sarx rdx,[rax],rsi
C4E2CA F7 10, VEX_Sarx_r64_rm64_r64, VEX, BMI2, op0=w op1=r op2=r w=rdx r=rax r=sil rm=ds:rax;Int64
# shrx edx,esi,ebx
C4E263 F7 D6, VEX_Shrx_r32_rm32_r32, VEX, BMI2, op0=w op1=r op2=r w=rdx r=esi r=bl
# shrx edx,esi,esp
C4E25B F7 D6, VEX_Shrx_r32_rm32_r32, VEX, BMI2, op0=w op1=r op2=r w=rdx r=esi r=spl
# shrx edx,[rax],esi
C4E24B F7 10, VEX_Shrx_r32_rm32_r32, VEX, BMI2, op0=w op1=r op2=r w=rdx r=rax r=sil rm=ds:rax;UInt32
# shrx rdx,rsi,rbx
C4E2E3 F7 D6, VEX_Shrx_r64_rm64_r64, VEX, BMI2, op0=w op1=r op2=r w=rdx r=rsi r=bl
# shrx rdx,rsi,rsp
C4E2DB F7 D6, VEX_Shrx_r64_rm64_r64, VEX, BMI2, op0=w op1=r op2=r w=rdx r=rsi r=spl
# shrx rdx,[rax],rsi
C4E2CB F7 10, VEX_Shrx_r64_rm64_r64, VEX, BMI2, op0=w op1=r op2=r w=rdx r=rax r=sil rm=ds:rax;UInt64
# vpermq ymm2,ymm3,0A5h
C4E3FD 00 D3 A5, VEX_Vpermq_ymm_ymmm256_imm8, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm3
# vpermq ymm2,[rax],0A5h
C4E3FD 00 10 A5, VEX_Vpermq_ymm_ymmm256_imm8, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed256_UInt64
# vpermq ymm2,ymm19,0A5h
62 B3FD28 00 D3 A5, EVEX_Vpermq_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm19
# vpermq ymm2,[rax+20h],0A5h
62 F3FD28 00 50 01 A5, EVEX_Vpermq_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpermq ymm18{k3},ymm3,0A5h
62 E3FD2B 00 D3 A5, EVEX_Vpermq_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm3
# vpermq ymm2{k3}{z},ymm3,0A5h
62 F3FDAB 00 D3 A5, EVEX_Vpermq_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm3
# vpermq zmm2,zmm19,0A5h
62 B3FD48 00 D3 A5, EVEX_Vpermq_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm19
# vpermq zmm2,[rax+40h],0A5h
62 F3FD48 00 50 01 A5, EVEX_Vpermq_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpermq zmm18{k3},zmm3,0A5h
62 E3FD4B 00 D3 A5, EVEX_Vpermq_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm3
# vpermq zmm2{k3}{z},zmm3,0A5h
62 F3FDCB 00 D3 A5, EVEX_Vpermq_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm3
# vpermpd ymm2,ymm3,0A5h
C4E3FD 01 D3 A5, VEX_Vpermpd_ymm_ymmm256_imm8, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=ymm3
# vpermpd ymm2,[rax],0A5h
C4E3FD 01 10 A5, VEX_Vpermpd_ymm_ymmm256_imm8, VEX, AVX2, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed256_Float64
# vpermpd ymm2,ymm19,0A5h
62 B3FD28 01 D3 A5, EVEX_Vpermpd_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm19
# vpermpd ymm2,[rax+20h],0A5h
62 F3FD28 01 50 01 A5, EVEX_Vpermpd_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float64
# vpermpd ymm18{k3},ymm3,0A5h
62 E3FD2B 01 D3 A5, EVEX_Vpermpd_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm3
# vpermpd ymm2{k3}{z},ymm3,0A5h
62 F3FDAB 01 D3 A5, EVEX_Vpermpd_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm3
# vpermpd zmm2,zmm19,0A5h
62 B3FD48 01 D3 A5, EVEX_Vpermpd_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm19
# vpermpd zmm2,[rax+40h],0A5h
62 F3FD48 01 50 01 A5, EVEX_Vpermpd_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float64
# vpermpd zmm18{k3},zmm3,0A5h
62 E3FD4B 01 D3 A5, EVEX_Vpermpd_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm3
# vpermpd zmm2{k3}{z},zmm3,0A5h
62 F3FDCB 01 D3 A5, EVEX_Vpermpd_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm3
# vpblendd xmm2,xmm6,xmm3,0A5h
C4E349 02 D3 A5, VEX_Vpblendd_xmm_xmm_xmmm128_imm8, VEX, AVX2, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vpblendd xmm2,xmm6,[rax],0A5h
C4E349 02 10 A5, VEX_Vpblendd_xmm_xmm_xmmm128_imm8, VEX, AVX2, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt32
# vpblendd ymm2,ymm6,ymm3,0A5h
C4E34D 02 D3 A5, VEX_Vpblendd_ymm_ymm_ymmm256_imm8, VEX, AVX2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3
# vpblendd ymm2,ymm6,[rax],0A5h
C4E34D 02 10 A5, VEX_Vpblendd_ymm_ymm_ymmm256_imm8, VEX, AVX2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt32
# valignd xmm2,xmm6,[rax+10h],0A5h
62 F34D08 03 50 01 A5, EVEX_Valignd_xmm_k1z_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# valignd xmm2{k3},xmm6,xmm3,0A5h
62 F34D0B 03 D3 A5, EVEX_Valignd_xmm_k1z_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# valignd xmm2{k3}{z},xmm6,xmm3,0A5h
62 F34D8B 03 D3 A5, EVEX_Valignd_xmm_k1z_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=xmm6 r=xmm3
# valignd ymm2,ymm6,[rax+20h],0A5h
62 F34D28 03 50 01 A5, EVEX_Valignd_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# valignd ymm2{k3},ymm6,ymm3,0A5h
62 F34D2B 03 D3 A5, EVEX_Valignd_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# valignd ymm2{k3}{z},ymm6,ymm3,0A5h
62 F34DAB 03 D3 A5, EVEX_Valignd_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=ymm6 r=ymm3
# valignd zmm2,zmm6,[rax+40h],0A5h
62 F34D48 03 50 01 A5, EVEX_Valignd_zmm_k1z_zmm_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# valignd zmm2{k3},zmm6,zmm3,0A5h
62 F34D4B 03 D3 A5, EVEX_Valignd_zmm_k1z_zmm_zmmm512b32_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r op3=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# valignd zmm2{k3}{z},zmm6,zmm3,0A5h
62 F34DCB 03 D3 A5, EVEX_Valignd_zmm_k1z_zmm_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=zmm6 r=zmm3
# valignq xmm2,xmm6,[rax+10h],0A5h
62 F3CD08 03 50 01 A5, EVEX_Valignq_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# valignq xmm18{k3},xmm14,xmm3,0A5h
62 E38D0B 03 D3 A5, EVEX_Valignq_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# valignq xmm2{k3}{z},xmm6,xmm3,0A5h
62 F3CD8B 03 D3 A5, EVEX_Valignq_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=xmm6 r=xmm3
# valignq ymm2,ymm6,[rax+20h],0A5h
62 F3CD28 03 50 01 A5, EVEX_Valignq_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# valignq ymm18{k3},ymm14,ymm3,0A5h
62 E38D2B 03 D3 A5, EVEX_Valignq_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# valignq ymm2{k3}{z},ymm6,ymm3,0A5h
62 F3CDAB 03 D3 A5, EVEX_Valignq_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=ymm6 r=ymm3
# valignq zmm2,zmm6,[rax+40h],0A5h
62 F3CD48 03 50 01 A5, EVEX_Valignq_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# valignq zmm18{k3},zmm14,zmm3,0A5h
62 E38D4B 03 D3 A5, EVEX_Valignq_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r op3=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# valignq zmm2{k3}{z},zmm6,zmm3,0A5h
62 F3CDCB 03 D3 A5, EVEX_Valignq_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpermilps xmm2,xmm3,0A5h
C4E379 04 D3 A5, VEX_Vpermilps_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm3
# vpermilps xmm2,[rax],0A5h
C4E379 04 10 A5, VEX_Vpermilps_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed128_Float32
# vpermilps ymm2,ymm3,0A5h
C4E37D 04 D3 A5, VEX_Vpermilps_ymm_ymmm256_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm3
# vpermilps ymm2,[rax],0A5h
C4E37D 04 10 A5, VEX_Vpermilps_ymm_ymmm256_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed256_Float32
# vpermilps xmm2,xmm19,0A5h
62 B37D08 04 D3 A5, EVEX_Vpermilps_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm19
# vpermilps xmm2,[rax+10h],0A5h
62 F37D08 04 50 01 A5, EVEX_Vpermilps_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float32
# vpermilps xmm18{k3},xmm3,0A5h
62 E37D0B 04 D3 A5, EVEX_Vpermilps_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm3
# vpermilps xmm2{k3}{z},xmm3,0A5h
62 F37D8B 04 D3 A5, EVEX_Vpermilps_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm3
# vpermilps ymm2,ymm19,0A5h
62 B37D28 04 D3 A5, EVEX_Vpermilps_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm19
# vpermilps ymm2,[rax+20h],0A5h
62 F37D28 04 50 01 A5, EVEX_Vpermilps_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float32
# vpermilps ymm18{k3},ymm3,0A5h
62 E37D2B 04 D3 A5, EVEX_Vpermilps_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm3
# vpermilps ymm2{k3}{z},ymm3,0A5h
62 F37DAB 04 D3 A5, EVEX_Vpermilps_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm3
# vpermilps zmm2,zmm19,0A5h
62 B37D48 04 D3 A5, EVEX_Vpermilps_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm19
# vpermilps zmm2,[rax+40h],0A5h
62 F37D48 04 50 01 A5, EVEX_Vpermilps_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float32
# vpermilps zmm18{k3},zmm3,0A5h
62 E37D4B 04 D3 A5, EVEX_Vpermilps_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm3
# vpermilps zmm2{k3}{z},zmm3,0A5h
62 F37DCB 04 D3 A5, EVEX_Vpermilps_zmm_k1z_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm3
# vpermilpd xmm2,xmm3,0A5h
C4E379 05 D3 A5, VEX_Vpermilpd_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm3
# vpermilpd xmm2,[rax],0A5h
C4E379 05 10 A5, VEX_Vpermilpd_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed128_Float64
# vpermilpd ymm2,ymm3,0A5h
C4E37D 05 D3 A5, VEX_Vpermilpd_ymm_ymmm256_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm3
# vpermilpd ymm2,[rax],0A5h
C4E37D 05 10 A5, VEX_Vpermilpd_ymm_ymmm256_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed256_Float64
# vpermilpd xmm2,xmm19,0A5h
62 B3FD08 05 D3 A5, EVEX_Vpermilpd_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=xmm19
# vpermilpd xmm2,[rax+10h],0A5h
62 F3FD08 05 50 01 A5, EVEX_Vpermilpd_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float64
# vpermilpd xmm18{k3},xmm3,0A5h
62 E3FD0B 05 D3 A5, EVEX_Vpermilpd_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=xmm18 r=k3 r=xmm3
# vpermilpd xmm2{k3}{z},xmm3,0A5h
62 F3FD8B 05 D3 A5, EVEX_Vpermilpd_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm3
# vpermilpd ymm2,ymm19,0A5h
62 B3FD28 05 D3 A5, EVEX_Vpermilpd_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=ymm19
# vpermilpd ymm2,[rax+20h],0A5h
62 F3FD28 05 50 01 A5, EVEX_Vpermilpd_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float64
# vpermilpd ymm18{k3},ymm3,0A5h
62 E3FD2B 05 D3 A5, EVEX_Vpermilpd_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm18 r=ymm18 r=k3 r=ymm3
# vpermilpd ymm2{k3}{z},ymm3,0A5h
62 F3FDAB 05 D3 A5, EVEX_Vpermilpd_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm3
# vpermilpd zmm2,zmm19,0A5h
62 B3FD48 05 D3 A5, EVEX_Vpermilpd_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=zmm19
# vpermilpd zmm2,[rax+40h],0A5h
62 F3FD48 05 50 01 A5, EVEX_Vpermilpd_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float64
# vpermilpd zmm18{k3},zmm3,0A5h
62 E3FD4B 05 D3 A5, EVEX_Vpermilpd_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm18 r=zmm18 r=k3 r=zmm3
# vpermilpd zmm2{k3}{z},zmm3,0A5h
62 F3FDCB 05 D3 A5, EVEX_Vpermilpd_zmm_k1z_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm3
# vperm2f128 ymm2,ymm6,ymm3,0A5h
C4E34D 06 D3 A5, VEX_Vperm2f128_ymm_ymm_ymmm256_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3
# vperm2f128 ymm2,ymm6,[rax],0A5h
C4E34D 06 10 A5, VEX_Vperm2f128_ymm_ymm_ymmm256_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float128
# roundps xmm1,xmm5,0A5h
66 0F3A08 CD A5, Roundps_xmm_xmmm128_imm8, Legacy, SSE4_1, op0=w op1=r op2=r w=xmm1 r=xmm5
# roundps xmm1,[rax],0A5h
66 0F3A08 08 A5, Roundps_xmm_xmmm128_imm8, Legacy, SSE4_1, op0=w op1=r op2=r w=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vroundps xmm2,xmm3,0A5h
C4E379 08 D3 A5, VEX_Vroundps_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm3
# vroundps xmm2,[rax],0A5h
C4E379 08 10 A5, VEX_Vroundps_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed128_Float32
# vroundps ymm2,ymm3,0A5h
C4E37D 08 D3 A5, VEX_Vroundps_ymm_ymmm256_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm3
# vroundps ymm2,[rax],0A5h
C4E37D 08 10 A5, VEX_Vroundps_ymm_ymmm256_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed256_Float32
# vrndscaleps xmm2,[rax+10h],0A5h
62 F37D08 08 50 01 A5, EVEX_Vrndscaleps_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float32
# vrndscaleps xmm2{k3},xmm3,0A5h
62 F37D0B 08 D3 A5, EVEX_Vrndscaleps_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vrndscaleps xmm2{k3}{z},xmm3,0A5h
62 F37D8B 08 D3 A5, EVEX_Vrndscaleps_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm3
# vrndscaleps ymm2,[rax+20h],0A5h
62 F37D28 08 50 01 A5, EVEX_Vrndscaleps_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float32
# vrndscaleps ymm2{k3},ymm3,0A5h
62 F37D2B 08 D3 A5, EVEX_Vrndscaleps_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vrndscaleps ymm2{k3}{z},ymm3,0A5h
62 F37DAB 08 D3 A5, EVEX_Vrndscaleps_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm3
# vrndscaleps zmm2,[rax+40h],0A5h
62 F37D48 08 50 01 A5, EVEX_Vrndscaleps_zmm_k1z_zmmm512b32_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float32
# vrndscaleps zmm2{k3},zmm3,0A5h
62 F37D4B 08 D3 A5, EVEX_Vrndscaleps_zmm_k1z_zmmm512b32_imm8_sae, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vrndscaleps zmm2{k3}{z},zmm3,0A5h {sae}
62 F37D9B 08 D3 A5, EVEX_Vrndscaleps_zmm_k1z_zmmm512b32_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm3
# roundpd xmm1,xmm5,0A5h
66 0F3A09 CD A5, Roundpd_xmm_xmmm128_imm8, Legacy, SSE4_1, op0=w op1=r op2=r w=xmm1 r=xmm5
# roundpd xmm1,[rax],0A5h
66 0F3A09 08 A5, Roundpd_xmm_xmmm128_imm8, Legacy, SSE4_1, op0=w op1=r op2=r w=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vroundpd xmm2,xmm3,0A5h
C4E379 09 D3 A5, VEX_Vroundpd_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=xmm3
# vroundpd xmm2,[rax],0A5h
C4E379 09 10 A5, VEX_Vroundpd_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed128_Float64
# vroundpd ymm2,ymm3,0A5h
C4E37D 09 D3 A5, VEX_Vroundpd_ymm_ymmm256_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=ymm3
# vroundpd ymm2,[rax],0A5h
C4E37D 09 10 A5, VEX_Vroundpd_ymm_ymmm256_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed256_Float64
# vrndscalepd xmm2,[rax+10h],0A5h
62 F3FD08 09 50 01 A5, EVEX_Vrndscalepd_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float64
# vrndscalepd xmm2{k3},xmm3,0A5h
62 F3FD0B 09 D3 A5, EVEX_Vrndscalepd_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vrndscalepd xmm2{k3}{z},xmm3,0A5h
62 F3FD8B 09 D3 A5, EVEX_Vrndscalepd_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm3
# vrndscalepd ymm2,[rax+20h],0A5h
62 F3FD28 09 50 01 A5, EVEX_Vrndscalepd_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float64
# vrndscalepd ymm2{k3},ymm3,0A5h
62 F3FD2B 09 D3 A5, EVEX_Vrndscalepd_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vrndscalepd ymm2{k3}{z},ymm3,0A5h
62 F3FDAB 09 D3 A5, EVEX_Vrndscalepd_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm3
# vrndscalepd zmm2,[rax+40h],0A5h
62 F3FD48 09 50 01 A5, EVEX_Vrndscalepd_zmm_k1z_zmmm512b64_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float64
# vrndscalepd zmm2{k3},zmm3,0A5h
62 F3FD4B 09 D3 A5, EVEX_Vrndscalepd_zmm_k1z_zmmm512b64_imm8_sae, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vrndscalepd zmm2{k3}{z},zmm3,0A5h {sae}
62 F3FD9B 09 D3 A5, EVEX_Vrndscalepd_zmm_k1z_zmmm512b64_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm3
# roundss xmm1,xmm5,0A5h
66 0F3A0A CD A5, Roundss_xmm_xmmm32_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=xmm5
# roundss xmm1,[rax],0A5h
66 0F3A0A 08 A5, Roundss_xmm_xmmm32_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;Float32
# vroundss xmm2,xmm6,xmm3,0A5h
C4E349 0A D3 A5, VEX_Vroundss_xmm_xmm_xmmm32_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vroundss xmm2,xmm6,dword ptr [rax],0A5h
C4E349 0A 10 A5, VEX_Vroundss_xmm_xmm_xmmm32_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float32
# vrndscaless xmm2,xmm6,xmm3,0A5h
62 F34D08 0A D3 A5, EVEX_Vrndscaless_xmm_k1z_xmm_xmmm32_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vrndscaless xmm2,xmm6,[rax+4],0A5h
62 F34D08 0A 50 01 A5, EVEX_Vrndscaless_xmm_k1z_xmm_xmmm32_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vrndscaless xmm18{k3},xmm14,xmm3,0A5h {sae}
62 E30D1B 0A D3 A5, EVEX_Vrndscaless_xmm_k1z_xmm_xmmm32_imm8_sae, EVEX, AVX512F, op0=rw op1=r op2=r op3=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vrndscaless xmm2{k3}{z},xmm6,xmm3,0A5h
62 F34D8B 0A D3 A5, EVEX_Vrndscaless_xmm_k1z_xmm_xmmm32_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=xmm6 r=xmm3
# roundsd xmm1,xmm5,0A5h
66 0F3A0B CD A5, Roundsd_xmm_xmmm64_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=xmm5
# roundsd xmm1,[rax],0A5h
66 0F3A0B 08 A5, Roundsd_xmm_xmmm64_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;Float64
# vroundsd xmm2,xmm6,xmm3,0A5h
C4E349 0B D3 A5, VEX_Vroundsd_xmm_xmm_xmmm64_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vroundsd xmm2,xmm6,qword ptr [rax],0A5h
C4E349 0B 10 A5, VEX_Vroundsd_xmm_xmm_xmmm64_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float64
# vrndscalesd xmm2,xmm6,xmm3,0A5h
62 F3CD08 0B D3 A5, EVEX_Vrndscalesd_xmm_k1z_xmm_xmmm64_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vrndscalesd xmm2,xmm6,[rax+8],0A5h
62 F3CD08 0B 50 01 A5, EVEX_Vrndscalesd_xmm_k1z_xmm_xmmm64_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vrndscalesd xmm18{k3},xmm14,xmm3,0A5h {sae}
62 E38D1B 0B D3 A5, EVEX_Vrndscalesd_xmm_k1z_xmm_xmmm64_imm8_sae, EVEX, AVX512F, op0=rw op1=r op2=r op3=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vrndscalesd xmm2{k3}{z},xmm6,xmm3,0A5h
62 F3CD8B 0B D3 A5, EVEX_Vrndscalesd_xmm_k1z_xmm_xmmm64_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=xmm6 r=xmm3
# blendps xmm1,xmm5,0A5h
66 0F3A0C CD A5, Blendps_xmm_xmmm128_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=xmm5
# blendps xmm1,[rax],0A5h
66 0F3A0C 08 A5, Blendps_xmm_xmmm128_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vblendps xmm2,xmm6,xmm3,0A5h
C4E349 0C D3 A5, VEX_Vblendps_xmm_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vblendps xmm2,xmm6,[rax],0A5h
C4E349 0C 10 A5, VEX_Vblendps_xmm_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vblendps ymm2,ymm6,ymm3,5Ah
C4E34D 0C D3 5A, VEX_Vblendps_ymm_ymm_ymmm256_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3
# vblendps ymm2,ymm6,[rax],5Ah
C4E34D 0C 10 5A, VEX_Vblendps_ymm_ymm_ymmm256_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# blendpd xmm1,xmm5,0A5h
66 0F3A0D CD A5, Blendpd_xmm_xmmm128_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=xmm5
# blendpd xmm1,[rax],0A5h
66 0F3A0D 08 A5, Blendpd_xmm_xmmm128_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vblendpd xmm2,xmm6,xmm3,0A5h
C4E349 0D D3 A5, VEX_Vblendpd_xmm_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vblendpd xmm2,xmm6,[rax],0A5h
C4E349 0D 10 A5, VEX_Vblendpd_xmm_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# vblendpd ymm2,ymm6,ymm3,5Ah
C4E34D 0D D3 5A, VEX_Vblendpd_ymm_ymm_ymmm256_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3
# vblendpd ymm2,ymm6,[rax],5Ah
C4E34D 0D 10 5A, VEX_Vblendpd_ymm_ymm_ymmm256_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64
# pblendw xmm1,xmm5,0A5h
66 0F3A0E CD A5, Pblendw_xmm_xmmm128_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=xmm5
# pblendw xmm1,[rax],0A5h
66 0F3A0E 08 A5, Pblendw_xmm_xmmm128_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt16
# vpblendw xmm2,xmm6,xmm3,0A5h
C4E349 0E D3 A5, VEX_Vpblendw_xmm_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vpblendw xmm2,xmm6,[rax],0A5h
C4E349 0E 10 A5, VEX_Vpblendw_xmm_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt16
# vpblendw ymm2,ymm6,ymm3,5Ah
C4E34D 0E D3 5A, VEX_Vpblendw_ymm_ymm_ymmm256_imm8, VEX, AVX2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3
# vpblendw ymm2,ymm6,[rax],5Ah
C4E34D 0E 10 5A, VEX_Vpblendw_ymm_ymm_ymmm256_imm8, VEX, AVX2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt16
# palignr mm1,mm5,0A5h
0F3A0F CD A5, Palignr_mm_mmm64_imm8, Legacy, SSSE3, op0=rw op1=r op2=r rw=mm1 r=mm5
# palignr mm1,[rax],0A5h
0F3A0F 08 A5, Palignr_mm_mmm64_imm8, Legacy, SSSE3, op0=rw op1=r op2=r rw=mm1 r=rax rm=ds:rax;Packed64_UInt8
# palignr xmm1,xmm5,0A5h
66 0F3A0F CD A5, Palignr_xmm_xmmm128_imm8, Legacy, SSSE3, op0=rw op1=r op2=r rw=xmm1 r=xmm5
# palignr xmm1,[rax],0A5h
66 0F3A0F 08 A5, Palignr_xmm_xmmm128_imm8, Legacy, SSSE3, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt8
# vpalignr xmm2,xmm6,xmm3,0A5h
C4E349 0F D3 A5, VEX_Vpalignr_xmm_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vpalignr xmm2,xmm6,[rax],0A5h
C4E349 0F 10 A5, VEX_Vpalignr_xmm_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt8
# vpalignr ymm2,ymm6,ymm3,0A5h
C4E34D 0F D3 A5, VEX_Vpalignr_ymm_ymm_ymmm256_imm8, VEX, AVX2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3
# vpalignr ymm2,ymm6,[rax],0A5h
C4E34D 0F 10 A5, VEX_Vpalignr_ymm_ymm_ymmm256_imm8, VEX, AVX2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt8
# vpalignr xmm2,xmm6,[rax+10h],0A5h
62 F34D08 0F 50 01 A5, EVEX_Vpalignr_xmm_k1z_xmm_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vpalignr xmm2{k3},xmm6,xmm3,0A5h
62 F34D0B 0F D3 A5, EVEX_Vpalignr_xmm_k1z_xmm_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r op3=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpalignr xmm18{k3}{z},xmm14,xmm3,0A5h
62 E30D8B 0F D3 A5, EVEX_Vpalignr_xmm_k1z_xmm_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r op3=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vpalignr ymm2,ymm6,[rax+20h],0A5h
62 F34D28 0F 50 01 A5, EVEX_Vpalignr_ymm_k1z_ymm_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vpalignr ymm2{k3},ymm6,ymm3,0A5h
62 F34D2B 0F D3 A5, EVEX_Vpalignr_ymm_k1z_ymm_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r op3=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpalignr ymm18{k3}{z},ymm14,ymm3,0A5h
62 E30DAB 0F D3 A5, EVEX_Vpalignr_ymm_k1z_ymm_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r op3=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vpalignr zmm2,zmm6,[rax+40h],0A5h
62 F34D48 0F 50 01 A5, EVEX_Vpalignr_zmm_k1z_zmm_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vpalignr zmm2{k3},zmm6,zmm3,0A5h
62 F34D4B 0F D3 A5, EVEX_Vpalignr_zmm_k1z_zmm_zmmm512_imm8, EVEX, AVX512BW, op0=rcw op1=r op2=r op3=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpalignr zmm18{k3}{z},zmm14,zmm3,0A5h
62 E30DCB 0F D3 A5, EVEX_Vpalignr_zmm_k1z_zmm_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=vmm18 r=k3 r=zmm14 r=zmm3
# pextrb ebp,xmm1,0A5h
66 0F3A14 CD A5, Pextrb_r32m8_xmm_imm8, Legacy, SSE4_1, op0=w op1=r op2=r w=rbp r=xmm1
# pextrb byte ptr [rax+1],xmm1,0A5h
66 0F3A14 48 01 A5, Pextrb_r32m8_xmm_imm8, Legacy, SSE4_1, op0=w op1=r op2=r r=rax r=xmm1 wm=ds:rax+1;UInt8
# pextrb rbp,xmm1,0A5h
66 48 0F3A14 CD A5, Pextrb_r64m8_xmm_imm8, Legacy, SSE4_1, op0=w op1=r op2=r w=rbp r=xmm1
# pextrb byte ptr [rax+1],xmm1,0A5h
66 48 0F3A14 48 01 A5, Pextrb_r64m8_xmm_imm8, Legacy, SSE4_1, op0=w op1=r op2=r r=rax r=xmm1 wm=ds:rax+1;UInt8
# vpextrb ebx,xmm2,0A5h
C4E379 14 D3 A5, VEX_Vpextrb_r32m8_xmm_imm8, VEX, AVX, op0=w op1=r op2=r w=rbx r=xmm2
# vpextrb byte ptr [rax+1],xmm2,0A5h
C4E379 14 50 01 A5, VEX_Vpextrb_r32m8_xmm_imm8, VEX, AVX, op0=w op1=r op2=r r=rax r=xmm2 wm=ds:rax+1;UInt8
# vpextrb rbx,xmm2,0A5h
C4E3F9 14 D3 A5, VEX_Vpextrb_r64m8_xmm_imm8, VEX, AVX, op0=w op1=r op2=r w=rbx r=xmm2
# vpextrb byte ptr [rax+1],xmm2,0A5h
C4E3F9 14 50 01 A5, VEX_Vpextrb_r64m8_xmm_imm8, VEX, AVX, op0=w op1=r op2=r r=rax r=xmm2 wm=ds:rax+1;UInt8
# vpextrb ebx,xmm2,0A5h
62 F37D08 14 D3 A5, EVEX_Vpextrb_r32m8_xmm_imm8, EVEX, AVX512BW, op0=w op1=r op2=r w=rbx r=xmm2
# vpextrb byte ptr [rax+1],xmm2,0A5h
62 F37D08 14 50 01 A5, EVEX_Vpextrb_r32m8_xmm_imm8, EVEX, AVX512BW, op0=w op1=r op2=r r=rax r=xmm2 wm=ds:rax+1;UInt8
# vpextrb rbx,xmm2,0A5h
62 F3FD08 14 D3 A5, EVEX_Vpextrb_r64m8_xmm_imm8, EVEX, AVX512BW, op0=w op1=r op2=r w=rbx r=xmm2
# vpextrb byte ptr [rax+1],xmm2,0A5h
62 F3FD08 14 50 01 A5, EVEX_Vpextrb_r64m8_xmm_imm8, EVEX, AVX512BW, op0=w op1=r op2=r r=rax r=xmm2 wm=ds:rax+1;UInt8
# pextrw ebp,xmm1,0A5h
66 0F3A15 CD A5, Pextrw_r32m16_xmm_imm8, Legacy, SSE4_1, op0=w op1=r op2=r w=rbp r=xmm1
# pextrw word ptr [rax+1],xmm1,0A5h
66 0F3A15 48 01 A5, Pextrw_r32m16_xmm_imm8, Legacy, SSE4_1, op0=w op1=r op2=r r=rax r=xmm1 wm=ds:rax+1;UInt16
# pextrw rbp,xmm1,0A5h
66 48 0F3A15 CD A5, Pextrw_r64m16_xmm_imm8, Legacy, SSE4_1, op0=w op1=r op2=r w=rbp r=xmm1
# pextrw word ptr [rax+1],xmm1,0A5h
66 48 0F3A15 48 01 A5, Pextrw_r64m16_xmm_imm8, Legacy, SSE4_1, op0=w op1=r op2=r r=rax r=xmm1 wm=ds:rax+1;UInt16
# vpextrw ebx,xmm2,0A5h
C4E379 15 D3 A5, VEX_Vpextrw_r32m16_xmm_imm8, VEX, AVX, op0=w op1=r op2=r w=rbx r=xmm2
# vpextrw word ptr [rax+1],xmm2,0A5h
C4E379 15 50 01 A5, VEX_Vpextrw_r32m16_xmm_imm8, VEX, AVX, op0=w op1=r op2=r r=rax r=xmm2 wm=ds:rax+1;UInt16
# vpextrw rbx,xmm2,0A5h
C4E3F9 15 D3 A5, VEX_Vpextrw_r64m16_xmm_imm8, VEX, AVX, op0=w op1=r op2=r w=rbx r=xmm2
# vpextrw word ptr [rax+1],xmm2,0A5h
C4E3F9 15 50 01 A5, VEX_Vpextrw_r64m16_xmm_imm8, VEX, AVX, op0=w op1=r op2=r r=rax r=xmm2 wm=ds:rax+1;UInt16
# vpextrw ebx,xmm2,0A5h
62 F37D08 15 D3 A5, EVEX_Vpextrw_r32m16_xmm_imm8, EVEX, AVX512BW, op0=w op1=r op2=r w=rbx r=xmm2
# vpextrw word ptr [rax+2],xmm2,0A5h
62 F37D08 15 50 01 A5, EVEX_Vpextrw_r32m16_xmm_imm8, EVEX, AVX512BW, op0=w op1=r op2=r r=rax r=xmm2 wm=ds:rax+2;UInt16
# vpextrw rbx,xmm2,0A5h
62 F3FD08 15 D3 A5, EVEX_Vpextrw_r64m16_xmm_imm8, EVEX, AVX512BW, op0=w op1=r op2=r w=rbx r=xmm2
# vpextrw word ptr [rax+2],xmm2,0A5h
62 F3FD08 15 50 01 A5, EVEX_Vpextrw_r64m16_xmm_imm8, EVEX, AVX512BW, op0=w op1=r op2=r r=rax r=xmm2 wm=ds:rax+2;UInt16
# pextrd ebp,xmm1,0A5h
66 0F3A16 CD A5, Pextrd_rm32_xmm_imm8, Legacy, SSE4_1, op0=w op1=r op2=r w=rbp r=xmm1
# pextrd dword ptr [rax+1],xmm1,0A5h
66 0F3A16 48 01 A5, Pextrd_rm32_xmm_imm8, Legacy, SSE4_1, op0=w op1=r op2=r r=rax r=xmm1 wm=ds:rax+1;UInt32
# pextrq rbp,xmm1,0A5h
66 48 0F3A16 CD A5, Pextrq_rm64_xmm_imm8, Legacy, SSE4_1, op0=w op1=r op2=r w=rbp r=xmm1
# pextrq qword ptr [rax+1],xmm1,0A5h
66 48 0F3A16 48 01 A5, Pextrq_rm64_xmm_imm8, Legacy, SSE4_1, op0=w op1=r op2=r r=rax r=xmm1 wm=ds:rax+1;UInt64
# vpextrd ebx,xmm2,0A5h
C4E379 16 D3 A5, VEX_Vpextrd_rm32_xmm_imm8, VEX, AVX, op0=w op1=r op2=r w=rbx r=xmm2
# vpextrd dword ptr [rax+1],xmm2,0A5h
C4E379 16 50 01 A5, VEX_Vpextrd_rm32_xmm_imm8, VEX, AVX, op0=w op1=r op2=r r=rax r=xmm2 wm=ds:rax+1;UInt32
# vpextrq rbx,xmm2,0A5h
C4E3F9 16 D3 A5, VEX_Vpextrq_rm64_xmm_imm8, VEX, AVX, op0=w op1=r op2=r w=rbx r=xmm2
# vpextrq qword ptr [rax+1],xmm2,0A5h
C4E3F9 16 50 01 A5, VEX_Vpextrq_rm64_xmm_imm8, VEX, AVX, op0=w op1=r op2=r r=rax r=xmm2 wm=ds:rax+1;UInt64
# vpextrd ebx,xmm2,0A5h
62 F37D08 16 D3 A5, EVEX_Vpextrd_rm32_xmm_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r w=rbx r=xmm2
# vpextrd dword ptr [rax+4],xmm2,0A5h
62 F37D08 16 50 01 A5, EVEX_Vpextrd_rm32_xmm_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r r=rax r=xmm2 wm=ds:rax+4;UInt32
# vpextrq rbx,xmm2,0A5h
62 F3FD08 16 D3 A5, EVEX_Vpextrq_rm64_xmm_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r w=rbx r=xmm2
# vpextrq qword ptr [rax+8],xmm2,0A5h
62 F3FD08 16 50 01 A5, EVEX_Vpextrq_rm64_xmm_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r r=rax r=xmm2 wm=ds:rax+8;UInt64
# extractps ebp,xmm1,0A5h
66 0F3A17 CD A5, Extractps_rm32_xmm_imm8, Legacy, SSE4_1, op0=w op1=r op2=r w=rbp r=xmm1
# extractps dword ptr [rax+1],xmm1,0A5h
66 0F3A17 48 01 A5, Extractps_rm32_xmm_imm8, Legacy, SSE4_1, op0=w op1=r op2=r r=rax r=xmm1 wm=ds:rax+1;Float32
# extractps ebp,xmm1,0A5h
66 48 0F3A17 CD A5, Extractps_r64m32_xmm_imm8, Legacy, SSE4_1, op0=w op1=r op2=r w=rbp r=xmm1
# extractps dword ptr [rax+1],xmm1,0A5h
66 48 0F3A17 48 01 A5, Extractps_r64m32_xmm_imm8, Legacy, SSE4_1, op0=w op1=r op2=r r=rax r=xmm1 wm=ds:rax+1;Float32
# vextractps ebx,xmm2,0A5h
C4E379 17 D3 A5, VEX_Vextractps_rm32_xmm_imm8, VEX, AVX, op0=w op1=r op2=r w=rbx r=xmm2
# vextractps dword ptr [rax+1],xmm2,0A5h
C4E379 17 50 01 A5, VEX_Vextractps_rm32_xmm_imm8, VEX, AVX, op0=w op1=r op2=r r=rax r=xmm2 wm=ds:rax+1;Float32
# vextractps ebx,xmm2,0A5h
C4E3F9 17 D3 A5, VEX_Vextractps_r64m32_xmm_imm8, VEX, AVX, op0=w op1=r op2=r w=rbx r=xmm2
# vextractps dword ptr [rax+1],xmm2,0A5h
C4E3F9 17 50 01 A5, VEX_Vextractps_r64m32_xmm_imm8, VEX, AVX, op0=w op1=r op2=r r=rax r=xmm2 wm=ds:rax+1;Float32
# vextractps ebx,xmm2,0A5h
62 F37D08 17 D3 A5, EVEX_Vextractps_rm32_xmm_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=rbx r=xmm2
# vextractps dword ptr [rax+4],xmm2,0A5h
62 F37D08 17 50 01 A5, EVEX_Vextractps_rm32_xmm_imm8, EVEX, AVX512F, op0=w op1=r op2=r r=rax r=xmm2 wm=ds:rax+4;Float32
# vextractps ebx,xmm2,0A5h
62 F3FD08 17 D3 A5, EVEX_Vextractps_r64m32_xmm_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=rbx r=xmm2
# vextractps dword ptr [rax+4],xmm2,0A5h
62 F3FD08 17 50 01 A5, EVEX_Vextractps_r64m32_xmm_imm8, EVEX, AVX512F, op0=w op1=r op2=r r=rax r=xmm2 wm=ds:rax+4;Float32
# vinsertf128 ymm2,ymm6,xmm3,0A5h
C4E34D 18 D3 A5, VEX_Vinsertf128_ymm_ymm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=xmm3
# vinsertf128 ymm2,ymm6,xmmword ptr [rax],0A5h
C4E34D 18 10 A5, VEX_Vinsertf128_ymm_ymm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Float128
# vinsertf32x4 ymm2,ymm6,xmmword ptr [rax+10h],0A5h
62 F34D28 18 50 01 A5, EVEX_Vinsertf32x4_ymm_k1z_ymm_xmmm128_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vinsertf32x4 ymm2{k3},ymm6,xmm3,0A5h
62 F34D2B 18 D3 A5, EVEX_Vinsertf32x4_ymm_k1z_ymm_xmmm128_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=xmm3
# vinsertf32x4 ymm18{k3}{z},ymm14,xmm3,0A5h
62 E30DAB 18 D3 A5, EVEX_Vinsertf32x4_ymm_k1z_ymm_xmmm128_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm18 r=k3 r=ymm14 r=xmm3
# vinsertf32x4 zmm2,zmm6,xmmword ptr [rax+10h],0A5h
62 F34D48 18 50 01 A5, EVEX_Vinsertf32x4_zmm_k1z_zmm_xmmm128_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vinsertf32x4 zmm2{k3},zmm6,xmm3,0A5h
62 F34D4B 18 D3 A5, EVEX_Vinsertf32x4_zmm_k1z_zmm_xmmm128_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r op3=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=xmm3
# vinsertf32x4 zmm18{k3}{z},zmm14,xmm3,0A5h
62 E30DCB 18 D3 A5, EVEX_Vinsertf32x4_zmm_k1z_zmm_xmmm128_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm18 r=k3 r=zmm14 r=xmm3
# vinsertf64x2 ymm2,ymm6,xmmword ptr [rax+10h],0A5h
62 F3CD28 18 50 01 A5, EVEX_Vinsertf64x2_ymm_k1z_ymm_xmmm128_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vinsertf64x2 ymm2{k3},ymm6,xmm3,0A5h
62 F3CD2B 18 D3 A5, EVEX_Vinsertf64x2_ymm_k1z_ymm_xmmm128_imm8, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r op3=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=xmm3
# vinsertf64x2 ymm18{k3}{z},ymm14,xmm3,0A5h
62 E38DAB 18 D3 A5, EVEX_Vinsertf64x2_ymm_k1z_ymm_xmmm128_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r op3=r w=vmm18 r=k3 r=ymm14 r=xmm3
# vinsertf64x2 zmm2,zmm6,xmmword ptr [rax+10h],0A5h
62 F3CD48 18 50 01 A5, EVEX_Vinsertf64x2_zmm_k1z_zmm_xmmm128_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vinsertf64x2 zmm2{k3},zmm6,xmm3,0A5h
62 F3CD4B 18 D3 A5, EVEX_Vinsertf64x2_zmm_k1z_zmm_xmmm128_imm8, EVEX, AVX512DQ, op0=rcw op1=r op2=r op3=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=xmm3
# vinsertf64x2 zmm18{k3}{z},zmm14,xmm3,0A5h
62 E38DCB 18 D3 A5, EVEX_Vinsertf64x2_zmm_k1z_zmm_xmmm128_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm18 r=k3 r=zmm14 r=xmm3
# vextractf128 xmm3,ymm2,0A5h
C4E37D 19 D3 A5, VEX_Vextractf128_xmmm128_ymm_imm8, VEX, AVX, op0=w op1=r op2=r w=vmm3 r=ymm2
# vextractf128 xmmword ptr [rax],ymm2,0A5h
C4E37D 19 10 A5, VEX_Vextractf128_xmmm128_ymm_imm8, VEX, AVX, op0=w op1=r op2=r r=rax r=ymm2 wm=ds:rax;Float128
# vextractf32x4 xmm3,ymm2,0A5h
62 F37D28 19 D3 A5, EVEX_Vextractf32x4_xmmm128_k1z_ymm_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm3 r=ymm2
# vextractf32x4 xmmword ptr [rax+10h],ymm2,0A5h
62 F37D28 19 50 01 A5, EVEX_Vextractf32x4_xmmm128_k1z_ymm_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r r=rax r=ymm2 wm=ds:rax+0x10;Packed128_Float32
# vextractf32x4 xmmword ptr [rax+10h]{k3},ymm2,0A5h
62 F37D2B 19 50 01 A5, EVEX_Vextractf32x4_xmmm128_k1z_ymm_imm8, EVEX, AVX512VL;AVX512F, op0=cw op1=r op2=r r=rax r=ymm2 r=k3 cwm=ds:rax+0x10;Packed128_Float32
# vextractf32x4 xmm3{k3},ymm2,0A5h
62 F37D2B 19 D3 A5, EVEX_Vextractf32x4_xmmm128_k1z_ymm_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm3 r=xmm3 r=k3 r=ymm2
# vextractf32x4 xmm3{k3}{z},ymm18,0A5h
62 E37DAB 19 D3 A5, EVEX_Vextractf32x4_xmmm128_k1z_ymm_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm3 r=k3 r=ymm18
# vextractf32x4 xmm3,zmm2,0A5h
62 F37D48 19 D3 A5, EVEX_Vextractf32x4_xmmm128_k1z_zmm_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm3 r=zmm2
# vextractf32x4 xmmword ptr [rax+10h],zmm2,0A5h
62 F37D48 19 50 01 A5, EVEX_Vextractf32x4_xmmm128_k1z_zmm_imm8, EVEX, AVX512F, op0=w op1=r op2=r r=rax r=zmm2 wm=ds:rax+0x10;Packed128_Float32
# vextractf32x4 xmmword ptr [rax+10h]{k3},zmm2,0A5h
62 F37D4B 19 50 01 A5, EVEX_Vextractf32x4_xmmm128_k1z_zmm_imm8, EVEX, AVX512F, op0=cw op1=r op2=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x10;Packed128_Float32
# vextractf32x4 xmm3{k3},zmm2,0A5h
62 F37D4B 19 D3 A5, EVEX_Vextractf32x4_xmmm128_k1z_zmm_imm8, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm3 r=xmm3 r=k3 r=zmm2
# vextractf32x4 xmm3{k3}{z},zmm18,0A5h
62 E37DCB 19 D3 A5, EVEX_Vextractf32x4_xmmm128_k1z_zmm_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm3 r=k3 r=zmm18
# vextractf64x2 xmm3,ymm2,0A5h
62 F3FD28 19 D3 A5, EVEX_Vextractf64x2_xmmm128_k1z_ymm_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm3 r=ymm2
# vextractf64x2 xmmword ptr [rax+10h],ymm2,0A5h
62 F3FD28 19 50 01 A5, EVEX_Vextractf64x2_xmmm128_k1z_ymm_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r r=rax r=ymm2 wm=ds:rax+0x10;Packed128_Float64
# vextractf64x2 xmmword ptr [rax+10h]{k3},ymm2,0A5h
62 F3FD2B 19 50 01 A5, EVEX_Vextractf64x2_xmmm128_k1z_ymm_imm8, EVEX, AVX512VL;AVX512DQ, op0=cw op1=r op2=r r=rax r=ymm2 r=k3 cwm=ds:rax+0x10;Packed128_Float64
# vextractf64x2 xmm3{k3},ymm2,0A5h
62 F3FD2B 19 D3 A5, EVEX_Vextractf64x2_xmmm128_k1z_ymm_imm8, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r w=vmm3 r=xmm3 r=k3 r=ymm2
# vextractf64x2 xmm3{k3}{z},ymm18,0A5h
62 E3FDAB 19 D3 A5, EVEX_Vextractf64x2_xmmm128_k1z_ymm_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm3 r=k3 r=ymm18
# vextractf64x2 xmm3,zmm2,0A5h
62 F3FD48 19 D3 A5, EVEX_Vextractf64x2_xmmm128_k1z_zmm_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm3 r=zmm2
# vextractf64x2 xmmword ptr [rax+10h],zmm2,0A5h
62 F3FD48 19 50 01 A5, EVEX_Vextractf64x2_xmmm128_k1z_zmm_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r r=rax r=zmm2 wm=ds:rax+0x10;Packed128_Float64
# vextractf64x2 xmmword ptr [rax+10h]{k3},zmm2,0A5h
62 F3FD4B 19 50 01 A5, EVEX_Vextractf64x2_xmmm128_k1z_zmm_imm8, EVEX, AVX512DQ, op0=cw op1=r op2=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x10;Packed128_Float64
# vextractf64x2 xmm3{k3},zmm2,0A5h
62 F3FD4B 19 D3 A5, EVEX_Vextractf64x2_xmmm128_k1z_zmm_imm8, EVEX, AVX512DQ, op0=rw op1=r op2=r w=vmm3 r=xmm3 r=k3 r=zmm2
# vextractf64x2 xmm3{k3}{z},zmm18,0A5h
62 E3FDCB 19 D3 A5, EVEX_Vextractf64x2_xmmm128_k1z_zmm_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm3 r=k3 r=zmm18
# vinsertf32x8 zmm2,zmm6,[rax+20h],0A5h
62 F34D48 1A 50 01 A5, EVEX_Vinsertf32x8_zmm_k1z_zmm_ymmm256_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vinsertf32x8 zmm2{k3},zmm6,ymm3,0A5h
62 F34D4B 1A D3 A5, EVEX_Vinsertf32x8_zmm_k1z_zmm_ymmm256_imm8, EVEX, AVX512DQ, op0=rcw op1=r op2=r op3=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=ymm3
# vinsertf32x8 zmm18{k3}{z},zmm14,ymm3,0A5h
62 E30DCB 1A D3 A5, EVEX_Vinsertf32x8_zmm_k1z_zmm_ymmm256_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm18 r=k3 r=zmm14 r=ymm3
# vinsertf64x4 zmm2,zmm6,[rax+20h],0A5h
62 F3CD48 1A 50 01 A5, EVEX_Vinsertf64x4_zmm_k1z_zmm_ymmm256_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vinsertf64x4 zmm2{k3},zmm6,ymm3,0A5h
62 F3CD4B 1A D3 A5, EVEX_Vinsertf64x4_zmm_k1z_zmm_ymmm256_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r op3=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=ymm3
# vinsertf64x4 zmm18{k3}{z},zmm14,ymm3,0A5h
62 E38DCB 1A D3 A5, EVEX_Vinsertf64x4_zmm_k1z_zmm_ymmm256_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm18 r=k3 r=zmm14 r=ymm3
# vextractf32x8 ymm3,zmm2,0A5h
62 F37D48 1B D3 A5, EVEX_Vextractf32x8_ymmm256_k1z_zmm_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm3 r=zmm2
# vextractf32x8 ymmword ptr [rax+20h],zmm2,0A5h
62 F37D48 1B 50 01 A5, EVEX_Vextractf32x8_ymmm256_k1z_zmm_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r r=rax r=zmm2 wm=ds:rax+0x20;Packed256_Float32
# vextractf32x8 ymmword ptr [rax+20h]{k3},zmm2,0A5h
62 F37D4B 1B 50 01 A5, EVEX_Vextractf32x8_ymmm256_k1z_zmm_imm8, EVEX, AVX512DQ, op0=cw op1=r op2=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x20;Packed256_Float32
# vextractf32x8 ymm3{k3},zmm2,0A5h
62 F37D4B 1B D3 A5, EVEX_Vextractf32x8_ymmm256_k1z_zmm_imm8, EVEX, AVX512DQ, op0=rw op1=r op2=r w=vmm3 r=ymm3 r=k3 r=zmm2
# vextractf32x8 ymm3{k3}{z},zmm18,0A5h
62 E37DCB 1B D3 A5, EVEX_Vextractf32x8_ymmm256_k1z_zmm_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm3 r=k3 r=zmm18
# vextractf64x4 ymm3,zmm2,0A5h
62 F3FD48 1B D3 A5, EVEX_Vextractf64x4_ymmm256_k1z_zmm_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm3 r=zmm2
# vextractf64x4 ymmword ptr [rax+20h],zmm2,0A5h
62 F3FD48 1B 50 01 A5, EVEX_Vextractf64x4_ymmm256_k1z_zmm_imm8, EVEX, AVX512F, op0=w op1=r op2=r r=rax r=zmm2 wm=ds:rax+0x20;Packed256_Float64
# vextractf64x4 ymmword ptr [rax+20h]{k3},zmm2,0A5h
62 F3FD4B 1B 50 01 A5, EVEX_Vextractf64x4_ymmm256_k1z_zmm_imm8, EVEX, AVX512F, op0=cw op1=r op2=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x20;Packed256_Float64
# vextractf64x4 ymm3{k3},zmm2,0A5h
62 F3FD4B 1B D3 A5, EVEX_Vextractf64x4_ymmm256_k1z_zmm_imm8, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm3 r=ymm3 r=k3 r=zmm2
# vextractf64x4 ymm3{k3}{z},zmm18,0A5h
62 E3FDCB 1B D3 A5, EVEX_Vextractf64x4_ymmm256_k1z_zmm_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm3 r=k3 r=zmm18
# vcvtps2ph xmm5,xmm1,0A5h
C4E379 1D CD A5, VEX_Vcvtps2ph_xmmm64_xmm_imm8, VEX, F16C, op0=w op1=r op2=r w=vmm5 r=xmm1
# vcvtps2ph qword ptr [rax],xmm2,0A5h
C4E379 1D 10 A5, VEX_Vcvtps2ph_xmmm64_xmm_imm8, VEX, F16C, op0=w op1=r op2=r r=rax r=xmm2 wm=ds:rax;Packed64_Float16
# vcvtps2ph xmm5,ymm1,0A5h
C4E37D 1D CD A5, VEX_Vcvtps2ph_xmmm128_ymm_imm8, VEX, F16C, op0=w op1=r op2=r w=vmm5 r=ymm1
# vcvtps2ph xmmword ptr [rax],ymm2,0A5h
C4E37D 1D 10 A5, VEX_Vcvtps2ph_xmmm128_ymm_imm8, VEX, F16C, op0=w op1=r op2=r r=rax r=ymm2 wm=ds:rax;Packed128_Float16
# vcvtps2ph xmm3,xmm18,0A5h
62 E37D08 1D D3 A5, EVEX_Vcvtps2ph_xmmm64_k1z_xmm_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm3 r=xmm18
# vcvtps2ph qword ptr [rax+8],xmm2,0A5h
62 F37D08 1D 50 01 A5, EVEX_Vcvtps2ph_xmmm64_k1z_xmm_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r r=rax r=xmm2 wm=ds:rax+8;Packed64_Float16
# vcvtps2ph qword ptr [rax+8]{k3},xmm2,0A5h
62 F37D0B 1D 50 01 A5, EVEX_Vcvtps2ph_xmmm64_k1z_xmm_imm8, EVEX, AVX512VL;AVX512F, op0=cw op1=r op2=r r=rax r=xmm2 r=k3 cwm=ds:rax+8;Packed64_Float16
# vcvtps2ph xmm3{k3},xmm18,0A5h
62 E37D0B 1D D3 A5, EVEX_Vcvtps2ph_xmmm64_k1z_xmm_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm3 r=xmm3 r=k3 r=xmm18
# vcvtps2ph xmm3{k3}{z},xmm2,0A5h
62 F37D8B 1D D3 A5, EVEX_Vcvtps2ph_xmmm64_k1z_xmm_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm3 r=k3 r=xmm2
# vcvtps2ph xmm3,ymm18,0A5h
62 E37D28 1D D3 A5, EVEX_Vcvtps2ph_xmmm128_k1z_ymm_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm3 r=ymm18
# vcvtps2ph xmmword ptr [rax+10h],ymm2,0A5h
62 F37D28 1D 50 01 A5, EVEX_Vcvtps2ph_xmmm128_k1z_ymm_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r r=rax r=ymm2 wm=ds:rax+0x10;Packed128_Float16
# vcvtps2ph xmmword ptr [rax+10h]{k3},ymm2,0A5h
62 F37D2B 1D 50 01 A5, EVEX_Vcvtps2ph_xmmm128_k1z_ymm_imm8, EVEX, AVX512VL;AVX512F, op0=cw op1=r op2=r r=rax r=ymm2 r=k3 cwm=ds:rax+0x10;Packed128_Float16
# vcvtps2ph xmm3{k3},ymm18,0A5h
62 E37D2B 1D D3 A5, EVEX_Vcvtps2ph_xmmm128_k1z_ymm_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm3 r=xmm3 r=k3 r=ymm18
# vcvtps2ph xmm3{k3}{z},ymm2,0A5h
62 F37DAB 1D D3 A5, EVEX_Vcvtps2ph_xmmm128_k1z_ymm_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm3 r=k3 r=ymm2
# vcvtps2ph ymm3,zmm2,0A5h {sae}
62 F37D18 1D D3 A5, EVEX_Vcvtps2ph_ymmm256_k1z_zmm_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm3 r=zmm2
# vcvtps2ph ymmword ptr [rax+20h],zmm2,0A5h
62 F37D48 1D 50 01 A5, EVEX_Vcvtps2ph_ymmm256_k1z_zmm_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r r=rax r=zmm2 wm=ds:rax+0x20;Packed256_Float16
# vcvtps2ph ymmword ptr [rax+20h]{k3},zmm2,0A5h
62 F37D4B 1D 50 01 A5, EVEX_Vcvtps2ph_ymmm256_k1z_zmm_imm8_sae, EVEX, AVX512F, op0=cw op1=r op2=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x20;Packed256_Float16
# vcvtps2ph ymm3{k3},zmm2,0A5h {sae}
62 F37D1B 1D D3 A5, EVEX_Vcvtps2ph_ymmm256_k1z_zmm_imm8_sae, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm3 r=ymm3 r=k3 r=zmm2
# vcvtps2ph ymm3{k3}{z},zmm2,0A5h {sae}
62 F37DDB 1D D3 A5, EVEX_Vcvtps2ph_ymmm256_k1z_zmm_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm3 r=k3 r=zmm2
# vpcmpud k2,xmm6,[rax+10h],0A5h
62 F34D08 1E 50 01 A5, EVEX_Vpcmpud_kr_k1_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpcmpud k2{k3},xmm6,xmm3,0A5h
62 F34D0B 1E D3 A5, EVEX_Vpcmpud_kr_k1_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=k2 r=k3 r=xmm6 r=xmm3
# vpcmpud k2,ymm6,[rax+20h],0A5h
62 F34D28 1E 50 01 A5, EVEX_Vpcmpud_kr_k1_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpcmpud k2{k3},ymm6,ymm3,0A5h
62 F34D2B 1E D3 A5, EVEX_Vpcmpud_kr_k1_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=k2 r=k3 r=ymm6 r=ymm3
# vpcmpud k2,zmm6,[rax+40h],0A5h
62 F34D48 1E 50 01 A5, EVEX_Vpcmpud_kr_k1_zmm_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpcmpud k2{k3},zmm6,zmm3,0A5h
62 F34D4B 1E D3 A5, EVEX_Vpcmpud_kr_k1_zmm_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=k2 r=k3 r=zmm6 r=zmm3
# vpcmpuq k2,xmm6,[rax+10h],0A5h
62 F3CD08 1E 50 01 A5, EVEX_Vpcmpuq_kr_k1_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpcmpuq k2{k3},xmm6,xmm3,0A5h
62 F3CD0B 1E D3 A5, EVEX_Vpcmpuq_kr_k1_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=k2 r=k3 r=xmm6 r=xmm3
# vpcmpuq k2,ymm6,[rax+20h],0A5h
62 F3CD28 1E 50 01 A5, EVEX_Vpcmpuq_kr_k1_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpcmpuq k2{k3},ymm6,ymm3,0A5h
62 F3CD2B 1E D3 A5, EVEX_Vpcmpuq_kr_k1_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=k2 r=k3 r=ymm6 r=ymm3
# vpcmpuq k2,zmm6,[rax+40h],0A5h
62 F3CD48 1E 50 01 A5, EVEX_Vpcmpuq_kr_k1_zmm_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpcmpuq k2{k3},zmm6,zmm3,0A5h
62 F3CD4B 1E D3 A5, EVEX_Vpcmpuq_kr_k1_zmm_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=k2 r=k3 r=zmm6 r=zmm3
# vpcmpd k2,xmm6,[rax+10h],0A5h
62 F34D08 1F 50 01 A5, EVEX_Vpcmpd_kr_k1_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int32
# vpcmpd k2{k3},xmm6,xmm3,0A5h
62 F34D0B 1F D3 A5, EVEX_Vpcmpd_kr_k1_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=k2 r=k3 r=xmm6 r=xmm3
# vpcmpd k2,ymm6,[rax+20h],0A5h
62 F34D28 1F 50 01 A5, EVEX_Vpcmpd_kr_k1_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int32
# vpcmpd k2{k3},ymm6,ymm3,0A5h
62 F34D2B 1F D3 A5, EVEX_Vpcmpd_kr_k1_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=k2 r=k3 r=ymm6 r=ymm3
# vpcmpd k2,zmm6,[rax+40h],0A5h
62 F34D48 1F 50 01 A5, EVEX_Vpcmpd_kr_k1_zmm_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int32
# vpcmpd k2{k3},zmm6,zmm3,0A5h
62 F34D4B 1F D3 A5, EVEX_Vpcmpd_kr_k1_zmm_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=k2 r=k3 r=zmm6 r=zmm3
# vpcmpq k2,xmm6,[rax+10h],0A5h
62 F3CD08 1F 50 01 A5, EVEX_Vpcmpq_kr_k1_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int64
# vpcmpq k2{k3},xmm6,xmm3,0A5h
62 F3CD0B 1F D3 A5, EVEX_Vpcmpq_kr_k1_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=k2 r=k3 r=xmm6 r=xmm3
# vpcmpq k2,ymm6,[rax+20h],0A5h
62 F3CD28 1F 50 01 A5, EVEX_Vpcmpq_kr_k1_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int64
# vpcmpq k2{k3},ymm6,ymm3,0A5h
62 F3CD2B 1F D3 A5, EVEX_Vpcmpq_kr_k1_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=k2 r=k3 r=ymm6 r=ymm3
# vpcmpq k2,zmm6,[rax+40h],0A5h
62 F3CD48 1F 50 01 A5, EVEX_Vpcmpq_kr_k1_zmm_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int64
# vpcmpq k2{k3},zmm6,zmm3,0A5h
62 F3CD4B 1F D3 A5, EVEX_Vpcmpq_kr_k1_zmm_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=k2 r=k3 r=zmm6 r=zmm3
# pinsrb xmm1,ebx,0A5h
66 0F3A20 CB A5, Pinsrb_xmm_r32m8_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=bl
# pinsrb xmm1,esp,0A5h
66 0F3A20 CC A5, Pinsrb_xmm_r32m8_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=spl
# pinsrb xmm1,r15d,0A5h
66 41 0F3A20 CF A5, Pinsrb_xmm_r32m8_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=r15l
# pinsrb xmm1,byte ptr [rax],0A5h
66 0F3A20 08 A5, Pinsrb_xmm_r32m8_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;UInt8
# pinsrb xmm1,rbx,0A5h
66 48 0F3A20 CB A5, Pinsrb_xmm_r64m8_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=bl
# pinsrb xmm1,rsp,0A5h
66 48 0F3A20 CC A5, Pinsrb_xmm_r64m8_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=spl
# pinsrb xmm1,r15,0A5h
66 49 0F3A20 CF A5, Pinsrb_xmm_r64m8_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=r15l
# pinsrb xmm1,byte ptr [rax],0A5h
66 48 0F3A20 08 A5, Pinsrb_xmm_r64m8_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;UInt8
# vpinsrb xmm2,xmm6,ebx,0A5h
C4E349 20 D3 A5, VEX_Vpinsrb_xmm_xmm_r32m8_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=bl
# vpinsrb xmm2,xmm6,esp,0A5h
C4E349 20 D4 A5, VEX_Vpinsrb_xmm_xmm_r32m8_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=spl
# vpinsrb xmm2,xmm6,r15d,0A5h
C4C349 20 D7 A5, VEX_Vpinsrb_xmm_xmm_r32m8_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=r15l
# vpinsrb xmm2,xmm6,byte ptr [rax],0A5h
C4E349 20 10 A5, VEX_Vpinsrb_xmm_xmm_r32m8_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;UInt8
# vpinsrb xmm2,xmm6,ebx,0A5h
C4E3C9 20 D3 A5, VEX_Vpinsrb_xmm_xmm_r64m8_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=bl
# vpinsrb xmm2,xmm6,esp,0A5h
C4E3C9 20 D4 A5, VEX_Vpinsrb_xmm_xmm_r64m8_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=spl
# vpinsrb xmm2,xmm6,r15d,0A5h
C4C3C9 20 D7 A5, VEX_Vpinsrb_xmm_xmm_r64m8_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=r15l
# vpinsrb xmm2,xmm6,byte ptr [rax],0A5h
C4E3C9 20 10 A5, VEX_Vpinsrb_xmm_xmm_r64m8_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;UInt8
# vpinsrb xmm2,xmm6,ebx,0A5h
62 F34D08 20 D3 A5, EVEX_Vpinsrb_xmm_xmm_r32m8_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=bl
# vpinsrb xmm2,xmm6,esp,0A5h
62 F34D08 20 D4 A5, EVEX_Vpinsrb_xmm_xmm_r32m8_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=spl
# vpinsrb xmm2,xmm6,r15d,0A5h
62 D34D08 20 D7 A5, EVEX_Vpinsrb_xmm_xmm_r32m8_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=r15l
# vpinsrb xmm2,xmm6,byte ptr [rax+1],0A5h
62 F34D08 20 50 01 A5, EVEX_Vpinsrb_xmm_xmm_r32m8_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+1;UInt8
# vpinsrb xmm2,xmm6,ebx,0A5h
62 F3CD08 20 D3 A5, EVEX_Vpinsrb_xmm_xmm_r64m8_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=bl
# vpinsrb xmm2,xmm6,esp,0A5h
62 F3CD08 20 D4 A5, EVEX_Vpinsrb_xmm_xmm_r64m8_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=spl
# vpinsrb xmm2,xmm6,r15d,0A5h
62 D3CD08 20 D7 A5, EVEX_Vpinsrb_xmm_xmm_r64m8_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=r15l
# vpinsrb xmm2,xmm6,byte ptr [rax+1],0A5h
62 F3CD08 20 50 01 A5, EVEX_Vpinsrb_xmm_xmm_r64m8_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+1;UInt8
# insertps xmm1,xmm5,0A5h
66 0F3A21 CD A5, Insertps_xmm_xmmm32_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=xmm5
# insertps xmm1,dword ptr [rax],0A5h
66 0F3A21 08 A5, Insertps_xmm_xmmm32_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;Float32
# vinsertps xmm2,xmm6,xmm3,0A5h
C4E349 21 D3 A5, VEX_Vinsertps_xmm_xmm_xmmm32_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vinsertps xmm2,xmm6,dword ptr [rax],0A5h
C4E349 21 10 A5, VEX_Vinsertps_xmm_xmm_xmmm32_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float32
# vinsertps xmm2,xmm6,xmm3,0A5h
62 F34D08 21 D3 A5, EVEX_Vinsertps_xmm_xmm_xmmm32_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vinsertps xmm2,xmm6,dword ptr [rax+4],0A5h
62 F34D08 21 50 01 A5, EVEX_Vinsertps_xmm_xmm_xmmm32_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# pinsrd xmm1,ebp,0A5h
66 0F3A22 CD A5, Pinsrd_xmm_rm32_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=ebp
# pinsrd xmm1,dword ptr [rax],0A5h
66 0F3A22 08 A5, Pinsrd_xmm_rm32_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;UInt32
# pinsrq xmm1,rbp,0A5h
66 48 0F3A22 CD A5, Pinsrq_xmm_rm64_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=rbp
# pinsrq xmm1,qword ptr [rax],0A5h
66 48 0F3A22 08 A5, Pinsrq_xmm_rm64_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;UInt64
# vpinsrd xmm2,xmm6,ebx,0A5h
C4E349 22 D3 A5, VEX_Vpinsrd_xmm_xmm_rm32_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=ebx
# vpinsrd xmm2,xmm6,dword ptr [rax],0A5h
C4E349 22 10 A5, VEX_Vpinsrd_xmm_xmm_rm32_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;UInt32
# vpinsrq xmm2,xmm6,rbx,0A5h
C4E3C9 22 D3 A5, VEX_Vpinsrq_xmm_xmm_rm64_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rbx
# vpinsrq xmm2,xmm6,qword ptr [rax],0A5h
C4E3C9 22 10 A5, VEX_Vpinsrq_xmm_xmm_rm64_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;UInt64
# vpinsrd xmm2,xmm6,ebx,0A5h
62 F34D08 22 D3 A5, EVEX_Vpinsrd_xmm_xmm_rm32_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=ebx
# vpinsrd xmm2,xmm6,dword ptr [rax+4],0A5h
62 F34D08 22 50 01 A5, EVEX_Vpinsrd_xmm_xmm_rm32_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+4;UInt32
# vpinsrq xmm2,xmm6,rbx,0A5h
62 F3CD08 22 D3 A5, EVEX_Vpinsrq_xmm_xmm_rm64_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rbx
# vpinsrq xmm2,xmm6,qword ptr [rax+8],0A5h
62 F3CD08 22 50 01 A5, EVEX_Vpinsrq_xmm_xmm_rm64_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;UInt64
# vshuff32x4 ymm2,ymm6,[rax+20h],0A5h
62 F34D28 23 50 01 A5, EVEX_Vshuff32x4_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vshuff32x4 ymm2{k3},ymm6,ymm3,0A5h
62 F34D2B 23 D3 A5, EVEX_Vshuff32x4_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vshuff32x4 ymm2{k3}{z},ymm6,ymm3,0A5h
62 F34DAB 23 D3 A5, EVEX_Vshuff32x4_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vshuff32x4 zmm2,zmm6,[rax+40h],0A5h
62 F34D48 23 50 01 A5, EVEX_Vshuff32x4_zmm_k1z_zmm_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vshuff32x4 zmm2{k3},zmm6,zmm3,0A5h
62 F34D4B 23 D3 A5, EVEX_Vshuff32x4_zmm_k1z_zmm_zmmm512b32_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r op3=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vshuff32x4 zmm2{k3}{z},zmm6,zmm3,0A5h
62 F34DCB 23 D3 A5, EVEX_Vshuff32x4_zmm_k1z_zmm_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vshuff64x2 ymm2,ymm6,[rax+20h],0A5h
62 F3CD28 23 50 01 A5, EVEX_Vshuff64x2_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vshuff64x2 ymm18{k3},ymm14,ymm3,0A5h
62 E38D2B 23 D3 A5, EVEX_Vshuff64x2_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vshuff64x2 ymm2{k3}{z},ymm6,ymm3,0A5h
62 F3CDAB 23 D3 A5, EVEX_Vshuff64x2_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vshuff64x2 zmm2,zmm6,[rax+40h],0A5h
62 F3CD48 23 50 01 A5, EVEX_Vshuff64x2_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vshuff64x2 zmm18{k3},zmm14,zmm3,0A5h
62 E38D4B 23 D3 A5, EVEX_Vshuff64x2_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r op3=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vshuff64x2 zmm2{k3}{z},zmm6,zmm3,0A5h
62 F3CDCB 23 D3 A5, EVEX_Vshuff64x2_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vpternlogd xmm2,xmm6,[rax+10h],0A5h
62 F34D08 25 50 01 A5, EVEX_Vpternlogd_xmm_k1z_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpternlogd xmm2{k3},xmm6,xmm3,0A5h
62 F34D0B 25 D3 A5, EVEX_Vpternlogd_xmm_k1z_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpternlogd xmm2{k3}{z},xmm6,xmm3,0A5h
62 F34D8B 25 D3 A5, EVEX_Vpternlogd_xmm_k1z_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpternlogd ymm2,ymm6,[rax+20h],0A5h
62 F34D28 25 50 01 A5, EVEX_Vpternlogd_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpternlogd ymm2{k3},ymm6,ymm3,0A5h
62 F34D2B 25 D3 A5, EVEX_Vpternlogd_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpternlogd ymm2{k3}{z},ymm6,ymm3,0A5h
62 F34DAB 25 D3 A5, EVEX_Vpternlogd_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpternlogd zmm2,zmm6,[rax+40h],0A5h
62 F34D48 25 50 01 A5, EVEX_Vpternlogd_zmm_k1z_zmm_zmmm512b32_imm8, EVEX, AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpternlogd zmm2{k3},zmm6,zmm3,0A5h
62 F34D4B 25 D3 A5, EVEX_Vpternlogd_zmm_k1z_zmm_zmmm512b32_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r op3=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpternlogd zmm2{k3}{z},zmm6,zmm3,0A5h
62 F34DCB 25 D3 A5, EVEX_Vpternlogd_zmm_k1z_zmm_zmmm512b32_imm8, EVEX, AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vpternlogq xmm2,xmm6,[rax+10h],0A5h
62 F3CD08 25 50 01 A5, EVEX_Vpternlogq_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpternlogq xmm18{k3},xmm14,xmm3,0A5h
62 E38D0B 25 D3 A5, EVEX_Vpternlogq_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vpternlogq xmm2{k3}{z},xmm6,xmm3,0A5h
62 F3CD8B 25 D3 A5, EVEX_Vpternlogq_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vpternlogq ymm2,ymm6,[rax+20h],0A5h
62 F3CD28 25 50 01 A5, EVEX_Vpternlogq_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpternlogq ymm18{k3},ymm14,ymm3,0A5h
62 E38D2B 25 D3 A5, EVEX_Vpternlogq_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vpternlogq ymm2{k3}{z},ymm6,ymm3,0A5h
62 F3CDAB 25 D3 A5, EVEX_Vpternlogq_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vpternlogq zmm2,zmm6,[rax+40h],0A5h
62 F3CD48 25 50 01 A5, EVEX_Vpternlogq_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=zmm6 r=zmm2 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpternlogq zmm18{k3},zmm14,zmm3,0A5h
62 E38D4B 25 D3 A5, EVEX_Vpternlogq_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r op3=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vpternlogq zmm2{k3}{z},zmm6,zmm3,0A5h
62 F3CDCB 25 D3 A5, EVEX_Vpternlogq_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vgetmantps xmm2,[rax+10h],0A5h
62 F37D08 26 50 01 A5, EVEX_Vgetmantps_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float32
# vgetmantps xmm2{k3},xmm3,0A5h
62 F37D0B 26 D3 A5, EVEX_Vgetmantps_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vgetmantps xmm2{k3}{z},xmm3,0A5h
62 F37D8B 26 D3 A5, EVEX_Vgetmantps_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm3
# vgetmantps ymm2,[rax+20h],0A5h
62 F37D28 26 50 01 A5, EVEX_Vgetmantps_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float32
# vgetmantps ymm2{k3},ymm3,0A5h
62 F37D2B 26 D3 A5, EVEX_Vgetmantps_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vgetmantps ymm2{k3}{z},ymm3,0A5h
62 F37DAB 26 D3 A5, EVEX_Vgetmantps_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm3
# vgetmantps zmm2,[rax+40h],0A5h
62 F37D48 26 50 01 A5, EVEX_Vgetmantps_zmm_k1z_zmmm512b32_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float32
# vgetmantps zmm2{k3},zmm3,0A5h
62 F37D4B 26 D3 A5, EVEX_Vgetmantps_zmm_k1z_zmmm512b32_imm8_sae, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vgetmantps zmm2{k3}{z},zmm3,0A5h {sae}
62 F37D9B 26 D3 A5, EVEX_Vgetmantps_zmm_k1z_zmmm512b32_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm3
# vgetmantpd xmm2,[rax+10h],0A5h
62 F3FD08 26 50 01 A5, EVEX_Vgetmantpd_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float64
# vgetmantpd xmm2{k3},xmm3,0A5h
62 F3FD0B 26 D3 A5, EVEX_Vgetmantpd_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vgetmantpd xmm2{k3}{z},xmm3,0A5h
62 F3FD8B 26 D3 A5, EVEX_Vgetmantpd_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm3
# vgetmantpd ymm2,[rax+20h],0A5h
62 F3FD28 26 50 01 A5, EVEX_Vgetmantpd_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float64
# vgetmantpd ymm2{k3},ymm3,0A5h
62 F3FD2B 26 D3 A5, EVEX_Vgetmantpd_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vgetmantpd ymm2{k3}{z},ymm3,0A5h
62 F3FDAB 26 D3 A5, EVEX_Vgetmantpd_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm3
# vgetmantpd zmm2,[rax+40h],0A5h
62 F3FD48 26 50 01 A5, EVEX_Vgetmantpd_zmm_k1z_zmmm512b64_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float64
# vgetmantpd zmm2{k3},zmm3,0A5h
62 F3FD4B 26 D3 A5, EVEX_Vgetmantpd_zmm_k1z_zmmm512b64_imm8_sae, EVEX, AVX512F, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vgetmantpd zmm2{k3}{z},zmm3,0A5h {sae}
62 F3FD9B 26 D3 A5, EVEX_Vgetmantpd_zmm_k1z_zmmm512b64_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm3
# vgetmantss xmm2,xmm6,xmm3,0A5h
62 F34D08 27 D3 A5, EVEX_Vgetmantss_xmm_k1z_xmm_xmmm32_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vgetmantss xmm2,xmm6,[rax+4],0A5h
62 F34D08 27 50 01 A5, EVEX_Vgetmantss_xmm_k1z_xmm_xmmm32_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vgetmantss xmm18{k3},xmm14,xmm3,0A5h {sae}
62 E30D1B 27 D3 A5, EVEX_Vgetmantss_xmm_k1z_xmm_xmmm32_imm8_sae, EVEX, AVX512F, op0=rw op1=r op2=r op3=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vgetmantss xmm2{k3}{z},xmm6,xmm3,0A5h
62 F34D8B 27 D3 A5, EVEX_Vgetmantss_xmm_k1z_xmm_xmmm32_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vgetmantsd xmm2,xmm6,xmm3,0A5h
62 F3CD08 27 D3 A5, EVEX_Vgetmantsd_xmm_k1z_xmm_xmmm64_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vgetmantsd xmm2,xmm6,[rax+8],0A5h
62 F3CD08 27 50 01 A5, EVEX_Vgetmantsd_xmm_k1z_xmm_xmmm64_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vgetmantsd xmm18{k3},xmm14,xmm3,0A5h {sae}
62 E38D1B 27 D3 A5, EVEX_Vgetmantsd_xmm_k1z_xmm_xmmm64_imm8_sae, EVEX, AVX512F, op0=rw op1=r op2=r op3=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vgetmantsd xmm2{k3}{z},xmm6,xmm3,0A5h
62 F3CD8B 27 D3 A5, EVEX_Vgetmantsd_xmm_k1z_xmm_xmmm64_imm8_sae, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=xmm6 r=xmm3
# kshiftrw k2,k3,0A5h
C4E3F9 30 D3 A5, VEX_Kshiftrw_kr_kr_imm8, VEX, AVX512F, op0=w op1=r op2=r w=k2 r=k3
# kshiftrb k2,k3,0A5h
C4E379 30 D3 A5, VEX_Kshiftrb_kr_kr_imm8, VEX, AVX512DQ, op0=w op1=r op2=r w=k2 r=k3
# kshiftrq k2,k3,0A5h
C4E3F9 31 D3 A5, VEX_Kshiftrq_kr_kr_imm8, VEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k3
# kshiftrd k2,k3,0A5h
C4E379 31 D3 A5, VEX_Kshiftrd_kr_kr_imm8, VEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k3
# kshiftlw k2,k3,0A5h
C4E3F9 32 D3 A5, VEX_Kshiftlw_kr_kr_imm8, VEX, AVX512F, op0=w op1=r op2=r w=k2 r=k3
# kshiftlb k2,k3,0A5h
C4E379 32 D3 A5, VEX_Kshiftlb_kr_kr_imm8, VEX, AVX512DQ, op0=w op1=r op2=r w=k2 r=k3
# kshiftlq k2,k3,0A5h
C4E3F9 33 D3 A5, VEX_Kshiftlq_kr_kr_imm8, VEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k3
# kshiftld k2,k3,0A5h
C4E379 33 D3 A5, VEX_Kshiftld_kr_kr_imm8, VEX, AVX512BW, op0=w op1=r op2=r w=k2 r=k3
# vinserti128 ymm2,ymm6,xmm3,0A5h
C4E34D 38 D3 A5, VEX_Vinserti128_ymm_ymm_xmmm128_imm8, VEX, AVX2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=xmm3
# vinserti128 ymm2,ymm6,xmmword ptr [rax],0A5h
C4E34D 38 10 A5, VEX_Vinserti128_ymm_ymm_xmmm128_imm8, VEX, AVX2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Int128
# vinserti32x4 ymm2,ymm6,xmmword ptr [rax+10h],0A5h
62 F34D28 38 50 01 A5, EVEX_Vinserti32x4_ymm_k1z_ymm_xmmm128_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vinserti32x4 ymm2{k3},ymm6,xmm3,0A5h
62 F34D2B 38 D3 A5, EVEX_Vinserti32x4_ymm_k1z_ymm_xmmm128_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=xmm3
# vinserti32x4 ymm18{k3}{z},ymm14,xmm3,0A5h
62 E30DAB 38 D3 A5, EVEX_Vinserti32x4_ymm_k1z_ymm_xmmm128_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm18 r=k3 r=ymm14 r=xmm3
# vinserti32x4 zmm2,zmm6,xmmword ptr [rax+10h],0A5h
62 F34D48 38 50 01 A5, EVEX_Vinserti32x4_zmm_k1z_zmm_xmmm128_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vinserti32x4 zmm2{k3},zmm6,xmm3,0A5h
62 F34D4B 38 D3 A5, EVEX_Vinserti32x4_zmm_k1z_zmm_xmmm128_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r op3=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=xmm3
# vinserti32x4 zmm18{k3}{z},zmm14,xmm3,0A5h
62 E30DCB 38 D3 A5, EVEX_Vinserti32x4_zmm_k1z_zmm_xmmm128_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm18 r=k3 r=zmm14 r=xmm3
# vinserti64x2 ymm2,ymm6,xmmword ptr [rax+10h],0A5h
62 F3CD28 38 50 01 A5, EVEX_Vinserti64x2_ymm_k1z_ymm_xmmm128_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vinserti64x2 ymm2{k3},ymm6,xmm3,0A5h
62 F3CD2B 38 D3 A5, EVEX_Vinserti64x2_ymm_k1z_ymm_xmmm128_imm8, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r op3=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=xmm3
# vinserti64x2 ymm18{k3}{z},ymm14,xmm3,0A5h
62 E38DAB 38 D3 A5, EVEX_Vinserti64x2_ymm_k1z_ymm_xmmm128_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r op3=r w=vmm18 r=k3 r=ymm14 r=xmm3
# vinserti64x2 zmm2,zmm6,xmmword ptr [rax+10h],0A5h
62 F3CD48 38 50 01 A5, EVEX_Vinserti64x2_zmm_k1z_zmm_xmmm128_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vinserti64x2 zmm2{k3},zmm6,xmm3,0A5h
62 F3CD4B 38 D3 A5, EVEX_Vinserti64x2_zmm_k1z_zmm_xmmm128_imm8, EVEX, AVX512DQ, op0=rcw op1=r op2=r op3=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=xmm3
# vinserti64x2 zmm18{k3}{z},zmm14,xmm3,0A5h
62 E38DCB 38 D3 A5, EVEX_Vinserti64x2_zmm_k1z_zmm_xmmm128_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm18 r=k3 r=zmm14 r=xmm3
# vextracti128 xmm3,ymm2,0A5h
C4E37D 39 D3 A5, VEX_Vextracti128_xmmm128_ymm_imm8, VEX, AVX2, op0=w op1=r op2=r w=vmm3 r=ymm2
# vextracti128 xmmword ptr [rax],ymm2,0A5h
C4E37D 39 10 A5, VEX_Vextracti128_xmmm128_ymm_imm8, VEX, AVX2, op0=w op1=r op2=r r=rax r=ymm2 wm=ds:rax;Int128
# vextracti32x4 xmm3,ymm2,0A5h
62 F37D28 39 D3 A5, EVEX_Vextracti32x4_xmmm128_k1z_ymm_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm3 r=ymm2
# vextracti32x4 xmmword ptr [rax+10h],ymm2,0A5h
62 F37D28 39 50 01 A5, EVEX_Vextracti32x4_xmmm128_k1z_ymm_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r r=rax r=ymm2 wm=ds:rax+0x10;Packed128_UInt32
# vextracti32x4 xmmword ptr [rax+10h]{k3},ymm2,0A5h
62 F37D2B 39 50 01 A5, EVEX_Vextracti32x4_xmmm128_k1z_ymm_imm8, EVEX, AVX512VL;AVX512F, op0=cw op1=r op2=r r=rax r=ymm2 r=k3 cwm=ds:rax+0x10;Packed128_UInt32
# vextracti32x4 xmm3{k3},ymm2,0A5h
62 F37D2B 39 D3 A5, EVEX_Vextracti32x4_xmmm128_k1z_ymm_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r w=vmm3 r=xmm3 r=k3 r=ymm2
# vextracti32x4 xmm3{k3}{z},ymm18,0A5h
62 E37DAB 39 D3 A5, EVEX_Vextracti32x4_xmmm128_k1z_ymm_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r w=vmm3 r=k3 r=ymm18
# vextracti32x4 xmm3,zmm2,0A5h
62 F37D48 39 D3 A5, EVEX_Vextracti32x4_xmmm128_k1z_zmm_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm3 r=zmm2
# vextracti32x4 xmmword ptr [rax+10h],zmm2,0A5h
62 F37D48 39 50 01 A5, EVEX_Vextracti32x4_xmmm128_k1z_zmm_imm8, EVEX, AVX512F, op0=w op1=r op2=r r=rax r=zmm2 wm=ds:rax+0x10;Packed128_UInt32
# vextracti32x4 xmmword ptr [rax+10h]{k3},zmm2,0A5h
62 F37D4B 39 50 01 A5, EVEX_Vextracti32x4_xmmm128_k1z_zmm_imm8, EVEX, AVX512F, op0=cw op1=r op2=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x10;Packed128_UInt32
# vextracti32x4 xmm3{k3},zmm2,0A5h
62 F37D4B 39 D3 A5, EVEX_Vextracti32x4_xmmm128_k1z_zmm_imm8, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm3 r=xmm3 r=k3 r=zmm2
# vextracti32x4 xmm3{k3}{z},zmm18,0A5h
62 E37DCB 39 D3 A5, EVEX_Vextracti32x4_xmmm128_k1z_zmm_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm3 r=k3 r=zmm18
# vextracti64x2 xmm3,ymm2,0A5h
62 F3FD28 39 D3 A5, EVEX_Vextracti64x2_xmmm128_k1z_ymm_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm3 r=ymm2
# vextracti64x2 xmmword ptr [rax+10h],ymm2,0A5h
62 F3FD28 39 50 01 A5, EVEX_Vextracti64x2_xmmm128_k1z_ymm_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r r=rax r=ymm2 wm=ds:rax+0x10;Packed128_UInt64
# vextracti64x2 xmmword ptr [rax+10h]{k3},ymm2,0A5h
62 F3FD2B 39 50 01 A5, EVEX_Vextracti64x2_xmmm128_k1z_ymm_imm8, EVEX, AVX512VL;AVX512DQ, op0=cw op1=r op2=r r=rax r=ymm2 r=k3 cwm=ds:rax+0x10;Packed128_UInt64
# vextracti64x2 xmm3{k3},ymm2,0A5h
62 F3FD2B 39 D3 A5, EVEX_Vextracti64x2_xmmm128_k1z_ymm_imm8, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r w=vmm3 r=xmm3 r=k3 r=ymm2
# vextracti64x2 xmm3{k3}{z},ymm18,0A5h
62 E3FDAB 39 D3 A5, EVEX_Vextracti64x2_xmmm128_k1z_ymm_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm3 r=k3 r=ymm18
# vextracti64x2 xmm3,zmm2,0A5h
62 F3FD48 39 D3 A5, EVEX_Vextracti64x2_xmmm128_k1z_zmm_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm3 r=zmm2
# vextracti64x2 xmmword ptr [rax+10h],zmm2,0A5h
62 F3FD48 39 50 01 A5, EVEX_Vextracti64x2_xmmm128_k1z_zmm_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r r=rax r=zmm2 wm=ds:rax+0x10;Packed128_UInt64
# vextracti64x2 xmmword ptr [rax+10h]{k3},zmm2,0A5h
62 F3FD4B 39 50 01 A5, EVEX_Vextracti64x2_xmmm128_k1z_zmm_imm8, EVEX, AVX512DQ, op0=cw op1=r op2=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x10;Packed128_UInt64
# vextracti64x2 xmm3{k3},zmm2,0A5h
62 F3FD4B 39 D3 A5, EVEX_Vextracti64x2_xmmm128_k1z_zmm_imm8, EVEX, AVX512DQ, op0=rw op1=r op2=r w=vmm3 r=xmm3 r=k3 r=zmm2
# vextracti64x2 xmm3{k3}{z},zmm18,0A5h
62 E3FDCB 39 D3 A5, EVEX_Vextracti64x2_xmmm128_k1z_zmm_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm3 r=k3 r=zmm18
# vinserti32x8 zmm2,zmm6,ymmword ptr [rax+20h],0A5h
62 F34D48 3A 50 01 A5, EVEX_Vinserti32x8_zmm_k1z_zmm_ymmm256_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vinserti32x8 zmm2{k3},zmm6,ymm3,0A5h
62 F34D4B 3A D3 A5, EVEX_Vinserti32x8_zmm_k1z_zmm_ymmm256_imm8, EVEX, AVX512DQ, op0=rcw op1=r op2=r op3=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=ymm3
# vinserti32x8 zmm18{k3}{z},zmm14,ymm3,0A5h
62 E30DCB 3A D3 A5, EVEX_Vinserti32x8_zmm_k1z_zmm_ymmm256_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm18 r=k3 r=zmm14 r=ymm3
# vinserti64x4 zmm2,zmm6,ymmword ptr [rax+20h],0A5h
62 F3CD48 3A 50 01 A5, EVEX_Vinserti64x4_zmm_k1z_zmm_ymmm256_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vinserti64x4 zmm2{k3},zmm6,ymm3,0A5h
62 F3CD4B 3A D3 A5, EVEX_Vinserti64x4_zmm_k1z_zmm_ymmm256_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r op3=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=ymm3
# vinserti64x4 zmm18{k3}{z},zmm14,ymm3,0A5h
62 E38DCB 3A D3 A5, EVEX_Vinserti64x4_zmm_k1z_zmm_ymmm256_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm18 r=k3 r=zmm14 r=ymm3
# vextracti32x8 ymm3,zmm2,0A5h
62 F37D48 3B D3 A5, EVEX_Vextracti32x8_ymmm256_k1z_zmm_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm3 r=zmm2
# vextracti32x8 ymmword ptr [rax+20h],zmm2,0A5h
62 F37D48 3B 50 01 A5, EVEX_Vextracti32x8_ymmm256_k1z_zmm_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r r=rax r=zmm2 wm=ds:rax+0x20;Packed256_UInt32
# vextracti32x8 ymmword ptr [rax+20h]{k3},zmm2,0A5h
62 F37D4B 3B 50 01 A5, EVEX_Vextracti32x8_ymmm256_k1z_zmm_imm8, EVEX, AVX512DQ, op0=cw op1=r op2=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x20;Packed256_UInt32
# vextracti32x8 ymm3{k3},zmm2,0A5h
62 F37D4B 3B D3 A5, EVEX_Vextracti32x8_ymmm256_k1z_zmm_imm8, EVEX, AVX512DQ, op0=rw op1=r op2=r w=vmm3 r=ymm3 r=k3 r=zmm2
# vextracti32x8 ymm3{k3}{z},zmm18,0A5h
62 E37DCB 3B D3 A5, EVEX_Vextracti32x8_ymmm256_k1z_zmm_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm3 r=k3 r=zmm18
# vextracti64x4 ymm3,zmm2,0A5h
62 F3FD48 3B D3 A5, EVEX_Vextracti64x4_ymmm256_k1z_zmm_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm3 r=zmm2
# vextracti64x4 ymmword ptr [rax+20h],zmm2,0A5h
62 F3FD48 3B 50 01 A5, EVEX_Vextracti64x4_ymmm256_k1z_zmm_imm8, EVEX, AVX512F, op0=w op1=r op2=r r=rax r=zmm2 wm=ds:rax+0x20;Packed256_UInt64
# vextracti64x4 ymmword ptr [rax+20h]{k3},zmm2,0A5h
62 F3FD4B 3B 50 01 A5, EVEX_Vextracti64x4_ymmm256_k1z_zmm_imm8, EVEX, AVX512F, op0=cw op1=r op2=r r=rax r=zmm2 r=k3 cwm=ds:rax+0x20;Packed256_UInt64
# vextracti64x4 ymm3{k3},zmm2,0A5h
62 F3FD4B 3B D3 A5, EVEX_Vextracti64x4_ymmm256_k1z_zmm_imm8, EVEX, AVX512F, op0=rw op1=r op2=r w=vmm3 r=ymm3 r=k3 r=zmm2
# vextracti64x4 ymm3{k3}{z},zmm18,0A5h
62 E3FDCB 3B D3 A5, EVEX_Vextracti64x4_ymmm256_k1z_zmm_imm8, EVEX, AVX512F, op0=w op1=r op2=r w=vmm3 r=k3 r=zmm18
# vpcmpub k2,xmm6,[rax+10h],0A5h
62 F34D08 3E 50 01 A5, EVEX_Vpcmpub_kr_k1_xmm_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r op3=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vpcmpub k2{k3},xmm6,xmm3,0A5h
62 F34D0B 3E D3 A5, EVEX_Vpcmpub_kr_k1_xmm_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r op3=r w=k2 r=k3 r=xmm6 r=xmm3
# vpcmpub k2,ymm6,[rax+20h],0A5h
62 F34D28 3E 50 01 A5, EVEX_Vpcmpub_kr_k1_ymm_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r op3=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vpcmpub k2{k3},ymm6,ymm3,0A5h
62 F34D2B 3E D3 A5, EVEX_Vpcmpub_kr_k1_ymm_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r op3=r w=k2 r=k3 r=ymm6 r=ymm3
# vpcmpub k2,zmm6,[rax+40h],0A5h
62 F34D48 3E 50 01 A5, EVEX_Vpcmpub_kr_k1_zmm_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vpcmpub k2{k3},zmm6,zmm3,0A5h
62 F34D4B 3E D3 A5, EVEX_Vpcmpub_kr_k1_zmm_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=k2 r=k3 r=zmm6 r=zmm3
# vpcmpuw k2,xmm6,[rax+10h],0A5h
62 F3CD08 3E 50 01 A5, EVEX_Vpcmpuw_kr_k1_xmm_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r op3=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpcmpuw k2{k3},xmm6,xmm3,0A5h
62 F3CD0B 3E D3 A5, EVEX_Vpcmpuw_kr_k1_xmm_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r op3=r w=k2 r=k3 r=xmm6 r=xmm3
# vpcmpuw k2,ymm6,[rax+20h],0A5h
62 F3CD28 3E 50 01 A5, EVEX_Vpcmpuw_kr_k1_ymm_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r op3=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpcmpuw k2{k3},ymm6,ymm3,0A5h
62 F3CD2B 3E D3 A5, EVEX_Vpcmpuw_kr_k1_ymm_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r op3=r w=k2 r=k3 r=ymm6 r=ymm3
# vpcmpuw k2,zmm6,[rax+40h],0A5h
62 F3CD48 3E 50 01 A5, EVEX_Vpcmpuw_kr_k1_zmm_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpcmpuw k2{k3},zmm6,zmm3,0A5h
62 F3CD4B 3E D3 A5, EVEX_Vpcmpuw_kr_k1_zmm_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=k2 r=k3 r=zmm6 r=zmm3
# vpcmpb k2,xmm6,[rax+10h],0A5h
62 F34D08 3F 50 01 A5, EVEX_Vpcmpb_kr_k1_xmm_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r op3=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int8
# vpcmpb k2{k3},xmm6,xmm3,0A5h
62 F34D0B 3F D3 A5, EVEX_Vpcmpb_kr_k1_xmm_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r op3=r w=k2 r=k3 r=xmm6 r=xmm3
# vpcmpb k2,ymm6,[rax+20h],0A5h
62 F34D28 3F 50 01 A5, EVEX_Vpcmpb_kr_k1_ymm_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r op3=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int8
# vpcmpb k2{k3},ymm6,ymm3,0A5h
62 F34D2B 3F D3 A5, EVEX_Vpcmpb_kr_k1_ymm_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r op3=r w=k2 r=k3 r=ymm6 r=ymm3
# vpcmpb k2,zmm6,[rax+40h],0A5h
62 F34D48 3F 50 01 A5, EVEX_Vpcmpb_kr_k1_zmm_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int8
# vpcmpb k2{k3},zmm6,zmm3,0A5h
62 F34D4B 3F D3 A5, EVEX_Vpcmpb_kr_k1_zmm_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=k2 r=k3 r=zmm6 r=zmm3
# vpcmpw k2,xmm6,[rax+10h],0A5h
62 F3CD08 3F 50 01 A5, EVEX_Vpcmpw_kr_k1_xmm_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r op3=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int16
# vpcmpw k2{k3},xmm6,xmm3,0A5h
62 F3CD0B 3F D3 A5, EVEX_Vpcmpw_kr_k1_xmm_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r op3=r w=k2 r=k3 r=xmm6 r=xmm3
# vpcmpw k2,ymm6,[rax+20h],0A5h
62 F3CD28 3F 50 01 A5, EVEX_Vpcmpw_kr_k1_ymm_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r op3=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int16
# vpcmpw k2{k3},ymm6,ymm3,0A5h
62 F3CD2B 3F D3 A5, EVEX_Vpcmpw_kr_k1_ymm_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r op3=r w=k2 r=k3 r=ymm6 r=ymm3
# vpcmpw k2,zmm6,[rax+40h],0A5h
62 F3CD48 3F 50 01 A5, EVEX_Vpcmpw_kr_k1_zmm_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int16
# vpcmpw k2{k3},zmm6,zmm3,0A5h
62 F3CD4B 3F D3 A5, EVEX_Vpcmpw_kr_k1_zmm_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=k2 r=k3 r=zmm6 r=zmm3
# dpps xmm1,xmm5,0A5h
66 0F3A40 CD A5, Dpps_xmm_xmmm128_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=xmm5
# dpps xmm1,[rax],0A5h
66 0F3A40 08 A5, Dpps_xmm_xmmm128_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float32
# vdpps xmm2,xmm6,xmm3,0A5h
C4E349 40 D3 A5, VEX_Vdpps_xmm_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vdpps xmm2,xmm6,[rax],0A5h
C4E349 40 10 A5, VEX_Vdpps_xmm_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32
# vdpps ymm2,ymm6,ymm3,5Ah
C4E34D 40 D3 5A, VEX_Vdpps_ymm_ymm_ymmm256_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3
# vdpps ymm2,ymm6,[rax],5Ah
C4E34D 40 10 5A, VEX_Vdpps_ymm_ymm_ymmm256_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32
# dppd xmm1,xmm5,0A5h
66 0F3A41 CD A5, Dppd_xmm_xmmm128_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=xmm5
# dppd xmm1,[rax],0A5h
66 0F3A41 08 A5, Dppd_xmm_xmmm128_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;Packed128_Float64
# vdppd xmm2,xmm6,xmm3,0A5h
C4E349 41 D3 A5, VEX_Vdppd_xmm_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vdppd xmm2,xmm6,[rax],0A5h
C4E349 41 10 A5, VEX_Vdppd_xmm_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64
# mpsadbw xmm1,xmm5,0A5h
66 0F3A42 CD A5, Mpsadbw_xmm_xmmm128_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=xmm5
# mpsadbw xmm1,[rax],0A5h
66 0F3A42 08 A5, Mpsadbw_xmm_xmmm128_imm8, Legacy, SSE4_1, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt8
# vmpsadbw xmm2,xmm6,xmm3,0A5h
C4E349 42 D3 A5, VEX_Vmpsadbw_xmm_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vmpsadbw xmm2,xmm6,[rax],0A5h
C4E349 42 10 A5, VEX_Vmpsadbw_xmm_xmm_xmmm128_imm8, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt8
# vmpsadbw ymm2,ymm6,ymm3,0A5h
C4E34D 42 D3 A5, VEX_Vmpsadbw_ymm_ymm_ymmm256_imm8, VEX, AVX2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3
# vmpsadbw ymm2,ymm6,[rax],0A5h
C4E34D 42 10 A5, VEX_Vmpsadbw_ymm_ymm_ymmm256_imm8, VEX, AVX2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt8
# vdbpsadbw xmm2,xmm6,[rax+10h],0A5h
62 F34D08 42 50 01 A5, EVEX_Vdbpsadbw_xmm_k1z_xmm_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vdbpsadbw xmm2{k3},xmm6,xmm3,0A5h
62 F34D0B 42 D3 A5, EVEX_Vdbpsadbw_xmm_k1z_xmm_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r op3=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vdbpsadbw xmm18{k3}{z},xmm14,xmm3,0A5h
62 E30D8B 42 D3 A5, EVEX_Vdbpsadbw_xmm_k1z_xmm_xmmm128_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r op3=r w=vmm18 r=k3 r=xmm14 r=xmm3
# vdbpsadbw ymm2,ymm6,[rax+20h],0A5h
62 F34D28 42 50 01 A5, EVEX_Vdbpsadbw_ymm_k1z_ymm_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vdbpsadbw ymm2{k3},ymm6,ymm3,0A5h
62 F34D2B 42 D3 A5, EVEX_Vdbpsadbw_ymm_k1z_ymm_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=rw op1=r op2=r op3=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vdbpsadbw ymm18{k3}{z},ymm14,ymm3,0A5h
62 E30DAB 42 D3 A5, EVEX_Vdbpsadbw_ymm_k1z_ymm_ymmm256_imm8, EVEX, AVX512VL;AVX512BW, op0=w op1=r op2=r op3=r w=vmm18 r=k3 r=ymm14 r=ymm3
# vdbpsadbw zmm2,zmm6,[rax+40h],0A5h
62 F34D48 42 50 01 A5, EVEX_Vdbpsadbw_zmm_k1z_zmm_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vdbpsadbw zmm2{k3},zmm6,zmm3,0A5h
62 F34D4B 42 D3 A5, EVEX_Vdbpsadbw_zmm_k1z_zmm_zmmm512_imm8, EVEX, AVX512BW, op0=rcw op1=r op2=r op3=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vdbpsadbw zmm18{k3}{z},zmm14,zmm3,0A5h
62 E30DCB 42 D3 A5, EVEX_Vdbpsadbw_zmm_k1z_zmm_zmmm512_imm8, EVEX, AVX512BW, op0=w op1=r op2=r op3=r w=vmm18 r=k3 r=zmm14 r=zmm3
# vshufi32x4 ymm2,ymm6,[rax+20h],0A5h
62 F34D28 43 50 01 A5, EVEX_Vshufi32x4_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vshufi32x4 ymm2{k3},ymm6,ymm3,0A5h
62 F34D2B 43 D3 A5, EVEX_Vshufi32x4_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vshufi32x4 ymm2{k3}{z},ymm6,ymm3,0A5h
62 F34DAB 43 D3 A5, EVEX_Vshufi32x4_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vshufi32x4 zmm2,zmm6,[rax+40h],0A5h
62 F34D48 43 50 01 A5, EVEX_Vshufi32x4_zmm_k1z_zmm_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vshufi32x4 zmm2{k3},zmm6,zmm3,0A5h
62 F34D4B 43 D3 A5, EVEX_Vshufi32x4_zmm_k1z_zmm_zmmm512b32_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r op3=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vshufi32x4 zmm2{k3}{z},zmm6,zmm3,0A5h
62 F34DCB 43 D3 A5, EVEX_Vshufi32x4_zmm_k1z_zmm_zmmm512b32_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vshufi64x2 ymm2,ymm6,[rax+20h],0A5h
62 F3CD28 43 50 01 A5, EVEX_Vshufi64x2_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vshufi64x2 ymm18{k3},ymm14,ymm3,0A5h
62 E38D2B 43 D3 A5, EVEX_Vshufi64x2_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vshufi64x2 ymm2{k3}{z},ymm6,ymm3,0A5h
62 F3CDAB 43 D3 A5, EVEX_Vshufi64x2_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vshufi64x2 zmm2,zmm6,[rax+40h],0A5h
62 F3CD48 43 50 01 A5, EVEX_Vshufi64x2_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vshufi64x2 zmm18{k3},zmm14,zmm3,0A5h
62 E38D4B 43 D3 A5, EVEX_Vshufi64x2_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512F, op0=rcw op1=r op2=r op3=r cw=vmm18 r=zmm18 r=k3 r=zmm14 r=zmm3
# vshufi64x2 zmm2{k3}{z},zmm6,zmm3,0A5h
62 F3CDCB 43 D3 A5, EVEX_Vshufi64x2_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512F, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=zmm6 r=zmm3
# pclmulqdq xmm1,xmm5,0A5h
66 0F3A44 CD A5, Pclmulqdq_xmm_xmmm128_imm8, Legacy, PCLMULQDQ, op0=rw op1=r op2=r rw=xmm1 r=xmm5
# pclmulqdq xmm1,[rax],0A5h
66 0F3A44 08 A5, Pclmulqdq_xmm_xmmm128_imm8, Legacy, PCLMULQDQ, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt64
# vpclmulqdq xmm2,xmm6,xmm3,0A5h
C4E349 44 D3 A5, VEX_Vpclmulqdq_xmm_xmm_xmmm128_imm8, VEX, PCLMULQDQ;AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vpclmulqdq xmm2,xmm6,[rax],0A5h
C4E349 44 10 A5, VEX_Vpclmulqdq_xmm_xmm_xmmm128_imm8, VEX, PCLMULQDQ;AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt64
# vperm2i128 ymm2,ymm6,ymm3,0A5h
C4E34D 46 D3 A5, VEX_Vperm2i128_ymm_ymm_ymmm256_imm8, VEX, AVX2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3
# vperm2i128 ymm2,ymm6,[rax],0A5h
C4E34D 46 10 A5, VEX_Vperm2i128_ymm_ymm_ymmm256_imm8, VEX, AVX2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt128
# vblendvps xmm2,xmm6,xmm3,xmm4
C4E349 4A D3 40, VEX_Vblendvps_xmm_xmm_xmmm128_xmm, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vblendvps xmm2,xmm6,[rax],xmm4
C4E349 4A 10 40, VEX_Vblendvps_xmm_xmm_xmmm128_xmm, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax r=xmm4 rm=ds:rax;Packed128_Float32
# vblendvps ymm2,ymm6,ymm3,ymm5
C4E34D 4A D3 50, VEX_Vblendvps_ymm_ymm_ymmm256_ymm, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3 r=ymm5
# vblendvps ymm2,ymm6,[rax],ymm5
C4E34D 4A 10 50, VEX_Vblendvps_ymm_ymm_ymmm256_ymm, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax r=ymm5 rm=ds:rax;Packed256_Float32
# vblendvpd xmm2,xmm6,xmm3,xmm4
C4E349 4B D3 40, VEX_Vblendvpd_xmm_xmm_xmmm128_xmm, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vblendvpd xmm2,xmm6,[rax],xmm4
C4E349 4B 10 40, VEX_Vblendvpd_xmm_xmm_xmmm128_xmm, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax r=xmm4 rm=ds:rax;Packed128_Float64
# vblendvpd ymm2,ymm6,ymm3,ymm5
C4E34D 4B D3 50, VEX_Vblendvpd_ymm_ymm_ymmm256_ymm, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3 r=ymm5
# vblendvpd ymm2,ymm6,[rax],ymm5
C4E34D 4B 10 50, VEX_Vblendvpd_ymm_ymm_ymmm256_ymm, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax r=ymm5 rm=ds:rax;Packed256_Float64
# vpblendvb xmm2,xmm6,xmm3,xmm4
C4E349 4C D3 40, VEX_Vpblendvb_xmm_xmm_xmmm128_xmm, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vpblendvb xmm2,xmm6,[rax],xmm4
C4E349 4C 10 40, VEX_Vpblendvb_xmm_xmm_xmmm128_xmm, VEX, AVX, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax r=xmm4 rm=ds:rax;Packed128_UInt8
# vpblendvb ymm2,ymm6,ymm3,ymm5
C4E34D 4C D3 50, VEX_Vpblendvb_ymm_ymm_ymmm256_ymm, VEX, AVX2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3 r=ymm5
# vpblendvb ymm2,ymm6,[rax],ymm5
C4E34D 4C 10 50, VEX_Vpblendvb_ymm_ymm_ymmm256_ymm, VEX, AVX2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax r=ymm5 rm=ds:rax;Packed256_UInt8
# vrangeps xmm2,xmm6,[rax+10h],0A5h
62 F34D08 50 50 01 A5, EVEX_Vrangeps_xmm_k1z_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vrangeps xmm2{k3},xmm6,xmm3,0A5h
62 F34D0B 50 D3 A5, EVEX_Vrangeps_xmm_k1z_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r op3=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vrangeps xmm2{k5}{z},xmm6,dword bcst [rax+4],0A5h
62 F34D9D 50 50 01 A5, EVEX_Vrangeps_xmm_k1z_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=k5 r=xmm6 r=rax rm=ds:rax+4;Broadcast128_Float32
# vrangeps ymm2,ymm6,[rax+20h],0A5h
62 F34D28 50 50 01 A5, EVEX_Vrangeps_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vrangeps ymm2{k3},ymm6,ymm3,0A5h
62 F34D2B 50 D3 A5, EVEX_Vrangeps_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r op3=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vrangeps ymm2{k5}{z},ymm6,dword bcst [rax+4],0A5h
62 F34DBD 50 50 01 A5, EVEX_Vrangeps_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=k5 r=ymm6 r=rax rm=ds:rax+4;Broadcast256_Float32
# vrangeps zmm2,zmm6,[rax+40h],0A5h
62 F34D48 50 50 01 A5, EVEX_Vrangeps_zmm_k1z_zmm_zmmm512b32_imm8_sae, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vrangeps zmm2{k3},zmm6,zmm3,0A5h {sae}
62 F34D1B 50 D3 A5, EVEX_Vrangeps_zmm_k1z_zmm_zmmm512b32_imm8_sae, EVEX, AVX512DQ, op0=rcw op1=r op2=r op3=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vrangeps zmm2{k3}{z},zmm6,zmm3,0A5h {sae}
62 F34DDB 50 D3 A5, EVEX_Vrangeps_zmm_k1z_zmm_zmmm512b32_imm8_sae, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vrangepd xmm2,xmm6,[rax+10h],0A5h
62 F3CD08 50 50 01 A5, EVEX_Vrangepd_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vrangepd xmm18{k3},xmm14,xmm3,0A5h
62 E38D0B 50 D3 A5, EVEX_Vrangepd_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r op3=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vrangepd xmm2{k3}{z},xmm6,xmm3,0A5h
62 F3CD8B 50 D3 A5, EVEX_Vrangepd_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vrangepd ymm2,ymm6,[rax+20h],0A5h
62 F3CD28 50 50 01 A5, EVEX_Vrangepd_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vrangepd ymm18{k3},ymm14,ymm3,0A5h
62 E38D2B 50 D3 A5, EVEX_Vrangepd_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r op3=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vrangepd ymm2{k3}{z},ymm6,ymm3,0A5h
62 F3CDAB 50 D3 A5, EVEX_Vrangepd_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=ymm6 r=ymm3
# vrangepd zmm2,zmm6,[rax+40h],0A5h
62 F3CD48 50 50 01 A5, EVEX_Vrangepd_zmm_k1z_zmm_zmmm512b64_imm8_sae, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vrangepd zmm2{k3},zmm6,zmm3,0A5h {sae}
62 F3CD1B 50 D3 A5, EVEX_Vrangepd_zmm_k1z_zmm_zmmm512b64_imm8_sae, EVEX, AVX512DQ, op0=rcw op1=r op2=r op3=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vrangepd zmm2{k3}{z},zmm6,zmm3,0A5h {sae}
62 F3CDDB 50 D3 A5, EVEX_Vrangepd_zmm_k1z_zmm_zmmm512b64_imm8_sae, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=zmm6 r=zmm3
# vrangess xmm2,xmm6,[rax+4],0A5h
62 F34D08 51 50 01 A5, EVEX_Vrangess_xmm_k1z_xmm_xmmm32_imm8_sae, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vrangess xmm2{k3},xmm6,xmm3,0A5h
62 F34D0B 51 D3 A5, EVEX_Vrangess_xmm_k1z_xmm_xmmm32_imm8_sae, EVEX, AVX512DQ, op0=rw op1=r op2=r op3=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vrangess xmm2{k3}{z},xmm6,xmm3,0A5h {sae}
62 F34DDB 51 D3 A5, EVEX_Vrangess_xmm_k1z_xmm_xmmm32_imm8_sae, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vrangesd xmm2,xmm6,[rax+8],0A5h
62 F3CD08 51 50 01 A5, EVEX_Vrangesd_xmm_k1z_xmm_xmmm64_imm8_sae, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vrangesd xmm18{k3},xmm14,xmm3,0A5h
62 E38D0B 51 D3 A5, EVEX_Vrangesd_xmm_k1z_xmm_xmmm64_imm8_sae, EVEX, AVX512DQ, op0=rw op1=r op2=r op3=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vrangesd xmm2{k3}{z},xmm6,xmm3,0A5h
62 F3CD8B 51 D3 A5, EVEX_Vrangesd_xmm_k1z_xmm_xmmm64_imm8_sae, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vfixupimmps xmm2,xmm6,[rax+10h],0A5h
62 F34D08 54 50 01 A5, EVEX_Vfixupimmps_xmm_k1z_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vfixupimmps xmm2{k3},xmm6,xmm3,0A5h
62 F34D0B 54 D3 A5, EVEX_Vfixupimmps_xmm_k1z_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfixupimmps xmm2{k5}{z},xmm6,dword bcst [rax+4],0A5h
62 F34D9D 54 50 01 A5, EVEX_Vfixupimmps_xmm_k1z_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=xmm2 r=k5 r=xmm6 r=rax rm=ds:rax+4;Broadcast128_Float32
# vfixupimmps ymm2,ymm6,[rax+20h],0A5h
62 F34D28 54 50 01 A5, EVEX_Vfixupimmps_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vfixupimmps ymm2{k3},ymm6,ymm3,0A5h
62 F34D2B 54 D3 A5, EVEX_Vfixupimmps_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfixupimmps ymm2{k5}{z},ymm6,dword bcst [rax+4],0A5h
62 F34DBD 54 50 01 A5, EVEX_Vfixupimmps_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=ymm2 r=k5 r=ymm6 r=rax rm=ds:rax+4;Broadcast256_Float32
# vfixupimmps zmm2,zmm6,[rax+40h],0A5h
62 F34D48 54 50 01 A5, EVEX_Vfixupimmps_zmm_k1z_zmm_zmmm512b32_imm8_sae, EVEX, AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vfixupimmps zmm2{k3},zmm6,zmm3,0A5h {sae}
62 F34D1B 54 D3 A5, EVEX_Vfixupimmps_zmm_k1z_zmm_zmmm512b32_imm8_sae, EVEX, AVX512F, op0=rcw op1=r op2=r op3=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfixupimmps zmm2{k3}{z},zmm6,zmm3,0A5h {sae}
62 F34DDB 54 D3 A5, EVEX_Vfixupimmps_zmm_k1z_zmm_zmmm512b32_imm8_sae, EVEX, AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfixupimmpd xmm2,xmm6,[rax+10h],0A5h
62 F3CD08 54 50 01 A5, EVEX_Vfixupimmpd_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float64
# vfixupimmpd xmm18{k3},xmm14,xmm3,0A5h
62 E38D0B 54 D3 A5, EVEX_Vfixupimmpd_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfixupimmpd xmm2{k3}{z},xmm6,xmm3,0A5h
62 F3CD8B 54 D3 A5, EVEX_Vfixupimmpd_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfixupimmpd ymm2,ymm6,[rax+20h],0A5h
62 F3CD28 54 50 01 A5, EVEX_Vfixupimmpd_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=ymm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float64
# vfixupimmpd ymm18{k3},ymm14,ymm3,0A5h
62 E38D2B 54 D3 A5, EVEX_Vfixupimmpd_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm18 r=ymm18 r=k3 r=ymm14 r=ymm3
# vfixupimmpd ymm2{k3}{z},ymm6,ymm3,0A5h
62 F3CDAB 54 D3 A5, EVEX_Vfixupimmpd_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=ymm2 r=k3 r=ymm6 r=ymm3
# vfixupimmpd zmm2,zmm6,[rax+40h],0A5h
62 F3CD48 54 50 01 A5, EVEX_Vfixupimmpd_zmm_k1z_zmm_zmmm512b64_imm8_sae, EVEX, AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=zmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float64
# vfixupimmpd zmm2{k3},zmm6,zmm3,0A5h {sae}
62 F3CD1B 54 D3 A5, EVEX_Vfixupimmpd_zmm_k1z_zmm_zmmm512b64_imm8_sae, EVEX, AVX512F, op0=rcw op1=r op2=r op3=r cw=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfixupimmpd zmm2{k3}{z},zmm6,zmm3,0A5h {sae}
62 F3CDDB 54 D3 A5, EVEX_Vfixupimmpd_zmm_k1z_zmm_zmmm512b64_imm8_sae, EVEX, AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=zmm2 r=k3 r=zmm6 r=zmm3
# vfixupimmss xmm2,xmm6,[rax+4],0A5h
62 F34D08 55 50 01 A5, EVEX_Vfixupimmss_xmm_k1z_xmm_xmmm32_imm8_sae, EVEX, AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vfixupimmss xmm2{k3},xmm6,xmm3,0A5h
62 F34D0B 55 D3 A5, EVEX_Vfixupimmss_xmm_k1z_xmm_xmmm32_imm8_sae, EVEX, AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfixupimmss xmm2{k3}{z},xmm6,xmm3,0A5h {sae}
62 F34DDB 55 D3 A5, EVEX_Vfixupimmss_xmm_k1z_xmm_xmmm32_imm8_sae, EVEX, AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vfixupimmsd xmm2,xmm6,[rax+8],0A5h
62 F3CD08 55 50 01 A5, EVEX_Vfixupimmsd_xmm_k1z_xmm_xmmm64_imm8_sae, EVEX, AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=xmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vfixupimmsd xmm18{k3},xmm14,xmm3,0A5h
62 E38D0B 55 D3 A5, EVEX_Vfixupimmsd_xmm_k1z_xmm_xmmm64_imm8_sae, EVEX, AVX512F, op0=rw op1=r op2=r op3=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vfixupimmsd xmm2{k3}{z},xmm6,xmm3,0A5h
62 F3CD8B 55 D3 A5, EVEX_Vfixupimmsd_xmm_k1z_xmm_xmmm64_imm8_sae, EVEX, AVX512F, op0=rw op1=r op2=r op3=r w=vmm2 r=xmm2 r=k3 r=xmm6 r=xmm3
# vreduceps xmm2,[rax+10h],0A5h
62 F37D08 56 50 01 A5, EVEX_Vreduceps_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float32
# vreduceps xmm2{k3},xmm3,0A5h
62 F37D0B 56 D3 A5, EVEX_Vreduceps_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vreduceps xmm2{k3}{z},xmm3,0A5h
62 F37D8B 56 D3 A5, EVEX_Vreduceps_xmm_k1z_xmmm128b32_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm3
# vreduceps ymm2,[rax+20h],0A5h
62 F37D28 56 50 01 A5, EVEX_Vreduceps_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float32
# vreduceps ymm2{k3},ymm3,0A5h
62 F37D2B 56 D3 A5, EVEX_Vreduceps_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vreduceps ymm2{k3}{z},ymm3,0A5h
62 F37DAB 56 D3 A5, EVEX_Vreduceps_ymm_k1z_ymmm256b32_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm3
# vreduceps zmm2,[rax+40h],0A5h
62 F37D48 56 50 01 A5, EVEX_Vreduceps_zmm_k1z_zmmm512b32_imm8_sae, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float32
# vreduceps zmm2{k3},zmm3,0A5h
62 F37D4B 56 D3 A5, EVEX_Vreduceps_zmm_k1z_zmmm512b32_imm8_sae, EVEX, AVX512DQ, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vreduceps zmm2{k3}{z},zmm3,0A5h {sae}
62 F37D9B 56 D3 A5, EVEX_Vreduceps_zmm_k1z_zmmm512b32_imm8_sae, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm3
# vreducepd xmm2,[rax+10h],0A5h
62 F3FD08 56 50 01 A5, EVEX_Vreducepd_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float64
# vreducepd xmm2{k3},xmm3,0A5h
62 F3FD0B 56 D3 A5, EVEX_Vreducepd_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r w=vmm2 r=xmm2 r=k3 r=xmm3
# vreducepd xmm2{k3}{z},xmm3,0A5h
62 F3FD8B 56 D3 A5, EVEX_Vreducepd_xmm_k1z_xmmm128b64_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=xmm3
# vreducepd ymm2,[rax+20h],0A5h
62 F3FD28 56 50 01 A5, EVEX_Vreducepd_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float64
# vreducepd ymm2{k3},ymm3,0A5h
62 F3FD2B 56 D3 A5, EVEX_Vreducepd_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512DQ, op0=rw op1=r op2=r w=vmm2 r=ymm2 r=k3 r=ymm3
# vreducepd ymm2{k3}{z},ymm3,0A5h
62 F3FDAB 56 D3 A5, EVEX_Vreducepd_ymm_k1z_ymmm256b64_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=ymm3
# vreducepd zmm2,[rax+40h],0A5h
62 F3FD48 56 50 01 A5, EVEX_Vreducepd_zmm_k1z_zmmm512b64_imm8_sae, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float64
# vreducepd zmm2{k3},zmm3,0A5h
62 F3FD4B 56 D3 A5, EVEX_Vreducepd_zmm_k1z_zmmm512b64_imm8_sae, EVEX, AVX512DQ, op0=rcw op1=r op2=r cw=vmm2 r=zmm2 r=k3 r=zmm3
# vreducepd zmm2{k3}{z},zmm3,0A5h {sae}
62 F3FD9B 56 D3 A5, EVEX_Vreducepd_zmm_k1z_zmmm512b64_imm8_sae, EVEX, AVX512DQ, op0=w op1=r op2=r w=vmm2 r=k3 r=zmm3
# vreducess xmm2,xmm6,xmm3,0A5h
62 F34D08 57 D3 A5, EVEX_Vreducess_xmm_k1z_xmm_xmmm32_imm8_sae, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vreducess xmm2,xmm6,[rax+4],0A5h
62 F34D08 57 50 01 A5, EVEX_Vreducess_xmm_k1z_xmm_xmmm32_imm8_sae, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+4;Float32
# vreducess xmm18{k3},xmm14,xmm3,0A5h {sae}
62 E30D1B 57 D3 A5, EVEX_Vreducess_xmm_k1z_xmm_xmmm32_imm8_sae, EVEX, AVX512DQ, op0=rw op1=r op2=r op3=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vreducess xmm2{k3}{z},xmm6,xmm3,0A5h
62 F34D8B 57 D3 A5, EVEX_Vreducess_xmm_k1z_xmm_xmmm32_imm8_sae, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=xmm6 r=xmm3
# vreducesd xmm2,xmm6,xmm3,0A5h
62 F3CD08 57 D3 A5, EVEX_Vreducesd_xmm_k1z_xmm_xmmm64_imm8_sae, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vreducesd xmm2,xmm6,[rax+8],0A5h
62 F3CD08 57 50 01 A5, EVEX_Vreducesd_xmm_k1z_xmm_xmmm64_imm8_sae, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+8;Float64
# vreducesd xmm18{k3},xmm14,xmm3,0A5h {sae}
62 E38D1B 57 D3 A5, EVEX_Vreducesd_xmm_k1z_xmm_xmmm64_imm8_sae, EVEX, AVX512DQ, op0=rw op1=r op2=r op3=r w=vmm18 r=xmm18 r=k3 r=xmm14 r=xmm3
# vreducesd xmm2{k3}{z},xmm6,xmm3,0A5h
62 F3CD8B 57 D3 A5, EVEX_Vreducesd_xmm_k1z_xmm_xmmm64_imm8_sae, EVEX, AVX512DQ, op0=w op1=r op2=r op3=r w=vmm2 r=k3 r=xmm6 r=xmm3
# pcmpestrm xmm1,xmm5,0A5h
66 0F3A60 CD A5, Pcmpestrm_xmm_xmmm128_imm8, Legacy, SSE4_2, fw=cosz fc=ap op0=r op1=r op2=r r=xmm1 r=xmm5 r=eax;edx w=xmm0
# pcmpestrm xmm1,[rax],0A5h
66 0F3A60 08 A5, Pcmpestrm_xmm_xmmm128_imm8, Legacy, SSE4_2, fw=cosz fc=ap op0=r op1=r op2=r r=xmm1 r=rax rm=ds:rax;Packed128_UInt8 r=eax;edx w=xmm0
# pcmpestrm64 xmm1,xmm5,0A5h
66 48 0F3A60 CD A5, Pcmpestrm64_xmm_xmmm128_imm8, Legacy, SSE4_2, fw=cosz fc=ap op0=r op1=r op2=r r=xmm1 r=xmm5 r=rax;rdx w=xmm0
# pcmpestrm64 xmm1,[rax],0A5h
66 48 0F3A60 08 A5, Pcmpestrm64_xmm_xmmm128_imm8, Legacy, SSE4_2, fw=cosz fc=ap op0=r op1=r op2=r r=xmm1 r=rax rm=ds:rax;Packed128_UInt8 r=rax;rdx w=xmm0
# vpcmpestrm xmm2,xmm3,0A5h
C4E379 60 D3 A5, VEX_Vpcmpestrm_xmm_xmmm128_imm8, VEX, AVX, fw=cosz fc=ap op0=r op1=r op2=r r=xmm2 r=xmm3 r=eax;edx w=vmm0
# vpcmpestrm xmm2,[rax],0A5h
C4E379 60 10 A5, VEX_Vpcmpestrm_xmm_xmmm128_imm8, VEX, AVX, fw=cosz fc=ap op0=r op1=r op2=r r=xmm2 r=rax rm=ds:rax;Packed128_UInt8 r=eax;edx w=vmm0
# vpcmpestrm64 xmm2,xmm3,0A5h
C4E3F9 60 D3 A5, VEX_Vpcmpestrm64_xmm_xmmm128_imm8, VEX, AVX, fw=cosz fc=ap op0=r op1=r op2=r r=xmm2 r=xmm3 r=rax;rdx w=vmm0
# vpcmpestrm64 xmm2,[rax],0A5h
C4E3F9 60 10 A5, VEX_Vpcmpestrm64_xmm_xmmm128_imm8, VEX, AVX, fw=cosz fc=ap op0=r op1=r op2=r r=xmm2 r=rax rm=ds:rax;Packed128_UInt8 r=rax;rdx w=vmm0
# pcmpestri xmm1,xmm5,0A5h
66 0F3A61 CD A5, Pcmpestri_xmm_xmmm128_imm8, Legacy, SSE4_2, fw=cosz fc=ap op0=r op1=r op2=r r=xmm1 r=xmm5 r=eax;edx w=rcx
# pcmpestri xmm1,[rax],0A5h
66 0F3A61 08 A5, Pcmpestri_xmm_xmmm128_imm8, Legacy, SSE4_2, fw=cosz fc=ap op0=r op1=r op2=r r=xmm1 r=rax rm=ds:rax;Packed128_UInt8 r=eax;edx w=rcx
# pcmpestri64 xmm1,xmm5,0A5h
66 48 0F3A61 CD A5, Pcmpestri64_xmm_xmmm128_imm8, Legacy, SSE4_2, fw=cosz fc=ap op0=r op1=r op2=r r=xmm1 r=xmm5 r=rax;rdx w=rcx
# pcmpestri64 xmm1,[rax],0A5h
66 48 0F3A61 08 A5, Pcmpestri64_xmm_xmmm128_imm8, Legacy, SSE4_2, fw=cosz fc=ap op0=r op1=r op2=r r=xmm1 r=rax rm=ds:rax;Packed128_UInt8 r=rax;rdx w=rcx
# vpcmpestri xmm2,xmm3,0A5h
C4E379 61 D3 A5, VEX_Vpcmpestri_xmm_xmmm128_imm8, VEX, AVX, fw=cosz fc=ap op0=r op1=r op2=r r=xmm2 r=xmm3 r=eax;edx w=rcx
# vpcmpestri xmm2,[rax],0A5h
C4E379 61 10 A5, VEX_Vpcmpestri_xmm_xmmm128_imm8, VEX, AVX, fw=cosz fc=ap op0=r op1=r op2=r r=xmm2 r=rax rm=ds:rax;Packed128_UInt8 r=eax;edx w=rcx
# vpcmpestri64 xmm2,xmm3,0A5h
C4E3F9 61 D3 A5, VEX_Vpcmpestri64_xmm_xmmm128_imm8, VEX, AVX, fw=cosz fc=ap op0=r op1=r op2=r r=xmm2 r=xmm3 r=rax;rdx w=rcx
# vpcmpestri64 xmm2,[rax],0A5h
C4E3F9 61 10 A5, VEX_Vpcmpestri64_xmm_xmmm128_imm8, VEX, AVX, fw=cosz fc=ap op0=r op1=r op2=r r=xmm2 r=rax rm=ds:rax;Packed128_UInt8 r=rax;rdx w=rcx
# pcmpistrm xmm1,xmm5,0A5h
66 0F3A62 CD A5, Pcmpistrm_xmm_xmmm128_imm8, Legacy, SSE4_2, fw=cosz fc=ap op0=r op1=r op2=r r=xmm1 r=xmm5 w=xmm0
# pcmpistrm xmm1,[rax],0A5h
66 0F3A62 08 A5, Pcmpistrm_xmm_xmmm128_imm8, Legacy, SSE4_2, fw=cosz fc=ap op0=r op1=r op2=r r=xmm1 r=rax rm=ds:rax;Packed128_UInt8 w=xmm0
# vpcmpistrm xmm2,xmm3,0A5h
C4E379 62 D3 A5, VEX_Vpcmpistrm_xmm_xmmm128_imm8, VEX, AVX, fw=cosz fc=ap op0=r op1=r op2=r r=xmm2 r=xmm3 w=vmm0
# vpcmpistrm xmm2,[rax],0A5h
C4E379 62 10 A5, VEX_Vpcmpistrm_xmm_xmmm128_imm8, VEX, AVX, fw=cosz fc=ap op0=r op1=r op2=r r=xmm2 r=rax rm=ds:rax;Packed128_UInt8 w=vmm0
# pcmpistri xmm1,xmm5,0A5h
66 0F3A63 CD A5, Pcmpistri_xmm_xmmm128_imm8, Legacy, SSE4_2, fw=cosz fc=ap op0=r op1=r op2=r r=xmm1 r=xmm5 w=rcx
# pcmpistri xmm1,[rax],0A5h
66 0F3A63 08 A5, Pcmpistri_xmm_xmmm128_imm8, Legacy, SSE4_2, fw=cosz fc=ap op0=r op1=r op2=r r=xmm1 r=rax rm=ds:rax;Packed128_UInt8 w=rcx
# vpcmpistri xmm2,xmm3,0A5h
C4E379 63 D3 A5, VEX_Vpcmpistri_xmm_xmmm128_imm8, VEX, AVX, fw=cosz fc=ap op0=r op1=r op2=r r=xmm2 r=xmm3 w=rcx
# vpcmpistri xmm2,[rax],0A5h
C4E379 63 10 A5, VEX_Vpcmpistri_xmm_xmmm128_imm8, VEX, AVX, fw=cosz fc=ap op0=r op1=r op2=r r=xmm2 r=rax rm=ds:rax;Packed128_UInt8 w=rcx
# vfpclassps k2,xmmword ptr [rax+10h],0A5h
62 F37D08 66 50 01 A5, EVEX_Vfpclassps_kr_k1_xmmm128b32_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=k2 r=rax rm=ds:rax+0x10;Packed128_Float32
# vfpclassps k2{k3},xmm3,0A5h
62 F37D0B 66 D3 A5, EVEX_Vfpclassps_kr_k1_xmmm128b32_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=k2 r=k3 r=xmm3
# vfpclassps k2,ymmword ptr [rax+20h],0A5h
62 F37D28 66 50 01 A5, EVEX_Vfpclassps_kr_k1_ymmm256b32_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=k2 r=rax rm=ds:rax+0x20;Packed256_Float32
# vfpclassps k2{k3},ymm3,0A5h
62 F37D2B 66 D3 A5, EVEX_Vfpclassps_kr_k1_ymmm256b32_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=k2 r=k3 r=ymm3
# vfpclassps k2,zmmword ptr [rax+40h],0A5h
62 F37D48 66 50 01 A5, EVEX_Vfpclassps_kr_k1_zmmm512b32_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r w=k2 r=rax rm=ds:rax+0x40;Packed512_Float32
# vfpclassps k2{k3},zmm3,0A5h
62 F37D4B 66 D3 A5, EVEX_Vfpclassps_kr_k1_zmmm512b32_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r w=k2 r=k3 r=zmm3
# vfpclasspd k2,xmmword ptr [rax+10h],0A5h
62 F3FD08 66 50 01 A5, EVEX_Vfpclasspd_kr_k1_xmmm128b64_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=k2 r=rax rm=ds:rax+0x10;Packed128_Float64
# vfpclasspd k2{k3},xmm3,0A5h
62 F3FD0B 66 D3 A5, EVEX_Vfpclasspd_kr_k1_xmmm128b64_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=k2 r=k3 r=xmm3
# vfpclasspd k2,ymmword ptr [rax+20h],0A5h
62 F3FD28 66 50 01 A5, EVEX_Vfpclasspd_kr_k1_ymmm256b64_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=k2 r=rax rm=ds:rax+0x20;Packed256_Float64
# vfpclasspd k2{k3},ymm3,0A5h
62 F3FD2B 66 D3 A5, EVEX_Vfpclasspd_kr_k1_ymmm256b64_imm8, EVEX, AVX512VL;AVX512DQ, op0=w op1=r op2=r w=k2 r=k3 r=ymm3
# vfpclasspd k2,zmmword ptr [rax+40h],0A5h
62 F3FD48 66 50 01 A5, EVEX_Vfpclasspd_kr_k1_zmmm512b64_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r w=k2 r=rax rm=ds:rax+0x40;Packed512_Float64
# vfpclasspd k2{k3},zmm3,0A5h
62 F3FD4B 66 D3 A5, EVEX_Vfpclasspd_kr_k1_zmmm512b64_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r w=k2 r=k3 r=zmm3
# vfpclassss k2,dword ptr [rax+4],0A5h
62 F37D08 67 50 01 A5, EVEX_Vfpclassss_kr_k1_xmmm32_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r w=k2 r=rax rm=ds:rax+4;Float32
# vfpclassss k2{k3},xmm3,0A5h
62 F37D0B 67 D3 A5, EVEX_Vfpclassss_kr_k1_xmmm32_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r w=k2 r=k3 r=xmm3
# vfpclasssd k2,qword ptr [rax+8],0A5h
62 F3FD08 67 50 01 A5, EVEX_Vfpclasssd_kr_k1_xmmm64_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r w=k2 r=rax rm=ds:rax+8;Float64
# vfpclasssd k2{k3},xmm3,0A5h
62 F3FD0B 67 D3 A5, EVEX_Vfpclasssd_kr_k1_xmmm64_imm8, EVEX, AVX512DQ, op0=w op1=r op2=r w=k2 r=k3 r=xmm3
# sha1rnds4 xmm1,xmm5,0A5h
0F3ACC CD A5, Sha1rnds4_xmm_xmmm128_imm8, Legacy, SHA, op0=rw op1=r op2=r rw=xmm1 r=xmm5
# sha1rnds4 xmm1,[rax],0A5h
0F3ACC 08 A5, Sha1rnds4_xmm_xmmm128_imm8, Legacy, SHA, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt32
# aeskeygenassist xmm1,xmm5,0A5h
66 0F3ADF CD A5, Aeskeygenassist_xmm_xmmm128_imm8, Legacy, AES, op0=w op1=r op2=r w=xmm1 r=xmm5
# aeskeygenassist xmm1,[rax],5Ah
66 0F3ADF 08 5A, Aeskeygenassist_xmm_xmmm128_imm8, Legacy, AES, op0=w op1=r op2=r w=xmm1 r=rax rm=ds:rax;UInt128
# vaeskeygenassist xmm2,xmm3,0A5h
C4E379 DF D3 A5, VEX_Vaeskeygenassist_xmm_xmmm128_imm8, VEX, AES;AVX, op0=w op1=r op2=r w=vmm2 r=xmm3
# vaeskeygenassist xmm2,[rax],5Ah
C4E379 DF 10 5A, VEX_Vaeskeygenassist_xmm_xmmm128_imm8, VEX, AES;AVX, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;UInt128
# rorx edx,ebx,0A5h
C4E37B F0 D3 A5, VEX_Rorx_r32_rm32_imm8, VEX, BMI2, op0=w op1=r op2=r w=rdx r=ebx
# rorx edx,[rax],5Ah
C4E37B F0 10 5A, VEX_Rorx_r32_rm32_imm8, VEX, BMI2, op0=w op1=r op2=r w=rdx r=rax rm=ds:rax;UInt32
# rorx rdx,rbx,0A5h
C4E3FB F0 D3 A5, VEX_Rorx_r64_rm64_imm8, VEX, BMI2, op0=w op1=r op2=r w=rdx r=rbx
# rorx rdx,[rax],0A5h
C4E3FB F0 10 A5, VEX_Rorx_r64_rm64_imm8, VEX, BMI2, op0=w op1=r op2=r w=rdx r=rax rm=ds:rax;UInt64
# add [0A55A122Bh],esi
67 01 35 34125AA5, Add_rm32_r32, Legacy, INTEL386, fw=oszacp op0=rw op1=r r=esi rwm=ds:0xA55A122B|32;UInt32
# add [7FFFFFFFA55A122Ah],esi
01 35 34125AA5, Add_rm32_r32, Legacy, INTEL386, fw=oszacp op0=rw op1=r r=esi rwm=ds:0x7FFFFFFFA55A122A|64;UInt32
# ins byte ptr [edi],dx
67 6C, Insb_m8_DX, Legacy, INTEL186, priv fr=d op0=w op1=r r=edi w=rdi r=dx wm=es:edi;UInt8
# ins word ptr [edi],dx
66 67 6D, Insw_m16_DX, Legacy, INTEL186, priv fr=d op0=w op1=r r=edi w=rdi r=dx wm=es:edi;UInt16
# ins dword ptr [edi],dx
67 6D, Insd_m32_DX, Legacy, INTEL386, priv fr=d op0=w op1=r r=edi w=rdi r=dx wm=es:edi;UInt32
# outs dx,byte ptr [esi]
67 6E, Outsb_DX_m8, Legacy, INTEL186, priv fr=d op0=r op1=r r=dx r=esi w=rsi rm=ds:esi;UInt8
# outs dx,word ptr [esi]
66 67 6F, Outsw_DX_m16, Legacy, INTEL186, priv fr=d op0=r op1=r r=dx r=esi w=rsi rm=ds:esi;UInt16
# outs dx,dword ptr [esi]
67 6F, Outsd_DX_m32, Legacy, INTEL386, priv fr=d op0=r op1=r r=dx r=esi w=rsi rm=ds:esi;UInt32
# movs byte ptr [edi],byte ptr [esi]
67 A4, Movsb_m8_m8, Legacy, INTEL8086, fr=d op0=w op1=r r=edi w=rdi r=esi w=rsi wm=es:edi;UInt8 rm=ds:esi;UInt8
# movs word ptr [edi],word ptr [esi]
66 67 A5, Movsw_m16_m16, Legacy, INTEL8086, fr=d op0=w op1=r r=edi w=rdi r=esi w=rsi wm=es:edi;UInt16 rm=ds:esi;UInt16
# movs dword ptr [edi],dword ptr [esi]
67 A5, Movsd_m32_m32, Legacy, INTEL386, fr=d op0=w op1=r r=edi w=rdi r=esi w=rsi wm=es:edi;UInt32 rm=ds:esi;UInt32
# movs qword ptr [edi],qword ptr [esi]
67 48 A5, Movsq_m64_m64, Legacy, X64, fr=d op0=w op1=r r=edi w=rdi r=esi w=rsi wm=es:edi;UInt64 rm=ds:esi;UInt64
# cmps byte ptr [esi],byte ptr [edi]
67 A6, Cmpsb_m8_m8, Legacy, INTEL8086, fr=d fw=oszacp op0=r op1=r r=esi w=rsi r=edi w=rdi rm=ds:esi;UInt8 rm=es:edi;UInt8
# cmps word ptr [esi],word ptr [edi]
66 67 A7, Cmpsw_m16_m16, Legacy, INTEL8086, fr=d fw=oszacp op0=r op1=r r=esi w=rsi r=edi w=rdi rm=ds:esi;UInt16 rm=es:edi;UInt16
# cmps dword ptr [esi],dword ptr [edi]
67 A7, Cmpsd_m32_m32, Legacy, INTEL386, fr=d fw=oszacp op0=r op1=r r=esi w=rsi r=edi w=rdi rm=ds:esi;UInt32 rm=es:edi;UInt32
# cmps qword ptr [esi],qword ptr [edi]
67 48 A7, Cmpsq_m64_m64, Legacy, X64, fr=d fw=oszacp op0=r op1=r r=esi w=rsi r=edi w=rdi rm=ds:esi;UInt64 rm=es:edi;UInt64
# stos byte ptr [edi]
67 AA, Stosb_m8_AL, Legacy, INTEL8086, fr=d op0=w op1=r r=edi w=rdi r=al wm=es:edi;UInt8
# stos word ptr [edi]
66 67 AB, Stosw_m16_AX, Legacy, INTEL8086, fr=d op0=w op1=r r=edi w=rdi r=ax wm=es:edi;UInt16
# stos dword ptr [edi]
67 AB, Stosd_m32_EAX, Legacy, INTEL386, fr=d op0=w op1=r r=edi w=rdi r=eax wm=es:edi;UInt32
# stos qword ptr [edi]
67 48 AB, Stosq_m64_RAX, Legacy, X64, fr=d op0=w op1=r r=edi w=rdi r=rax wm=es:edi;UInt64
# lods byte ptr [esi]
67 AC, Lodsb_AL_m8, Legacy, INTEL8086, fr=d op0=w op1=r w=al r=esi w=rsi rm=ds:esi;UInt8
# lods word ptr [esi]
66 67 AD, Lodsw_AX_m16, Legacy, INTEL8086, fr=d op0=w op1=r w=ax r=esi w=rsi rm=ds:esi;UInt16
# lods dword ptr [esi]
67 AD, Lodsd_EAX_m32, Legacy, INTEL386, fr=d op0=w op1=r w=rax r=esi w=rsi rm=ds:esi;UInt32
# lods qword ptr [esi]
67 48 AD, Lodsq_RAX_m64, Legacy, X64, fr=d op0=w op1=r w=rax r=esi w=rsi rm=ds:esi;UInt64
# scas byte ptr [edi]
67 AE, Scasb_AL_m8, Legacy, INTEL8086, fr=d fw=oszacp op0=r op1=r r=al r=edi w=rdi rm=es:edi;UInt8
# scas word ptr [edi]
66 67 AF, Scasw_AX_m16, Legacy, INTEL8086, fr=d fw=oszacp op0=r op1=r r=ax r=edi w=rdi rm=es:edi;UInt16
# scas dword ptr [edi]
67 AF, Scasd_EAX_m32, Legacy, INTEL386, fr=d fw=oszacp op0=r op1=r r=eax r=edi w=rdi rm=es:edi;UInt32
# scas qword ptr [edi]
67 48 AF, Scasq_RAX_m64, Legacy, X64, fr=d fw=oszacp op0=r op1=r r=rax r=edi w=rdi rm=es:edi;UInt64
# add [r8-5AA5EDCCh],esi
41 01 B0 34125AA5, Add_rm32_r32, Legacy, INTEL386, fw=oszacp op0=rw op1=r r=r8 r=esi rwm=ds:r8+0xFFFFFFFFA55A1234;UInt32
# add [r12+rdi+5Ah],esi
41 01 74 3C 5A, Add_rm32_r32, Legacy, INTEL386, fw=oszacp op0=rw op1=r r=r12 r=rdi r=esi rwm=ds:r12+rdi+0x5A;UInt32
# add [r12+rdi*2+5Ah],esi
41 01 74 7C 5A, Add_rm32_r32, Legacy, INTEL386, fw=oszacp op0=rw op1=r r=r12 r=rdi r=esi rwm=ds:r12+rdi*2+0x5A;UInt32
# add [r12+rdi*4+5Ah],esi
41 01 74 BC 5A, Add_rm32_r32, Legacy, INTEL386, fw=oszacp op0=rw op1=r r=r12 r=rdi r=esi rwm=ds:r12+rdi*4+0x5A;UInt32
# add [r12+rdi*8+5Ah],esi
41 01 74 FC 5A, Add_rm32_r32, Legacy, INTEL386, fw=oszacp op0=rw op1=r r=r12 r=rdi r=esi rwm=ds:r12+rdi*8+0x5A;UInt32
# repne insb
F2 6C, Insb_m8_DX, Legacy, INTEL186, priv fr=d op0=cw op1=cr rcw=rcx cr=rdi cw=rdi cr=dx cwm=es:rdi;Unknown
# repne insw
F2 66 6D, Insw_m16_DX, Legacy, INTEL186, priv fr=d op0=cw op1=cr rcw=rcx cr=rdi cw=rdi cr=dx cwm=es:rdi;Unknown
# repne insd
F2 6D, Insd_m32_DX, Legacy, INTEL386, priv fr=d op0=cw op1=cr rcw=rcx cr=rdi cw=rdi cr=dx cwm=es:rdi;Unknown
# repne outsb
F2 6E, Outsb_DX_m8, Legacy, INTEL186, priv fr=d op0=cr op1=cr rcw=rcx cr=dx cr=rsi cw=rsi crm=ds:rsi;Unknown
# repne outsw
F2 66 6F, Outsw_DX_m16, Legacy, INTEL186, priv fr=d op0=cr op1=cr rcw=rcx cr=dx cr=rsi cw=rsi crm=ds:rsi;Unknown
# repne outsd
F2 6F, Outsd_DX_m32, Legacy, INTEL386, priv fr=d op0=cr op1=cr rcw=rcx cr=dx cr=rsi cw=rsi crm=ds:rsi;Unknown
# repne movsb
F2 A4, Movsb_m8_m8, Legacy, INTEL8086, fr=d op0=cw op1=cr rcw=rcx cr=rdi cw=rdi cr=rsi cw=rsi cwm=es:rdi;Unknown crm=ds:rsi;Unknown
# repne movsw
F2 66 A5, Movsw_m16_m16, Legacy, INTEL8086, fr=d op0=cw op1=cr rcw=rcx cr=rdi cw=rdi cr=rsi cw=rsi cwm=es:rdi;Unknown crm=ds:rsi;Unknown
# repne movsd
F2 A5, Movsd_m32_m32, Legacy, INTEL386, fr=d op0=cw op1=cr rcw=rcx cr=rdi cw=rdi cr=rsi cw=rsi cwm=es:rdi;Unknown crm=ds:rsi;Unknown
# repne movsq
F2 48 A5, Movsq_m64_m64, Legacy, X64, fr=d op0=cw op1=cr rcw=rcx cr=rdi cw=rdi cr=rsi cw=rsi cwm=es:rdi;Unknown crm=ds:rsi;Unknown
# repne cmpsb
F2 A6, Cmpsb_m8_m8, Legacy, INTEL8086, fr=d fw=oszacp op0=cr op1=cr rcw=rcx cr=rsi cw=rsi cr=rdi cw=rdi crm=ds:rsi;Unknown crm=es:rdi;Unknown
# repne cmpsw
F2 66 A7, Cmpsw_m16_m16, Legacy, INTEL8086, fr=d fw=oszacp op0=cr op1=cr rcw=rcx cr=rsi cw=rsi cr=rdi cw=rdi crm=ds:rsi;Unknown crm=es:rdi;Unknown
# repne cmpsd
F2 A7, Cmpsd_m32_m32, Legacy, INTEL386, fr=d fw=oszacp op0=cr op1=cr rcw=rcx cr=rsi cw=rsi cr=rdi cw=rdi crm=ds:rsi;Unknown crm=es:rdi;Unknown
# repne cmpsq
F2 48 A7, Cmpsq_m64_m64, Legacy, X64, fr=d fw=oszacp op0=cr op1=cr rcw=rcx cr=rsi cw=rsi cr=rdi cw=rdi crm=ds:rsi;Unknown crm=es:rdi;Unknown
# repne stosb
F2 AA, Stosb_m8_AL, Legacy, INTEL8086, fr=d op0=cw op1=cr rcw=rcx cr=rdi cw=rdi cr=al cwm=es:rdi;Unknown
# repne stosw
F2 66 AB, Stosw_m16_AX, Legacy, INTEL8086, fr=d op0=cw op1=cr rcw=rcx cr=rdi cw=rdi cr=ax cwm=es:rdi;Unknown
# repne stosd
F2 AB, Stosd_m32_EAX, Legacy, INTEL386, fr=d op0=cw op1=cr rcw=rcx cr=rdi cw=rdi cr=eax cwm=es:rdi;Unknown
# repne stosq
F2 48 AB, Stosq_m64_RAX, Legacy, X64, fr=d op0=cw op1=cr rcw=rcx cr=rdi cw=rdi cr=rax cwm=es:rdi;Unknown
# repne lodsb
F2 AC, Lodsb_AL_m8, Legacy, INTEL8086, fr=d op0=cw op1=cr cw=al rcw=rcx cr=rsi cw=rsi crm=ds:rsi;Unknown
# repne lodsw
F2 66 AD, Lodsw_AX_m16, Legacy, INTEL8086, fr=d op0=cw op1=cr cw=ax rcw=rcx cr=rsi cw=rsi crm=ds:rsi;Unknown
# repne lodsd
F2 AD, Lodsd_EAX_m32, Legacy, INTEL386, fr=d op0=cw op1=cr cw=rax rcw=rcx cr=rsi cw=rsi crm=ds:rsi;Unknown
# repne lodsq
F2 48 AD, Lodsq_RAX_m64, Legacy, X64, fr=d op0=cw op1=cr cw=rax rcw=rcx cr=rsi cw=rsi crm=ds:rsi;Unknown
# repne scasb
F2 AE, Scasb_AL_m8, Legacy, INTEL8086, fr=d fw=oszacp op0=cr op1=cr cr=al rcw=rcx cr=rdi cw=rdi crm=es:rdi;Unknown
# repne scasw
F2 66 AF, Scasw_AX_m16, Legacy, INTEL8086, fr=d fw=oszacp op0=cr op1=cr cr=ax rcw=rcx cr=rdi cw=rdi crm=es:rdi;Unknown
# repne scasd
F2 AF, Scasd_EAX_m32, Legacy, INTEL386, fr=d fw=oszacp op0=cr op1=cr cr=eax rcw=rcx cr=rdi cw=rdi crm=es:rdi;Unknown
# repne scasq
F2 48 AF, Scasq_RAX_m64, Legacy, X64, fr=d fw=oszacp op0=cr op1=cr cr=rax rcw=rcx cr=rdi cw=rdi crm=es:rdi;Unknown
# rep insb
F3 6C, Insb_m8_DX, Legacy, INTEL186, priv fr=d op0=cw op1=cr rcw=rcx cr=rdi cw=rdi cr=dx cwm=es:rdi;Unknown
# rep insw
F3 66 6D, Insw_m16_DX, Legacy, INTEL186, priv fr=d op0=cw op1=cr rcw=rcx cr=rdi cw=rdi cr=dx cwm=es:rdi;Unknown
# rep insd
F3 6D, Insd_m32_DX, Legacy, INTEL386, priv fr=d op0=cw op1=cr rcw=rcx cr=rdi cw=rdi cr=dx cwm=es:rdi;Unknown
# rep outsb
F3 6E, Outsb_DX_m8, Legacy, INTEL186, priv fr=d op0=cr op1=cr rcw=rcx cr=dx cr=rsi cw=rsi crm=ds:rsi;Unknown
# rep outsw
F3 66 6F, Outsw_DX_m16, Legacy, INTEL186, priv fr=d op0=cr op1=cr rcw=rcx cr=dx cr=rsi cw=rsi crm=ds:rsi;Unknown
# rep outsd
F3 6F, Outsd_DX_m32, Legacy, INTEL386, priv fr=d op0=cr op1=cr rcw=rcx cr=dx cr=rsi cw=rsi crm=ds:rsi;Unknown
# rep movsb
F3 A4, Movsb_m8_m8, Legacy, INTEL8086, fr=d op0=cw op1=cr rcw=rcx cr=rdi cw=rdi cr=rsi cw=rsi cwm=es:rdi;Unknown crm=ds:rsi;Unknown
# rep movsw
F3 66 A5, Movsw_m16_m16, Legacy, INTEL8086, fr=d op0=cw op1=cr rcw=rcx cr=rdi cw=rdi cr=rsi cw=rsi cwm=es:rdi;Unknown crm=ds:rsi;Unknown
# rep movsd
F3 A5, Movsd_m32_m32, Legacy, INTEL386, fr=d op0=cw op1=cr rcw=rcx cr=rdi cw=rdi cr=rsi cw=rsi cwm=es:rdi;Unknown crm=ds:rsi;Unknown
# rep movsq
F3 48 A5, Movsq_m64_m64, Legacy, X64, fr=d op0=cw op1=cr rcw=rcx cr=rdi cw=rdi cr=rsi cw=rsi cwm=es:rdi;Unknown crm=ds:rsi;Unknown
# repe cmpsb
F3 A6, Cmpsb_m8_m8, Legacy, INTEL8086, fr=d fw=oszacp op0=cr op1=cr rcw=rcx cr=rsi cw=rsi cr=rdi cw=rdi crm=ds:rsi;Unknown crm=es:rdi;Unknown
# repe cmpsw
F3 66 A7, Cmpsw_m16_m16, Legacy, INTEL8086, fr=d fw=oszacp op0=cr op1=cr rcw=rcx cr=rsi cw=rsi cr=rdi cw=rdi crm=ds:rsi;Unknown crm=es:rdi;Unknown
# repe cmpsd
F3 A7, Cmpsd_m32_m32, Legacy, INTEL386, fr=d fw=oszacp op0=cr op1=cr rcw=rcx cr=rsi cw=rsi cr=rdi cw=rdi crm=ds:rsi;Unknown crm=es:rdi;Unknown
# repe cmpsq
F3 48 A7, Cmpsq_m64_m64, Legacy, X64, fr=d fw=oszacp op0=cr op1=cr rcw=rcx cr=rsi cw=rsi cr=rdi cw=rdi crm=ds:rsi;Unknown crm=es:rdi;Unknown
# rep stosb
F3 AA, Stosb_m8_AL, Legacy, INTEL8086, fr=d op0=cw op1=cr rcw=rcx cr=rdi cw=rdi cr=al cwm=es:rdi;Unknown
# rep stosw
F3 66 AB, Stosw_m16_AX, Legacy, INTEL8086, fr=d op0=cw op1=cr rcw=rcx cr=rdi cw=rdi cr=ax cwm=es:rdi;Unknown
# rep stosd
F3 AB, Stosd_m32_EAX, Legacy, INTEL386, fr=d op0=cw op1=cr rcw=rcx cr=rdi cw=rdi cr=eax cwm=es:rdi;Unknown
# rep stosq
F3 48 AB, Stosq_m64_RAX, Legacy, X64, fr=d op0=cw op1=cr rcw=rcx cr=rdi cw=rdi cr=rax cwm=es:rdi;Unknown
# rep lodsb
F3 AC, Lodsb_AL_m8, Legacy, INTEL8086, fr=d op0=cw op1=cr cw=al rcw=rcx cr=rsi cw=rsi crm=ds:rsi;Unknown
# rep lodsw
F3 66 AD, Lodsw_AX_m16, Legacy, INTEL8086, fr=d op0=cw op1=cr cw=ax rcw=rcx cr=rsi cw=rsi crm=ds:rsi;Unknown
# rep lodsd
F3 AD, Lodsd_EAX_m32, Legacy, INTEL386, fr=d op0=cw op1=cr cw=rax rcw=rcx cr=rsi cw=rsi crm=ds:rsi;Unknown
# rep lodsq
F3 48 AD, Lodsq_RAX_m64, Legacy, X64, fr=d op0=cw op1=cr cw=rax rcw=rcx cr=rsi cw=rsi crm=ds:rsi;Unknown
# repe scasb
F3 AE, Scasb_AL_m8, Legacy, INTEL8086, fr=d fw=oszacp op0=cr op1=cr cr=al rcw=rcx cr=rdi cw=rdi crm=es:rdi;Unknown
# repe scasw
F3 66 AF, Scasw_AX_m16, Legacy, INTEL8086, fr=d fw=oszacp op0=cr op1=cr cr=ax rcw=rcx cr=rdi cw=rdi crm=es:rdi;Unknown
# repe scasd
F3 AF, Scasd_EAX_m32, Legacy, INTEL386, fr=d fw=oszacp op0=cr op1=cr cr=eax rcw=rcx cr=rdi cw=rdi crm=es:rdi;Unknown
# repe scasq
F3 48 AF, Scasq_RAX_m64, Legacy, X64, fr=d fw=oszacp op0=cr op1=cr cr=rax rcw=rcx cr=rdi cw=rdi crm=es:rdi;Unknown
# push word ptr [rsp+10h]
66 FF 74 24 10, Push_rm16, Legacy, INTEL8086, op0=r rw=xsp r=rsp rm=ss:rsp+0x10;UInt16 wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 stack=-2
# push qword ptr [rsp+10h]
FF 74 24 10, Push_rm64, Legacy, X64, op0=r rw=xsp r=rsp rm=ss:rsp+0x10;UInt64 wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# pop word ptr [rsp+10h]
66 8F 44 24 10, Pop_rm16, Legacy, INTEL8086, op0=w rw=xsp r=rsp wm=ss:rsp+0x12;UInt16 rm=ss:xsp;UInt16 stack=2
# pop qword ptr [rsp+10h]
8F 44 24 10, Pop_rm64, Legacy, X64, op0=w rw=xsp r=rsp wm=ss:rsp+0x18;UInt64 rm=ss:xsp;UInt64 stack=8
# push word ptr [esp+10h]
66 67 FF 74 24 10, Push_rm16, Legacy, INTEL8086, op0=r rw=xsp r=esp rm=ss:esp+0x10;UInt16 wm=ss:xsp+0xFFFFFFFFFFFFFFFE;UInt16 stack=-2
# push qword ptr [esp+10h]
67 FF 74 24 10, Push_rm64, Legacy, X64, op0=r rw=xsp r=esp rm=ss:esp+0x10;UInt64 wm=ss:xsp+0xFFFFFFFFFFFFFFF8;UInt64 stack=-8
# pop word ptr [esp+10h]
66 67 8F 44 24 10, Pop_rm16, Legacy, INTEL8086, op0=w rw=xsp r=esp wm=ss:esp+0x12;UInt16 rm=ss:xsp;UInt16 stack=2
# pop qword ptr [esp+10h]
67 8F 44 24 10, Pop_rm64, Legacy, X64, op0=w rw=xsp r=esp wm=ss:esp+0x18;UInt64 rm=ss:xsp;UInt64 stack=8
# vmrun eax
67 0F01 D8, Vmrund, Legacy, SVM, fr=acopszidA priv save-restore flow=Call r=eax
# vmrun rax
0F01 D8, Vmrunq, Legacy, SVM, fr=acopszidA priv save-restore flow=Call r=rax
# vmmcall
0F01 D9, Vmmcall, Legacy, SVM, flow=Call
# vmload eax
67 0F01 DA, Vmloadd, Legacy, SVM, priv r=eax w=fs;gs
# vmload rax
0F01 DA, Vmloadq, Legacy, SVM, priv r=rax w=fs;gs
# vmsave eax
67 0F01 DB, Vmsaved, Legacy, SVM, priv r=eax;fs;gs
# vmsave rax
0F01 DB, Vmsaveq, Legacy, SVM, priv r=rax;fs;gs
# stgi
0F01 DC, Stgi, Legacy, SKINIT_or_SVM, priv
# clgi
0F01 DD, Clgi, Legacy, SVM, priv
# skinit eax
0F01 DE, Skinit, Legacy, SKINIT_or_SVM, fc=acopszidA priv flow=Return w=cr0;cr2-cr4 w=dr0-dr3;dr6;dr7 w=es-gs r=eax w=rax-r15
# invlpga eax,ecx
67 0F01 DF, Invlpgad, Legacy, SVM, priv r=eax;ecx
# invlpga eax,ecx
64 67 0F01 DF, Invlpgad, Legacy, SVM, priv r=eax;ecx
# invlpga rax,ecx
0F01 DF, Invlpgaq, Legacy, SVM, priv r=rax;ecx
# invlpga rax,ecx
64 0F01 DF, Invlpgaq, Legacy, SVM, priv r=rax;ecx
# monitorx eax,rcx,rdx
67 0F01 FA, Monitorxd, Legacy, MONITORX, r=eax;ecx;edx
# monitorx rax,rcx,rdx
0F01 FA, Monitorxq, Legacy, MONITORX, r=rax;ecx;edx
# mcommit
F3 0F01 FA, Mcommit, Legacy, MCOMMIT, fw=c fc=aopsz
# mwaitx rax,rcx,rbx
0F01 FB, Mwaitx, Legacy, MONITORX, r=eax;ecx cr=ebx
# clzero
67 0F01 FC, Clzerod, Legacy, CLZERO, r=eax
# clzero
0F01 FC, Clzeroq, Legacy, CLZERO, r=rax
# rdpru
0F01 FD, Rdpru, Legacy, RDPRU, fw=c fc=aopsz r=ecx w=rax;rdx
# femms
0F0E, Femms, Legacy, D3NOW,
# movntss dword ptr [rax],xmm1
F3 0F2B 08, Movntss_m32_xmm, Legacy, SSE4A, op0=w op1=r r=rax wm=ds:rax;Float32 r=xmm1
# movntsd qword ptr [rax],xmm1
F2 0F2B 08, Movntsd_m64_xmm, Legacy, SSE4A, op0=w op1=r r=rax wm=ds:rax;Float64 r=xmm1
# extrq xmm1,0A5h,0FDh
66 0F78 C1 A5 FD, Extrq_xmm_imm8_imm8, Legacy, SSE4A, op0=rw op1=r op2=r rw=xmm1
# insertq xmm2,xmm1,0A5h,0FDh
F2 0F78 D1 A5 FD, Insertq_xmm_xmm_imm8_imm8, Legacy, SSE4A, op0=w op1=r op2=r op3=r w=xmm2 r=xmm1
# extrq xmm2,xmm1
66 0F79 D1, Extrq_xmm_xmm, Legacy, SSE4A, op0=rw op1=r rw=xmm2 r=xmm1
# insertq xmm2,xmm1
F2 0F79 D1, Insertq_xmm_xmm, Legacy, SSE4A, op0=rw op1=r rw=xmm2 r=xmm1
# vpermil2ps xmm2,xmm6,xmm3,xmm4,0
C4E349 48 D3 40, VEX_Vpermil2ps_xmm_xmm_xmmm128_xmm_imm4, VEX, XOP, op0=w op1=r op2=r op3=r op4=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vpermil2ps xmm2,xmm6,[rax],xmm4,1
C4E349 48 10 41, VEX_Vpermil2ps_xmm_xmm_xmmm128_xmm_imm4, VEX, XOP, op0=w op1=r op2=r op3=r op4=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32 r=xmm4
# vpermil2ps ymm2,ymm6,ymm3,ymm5,0
C4E34D 48 D3 50, VEX_Vpermil2ps_ymm_ymm_ymmm256_ymm_imm4, VEX, XOP, op0=w op1=r op2=r op3=r op4=r w=vmm2 r=ymm6 r=ymm3 r=ymm5
# vpermil2ps ymm2,ymm6,[rax],ymm5,2
C4E34D 48 10 52, VEX_Vpermil2ps_ymm_ymm_ymmm256_ymm_imm4, VEX, XOP, op0=w op1=r op2=r op3=r op4=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32 r=ymm5
# vpermil2ps xmm2,xmm6,xmm4,xmm3,0
C4E3C9 48 D3 40, VEX_Vpermil2ps_xmm_xmm_xmm_xmmm128_imm4, VEX, XOP, op0=w op1=r op2=r op3=r op4=r w=vmm2 r=xmm6 r=xmm4 r=xmm3
# vpermil2ps xmm2,xmm6,xmm4,[rax],1
C4E3C9 48 10 41, VEX_Vpermil2ps_xmm_xmm_xmm_xmmm128_imm4, VEX, XOP, op0=w op1=r op2=r op3=r op4=r w=vmm2 r=xmm6 r=xmm4 r=rax rm=ds:rax;Packed128_Float32
# vpermil2ps ymm2,ymm6,ymm5,ymm3,0
C4E3CD 48 D3 50, VEX_Vpermil2ps_ymm_ymm_ymm_ymmm256_imm4, VEX, XOP, op0=w op1=r op2=r op3=r op4=r w=vmm2 r=ymm6 r=ymm5 r=ymm3
# vpermil2ps ymm2,ymm6,ymm5,[rax],2
C4E3CD 48 10 52, VEX_Vpermil2ps_ymm_ymm_ymm_ymmm256_imm4, VEX, XOP, op0=w op1=r op2=r op3=r op4=r w=vmm2 r=ymm6 r=ymm5 r=rax rm=ds:rax;Packed256_Float32
# vpermil2pd xmm2,xmm6,xmm3,xmm4,0
C4E349 49 D3 40, VEX_Vpermil2pd_xmm_xmm_xmmm128_xmm_imm4, VEX, XOP, op0=w op1=r op2=r op3=r op4=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vpermil2pd xmm2,xmm6,[rax],xmm4,1
C4E349 49 10 41, VEX_Vpermil2pd_xmm_xmm_xmmm128_xmm_imm4, VEX, XOP, op0=w op1=r op2=r op3=r op4=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64 r=xmm4
# vpermil2pd ymm2,ymm6,ymm3,ymm5,0
C4E34D 49 D3 50, VEX_Vpermil2pd_ymm_ymm_ymmm256_ymm_imm4, VEX, XOP, op0=w op1=r op2=r op3=r op4=r w=vmm2 r=ymm6 r=ymm3 r=ymm5
# vpermil2pd ymm2,ymm6,[rax],ymm5,2
C4E34D 49 10 52, VEX_Vpermil2pd_ymm_ymm_ymmm256_ymm_imm4, VEX, XOP, op0=w op1=r op2=r op3=r op4=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64 r=ymm5
# vpermil2pd xmm2,xmm6,xmm4,xmm3,0
C4E3C9 49 D3 40, VEX_Vpermil2pd_xmm_xmm_xmm_xmmm128_imm4, VEX, XOP, op0=w op1=r op2=r op3=r op4=r w=vmm2 r=xmm6 r=xmm4 r=xmm3
# vpermil2pd xmm2,xmm6,xmm4,[rax],1
C4E3C9 49 10 41, VEX_Vpermil2pd_xmm_xmm_xmm_xmmm128_imm4, VEX, XOP, op0=w op1=r op2=r op3=r op4=r w=vmm2 r=xmm6 r=xmm4 r=rax rm=ds:rax;Packed128_Float64
# vpermil2pd ymm2,ymm6,ymm5,ymm3,0
C4E3CD 49 D3 50, VEX_Vpermil2pd_ymm_ymm_ymm_ymmm256_imm4, VEX, XOP, op0=w op1=r op2=r op3=r op4=r w=vmm2 r=ymm6 r=ymm5 r=ymm3
# vpermil2pd ymm2,ymm6,ymm5,[rax],2
C4E3CD 49 10 52, VEX_Vpermil2pd_ymm_ymm_ymm_ymmm256_imm4, VEX, XOP, op0=w op1=r op2=r op3=r op4=r w=vmm2 r=ymm6 r=ymm5 r=rax rm=ds:rax;Packed256_Float64
# vfmaddsubps xmm2,xmm6,xmm3,xmm4
C4E349 5C D3 40, VEX_Vfmaddsubps_xmm_xmm_xmmm128_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vfmaddsubps xmm2,xmm6,[rax],xmm4
C4E349 5C 10 40, VEX_Vfmaddsubps_xmm_xmm_xmmm128_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32 r=xmm4
# vfmaddsubps ymm2,ymm6,ymm3,ymm5
C4E34D 5C D3 50, VEX_Vfmaddsubps_ymm_ymm_ymmm256_ymm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3 r=ymm5
# vfmaddsubps ymm2,ymm6,[rax],ymm5
C4E34D 5C 10 50, VEX_Vfmaddsubps_ymm_ymm_ymmm256_ymm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32 r=ymm5
# vfmaddsubps xmm2,xmm6,xmm4,xmm3
C4E3C9 5C D3 40, VEX_Vfmaddsubps_xmm_xmm_xmm_xmmm128, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=xmm3
# vfmaddsubps xmm2,xmm6,xmm4,[rax]
C4E3C9 5C 10 40, VEX_Vfmaddsubps_xmm_xmm_xmm_xmmm128, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=rax rm=ds:rax;Packed128_Float32
# vfmaddsubps ymm2,ymm6,ymm5,ymm3
C4E3CD 5C D3 50, VEX_Vfmaddsubps_ymm_ymm_ymm_ymmm256, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=ymm3
# vfmaddsubps ymm2,ymm6,ymm5,[rax]
C4E3CD 5C 10 50, VEX_Vfmaddsubps_ymm_ymm_ymm_ymmm256, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=rax rm=ds:rax;Packed256_Float32
# vfmaddsubpd xmm2,xmm6,xmm3,xmm4
C4E349 5D D3 40, VEX_Vfmaddsubpd_xmm_xmm_xmmm128_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vfmaddsubpd xmm2,xmm6,[rax],xmm4
C4E349 5D 10 40, VEX_Vfmaddsubpd_xmm_xmm_xmmm128_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64 r=xmm4
# vfmaddsubpd ymm2,ymm6,ymm3,ymm5
C4E34D 5D D3 50, VEX_Vfmaddsubpd_ymm_ymm_ymmm256_ymm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3 r=ymm5
# vfmaddsubpd ymm2,ymm6,[rax],ymm5
C4E34D 5D 10 50, VEX_Vfmaddsubpd_ymm_ymm_ymmm256_ymm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64 r=ymm5
# vfmaddsubpd xmm2,xmm6,xmm4,xmm3
C4E3C9 5D D3 40, VEX_Vfmaddsubpd_xmm_xmm_xmm_xmmm128, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=xmm3
# vfmaddsubpd xmm2,xmm6,xmm4,[rax]
C4E3C9 5D 10 40, VEX_Vfmaddsubpd_xmm_xmm_xmm_xmmm128, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=rax rm=ds:rax;Packed128_Float64
# vfmaddsubpd ymm2,ymm6,ymm5,ymm3
C4E3CD 5D D3 50, VEX_Vfmaddsubpd_ymm_ymm_ymm_ymmm256, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=ymm3
# vfmaddsubpd ymm2,ymm6,ymm5,[rax]
C4E3CD 5D 10 50, VEX_Vfmaddsubpd_ymm_ymm_ymm_ymmm256, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=rax rm=ds:rax;Packed256_Float64
# vfmsubaddps xmm2,xmm6,xmm3,xmm4
C4E349 5E D3 40, VEX_Vfmsubaddps_xmm_xmm_xmmm128_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vfmsubaddps xmm2,xmm6,[rax],xmm4
C4E349 5E 10 40, VEX_Vfmsubaddps_xmm_xmm_xmmm128_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32 r=xmm4
# vfmsubaddps ymm2,ymm6,ymm3,ymm5
C4E34D 5E D3 50, VEX_Vfmsubaddps_ymm_ymm_ymmm256_ymm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3 r=ymm5
# vfmsubaddps ymm2,ymm6,[rax],ymm5
C4E34D 5E 10 50, VEX_Vfmsubaddps_ymm_ymm_ymmm256_ymm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32 r=ymm5
# vfmsubaddps xmm2,xmm6,xmm4,xmm3
C4E3C9 5E D3 40, VEX_Vfmsubaddps_xmm_xmm_xmm_xmmm128, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=xmm3
# vfmsubaddps xmm2,xmm6,xmm4,[rax]
C4E3C9 5E 10 40, VEX_Vfmsubaddps_xmm_xmm_xmm_xmmm128, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=rax rm=ds:rax;Packed128_Float32
# vfmsubaddps ymm2,ymm6,ymm5,ymm3
C4E3CD 5E D3 50, VEX_Vfmsubaddps_ymm_ymm_ymm_ymmm256, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=ymm3
# vfmsubaddps ymm2,ymm6,ymm5,[rax]
C4E3CD 5E 10 50, VEX_Vfmsubaddps_ymm_ymm_ymm_ymmm256, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=rax rm=ds:rax;Packed256_Float32
# vfmsubaddpd xmm2,xmm6,xmm3,xmm4
C4E349 5F D3 40, VEX_Vfmsubaddpd_xmm_xmm_xmmm128_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vfmsubaddpd xmm2,xmm6,[rax],xmm4
C4E349 5F 10 40, VEX_Vfmsubaddpd_xmm_xmm_xmmm128_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64 r=xmm4
# vfmsubaddpd ymm2,ymm6,ymm3,ymm5
C4E34D 5F D3 50, VEX_Vfmsubaddpd_ymm_ymm_ymmm256_ymm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3 r=ymm5
# vfmsubaddpd ymm2,ymm6,[rax],ymm5
C4E34D 5F 10 50, VEX_Vfmsubaddpd_ymm_ymm_ymmm256_ymm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64 r=ymm5
# vfmsubaddpd xmm2,xmm6,xmm4,xmm3
C4E3C9 5F D3 40, VEX_Vfmsubaddpd_xmm_xmm_xmm_xmmm128, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=xmm3
# vfmsubaddpd xmm2,xmm6,xmm4,[rax]
C4E3C9 5F 10 40, VEX_Vfmsubaddpd_xmm_xmm_xmm_xmmm128, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=rax rm=ds:rax;Packed128_Float64
# vfmsubaddpd ymm2,ymm6,ymm5,ymm3
C4E3CD 5F D3 50, VEX_Vfmsubaddpd_ymm_ymm_ymm_ymmm256, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=ymm3
# vfmsubaddpd ymm2,ymm6,ymm5,[rax]
C4E3CD 5F 10 50, VEX_Vfmsubaddpd_ymm_ymm_ymm_ymmm256, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=rax rm=ds:rax;Packed256_Float64
# vfmaddps xmm2,xmm6,xmm3,xmm4
C4E349 68 D3 40, VEX_Vfmaddps_xmm_xmm_xmmm128_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vfmaddps xmm2,xmm6,[rax],xmm4
C4E349 68 10 40, VEX_Vfmaddps_xmm_xmm_xmmm128_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32 r=xmm4
# vfmaddps ymm2,ymm6,ymm3,ymm5
C4E34D 68 D3 50, VEX_Vfmaddps_ymm_ymm_ymmm256_ymm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3 r=ymm5
# vfmaddps ymm2,ymm6,[rax],ymm5
C4E34D 68 10 50, VEX_Vfmaddps_ymm_ymm_ymmm256_ymm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32 r=ymm5
# vfmaddps xmm2,xmm6,xmm4,xmm3
C4E3C9 68 D3 40, VEX_Vfmaddps_xmm_xmm_xmm_xmmm128, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=xmm3
# vfmaddps xmm2,xmm6,xmm4,[rax]
C4E3C9 68 10 40, VEX_Vfmaddps_xmm_xmm_xmm_xmmm128, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=rax rm=ds:rax;Packed128_Float32
# vfmaddps ymm2,ymm6,ymm5,ymm3
C4E3CD 68 D3 50, VEX_Vfmaddps_ymm_ymm_ymm_ymmm256, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=ymm3
# vfmaddps ymm2,ymm6,ymm5,[rax]
C4E3CD 68 10 50, VEX_Vfmaddps_ymm_ymm_ymm_ymmm256, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=rax rm=ds:rax;Packed256_Float32
# vfmaddpd xmm2,xmm6,xmm3,xmm4
C4E349 69 D3 40, VEX_Vfmaddpd_xmm_xmm_xmmm128_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vfmaddpd xmm2,xmm6,[rax],xmm4
C4E349 69 10 40, VEX_Vfmaddpd_xmm_xmm_xmmm128_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64 r=xmm4
# vfmaddpd ymm2,ymm6,ymm3,ymm5
C4E34D 69 D3 50, VEX_Vfmaddpd_ymm_ymm_ymmm256_ymm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3 r=ymm5
# vfmaddpd ymm2,ymm6,[rax],ymm5
C4E34D 69 10 50, VEX_Vfmaddpd_ymm_ymm_ymmm256_ymm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64 r=ymm5
# vfmaddpd xmm2,xmm6,xmm4,xmm3
C4E3C9 69 D3 40, VEX_Vfmaddpd_xmm_xmm_xmm_xmmm128, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=xmm3
# vfmaddpd xmm2,xmm6,xmm4,[rax]
C4E3C9 69 10 40, VEX_Vfmaddpd_xmm_xmm_xmm_xmmm128, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=rax rm=ds:rax;Packed128_Float64
# vfmaddpd ymm2,ymm6,ymm5,ymm3
C4E3CD 69 D3 50, VEX_Vfmaddpd_ymm_ymm_ymm_ymmm256, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=ymm3
# vfmaddpd ymm2,ymm6,ymm5,[rax]
C4E3CD 69 10 50, VEX_Vfmaddpd_ymm_ymm_ymm_ymmm256, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=rax rm=ds:rax;Packed256_Float64
# vfmaddss xmm2,xmm6,xmm3,xmm4
C4E349 6A D3 40, VEX_Vfmaddss_xmm_xmm_xmmm32_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vfmaddss xmm2,xmm6,[rax],xmm4
C4E349 6A 10 40, VEX_Vfmaddss_xmm_xmm_xmmm32_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float32 r=xmm4
# vfmaddss xmm2,xmm6,xmm4,xmm3
C4E3C9 6A D3 40, VEX_Vfmaddss_xmm_xmm_xmm_xmmm32, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=xmm3
# vfmaddss xmm2,xmm6,xmm4,[rax]
C4E3C9 6A 10 40, VEX_Vfmaddss_xmm_xmm_xmm_xmmm32, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=rax rm=ds:rax;Float32
# vfmaddsd xmm2,xmm6,xmm3,xmm4
C4E349 6B D3 40, VEX_Vfmaddsd_xmm_xmm_xmmm64_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vfmaddsd xmm2,xmm6,[rax],xmm4
C4E349 6B 10 40, VEX_Vfmaddsd_xmm_xmm_xmmm64_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float64 r=xmm4
# vfmaddsd xmm2,xmm6,xmm4,xmm3
C4E3C9 6B D3 40, VEX_Vfmaddsd_xmm_xmm_xmm_xmmm64, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=xmm3
# vfmaddsd xmm2,xmm6,xmm4,[rax]
C4E3C9 6B 10 40, VEX_Vfmaddsd_xmm_xmm_xmm_xmmm64, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=rax rm=ds:rax;Float64
# vfmsubps xmm2,xmm6,xmm3,xmm4
C4E349 6C D3 40, VEX_Vfmsubps_xmm_xmm_xmmm128_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vfmsubps xmm2,xmm6,[rax],xmm4
C4E349 6C 10 40, VEX_Vfmsubps_xmm_xmm_xmmm128_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32 r=xmm4
# vfmsubps ymm2,ymm6,ymm3,ymm5
C4E34D 6C D3 50, VEX_Vfmsubps_ymm_ymm_ymmm256_ymm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3 r=ymm5
# vfmsubps ymm2,ymm6,[rax],ymm5
C4E34D 6C 10 50, VEX_Vfmsubps_ymm_ymm_ymmm256_ymm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32 r=ymm5
# vfmsubps xmm2,xmm6,xmm4,xmm3
C4E3C9 6C D3 40, VEX_Vfmsubps_xmm_xmm_xmm_xmmm128, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=xmm3
# vfmsubps xmm2,xmm6,xmm4,[rax]
C4E3C9 6C 10 40, VEX_Vfmsubps_xmm_xmm_xmm_xmmm128, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=rax rm=ds:rax;Packed128_Float32
# vfmsubps ymm2,ymm6,ymm5,ymm3
C4E3CD 6C D3 50, VEX_Vfmsubps_ymm_ymm_ymm_ymmm256, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=ymm3
# vfmsubps ymm2,ymm6,ymm5,[rax]
C4E3CD 6C 10 50, VEX_Vfmsubps_ymm_ymm_ymm_ymmm256, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=rax rm=ds:rax;Packed256_Float32
# vfmsubpd xmm2,xmm6,xmm3,xmm4
C4E349 6D D3 40, VEX_Vfmsubpd_xmm_xmm_xmmm128_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vfmsubpd xmm2,xmm6,[rax],xmm4
C4E349 6D 10 40, VEX_Vfmsubpd_xmm_xmm_xmmm128_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64 r=xmm4
# vfmsubpd ymm2,ymm6,ymm3,ymm5
C4E34D 6D D3 50, VEX_Vfmsubpd_ymm_ymm_ymmm256_ymm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3 r=ymm5
# vfmsubpd ymm2,ymm6,[rax],ymm5
C4E34D 6D 10 50, VEX_Vfmsubpd_ymm_ymm_ymmm256_ymm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64 r=ymm5
# vfmsubpd xmm2,xmm6,xmm4,xmm3
C4E3C9 6D D3 40, VEX_Vfmsubpd_xmm_xmm_xmm_xmmm128, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=xmm3
# vfmsubpd xmm2,xmm6,xmm4,[rax]
C4E3C9 6D 10 40, VEX_Vfmsubpd_xmm_xmm_xmm_xmmm128, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=rax rm=ds:rax;Packed128_Float64
# vfmsubpd ymm2,ymm6,ymm5,ymm3
C4E3CD 6D D3 50, VEX_Vfmsubpd_ymm_ymm_ymm_ymmm256, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=ymm3
# vfmsubpd ymm2,ymm6,ymm5,[rax]
C4E3CD 6D 10 50, VEX_Vfmsubpd_ymm_ymm_ymm_ymmm256, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=rax rm=ds:rax;Packed256_Float64
# vfmsubss xmm2,xmm6,xmm3,xmm4
C4E349 6E D3 40, VEX_Vfmsubss_xmm_xmm_xmmm32_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vfmsubss xmm2,xmm6,[rax],xmm4
C4E349 6E 10 40, VEX_Vfmsubss_xmm_xmm_xmmm32_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float32 r=xmm4
# vfmsubss xmm2,xmm6,xmm4,xmm3
C4E3C9 6E D3 40, VEX_Vfmsubss_xmm_xmm_xmm_xmmm32, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=xmm3
# vfmsubss xmm2,xmm6,xmm4,[rax]
C4E3C9 6E 10 40, VEX_Vfmsubss_xmm_xmm_xmm_xmmm32, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=rax rm=ds:rax;Float32
# vfmsubsd xmm2,xmm6,xmm3,xmm4
C4E349 6F D3 40, VEX_Vfmsubsd_xmm_xmm_xmmm64_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vfmsubsd xmm2,xmm6,[rax],xmm4
C4E349 6F 10 40, VEX_Vfmsubsd_xmm_xmm_xmmm64_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float64 r=xmm4
# vfmsubsd xmm2,xmm6,xmm4,xmm3
C4E3C9 6F D3 40, VEX_Vfmsubsd_xmm_xmm_xmm_xmmm64, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=xmm3
# vfmsubsd xmm2,xmm6,xmm4,[rax]
C4E3C9 6F 10 40, VEX_Vfmsubsd_xmm_xmm_xmm_xmmm64, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=rax rm=ds:rax;Float64
# vfnmaddps xmm2,xmm6,xmm3,xmm4
C4E349 78 D3 40, VEX_Vfnmaddps_xmm_xmm_xmmm128_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vfnmaddps xmm2,xmm6,[rax],xmm4
C4E349 78 10 40, VEX_Vfnmaddps_xmm_xmm_xmmm128_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32 r=xmm4
# vfnmaddps ymm2,ymm6,ymm3,ymm5
C4E34D 78 D3 50, VEX_Vfnmaddps_ymm_ymm_ymmm256_ymm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3 r=ymm5
# vfnmaddps ymm2,ymm6,[rax],ymm5
C4E34D 78 10 50, VEX_Vfnmaddps_ymm_ymm_ymmm256_ymm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32 r=ymm5
# vfnmaddps xmm2,xmm6,xmm4,xmm3
C4E3C9 78 D3 40, VEX_Vfnmaddps_xmm_xmm_xmm_xmmm128, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=xmm3
# vfnmaddps xmm2,xmm6,xmm4,[rax]
C4E3C9 78 10 40, VEX_Vfnmaddps_xmm_xmm_xmm_xmmm128, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=rax rm=ds:rax;Packed128_Float32
# vfnmaddps ymm2,ymm6,ymm5,ymm3
C4E3CD 78 D3 50, VEX_Vfnmaddps_ymm_ymm_ymm_ymmm256, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=ymm3
# vfnmaddps ymm2,ymm6,ymm5,[rax]
C4E3CD 78 10 50, VEX_Vfnmaddps_ymm_ymm_ymm_ymmm256, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=rax rm=ds:rax;Packed256_Float32
# vfnmaddpd xmm2,xmm6,xmm3,xmm4
C4E349 79 D3 40, VEX_Vfnmaddpd_xmm_xmm_xmmm128_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vfnmaddpd xmm2,xmm6,[rax],xmm4
C4E349 79 10 40, VEX_Vfnmaddpd_xmm_xmm_xmmm128_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64 r=xmm4
# vfnmaddpd ymm2,ymm6,ymm3,ymm5
C4E34D 79 D3 50, VEX_Vfnmaddpd_ymm_ymm_ymmm256_ymm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3 r=ymm5
# vfnmaddpd ymm2,ymm6,[rax],ymm5
C4E34D 79 10 50, VEX_Vfnmaddpd_ymm_ymm_ymmm256_ymm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64 r=ymm5
# vfnmaddpd xmm2,xmm6,xmm4,xmm3
C4E3C9 79 D3 40, VEX_Vfnmaddpd_xmm_xmm_xmm_xmmm128, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=xmm3
# vfnmaddpd xmm2,xmm6,xmm4,[rax]
C4E3C9 79 10 40, VEX_Vfnmaddpd_xmm_xmm_xmm_xmmm128, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=rax rm=ds:rax;Packed128_Float64
# vfnmaddpd ymm2,ymm6,ymm5,ymm3
C4E3CD 79 D3 50, VEX_Vfnmaddpd_ymm_ymm_ymm_ymmm256, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=ymm3
# vfnmaddpd ymm2,ymm6,ymm5,[rax]
C4E3CD 79 10 50, VEX_Vfnmaddpd_ymm_ymm_ymm_ymmm256, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=rax rm=ds:rax;Packed256_Float64
# vfnmaddss xmm2,xmm6,xmm3,xmm4
C4E349 7A D3 40, VEX_Vfnmaddss_xmm_xmm_xmmm32_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vfnmaddss xmm2,xmm6,[rax],xmm4
C4E349 7A 10 40, VEX_Vfnmaddss_xmm_xmm_xmmm32_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float32 r=xmm4
# vfnmaddss xmm2,xmm6,xmm4,xmm3
C4E3C9 7A D3 40, VEX_Vfnmaddss_xmm_xmm_xmm_xmmm32, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=xmm3
# vfnmaddss xmm2,xmm6,xmm4,[rax]
C4E3C9 7A 10 40, VEX_Vfnmaddss_xmm_xmm_xmm_xmmm32, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=rax rm=ds:rax;Float32
# vfnmaddsd xmm2,xmm6,xmm3,xmm4
C4E349 7B D3 40, VEX_Vfnmaddsd_xmm_xmm_xmmm64_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vfnmaddsd xmm2,xmm6,[rax],xmm4
C4E349 7B 10 40, VEX_Vfnmaddsd_xmm_xmm_xmmm64_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float64 r=xmm4
# vfnmaddsd xmm2,xmm6,xmm4,xmm3
C4E3C9 7B D3 40, VEX_Vfnmaddsd_xmm_xmm_xmm_xmmm64, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=xmm3
# vfnmaddsd xmm2,xmm6,xmm4,[rax]
C4E3C9 7B 10 40, VEX_Vfnmaddsd_xmm_xmm_xmm_xmmm64, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=rax rm=ds:rax;Float64
# vfnmsubps xmm2,xmm6,xmm3,xmm4
C4E349 7C D3 40, VEX_Vfnmsubps_xmm_xmm_xmmm128_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vfnmsubps xmm2,xmm6,[rax],xmm4
C4E349 7C 10 40, VEX_Vfnmsubps_xmm_xmm_xmmm128_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float32 r=xmm4
# vfnmsubps ymm2,ymm6,ymm3,ymm5
C4E34D 7C D3 50, VEX_Vfnmsubps_ymm_ymm_ymmm256_ymm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3 r=ymm5
# vfnmsubps ymm2,ymm6,[rax],ymm5
C4E34D 7C 10 50, VEX_Vfnmsubps_ymm_ymm_ymmm256_ymm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float32 r=ymm5
# vfnmsubps xmm2,xmm6,xmm4,xmm3
C4E3C9 7C D3 40, VEX_Vfnmsubps_xmm_xmm_xmm_xmmm128, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=xmm3
# vfnmsubps xmm2,xmm6,xmm4,[rax]
C4E3C9 7C 10 40, VEX_Vfnmsubps_xmm_xmm_xmm_xmmm128, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=rax rm=ds:rax;Packed128_Float32
# vfnmsubps ymm2,ymm6,ymm5,ymm3
C4E3CD 7C D3 50, VEX_Vfnmsubps_ymm_ymm_ymm_ymmm256, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=ymm3
# vfnmsubps ymm2,ymm6,ymm5,[rax]
C4E3CD 7C 10 50, VEX_Vfnmsubps_ymm_ymm_ymm_ymmm256, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=rax rm=ds:rax;Packed256_Float32
# vfnmsubpd xmm2,xmm6,xmm3,xmm4
C4E349 7D D3 40, VEX_Vfnmsubpd_xmm_xmm_xmmm128_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vfnmsubpd xmm2,xmm6,[rax],xmm4
C4E349 7D 10 40, VEX_Vfnmsubpd_xmm_xmm_xmmm128_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Float64 r=xmm4
# vfnmsubpd ymm2,ymm6,ymm3,ymm5
C4E34D 7D D3 50, VEX_Vfnmsubpd_ymm_ymm_ymmm256_ymm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3 r=ymm5
# vfnmsubpd ymm2,ymm6,[rax],ymm5
C4E34D 7D 10 50, VEX_Vfnmsubpd_ymm_ymm_ymmm256_ymm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Float64 r=ymm5
# vfnmsubpd xmm2,xmm6,xmm4,xmm3
C4E3C9 7D D3 40, VEX_Vfnmsubpd_xmm_xmm_xmm_xmmm128, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=xmm3
# vfnmsubpd xmm2,xmm6,xmm4,[rax]
C4E3C9 7D 10 40, VEX_Vfnmsubpd_xmm_xmm_xmm_xmmm128, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=rax rm=ds:rax;Packed128_Float64
# vfnmsubpd ymm2,ymm6,ymm5,ymm3
C4E3CD 7D D3 50, VEX_Vfnmsubpd_ymm_ymm_ymm_ymmm256, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=ymm3
# vfnmsubpd ymm2,ymm6,ymm5,[rax]
C4E3CD 7D 10 50, VEX_Vfnmsubpd_ymm_ymm_ymm_ymmm256, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=rax rm=ds:rax;Packed256_Float64
# vfnmsubss xmm2,xmm6,xmm3,xmm4
C4E349 7E D3 40, VEX_Vfnmsubss_xmm_xmm_xmmm32_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vfnmsubss xmm2,xmm6,[rax],xmm4
C4E349 7E 10 40, VEX_Vfnmsubss_xmm_xmm_xmmm32_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float32 r=xmm4
# vfnmsubss xmm2,xmm6,xmm4,xmm3
C4E3C9 7E D3 40, VEX_Vfnmsubss_xmm_xmm_xmm_xmmm32, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=xmm3
# vfnmsubss xmm2,xmm6,xmm4,[rax]
C4E3C9 7E 10 40, VEX_Vfnmsubss_xmm_xmm_xmm_xmmm32, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=rax rm=ds:rax;Float32
# vfnmsubsd xmm2,xmm6,xmm3,xmm4
C4E349 7F D3 40, VEX_Vfnmsubsd_xmm_xmm_xmmm64_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vfnmsubsd xmm2,xmm6,[rax],xmm4
C4E349 7F 10 40, VEX_Vfnmsubsd_xmm_xmm_xmmm64_xmm, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Float64 r=xmm4
# vfnmsubsd xmm2,xmm6,xmm4,xmm3
C4E3C9 7F D3 40, VEX_Vfnmsubsd_xmm_xmm_xmm_xmmm64, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=xmm3
# vfnmsubsd xmm2,xmm6,xmm4,[rax]
C4E3C9 7F 10 40, VEX_Vfnmsubsd_xmm_xmm_xmm_xmmm64, VEX, FMA4, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=rax rm=ds:rax;Float64
# vpmacssww xmm2,xmm6,xmm3,xmm4
8FE848 85 D3 40, XOP_Vpmacssww_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vpmacssww xmm2,xmm6,[rax],xmm4
8FE848 85 10 40, XOP_Vpmacssww_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int16 r=xmm4
# vpmacsswd xmm2,xmm6,xmm3,xmm4
8FE848 86 D3 40, XOP_Vpmacsswd_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vpmacsswd xmm2,xmm6,[rax],xmm4
8FE848 86 10 40, XOP_Vpmacsswd_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int16 r=xmm4
# vpmacssdql xmm2,xmm6,xmm3,xmm4
8FE848 87 D3 40, XOP_Vpmacssdql_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vpmacssdql xmm2,xmm6,[rax],xmm4
8FE848 87 10 40, XOP_Vpmacssdql_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int32 r=xmm4
# vpmacssdd xmm2,xmm6,xmm3,xmm4
8FE848 8E D3 40, XOP_Vpmacssdd_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vpmacssdd xmm2,xmm6,[rax],xmm4
8FE848 8E 10 40, XOP_Vpmacssdd_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int32 r=xmm4
# vpmacssdqh xmm2,xmm6,xmm3,xmm4
8FE848 8F D3 40, XOP_Vpmacssdqh_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vpmacssdqh xmm2,xmm6,[rax],xmm4
8FE848 8F 10 40, XOP_Vpmacssdqh_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int32 r=xmm4
# vpmacsww xmm2,xmm6,xmm3,xmm4
8FE848 95 D3 40, XOP_Vpmacsww_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vpmacsww xmm2,xmm6,[rax],xmm4
8FE848 95 10 40, XOP_Vpmacsww_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int16 r=xmm4
# vpmacswd xmm2,xmm6,xmm3,xmm4
8FE848 96 D3 40, XOP_Vpmacswd_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vpmacswd xmm2,xmm6,[rax],xmm4
8FE848 96 10 40, XOP_Vpmacswd_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int16 r=xmm4
# vpmacsdql xmm2,xmm6,xmm3,xmm4
8FE848 97 D3 40, XOP_Vpmacsdql_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vpmacsdql xmm2,xmm6,[rax],xmm4
8FE848 97 10 40, XOP_Vpmacsdql_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int32 r=xmm4
# vpmacsdd xmm2,xmm6,xmm3,xmm4
8FE848 9E D3 40, XOP_Vpmacsdd_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vpmacsdd xmm2,xmm6,[rax],xmm4
8FE848 9E 10 40, XOP_Vpmacsdd_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int32 r=xmm4
# vpmacsdqh xmm2,xmm6,xmm3,xmm4
8FE848 9F D3 40, XOP_Vpmacsdqh_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vpmacsdqh xmm2,xmm6,[rax],xmm4
8FE848 9F 10 40, XOP_Vpmacsdqh_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int32 r=xmm4
# vpcmov xmm2,xmm6,xmm3,xmm4
8FE848 A2 D3 40, XOP_Vpcmov_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vpcmov xmm2,xmm6,[rax],xmm4
8FE848 A2 10 40, XOP_Vpcmov_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;UInt128 r=xmm4
# vpcmov ymm2,ymm6,ymm3,ymm5
8FE84C A2 D3 50, XOP_Vpcmov_ymm_ymm_ymmm256_ymm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3 r=ymm5
# vpcmov ymm2,ymm6,[rax],ymm5
8FE84C A2 10 50, XOP_Vpcmov_ymm_ymm_ymmm256_ymm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;UInt256 r=ymm5
# vpcmov xmm2,xmm6,xmm4,xmm3
8FE8C8 A2 D3 40, XOP_Vpcmov_xmm_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=xmm3
# vpcmov xmm2,xmm6,xmm4,[rax]
8FE8C8 A2 10 40, XOP_Vpcmov_xmm_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=rax rm=ds:rax;UInt128
# vpcmov ymm2,ymm6,ymm5,ymm3
8FE8CC A2 D3 50, XOP_Vpcmov_ymm_ymm_ymm_ymmm256, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=ymm3
# vpcmov ymm2,ymm6,ymm5,[rax]
8FE8CC A2 10 50, XOP_Vpcmov_ymm_ymm_ymm_ymmm256, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm5 r=rax rm=ds:rax;UInt256
# vpperm xmm2,xmm6,xmm3,xmm4
8FE848 A3 D3 40, XOP_Vpperm_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vpperm xmm2,xmm6,[rax],xmm4
8FE848 A3 10 40, XOP_Vpperm_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt8 r=xmm4
# vpperm xmm2,xmm6,xmm4,xmm3
8FE8C8 A3 D3 40, XOP_Vpperm_xmm_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=xmm3
# vpperm xmm2,xmm6,xmm4,[rax]
8FE8C8 A3 10 40, XOP_Vpperm_xmm_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm4 r=rax rm=ds:rax;Packed128_UInt8
# vpmadcsswd xmm2,xmm6,xmm3,xmm4
8FE848 A6 D3 40, XOP_Vpmadcsswd_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vpmadcsswd xmm2,xmm6,[rax],xmm4
8FE848 A6 10 40, XOP_Vpmadcsswd_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int16 r=xmm4
# vpmadcswd xmm2,xmm6,xmm3,xmm4
8FE848 B6 D3 40, XOP_Vpmadcswd_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3 r=xmm4
# vpmadcswd xmm2,xmm6,[rax],xmm4
8FE848 B6 10 40, XOP_Vpmadcswd_xmm_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int16 r=xmm4
# vprotb xmm2,xmm3,0A5h
8FE878 C0 D3 A5, XOP_Vprotb_xmm_xmmm128_imm8, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm3
# vprotb xmm2,[rax],0A5h
8FE878 C0 10 A5, XOP_Vprotb_xmm_xmmm128_imm8, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt8
# vprotw xmm2,xmm3,0A5h
8FE878 C1 D3 A5, XOP_Vprotw_xmm_xmmm128_imm8, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm3
# vprotw xmm2,[rax],0A5h
8FE878 C1 10 A5, XOP_Vprotw_xmm_xmmm128_imm8, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt16
# vprotd xmm2,xmm3,0A5h
8FE878 C2 D3 A5, XOP_Vprotd_xmm_xmmm128_imm8, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm3
# vprotd xmm2,[rax],0A5h
8FE878 C2 10 A5, XOP_Vprotd_xmm_xmmm128_imm8, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt32
# vprotq xmm2,xmm3,0A5h
8FE878 C3 D3 A5, XOP_Vprotq_xmm_xmmm128_imm8, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm3
# vprotq xmm2,[rax],0A5h
8FE878 C3 10 A5, XOP_Vprotq_xmm_xmmm128_imm8, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt64
# vpcomb xmm2,xmm6,xmm3,0A5h
8FE848 CC D3 A5, XOP_Vpcomb_xmm_xmm_xmmm128_imm8, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vpcomb xmm2,xmm6,[rax],0A5h
8FE848 CC 10 A5, XOP_Vpcomb_xmm_xmm_xmmm128_imm8, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int8
# vpcomw xmm2,xmm6,xmm3,0A5h
8FE848 CD D3 A5, XOP_Vpcomw_xmm_xmm_xmmm128_imm8, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vpcomw xmm2,xmm6,[rax],0A5h
8FE848 CD 10 A5, XOP_Vpcomw_xmm_xmm_xmmm128_imm8, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int16
# vpcomd xmm2,xmm6,xmm3,0A5h
8FE848 CE D3 A5, XOP_Vpcomd_xmm_xmm_xmmm128_imm8, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vpcomd xmm2,xmm6,[rax],0A5h
8FE848 CE 10 A5, XOP_Vpcomd_xmm_xmm_xmmm128_imm8, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int32
# vpcomq xmm2,xmm6,xmm3,0A5h
8FE848 CF D3 A5, XOP_Vpcomq_xmm_xmm_xmmm128_imm8, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vpcomq xmm2,xmm6,[rax],0A5h
8FE848 CF 10 A5, XOP_Vpcomq_xmm_xmm_xmmm128_imm8, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int64
# vpcomub xmm2,xmm6,xmm3,0A5h
8FE848 EC D3 A5, XOP_Vpcomub_xmm_xmm_xmmm128_imm8, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vpcomub xmm2,xmm6,[rax],0A5h
8FE848 EC 10 A5, XOP_Vpcomub_xmm_xmm_xmmm128_imm8, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt8
# vpcomuw xmm2,xmm6,xmm3,0A5h
8FE848 ED D3 A5, XOP_Vpcomuw_xmm_xmm_xmmm128_imm8, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vpcomuw xmm2,xmm6,[rax],0A5h
8FE848 ED 10 A5, XOP_Vpcomuw_xmm_xmm_xmmm128_imm8, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt16
# vpcomud xmm2,xmm6,xmm3,0A5h
8FE848 EE D3 A5, XOP_Vpcomud_xmm_xmm_xmmm128_imm8, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vpcomud xmm2,xmm6,[rax],0A5h
8FE848 EE 10 A5, XOP_Vpcomud_xmm_xmm_xmmm128_imm8, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt32
# vpcomuq xmm2,xmm6,xmm3,0A5h
8FE848 EF D3 A5, XOP_Vpcomuq_xmm_xmm_xmmm128_imm8, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vpcomuq xmm2,xmm6,[rax],0A5h
8FE848 EF 10 A5, XOP_Vpcomuq_xmm_xmm_xmmm128_imm8, XOP, XOP, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt64
# blcfill esi,ebx
8FE948 01 CB, XOP_Blcfill_r32_rm32, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=ebx
# blcfill esi,[rax]
8FE948 01 08, XOP_Blcfill_r32_rm32, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rax rm=ds:rax;UInt32
# blcfill rsi,rbx
8FE9C8 01 CB, XOP_Blcfill_r64_rm64, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rbx
# blcfill rsi,[rax]
8FE9C8 01 08, XOP_Blcfill_r64_rm64, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rax rm=ds:rax;UInt64
# blsfill esi,ebx
8FE948 01 D3, XOP_Blsfill_r32_rm32, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=ebx
# blsfill esi,[rax]
8FE948 01 10, XOP_Blsfill_r32_rm32, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rax rm=ds:rax;UInt32
# blsfill rsi,rbx
8FE9C8 01 D3, XOP_Blsfill_r64_rm64, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rbx
# blsfill rsi,[rax]
8FE9C8 01 10, XOP_Blsfill_r64_rm64, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rax rm=ds:rax;UInt64
# blcs esi,ebx
8FE948 01 DB, XOP_Blcs_r32_rm32, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=ebx
# blcs esi,[rax]
8FE948 01 18, XOP_Blcs_r32_rm32, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rax rm=ds:rax;UInt32
# blcs rsi,rbx
8FE9C8 01 DB, XOP_Blcs_r64_rm64, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rbx
# blcs rsi,[rax]
8FE9C8 01 18, XOP_Blcs_r64_rm64, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rax rm=ds:rax;UInt64
# tzmsk esi,ebx
8FE948 01 E3, XOP_Tzmsk_r32_rm32, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=ebx
# tzmsk esi,[rax]
8FE948 01 20, XOP_Tzmsk_r32_rm32, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rax rm=ds:rax;UInt32
# tzmsk rsi,rbx
8FE9C8 01 E3, XOP_Tzmsk_r64_rm64, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rbx
# tzmsk rsi,[rax]
8FE9C8 01 20, XOP_Tzmsk_r64_rm64, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rax rm=ds:rax;UInt64
# blcic esi,ebx
8FE948 01 EB, XOP_Blcic_r32_rm32, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=ebx
# blcic esi,[rax]
8FE948 01 28, XOP_Blcic_r32_rm32, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rax rm=ds:rax;UInt32
# blcic rsi,rbx
8FE9C8 01 EB, XOP_Blcic_r64_rm64, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rbx
# blcic rsi,[rax]
8FE9C8 01 28, XOP_Blcic_r64_rm64, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rax rm=ds:rax;UInt64
# blsic esi,ebx
8FE948 01 F3, XOP_Blsic_r32_rm32, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=ebx
# blsic esi,[rax]
8FE948 01 30, XOP_Blsic_r32_rm32, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rax rm=ds:rax;UInt32
# blsic rsi,rbx
8FE9C8 01 F3, XOP_Blsic_r64_rm64, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rbx
# blsic rsi,[rax]
8FE9C8 01 30, XOP_Blsic_r64_rm64, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rax rm=ds:rax;UInt64
# t1mskc esi,ebx
8FE948 01 FB, XOP_T1mskc_r32_rm32, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=ebx
# t1mskc esi,[rax]
8FE948 01 38, XOP_T1mskc_r32_rm32, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rax rm=ds:rax;UInt32
# t1mskc rsi,rbx
8FE9C8 01 FB, XOP_T1mskc_r64_rm64, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rbx
# t1mskc rsi,[rax]
8FE9C8 01 38, XOP_T1mskc_r64_rm64, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rax rm=ds:rax;UInt64
# blcmsk esi,ebx
8FE948 02 CB, XOP_Blcmsk_r32_rm32, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=ebx
# blcmsk esi,[rax]
8FE948 02 08, XOP_Blcmsk_r32_rm32, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rax rm=ds:rax;UInt32
# blcmsk rsi,rbx
8FE9C8 02 CB, XOP_Blcmsk_r64_rm64, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rbx
# blcmsk rsi,[rax]
8FE9C8 02 08, XOP_Blcmsk_r64_rm64, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rax rm=ds:rax;UInt64
# blci esi,ebx
8FE948 02 F3, XOP_Blci_r32_rm32, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=ebx
# blci esi,[rax]
8FE948 02 30, XOP_Blci_r32_rm32, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rax rm=ds:rax;UInt32
# blci rsi,rbx
8FE9C8 02 F3, XOP_Blci_r64_rm64, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rbx
# blci rsi,[rax]
8FE9C8 02 30, XOP_Blci_r64_rm64, XOP, TBM, fc=o fw=szc fu=ap op0=w op1=r w=rsi r=rax rm=ds:rax;UInt64
# llwpcb ebx
64 8FE978 12 C3, XOP_Llwpcb_r32, XOP, LWP, op0=r r=ebx rm=ds:ebx;Unknown
# llwpcb rbx
64 8FE9F8 12 C3, XOP_Llwpcb_r64, XOP, LWP, op0=r r=rbx rm=ds:rbx;Unknown
# slwpcb ebx
64 8FE978 12 CB, XOP_Slwpcb_r32, XOP, LWP, op0=w w=rbx
# slwpcb rbx
64 8FE9F8 12 CB, XOP_Slwpcb_r64, XOP, LWP, op0=w w=rbx
# vfrczps xmm1,xmm5
8FE978 80 CD, XOP_Vfrczps_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm1 r=xmm5
# vfrczps xmm2,[rax]
8FE978 80 10, XOP_Vfrczps_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Float32
# vfrczps ymm1,ymm5
8FE97C 80 CD, XOP_Vfrczps_ymm_ymmm256, XOP, XOP, op0=w op1=r w=vmm1 r=ymm5
# vfrczps ymm2,[rax]
8FE97C 80 10, XOP_Vfrczps_ymm_ymmm256, XOP, XOP, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed256_Float32
# vfrczpd xmm1,xmm5
8FE978 81 CD, XOP_Vfrczpd_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm1 r=xmm5
# vfrczpd xmm2,[rax]
8FE978 81 10, XOP_Vfrczpd_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Float64
# vfrczpd ymm1,ymm5
8FE97C 81 CD, XOP_Vfrczpd_ymm_ymmm256, XOP, XOP, op0=w op1=r w=vmm1 r=ymm5
# vfrczpd ymm2,[rax]
8FE97C 81 10, XOP_Vfrczpd_ymm_ymmm256, XOP, XOP, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed256_Float64
# vfrczss xmm1,xmm5
8FE978 82 CD, XOP_Vfrczss_xmm_xmmm32, XOP, XOP, op0=w op1=r w=vmm1 r=xmm5
# vfrczss xmm2,[rax]
8FE978 82 10, XOP_Vfrczss_xmm_xmmm32, XOP, XOP, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Float32
# vfrczsd xmm1,xmm5
8FE978 83 CD, XOP_Vfrczsd_xmm_xmmm64, XOP, XOP, op0=w op1=r w=vmm1 r=xmm5
# vfrczsd xmm2,[rax]
8FE978 83 10, XOP_Vfrczsd_xmm_xmmm64, XOP, XOP, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Float64
# vprotb xmm2,xmm3,xmm6
8FE948 90 D3, XOP_Vprotb_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm3 r=xmm6
# vprotb xmm2,[rax],xmm6
8FE948 90 10, XOP_Vprotb_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt8 r=xmm6
# vprotb xmm2,xmm6,xmm3
8FE9C8 90 D3, XOP_Vprotb_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vprotb xmm2,xmm6,[rax]
8FE9C8 90 10, XOP_Vprotb_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt8
# vprotw xmm2,xmm3,xmm6
8FE948 91 D3, XOP_Vprotw_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm3 r=xmm6
# vprotw xmm2,[rax],xmm6
8FE948 91 10, XOP_Vprotw_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt16 r=xmm6
# vprotw xmm2,xmm6,xmm3
8FE9C8 91 D3, XOP_Vprotw_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vprotw xmm2,xmm6,[rax]
8FE9C8 91 10, XOP_Vprotw_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt16
# vprotd xmm2,xmm3,xmm6
8FE948 92 D3, XOP_Vprotd_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm3 r=xmm6
# vprotd xmm2,[rax],xmm6
8FE948 92 10, XOP_Vprotd_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt32 r=xmm6
# vprotd xmm2,xmm6,xmm3
8FE9C8 92 D3, XOP_Vprotd_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vprotd xmm2,xmm6,[rax]
8FE9C8 92 10, XOP_Vprotd_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt32
# vprotq xmm2,xmm3,xmm6
8FE948 93 D3, XOP_Vprotq_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm3 r=xmm6
# vprotq xmm2,[rax],xmm6
8FE948 93 10, XOP_Vprotq_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt64 r=xmm6
# vprotq xmm2,xmm6,xmm3
8FE9C8 93 D3, XOP_Vprotq_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vprotq xmm2,xmm6,[rax]
8FE9C8 93 10, XOP_Vprotq_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt64
# vpshlb xmm2,xmm3,xmm6
8FE948 94 D3, XOP_Vpshlb_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm3 r=xmm6
# vpshlb xmm2,[rax],xmm6
8FE948 94 10, XOP_Vpshlb_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt8 r=xmm6
# vpshlb xmm2,xmm6,xmm3
8FE9C8 94 D3, XOP_Vpshlb_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpshlb xmm2,xmm6,[rax]
8FE9C8 94 10, XOP_Vpshlb_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt8
# vpshlw xmm2,xmm3,xmm6
8FE948 95 D3, XOP_Vpshlw_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm3 r=xmm6
# vpshlw xmm2,[rax],xmm6
8FE948 95 10, XOP_Vpshlw_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt16 r=xmm6
# vpshlw xmm2,xmm6,xmm3
8FE9C8 95 D3, XOP_Vpshlw_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpshlw xmm2,xmm6,[rax]
8FE9C8 95 10, XOP_Vpshlw_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt16
# vpshld xmm2,xmm3,xmm6
8FE948 96 D3, XOP_Vpshld_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm3 r=xmm6
# vpshld xmm2,[rax],xmm6
8FE948 96 10, XOP_Vpshld_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt32 r=xmm6
# vpshld xmm2,xmm6,xmm3
8FE9C8 96 D3, XOP_Vpshld_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpshld xmm2,xmm6,[rax]
8FE9C8 96 10, XOP_Vpshld_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt32
# vpshlq xmm2,xmm3,xmm6
8FE948 97 D3, XOP_Vpshlq_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm3 r=xmm6
# vpshlq xmm2,[rax],xmm6
8FE948 97 10, XOP_Vpshlq_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt64 r=xmm6
# vpshlq xmm2,xmm6,xmm3
8FE9C8 97 D3, XOP_Vpshlq_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpshlq xmm2,xmm6,[rax]
8FE9C8 97 10, XOP_Vpshlq_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt64
# vpshab xmm2,xmm3,xmm6
8FE948 98 D3, XOP_Vpshab_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm3 r=xmm6
# vpshab xmm2,[rax],xmm6
8FE948 98 10, XOP_Vpshab_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed128_Int8 r=xmm6
# vpshab xmm2,xmm6,xmm3
8FE9C8 98 D3, XOP_Vpshab_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpshab xmm2,xmm6,[rax]
8FE9C8 98 10, XOP_Vpshab_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int8
# vpshaw xmm2,xmm3,xmm6
8FE948 99 D3, XOP_Vpshaw_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm3 r=xmm6
# vpshaw xmm2,[rax],xmm6
8FE948 99 10, XOP_Vpshaw_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed128_Int16 r=xmm6
# vpshaw xmm2,xmm6,xmm3
8FE9C8 99 D3, XOP_Vpshaw_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpshaw xmm2,xmm6,[rax]
8FE9C8 99 10, XOP_Vpshaw_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int16
# vpshad xmm2,xmm3,xmm6
8FE948 9A D3, XOP_Vpshad_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm3 r=xmm6
# vpshad xmm2,[rax],xmm6
8FE948 9A 10, XOP_Vpshad_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed128_Int32 r=xmm6
# vpshad xmm2,xmm6,xmm3
8FE9C8 9A D3, XOP_Vpshad_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpshad xmm2,xmm6,[rax]
8FE9C8 9A 10, XOP_Vpshad_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int32
# vpshaq xmm2,xmm3,xmm6
8FE948 9B D3, XOP_Vpshaq_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm3 r=xmm6
# vpshaq xmm2,[rax],xmm6
8FE948 9B 10, XOP_Vpshaq_xmm_xmmm128_xmm, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=rax rm=ds:rax;Packed128_Int64 r=xmm6
# vpshaq xmm2,xmm6,xmm3
8FE9C8 9B D3, XOP_Vpshaq_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vpshaq xmm2,xmm6,[rax]
8FE9C8 9B 10, XOP_Vpshaq_xmm_xmm_xmmm128, XOP, XOP, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int64
# vphaddbw xmm1,xmm5
8FE978 C1 CD, XOP_Vphaddbw_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm1 r=xmm5
# vphaddbw xmm2,[rax]
8FE978 C1 10, XOP_Vphaddbw_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Int8
# vphaddbd xmm1,xmm5
8FE978 C2 CD, XOP_Vphaddbd_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm1 r=xmm5
# vphaddbd xmm2,[rax]
8FE978 C2 10, XOP_Vphaddbd_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Int8
# vphaddbq xmm1,xmm5
8FE978 C3 CD, XOP_Vphaddbq_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm1 r=xmm5
# vphaddbq xmm2,[rax]
8FE978 C3 10, XOP_Vphaddbq_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Int8
# vphaddwd xmm1,xmm5
8FE978 C6 CD, XOP_Vphaddwd_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm1 r=xmm5
# vphaddwd xmm2,[rax]
8FE978 C6 10, XOP_Vphaddwd_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Int16
# vphaddwq xmm1,xmm5
8FE978 C7 CD, XOP_Vphaddwq_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm1 r=xmm5
# vphaddwq xmm2,[rax]
8FE978 C7 10, XOP_Vphaddwq_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Int16
# vphadddq xmm1,xmm5
8FE978 CB CD, XOP_Vphadddq_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm1 r=xmm5
# vphadddq xmm2,[rax]
8FE978 CB 10, XOP_Vphadddq_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Int32
# vphaddubw xmm1,xmm5
8FE978 D1 CD, XOP_Vphaddubw_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm1 r=xmm5
# vphaddubw xmm2,[rax]
8FE978 D1 10, XOP_Vphaddubw_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt8
# vphaddubd xmm1,xmm5
8FE978 D2 CD, XOP_Vphaddubd_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm1 r=xmm5
# vphaddubd xmm2,[rax]
8FE978 D2 10, XOP_Vphaddubd_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt8
# vphaddubq xmm1,xmm5
8FE978 D3 CD, XOP_Vphaddubq_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm1 r=xmm5
# vphaddubq xmm2,[rax]
8FE978 D3 10, XOP_Vphaddubq_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt8
# vphadduwd xmm1,xmm5
8FE978 D6 CD, XOP_Vphadduwd_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm1 r=xmm5
# vphadduwd xmm2,[rax]
8FE978 D6 10, XOP_Vphadduwd_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt16
# vphadduwq xmm1,xmm5
8FE978 D7 CD, XOP_Vphadduwq_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm1 r=xmm5
# vphadduwq xmm2,[rax]
8FE978 D7 10, XOP_Vphadduwq_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt16
# vphaddudq xmm1,xmm5
8FE978 DB CD, XOP_Vphaddudq_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm1 r=xmm5
# vphaddudq xmm2,[rax]
8FE978 DB 10, XOP_Vphaddudq_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_UInt32
# vphsubbw xmm1,xmm5
8FE978 E1 CD, XOP_Vphsubbw_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm1 r=xmm5
# vphsubbw xmm2,[rax]
8FE978 E1 10, XOP_Vphsubbw_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Int8
# vphsubwd xmm1,xmm5
8FE978 E2 CD, XOP_Vphsubwd_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm1 r=xmm5
# vphsubwd xmm2,[rax]
8FE978 E2 10, XOP_Vphsubwd_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Int16
# vphsubdq xmm1,xmm5
8FE978 E3 CD, XOP_Vphsubdq_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm1 r=xmm5
# vphsubdq xmm2,[rax]
8FE978 E3 10, XOP_Vphsubdq_xmm_xmmm128, XOP, XOP, op0=w op1=r w=vmm2 r=rax rm=ds:rax;Packed128_Int32
# bextr edx,ebx,0A55A1234h
8FEA78 10 D3 34125AA5, XOP_Bextr_r32_rm32_imm32, XOP, TBM, fc=oc fw=z fu=sap op0=w op1=r op2=r w=rdx r=ebx
# bextr edx,[rax],34125AA5h
8FEA78 10 10 A55A1234, XOP_Bextr_r32_rm32_imm32, XOP, TBM, fc=oc fw=z fu=sap op0=w op1=r op2=r w=rdx r=rax rm=ds:rax;UInt32
# bextr rdx,rbx,0A55A1234h
8FEAF8 10 D3 34125AA5, XOP_Bextr_r64_rm64_imm32, XOP, TBM, fc=oc fw=z fu=sap op0=w op1=r op2=r w=rdx r=rbx
# bextr rdx,[rax],0A55A1234h
8FEAF8 10 10 34125AA5, XOP_Bextr_r64_rm64_imm32, XOP, TBM, fc=oc fw=z fu=sap op0=w op1=r op2=r w=rdx r=rax rm=ds:rax;UInt64
# lwpins esi,ebx,0A55A1234h
8FEA48 12 C3 34125AA5, XOP_Lwpins_r32_rm32_imm32, XOP, LWP, fw=c op0=r op1=r op2=r r=esi r=ebx
# lwpins esi,dword ptr [rax],0A55A1234h
8FEA48 12 00 34125AA5, XOP_Lwpins_r32_rm32_imm32, XOP, LWP, fw=c op0=r op1=r op2=r r=esi r=rax rm=ds:rax;UInt32
# lwpins rsi,ebx,0A55A1234h
8FEAC8 12 C3 34125AA5, XOP_Lwpins_r64_rm32_imm32, XOP, LWP, fw=c op0=r op1=r op2=r r=rsi r=ebx
# lwpins rsi,dword ptr [rax],0A55A1234h
8FEAC8 12 00 34125AA5, XOP_Lwpins_r64_rm32_imm32, XOP, LWP, fw=c op0=r op1=r op2=r r=rsi r=rax rm=ds:rax;UInt32
# lwpval esi,ebx,0A55A1234h
8FEA48 12 CB 34125AA5, XOP_Lwpval_r32_rm32_imm32, XOP, LWP, op0=r op1=cr op2=r r=esi cr=ebx
# lwpval esi,dword ptr [rax],0A55A1234h
8FEA48 12 08 34125AA5, XOP_Lwpval_r32_rm32_imm32, XOP, LWP, op0=r op1=cr op2=r r=esi r=rax crm=ds:rax;UInt32
# lwpval rsi,ebx,0A55A1234h
8FEAC8 12 CB 34125AA5, XOP_Lwpval_r64_rm32_imm32, XOP, LWP, op0=r op1=cr op2=r r=rsi cr=ebx
# lwpval rsi,dword ptr [rax],0A55A1234h
8FEAC8 12 08 34125AA5, XOP_Lwpval_r64_rm32_imm32, XOP, LWP, op0=r op1=cr op2=r r=rsi r=rax crm=ds:rax;UInt32
# pi2fw mm1,mm5
0F0F CD 0C, D3NOW_Pi2fw_mm_mmm64, D3NOW, D3NOWEXT, op0=w op1=r w=mm1 r=mm5
# pi2fw mm1,[rax-5AA5EDCCh]
0F0F 88 34125AA5 0C, D3NOW_Pi2fw_mm_mmm64, D3NOW, D3NOWEXT, op0=w op1=r w=mm1 r=rax rm=ds:rax+0xFFFFFFFFA55A1234;Packed64_Int16
# pi2fd mm1,mm5
0F0F CD 0D, D3NOW_Pi2fd_mm_mmm64, D3NOW, D3NOW, op0=w op1=r w=mm1 r=mm5
# pi2fd mm1,[rax-5AA5EDCCh]
0F0F 88 34125AA5 0D, D3NOW_Pi2fd_mm_mmm64, D3NOW, D3NOW, op0=w op1=r w=mm1 r=rax rm=ds:rax+0xFFFFFFFFA55A1234;Packed64_Int32
# pf2iw mm1,mm5
0F0F CD 1C, D3NOW_Pf2iw_mm_mmm64, D3NOW, D3NOWEXT, op0=w op1=r w=mm1 r=mm5
# pf2iw mm1,[rax-5AA5EDCCh]
0F0F 88 34125AA5 1C, D3NOW_Pf2iw_mm_mmm64, D3NOW, D3NOWEXT, op0=w op1=r w=mm1 r=rax rm=ds:rax+0xFFFFFFFFA55A1234;Packed64_Float32
# pf2id mm1,mm5
0F0F CD 1D, D3NOW_Pf2id_mm_mmm64, D3NOW, D3NOW, op0=w op1=r w=mm1 r=mm5
# pf2id mm1,[rax-5AA5EDCCh]
0F0F 88 34125AA5 1D, D3NOW_Pf2id_mm_mmm64, D3NOW, D3NOW, op0=w op1=r w=mm1 r=rax rm=ds:rax+0xFFFFFFFFA55A1234;Packed64_Float32
# pfnacc mm1,mm5
0F0F CD 8A, D3NOW_Pfnacc_mm_mmm64, D3NOW, D3NOWEXT, op0=rw op1=r rw=mm1 r=mm5
# pfnacc mm1,[rax-5AA5EDCCh]
0F0F 88 34125AA5 8A, D3NOW_Pfnacc_mm_mmm64, D3NOW, D3NOWEXT, op0=rw op1=r rw=mm1 r=rax rm=ds:rax+0xFFFFFFFFA55A1234;Packed64_Float32
# pfpnacc mm1,mm5
0F0F CD 8E, D3NOW_Pfpnacc_mm_mmm64, D3NOW, D3NOWEXT, op0=rw op1=r rw=mm1 r=mm5
# pfpnacc mm1,[rax-5AA5EDCCh]
0F0F 88 34125AA5 8E, D3NOW_Pfpnacc_mm_mmm64, D3NOW, D3NOWEXT, op0=rw op1=r rw=mm1 r=rax rm=ds:rax+0xFFFFFFFFA55A1234;Packed64_Float32
# pfcmpge mm1,mm5
0F0F CD 90, D3NOW_Pfcmpge_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=mm5
# pfcmpge mm1,[rax-5AA5EDCCh]
0F0F 88 34125AA5 90, D3NOW_Pfcmpge_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=rax rm=ds:rax+0xFFFFFFFFA55A1234;Packed64_Float32
# pfmin mm1,mm5
0F0F CD 94, D3NOW_Pfmin_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=mm5
# pfmin mm1,[rax-5AA5EDCCh]
0F0F 88 34125AA5 94, D3NOW_Pfmin_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=rax rm=ds:rax+0xFFFFFFFFA55A1234;Packed64_Float32
# pfrcp mm1,mm5
0F0F CD 96, D3NOW_Pfrcp_mm_mmm64, D3NOW, D3NOW, op0=w op1=r w=mm1 r=mm5
# pfrcp mm1,[rax-5AA5EDCCh]
0F0F 88 34125AA5 96, D3NOW_Pfrcp_mm_mmm64, D3NOW, D3NOW, op0=w op1=r w=mm1 r=rax rm=ds:rax+0xFFFFFFFFA55A1234;Packed64_Float32
# pfrsqrt mm1,mm5
0F0F CD 97, D3NOW_Pfrsqrt_mm_mmm64, D3NOW, D3NOW, op0=w op1=r w=mm1 r=mm5
# pfrsqrt mm1,[rax-5AA5EDCCh]
0F0F 88 34125AA5 97, D3NOW_Pfrsqrt_mm_mmm64, D3NOW, D3NOW, op0=w op1=r w=mm1 r=rax rm=ds:rax+0xFFFFFFFFA55A1234;Packed64_Float32
# pfsub mm1,mm5
0F0F CD 9A, D3NOW_Pfsub_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=mm5
# pfsub mm1,[rax-5AA5EDCCh]
0F0F 88 34125AA5 9A, D3NOW_Pfsub_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=rax rm=ds:rax+0xFFFFFFFFA55A1234;Packed64_Float32
# pfadd mm1,mm5
0F0F CD 9E, D3NOW_Pfadd_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=mm5
# pfadd mm1,[rax-5AA5EDCCh]
0F0F 88 34125AA5 9E, D3NOW_Pfadd_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=rax rm=ds:rax+0xFFFFFFFFA55A1234;Packed64_Float32
# pfcmpgt mm1,mm5
0F0F CD A0, D3NOW_Pfcmpgt_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=mm5
# pfcmpgt mm1,[rax-5AA5EDCCh]
0F0F 88 34125AA5 A0, D3NOW_Pfcmpgt_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=rax rm=ds:rax+0xFFFFFFFFA55A1234;Packed64_Float32
# pfmax mm1,mm5
0F0F CD A4, D3NOW_Pfmax_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=mm5
# pfmax mm1,[rax-5AA5EDCCh]
0F0F 88 34125AA5 A4, D3NOW_Pfmax_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=rax rm=ds:rax+0xFFFFFFFFA55A1234;Packed64_Float32
# pfrcpit1 mm1,mm5
0F0F CD A6, D3NOW_Pfrcpit1_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=mm5
# pfrcpit1 mm1,[rax-5AA5EDCCh]
0F0F 88 34125AA5 A6, D3NOW_Pfrcpit1_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=rax rm=ds:rax+0xFFFFFFFFA55A1234;Packed64_Float32
# pfrsqit1 mm1,mm5
0F0F CD A7, D3NOW_Pfrsqit1_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=mm5
# pfrsqit1 mm1,[rax-5AA5EDCCh]
0F0F 88 34125AA5 A7, D3NOW_Pfrsqit1_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=rax rm=ds:rax+0xFFFFFFFFA55A1234;Packed64_Float32
# pfsubr mm1,mm5
0F0F CD AA, D3NOW_Pfsubr_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=mm5
# pfsubr mm1,[rax-5AA5EDCCh]
0F0F 88 34125AA5 AA, D3NOW_Pfsubr_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=rax rm=ds:rax+0xFFFFFFFFA55A1234;Packed64_Float32
# pfacc mm1,mm5
0F0F CD AE, D3NOW_Pfacc_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=mm5
# pfacc mm1,[rax-5AA5EDCCh]
0F0F 88 34125AA5 AE, D3NOW_Pfacc_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=rax rm=ds:rax+0xFFFFFFFFA55A1234;Packed64_Float32
# pfcmpeq mm1,mm5
0F0F CD B0, D3NOW_Pfcmpeq_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=mm5
# pfcmpeq mm1,[rax-5AA5EDCCh]
0F0F 88 34125AA5 B0, D3NOW_Pfcmpeq_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=rax rm=ds:rax+0xFFFFFFFFA55A1234;Packed64_Float32
# pfmul mm1,mm5
0F0F CD B4, D3NOW_Pfmul_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=mm5
# pfmul mm1,[rax-5AA5EDCCh]
0F0F 88 34125AA5 B4, D3NOW_Pfmul_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=rax rm=ds:rax+0xFFFFFFFFA55A1234;Packed64_Float32
# pfrcpit2 mm1,mm5
0F0F CD B6, D3NOW_Pfrcpit2_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=mm5
# pfrcpit2 mm1,[rax-5AA5EDCCh]
0F0F 88 34125AA5 B6, D3NOW_Pfrcpit2_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=rax rm=ds:rax+0xFFFFFFFFA55A1234;Packed64_Float32
# pmulhrw mm1,mm5
0F0F CD B7, D3NOW_Pmulhrw_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=mm5
# pmulhrw mm1,[rax-5AA5EDCCh]
0F0F 88 34125AA5 B7, D3NOW_Pmulhrw_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=rax rm=ds:rax+0xFFFFFFFFA55A1234;Packed64_Int16
# pswapd mm1,mm5
0F0F CD BB, D3NOW_Pswapd_mm_mmm64, D3NOW, D3NOWEXT, op0=w op1=r w=mm1 r=mm5
# pswapd mm1,[rax-5AA5EDCCh]
0F0F 88 34125AA5 BB, D3NOW_Pswapd_mm_mmm64, D3NOW, D3NOWEXT, op0=w op1=r w=mm1 r=rax rm=ds:rax+0xFFFFFFFFA55A1234;Packed64_UInt32
# pavgusb mm1,mm5
0F0F CD BF, D3NOW_Pavgusb_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=mm5
# pavgusb mm1,[rax-5AA5EDCCh]
0F0F 88 34125AA5 BF, D3NOW_Pavgusb_mm_mmm64, D3NOW, D3NOW, op0=rw op1=r rw=mm1 r=rax rm=ds:rax+0xFFFFFFFFA55A1234;Packed64_UInt8
# add [rax],bh
26 00 38, Add_rm8_r8, Legacy, INTEL8086, fw=oszacp op0=rw op1=r r=rax r=bh rwm=es:rax;UInt8
# add [rax],bh
2E 00 38, Add_rm8_r8, Legacy, INTEL8086, fw=oszacp op0=rw op1=r r=rax r=bh rwm=cs:rax;UInt8
# add [rax],bh
36 00 38, Add_rm8_r8, Legacy, INTEL8086, fw=oszacp op0=rw op1=r r=rax r=bh rwm=ss:rax;UInt8
# add [rax],bh
3E 00 38, Add_rm8_r8, Legacy, INTEL8086, fw=oszacp op0=rw op1=r r=rax r=bh rwm=ds:rax;UInt8
# add fs:[rax],bh
64 00 38, Add_rm8_r8, Legacy, INTEL8086, fw=oszacp op0=rw op1=r r=fs r=rax r=bh rwm=fs:rax;UInt8
# add gs:[rax],bh
65 00 38, Add_rm8_r8, Legacy, INTEL8086, fw=oszacp op0=rw op1=r r=gs r=rax r=bh rwm=gs:rax;UInt8
# fstenv fpuenv14 ptr [rax]
9B 66 D9 30, Fstenv_m14byte, Legacy, FPU, fr=0123 fu=0123 op0=w r=rax wm=ds:rax;FpuEnv14 special
# fstenv [rax]
9B D9 30, Fstenv_m28byte, Legacy, FPU387, fr=0123 fu=0123 op0=w r=rax wm=ds:rax;FpuEnv28 special
# fstcw [rax]
9B D9 38, Fstcw_m2byte, Legacy, FPU, fu=0123 op0=w r=rax wm=ds:rax;UInt16 special
# fstp st(3)
D9 DB, Fstpnce_sti, Legacy, FPU, fw=1 fu=023 op0=w w=st3 r=st0 fpu-inc=1
# fneni
DB E0, Fneni, Legacy, FPU,
# feni
9B DB E0, Feni, Legacy, FPU, special
# fndisi
DB E1, Fndisi, Legacy, FPU,
# fdisi
9B DB E1, Fdisi, Legacy, FPU, special
# fclex
9B DB E2, Fclex, Legacy, FPU, fu=0123 special
# finit
9B DB E3, Finit, Legacy, FPU, fpu-writes-top fc=0123 special
# fnsetpm
DB E4, Fnsetpm, Legacy, FPU287,
# fsetpm
9B DB E4, Fsetpm, Legacy, FPU287, special
# fcom st(3)
DC D3, Fcom_st0_sti_DCD0, Legacy, FPU, fc=1 fw=023 op0=r op1=r r=st0 r=st3
# fcomp st(3)
DC DB, Fcomp_st0_sti_DCD8, Legacy, FPU, fc=1 fw=023 op0=r op1=r r=st0 r=st3 fpu-inc=1
# fsave fpustate94 ptr [rax]
9B 66 DD 30, Fsave_m94byte, Legacy, FPU, fpu-writes-top fr=0123 fc=0123 op0=w r=rax r=st0-st7;mm0-mm7 wm=ds:rax;FpuState94 special
# fsave [rax]
9B DD 30, Fsave_m108byte, Legacy, FPU387, fpu-writes-top fr=0123 fc=0123 op0=w r=rax r=st0-st7;mm0-mm7 wm=ds:rax;FpuState108 special
# fstsw [rax]
9B DD 38, Fstsw_m2byte, Legacy, FPU, fr=0123 fu=0123 op0=w r=rax wm=ds:rax;UInt16 special
# fxch st(3)
DD CB, Fxch_st0_sti_DDC8, Legacy, FPU, fc=1 fu=023 op0=rw op1=rw rw=st0 rw=st3
# fcomp st(3)
DE D3, Fcomp_st0_sti_DED0, Legacy, FPU, fc=1 fw=023 op0=r op1=r r=st0 r=st3 fpu-inc=1
# ffreep st(3)
DF C3, Ffreep_sti, Legacy, FPU, fu=0123 op0=n fpu-inc=1
# fxch st(3)
DF CB, Fxch_st0_sti_DFC8, Legacy, FPU, fc=1 fu=023 op0=rw op1=rw rw=st0 rw=st3
# fstp st(3)
DF D3, Fstp_sti_DFD0, Legacy, FPU, fw=1 fu=023 op0=w w=st3 r=st0 fpu-inc=1
# fstp st(3)
DF DB, Fstp_sti_DFD8, Legacy, FPU, fw=1 fu=023 op0=w w=st3 r=st0 fpu-inc=1
# fstsw ax
9B DF E0, Fstsw_AX, Legacy, FPU287, fr=0123 fu=0123 op0=w w=ax special
# test dh,0A5h
F6 CE A5, Test_rm8_imm8_F6r1, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=r op1=r r=dh
# test byte ptr [rax],0A5h
F6 08 A5, Test_rm8_imm8_F6r1, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=r op1=r r=rax rm=ds:rax;UInt8
# test si,5AA5h
66 F7 CE A55A, Test_rm16_imm16_F7r1, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=r op1=r r=si
# test word ptr [rax],5AA5h
66 F7 08 A55A, Test_rm16_imm16_F7r1, Legacy, INTEL8086, fc=oc fw=szp fu=a op0=r op1=r r=rax rm=ds:rax;UInt16
# test esi,0AB895AA5h
F7 CE A55A89AB, Test_rm32_imm32_F7r1, Legacy, INTEL386, fc=oc fw=szp fu=a op0=r op1=r r=esi
# test dword ptr [rax],0AB895AA5h
F7 08 A55A89AB, Test_rm32_imm32_F7r1, Legacy, INTEL386, fc=oc fw=szp fu=a op0=r op1=r r=rax rm=ds:rax;UInt32
# test rsi,0FFFFFFFFAB895AA5h
48 F7 CE A55A89AB, Test_rm64_imm32_F7r1, Legacy, X64, fc=oc fw=szp fu=a op0=r op1=r r=rsi
# test qword ptr [rax],0FFFFFFFFAB895AA5h
48 F7 08 A55A89AB, Test_rm64_imm32_F7r1, Legacy, X64, fc=oc fw=szp fu=a op0=r op1=r r=rax rm=ds:rax;UInt64
# rstorssp qword ptr [rax]
F3 0F01 28, Rstorssp_m64, Legacy, CET_SS, fw=c fc=aopsz op0=rw r=rax rwm=ds:rax;UInt64
# pconfig
0F01 C5, Pconfig, Legacy, PCONFIG, priv fw=z fc=acops r=eax w=rax cr=rcx;rdx;rbx
# pconfig
67 64 48 0F01 C5, Pconfig, Legacy, PCONFIG, priv fw=z fc=acops r=eax w=rax cr=rcx;rdx;rbx
# setssbsy
F3 0F01 E8, Setssbsy, Legacy, CET_SS, priv
# saveprevssp
F3 0F01 EA, Saveprevssp, Legacy, CET_SS, fr=c
# wbnoinvd
F3 0F09, Wbnoinvd, Legacy, WBNOINVD, priv
# nop si,cx
66 0F0D CE, Reservednop_rm16_r16_0F0D, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],bx
66 0F0D 18, Reservednop_rm16_r16_0F0D, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop esi,ecx
0F0D CE, Reservednop_rm32_r32_0F0D, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],ebx
0F0D 18, Reservednop_rm32_r32_0F0D, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop rsi,rcx
48 0F0D CE, Reservednop_rm64_r64_0F0D, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],rbx
48 0F0D 18, Reservednop_rm64_r64_0F0D, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop si,cx
66 0F18 CE, Reservednop_rm16_r16_0F18, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],bx
66 0F18 18, Reservednop_rm16_r16_0F18, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop esi,ecx
0F18 CE, Reservednop_rm32_r32_0F18, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],ebx
0F18 18, Reservednop_rm32_r32_0F18, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop rsi,rcx
48 0F18 CE, Reservednop_rm64_r64_0F18, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],rbx
48 0F18 18, Reservednop_rm64_r64_0F18, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop si,cx
66 0F19 CE, Reservednop_rm16_r16_0F19, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],bx
66 0F19 18, Reservednop_rm16_r16_0F19, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop esi,ecx
0F19 CE, Reservednop_rm32_r32_0F19, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],ebx
0F19 18, Reservednop_rm32_r32_0F19, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop rsi,rcx
48 0F19 CE, Reservednop_rm64_r64_0F19, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],rbx
48 0F19 18, Reservednop_rm64_r64_0F19, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop si,cx
66 0F1A CE, Reservednop_rm16_r16_0F1A, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],bx
66 0F1A 18, Reservednop_rm16_r16_0F1A, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop esi,ecx
0F1A CE, Reservednop_rm32_r32_0F1A, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],ebx
0F1A 18, Reservednop_rm32_r32_0F1A, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop rsi,rcx
48 0F1A CE, Reservednop_rm64_r64_0F1A, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],rbx
48 0F1A 18, Reservednop_rm64_r64_0F1A, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop si,cx
66 0F1B CE, Reservednop_rm16_r16_0F1B, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],bx
66 0F1B 18, Reservednop_rm16_r16_0F1B, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop esi,ecx
0F1B CE, Reservednop_rm32_r32_0F1B, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],ebx
0F1B 18, Reservednop_rm32_r32_0F1B, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop rsi,rcx
48 0F1B CE, Reservednop_rm64_r64_0F1B, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],rbx
48 0F1B 18, Reservednop_rm64_r64_0F1B, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop si,cx
66 0F1C CE, Reservednop_rm16_r16_0F1C, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],bx
66 0F1C 18, Reservednop_rm16_r16_0F1C, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop esi,ecx
0F1C CE, Reservednop_rm32_r32_0F1C, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],ebx
0F1C 18, Reservednop_rm32_r32_0F1C, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop rsi,rcx
48 0F1C CE, Reservednop_rm64_r64_0F1C, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],rbx
48 0F1C 18, Reservednop_rm64_r64_0F1C, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop si,cx
66 0F1D CE, Reservednop_rm16_r16_0F1D, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],bx
66 0F1D 18, Reservednop_rm16_r16_0F1D, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop esi,ecx
0F1D CE, Reservednop_rm32_r32_0F1D, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],ebx
0F1D 18, Reservednop_rm32_r32_0F1D, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop rsi,rcx
48 0F1D CE, Reservednop_rm64_r64_0F1D, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],rbx
48 0F1D 18, Reservednop_rm64_r64_0F1D, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop si,cx
66 0F1E CE, Reservednop_rm16_r16_0F1E, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],bx
66 0F1E 18, Reservednop_rm16_r16_0F1E, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop esi,ecx
0F1E CE, Reservednop_rm32_r32_0F1E, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],ebx
0F1E 18, Reservednop_rm32_r32_0F1E, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop rsi,rcx
48 0F1E CE, Reservednop_rm64_r64_0F1E, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],rbx
48 0F1E 18, Reservednop_rm64_r64_0F1E, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop si,cx
66 0F1F CE, Reservednop_rm16_r16_0F1F, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],bx
66 0F1F 18, Reservednop_rm16_r16_0F1F, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop esi,ecx
0F1F CE, Reservednop_rm32_r32_0F1F, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],ebx
0F1F 18, Reservednop_rm32_r32_0F1F, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop rsi,rcx
48 0F1F CE, Reservednop_rm64_r64_0F1F, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# nop [rax],rbx
48 0F1F 18, Reservednop_rm64_r64_0F1F, Legacy, MULTIBYTENOP, decopt=ForceReservedNop op0=n op1=n
# cldemote byte ptr [rax]
0F1C 00, Cldemote_m8, Legacy, CLDEMOTE, op0=nma r=rax
# rdsspd ecx
F3 0F1E C9, Rdsspd_r32, Legacy, CET_SS, op0=w w=rcx
# rdsspq rcx
F3 48 0F1E C9, Rdsspq_r64, Legacy, CET_SS, op0=w w=rcx
# endbr64
F3 0F1E FA, Endbr64, Legacy, CET_IBT,
# endbr32
F3 0F1E FB, Endbr32, Legacy, CET_IBT,
# incsspd ebx
F3 0FAE EB, Incsspd_r32, Legacy, CET_SS, op0=r r=bl
# incsspd esp
F3 0FAE EC, Incsspd_r32, Legacy, CET_SS, op0=r r=spl
# incsspd r15d
F3 41 0FAE EF, Incsspd_r32, Legacy, CET_SS, op0=r r=r15l
# incsspq rbx
F3 48 0FAE EB, Incsspq_r64, Legacy, CET_SS, op0=r r=bl
# incsspq rsp
F3 48 0FAE EC, Incsspq_r64, Legacy, CET_SS, op0=r r=spl
# incsspq r15
F3 49 0FAE EF, Incsspq_r64, Legacy, CET_SS, op0=r r=r15l
# tpause ebp
66 0FAE F5, Tpause_r32, Legacy, WAITPKG, fw=c fc=aopsz op0=r r=ebp r=eax;edx
# tpause ebp
66 48 0FAE F5, Tpause_r64, Legacy, WAITPKG, fw=c fc=aopsz op0=r r=ebp r=eax;edx
# clrssbsy qword ptr [rax]
F3 0FAE 30, Clrssbsy_m64, Legacy, CET_SS, priv fw=c fc=aopsz op0=rw r=rax rwm=ds:rax;UInt64
# umonitor ebp
67 F3 0FAE F5, Umonitor_r32, Legacy, WAITPKG, op0=r r=ebp rm=ds:ebp;UInt8
# umonitor rbp
F3 0FAE F5, Umonitor_r64, Legacy, WAITPKG, op0=r r=rbp rm=ds:rbp;UInt8
# fs umonitor ebp
64 67 F3 0FAE F5, Umonitor_r32, Legacy, WAITPKG, op0=r r=ebp r=fs rm=fs:ebp;UInt8
# fs umonitor rbp
64 F3 0FAE F5, Umonitor_r64, Legacy, WAITPKG, op0=r r=rbp r=fs rm=fs:rbp;UInt8
# umwait ebp
F2 0FAE F5, Umwait_r32, Legacy, WAITPKG, fw=c fc=aopsz op0=r r=ebp r=eax;edx
# umwait ebp
F2 48 0FAE F5, Umwait_r64, Legacy, WAITPKG, fw=c fc=aopsz op0=r r=ebp r=eax;edx
# pcommit
66 0FAE F8, Pcommit, Legacy, PCOMMIT, decopt=Pcommit
# vpdpbusd xmm2,xmm6,[rax+10h]
62 F24D08 50 50 01, EVEX_Vpdpbusd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_VNNI, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int8
# vpdpbusd xmm2{k3},xmm6,[rax+10h]
62 F24D0B 50 50 01, EVEX_Vpdpbusd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_VNNI, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int8 r=k3
# vpdpbusd xmm2{k5}{z},xmm6,dword bcst [rax+4]
62 F24D9D 50 50 01, EVEX_Vpdpbusd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_VNNI, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x4;Broadcast128_UInt32 r=k5
# vpdpbusd ymm2,ymm6,[rax+20h]
62 F24D28 50 50 01, EVEX_Vpdpbusd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_VNNI, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int8
# vpdpbusd ymm2{k3},ymm6,[rax+20h]
62 F24D2B 50 50 01, EVEX_Vpdpbusd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_VNNI, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int8 r=k3
# vpdpbusd ymm2{k5}{z},ymm6,dword bcst [rax+4]
62 F24DBD 50 50 01, EVEX_Vpdpbusd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_VNNI, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x4;Broadcast256_UInt32 r=k5
# vpdpbusd zmm2,zmm6,[rax+40h]
62 F24D48 50 50 01, EVEX_Vpdpbusd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512_VNNI, op0=rw op1=r op2=r r=zmm2 w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int8
# vpdpbusd zmm2{k3},zmm6,[rax+40h]
62 F24D4B 50 50 01, EVEX_Vpdpbusd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512_VNNI, op0=rcw op1=r op2=r r=zmm2 cw=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int8 r=k3
# vpdpbusd zmm2{k5}{z},zmm6,dword bcst [rax+4]
62 F24DDD 50 50 01, EVEX_Vpdpbusd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512_VNNI, op0=rw op1=r op2=r r=zmm2 w=vmm2 r=zmm6 r=rax rm=ds:rax+0x4;Broadcast512_UInt32 r=k5
# vpdpbusds xmm2,xmm6,[rax+10h]
62 F24D08 51 50 01, EVEX_Vpdpbusds_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_VNNI, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int8
# vpdpbusds xmm2{k3},xmm6,[rax+10h]
62 F24D0B 51 50 01, EVEX_Vpdpbusds_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_VNNI, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int8 r=k3
# vpdpbusds xmm2{k5}{z},xmm6,dword bcst [rax+4]
62 F24D9D 51 50 01, EVEX_Vpdpbusds_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_VNNI, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x4;Broadcast128_UInt32 r=k5
# vpdpbusds ymm2,ymm6,[rax+20h]
62 F24D28 51 50 01, EVEX_Vpdpbusds_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_VNNI, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int8
# vpdpbusds ymm2{k3},ymm6,[rax+20h]
62 F24D2B 51 50 01, EVEX_Vpdpbusds_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_VNNI, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int8 r=k3
# vpdpbusds ymm2{k5}{z},ymm6,dword bcst [rax+4]
62 F24DBD 51 50 01, EVEX_Vpdpbusds_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_VNNI, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x4;Broadcast256_UInt32 r=k5
# vpdpbusds zmm2,zmm6,[rax+40h]
62 F24D48 51 50 01, EVEX_Vpdpbusds_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512_VNNI, op0=rw op1=r op2=r r=zmm2 w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int8
# vpdpbusds zmm2{k3},zmm6,[rax+40h]
62 F24D4B 51 50 01, EVEX_Vpdpbusds_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512_VNNI, op0=rcw op1=r op2=r r=zmm2 cw=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int8 r=k3
# vpdpbusds zmm2{k5}{z},zmm6,dword bcst [rax+4]
62 F24DDD 51 50 01, EVEX_Vpdpbusds_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512_VNNI, op0=rw op1=r op2=r r=zmm2 w=vmm2 r=zmm6 r=rax rm=ds:rax+0x4;Broadcast512_UInt32 r=k5
# vpdpwssd xmm2,xmm6,[rax+10h]
62 F24D08 52 50 01, EVEX_Vpdpwssd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_VNNI, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int16
# vpdpwssd xmm2{k3},xmm6,[rax+10h]
62 F24D0B 52 50 01, EVEX_Vpdpwssd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_VNNI, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int16 r=k3
# vpdpwssd xmm2{k5}{z},xmm6,dword bcst [rax+4]
62 F24D9D 52 50 01, EVEX_Vpdpwssd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_VNNI, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x4;Broadcast128_2xInt16 r=k5
# vpdpwssd ymm2,ymm6,[rax+20h]
62 F24D28 52 50 01, EVEX_Vpdpwssd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_VNNI, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int16
# vpdpwssd ymm2{k3},ymm6,[rax+20h]
62 F24D2B 52 50 01, EVEX_Vpdpwssd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_VNNI, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int16 r=k3
# vpdpwssd ymm2{k5}{z},ymm6,dword bcst [rax+4]
62 F24DBD 52 50 01, EVEX_Vpdpwssd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_VNNI, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x4;Broadcast256_2xInt16 r=k5
# vpdpwssd zmm2,zmm6,[rax+40h]
62 F24D48 52 50 01, EVEX_Vpdpwssd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512_VNNI, op0=rw op1=r op2=r r=zmm2 w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int16
# vpdpwssd zmm2{k3},zmm6,[rax+40h]
62 F24D4B 52 50 01, EVEX_Vpdpwssd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512_VNNI, op0=rcw op1=r op2=r r=zmm2 cw=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int16 r=k3
# vpdpwssd zmm2{k5}{z},zmm6,dword bcst [rax+4]
62 F24DDD 52 50 01, EVEX_Vpdpwssd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512_VNNI, op0=rw op1=r op2=r r=zmm2 w=vmm2 r=zmm6 r=rax rm=ds:rax+0x4;Broadcast512_2xInt16 r=k5
# vpdpwssds xmm2,xmm6,[rax+10h]
62 F24D08 53 50 01, EVEX_Vpdpwssds_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_VNNI, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int16
# vpdpwssds xmm2{k3},xmm6,[rax+10h]
62 F24D0B 53 50 01, EVEX_Vpdpwssds_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_VNNI, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Int16 r=k3
# vpdpwssds xmm2{k5}{z},xmm6,dword bcst [rax+4]
62 F24D9D 53 50 01, EVEX_Vpdpwssds_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_VNNI, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x4;Broadcast128_2xInt16 r=k5
# vpdpwssds ymm2,ymm6,[rax+20h]
62 F24D28 53 50 01, EVEX_Vpdpwssds_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_VNNI, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int16
# vpdpwssds ymm2{k3},ymm6,[rax+20h]
62 F24D2B 53 50 01, EVEX_Vpdpwssds_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_VNNI, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Int16 r=k3
# vpdpwssds ymm2{k5}{z},ymm6,dword bcst [rax+4]
62 F24DBD 53 50 01, EVEX_Vpdpwssds_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_VNNI, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x4;Broadcast256_2xInt16 r=k5
# vpdpwssds zmm2,zmm6,[rax+40h]
62 F24D48 53 50 01, EVEX_Vpdpwssds_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512_VNNI, op0=rw op1=r op2=r r=zmm2 w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int16
# vpdpwssds zmm2{k3},zmm6,[rax+40h]
62 F24D4B 53 50 01, EVEX_Vpdpwssds_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512_VNNI, op0=rcw op1=r op2=r r=zmm2 cw=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Int16 r=k3
# vpdpwssds zmm2{k5}{z},zmm6,dword bcst [rax+4]
62 F24DDD 53 50 01, EVEX_Vpdpwssds_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512_VNNI, op0=rw op1=r op2=r r=zmm2 w=vmm2 r=zmm6 r=rax rm=ds:rax+0x4;Broadcast512_2xInt16 r=k5
# vpopcntb xmm2,xmm3
62 F27D08 54 D3, EVEX_Vpopcntb_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512_BITALG, op0=w op1=r w=vmm2 r=xmm3
# vpopcntb xmm2,[rax+10h]
62 F27D08 54 50 01, EVEX_Vpopcntb_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512_BITALG, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vpopcntb xmm2{k3},xmm3
62 F27D0B 54 D3, EVEX_Vpopcntb_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512_BITALG, op0=rw op1=r r=xmm2 w=vmm2 r=xmm3 r=k3
# vpopcntb xmm2{k3}{z},[rax+10h]
62 F27D8B 54 50 01, EVEX_Vpopcntb_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512_BITALG, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt8 r=k3
# vpopcntb ymm2,ymm3
62 F27D28 54 D3, EVEX_Vpopcntb_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512_BITALG, op0=w op1=r w=vmm2 r=ymm3
# vpopcntb ymm2,[rax+20h]
62 F27D28 54 50 01, EVEX_Vpopcntb_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512_BITALG, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vpopcntb ymm2{k3},ymm3
62 F27D2B 54 D3, EVEX_Vpopcntb_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512_BITALG, op0=rw op1=r r=ymm2 w=vmm2 r=ymm3 r=k3
# vpopcntb ymm2{k3}{z},[rax+20h]
62 F27DAB 54 50 01, EVEX_Vpopcntb_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512_BITALG, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt8 r=k3
# vpopcntb zmm2,zmm3
62 F27D48 54 D3, EVEX_Vpopcntb_zmm_k1z_zmmm512, EVEX, AVX512_BITALG, op0=w op1=r w=vmm2 r=zmm3
# vpopcntb zmm2,[rax+40h]
62 F27D48 54 50 01, EVEX_Vpopcntb_zmm_k1z_zmmm512, EVEX, AVX512_BITALG, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vpopcntb zmm2{k3},zmm3
62 F27D4B 54 D3, EVEX_Vpopcntb_zmm_k1z_zmmm512, EVEX, AVX512_BITALG, op0=rcw op1=r r=zmm2 cw=vmm2 r=zmm3 r=k3
# vpopcntb zmm2{k3}{z},[rax+40h]
62 F27DCB 54 50 01, EVEX_Vpopcntb_zmm_k1z_zmmm512, EVEX, AVX512_BITALG, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_UInt8 r=k3
# vpopcntw xmm2,xmm3
62 F2FD08 54 D3, EVEX_Vpopcntw_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512_BITALG, op0=w op1=r w=vmm2 r=xmm3
# vpopcntw xmm2,[rax+10h]
62 F2FD08 54 50 01, EVEX_Vpopcntw_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512_BITALG, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpopcntw xmm2{k3},xmm3
62 F2FD0B 54 D3, EVEX_Vpopcntw_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512_BITALG, op0=rw op1=r r=xmm2 w=vmm2 r=xmm3 r=k3
# vpopcntw xmm2{k3}{z},[rax+10h]
62 F2FD8B 54 50 01, EVEX_Vpopcntw_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512_BITALG, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt16 r=k3
# vpopcntw ymm2,ymm3
62 F2FD28 54 D3, EVEX_Vpopcntw_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512_BITALG, op0=w op1=r w=vmm2 r=ymm3
# vpopcntw ymm2,[rax+20h]
62 F2FD28 54 50 01, EVEX_Vpopcntw_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512_BITALG, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpopcntw ymm2{k3},ymm3
62 F2FD2B 54 D3, EVEX_Vpopcntw_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512_BITALG, op0=rw op1=r r=ymm2 w=vmm2 r=ymm3 r=k3
# vpopcntw ymm2{k3}{z},[rax+20h]
62 F2FDAB 54 50 01, EVEX_Vpopcntw_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512_BITALG, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt16 r=k3
# vpopcntw zmm2,zmm3
62 F2FD48 54 D3, EVEX_Vpopcntw_zmm_k1z_zmmm512, EVEX, AVX512_BITALG, op0=w op1=r w=vmm2 r=zmm3
# vpopcntw zmm2,[rax+40h]
62 F2FD48 54 50 01, EVEX_Vpopcntw_zmm_k1z_zmmm512, EVEX, AVX512_BITALG, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpopcntw zmm2{k3},zmm3
62 F2FD4B 54 D3, EVEX_Vpopcntw_zmm_k1z_zmmm512, EVEX, AVX512_BITALG, op0=rcw op1=r r=zmm2 cw=vmm2 r=zmm3 r=k3
# vpopcntw zmm2{k3}{z},[rax+40h]
62 F2FDCB 54 50 01, EVEX_Vpopcntw_zmm_k1z_zmmm512, EVEX, AVX512_BITALG, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_UInt16 r=k3
# vpopcntd xmm2,[rax+10h]
62 F27D08 55 50 01, EVEX_Vpopcntd_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512_VPOPCNTDQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpopcntd xmm2{k3},[rax+10h]
62 F27D0B 55 50 01, EVEX_Vpopcntd_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512_VPOPCNTDQ, op0=rw op1=r r=xmm2 w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt32 r=k3
# vpopcntd xmm2{k5}{z},dword bcst [rax+4]
62 F27D9D 55 50 01, EVEX_Vpopcntd_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512_VPOPCNTDQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x4;Broadcast128_UInt32 r=k5
# vpopcntd ymm2,[rax+20h]
62 F27D28 55 50 01, EVEX_Vpopcntd_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512_VPOPCNTDQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpopcntd ymm2{k3},[rax+20h]
62 F27D2B 55 50 01, EVEX_Vpopcntd_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512_VPOPCNTDQ, op0=rw op1=r r=ymm2 w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt32 r=k3
# vpopcntd ymm2{k5}{z},dword bcst [rax+4]
62 F27DBD 55 50 01, EVEX_Vpopcntd_ymm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512_VPOPCNTDQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x4;Broadcast256_UInt32 r=k5
# vpopcntd zmm2,[rax+40h]
62 F27D48 55 50 01, EVEX_Vpopcntd_zmm_k1z_zmmm512b32, EVEX, AVX512_VPOPCNTDQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpopcntd zmm2{k3},[rax+40h]
62 F27D4B 55 50 01, EVEX_Vpopcntd_zmm_k1z_zmmm512b32, EVEX, AVX512_VPOPCNTDQ, op0=rcw op1=r r=zmm2 cw=vmm2 r=rax rm=ds:rax+0x40;Packed512_UInt32 r=k3
# vpopcntd zmm2{k5}{z},dword bcst [rax+4]
62 F27DDD 55 50 01, EVEX_Vpopcntd_zmm_k1z_zmmm512b32, EVEX, AVX512_VPOPCNTDQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x4;Broadcast512_UInt32 r=k5
# vpopcntq xmm2,[rax+10h]
62 F2FD08 55 50 01, EVEX_Vpopcntq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512_VPOPCNTDQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpopcntq xmm2{k3},[rax+10h]
62 F2FD0B 55 50 01, EVEX_Vpopcntq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512_VPOPCNTDQ, op0=rw op1=r r=xmm2 w=vmm2 r=rax rm=ds:rax+0x10;Packed128_UInt64 r=k3
# vpopcntq xmm2{k5}{z},qword bcst [rax+8]
62 F2FD9D 55 50 01, EVEX_Vpopcntq_xmm_k1z_xmmm128b64, EVEX, AVX512VL;AVX512_VPOPCNTDQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x8;Broadcast128_UInt64 r=k5
# vpopcntq ymm2,[rax+20h]
62 F2FD28 55 50 01, EVEX_Vpopcntq_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512_VPOPCNTDQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpopcntq ymm2{k3},[rax+20h]
62 F2FD2B 55 50 01, EVEX_Vpopcntq_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512_VPOPCNTDQ, op0=rw op1=r r=ymm2 w=vmm2 r=rax rm=ds:rax+0x20;Packed256_UInt64 r=k3
# vpopcntq ymm2{k5}{z},qword bcst [rax+8]
62 F2FDBD 55 50 01, EVEX_Vpopcntq_ymm_k1z_ymmm256b64, EVEX, AVX512VL;AVX512_VPOPCNTDQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x8;Broadcast256_UInt64 r=k5
# vpopcntq zmm2,[rax+40h]
62 F2FD48 55 50 01, EVEX_Vpopcntq_zmm_k1z_zmmm512b64, EVEX, AVX512_VPOPCNTDQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpopcntq zmm2{k3},[rax+40h]
62 F2FD4B 55 50 01, EVEX_Vpopcntq_zmm_k1z_zmmm512b64, EVEX, AVX512_VPOPCNTDQ, op0=rcw op1=r r=zmm2 cw=vmm2 r=rax rm=ds:rax+0x40;Packed512_UInt64 r=k3
# vpopcntq zmm2{k5}{z},qword bcst [rax+8]
62 F2FDDD 55 50 01, EVEX_Vpopcntq_zmm_k1z_zmmm512b64, EVEX, AVX512_VPOPCNTDQ, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x8;Broadcast512_UInt64 r=k5
# vpexpandb xmm2,xmm3
62 F27D08 62 D3, EVEX_Vpexpandb_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r w=vmm2 r=xmm3
# vpexpandb xmm2,[rax+1]
62 F27D08 62 50 01, EVEX_Vpexpandb_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x1;Packed128_UInt8
# vpexpandb xmm2{k3},xmm3
62 F27D0B 62 D3, EVEX_Vpexpandb_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r r=xmm2 w=vmm2 r=xmm3 r=k3
# vpexpandb xmm2{k3}{z},[rax+1]
62 F27D8B 62 50 01, EVEX_Vpexpandb_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x1;Packed128_UInt8 r=k3
# vpexpandb ymm2,ymm3
62 F27D28 62 D3, EVEX_Vpexpandb_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r w=vmm2 r=ymm3
# vpexpandb ymm2,[rax+1]
62 F27D28 62 50 01, EVEX_Vpexpandb_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x1;Packed256_UInt8
# vpexpandb ymm2{k3},ymm3
62 F27D2B 62 D3, EVEX_Vpexpandb_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r r=ymm2 w=vmm2 r=ymm3 r=k3
# vpexpandb ymm2{k3}{z},[rax+1]
62 F27DAB 62 50 01, EVEX_Vpexpandb_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x1;Packed256_UInt8 r=k3
# vpexpandb zmm2,zmm3
62 F27D48 62 D3, EVEX_Vpexpandb_zmm_k1z_zmmm512, EVEX, AVX512_VBMI2, op0=w op1=r w=vmm2 r=zmm3
# vpexpandb zmm2,[rax+1]
62 F27D48 62 50 01, EVEX_Vpexpandb_zmm_k1z_zmmm512, EVEX, AVX512_VBMI2, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x1;Packed512_UInt8
# vpexpandb zmm2{k3},zmm3
62 F27D4B 62 D3, EVEX_Vpexpandb_zmm_k1z_zmmm512, EVEX, AVX512_VBMI2, op0=rcw op1=r r=zmm2 cw=vmm2 r=zmm3 r=k3
# vpexpandb zmm2{k3}{z},[rax+1]
62 F27DCB 62 50 01, EVEX_Vpexpandb_zmm_k1z_zmmm512, EVEX, AVX512_VBMI2, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x1;Packed512_UInt8 r=k3
# vpexpandw xmm2,xmm3
62 F2FD08 62 D3, EVEX_Vpexpandw_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r w=vmm2 r=xmm3
# vpexpandw xmm2,[rax+2]
62 F2FD08 62 50 01, EVEX_Vpexpandw_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x2;Packed128_UInt16
# vpexpandw xmm2{k3},xmm3
62 F2FD0B 62 D3, EVEX_Vpexpandw_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r r=xmm2 w=vmm2 r=xmm3 r=k3
# vpexpandw xmm2{k3}{z},[rax+2]
62 F2FD8B 62 50 01, EVEX_Vpexpandw_xmm_k1z_xmmm128, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x2;Packed128_UInt16 r=k3
# vpexpandw ymm2,ymm3
62 F2FD28 62 D3, EVEX_Vpexpandw_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r w=vmm2 r=ymm3
# vpexpandw ymm2,[rax+2]
62 F2FD28 62 50 01, EVEX_Vpexpandw_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x2;Packed256_UInt16
# vpexpandw ymm2{k3},ymm3
62 F2FD2B 62 D3, EVEX_Vpexpandw_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r r=ymm2 w=vmm2 r=ymm3 r=k3
# vpexpandw ymm2{k3}{z},[rax+2]
62 F2FDAB 62 50 01, EVEX_Vpexpandw_ymm_k1z_ymmm256, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x2;Packed256_UInt16 r=k3
# vpexpandw zmm2,zmm3
62 F2FD48 62 D3, EVEX_Vpexpandw_zmm_k1z_zmmm512, EVEX, AVX512_VBMI2, op0=w op1=r w=vmm2 r=zmm3
# vpexpandw zmm2,[rax+2]
62 F2FD48 62 50 01, EVEX_Vpexpandw_zmm_k1z_zmmm512, EVEX, AVX512_VBMI2, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x2;Packed512_UInt16
# vpexpandw zmm2{k3},zmm3
62 F2FD4B 62 D3, EVEX_Vpexpandw_zmm_k1z_zmmm512, EVEX, AVX512_VBMI2, op0=rcw op1=r r=zmm2 cw=vmm2 r=zmm3 r=k3
# vpexpandw zmm2{k3}{z},[rax+2]
62 F2FDCB 62 50 01, EVEX_Vpexpandw_zmm_k1z_zmmm512, EVEX, AVX512_VBMI2, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x2;Packed512_UInt16 r=k3
# vpcompressb xmm3,xmm2
62 F27D08 63 D3, EVEX_Vpcompressb_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r w=vmm3 r=xmm2
# vpcompressb [rax+1],xmm2
62 F27D08 63 50 01, EVEX_Vpcompressb_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r r=rax wm=ds:rax+0x1;Packed128_UInt8 r=xmm2
# vpcompressb [rax+1]{k3},xmm2
62 F27D0B 63 50 01, EVEX_Vpcompressb_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512_VBMI2, op0=cw op1=r r=rax cwm=ds:rax+0x1;Packed128_UInt8 r=xmm2 r=k3
# vpcompressb xmm19{k3},xmm10
62 327D0B 63 D3, EVEX_Vpcompressb_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r r=xmm19 w=vmm19 r=xmm10 r=k3
# vpcompressb xmm19{k3}{z},xmm10
62 327D8B 63 D3, EVEX_Vpcompressb_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r w=vmm19 r=xmm10 r=k3
# vpcompressb ymm3,ymm2
62 F27D28 63 D3, EVEX_Vpcompressb_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r w=vmm3 r=ymm2
# vpcompressb [rax+1],ymm2
62 F27D28 63 50 01, EVEX_Vpcompressb_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r r=rax wm=ds:rax+0x1;Packed256_UInt8 r=ymm2
# vpcompressb [rax+1]{k3},ymm2
62 F27D2B 63 50 01, EVEX_Vpcompressb_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512_VBMI2, op0=cw op1=r r=rax cwm=ds:rax+0x1;Packed256_UInt8 r=ymm2 r=k3
# vpcompressb ymm19{k3},ymm10
62 327D2B 63 D3, EVEX_Vpcompressb_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r r=ymm19 w=vmm19 r=ymm10 r=k3
# vpcompressb ymm19{k3}{z},ymm10
62 327DAB 63 D3, EVEX_Vpcompressb_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r w=vmm19 r=ymm10 r=k3
# vpcompressb zmm3,zmm2
62 F27D48 63 D3, EVEX_Vpcompressb_zmmm512_k1z_zmm, EVEX, AVX512_VBMI2, op0=w op1=r w=vmm3 r=zmm2
# vpcompressb [rax+1],zmm2
62 F27D48 63 50 01, EVEX_Vpcompressb_zmmm512_k1z_zmm, EVEX, AVX512_VBMI2, op0=w op1=r r=rax wm=ds:rax+0x1;Packed512_UInt8 r=zmm2
# vpcompressb [rax+1]{k3},zmm2
62 F27D4B 63 50 01, EVEX_Vpcompressb_zmmm512_k1z_zmm, EVEX, AVX512_VBMI2, op0=cw op1=r r=rax cwm=ds:rax+0x1;Packed512_UInt8 r=zmm2 r=k3
# vpcompressb zmm19{k3},zmm10
62 327D4B 63 D3, EVEX_Vpcompressb_zmmm512_k1z_zmm, EVEX, AVX512_VBMI2, op0=rcw op1=r r=zmm19 cw=vmm19 r=zmm10 r=k3
# vpcompressb zmm19{k3}{z},zmm10
62 327DCB 63 D3, EVEX_Vpcompressb_zmmm512_k1z_zmm, EVEX, AVX512_VBMI2, op0=w op1=r w=vmm19 r=zmm10 r=k3
# vpcompressw xmm3,xmm2
62 F2FD08 63 D3, EVEX_Vpcompressw_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r w=vmm3 r=xmm2
# vpcompressw [rax+2],xmm2
62 F2FD08 63 50 01, EVEX_Vpcompressw_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r r=rax wm=ds:rax+0x2;Packed128_UInt16 r=xmm2
# vpcompressw [rax+2]{k3},xmm2
62 F2FD0B 63 50 01, EVEX_Vpcompressw_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512_VBMI2, op0=cw op1=r r=rax cwm=ds:rax+0x2;Packed128_UInt16 r=xmm2 r=k3
# vpcompressw xmm19{k3}{z},xmm10
62 32FD8B 63 D3, EVEX_Vpcompressw_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r w=vmm19 r=xmm10 r=k3
# vpcompressw xmm19{k3},xmm10
62 32FD0B 63 D3, EVEX_Vpcompressw_xmmm128_k1z_xmm, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r r=xmm19 w=vmm19 r=xmm10 r=k3
# vpcompressw ymm3,ymm2
62 F2FD28 63 D3, EVEX_Vpcompressw_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r w=vmm3 r=ymm2
# vpcompressw [rax+2],ymm2
62 F2FD28 63 50 01, EVEX_Vpcompressw_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r r=rax wm=ds:rax+0x2;Packed256_UInt16 r=ymm2
# vpcompressw [rax+2]{k3},ymm2
62 F2FD2B 63 50 01, EVEX_Vpcompressw_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512_VBMI2, op0=cw op1=r r=rax cwm=ds:rax+0x2;Packed256_UInt16 r=ymm2 r=k3
# vpcompressw ymm19{k3}{z},ymm10
62 32FDAB 63 D3, EVEX_Vpcompressw_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r w=vmm19 r=ymm10 r=k3
# vpcompressw ymm19{k3},ymm10
62 32FD2B 63 D3, EVEX_Vpcompressw_ymmm256_k1z_ymm, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r r=ymm19 w=vmm19 r=ymm10 r=k3
# vpcompressw zmm3,zmm2
62 F2FD48 63 D3, EVEX_Vpcompressw_zmmm512_k1z_zmm, EVEX, AVX512_VBMI2, op0=w op1=r w=vmm3 r=zmm2
# vpcompressw [rax+2],zmm2
62 F2FD48 63 50 01, EVEX_Vpcompressw_zmmm512_k1z_zmm, EVEX, AVX512_VBMI2, op0=w op1=r r=rax wm=ds:rax+0x2;Packed512_UInt16 r=zmm2
# vpcompressw [rax+2]{k3},zmm2
62 F2FD4B 63 50 01, EVEX_Vpcompressw_zmmm512_k1z_zmm, EVEX, AVX512_VBMI2, op0=cw op1=r r=rax cwm=ds:rax+0x2;Packed512_UInt16 r=zmm2 r=k3
# vpcompressw zmm19{k3}{z},zmm10
62 32FDCB 63 D3, EVEX_Vpcompressw_zmmm512_k1z_zmm, EVEX, AVX512_VBMI2, op0=w op1=r w=vmm19 r=zmm10 r=k3
# vpcompressw zmm19{k3},zmm10
62 32FD4B 63 D3, EVEX_Vpcompressw_zmmm512_k1z_zmm, EVEX, AVX512_VBMI2, op0=rcw op1=r r=zmm19 cw=vmm19 r=zmm10 r=k3
# vpshldvw xmm2,xmm6,[rax+10h]
62 F2CD08 70 50 01, EVEX_Vpshldvw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpshldvw xmm2{k3},xmm6,[rax+10h]
62 F2CD0B 70 50 01, EVEX_Vpshldvw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16 r=k3
# vpshldvw xmm2{k3}{z},xmm6,[rax+10h]
62 F2CD8B 70 50 01, EVEX_Vpshldvw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16 r=k3
# vpshldvw ymm2,ymm6,[rax+20h]
62 F2CD28 70 50 01, EVEX_Vpshldvw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpshldvw ymm2{k3},ymm6,[rax+20h]
62 F2CD2B 70 50 01, EVEX_Vpshldvw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16 r=k3
# vpshldvw ymm2{k3}{z},ymm6,[rax+20h]
62 F2CDAB 70 50 01, EVEX_Vpshldvw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16 r=k3
# vpshldvw zmm2,zmm6,[rax+40h]
62 F2CD48 70 50 01, EVEX_Vpshldvw_zmm_k1z_zmm_zmmm512, EVEX, AVX512_VBMI2, op0=rw op1=r op2=r r=zmm2 w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpshldvw zmm2{k3},zmm6,[rax+40h]
62 F2CD4B 70 50 01, EVEX_Vpshldvw_zmm_k1z_zmm_zmmm512, EVEX, AVX512_VBMI2, op0=rcw op1=r op2=r r=zmm2 cw=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16 r=k3
# vpshldvw zmm2{k3}{z},zmm6,[rax+40h]
62 F2CDCB 70 50 01, EVEX_Vpshldvw_zmm_k1z_zmm_zmmm512, EVEX, AVX512_VBMI2, op0=rw op1=r op2=r r=zmm2 w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16 r=k3
# vpshldvd xmm2,xmm6,[rax+10h]
62 F24D08 71 50 01, EVEX_Vpshldvd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpshldvd xmm2{k3},xmm6,[rax+10h]
62 F24D0B 71 50 01, EVEX_Vpshldvd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32 r=k3
# vpshldvd xmm2{k5}{z},xmm6,dword bcst [rax+4]
62 F24D9D 71 50 01, EVEX_Vpshldvd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x4;Broadcast128_UInt32 r=k5
# vpshldvd ymm2,ymm6,[rax+20h]
62 F24D28 71 50 01, EVEX_Vpshldvd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpshldvd ymm2{k3},ymm6,[rax+20h]
62 F24D2B 71 50 01, EVEX_Vpshldvd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32 r=k3
# vpshldvd ymm2{k5}{z},ymm6,dword bcst [rax+4]
62 F24DBD 71 50 01, EVEX_Vpshldvd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x4;Broadcast256_UInt32 r=k5
# vpshldvd zmm2,zmm6,[rax+40h]
62 F24D48 71 50 01, EVEX_Vpshldvd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512_VBMI2, op0=rw op1=r op2=r r=zmm2 w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpshldvd zmm2{k3},zmm6,[rax+40h]
62 F24D4B 71 50 01, EVEX_Vpshldvd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512_VBMI2, op0=rcw op1=r op2=r r=zmm2 cw=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32 r=k3
# vpshldvd zmm2{k5}{z},zmm6,dword bcst [rax+4]
62 F24DDD 71 50 01, EVEX_Vpshldvd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512_VBMI2, op0=rw op1=r op2=r r=zmm2 w=vmm2 r=zmm6 r=rax rm=ds:rax+0x4;Broadcast512_UInt32 r=k5
# vpshldvq xmm2,xmm6,[rax+10h]
62 F2CD08 71 50 01, EVEX_Vpshldvq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpshldvq xmm2{k3},xmm6,[rax+10h]
62 F2CD0B 71 50 01, EVEX_Vpshldvq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64 r=k3
# vpshldvq xmm2{k5}{z},xmm6,qword bcst [rax+8]
62 F2CD9D 71 50 01, EVEX_Vpshldvq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x8;Broadcast128_UInt64 r=k5
# vpshldvq ymm2,ymm6,[rax+20h]
62 F2CD28 71 50 01, EVEX_Vpshldvq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpshldvq ymm2{k3},ymm6,[rax+20h]
62 F2CD2B 71 50 01, EVEX_Vpshldvq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64 r=k3
# vpshldvq ymm2{k5}{z},ymm6,qword bcst [rax+8]
62 F2CDBD 71 50 01, EVEX_Vpshldvq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x8;Broadcast256_UInt64 r=k5
# vpshldvq zmm2,zmm6,[rax+40h]
62 F2CD48 71 50 01, EVEX_Vpshldvq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512_VBMI2, op0=rw op1=r op2=r r=zmm2 w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpshldvq zmm2{k3},zmm6,[rax+40h]
62 F2CD4B 71 50 01, EVEX_Vpshldvq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512_VBMI2, op0=rcw op1=r op2=r r=zmm2 cw=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64 r=k3
# vpshldvq zmm2{k5}{z},zmm6,qword bcst [rax+8]
62 F2CDDD 71 50 01, EVEX_Vpshldvq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512_VBMI2, op0=rw op1=r op2=r r=zmm2 w=vmm2 r=zmm6 r=rax rm=ds:rax+0x8;Broadcast512_UInt64 r=k5
# vpshrdvw xmm2,xmm6,[rax+10h]
62 F2CD08 72 50 01, EVEX_Vpshrdvw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpshrdvw xmm2{k3},xmm6,[rax+10h]
62 F2CD0B 72 50 01, EVEX_Vpshrdvw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16 r=k3
# vpshrdvw xmm2{k3}{z},xmm6,[rax+10h]
62 F2CD8B 72 50 01, EVEX_Vpshrdvw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16 r=k3
# vpshrdvw ymm2,ymm6,[rax+20h]
62 F2CD28 72 50 01, EVEX_Vpshrdvw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpshrdvw ymm2{k3},ymm6,[rax+20h]
62 F2CD2B 72 50 01, EVEX_Vpshrdvw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16 r=k3
# vpshrdvw ymm2{k3}{z},ymm6,[rax+20h]
62 F2CDAB 72 50 01, EVEX_Vpshrdvw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16 r=k3
# vpshrdvw zmm2,zmm6,[rax+40h]
62 F2CD48 72 50 01, EVEX_Vpshrdvw_zmm_k1z_zmm_zmmm512, EVEX, AVX512_VBMI2, op0=rw op1=r op2=r r=zmm2 w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpshrdvw zmm2{k3},zmm6,[rax+40h]
62 F2CD4B 72 50 01, EVEX_Vpshrdvw_zmm_k1z_zmm_zmmm512, EVEX, AVX512_VBMI2, op0=rcw op1=r op2=r r=zmm2 cw=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16 r=k3
# vpshrdvw zmm2{k3}{z},zmm6,[rax+40h]
62 F2CDCB 72 50 01, EVEX_Vpshrdvw_zmm_k1z_zmm_zmmm512, EVEX, AVX512_VBMI2, op0=rw op1=r op2=r r=zmm2 w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16 r=k3
# vcvtneps2bf16 xmm2,xmmword ptr [rax+10h]
62 F27E08 72 50 01, EVEX_Vcvtneps2bf16_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512_BF16, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x10;Packed128_Float32
# vcvtneps2bf16 xmm18{k3},xmm3
62 E27E0B 72 D3, EVEX_Vcvtneps2bf16_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512_BF16, op0=rw op1=r w=vmm18 r=xmm18 r=k3 r=xmm3
# vcvtneps2bf16 xmm2{k3}{z},xmm3
62 F27E8B 72 D3, EVEX_Vcvtneps2bf16_xmm_k1z_xmmm128b32, EVEX, AVX512VL;AVX512_BF16, op0=w op1=r w=vmm2 r=k3 r=xmm3
# vcvtneps2bf16 xmm2,ymmword ptr [rax+20h]
62 F27E28 72 50 01, EVEX_Vcvtneps2bf16_xmm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512_BF16, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x20;Packed256_Float32
# vcvtneps2bf16 xmm18{k3},ymm3
62 E27E2B 72 D3, EVEX_Vcvtneps2bf16_xmm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512_BF16, op0=rw op1=r w=vmm18 r=xmm18 r=k3 r=ymm3
# vcvtneps2bf16 xmm2{k3}{z},ymm3
62 F27EAB 72 D3, EVEX_Vcvtneps2bf16_xmm_k1z_ymmm256b32, EVEX, AVX512VL;AVX512_BF16, op0=w op1=r w=vmm2 r=k3 r=ymm3
# vcvtneps2bf16 ymm2,zmmword ptr [rax+40h]
62 F27E48 72 50 01, EVEX_Vcvtneps2bf16_ymm_k1z_zmmm512b32, EVEX, AVX512F;AVX512_BF16, op0=w op1=r w=vmm2 r=rax rm=ds:rax+0x40;Packed512_Float32
# vcvtneps2bf16 ymm18{k3},zmm3
62 E27E4B 72 D3, EVEX_Vcvtneps2bf16_ymm_k1z_zmmm512b32, EVEX, AVX512F;AVX512_BF16, op0=rw op1=r w=vmm18 r=ymm18 r=k3 r=zmm3
# vcvtneps2bf16 ymm2{k3}{z},zmm3
62 F27ECB 72 D3, EVEX_Vcvtneps2bf16_ymm_k1z_zmmm512b32, EVEX, AVX512F;AVX512_BF16, op0=w op1=r w=vmm2 r=k3 r=zmm3
# vcvtne2ps2bf16 xmm2,xmm6,[rax+10h]
62 F24F08 72 50 01, EVEX_Vcvtne2ps2bf16_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_BF16, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32
# vcvtne2ps2bf16 xmm2{k3},xmm6,[rax+10h]
62 F24F0B 72 50 01, EVEX_Vcvtne2ps2bf16_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_BF16, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_Float32 r=k3
# vcvtne2ps2bf16 xmm2{k5}{z},xmm6,dword bcst [rax+4]
62 F24F9D 72 50 01, EVEX_Vcvtne2ps2bf16_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_BF16, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x4;Broadcast128_Float32 r=k5
# vcvtne2ps2bf16 ymm2,ymm6,[rax+20h]
62 F24F28 72 50 01, EVEX_Vcvtne2ps2bf16_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_BF16, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32
# vcvtne2ps2bf16 ymm2{k3},ymm6,[rax+20h]
62 F24F2B 72 50 01, EVEX_Vcvtne2ps2bf16_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_BF16, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_Float32 r=k3
# vcvtne2ps2bf16 ymm2{k5}{z},ymm6,dword bcst [rax+4]
62 F24FBD 72 50 01, EVEX_Vcvtne2ps2bf16_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_BF16, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x4;Broadcast256_Float32 r=k5
# vcvtne2ps2bf16 zmm2,zmm6,[rax+40h]
62 F24F48 72 50 01, EVEX_Vcvtne2ps2bf16_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F;AVX512_BF16, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32
# vcvtne2ps2bf16 zmm2{k3},zmm6,[rax+40h]
62 F24F4B 72 50 01, EVEX_Vcvtne2ps2bf16_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F;AVX512_BF16, op0=rcw op1=r op2=r r=zmm2 cw=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_Float32 r=k3
# vcvtne2ps2bf16 zmm2{k5}{z},zmm6,dword bcst [rax+4]
62 F24FDD 72 50 01, EVEX_Vcvtne2ps2bf16_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F;AVX512_BF16, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x4;Broadcast512_Float32 r=k5
# vpshrdvd xmm2,xmm6,[rax+10h]
62 F24D08 73 50 01, EVEX_Vpshrdvd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpshrdvd xmm2{k3},xmm6,[rax+10h]
62 F24D0B 73 50 01, EVEX_Vpshrdvd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32 r=k3
# vpshrdvd xmm2{k5}{z},xmm6,dword bcst [rax+4]
62 F24D9D 73 50 01, EVEX_Vpshrdvd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x4;Broadcast128_UInt32 r=k5
# vpshrdvd ymm2,ymm6,[rax+20h]
62 F24D28 73 50 01, EVEX_Vpshrdvd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpshrdvd ymm2{k3},ymm6,[rax+20h]
62 F24D2B 73 50 01, EVEX_Vpshrdvd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32 r=k3
# vpshrdvd ymm2{k5}{z},ymm6,dword bcst [rax+4]
62 F24DBD 73 50 01, EVEX_Vpshrdvd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x4;Broadcast256_UInt32 r=k5
# vpshrdvd zmm2,zmm6,[rax+40h]
62 F24D48 73 50 01, EVEX_Vpshrdvd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512_VBMI2, op0=rw op1=r op2=r r=zmm2 w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpshrdvd zmm2{k3},zmm6,[rax+40h]
62 F24D4B 73 50 01, EVEX_Vpshrdvd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512_VBMI2, op0=rcw op1=r op2=r r=zmm2 cw=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32 r=k3
# vpshrdvd zmm2{k5}{z},zmm6,dword bcst [rax+4]
62 F24DDD 73 50 01, EVEX_Vpshrdvd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512_VBMI2, op0=rw op1=r op2=r r=zmm2 w=vmm2 r=zmm6 r=rax rm=ds:rax+0x4;Broadcast512_UInt32 r=k5
# vpshrdvq xmm2,xmm6,[rax+10h]
62 F2CD08 73 50 01, EVEX_Vpshrdvq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpshrdvq xmm2{k3},xmm6,[rax+10h]
62 F2CD0B 73 50 01, EVEX_Vpshrdvq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64 r=k3
# vpshrdvq xmm2{k5}{z},xmm6,qword bcst [rax+8]
62 F2CD9D 73 50 01, EVEX_Vpshrdvq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x8;Broadcast128_UInt64 r=k5
# vpshrdvq ymm2,ymm6,[rax+20h]
62 F2CD28 73 50 01, EVEX_Vpshrdvq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpshrdvq ymm2{k3},ymm6,[rax+20h]
62 F2CD2B 73 50 01, EVEX_Vpshrdvq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64 r=k3
# vpshrdvq ymm2{k5}{z},ymm6,qword bcst [rax+8]
62 F2CDBD 73 50 01, EVEX_Vpshrdvq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x8;Broadcast256_UInt64 r=k5
# vpshrdvq zmm2,zmm6,[rax+40h]
62 F2CD48 73 50 01, EVEX_Vpshrdvq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512_VBMI2, op0=rw op1=r op2=r r=zmm2 w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpshrdvq zmm2{k3},zmm6,[rax+40h]
62 F2CD4B 73 50 01, EVEX_Vpshrdvq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512_VBMI2, op0=rcw op1=r op2=r r=zmm2 cw=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64 r=k3
# vpshrdvq zmm2{k5}{z},zmm6,qword bcst [rax+8]
62 F2CDDD 73 50 01, EVEX_Vpshrdvq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512_VBMI2, op0=rw op1=r op2=r r=zmm2 w=vmm2 r=zmm6 r=rax rm=ds:rax+0x8;Broadcast512_UInt64 r=k5
# vpshufbitqmb k2,xmm6,[rax+10h]
62 F24D08 8F 50 01, EVEX_Vpshufbitqmb_kr_k1_xmm_xmmm128, EVEX, AVX512VL;AVX512_BITALG, op0=w op1=r op2=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vpshufbitqmb k2{k3},xmm6,[rax+10h]
62 F24D0B 8F 50 01, EVEX_Vpshufbitqmb_kr_k1_xmm_xmmm128, EVEX, AVX512VL;AVX512_BITALG, op0=w op1=r op2=r w=k2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8 r=k3
# vpshufbitqmb k2,ymm6,[rax+20h]
62 F24D28 8F 50 01, EVEX_Vpshufbitqmb_kr_k1_ymm_ymmm256, EVEX, AVX512VL;AVX512_BITALG, op0=w op1=r op2=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vpshufbitqmb k2{k3},ymm6,[rax+20h]
62 F24D2B 8F 50 01, EVEX_Vpshufbitqmb_kr_k1_ymm_ymmm256, EVEX, AVX512VL;AVX512_BITALG, op0=w op1=r op2=r w=k2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8 r=k3
# vpshufbitqmb k2,zmm6,[rax+40h]
62 F24D48 8F 50 01, EVEX_Vpshufbitqmb_kr_k1_zmm_zmmm512, EVEX, AVX512_BITALG, op0=w op1=r op2=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vpshufbitqmb k2{k3},zmm6,[rax+40h]
62 F24D4B 8F 50 01, EVEX_Vpshufbitqmb_kr_k1_zmm_zmmm512, EVEX, AVX512_BITALG, op0=w op1=r op2=r w=k2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8 r=k3
# gf2p8mulb xmm1,xmm5
66 0F38CF CD, Gf2p8mulb_xmm_xmmm128, Legacy, GFNI, op0=rw op1=r rw=xmm1 r=xmm5
# gf2p8mulb xmm1,[rax]
66 0F38CF 08, Gf2p8mulb_xmm_xmmm128, Legacy, GFNI, op0=rw op1=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt8
# vgf2p8mulb xmm2,xmm6,xmm3
C4E249 CF D3, VEX_Vgf2p8mulb_xmm_xmm_xmmm128, VEX, AVX;GFNI, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vgf2p8mulb xmm2,xmm6,[rax]
C4E249 CF 10, VEX_Vgf2p8mulb_xmm_xmm_xmmm128, VEX, AVX;GFNI, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt8
# vgf2p8mulb ymm2,ymm6,ymm3
C4E24D CF D3, VEX_Vgf2p8mulb_ymm_ymm_ymmm256, VEX, AVX;GFNI, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vgf2p8mulb ymm2,ymm6,[rax]
C4E24D CF 10, VEX_Vgf2p8mulb_ymm_ymm_ymmm256, VEX, AVX;GFNI, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt8
# vgf2p8mulb xmm2,xmm6,[rax+10h]
62 F24D08 CF 50 01, EVEX_Vgf2p8mulb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;GFNI, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vgf2p8mulb xmm2{k3},xmm6,[rax+10h]
62 F24D0B CF 50 01, EVEX_Vgf2p8mulb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;GFNI, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8 r=k3
# vgf2p8mulb xmm2{k5}{z},xmm6,[rax+10h]
62 F24D8D CF 50 01, EVEX_Vgf2p8mulb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;GFNI, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8 r=k5
# vgf2p8mulb ymm2,ymm6,[rax+20h]
62 F24D28 CF 50 01, EVEX_Vgf2p8mulb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;GFNI, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vgf2p8mulb ymm2{k3},ymm6,[rax+20h]
62 F24D2B CF 50 01, EVEX_Vgf2p8mulb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;GFNI, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8 r=k3
# vgf2p8mulb ymm2{k5}{z},ymm6,[rax+20h]
62 F24DAD CF 50 01, EVEX_Vgf2p8mulb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;GFNI, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8 r=k5
# vgf2p8mulb zmm2,zmm6,[rax+40h]
62 F24D48 CF 50 01, EVEX_Vgf2p8mulb_zmm_k1z_zmm_zmmm512, EVEX, AVX512F;GFNI, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vgf2p8mulb zmm2{k3},zmm6,[rax+40h]
62 F24D4B CF 50 01, EVEX_Vgf2p8mulb_zmm_k1z_zmm_zmmm512, EVEX, AVX512F;GFNI, op0=rcw op1=r op2=r r=zmm2 cw=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8 r=k3
# vgf2p8mulb zmm2{k5}{z},zmm6,[rax+40h]
62 F24DCD CF 50 01, EVEX_Vgf2p8mulb_zmm_k1z_zmm_zmmm512, EVEX, AVX512F;GFNI, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8 r=k5
# vaesenc ymm2,ymm6,ymm3
C4E24D DC D3, VEX_Vaesenc_ymm_ymm_ymmm256, VEX, VAES, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vaesenc ymm2,ymm6,[rax]
C4E24D DC 10, VEX_Vaesenc_ymm_ymm_ymmm256, VEX, VAES, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt128
# vaesenc xmm2,xmm6,xmm3
62 F24D08 DC D3, EVEX_Vaesenc_xmm_xmm_xmmm128, EVEX, AVX512VL;VAES, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vaesenc xmm2,xmm6,[rax+10h]
62 F24D08 DC 50 01, EVEX_Vaesenc_xmm_xmm_xmmm128, EVEX, AVX512VL;VAES, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;UInt128
# vaesenc ymm2,ymm6,ymm3
62 F24D28 DC D3, EVEX_Vaesenc_ymm_ymm_ymmm256, EVEX, AVX512VL;VAES, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vaesenc ymm2,ymm6,[rax+20h]
62 F24D28 DC 50 01, EVEX_Vaesenc_ymm_ymm_ymmm256, EVEX, AVX512VL;VAES, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt128
# vaesenc zmm2,zmm6,zmm3
62 F24D48 DC D3, EVEX_Vaesenc_zmm_zmm_zmmm512, EVEX, AVX512F;VAES, op0=w op1=r op2=r w=vmm2 r=zmm6 r=zmm3
# vaesenc zmm2,zmm6,[rax+40h]
62 F24D48 DC 50 01, EVEX_Vaesenc_zmm_zmm_zmmm512, EVEX, AVX512F;VAES, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt128
# vaesenclast ymm2,ymm6,ymm3
C4E24D DD D3, VEX_Vaesenclast_ymm_ymm_ymmm256, VEX, VAES, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vaesenclast ymm2,ymm6,[rax]
C4E24D DD 10, VEX_Vaesenclast_ymm_ymm_ymmm256, VEX, VAES, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt128
# vaesenclast xmm2,xmm6,xmm3
62 F24D08 DD D3, EVEX_Vaesenclast_xmm_xmm_xmmm128, EVEX, AVX512VL;VAES, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vaesenclast xmm2,xmm6,[rax+10h]
62 F24D08 DD 50 01, EVEX_Vaesenclast_xmm_xmm_xmmm128, EVEX, AVX512VL;VAES, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;UInt128
# vaesenclast ymm2,ymm6,ymm3
62 F24D28 DD D3, EVEX_Vaesenclast_ymm_ymm_ymmm256, EVEX, AVX512VL;VAES, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vaesenclast ymm2,ymm6,[rax+20h]
62 F24D28 DD 50 01, EVEX_Vaesenclast_ymm_ymm_ymmm256, EVEX, AVX512VL;VAES, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt128
# vaesenclast zmm2,zmm6,zmm3
62 F24D48 DD D3, EVEX_Vaesenclast_zmm_zmm_zmmm512, EVEX, AVX512F;VAES, op0=w op1=r op2=r w=vmm2 r=zmm6 r=zmm3
# vaesenclast zmm2,zmm6,[rax+40h]
62 F24D48 DD 50 01, EVEX_Vaesenclast_zmm_zmm_zmmm512, EVEX, AVX512F;VAES, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt128
# vaesdec ymm2,ymm6,ymm3
C4E24D DE D3, VEX_Vaesdec_ymm_ymm_ymmm256, VEX, VAES, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vaesdec ymm2,ymm6,[rax]
C4E24D DE 10, VEX_Vaesdec_ymm_ymm_ymmm256, VEX, VAES, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt128
# vaesdec xmm2,xmm6,xmm3
62 F24D08 DE D3, EVEX_Vaesdec_xmm_xmm_xmmm128, EVEX, AVX512VL;VAES, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vaesdec xmm2,xmm6,[rax+10h]
62 F24D08 DE 50 01, EVEX_Vaesdec_xmm_xmm_xmmm128, EVEX, AVX512VL;VAES, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;UInt128
# vaesdec ymm2,ymm6,ymm3
62 F24D28 DE D3, EVEX_Vaesdec_ymm_ymm_ymmm256, EVEX, AVX512VL;VAES, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vaesdec ymm2,ymm6,[rax+20h]
62 F24D28 DE 50 01, EVEX_Vaesdec_ymm_ymm_ymmm256, EVEX, AVX512VL;VAES, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt128
# vaesdec zmm2,zmm6,zmm3
62 F24D48 DE D3, EVEX_Vaesdec_zmm_zmm_zmmm512, EVEX, AVX512F;VAES, op0=w op1=r op2=r w=vmm2 r=zmm6 r=zmm3
# vaesdec zmm2,zmm6,[rax+40h]
62 F24D48 DE 50 01, EVEX_Vaesdec_zmm_zmm_zmmm512, EVEX, AVX512F;VAES, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt128
# vaesdeclast ymm2,ymm6,ymm3
C4E24D DF D3, VEX_Vaesdeclast_ymm_ymm_ymmm256, VEX, VAES, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vaesdeclast ymm2,ymm6,[rax]
C4E24D DF 10, VEX_Vaesdeclast_ymm_ymm_ymmm256, VEX, VAES, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt128
# vaesdeclast xmm2,xmm6,xmm3
62 F24D08 DF D3, EVEX_Vaesdeclast_xmm_xmm_xmmm128, EVEX, AVX512VL;VAES, op0=w op1=r op2=r w=vmm2 r=xmm6 r=xmm3
# vaesdeclast xmm2,xmm6,[rax+10h]
62 F24D08 DF 50 01, EVEX_Vaesdeclast_xmm_xmm_xmmm128, EVEX, AVX512VL;VAES, op0=w op1=r op2=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;UInt128
# vaesdeclast ymm2,ymm6,ymm3
62 F24D28 DF D3, EVEX_Vaesdeclast_ymm_ymm_ymmm256, EVEX, AVX512VL;VAES, op0=w op1=r op2=r w=vmm2 r=ymm6 r=ymm3
# vaesdeclast ymm2,ymm6,[rax+20h]
62 F24D28 DF 50 01, EVEX_Vaesdeclast_ymm_ymm_ymmm256, EVEX, AVX512VL;VAES, op0=w op1=r op2=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt128
# vaesdeclast zmm2,zmm6,zmm3
62 F24D48 DF D3, EVEX_Vaesdeclast_zmm_zmm_zmmm512, EVEX, AVX512F;VAES, op0=w op1=r op2=r w=vmm2 r=zmm6 r=zmm3
# vaesdeclast zmm2,zmm6,[rax+40h]
62 F24D48 DF 50 01, EVEX_Vaesdeclast_zmm_zmm_zmmm512, EVEX, AVX512F;VAES, op0=w op1=r op2=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt128
# wrussd [rax],ebx
66 0F38F5 18, Wrussd_m32_r32, Legacy, CET_SS, priv op0=w op1=r r=rax wm=ds:rax;UInt32 r=ebx
# wrussq [rax],rbx
66 48 0F38F5 18, Wrussq_m64_r64, Legacy, CET_SS, priv op0=w op1=r r=rax wm=ds:rax;UInt64 r=rbx
# wrssd [rax],ebx
0F38F6 18, Wrssd_m32_r32, Legacy, CET_SS, op0=w op1=r r=rax wm=ds:rax;UInt32 r=ebx
# wrssq [rax],rbx
48 0F38F6 18, Wrssq_m64_r64, Legacy, CET_SS, op0=w op1=r r=rax wm=ds:rax;UInt64 r=rbx
# movdir64b ebx,[eax]
67 66 0F38F8 18, Movdir64b_r32_m512, Legacy, MOVDIR64B, op0=r op1=r r=ebx r=eax rm=ds:eax;UInt512 wm=es:ebx;UInt512
# movdir64b rbx,[rax]
66 0F38F8 18, Movdir64b_r64_m512, Legacy, MOVDIR64B, op0=r op1=r r=rbx r=rax rm=ds:rax;UInt512 wm=es:rbx;UInt512
# enqcmds ebx,[eax]
67 F3 0F38F8 18, Enqcmds_r32_m512, Legacy, ENQCMD, priv fw=z fc=acops op0=r op1=r r=ebx r=eax rm=ds:eax;UInt512 wm=es:ebx;UInt512
# enqcmds rbx,[rax]
F3 0F38F8 18, Enqcmds_r64_m512, Legacy, ENQCMD, priv fw=z fc=acops op0=r op1=r r=rbx r=rax rm=ds:rax;UInt512 wm=es:rbx;UInt512
# enqcmd ebx,[eax]
67 F2 0F38F8 18, Enqcmd_r32_m512, Legacy, ENQCMD, fw=z fc=acops op0=r op1=r r=ebx r=eax rm=ds:eax;UInt512 wm=es:ebx;UInt512
# enqcmd rbx,[rax]
F2 0F38F8 18, Enqcmd_r64_m512, Legacy, ENQCMD, fw=z fc=acops op0=r op1=r r=rbx r=rax rm=ds:rax;UInt512 wm=es:rbx;UInt512
# movdiri [rax],ebx
0F38F9 18, Movdiri_m32_r32, Legacy, MOVDIRI, op0=w op1=r r=rax wm=ds:rax;UInt32 r=ebx
# movdiri [rax],rbx
48 0F38F9 18, Movdiri_m64_r64, Legacy, MOVDIRI, op0=w op1=r r=rax wm=ds:rax;UInt64 r=rbx
# vpclmulqdq ymm2,ymm6,ymm3,0A5h
C4E34D 44 D3 A5, VEX_Vpclmulqdq_ymm_ymm_ymmm256_imm8, VEX, VPCLMULQDQ, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3
# vpclmulqdq ymm2,ymm6,[rax],0A5h
C4E34D 44 10 A5, VEX_Vpclmulqdq_ymm_ymm_ymmm256_imm8, VEX, VPCLMULQDQ, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt64
# vpclmulqdq xmm2,xmm6,xmm3,0A5h
62 F34D08 44 D3 A5, EVEX_Vpclmulqdq_xmm_xmm_xmmm128_imm8, EVEX, AVX512VL;VPCLMULQDQ, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vpclmulqdq xmm2,xmm6,[rax+10h],0A5h
62 F34D08 44 50 01 A5, EVEX_Vpclmulqdq_xmm_xmm_xmmm128_imm8, EVEX, AVX512VL;VPCLMULQDQ, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpclmulqdq ymm2,ymm6,ymm3,0A5h
62 F34D28 44 D3 A5, EVEX_Vpclmulqdq_ymm_ymm_ymmm256_imm8, EVEX, AVX512VL;VPCLMULQDQ, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3
# vpclmulqdq ymm2,ymm6,[rax+20h],0A5h
62 F34D28 44 50 01 A5, EVEX_Vpclmulqdq_ymm_ymm_ymmm256_imm8, EVEX, AVX512VL;VPCLMULQDQ, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpclmulqdq zmm2,zmm6,zmm3,0A5h
62 F34D48 44 D3 A5, EVEX_Vpclmulqdq_zmm_zmm_zmmm512_imm8, EVEX, AVX512F;VPCLMULQDQ, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=zmm3
# vpclmulqdq zmm2,zmm6,[rax+40h],0A5h
62 F34D48 44 50 01 A5, EVEX_Vpclmulqdq_zmm_zmm_zmmm512_imm8, EVEX, AVX512F;VPCLMULQDQ, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpshldw xmm2,xmm6,[rax+10h],0A5h
62 F3CD08 70 50 01 A5, EVEX_Vpshldw_xmm_k1z_xmm_xmmm128_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpshldw xmm2{k3},xmm6,[rax+10h],0A5h
62 F3CD0B 70 50 01 A5, EVEX_Vpshldw_xmm_k1z_xmm_xmmm128_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r op3=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16 r=k3
# vpshldw xmm2{k5}{z},xmm6,[rax+10h],0A5h
62 F3CD8D 70 50 01 A5, EVEX_Vpshldw_xmm_k1z_xmm_xmmm128_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16 r=k5
# vpshldw ymm2,ymm6,[rax+20h],0A5h
62 F3CD28 70 50 01 A5, EVEX_Vpshldw_ymm_k1z_ymm_ymmm256_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpshldw ymm2{k3},ymm6,[rax+20h],0A5h
62 F3CD2B 70 50 01 A5, EVEX_Vpshldw_ymm_k1z_ymm_ymmm256_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r op3=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16 r=k3
# vpshldw ymm2{k5}{z},ymm6,[rax+20h],0A5h
62 F3CDAD 70 50 01 A5, EVEX_Vpshldw_ymm_k1z_ymm_ymmm256_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16 r=k5
# vpshldw zmm2,zmm6,[rax+40h],0A5h
62 F3CD48 70 50 01 A5, EVEX_Vpshldw_zmm_k1z_zmm_zmmm512_imm8, EVEX, AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpshldw zmm2{k3},zmm6,[rax+40h],0A5h
62 F3CD4B 70 50 01 A5, EVEX_Vpshldw_zmm_k1z_zmm_zmmm512_imm8, EVEX, AVX512_VBMI2, op0=rcw op1=r op2=r op3=r r=zmm2 cw=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16 r=k3
# vpshldw zmm2{k5}{z},zmm6,[rax+40h],0A5h
62 F3CDCD 70 50 01 A5, EVEX_Vpshldw_zmm_k1z_zmm_zmmm512_imm8, EVEX, AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16 r=k5
# vpshldd xmm2,xmm6,[rax+10h],0A5h
62 F34D08 71 50 01 A5, EVEX_Vpshldd_xmm_k1z_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpshldd xmm2{k3},xmm6,[rax+10h],0A5h
62 F34D0B 71 50 01 A5, EVEX_Vpshldd_xmm_k1z_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r op3=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32 r=k3
# vpshldd xmm2{k5}{z},xmm6,dword bcst [rax+4],0A5h
62 F34D9D 71 50 01 A5, EVEX_Vpshldd_xmm_k1z_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x4;Broadcast128_UInt32 r=k5
# vpshldd ymm2,ymm6,[rax+20h],0A5h
62 F34D28 71 50 01 A5, EVEX_Vpshldd_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpshldd ymm2{k3},ymm6,[rax+20h],0A5h
62 F34D2B 71 50 01 A5, EVEX_Vpshldd_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r op3=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32 r=k3
# vpshldd ymm2{k5}{z},ymm6,dword bcst [rax+4],0A5h
62 F34DBD 71 50 01 A5, EVEX_Vpshldd_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x4;Broadcast256_UInt32 r=k5
# vpshldd zmm2,zmm6,[rax+40h],0A5h
62 F34D48 71 50 01 A5, EVEX_Vpshldd_zmm_k1z_zmm_zmmm512b32_imm8, EVEX, AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpshldd zmm2{k3},zmm6,[rax+40h],0A5h
62 F34D4B 71 50 01 A5, EVEX_Vpshldd_zmm_k1z_zmm_zmmm512b32_imm8, EVEX, AVX512_VBMI2, op0=rcw op1=r op2=r op3=r r=zmm2 cw=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32 r=k3
# vpshldd zmm2{k5}{z},zmm6,dword bcst [rax+4],0A5h
62 F34DDD 71 50 01 A5, EVEX_Vpshldd_zmm_k1z_zmm_zmmm512b32_imm8, EVEX, AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x4;Broadcast512_UInt32 r=k5
# vpshldq xmm2,xmm6,[rax+10h],0A5h
62 F3CD08 71 50 01 A5, EVEX_Vpshldq_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpshldq xmm2{k3},xmm6,[rax+10h],0A5h
62 F3CD0B 71 50 01 A5, EVEX_Vpshldq_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r op3=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64 r=k3
# vpshldq xmm2{k5}{z},xmm6,qword bcst [rax+8],0A5h
62 F3CD9D 71 50 01 A5, EVEX_Vpshldq_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x8;Broadcast128_UInt64 r=k5
# vpshldq ymm2,ymm6,[rax+20h],0A5h
62 F3CD28 71 50 01 A5, EVEX_Vpshldq_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpshldq ymm2{k3},ymm6,[rax+20h],0A5h
62 F3CD2B 71 50 01 A5, EVEX_Vpshldq_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r op3=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64 r=k3
# vpshldq ymm2{k5}{z},ymm6,qword bcst [rax+8],0A5h
62 F3CDBD 71 50 01 A5, EVEX_Vpshldq_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x8;Broadcast256_UInt64 r=k5
# vpshldq zmm2,zmm6,[rax+40h],0A5h
62 F3CD48 71 50 01 A5, EVEX_Vpshldq_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpshldq zmm2{k3},zmm6,[rax+40h],0A5h
62 F3CD4B 71 50 01 A5, EVEX_Vpshldq_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512_VBMI2, op0=rcw op1=r op2=r op3=r r=zmm2 cw=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64 r=k3
# vpshldq zmm2{k5}{z},zmm6,qword bcst [rax+8],0A5h
62 F3CDDD 71 50 01 A5, EVEX_Vpshldq_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x8;Broadcast512_UInt64 r=k5
# vpshrdw xmm2,xmm6,[rax+10h],0A5h
62 F3CD08 72 50 01 A5, EVEX_Vpshrdw_xmm_k1z_xmm_xmmm128_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16
# vpshrdw xmm2{k3},xmm6,[rax+10h],0A5h
62 F3CD0B 72 50 01 A5, EVEX_Vpshrdw_xmm_k1z_xmm_xmmm128_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r op3=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16 r=k3
# vpshrdw xmm2{k5}{z},xmm6,[rax+10h],0A5h
62 F3CD8D 72 50 01 A5, EVEX_Vpshrdw_xmm_k1z_xmm_xmmm128_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt16 r=k5
# vpshrdw ymm2,ymm6,[rax+20h],0A5h
62 F3CD28 72 50 01 A5, EVEX_Vpshrdw_ymm_k1z_ymm_ymmm256_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16
# vpshrdw ymm2{k3},ymm6,[rax+20h],0A5h
62 F3CD2B 72 50 01 A5, EVEX_Vpshrdw_ymm_k1z_ymm_ymmm256_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r op3=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16 r=k3
# vpshrdw ymm2{k5}{z},ymm6,[rax+20h],0A5h
62 F3CDAD 72 50 01 A5, EVEX_Vpshrdw_ymm_k1z_ymm_ymmm256_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt16 r=k5
# vpshrdw zmm2,zmm6,[rax+40h],0A5h
62 F3CD48 72 50 01 A5, EVEX_Vpshrdw_zmm_k1z_zmm_zmmm512_imm8, EVEX, AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16
# vpshrdw zmm2{k3},zmm6,[rax+40h],0A5h
62 F3CD4B 72 50 01 A5, EVEX_Vpshrdw_zmm_k1z_zmm_zmmm512_imm8, EVEX, AVX512_VBMI2, op0=rcw op1=r op2=r op3=r r=zmm2 cw=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16 r=k3
# vpshrdw zmm2{k5}{z},zmm6,[rax+40h],0A5h
62 F3CDCD 72 50 01 A5, EVEX_Vpshrdw_zmm_k1z_zmm_zmmm512_imm8, EVEX, AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt16 r=k5
# vpshrdd xmm2,xmm6,[rax+10h],0A5h
62 F34D08 73 50 01 A5, EVEX_Vpshrdd_xmm_k1z_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32
# vpshrdd xmm2{k3},xmm6,[rax+10h],0A5h
62 F34D0B 73 50 01 A5, EVEX_Vpshrdd_xmm_k1z_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r op3=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt32 r=k3
# vpshrdd xmm2{k5}{z},xmm6,dword bcst [rax+4],0A5h
62 F34D9D 73 50 01 A5, EVEX_Vpshrdd_xmm_k1z_xmm_xmmm128b32_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x4;Broadcast128_UInt32 r=k5
# vpshrdd ymm2,ymm6,[rax+20h],0A5h
62 F34D28 73 50 01 A5, EVEX_Vpshrdd_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32
# vpshrdd ymm2{k3},ymm6,[rax+20h],0A5h
62 F34D2B 73 50 01 A5, EVEX_Vpshrdd_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r op3=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt32 r=k3
# vpshrdd ymm2{k5}{z},ymm6,dword bcst [rax+4],0A5h
62 F34DBD 73 50 01 A5, EVEX_Vpshrdd_ymm_k1z_ymm_ymmm256b32_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x4;Broadcast256_UInt32 r=k5
# vpshrdd zmm2,zmm6,[rax+40h],0A5h
62 F34D48 73 50 01 A5, EVEX_Vpshrdd_zmm_k1z_zmm_zmmm512b32_imm8, EVEX, AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32
# vpshrdd zmm2{k3},zmm6,[rax+40h],0A5h
62 F34D4B 73 50 01 A5, EVEX_Vpshrdd_zmm_k1z_zmm_zmmm512b32_imm8, EVEX, AVX512_VBMI2, op0=rcw op1=r op2=r op3=r r=zmm2 cw=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt32 r=k3
# vpshrdd zmm2{k5}{z},zmm6,dword bcst [rax+4],0A5h
62 F34DDD 73 50 01 A5, EVEX_Vpshrdd_zmm_k1z_zmm_zmmm512b32_imm8, EVEX, AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x4;Broadcast512_UInt32 r=k5
# vpshrdq xmm2,xmm6,[rax+10h],0A5h
62 F3CD08 73 50 01 A5, EVEX_Vpshrdq_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64
# vpshrdq xmm2{k3},xmm6,[rax+10h],0A5h
62 F3CD0B 73 50 01 A5, EVEX_Vpshrdq_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r op3=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt64 r=k3
# vpshrdq xmm2{k5}{z},xmm6,qword bcst [rax+8],0A5h
62 F3CD9D 73 50 01 A5, EVEX_Vpshrdq_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x8;Broadcast128_UInt64 r=k5
# vpshrdq ymm2,ymm6,[rax+20h],0A5h
62 F3CD28 73 50 01 A5, EVEX_Vpshrdq_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64
# vpshrdq ymm2{k3},ymm6,[rax+20h],0A5h
62 F3CD2B 73 50 01 A5, EVEX_Vpshrdq_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=rw op1=r op2=r op3=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt64 r=k3
# vpshrdq ymm2{k5}{z},ymm6,qword bcst [rax+8],0A5h
62 F3CDBD 73 50 01 A5, EVEX_Vpshrdq_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x8;Broadcast256_UInt64 r=k5
# vpshrdq zmm2,zmm6,[rax+40h],0A5h
62 F3CD48 73 50 01 A5, EVEX_Vpshrdq_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64
# vpshrdq zmm2{k3},zmm6,[rax+40h],0A5h
62 F3CD4B 73 50 01 A5, EVEX_Vpshrdq_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512_VBMI2, op0=rcw op1=r op2=r op3=r r=zmm2 cw=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt64 r=k3
# vpshrdq zmm2{k5}{z},zmm6,qword bcst [rax+8],0A5h
62 F3CDDD 73 50 01 A5, EVEX_Vpshrdq_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512_VBMI2, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x8;Broadcast512_UInt64 r=k5
# gf2p8affineqb xmm1,xmm5,0A5h
66 0F3ACE CD A5, Gf2p8affineqb_xmm_xmmm128_imm8, Legacy, GFNI, op0=rw op1=r op2=r rw=xmm1 r=xmm5
# gf2p8affineqb xmm1,[rax],0A5h
66 0F3ACE 08 A5, Gf2p8affineqb_xmm_xmmm128_imm8, Legacy, GFNI, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt8
# vgf2p8affineqb xmm2,xmm6,xmm3,0A5h
C4E3C9 CE D3 A5, VEX_Vgf2p8affineqb_xmm_xmm_xmmm128_imm8, VEX, AVX;GFNI, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vgf2p8affineqb xmm2,xmm6,[rax],0A5h
C4E3C9 CE 10 A5, VEX_Vgf2p8affineqb_xmm_xmm_xmmm128_imm8, VEX, AVX;GFNI, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt8
# vgf2p8affineqb ymm2,ymm6,ymm3,0A5h
C4E3CD CE D3 A5, VEX_Vgf2p8affineqb_ymm_ymm_ymmm256_imm8, VEX, AVX;GFNI, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3
# vgf2p8affineqb ymm2,ymm6,[rax],0A5h
C4E3CD CE 10 A5, VEX_Vgf2p8affineqb_ymm_ymm_ymmm256_imm8, VEX, AVX;GFNI, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt8
# vgf2p8affineqb xmm2,xmm6,[rax+10h],0A5h
62 F3CD08 CE 50 01 A5, EVEX_Vgf2p8affineqb_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;GFNI, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vgf2p8affineqb xmm2{k3},xmm6,[rax+10h],0A5h
62 F3CD0B CE 50 01 A5, EVEX_Vgf2p8affineqb_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;GFNI, op0=rw op1=r op2=r op3=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8 r=k3
# vgf2p8affineqb xmm2{k5}{z},xmm6,qword bcst [rax+8],0A5h
62 F3CD9D CE 50 01 A5, EVEX_Vgf2p8affineqb_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;GFNI, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x8;Broadcast128_UInt64 r=k5
# vgf2p8affineqb ymm2,ymm6,[rax+20h],0A5h
62 F3CD28 CE 50 01 A5, EVEX_Vgf2p8affineqb_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;GFNI, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vgf2p8affineqb ymm2{k3},ymm6,[rax+20h],0A5h
62 F3CD2B CE 50 01 A5, EVEX_Vgf2p8affineqb_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;GFNI, op0=rw op1=r op2=r op3=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8 r=k3
# vgf2p8affineqb ymm2{k5}{z},ymm6,qword bcst [rax+8],0A5h
62 F3CDBD CE 50 01 A5, EVEX_Vgf2p8affineqb_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;GFNI, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x8;Broadcast256_UInt64 r=k5
# vgf2p8affineqb zmm2,zmm6,[rax+40h],0A5h
62 F3CD48 CE 50 01 A5, EVEX_Vgf2p8affineqb_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512F;GFNI, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vgf2p8affineqb zmm2{k3},zmm6,[rax+40h],0A5h
62 F3CD4B CE 50 01 A5, EVEX_Vgf2p8affineqb_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512F;GFNI, op0=rcw op1=r op2=r op3=r r=zmm2 cw=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8 r=k3
# vgf2p8affineqb zmm2{k5}{z},zmm6,qword bcst [rax+8],0A5h
62 F3CDDD CE 50 01 A5, EVEX_Vgf2p8affineqb_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512F;GFNI, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x8;Broadcast512_UInt64 r=k5
# gf2p8affineinvqb xmm1,xmm5,0A5h
66 0F3ACF CD A5, Gf2p8affineinvqb_xmm_xmmm128_imm8, Legacy, GFNI, op0=rw op1=r op2=r rw=xmm1 r=xmm5
# gf2p8affineinvqb xmm1,[rax],0A5h
66 0F3ACF 08 A5, Gf2p8affineinvqb_xmm_xmmm128_imm8, Legacy, GFNI, op0=rw op1=r op2=r rw=xmm1 r=rax rm=ds:rax;Packed128_UInt8
# vgf2p8affineinvqb xmm2,xmm6,xmm3,0A5h
C4E3C9 CF D3 A5, VEX_Vgf2p8affineinvqb_xmm_xmm_xmmm128_imm8, VEX, AVX;GFNI, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=xmm3
# vgf2p8affineinvqb xmm2,xmm6,[rax],0A5h
C4E3C9 CF 10 A5, VEX_Vgf2p8affineinvqb_xmm_xmm_xmmm128_imm8, VEX, AVX;GFNI, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_UInt8
# vgf2p8affineinvqb ymm2,ymm6,ymm3,0A5h
C4E3CD CF D3 A5, VEX_Vgf2p8affineinvqb_ymm_ymm_ymmm256_imm8, VEX, AVX;GFNI, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=ymm3
# vgf2p8affineinvqb ymm2,ymm6,[rax],0A5h
C4E3CD CF 10 A5, VEX_Vgf2p8affineinvqb_ymm_ymm_ymmm256_imm8, VEX, AVX;GFNI, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_UInt8
# vgf2p8affineinvqb xmm2,xmm6,[rax+10h],0A5h
62 F3CD08 CF 50 01 A5, EVEX_Vgf2p8affineinvqb_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;GFNI, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8
# vgf2p8affineinvqb xmm2{k3},xmm6,[rax+10h],0A5h
62 F3CD0B CF 50 01 A5, EVEX_Vgf2p8affineinvqb_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;GFNI, op0=rw op1=r op2=r op3=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax+0x10;Packed128_UInt8 r=k3
# vgf2p8affineinvqb xmm2{k5}{z},xmm6,qword bcst [rax+8],0A5h
62 F3CD9D CF 50 01 A5, EVEX_Vgf2p8affineinvqb_xmm_k1z_xmm_xmmm128b64_imm8, EVEX, AVX512VL;GFNI, op0=w op1=r op2=r op3=r w=vmm2 r=xmm6 r=rax rm=ds:rax+0x8;Broadcast128_UInt64 r=k5
# vgf2p8affineinvqb ymm2,ymm6,[rax+20h],0A5h
62 F3CD28 CF 50 01 A5, EVEX_Vgf2p8affineinvqb_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;GFNI, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8
# vgf2p8affineinvqb ymm2{k3},ymm6,[rax+20h],0A5h
62 F3CD2B CF 50 01 A5, EVEX_Vgf2p8affineinvqb_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;GFNI, op0=rw op1=r op2=r op3=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax+0x20;Packed256_UInt8 r=k3
# vgf2p8affineinvqb ymm2{k5}{z},ymm6,qword bcst [rax+8],0A5h
62 F3CDBD CF 50 01 A5, EVEX_Vgf2p8affineinvqb_ymm_k1z_ymm_ymmm256b64_imm8, EVEX, AVX512VL;GFNI, op0=w op1=r op2=r op3=r w=vmm2 r=ymm6 r=rax rm=ds:rax+0x8;Broadcast256_UInt64 r=k5
# vgf2p8affineinvqb zmm2,zmm6,[rax+40h],0A5h
62 F3CD48 CF 50 01 A5, EVEX_Vgf2p8affineinvqb_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512F;GFNI, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8
# vgf2p8affineinvqb zmm2{k3},zmm6,[rax+40h],0A5h
62 F3CD4B CF 50 01 A5, EVEX_Vgf2p8affineinvqb_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512F;GFNI, op0=rcw op1=r op2=r op3=r r=zmm2 cw=vmm2 r=zmm6 r=rax rm=ds:rax+0x40;Packed512_UInt8 r=k3
# vgf2p8affineinvqb zmm2{k5}{z},zmm6,qword bcst [rax+8],0A5h
62 F3CDDD CF 50 01 A5, EVEX_Vgf2p8affineinvqb_zmm_k1z_zmm_zmmm512b64_imm8, EVEX, AVX512F;GFNI, op0=w op1=r op2=r op3=r w=vmm2 r=zmm6 r=rax rm=ds:rax+0x8;Broadcast512_UInt64 r=k5
# sub cl,cl
28 C9, Sub_rm8_r8, Legacy, INTEL8086, fc=acos fs=pz op0=w op1=n w=cl
# sub cx,cx
66 29 C9, Sub_rm16_r16, Legacy, INTEL8086, fc=acos fs=pz op0=w op1=n w=cx
# sub ecx,ecx
29 C9, Sub_rm32_r32, Legacy, INTEL386, fc=acos fs=pz op0=w op1=n w=rcx
# sub rcx,rcx
48 29 C9, Sub_rm64_r64, Legacy, X64, fc=acos fs=pz op0=w op1=n w=rcx
# sub cl,cl
2A C9, Sub_r8_rm8, Legacy, INTEL8086, fc=acos fs=pz op0=w op1=n w=cl
# sub cx,cx
66 2B C9, Sub_r16_rm16, Legacy, INTEL8086, fc=acos fs=pz op0=w op1=n w=cx
# sub ecx,ecx
2B C9, Sub_r32_rm32, Legacy, INTEL386, fc=acos fs=pz op0=w op1=n w=rcx
# sub rcx,rcx
48 2B C9, Sub_r64_rm64, Legacy, X64, fc=acos fs=pz op0=w op1=n w=rcx
# xor cl,cl
30 C9, Xor_rm8_r8, Legacy, INTEL8086, fc=cos fs=pz fu=a op0=w op1=n w=cl
# xor cx,cx
66 31 C9, Xor_rm16_r16, Legacy, INTEL8086, fc=cos fs=pz fu=a op0=w op1=n w=cx
# xor ecx,ecx
31 C9, Xor_rm32_r32, Legacy, INTEL386, fc=cos fs=pz fu=a op0=w op1=n w=rcx
# xor rcx,rcx
48 31 C9, Xor_rm64_r64, Legacy, X64, fc=cos fs=pz fu=a op0=w op1=n w=rcx
# xor cl,cl
32 C9, Xor_r8_rm8, Legacy, INTEL8086, fc=cos fs=pz fu=a op0=w op1=n w=cl
# xor cx,cx
66 33 C9, Xor_r16_rm16, Legacy, INTEL8086, fc=cos fs=pz fu=a op0=w op1=n w=cx
# xor ecx,ecx
33 C9, Xor_r32_rm32, Legacy, INTEL386, fc=cos fs=pz fu=a op0=w op1=n w=rcx
# xor rcx,rcx
48 33 C9, Xor_r64_rm64, Legacy, X64, fc=cos fs=pz fu=a op0=w op1=n w=rcx
# xorps xmm1,xmm1
0F 57 C9, Xorps_xmm_xmmm128, Legacy, SSE, op0=w op1=n w=xmm1
# vxorps xmm1,xmm2,xmm2
C5E8 57 CA, VEX_Vxorps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=n op2=n w=vmm1
# vxorps ymm1,ymm2,ymm2
C5EC 57 CA, VEX_Vxorps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=n op2=n w=vmm1
# vxorps xmm1{k3}{z},xmm2,xmm2
62 F16C8B 57 CA, EVEX_Vxorps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=n op2=n w=vmm1 r=k3
# vxorps xmm1{k3},xmm2,xmm2
62 F16C0B 57 CA, EVEX_Vxorps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=rw op1=n op2=n r=xmm1 w=vmm1 r=k3
# vxorps xmm1,xmm2,xmm2
62 F16C08 57 CA, EVEX_Vxorps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=n op2=n w=vmm1
# vxorps ymm1{k3}{z},ymm2,ymm2
62 F16CAB 57 CA, EVEX_Vxorps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=n op2=n w=vmm1 r=k3
# vxorps ymm1{k3},ymm2,ymm2
62 F16C2B 57 CA, EVEX_Vxorps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512DQ, op0=rw op1=n op2=n r=ymm1 w=vmm1 r=k3
# vxorps ymm1,ymm2,ymm2
62 F16C28 57 CA, EVEX_Vxorps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512DQ, op0=w op1=n op2=n w=vmm1
# vxorps zmm1{k3}{z},zmm2,zmm2
62 F16CCB 57 CA, EVEX_Vxorps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512DQ, op0=w op1=n op2=n w=vmm1 r=k3
# vxorps zmm1{k3},zmm2,zmm2
62 F16C4B 57 CA, EVEX_Vxorps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512DQ, op0=rcw op1=n op2=n r=zmm1 cw=vmm1 r=k3
# vxorps zmm1,zmm2,zmm2
62 F16C48 57 CA, EVEX_Vxorps_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512DQ, op0=w op1=n op2=n w=vmm1
# xorpd xmm1,xmm1
66 0F 57 C9, Xorpd_xmm_xmmm128, Legacy, SSE2, op0=w op1=n w=xmm1
# vxorpd xmm1,xmm2,xmm2
C5E9 57 CA, VEX_Vxorpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=n op2=n w=vmm1
# vxorpd ymm1,ymm2,ymm2
C5ED 57 CA, VEX_Vxorpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=n op2=n w=vmm1
# vxorpd xmm1{k3},xmm2,xmm2
62 F1ED0B 57 CA, EVEX_Vxorpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=n op2=n r=xmm1 w=vmm1 r=k3
# vxorpd xmm1,xmm2,xmm2
62 F1ED08 57 CA, EVEX_Vxorpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=n op2=n w=vmm1
# vxorpd xmm1{k3}{z},xmm2,xmm2
62 F1ED8B 57 CA, EVEX_Vxorpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=n op2=n w=vmm1 r=k3
# vxorpd ymm1,ymm2,ymm2
62 F1ED28 57 CA, EVEX_Vxorpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=n op2=n w=vmm1
# vxorpd ymm1{k3}{z},ymm2,ymm2
62 F1EDAB 57 CA, EVEX_Vxorpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=w op1=n op2=n w=vmm1 r=k3
# vxorpd ymm1{k3},ymm2,ymm2
62 F1ED2B 57 CA, EVEX_Vxorpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512DQ, op0=rw op1=n op2=n r=ymm1 w=vmm1 r=k3
# vxorpd zmm1,zmm2,zmm2
62 F1ED48 57 CA, EVEX_Vxorpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512DQ, op0=w op1=n op2=n w=vmm1
# vxorpd zmm1{k3},zmm2,zmm2
62 F1ED4B 57 CA, EVEX_Vxorpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512DQ, op0=rcw op1=n op2=n r=zmm1 cw=vmm1 r=k3
# vxorpd zmm1{k3}{z},zmm2,zmm2
62 F1EDCB 57 CA, EVEX_Vxorpd_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512DQ, op0=w op1=n op2=n w=vmm1 r=k3
# subps xmm1,xmm1
0F 5C C9, Subps_xmm_xmmm128, Legacy, SSE, op0=w op1=n w=xmm1
# vsubps xmm1,xmm2,xmm2
C5E8 5C CA, VEX_Vsubps_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=n op2=n w=vmm1
# vsubps ymm1,ymm2,ymm2
C5EC 5C CA, VEX_Vsubps_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=n op2=n w=vmm1
# vsubps xmm1{k3}{z},xmm2,xmm2
62 F16C8B 5C CA, EVEX_Vsubps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=n op2=n w=vmm1 r=k3
# vsubps xmm1,xmm2,xmm2
62 F16C08 5C CA, EVEX_Vsubps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=n op2=n w=vmm1
# vsubps xmm1{k3},xmm2,xmm2
62 F16C0B 5C CA, EVEX_Vsubps_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=n op2=n r=xmm1 w=vmm1 r=k3
# vsubps ymm1{k3}{z},ymm2,ymm2
62 F16CAB 5C CA, EVEX_Vsubps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=n op2=n w=vmm1 r=k3
# vsubps ymm1{k3},ymm2,ymm2
62 F16C2B 5C CA, EVEX_Vsubps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=n op2=n r=ymm1 w=vmm1 r=k3
# vsubps ymm1,ymm2,ymm2
62 F16C28 5C CA, EVEX_Vsubps_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=n op2=n w=vmm1
# vsubps zmm1{k3}{z},zmm2,zmm2
62 F16CCB 5C CA, EVEX_Vsubps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=w op1=n op2=n w=vmm1 r=k3
# vsubps zmm1{k3},zmm2,zmm2
62 F16C4B 5C CA, EVEX_Vsubps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=rcw op1=n op2=n r=zmm1 cw=vmm1 r=k3
# vsubps zmm1,zmm2,zmm2
62 F16C48 5C CA, EVEX_Vsubps_zmm_k1z_zmm_zmmm512b32_er, EVEX, AVX512F, op0=w op1=n op2=n w=vmm1
# subpd xmm1,xmm1
66 0F 5C C9, Subpd_xmm_xmmm128, Legacy, SSE2, op0=w op1=n w=xmm1
# vsubpd xmm1,xmm2,xmm2
C5E9 5C CA, VEX_Vsubpd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=n op2=n w=vmm1
# vsubpd ymm1,ymm2,ymm2
C5ED 5C CA, VEX_Vsubpd_ymm_ymm_ymmm256, VEX, AVX, op0=w op1=n op2=n w=vmm1
# vsubpd xmm1,xmm2,xmm2
62 F1ED08 5C CA, EVEX_Vsubpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=n op2=n w=vmm1
# vsubpd xmm1{k3}{z},xmm2,xmm2
62 F1ED8B 5C CA, EVEX_Vsubpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=n op2=n w=vmm1 r=k3
# vsubpd xmm1{k3},xmm2,xmm2
62 F1ED0B 5C CA, EVEX_Vsubpd_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=n op2=n r=xmm1 w=vmm1 r=k3
# vsubpd ymm1{k3},ymm2,ymm2
62 F1ED2B 5C CA, EVEX_Vsubpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=n op2=n r=ymm1 w=vmm1 r=k3
# vsubpd ymm1,ymm2,ymm2
62 F1ED28 5C CA, EVEX_Vsubpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=n op2=n w=vmm1
# vsubpd ymm1{k3}{z},ymm2,ymm2
62 F1EDAB 5C CA, EVEX_Vsubpd_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=n op2=n w=vmm1 r=k3
# vsubpd zmm1,zmm2,zmm2
62 F1ED48 5C CA, EVEX_Vsubpd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=w op1=n op2=n w=vmm1
# vsubpd zmm1{k3},zmm2,zmm2
62 F1ED4B 5C CA, EVEX_Vsubpd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=rcw op1=n op2=n r=zmm1 cw=vmm1 r=k3
# vsubpd zmm1{k3}{z},zmm2,zmm2
62 F1EDCB 5C CA, EVEX_Vsubpd_zmm_k1z_zmm_zmmm512b64_er, EVEX, AVX512F, op0=w op1=n op2=n w=vmm1 r=k3
# psubusb mm1,mm1
0F D8 C9, Psubusb_mm_mmm64, Legacy, MMX, op0=w op1=n w=mm1
# psubusb xmm1,xmm1
66 0F D8 C9, Psubusb_xmm_xmmm128, Legacy, SSE2, op0=w op1=n w=xmm1
# vpsubusb xmm1,xmm2,xmm2
C5E9 D8 CA, VEX_Vpsubusb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=n op2=n w=vmm1
# vpsubusb ymm1,ymm2,ymm2
C5ED D8 CA, VEX_Vpsubusb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=n op2=n w=vmm1
# vpsubusb xmm1,xmm2,xmm2
62 F16D08 D8 CA, EVEX_Vpsubusb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=n op2=n w=vmm1
# vpsubusb xmm1{k3},xmm2,xmm2
62 F16D0B D8 CA, EVEX_Vpsubusb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=n op2=n r=xmm1 w=vmm1 r=k3
# vpsubusb xmm1{k3}{z},xmm2,xmm2
62 F16D8B D8 CA, EVEX_Vpsubusb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=n op2=n w=vmm1 r=k3
# vpsubusb ymm1,ymm2,ymm2
62 F16D28 D8 CA, EVEX_Vpsubusb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=n op2=n w=vmm1
# vpsubusb ymm1{k3},ymm2,ymm2
62 F16D2B D8 CA, EVEX_Vpsubusb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=n op2=n r=ymm1 w=vmm1 r=k3
# vpsubusb ymm1{k3}{z},ymm2,ymm2
62 F16DAB D8 CA, EVEX_Vpsubusb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=n op2=n w=vmm1 r=k3
# vpsubusb zmm1,zmm2,zmm2
62 F16D48 D8 CA, EVEX_Vpsubusb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=n op2=n w=vmm1
# vpsubusb zmm1{k3},zmm2,zmm2
62 F16D4B D8 CA, EVEX_Vpsubusb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=n op2=n r=zmm1 cw=vmm1 r=k3
# vpsubusb zmm1{k3}{z},zmm2,zmm2
62 F16DCB D8 CA, EVEX_Vpsubusb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=n op2=n w=vmm1 r=k3
# psubusw mm1,mm1
0F D9 C9, Psubusw_mm_mmm64, Legacy, MMX, op0=w op1=n w=mm1
# psubusw xmm1,xmm1
66 0F D9 C9, Psubusw_xmm_xmmm128, Legacy, SSE2, op0=w op1=n w=xmm1
# vpsubusw xmm1,xmm2,xmm2
C5E9 D9 CA, VEX_Vpsubusw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=n op2=n w=vmm1
# vpsubusw ymm1,ymm2,ymm2
C5ED D9 CA, VEX_Vpsubusw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=n op2=n w=vmm1
# vpsubusw xmm1{k3}{z},xmm2,xmm2
62 F16D8B D9 CA, EVEX_Vpsubusw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=n op2=n w=vmm1 r=k3
# vpsubusw xmm1{k3},xmm2,xmm2
62 F16D0B D9 CA, EVEX_Vpsubusw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=n op2=n r=xmm1 w=vmm1 r=k3
# vpsubusw xmm1,xmm2,xmm2
62 F16D08 D9 CA, EVEX_Vpsubusw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=n op2=n w=vmm1
# vpsubusw ymm1{k3}{z},ymm2,ymm2
62 F16DAB D9 CA, EVEX_Vpsubusw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=n op2=n w=vmm1 r=k3
# vpsubusw ymm1{k3},ymm2,ymm2
62 F16D2B D9 CA, EVEX_Vpsubusw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=n op2=n r=ymm1 w=vmm1 r=k3
# vpsubusw ymm1,ymm2,ymm2
62 F16D28 D9 CA, EVEX_Vpsubusw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=n op2=n w=vmm1
# vpsubusw zmm1{k3}{z},zmm2,zmm2
62 F16DCB D9 CA, EVEX_Vpsubusw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=n op2=n w=vmm1 r=k3
# vpsubusw zmm1{k3},zmm2,zmm2
62 F16D4B D9 CA, EVEX_Vpsubusw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=n op2=n r=zmm1 cw=vmm1 r=k3
# vpsubusw zmm1,zmm2,zmm2
62 F16D48 D9 CA, EVEX_Vpsubusw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=n op2=n w=vmm1
# psubsb mm1,mm1
0F E8 C9, Psubsb_mm_mmm64, Legacy, MMX, op0=w op1=n w=mm1
# psubsb xmm1,xmm1
66 0F E8 C9, Psubsb_xmm_xmmm128, Legacy, SSE2, op0=w op1=n w=xmm1
# vpsubsb xmm1,xmm2,xmm2
C5E9 E8 CA, VEX_Vpsubsb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=n op2=n w=vmm1
# vpsubsb ymm1,ymm2,ymm2
C5ED E8 CA, VEX_Vpsubsb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=n op2=n w=vmm1
# vpsubsb xmm1,xmm2,xmm2
62 F16D08 E8 CA, EVEX_Vpsubsb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=n op2=n w=vmm1
# vpsubsb xmm1{k3}{z},xmm2,xmm2
62 F16D8B E8 CA, EVEX_Vpsubsb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=n op2=n w=vmm1 r=k3
# vpsubsb xmm1{k3},xmm2,xmm2
62 F16D0B E8 CA, EVEX_Vpsubsb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=n op2=n r=xmm1 w=vmm1 r=k3
# vpsubsb ymm1{k3}{z},ymm2,ymm2
62 F16DAB E8 CA, EVEX_Vpsubsb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=n op2=n w=vmm1 r=k3
# vpsubsb ymm1{k3},ymm2,ymm2
62 F16D2B E8 CA, EVEX_Vpsubsb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=n op2=n r=ymm1 w=vmm1 r=k3
# vpsubsb ymm1,ymm2,ymm2
62 F16D28 E8 CA, EVEX_Vpsubsb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=n op2=n w=vmm1
# vpsubsb zmm1{k3}{z},zmm2,zmm2
62 F16DCB E8 CA, EVEX_Vpsubsb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=n op2=n w=vmm1 r=k3
# vpsubsb zmm1{k3},zmm2,zmm2
62 F16D4B E8 CA, EVEX_Vpsubsb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=n op2=n r=zmm1 cw=vmm1 r=k3
# vpsubsb zmm1,zmm2,zmm2
62 F16D48 E8 CA, EVEX_Vpsubsb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=n op2=n w=vmm1
# psubsw mm1,mm1
0F E9 C9, Psubsw_mm_mmm64, Legacy, MMX, op0=w op1=n w=mm1
# psubsw xmm1,xmm1
66 0F E9 C9, Psubsw_xmm_xmmm128, Legacy, SSE2, op0=w op1=n w=xmm1
# vpsubsw xmm1,xmm2,xmm2
C5E9 E9 CA, VEX_Vpsubsw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=n op2=n w=vmm1
# vpsubsw ymm1,ymm2,ymm2
C5ED E9 CA, VEX_Vpsubsw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=n op2=n w=vmm1
# vpsubsw xmm1,xmm2,xmm2
62 F16D08 E9 CA, EVEX_Vpsubsw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=n op2=n w=vmm1
# vpsubsw xmm1{k3}{z},xmm2,xmm2
62 F16D8B E9 CA, EVEX_Vpsubsw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=n op2=n w=vmm1 r=k3
# vpsubsw xmm1{k3},xmm2,xmm2
62 F16D0B E9 CA, EVEX_Vpsubsw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=n op2=n r=xmm1 w=vmm1 r=k3
# vpsubsw ymm1,ymm2,ymm2
62 F16D28 E9 CA, EVEX_Vpsubsw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=n op2=n w=vmm1
# vpsubsw ymm1{k3}{z},ymm2,ymm2
62 F16DAB E9 CA, EVEX_Vpsubsw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=n op2=n w=vmm1 r=k3
# vpsubsw ymm1{k3},ymm2,ymm2
62 F16D2B E9 CA, EVEX_Vpsubsw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=n op2=n r=ymm1 w=vmm1 r=k3
# vpsubsw zmm1{k3}{z},zmm2,zmm2
62 F16DCB E9 CA, EVEX_Vpsubsw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=n op2=n w=vmm1 r=k3
# vpsubsw zmm1{k3},zmm2,zmm2
62 F16D4B E9 CA, EVEX_Vpsubsw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=n op2=n r=zmm1 cw=vmm1 r=k3
# vpsubsw zmm1,zmm2,zmm2
62 F16D48 E9 CA, EVEX_Vpsubsw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=n op2=n w=vmm1
# pxor mm1,mm1
0F EF C9, Pxor_mm_mmm64, Legacy, MMX, op0=w op1=n w=mm1
# pxor xmm1,xmm1
66 0F EF C9, Pxor_xmm_xmmm128, Legacy, SSE2, op0=w op1=n w=xmm1
# vpxor xmm1,xmm2,xmm2
C5E9 EF CA, VEX_Vpxor_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=n op2=n w=vmm1
# vpxor ymm1,ymm2,ymm2
C5ED EF CA, VEX_Vpxor_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=n op2=n w=vmm1
# vpxord xmm1{k3}{z},xmm2,xmm2
62 F16D8B EF CA, EVEX_Vpxord_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=n op2=n w=vmm1 r=k3
# vpxord xmm1{k3},xmm2,xmm2
62 F16D0B EF CA, EVEX_Vpxord_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=n op2=n r=xmm1 w=vmm1 r=k3
# vpxord xmm1,xmm2,xmm2
62 F16D08 EF CA, EVEX_Vpxord_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=n op2=n w=vmm1
# vpxord ymm1,ymm2,ymm2
62 F16D28 EF CA, EVEX_Vpxord_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=n op2=n w=vmm1
# vpxord ymm1{k3},ymm2,ymm2
62 F16D2B EF CA, EVEX_Vpxord_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=n op2=n r=ymm1 w=vmm1 r=k3
# vpxord ymm1{k3}{z},ymm2,ymm2
62 F16DAB EF CA, EVEX_Vpxord_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=n op2=n w=vmm1 r=k3
# vpxord zmm1,zmm2,zmm2
62 F16D48 EF CA, EVEX_Vpxord_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=n op2=n w=vmm1
# vpxord zmm1{k3},zmm2,zmm2
62 F16D4B EF CA, EVEX_Vpxord_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=n op2=n r=zmm1 cw=vmm1 r=k3
# vpxord zmm1{k3}{z},zmm2,zmm2
62 F16DCB EF CA, EVEX_Vpxord_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=n op2=n w=vmm1 r=k3
# vpxorq xmm1{k3},xmm2,xmm2
62 F1ED0B EF CA, EVEX_Vpxorq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=n op2=n r=xmm1 w=vmm1 r=k3
# vpxorq xmm1,xmm2,xmm2
62 F1ED08 EF CA, EVEX_Vpxorq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=n op2=n w=vmm1
# vpxorq xmm1{k3}{z},xmm2,xmm2
62 F1ED8B EF CA, EVEX_Vpxorq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=n op2=n w=vmm1 r=k3
# vpxorq ymm1{k3}{z},ymm2,ymm2
62 F1EDAB EF CA, EVEX_Vpxorq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=n op2=n w=vmm1 r=k3
# vpxorq ymm1{k3},ymm2,ymm2
62 F1ED2B EF CA, EVEX_Vpxorq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=n op2=n r=ymm1 w=vmm1 r=k3
# vpxorq ymm1,ymm2,ymm2
62 F1ED28 EF CA, EVEX_Vpxorq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=n op2=n w=vmm1
# vpxorq zmm1{k3},zmm2,zmm2
62 F1ED4B EF CA, EVEX_Vpxorq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=n op2=n r=zmm1 cw=vmm1 r=k3
# vpxorq zmm1{k3}{z},zmm2,zmm2
62 F1EDCB EF CA, EVEX_Vpxorq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=n op2=n w=vmm1 r=k3
# vpxorq zmm1,zmm2,zmm2
62 F1ED48 EF CA, EVEX_Vpxorq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=n op2=n w=vmm1
# psubb mm1,mm1
0F F8 C9, Psubb_mm_mmm64, Legacy, MMX, op0=w op1=n w=mm1
# psubb xmm1,xmm1
66 0F F8 C9, Psubb_xmm_xmmm128, Legacy, SSE2, op0=w op1=n w=xmm1
# vpsubb xmm1,xmm2,xmm2
C5E9 F8 CA, VEX_Vpsubb_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=n op2=n w=vmm1
# vpsubb ymm1,ymm2,ymm2
C5ED F8 CA, VEX_Vpsubb_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=n op2=n w=vmm1
# vpsubb xmm1{k3}{z},xmm2,xmm2
62 F16D8B F8 CA, EVEX_Vpsubb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=n op2=n w=vmm1 r=k3
# vpsubb xmm1{k3},xmm2,xmm2
62 F16D0B F8 CA, EVEX_Vpsubb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=n op2=n r=xmm1 w=vmm1 r=k3
# vpsubb xmm1,xmm2,xmm2
62 F16D08 F8 CA, EVEX_Vpsubb_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=n op2=n w=vmm1
# vpsubb ymm1{k3}{z},ymm2,ymm2
62 F16DAB F8 CA, EVEX_Vpsubb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=n op2=n w=vmm1 r=k3
# vpsubb ymm1{k3},ymm2,ymm2
62 F16D2B F8 CA, EVEX_Vpsubb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=n op2=n r=ymm1 w=vmm1 r=k3
# vpsubb ymm1,ymm2,ymm2
62 F16D28 F8 CA, EVEX_Vpsubb_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=n op2=n w=vmm1
# vpsubb zmm1,zmm2,zmm2
62 F16D48 F8 CA, EVEX_Vpsubb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=n op2=n w=vmm1
# vpsubb zmm1{k3}{z},zmm2,zmm2
62 F16DCB F8 CA, EVEX_Vpsubb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=n op2=n w=vmm1 r=k3
# vpsubb zmm1{k3},zmm2,zmm2
62 F16D4B F8 CA, EVEX_Vpsubb_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=n op2=n r=zmm1 cw=vmm1 r=k3
# psubw mm1,mm1
0F F9 C9, Psubw_mm_mmm64, Legacy, MMX, op0=w op1=n w=mm1
# psubw xmm1,xmm1
66 0F F9 C9, Psubw_xmm_xmmm128, Legacy, SSE2, op0=w op1=n w=xmm1
# vpsubw xmm1,xmm2,xmm2
C5E9 F9 CA, VEX_Vpsubw_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=n op2=n w=vmm1
# vpsubw ymm1,ymm2,ymm2
C5ED F9 CA, VEX_Vpsubw_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=n op2=n w=vmm1
# vpsubw xmm1{k3},xmm2,xmm2
62 F16D0B F9 CA, EVEX_Vpsubw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=rw op1=n op2=n r=xmm1 w=vmm1 r=k3
# vpsubw xmm1{k3}{z},xmm2,xmm2
62 F16D8B F9 CA, EVEX_Vpsubw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=n op2=n w=vmm1 r=k3
# vpsubw xmm1,xmm2,xmm2
62 F16D08 F9 CA, EVEX_Vpsubw_xmm_k1z_xmm_xmmm128, EVEX, AVX512VL;AVX512BW, op0=w op1=n op2=n w=vmm1
# vpsubw ymm1,ymm2,ymm2
62 F16D28 F9 CA, EVEX_Vpsubw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=n op2=n w=vmm1
# vpsubw ymm1{k3},ymm2,ymm2
62 F16D2B F9 CA, EVEX_Vpsubw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=rw op1=n op2=n r=ymm1 w=vmm1 r=k3
# vpsubw ymm1{k3}{z},ymm2,ymm2
62 F16DAB F9 CA, EVEX_Vpsubw_ymm_k1z_ymm_ymmm256, EVEX, AVX512VL;AVX512BW, op0=w op1=n op2=n w=vmm1 r=k3
# vpsubw zmm1,zmm2,zmm2
62 F16D48 F9 CA, EVEX_Vpsubw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=n op2=n w=vmm1
# vpsubw zmm1{k3},zmm2,zmm2
62 F16D4B F9 CA, EVEX_Vpsubw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=rcw op1=n op2=n r=zmm1 cw=vmm1 r=k3
# vpsubw zmm1{k3}{z},zmm2,zmm2
62 F16DCB F9 CA, EVEX_Vpsubw_zmm_k1z_zmm_zmmm512, EVEX, AVX512BW, op0=w op1=n op2=n w=vmm1 r=k3
# psubd mm1,mm1
0F FA C9, Psubd_mm_mmm64, Legacy, MMX, op0=w op1=n w=mm1
# psubd xmm1,xmm1
66 0F FA C9, Psubd_xmm_xmmm128, Legacy, SSE2, op0=w op1=n w=xmm1
# vpsubd xmm1,xmm2,xmm2
C5E9 FA CA, VEX_Vpsubd_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=n op2=n w=vmm1
# vpsubd ymm1,ymm2,ymm2
C5ED FA CA, VEX_Vpsubd_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=n op2=n w=vmm1
# vpsubd xmm1,xmm2,xmm2
62 F16D08 FA CA, EVEX_Vpsubd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=n op2=n w=vmm1
# vpsubd xmm1{k3},xmm2,xmm2
62 F16D0B FA CA, EVEX_Vpsubd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=rw op1=n op2=n r=xmm1 w=vmm1 r=k3
# vpsubd xmm1{k3}{z},xmm2,xmm2
62 F16D8B FA CA, EVEX_Vpsubd_xmm_k1z_xmm_xmmm128b32, EVEX, AVX512VL;AVX512F, op0=w op1=n op2=n w=vmm1 r=k3
# vpsubd ymm1{k3}{z},ymm2,ymm2
62 F16DAB FA CA, EVEX_Vpsubd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=n op2=n w=vmm1 r=k3
# vpsubd ymm1{k3},ymm2,ymm2
62 F16D2B FA CA, EVEX_Vpsubd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=rw op1=n op2=n r=ymm1 w=vmm1 r=k3
# vpsubd ymm1,ymm2,ymm2
62 F16D28 FA CA, EVEX_Vpsubd_ymm_k1z_ymm_ymmm256b32, EVEX, AVX512VL;AVX512F, op0=w op1=n op2=n w=vmm1
# vpsubd zmm1,zmm2,zmm2
62 F16D48 FA CA, EVEX_Vpsubd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=n op2=n w=vmm1
# vpsubd zmm1{k3},zmm2,zmm2
62 F16D4B FA CA, EVEX_Vpsubd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=rcw op1=n op2=n r=zmm1 cw=vmm1 r=k3
# vpsubd zmm1{k3}{z},zmm2,zmm2
62 F16DCB FA CA, EVEX_Vpsubd_zmm_k1z_zmm_zmmm512b32, EVEX, AVX512F, op0=w op1=n op2=n w=vmm1 r=k3
# psubq mm1,mm1
0F FB C9, Psubq_mm_mmm64, Legacy, SSE2, op0=w op1=n w=mm1
# psubq xmm1,xmm1
66 0F FB C9, Psubq_xmm_xmmm128, Legacy, SSE2, op0=w op1=n w=xmm1
# vpsubq xmm1,xmm2,xmm2
C5E9 FB CA, VEX_Vpsubq_xmm_xmm_xmmm128, VEX, AVX, op0=w op1=n op2=n w=vmm1
# vpsubq ymm1,ymm2,ymm2
C5ED FB CA, VEX_Vpsubq_ymm_ymm_ymmm256, VEX, AVX2, op0=w op1=n op2=n w=vmm1
# vpsubq xmm1,xmm2,xmm2
62 F1ED08 FB CA, EVEX_Vpsubq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=n op2=n w=vmm1
# vpsubq xmm1{k3},xmm2,xmm2
62 F1ED0B FB CA, EVEX_Vpsubq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=rw op1=n op2=n r=xmm1 w=vmm1 r=k3
# vpsubq xmm1{k3}{z},xmm2,xmm2
62 F1ED8B FB CA, EVEX_Vpsubq_xmm_k1z_xmm_xmmm128b64, EVEX, AVX512VL;AVX512F, op0=w op1=n op2=n w=vmm1 r=k3
# vpsubq ymm1,ymm2,ymm2
62 F1ED28 FB CA, EVEX_Vpsubq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=n op2=n w=vmm1
# vpsubq ymm1{k3},ymm2,ymm2
62 F1ED2B FB CA, EVEX_Vpsubq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=rw op1=n op2=n r=ymm1 w=vmm1 r=k3
# vpsubq ymm1{k3}{z},ymm2,ymm2
62 F1EDAB FB CA, EVEX_Vpsubq_ymm_k1z_ymm_ymmm256b64, EVEX, AVX512VL;AVX512F, op0=w op1=n op2=n w=vmm1 r=k3
# vpsubq zmm1,zmm2,zmm2
62 F1ED48 FB CA, EVEX_Vpsubq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=n op2=n w=vmm1
# vpsubq zmm1{k3},zmm2,zmm2
62 F1ED4B FB CA, EVEX_Vpsubq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=rcw op1=n op2=n r=zmm1 cw=vmm1 r=k3
# vpsubq zmm1{k3}{z},zmm2,zmm2
62 F1EDCB FB CA, EVEX_Vpsubq_zmm_k1z_zmm_zmmm512b64, EVEX, AVX512F, op0=w op1=n op2=n w=vmm1 r=k3
# fs monitor eax,rcx,rdx
64 67 0F01 C8, Monitord, Legacy, MONITOR, r=eax;ecx;edx;fs
# fs monitor rax,rcx,rdx
64 0F01 C8, Monitorq, Legacy, MONITOR, r=rax;ecx;edx;fs
# fs monitorx eax,rcx,rdx
64 67 0F01 FA, Monitorxd, Legacy, MONITORX, r=eax;ecx;edx;fs
# fs monitorx rax,rcx,rdx
64 0F01 FA, Monitorxq, Legacy, MONITORX, r=rax;ecx;edx;fs
# fs clzero
64 67 0F01 FC, Clzerod, Legacy, CLZERO, r=eax;fs
# fs clzero
64 0F01 FC, Clzeroq, Legacy, CLZERO, r=rax;fs
# rep montmul
F3 0FA6 C0, Montmul_64, Legacy, PADLOCK_PMM, crm=es:rsi;Unknown cr=rsi cw=rdx r=rcx cr=eax cw=rax;rcx
# rep montmul
67 F3 0FA6 C0, Montmul_32, Legacy, PADLOCK_PMM, crm=es:esi;Unknown cr=esi cw=rdx r=ecx cr=eax cw=rax;rcx
# rep xsha1
F3 0FA6 C8, Xsha1_64, Legacy, PADLOCK_PHE, crm=es:rdi;Unknown cwm=es:rdi;Unknown crm=es:rsi;Unknown cr=rsi;rdi cw=rsi rcw=rax;rcx
# rep xsha1
67 F3 0FA6 C8, Xsha1_32, Legacy, PADLOCK_PHE, crm=es:edi;Unknown cwm=es:edi;Unknown crm=es:esi;Unknown cr=esi;edi cw=rsi r=eax;ecx cw=rax;rcx
# rep xsha256
F3 0FA6 D0, Xsha256_64, Legacy, PADLOCK_PHE, crm=es:rdi;Unknown cwm=es:rdi;Unknown crm=es:rsi;Unknown cr=rsi;rdi cw=rsi rcw=rax;rcx
# rep xsha256
67 F3 0FA6 D0, Xsha256_32, Legacy, PADLOCK_PHE, crm=es:edi;Unknown cwm=es:edi;Unknown crm=es:esi;Unknown cr=esi;edi cw=rsi r=eax;ecx cw=rax;rcx
# rep xstore
F3 0FA7 C0, Xstore_64, Legacy, PADLOCK_RNG, cwm=es:rdi;Unknown cr=rdi cw=rdi cr=edx cw=rax rcw=rcx
# rep xstore
67 F3 0FA7 C0, Xstore_32, Legacy, PADLOCK_RNG, cwm=es:edi;Unknown cr=edi cw=rdi cr=edx cw=rax r=ecx cw=rcx
# xstore
0FA7 C0, Xstore_64, Legacy, PADLOCK_RNG, wm=es:rdi;Unknown rw=rdi r=edx w=rax
# xstore
67 0FA7 C0, Xstore_32, Legacy, PADLOCK_RNG, wm=es:edi;Unknown r=edi w=rdi r=edx w=rax
# rep xcryptecb
F3 0FA7 C8, Xcryptecb_64, Legacy, PADLOCK_ACE, cwm=es:rdi;Unknown crm=es:rdx;Unknown crm=es:rbx;Unknown crm=es:rsi;Unknown cr=rdx;rbx;rsi;rdi cw=rsi;rdi rcw=rcx
# rep xcryptecb
67 F3 0FA7 C8, Xcryptecb_32, Legacy, PADLOCK_ACE, cwm=es:edi;Unknown crm=es:edx;Unknown crm=es:ebx;Unknown crm=es:esi;Unknown cr=edx;ebx;esi;edi cw=rsi;rdi r=ecx cw=rcx
# rep xcryptcbc
F3 0FA7 D0, Xcryptcbc_64, Legacy, PADLOCK_ACE, cwm=es:rdi;Unknown crm=es:rax;Unknown cwm=es:rax;Unknown crm=es:rdx;Unknown crm=es:rbx;Unknown crm=es:rsi;Unknown cr=rax;rdx;rbx;rsi;rdi cw=rsi;rdi rcw=rcx
# rep xcryptcbc
67 F3 0FA7 D0, Xcryptcbc_32, Legacy, PADLOCK_ACE, cwm=es:edi;Unknown crm=es:eax;Unknown cwm=es:eax;Unknown crm=es:edx;Unknown crm=es:ebx;Unknown crm=es:esi;Unknown cr=eax;edx;ebx;esi;edi cw=rsi;rdi r=ecx cw=rcx
# rep xcryptctr
F3 0FA7 D8, Xcryptctr_64, Legacy, PADLOCK_ACE, cwm=es:rdi;Unknown crm=es:rax;Unknown cwm=es:rax;Unknown crm=es:rdx;Unknown crm=es:rbx;Unknown crm=es:rsi;Unknown cr=rax;rdx;rbx;rsi;rdi cw=rsi;rdi rcw=rcx
# rep xcryptctr
67 F3 0FA7 D8, Xcryptctr_32, Legacy, PADLOCK_ACE, cwm=es:edi;Unknown crm=es:eax;Unknown cwm=es:eax;Unknown crm=es:edx;Unknown crm=es:ebx;Unknown crm=es:esi;Unknown cr=eax;edx;ebx;esi;edi cw=rsi;rdi r=ecx cw=rcx
# rep xcryptcfb
F3 0FA7 E0, Xcryptcfb_64, Legacy, PADLOCK_ACE, cwm=es:rdi;Unknown crm=es:rax;Unknown cwm=es:rax;Unknown crm=es:rdx;Unknown crm=es:rbx;Unknown crm=es:rsi;Unknown cr=rax;rdx;rbx;rsi;rdi cw=rsi;rdi rcw=rcx
# rep xcryptcfb
67 F3 0FA7 E0, Xcryptcfb_32, Legacy, PADLOCK_ACE, cwm=es:edi;Unknown crm=es:eax;Unknown cwm=es:eax;Unknown crm=es:edx;Unknown crm=es:ebx;Unknown crm=es:esi;Unknown cr=eax;edx;ebx;esi;edi cw=rsi;rdi r=ecx cw=rcx
# rep xcryptofb
F3 0FA7 E8, Xcryptofb_64, Legacy, PADLOCK_ACE, cwm=es:rdi;Unknown crm=es:rax;Unknown cwm=es:rax;Unknown crm=es:rdx;Unknown crm=es:rbx;Unknown crm=es:rsi;Unknown cr=rax;rdx;rbx;rsi;rdi cw=rsi;rdi rcw=rcx
# rep xcryptofb
67 F3 0FA7 E8, Xcryptofb_32, Legacy, PADLOCK_ACE, cwm=es:edi;Unknown crm=es:eax;Unknown cwm=es:eax;Unknown crm=es:edx;Unknown crm=es:ebx;Unknown crm=es:esi;Unknown cr=eax;edx;ebx;esi;edi cw=rsi;rdi r=ecx cw=rcx
# db 66h
66, DeclareByte, Legacy, INTEL8086, flow=Exception special
# dw 4466h
6644, DeclareWord, Legacy, INTEL8086, flow=Exception special
# dd 0EE224466h
664422EE, DeclareDword, Legacy, INTEL8086, flow=Exception special
# dq 78563412EE224466h
664422EE12345678, DeclareQword, Legacy, INTEL8086, flow=Exception special
# rmpadjust
F3 0F 01 FE, Rmpadjust, Legacy, SEV_SNP, priv fw=oszap rw=rax r=rcx;rdx
# rmpadjust
64 F3 0F 01 FE, Rmpadjust, Legacy, SEV_SNP, priv fw=oszap rw=rax r=rcx;rdx
# rmpupdate
F2 0F 01 FE, Rmpupdate, Legacy, SEV_SNP, priv fw=oszap rw=rax r=rcx rm=ds:rcx;UInt128
# rmpupdate fs:
64 F2 0F 01 FE, Rmpupdate, Legacy, SEV_SNP, priv fw=oszap rw=rax r=rcx;fs rm=fs:rcx;UInt128
# psmash
F3 0F 01 FF, Psmash, Legacy, SEV_SNP, priv fw=oszap rw=rax
# psmash
64 F3 0F 01 FF, Psmash, Legacy, SEV_SNP, priv fw=oszap rw=rax
# pvalidate eax
67 F2 0F 01 FF, Pvalidated, Legacy, SEV_SNP, priv fw=oszacp r=eax;ecx;edx w=rax
# pvalidate eax
64 67 F2 0F 01 FF, Pvalidated, Legacy, SEV_SNP, priv fw=oszacp r=eax;ecx;edx w=rax
# pvalidate rax
F2 0F 01 FF, Pvalidateq, Legacy, SEV_SNP, priv fw=oszacp r=ecx;edx rw=rax
# pvalidate rax
64 F2 0F 01 FF, Pvalidateq, Legacy, SEV_SNP, priv fw=oszacp r=ecx;edx rw=rax
# serialize
0F 01 E8, Serialize, Legacy, SERIALIZE,
# xsusldtrk
F2 0F 01 E8, Xsusldtrk, Legacy, TSXLDTRK,
# xresldtrk
F2 0F 01 E9, Xresldtrk, Legacy, TSXLDTRK,
# invlpgb eax
67 0F 01 FE, Invlpgbd, Legacy, INVLPGB, priv r=eax;edx;ecx
# invlpgb rax
0F 01 FE, Invlpgbq, Legacy, INVLPGB, priv r=rax;edx;ecx
# tlbsync
0F 01 FF, Tlbsync, Legacy, INVLPGB, priv
# ud0
0FFF, Ud0, Legacy, INTEL286, flow=Exception decopt=AMD
# vmgexit
F3 0F01 D9, Vmgexit, Legacy, SEV_ES, flow=Call
# vmgexit
F2 0F01 D9, Vmgexit_F2, Legacy, SEV_ES, flow=Call
# ldtilecfg [rax]
C4E278 49 00, VEX_Ldtilecfg_m512, VEX, AMX_TILE, op0=r r=rax rm=ds:rax;Tilecfg w=tmm0;tmm1;tmm2;tmm3;tmm4;tmm5;tmm6;tmm7
# tilerelease
C4E278 49 C0, VEX_Tilerelease, VEX, AMX_TILE, w=tmm0;tmm1;tmm2;tmm3;tmm4;tmm5;tmm6;tmm7
# sttilecfg [rax]
C4E279 49 00, VEX_Sttilecfg_m512, VEX, AMX_TILE, op0=w r=rax wm=ds:rax;Tilecfg
# tilezero tmm2
C4E27B 49 D0, VEX_Tilezero_tmm, VEX, AMX_TILE, op0=w w=tmm2
# tileloaddt1 tmm2,[rcx+rdx*4]
C4E279 4B 14 91, VEX_Tileloaddt1_tmm_sibmem, VEX, AMX_TILE, op0=w op1=r w=tmm2 r=rcx;rdx rm=ds:rcx;Tile
# tileloaddt1 tmm6,[rdx-5AA5EDCCh]
C4E279 4B B4 22 34125AA5, VEX_Tileloaddt1_tmm_sibmem, VEX, AMX_TILE, op0=w op1=r w=tmm6 r=rdx rm=ds:rdx+0xFFFFFFFFA55A1234;Tile
# tilestored [rcx+rdx*4],tmm2
C4E27A 4B 14 91, VEX_Tilestored_sibmem_tmm, VEX, AMX_TILE, op0=w op1=r r=tmm2;rcx;rdx wm=ds:rcx;Tile
# tilestored [rdx-5AA5EDCCh],tmm6
C4E27A 4B B4 22 34125AA5, VEX_Tilestored_sibmem_tmm, VEX, AMX_TILE, op0=w op1=r r=tmm6;rdx wm=ds:rdx+0xFFFFFFFFA55A1234;Tile
# tileloadd tmm2,[rcx+rdx*4]
C4E27B 4B 14 91, VEX_Tileloadd_tmm_sibmem, VEX, AMX_TILE, op0=w op1=r w=tmm2 r=rcx;rdx rm=ds:rcx;Tile
# tileloadd tmm6,[rdx-5AA5EDCCh]
C4E27B 4B B4 22 34125AA5, VEX_Tileloadd_tmm_sibmem, VEX, AMX_TILE, op0=w op1=r w=tmm6 r=rdx rm=ds:rdx+0xFFFFFFFFA55A1234;Tile
# tdpbf16ps tmm2,tmm3,tmm4
C4E25A 5C D3, VEX_Tdpbf16ps_tmm_tmm_tmm, VEX, AMX_BF16, op0=rw op1=r op2=r rw=tmm2 r=tmm3;tmm4
# tdpbuud tmm2,tmm3,tmm4
C4E258 5E D3, VEX_Tdpbuud_tmm_tmm_tmm, VEX, AMX_INT8, op0=rw op1=r op2=r rw=tmm2 r=tmm3;tmm4
# tdpbusd tmm2,tmm3,tmm4
C4E259 5E D3, VEX_Tdpbusd_tmm_tmm_tmm, VEX, AMX_INT8, op0=rw op1=r op2=r rw=tmm2 r=tmm3;tmm4
# tdpbsud tmm2,tmm3,tmm4
C4E25A 5E D3, VEX_Tdpbsud_tmm_tmm_tmm, VEX, AMX_INT8, op0=rw op1=r op2=r rw=tmm2 r=tmm3;tmm4
# tdpbssd tmm2,tmm3,tmm4
C4E25B 5E D3, VEX_Tdpbssd_tmm_tmm_tmm, VEX, AMX_INT8, op0=rw op1=r op2=r rw=tmm2 r=tmm3;tmm4
# tdcall
66 0F01 CC, Tdcall, Legacy, TDX, priv flow=Call
# seamret
66 0F01 CD, Seamret, Legacy, TDX, priv fc=aops fw=cz flow=Call
# seamops
66 0F01 CE, Seamops, Legacy, TDX, priv fc=caops fw=z rw=rax cr=rcx;rdx;r8;r9
# seamcall
66 0F01 CF, Seamcall, Legacy, TDX, priv fc=zaops fw=c flow=Call r=rax
# aesencwide128kl [rax]
F3 0F38 D8 00, Aesencwide128kl_m384, Legacy, AESKLE;WIDE_KL, fc=acops fw=z op0=r r=rax rm=ds:rax;KLHandleAes128 rw=xmm0;xmm1;xmm2;xmm3;xmm4;xmm5;xmm6;xmm7
# aesdecwide128kl [rax]
F3 0F38 D8 08, Aesdecwide128kl_m384, Legacy, AESKLE;WIDE_KL, fc=acops fw=z op0=r r=rax rm=ds:rax;KLHandleAes128 rw=xmm0;xmm1;xmm2;xmm3;xmm4;xmm5;xmm6;xmm7
# aesencwide256kl [rax]
F3 0F38 D8 10, Aesencwide256kl_m512, Legacy, AESKLE;WIDE_KL, fc=acops fw=z op0=r r=rax rm=ds:rax;KLHandleAes256 rw=xmm0;xmm1;xmm2;xmm3;xmm4;xmm5;xmm6;xmm7
# aesdecwide256kl [rax]
F3 0F38 D8 18, Aesdecwide256kl_m512, Legacy, AESKLE;WIDE_KL, fc=acops fw=z op0=r r=rax rm=ds:rax;KLHandleAes256 rw=xmm0;xmm1;xmm2;xmm3;xmm4;xmm5;xmm6;xmm7
# loadiwkey xmm2,xmm3
F3 0F38 DC D3, Loadiwkey_xmm_xmm, Legacy, KL, priv fc=acops fw=z op0=r op1=r r=xmm2;xmm3;eax;xmm0
# aesenc128kl xmm2,[rax]
F3 0F38 DC 10, Aesenc128kl_xmm_m384, Legacy, AESKLE, fc=acops fw=z op0=rw op1=r rw=xmm2 r=rax rm=ds:rax;KLHandleAes128
# aesdec128kl xmm2,[rax]
F3 0F38 DD 10, Aesdec128kl_xmm_m384, Legacy, AESKLE, fc=acops fw=z op0=rw op1=r rw=xmm2 r=rax rm=ds:rax;KLHandleAes128
# aesenc256kl xmm2,[rax]
F3 0F38 DE 10, Aesenc256kl_xmm_m512, Legacy, AESKLE, fc=acops fw=z op0=rw op1=r rw=xmm2 r=rax rm=ds:rax;KLHandleAes256
# aesdec256kl xmm2,[rax]
F3 0F38 DF 10, Aesdec256kl_xmm_m512, Legacy, AESKLE, fc=acops fw=z op0=rw op1=r rw=xmm2 r=rax rm=ds:rax;KLHandleAes256
# encodekey128 edx,ebx
F3 0F38 FA D3, Encodekey128_r32_r32, Legacy, AESKLE, fc=acopsz op0=w op1=r w=rdx r=ebx rw=xmm0 w=xmm1;xmm2;xmm4;xmm5;xmm6
# encodekey256 edx,ebx
F3 0F38 FB D3, Encodekey256_r32_r32, Legacy, AESKLE, fc=acopsz op0=w op1=r w=rdx r=ebx rw=xmm0;xmm1 w=xmm2;xmm3;xmm4;xmm5;xmm6
# uiret
F3 0F01 EC, Uiret, Legacy, UINTR, flow=Return fw=acopszdA fs=u w=rsp r=xsp rm=ss:xsp;UInt64 rm=ss:xsp+8;UInt64 rm=ss:xsp+0x10;UInt64 stack=24
# testui
F3 0F01 ED, Testui, Legacy, UINTR, fr=u fw=c fc=aopsz
# clui
F3 0F01 EE, Clui, Legacy, UINTR, fc=u
# stui
F3 0F01 EF, Stui, Legacy, UINTR, fs=u
# senduipi rcx
F3 0FC7 F1, Senduipi_r64, Legacy, UINTR, op0=r r=rcx
# hreset 0A5h
F3 0F3A F0C0 A5, Hreset_imm8, Legacy, HRESET, priv op0=n r=eax
# vpdpbusd xmm2,xmm6,xmm3
C4E249 50 D3, VEX_Vpdpbusd_xmm_xmm_xmmm128, VEX, AVX_VNNI, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=xmm3
# vpdpbusd xmm2,xmm6,[rax]
C4E249 50 10, VEX_Vpdpbusd_xmm_xmm_xmmm128, VEX, AVX_VNNI, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int8
# vpdpbusd ymm2,ymm6,ymm3
C4E24D 50 D3, VEX_Vpdpbusd_ymm_ymm_ymmm256, VEX, AVX_VNNI, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=ymm3
# vpdpbusd ymm2,ymm6,[rax]
C4E24D 50 10, VEX_Vpdpbusd_ymm_ymm_ymmm256, VEX, AVX_VNNI, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int8
# vpdpbusds xmm2,xmm6,xmm3
C4E249 51 D3, VEX_Vpdpbusds_xmm_xmm_xmmm128, VEX, AVX_VNNI, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=xmm3
# vpdpbusds xmm2,xmm6,[rax]
C4E249 51 10, VEX_Vpdpbusds_xmm_xmm_xmmm128, VEX, AVX_VNNI, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int8
# vpdpbusds ymm2,ymm6,ymm3
C4E24D 51 D3, VEX_Vpdpbusds_ymm_ymm_ymmm256, VEX, AVX_VNNI, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=ymm3
# vpdpbusds ymm2,ymm6,[rax]
C4E24D 51 10, VEX_Vpdpbusds_ymm_ymm_ymmm256, VEX, AVX_VNNI, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int8
# vpdpwssd xmm2,xmm6,xmm3
C4E249 52 D3, VEX_Vpdpwssd_xmm_xmm_xmmm128, VEX, AVX_VNNI, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=xmm3
# vpdpwssd xmm2,xmm6,[rax]
C4E249 52 10, VEX_Vpdpwssd_xmm_xmm_xmmm128, VEX, AVX_VNNI, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int16
# vpdpwssd ymm2,ymm6,ymm3
C4E24D 52 D3, VEX_Vpdpwssd_ymm_ymm_ymmm256, VEX, AVX_VNNI, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=ymm3
# vpdpwssd ymm2,ymm6,[rax]
C4E24D 52 10, VEX_Vpdpwssd_ymm_ymm_ymmm256, VEX, AVX_VNNI, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int16
# vpdpwssds xmm2,xmm6,xmm3
C4E249 53 D3, VEX_Vpdpwssds_xmm_xmm_xmmm128, VEX, AVX_VNNI, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=xmm3
# vpdpwssds xmm2,xmm6,[rax]
C4E249 53 10, VEX_Vpdpwssds_xmm_xmm_xmmm128, VEX, AVX_VNNI, op0=rw op1=r op2=r r=xmm2 w=vmm2 r=xmm6 r=rax rm=ds:rax;Packed128_Int16
# vpdpwssds ymm2,ymm6,ymm3
C4E24D 53 D3, VEX_Vpdpwssds_ymm_ymm_ymmm256, VEX, AVX_VNNI, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=ymm3
# vpdpwssds ymm2,ymm6,[rax]
C4E24D 53 10, VEX_Vpdpwssds_ymm_ymm_ymmm256, VEX, AVX_VNNI, op0=rw op1=r op2=r r=ymm2 w=vmm2 r=ymm6 r=rax rm=ds:rax;Packed256_Int16
# rep ccs_hash
F3 0FA6 E8, Ccs_hash_64, Legacy, PADLOCK_GMI, crm=es:rdi;Unknown cwm=es:rdi;Unknown crm=es:rsi;Unknown cr=rsi;rdi cw=rsi rcw=rax;rcx cr=rbx
# rep ccs_hash
67 F3 0FA6 E8, Ccs_hash_32, Legacy, PADLOCK_GMI, crm=es:edi;Unknown cwm=es:edi;Unknown crm=es:esi;Unknown cr=esi;edi cw=rsi r=eax;ecx cw=rax;rcx cr=ebx
# rep ccs_encrypt
67 F3 0FA7 F0, Ccs_encrypt_32, Legacy, PADLOCK_GMI, crm=es:edx;Unknown crm=es:ebx;Unknown crm=es:esi;Unknown cwm=es:edi;Unknown cr=edx;ebx;esi;edi cw=rsi;rdi r=ecx cw=rcx cr=eax
# rep ccs_encrypt
F3 0FA7 F0, Ccs_encrypt_64, Legacy, PADLOCK_GMI, crm=es:rdx;Unknown crm=es:rbx;Unknown crm=es:rsi;Unknown cwm=es:rdi;Unknown cr=rdx;rbx;rsi;rdi cw=rsi;rdi rcw=rcx cr=rax
# lkgs cx
F2 66 0F00 F1, Lkgs_rm16, Legacy, LKGS, priv op0=r r=cx w=gs
# lkgs word ptr [rax]
F2 66 0F00 30, Lkgs_rm16, Legacy, LKGS, priv op0=r r=rax w=gs rm=ds:rax;UInt16
# lkgs ecx
F2 0F00 F1, Lkgs_r32m16, Legacy, LKGS, priv op0=r r=cx w=gs
# lkgs word ptr [rax]
F2 0F00 30, Lkgs_r32m16, Legacy, LKGS, priv op0=r r=rax w=gs rm=ds:rax;UInt16
# lkgs rcx
F2 48 0F00 F1, Lkgs_r64m16, Legacy, LKGS, priv op0=r r=cx w=gs
# lkgs word ptr [rax]
F2 48 0F00 30, Lkgs_r64m16, Legacy, LKGS, priv op0=r r=rax w=gs rm=ds:rax;UInt16
# eretu
F3 0F 01 CA, Eretu, Legacy, FRED, priv flow=Return fw=acopszidA w=cs;ss;rsp rw=xsp rm=ss:xsp;UInt64 rm=ss:xsp+8;UInt64 rm=ss:xsp+0x10;UInt64 rm=ss:xsp+0x18;UInt64 rm=ss:xsp+0x20;UInt64 stack=40
# erets
F2 0F 01 CA, Erets, Legacy, FRED, priv flow=Return fw=acopszidA w=rsp rw=xsp rm=ss:xsp;UInt64 rm=ss:xsp+8;UInt64 rm=ss:xsp+0x10;UInt64 rm=ss:xsp+0x18;UInt64 rm=ss:xsp+0x20;UInt64 stack=40
