# C6.2.1 ADC page C6-1144 line 67905 MATCH x1a000000/mask=x7fe0fc00
# C6.2.2 ADCS page C6-1146 line 67991 MATCH x3a000000/mask=x7fe0fc00
# CONSTRUCT x1a000000/mask=xdfe0fc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x1a000000/mask=xdfe0fc00 --status pass --comment "flags"

:adc^SBIT_CZNO Rd_GPR32, Rn_GPR32, Rm_GPR32
is sf=0 & b_30=0 & S & SBIT_CZNO & b_2428=0x1a & b_2123=0 & Rm_GPR32 & b_1015=0 & Rd_GPR32 & Rd_GPR64 & Rn_GPR32
{
	add_with_carry_flags(Rn_GPR32, Rm_GPR32);
	tmp:4 = Rm_GPR32 + Rn_GPR32 + zext(CY);
	Rd_GPR64 = zext(tmp);
	resultflags(tmp);
	build SBIT_CZNO;
}

# C6.2.1 ADC page C6-1144 line 67905 MATCH x1a000000/mask=x7fe0fc00
# C6.2.2 ADCS page C6-1146 line 67991 MATCH x3a000000/mask=x7fe0fc00
# CONSTRUCT x9a000000/mask=xdfe0fc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x9a000000/mask=xdfe0fc00 --status pass --comment "flags"

:adc^SBIT_CZNO Rd_GPR64, Rn_GPR64, Rm_GPR64
is sf=1 & b_30=0 & S & SBIT_CZNO & b_2428=0x1a & b_2123=0 & Rm_GPR64 & b_1015=0 & Rd_GPR64 & Rn_GPR64
{
	add_with_carry_flags(Rn_GPR64, Rm_GPR64);
	Rd_GPR64 = Rn_GPR64 + Rm_GPR64 + zext(CY);
	resultflags(Rd_GPR64);
	build SBIT_CZNO;
}

# C6.2.3 ADD (extended register) page C6-1148 line 68081 MATCH x0b200000/mask=x7fe00000
# C6.2.7 ADDS (extended register) page C6-1156 line 68516 MATCH x2b200000/mask=x7fe00000
# C6.2.59 CMN (extended register) page C6-1246 line 73092 MATCH x2b20001f/mask=x7fe0001f
# CONSTRUCT x0b200000/mask=xdfe00000 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst x0b200000/mask=xdfe00000 --status pass --comment "flags"

:add^SBIT_CZNO Rd_GPR32wsp, Rn_GPR32wsp, ExtendRegShift32
is sf=0 & op=0 & S & SBIT_CZNO & b_2428=0xb & opt=0 & b_2121=1 & ExtendRegShift32 & Rn_GPR32wsp & Rd_GPR32wsp & Rd_GPR64xsp
{
	tmp_2:4 = ExtendRegShift32;
	addflags(Rn_GPR32wsp, tmp_2);
	tmp_1:4 = Rn_GPR32wsp + tmp_2;
	resultflags(tmp_1);
	Rd_GPR64xsp = zext(tmp_1);
	build SBIT_CZNO;
}

# C6.2.3 ADD (extended register) page C6-1148 line 68081 MATCH x0b200000/mask=x7fe00000
# C6.2.7 ADDS (extended register) page C6-1156 line 68516 MATCH x2b200000/mask=x7fe00000
# C6.2.59 CMN (extended register) page C6-1246 line 73092 MATCH x2b20001f/mask=x7fe0001f
# CONSTRUCT x8b200000/mask=xdfe00000 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst x8b200000/mask=xdfe00000 --status pass --comment "flags"

:add^SBIT_CZNO Rd_GPR64xsp, Rn_GPR64xsp, ExtendRegShift64
is sf=1 & op=0 & S & SBIT_CZNO & b_2428=0xb & opt=0 & b_2121=1 & ExtendRegShift64 & Rn_GPR64xsp & Rd_GPR64xsp
{
	tmp_2:8 = ExtendRegShift64;
	addflags(Rn_GPR64xsp, tmp_2);
	tmp_1:8 = Rn_GPR64xsp + tmp_2;
	resultflags(tmp_1);
	Rd_GPR64xsp = tmp_1;
	build SBIT_CZNO;
}

# C6.2.4 ADD (immediate) page C6-1151 line 68228 MATCH x11000000/mask=x7f800000
# C6.2.8 ADDS (immediate) page C6-1159 line 68669 MATCH x31000000/mask=x7f800000
# C6.2.60 CMN (immediate) page C6-1248 line 73219 MATCH x3100001f/mask=x7f80001f
# C6.2.220 MOV (to/from SP) page C6-1668 line 98876 MATCH x11000000/mask=x7ffffc00
# CONSTRUCT x11000000/mask=xdf000000 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst x11000000/mask=xdf000000 --status pass --comment "flags"

:add^SBIT_CZNO Rd_GPR32xsp, Rn_GPR32xsp, ImmShift32
is sf=0 & b_30=0 & S & SBIT_CZNO & b_2428=0x011 & ImmShift32 & Rn_GPR32xsp & Rd_GPR32xsp & Rd_GPR64xsp
{
	addflags(Rn_GPR32xsp, ImmShift32);
	tmp:4 = Rn_GPR32xsp + ImmShift32;
	resultflags(tmp);
	build SBIT_CZNO;
	Rd_GPR64xsp = zext(tmp);
}

# C6.2.4 ADD (immediate) page C6-1151 line 68228 MATCH x11000000/mask=x7f800000
# C6.2.8 ADDS (immediate) page C6-1159 line 68669 MATCH x31000000/mask=x7f800000
# C6.2.60 CMN (immediate) page C6-1248 line 73219 MATCH x3100001f/mask=x7f80001f
# C6.2.220 MOV (to/from SP) page C6-1668 line 98876 MATCH x11000000/mask=x7ffffc00
# CONSTRUCT x91000000/mask=xdf000000 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst x91000000/mask=xdf000000 --status pass --comment "flags"

:add^SBIT_CZNO Rd_GPR64xsp, Rn_GPR64xsp, ImmShift64
is sf=1 & b_30=0 & S & SBIT_CZNO & b_2428=0x11 & ImmShift64 & Rn_GPR64xsp & Rd_GPR64xsp
{
	addflags(Rn_GPR64xsp, ImmShift64);
	Rd_GPR64xsp = Rn_GPR64xsp + ImmShift64;
	resultflags(Rd_GPR64xsp);
	build SBIT_CZNO;
}

# C6.2.4 ADD (immediate) page C6-1151 line 68228 MATCH x11000000/mask=x7f800000
# C6.2.8 ADDS (immediate) page C6-1159 line 68669 MATCH x31000000/mask=x7f800000
# C6.2.60 CMN (immediate) page C6-1248 line 73219 MATCH x3100001f/mask=x7f80001f
# C6.2.220 MOV (to/from SP) page C6-1668 line 98876 MATCH x11000000/mask=x7ffffc00
# CONSTRUCT x11000000/mask=xdfc00000 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst x11000000/mask=xdfc00000 --status pass --comment "flags"

:add^SBIT_CZNO Rd_GPR32wsp, Rn_GPR32wsp, Imm12_addsubimm_operand_i32_posimm_lsl0
is sf=0 & op=0 & S & SBIT_CZNO & b_2428=0x11 & shift=0 & Imm12_addsubimm_operand_i32_posimm_lsl0 & Rn_GPR32wsp & Rd_GPR32wsp & Rd_GPR64xsp
{
	tmp_2:4 = Imm12_addsubimm_operand_i32_posimm_lsl0;
	addflags(Rn_GPR32wsp, tmp_2);
	tmp_1:4 = Rn_GPR32wsp + tmp_2;
	resultflags(tmp_1);
	Rd_GPR64xsp = zext(tmp_1);
	build SBIT_CZNO;
}

# C6.2.4 ADD (immediate) page C6-1151 line 68228 MATCH x11000000/mask=x7f800000
# C6.2.8 ADDS (immediate) page C6-1159 line 68669 MATCH x31000000/mask=x7f800000
# C6.2.60 CMN (immediate) page C6-1248 line 73219 MATCH x3100001f/mask=x7f80001f
# CONSTRUCT x11400000/mask=xdfc00000 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst x11400000/mask=xdfc00000 --status pass --comment "flags"

:add^SBIT_CZNO Rd_GPR32wsp, Rn_GPR32wsp, Imm12_addsubimm_operand_i32_posimm_lsl12
is sf=0 & op=0 & S & SBIT_CZNO & b_2428=0x11 & shift=1 & Imm12_addsubimm_operand_i32_posimm_lsl12 & Rn_GPR32wsp & Rd_GPR32wsp & Rd_GPR64xsp
{
	tmp_2:4 = Imm12_addsubimm_operand_i32_posimm_lsl12;
	addflags(Rn_GPR32wsp, tmp_2);
	tmp_1:4 = Rn_GPR32wsp + tmp_2;
	resultflags(tmp_1);
	Rd_GPR64xsp = zext(tmp_1);
	build SBIT_CZNO;
}

# C6.2.4 ADD (immediate) page C6-1151 line 68228 MATCH x11000000/mask=x7f800000
# C6.2.8 ADDS (immediate) page C6-1159 line 68669 MATCH x31000000/mask=x7f800000
# C6.2.60 CMN (immediate) page C6-1248 line 73219 MATCH x3100001f/mask=x7f80001f
# C6.2.220 MOV (to/from SP) page C6-1668 line 98876 MATCH x11000000/mask=x7ffffc00
# CONSTRUCT x91000000/mask=xdfc00000 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst x91000000/mask=xdfc00000 --status pass --comment "flags"

:add^SBIT_CZNO Rd_GPR64xsp, Rn_GPR64xsp, Imm12_addsubimm_operand_i64_posimm_lsl0
is sf=1 & op=0 & S & SBIT_CZNO & b_2428=0x11 & shift=0 & Imm12_addsubimm_operand_i64_posimm_lsl0 & Rn_GPR64xsp & Rd_GPR64xsp
{
	tmp_2:8 = Imm12_addsubimm_operand_i64_posimm_lsl0;
	addflags(Rn_GPR64xsp, tmp_2);
	tmp_1:8 = Rn_GPR64xsp + tmp_2;
	resultflags(tmp_1);
	Rd_GPR64xsp = tmp_1;
	build SBIT_CZNO;
}

# C6.2.4 ADD (immediate) page C6-1151 line 68228 MATCH x11000000/mask=x7f800000
# C6.2.8 ADDS (immediate) page C6-1159 line 68669 MATCH x31000000/mask=x7f800000
# C6.2.60 CMN (immediate) page C6-1248 line 73219 MATCH x3100001f/mask=x7f80001f
# CONSTRUCT x91400000/mask=xdfc00000 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst x91400000/mask=xdfc00000 --status pass --comment "flags"

:add^SBIT_CZNO Rd_GPR64xsp, Rn_GPR64xsp, Imm12_addsubimm_operand_i64_posimm_lsl12
is sf=1 & op=0 & S & SBIT_CZNO & b_2428=0x11 & shift=1 & Imm12_addsubimm_operand_i64_posimm_lsl12 & Rn_GPR64xsp & Rd_GPR64xsp
{
	tmp_2:8 = Imm12_addsubimm_operand_i64_posimm_lsl12;
	addflags(Rn_GPR64xsp, tmp_2);
	tmp_1:8 = Rn_GPR64xsp + tmp_2;
	resultflags(tmp_1);
	Rd_GPR64xsp = tmp_1;
	build SBIT_CZNO;
}

# C6.2.5 ADD (shifted register) page C6-1153 line 68340 MATCH x0b000000/mask=x7f200000
# C6.2.9 ADDS (shifted register) page C6-1161 line 68775 MATCH x2b000000/mask=x7f200000
# C6.2.61 CMN (shifted register) page C6-1250 line 73309 MATCH x2b00001f/mask=x7f20001f
# CONSTRUCT x0b000000/mask=xdf208000 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst x0b000000/mask=xdf208000 --status pass --comment "flags"
# if shift == '11' then ReservedValue();

:add^SBIT_CZNO Rd_GPR32, Rn_GPR32, RegShift32
is sf=0 & op=0 & S & SBIT_CZNO & b_2428=0xb & b_2121=0 & b_15=0 & RegShift32 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp_2:4 = RegShift32;
	addflags(Rn_GPR32, tmp_2);
	tmp_1:4 = Rn_GPR32 + tmp_2;
	resultflags(tmp_1);
	Rd_GPR64 = zext(tmp_1);
	build SBIT_CZNO;
}

# C6.2.5 ADD (shifted register) page C6-1153 line 68340 MATCH x0b000000/mask=x7f200000
# C6.2.9 ADDS (shifted register) page C6-1161 line 68775 MATCH x2b000000/mask=x7f200000
# C6.2.61 CMN (shifted register) page C6-1250 line 73309 MATCH x2b00001f/mask=x7f20001f
# CONSTRUCT x8b000000/mask=xdf200000 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst x8b000000/mask=xdf200000 --status pass --comment "flags"

:add^SBIT_CZNO Rd_GPR64, Rn_GPR64, RegShift64
is sf=1 & op=0 & S & SBIT_CZNO & b_2428=0xb & b_2121=0 & RegShift64 & Rn_GPR64 & Rd_GPR64
{
	tmp_2:8 = RegShift64;
	addflags(Rn_GPR64, tmp_2);
	tmp_1:8 = Rn_GPR64 + tmp_2;
	resultflags(tmp_1);
	Rd_GPR64 = tmp_1;
	build SBIT_CZNO;
}

# C6.2.10 ADR page C6-1163 line 68896 MATCH x10000000/mask=x9f000000
# CONSTRUCT x10000000/mask=x9f000000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x10000000/mask=x9f000000 --status nodest --comment "qemuerr(illegal addresses cause qemu exit)"

:adr Rd_GPR64, AdrReloff
is b_31=0 & AdrReloff & b_2428=0x10 & Rd_GPR64
{
	Rd_GPR64 = &AdrReloff;
}

# C6.2.11 ADRP page C6-1164 line 68943 MATCH x90000000/mask=x9f000000
# CONSTRUCT x90000000/mask=x9f000000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x90000000/mask=x9f000000 --status nodest --comment "qemuerr(illegal addresses cause qemu exit)"

:adrp Rd_GPR64, AdrReloff
is b_31=1 & AdrReloff & b_2428=0x10 & Rd_GPR64
{
	Rd_GPR64 = &AdrReloff;
}

# C6.2.12 AND (immediate) page C6-1165 line 68992 MATCH x12000000/mask=x7f800000
# CONSTRUCT x12000000/mask=xff800000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x12000000/mask=xff800000 --status pass

:and Rd_GPR32wsp, Rn_GPR32, DecodeWMask32
is sf=0 & opc=0 & b_2428=0x12 & b_2323=0 & DecodeWMask32 & Rn_GPR32 & Rd_GPR32wsp & Rd_GPR64xsp
{
	tmp_1:4 = Rn_GPR32 & DecodeWMask32;
	Rd_GPR64xsp = zext(tmp_1);
}

# C6.2.12 AND (immediate) page C6-1165 line 68992 MATCH x12000000/mask=x7f800000
# CONSTRUCT x92000000/mask=xff800000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x92000000/mask=xff800000 --status pass

:and Rd_GPR64xsp, Rn_GPR64, DecodeWMask64
is sf=1 & opc=0 & b_2428=0x12 & b_2323=0 & DecodeWMask64 & Rn_GPR64 & Rd_GPR64xsp
{
	tmp_1:8 = Rn_GPR64 & DecodeWMask64;
	Rd_GPR64xsp = tmp_1;
}

# C6.2.13 AND (shifted register) page C6-1167 line 69083 MATCH x0a000000/mask=x7f200000
# CONSTRUCT x0a000000/mask=xff200000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x0a000000/mask=xff200000 --status pass

:and Rd_GPR32, Rn_GPR32, RegShift32Log
is sf=0 & opc=0 & b_2428=0xa & N=0 & RegShift32Log & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp_2:4 = RegShift32Log;
	tmp_1:4 = Rn_GPR32 & tmp_2;
	Rd_GPR64 = zext(tmp_1);
}

# C6.2.13 AND (shifted register) page C6-1167 line 69083 MATCH x0a000000/mask=x7f200000
# CONSTRUCT x8a000000/mask=xff200000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x8a000000/mask=xff200000 --status pass

:and Rd_GPR64, Rn_GPR64, RegShift64Log
is sf=1 & opc=0 & b_2428=0xa & N=0 & RegShift64Log & Rn_GPR64 & Rd_GPR64
{
	tmp_2:8 = RegShift64Log;
	tmp_1:8 = Rn_GPR64 & tmp_2;
	Rd_GPR64 = tmp_1;
}

# C6.2.14 ANDS (immediate) page C6-1169 line 69185 MATCH x72000000/mask=x7f800000
# C6.2.382 TST (immediate) page C6-1983 line 116255 MATCH x7200001f/mask=x7f80001f
# CONSTRUCT x72000000/mask=xff800000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x72000000/mask=xff800000 --status pass --comment "flags"

:ands Rd_GPR32, Rn_GPR32, DecodeWMask32
is sf=0 & opc=3 & b_2428=0x12 & b_2323=0 & DecodeWMask32 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp_1:4 = Rn_GPR32 & DecodeWMask32;
	resultflags(tmp_1);
	Rd_GPR64 = zext(tmp_1);
	affectLflags();
}

# C6.2.14 ANDS (immediate) page C6-1169 line 69185 MATCH x72000000/mask=x7f800000
# C6.2.382 TST (immediate) page C6-1983 line 116255 MATCH x7200001f/mask=x7f80001f
# CONSTRUCT xf2000000/mask=xff800000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xf2000000/mask=xff800000 --status pass --comment "flags"

:ands Rd_GPR64, Rn_GPR64, DecodeWMask64
is sf=1 & opc=3 & b_2428=0x12 & b_2323=0 & DecodeWMask64 & Rn_GPR64 & Rd_GPR64
{
	tmp_1:8 = Rn_GPR64 & DecodeWMask64;
	resultflags(tmp_1);
	Rd_GPR64 = tmp_1;
	affectLflags();
}

# C6.2.15 ANDS (shifted register) page C6-1171 line 69286 MATCH x6a000000/mask=x7f200000
# C6.2.383 TST (shifted register) page C6-1984 line 116319 MATCH x6a00001f/mask=x7f20001f
# CONSTRUCT x6a000000/mask=xff200000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x6a000000/mask=xff200000 --status pass --comment "flags"

:ands Rd_GPR32, Rn_GPR32, RegShift32Log
is sf=0 & opc=3 & b_2428=0xa & N=0 & RegShift32Log & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp_2:4 = RegShift32Log;
	tmp_1:4 = Rn_GPR32 & tmp_2;
	resultflags(tmp_1);
	Rd_GPR64 = zext(tmp_1);
	affectLflags();
}

# C6.2.15 ANDS (shifted register) page C6-1171 line 69286 MATCH x6a000000/mask=x7f200000
# C6.2.383 TST (shifted register) page C6-1984 line 116319 MATCH x6a00001f/mask=x7f20001f
# CONSTRUCT xea000000/mask=xff200000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xea000000/mask=xff200000 --status pass --comment "flags"

:ands Rd_GPR64, Rn_GPR64, RegShift64Log
is sf=1 & opc=3 & b_2428=0xa & N=0 & RegShift64Log & Rn_GPR64 & Rd_GPR64
{
	tmp_2:8 = RegShift64Log;
	tmp_1:8 = Rn_GPR64 & tmp_2;
	resultflags(tmp_1);
	Rd_GPR64 = tmp_1;
	affectLflags();
}

# C6.2.16 ASR (register) page C6-1173 line 69404 MATCH x1ac02800/mask=x7fe0fc00
# C6.2.18 ASRV page C6-1177 line 69588 MATCH x1ac02800/mask=x7fe0fc00
# CONSTRUCT x1ac02800/mask=xffe0fc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x1ac02800/mask=xffe0fc00 --status pass

:asr Rd_GPR32, Rn_GPR32, Rm_GPR32
is sf=0 & b_3030=0 & S=0 & b_2428=0x1a & b_2123=6 & Rm_GPR32 & b_1015=0xa & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp_2:4 = Rm_GPR32 & 0x1f;
	tmp_1:4 = Rn_GPR32 s>> tmp_2;
	Rd_GPR64 = zext(tmp_1);
}

# C6.2.16 ASR (register) page C6-1173 line 69404 MATCH x1ac02800/mask=x7fe0fc00
# C6.2.18 ASRV page C6-1177 line 69588 MATCH x1ac02800/mask=x7fe0fc00
# CONSTRUCT x9ac02800/mask=xffe0fc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x9ac02800/mask=xffe0fc00 --status pass

:asr Rd_GPR64, Rn_GPR64, Rm_GPR64
is sf=1 & b_3030=0 & S=0 & b_2428=0x1a & b_2123=6 & Rm_GPR64 & b_1015=0xa & Rn_GPR64 & Rd_GPR64
{
	tmp_2:8 = Rm_GPR64 & 0x3f;
	tmp_1:8 = Rn_GPR64 s>> tmp_2;
	Rd_GPR64 = tmp_1;
}

# C6.2.17 ASR (immediate) page C6-1175 line 69498 MATCH x13007c00/mask=x7f807c00
# C6.2.267 SBFIZ page C6-1751 line 103178 MATCH x13000000/mask=x7f800000
# C6.2.268 SBFM page C6-1753 line 103272 MATCH x13000000/mask=x7f800000
# C6.2.269 SBFX page C6-1756 line 103421 MATCH x13000000/mask=x7f800000
# CONSTRUCT x13007c00/mask=xffe0fc02 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst x13007c00/mask=xffe0fc02 --status pass
# Alias for sbfm when imms == '011111'
# imms is MAX_INT5, so it will never be less than immr. Note that immr is limited to [0,31]
# Ha! Two explicit cases passes -l
# if sf == '0' && (N != '0' || immr<5> != '0' || imms<5> != '0') then ReservedValue();

:asr Rd_GPR32, Rn_GPR32, ImmRConst32
is ImmS=0x1f & ImmS_LT_ImmR=0 & (ImmS_EQ_ImmR=0 | ImmS_EQ_ImmR=1) & sf=0 & opc=0 & b_2428=0x13 & b_2323=0 & n=0 & b_21=0 & b_15=0 & ImmRConst32 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp_2:4 = ImmRConst32;
	tmp_1:4 = Rn_GPR32 s>> tmp_2;
	Rd_GPR64 = zext(tmp_1);
}

# C6.2.17 ASR (immediate) page C6-1175 line 69498 MATCH x13007c00/mask=x7f807c00
# C6.2.267 SBFIZ page C6-1751 line 103178 MATCH x13000000/mask=x7f800000
# C6.2.268 SBFM page C6-1753 line 103272 MATCH x13000000/mask=x7f800000
# C6.2.269 SBFX page C6-1756 line 103421 MATCH x13000000/mask=x7f800000
# CONSTRUCT x9340fc00/mask=xffc0fc02 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst x9340fc00/mask=xffc0fc02 --status pass
# Alias for sbfm when imms == '111111'
# imms is MAX_INT6, so it will never be less than immr (6-bit field)
# Ha! Two explicit cases passes -l

:asr Rd_GPR64, Rn_GPR64, ImmRConst64
is ImmS=0x3f & ImmS_LT_ImmR=0 & (ImmS_EQ_ImmR=0 | ImmS_EQ_ImmR=1) & sf=1 & opc=0 & b_2428=0x13 & b_2323=0 & n=1 & ImmRConst64 & Rn_GPR64 & Rd_GPR64
{
	tmp_2:8 = ImmRConst64;
	tmp_1:8 = Rn_GPR64 s>> tmp_2;
	Rd_GPR64 = tmp_1;
}

# C6.2.19 AT page C6-1179 line 69679 MATCH xd5087800/mask=xfff8fe00
# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5087800/mask=xffffffe0 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst xd5087800/mask=xffffffe0 --status noqemu

:at "S1E1R", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b0111 & b_0811=0b1000 & b_0507=0b000 & Rt_GPR64
{ par_el1 = AT_S1E1R(Rt_GPR64); }

# C6.2.19 AT page C6-1179 line 69679 MATCH xd5087800/mask=xfff8fe00
# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50c7800/mask=xffffffe0 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst xd50c7800/mask=xffffffe0 --status noqemu

:at "S1E2R", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b100 & b_1215=0b0111 & b_0811=0b1000 & b_0507=0b000 & Rt_GPR64
{ par_el1 = AT_S1E2R(Rt_GPR64); }

# C6.2.19 AT page C6-1179 line 69679 MATCH xd5087800/mask=xfff8fe00
# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50e7800/mask=xffffffe0 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst xd50e7800/mask=xffffffe0 --status noqemu

:at "S1E3R", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b110 & b_1215=0b0111 & b_0811=0b1000 & b_0507=0b000 & Rt_GPR64
{ par_el1 = AT_S1E3R(Rt_GPR64); }

# C6.2.19 AT page C6-1179 line 69679 MATCH xd5087800/mask=xfff8fe00
# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5087820/mask=xffffffe0 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst xd5087820/mask=xffffffe0 --status noqemu

:at "S1E1W", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b0111 & b_0811=0b1000 & b_0507=0b001 & Rt_GPR64
{ par_el1 = AT_S1E1W(Rt_GPR64); }

# C6.2.19 AT page C6-1179 line 69679 MATCH xd5087800/mask=xfff8fe00
# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50c7820/mask=xffffffe0 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst xd50c7820/mask=xffffffe0 --status noqemu

:at "S1E2W", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b100 & b_1215=0b0111 & b_0811=0b1000 & b_0507=0b001 & Rt_GPR64
{ par_el1 = AT_S1E2W(Rt_GPR64); }

# C6.2.19 AT page C6-1179 line 69679 MATCH xd5087800/mask=xfff8fe00
# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50e7820/mask=xffffffe0 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst xd50e7820/mask=xffffffe0 --status noqemu

:at "S1E3W", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b110 & b_1215=0b0111 & b_0811=0b1000 & b_0507=0b001 & Rt_GPR64
{ par_el1 = AT_S1E3W(Rt_GPR64); }

# C6.2.19 AT page C6-1179 line 69679 MATCH xd5087800/mask=xfff8fe00
# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5087840/mask=xffffffe0 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst xd5087840/mask=xffffffe0 --status noqemu

:at "S1E0R", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b0111 & b_0811=0b1000 & b_0507=0b010 & Rt_GPR64
{ par_el1 = AT_S1E0R(Rt_GPR64); }

# C6.2.19 AT page C6-1179 line 69679 MATCH xd5087800/mask=xfff8fe00
# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5087860/mask=xffffffe0 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst xd5087860/mask=xffffffe0 --status noqemu

:at "S1E0W", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b0111 & b_0811=0b1000 & b_0507=0b011 & Rt_GPR64
{ par_el1 = AT_S1E0W(Rt_GPR64); }

# C6.2.19 AT page C6-1179 line 69679 MATCH xd5087800/mask=xfff8fe00
# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50c7880/mask=xffffffe0 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst xd50c7880/mask=xffffffe0 --status noqemu

:at "S12E1R", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b100 & b_1215=0b0111 & b_0811=0b1000 & b_0507=0b100 & Rt_GPR64
{ par_el1 = AT_S12E1R(Rt_GPR64); }

# C6.2.19 AT page C6-1179 line 69679 MATCH xd5087800/mask=xfff8fe00
# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50c78a0/mask=xffffffe0 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst xd50c78a0/mask=xffffffe0 --status noqemu

:at "S12E1W", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b100 & b_1215=0b0111 & b_0811=0b1000 & b_0507=0b101 & Rt_GPR64
{ par_el1 = AT_S12E1W(Rt_GPR64); }

# C6.2.19 AT page C6-1179 line 69679 MATCH xd5087800/mask=xfff8fe00
# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50c78c0/mask=xffffffe0 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst xd50c78c0/mask=xffffffe0 --status noqemu

:at "S12E0R", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b100 & b_1215=0b0111 & b_0811=0b1000 & b_0507=0b110 & Rt_GPR64
{ par_el1 = AT_S12E0R(Rt_GPR64); }

# C6.2.19 AT page C6-1179 line 69679 MATCH xd5087800/mask=xfff8fe00
# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50c78e0/mask=xffffffe0 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst xd50c78e0/mask=xffffffe0 --status noqemu

:at "S12E0W", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b100 & b_1215=0b0111 & b_0811=0b1000 & b_0507=0b111 & Rt_GPR64
{ par_el1 = AT_S12E0W(Rt_GPR64); }

# C6.2.19 AT page C6-1179 line 69679 MATCH xd5087800/mask=xfff8fe00
# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5087900/mask=xffffffe0 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst xd5087900/mask=xffffffe0 --status noqemu

:at "S1E1RP", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b0111 & b_0811=0b1001 & b_0507=0b000 & Rt_GPR64
{ par_el1 = AT_S1E1RP(Rt_GPR64); }

# C6.2.19 AT page C6-1179 line 69679 MATCH xd5087800/mask=xfff8fe00
# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5087920/mask=xffffffe0 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst xd5087920/mask=xffffffe0 --status noqemu

:at "S1E1WP", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b0111 & b_0811=0b1001 & b_0507=0b001 & Rt_GPR64
{ par_el1 = AT_S1E1WP(Rt_GPR64); }

# C6.2.20 AUTDA, AUTDZA page C6-1181 line 69758 MATCH xdac11800/mask=xffffdc00
# CONSTRUCT xdac11800/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xdac11800/mask=xfffffc00 --status noqemu

:autda Rd_GPR64, Rn_GPR64xsp
is autda__PACpart & b_1431=0b110110101100000100 & b_1012=0b110 & b_13=0 & Rn_GPR64xsp & Rd_GPR64
{
	build autda__PACpart;
}

# C6.2.20 AUTDA, AUTDZA page C6-1181 line 69758 MATCH xdac11800/mask=xffffdc00
# CONSTRUCT xdac13be0/mask=xffffffe0 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xdac13be0/mask=xffffffe0 --status noqemu

:autdza Rd_GPR64
is autdza__PACpart & b_1431=0b110110101100000100 & b_1012=0b110 & b_13=1 & b_0509=0b11111 & Rd_GPR64
{
	build autdza__PACpart;
}

# C6.2.21 AUTDB, AUTDZB page C6-1182 line 69833 MATCH xdac11c00/mask=xffffdc00
# CONSTRUCT xdac11c00/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xdac11c00/mask=xfffffc00 --status noqemu

:autdb Rd_GPR64, Rn_GPR64xsp
is autdb__PACpart & b_1431=0b110110101100000100 & b_1012=0b111 & b_13=0 & Rn_GPR64xsp & Rd_GPR64
{
	build autdb__PACpart;
}

# C6.2.21 AUTDB, AUTDZB page C6-1182 line 69833 MATCH xdac11c00/mask=xffffdc00
# CONSTRUCT xdac13fe0/mask=xffffffe0 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xdac13fe0/mask=xffffffe0 --status noqemu

:autdzb Rd_GPR64
is autdzb__PACpart & b_1431=0b110110101100000100 & b_1012=0b111 & b_13=1 & b_0509=0b11111 & Rd_GPR64
{
	build autdzb__PACpart;
}

# C6.2.22 AUTIA, AUTIA1716, AUTIASP, AUTIAZ, AUTIZA page C6-1183 line 69908 MATCH xdac11000/mask=xffffdc00
# CONSTRUCT xdac11000/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xdac11000/mask=xfffffc00 --status noqemu

:autia Rd_GPR64, Rn_GPR64xsp
is autia__PACpart & b_1431=0b110110101100000100 & b_1012=0b100 & b_13=0 & Rn_GPR64xsp & Rd_GPR64
{
	build autia__PACpart;
}

# C6.2.22 AUTIA, AUTIA1716, AUTIASP, AUTIAZ, AUTIZA page C6-1183 line 69908 MATCH xdac11000/mask=xffffdc00
# CONSTRUCT xdac133e0/mask=xffffffe0 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xdac133e0/mask=xffffffe0 --status noqemu

:autiza Rd_GPR64
is autiza__PACpart & b_1431=0b110110101100000100 & b_1012=0b100 & b_13=1 & b_0509=0b11111 & Rd_GPR64
{
	build autiza__PACpart;
}

# C6.2.22 AUTIA, AUTIA1716, AUTIASP, AUTIAZ, AUTIZA page C6-1183 line 69908 MATCH xd503219f/mask=xfffffddf
# C6.2.126 HINT page C6-1480 line 88030 MATCH xd503201f/mask=xfffff01f
# CONSTRUCT xd503219f/mask=xffffffff MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd503219f/mask=xffffffff --status nodest

:autia1716
is autia1716__PACpart & b_1231=0b11010101000000110010 & b_0811=0b0001 & b_0507=0b100 & b_0004=0b11111
{
	build autia1716__PACpart;
}

# C6.2.22 AUTIA, AUTIA1716, AUTIASP, AUTIAZ, AUTIZA page C6-1183 line 69908 MATCH xd503219f/mask=xfffffddf
# C6.2.126 HINT page C6-1480 line 88030 MATCH xd503201f/mask=xfffff01f
# CONSTRUCT xd50323bf/mask=xffffffff MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50323bf/mask=xffffffff --status nodest

:autiasp
is autiasp__PACpart & b_1231=0b11010101000000110010 & b_0811=0b0011 & b_0507=0b101 & b_0004=0b11111
{
	build autiasp__PACpart;
}

# C6.2.22 AUTIA, AUTIA1716, AUTIASP, AUTIAZ, AUTIZA page C6-1183 line 69908 MATCH xd503219f/mask=xfffffddf
# C6.2.126 HINT page C6-1480 line 88030 MATCH xd503201f/mask=xfffff01f
# CONSTRUCT xd503239f/mask=xffffffff MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd503239f/mask=xffffffff --status nodest

:autiaz
is autiaz__PACpart & b_1231=0b11010101000000110010 & b_0811=0b0011 & b_0507=0b100 & b_0004=0b11111
{
	build autiaz__PACpart;
}

# C6.2.23 AUTIB, AUTIB1716, AUTIBSP, AUTIBZ, AUTIZB page C6-1186 line 70065 MATCH xdac11400/mask=xffffdc00
# CONSTRUCT xdac11400/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xdac11400/mask=xfffffc00 --status noqemu

:autib Rd_GPR64, Rn_GPR64xsp
is autib__PACpart & b_1431=0b110110101100000100 & b_1012=0b101 & b_13=0 & Rn_GPR64xsp & Rd_GPR64
{
	build autib__PACpart;
}

# C6.2.23 AUTIB, AUTIB1716, AUTIBSP, AUTIBZ, AUTIZB page C6-1186 line 70065 MATCH xdac11400/mask=xffffdc00
# CONSTRUCT xdac137e0/mask=xffffffe0 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xdac137e0/mask=xffffffe0 --status noqemu

:autizb Rd_GPR64
is autizb__PACpart & b_1431=0b110110101100000100 & b_1012=0b101 & b_13=1 & b_0509=0b11111 & Rd_GPR64
{
	build autizb__PACpart;
}

# C6.2.23 AUTIB, AUTIB1716, AUTIBSP, AUTIBZ, AUTIZB page C6-1186 line 70065 MATCH xd50321df/mask=xfffffddf
# C6.2.126 HINT page C6-1480 line 88030 MATCH xd503201f/mask=xfffff01f
# CONSTRUCT xd50321df/mask=xffffffff MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50321df/mask=xffffffff --status nodest

:autib1716
is autib1716__PACpart & b_1231=0b11010101000000110010 & b_0811=0b0001 & b_0507=0b110 & b_0004=0b11111
{
	build autib1716__PACpart;
}

# C6.2.23 AUTIB, AUTIB1716, AUTIBSP, AUTIBZ, AUTIZB page C6-1186 line 70065 MATCH xd50321df/mask=xfffffddf
# C6.2.126 HINT page C6-1480 line 88030 MATCH xd503201f/mask=xfffff01f
# CONSTRUCT xd50323ff/mask=xffffffff MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50323ff/mask=xffffffff --status nodest

:autibsp
is autibsp__PACpart & b_1231=0b11010101000000110010 & b_0811=0b0011 & b_0507=0b111 & b_0004=0b11111
{
	build autibsp__PACpart;
}

# C6.2.23 AUTIB, AUTIB1716, AUTIBSP, AUTIBZ, AUTIZB page C6-1186 line 70065 MATCH xd50321df/mask=xfffffddf
# C6.2.126 HINT page C6-1480 line 88030 MATCH xd503201f/mask=xfffff01f
# CONSTRUCT xd50323df/mask=xffffffff MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50323df/mask=xffffffff --status nodest

:autibz
is autibz__PACpart & b_1231=0b11010101000000110010 & b_0811=0b0011 & b_0507=0b110 & b_0004=0b11111
{
	build autibz__PACpart;
}

# C6.2.26 B.cond page C6-1191 line 70305 MATCH x54000000/mask=xff000010
# CONSTRUCT x5400000f/mask=xff00001f MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x5400000f/mask=xff00001f --status nodest --comment "noflags qemuerr(illegal addresses cause qemu exit)"

:b^"."^BranchCondOp Addr19
is b_2531=0x2a & o1=0 & Addr19 & o0=0 & br_cond_op=15 & BranchCondOp
{
	goto Addr19;
}

# C6.2.26 B.cond page C6-1191 line 70305 MATCH x54000000/mask=xff000010
# CONSTRUCT x54000000/mask=xff000010 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x54000000/mask=xff000010 --status nodest --comment "flags qemuerr(illegal addresses cause qemu exit)"

:b^"."^BranchCondOp Addr19
is b_2531=0x2a & o1=0 & Addr19 & o0=0 & br_cond_op & BranchCondOp
{
	if (BranchCondOp) goto Addr19;
}

# C6.2.25 B page C6-1190 line 70265 MATCH x14000000/mask=xfc000000
# CONSTRUCT x14000000/mask=xfc000000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x14000000/mask=xfc000000 --status nodest --comment "flags qemuerr(illegal addresses cause qemu exit)"

:b Addr26
is b_31=0 & b_2630=0x05 & Addr26
{
	goto Addr26;
}

# C6.2.27 BC.cond page C6-1192 line 70348 MATCH x54000010/mask=xff000010
# CONSTRUCT x54000010/mask=xff000010 MATCHED 1 DOCUMENTED OPCODES
# b_0031=01010100...................1....

:bc^"."^BranchCondOp Addr19
is b_2531=0x2a & o1=0 & Addr19 & o0=1 & br_cond_op=15 & BranchCondOp
{
	goto Addr19;
}

:bc^"."^BranchCondOp Addr19
is b_2531=0x2a & o1=0 & Addr19 & o0=1 & BranchCondOp
{
	if (BranchCondOp) goto Addr19;
}


# C6.2.30 BFM page C6-1197 line 70576 MATCH x33000000/mask=x7f800000
# C6.2.28 BFC page C6-1193 line 70394 MATCH x330003e0/mask=x7f8003e0
# C6.2.29 BFI page C6-1195 line 70484 MATCH x33000000/mask=x7f800000
# C6.2.31 BFXIL page C6-1199 line 70700 MATCH x33000000/mask=x7f800000
# CONSTRUCT x33000000/mask=xffe08000 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst x33000000/mask=xffe08000 --status pass
# if sf == '0' && (N != '0' || immr<5> (b_21) != '0' || imms<5> (b_15) != '0') then ReservedValue();

:bfm Rd_GPR32, Rn_GPR32, ImmR_bitfield32_imm, ImmS_bitfield32_imm
is sf=0 & opc=1 & b_2428=0x13 & b_2323=0 & n=0 & b_21=0 & b_15=0 & ImmR_bitfield32_imm & ImmS_bitfield32_imm & ImmRConst32 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64 & DecodeWMask32 & DecodeTMask32
{
	local wmask:4 = DecodeWMask32;
	local tmask:4 = DecodeTMask32;
	local dst:4 = Rd_GPR32;
	local src:4 = Rn_GPR32;
	local bot:4 = (dst & ~(wmask)) | (((src>>ImmRConst32)|(src<<(32-ImmRConst32))) & wmask);
	Rd_GPR64 = zext((dst & ~(tmask)) | (bot & tmask));
}

# C6.2.30 BFM page C6-1197 line 70576 MATCH x33000000/mask=x7f800000
# C6.2.28 BFC page C6-1193 line 70394 MATCH x330003e0/mask=x7f8003e0
# C6.2.29 BFI page C6-1195 line 70484 MATCH x33000000/mask=x7f800000
# C6.2.31 BFXIL page C6-1199 line 70700 MATCH x33000000/mask=x7f800000
# CONSTRUCT xb3400002/mask=xffc00002 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst xb3400002/mask=xffc00002 --status pass

:bfm Rd_GPR64, Rn_GPR64, ImmR_bitfield64_imm, ImmS_bitfield64_imm
is ImmS_LT_ImmR=1 & sf=1 & opc=1 & b_2428=0x13 & b_2323=0 & n=1 & ImmR_bitfield64_imm & ImmRConst64 & ImmS_bitfield64_imm & Rn_GPR64 & Rd_GPR64 & DecodeWMask64 & DecodeTMask64
{
	local wmask:8 = DecodeWMask64;
	local tmask:8 = DecodeTMask64;
	local dst:8 = Rd_GPR64;
	local src:8 = Rn_GPR64;
	local bot:8 = (dst & ~(wmask)) | (((src>>ImmRConst64)|(src<<(64-ImmRConst64))) & wmask);
	Rd_GPR64 = (dst & ~(tmask)) | (bot & tmask);
}

# C6.2.28 BFXIL page C6-567 line 33333 KEEPWITH

BFextractWidth32: "#"^imm is ImmR & ImmS [ imm = ImmS - ImmR + 1; ] { export *[const]:4 imm; }
BFextractWidth64: "#"^imm is ImmR & ImmS [ imm = ImmS - ImmR + 1; ] { export *[const]:8 imm; }

# C6.2.31 BFXIL page C6-1199 line 70700 MATCH x33000000/mask=x7f800000
# C6.2.28 BFC page C6-1193 line 70394 MATCH x330003e0/mask=x7f8003e0
# C6.2.29 BFI page C6-1195 line 70484 MATCH x33000000/mask=x7f800000
# C6.2.30 BFM page C6-1197 line 70576 MATCH x33000000/mask=x7f800000
# CONSTRUCT x33000000/mask=xffe08002 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst x33000000/mask=xffe08002 --status pass

# Alias for bfm where UInt(imms) >= UInt(immr)

:bfxil Rd_GPR32, Rn_GPR32, ImmRConst32, BFextractWidth32
is ImmS_LT_ImmR=0 & sf=0 & opc=1 & b_2428=0x13 & b_2323=0 & n=0 & b_21=0 & b_15=0 & ImmRConst32 & BFextractWidth32 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	dst:4 = Rd_GPR32;
	src:4 = Rn_GPR32;
	mask:4 = (0xffffffff >> (32 - BFextractWidth32));
	tmp:4 = (src >> ImmRConst32) & mask;
	Rd_GPR64 = zext((dst & ~(mask)) | tmp);
}

# C6.2.31 BFXIL page C6-1199 line 70700 MATCH x33000000/mask=x7f800000
# C6.2.28 BFC page C6-1193 line 70394 MATCH x330003e0/mask=x7f8003e0
# C6.2.29 BFI page C6-1195 line 70484 MATCH x33000000/mask=x7f800000
# C6.2.30 BFM page C6-1197 line 70576 MATCH x33000000/mask=x7f800000
# CONSTRUCT xb3400000/mask=xffc00002 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst xb3400000/mask=xffc00002 --status pass

# Alias for bfm where UInt(imms) >= UInt(immr)

:bfxil Rd_GPR64, Rn_GPR64, ImmRConst64, BFextractWidth64
is ImmS_LT_ImmR=0 & sf=1 & opc=1 & b_2428=0x13 & b_2323=0 & n=1 & ImmRConst64 & BFextractWidth64 & Rn_GPR64 & Rd_GPR64
{
	dst:8 = Rd_GPR64;
	src:8 = Rn_GPR64;
	mask:8 = (0xffffffffffffffff >> (64 - BFextractWidth64));
	tmp:8 = (src >> ImmRConst64) & mask;
	Rd_GPR64 = ((dst & ~(mask)) | tmp);
}

# C6.2.32 BIC (shifted register) page C6-1201 line 70793 MATCH x0a200000/mask=x7f200000
# CONSTRUCT x0a200000/mask=xff200000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x0a200000/mask=xff200000 --status pass

:bic Rd_GPR32, Rn_GPR32, RegShift32Log
is sf=0 & opc=0 & b_2428=0xa & N=1 & RegShift32Log & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp_3:4 = RegShift32Log;
	tmp_2:4 = tmp_3 ^ -1:4;
	tmp_1:4 = Rn_GPR32 & tmp_2;
	Rd_GPR64 = zext(tmp_1);
}

# C6.2.32 BIC (shifted register) page C6-1201 line 70793 MATCH x0a200000/mask=x7f200000
# CONSTRUCT x8a200000/mask=xff200000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x8a200000/mask=xff200000 --status pass

:bic Rd_GPR64, Rn_GPR64, RegShift64Log
is sf=1 & opc=0 & b_2428=0xa & N=1 & RegShift64Log & Rn_GPR64 & Rd_GPR64
{
	tmp_3:8= RegShift64Log;
	tmp_2:8 = tmp_3 ^ -1:8;
	tmp_1:8 = Rn_GPR64 & tmp_2;
	Rd_GPR64 = tmp_1;
}

# C6.2.33 BICS (shifted register) page C6-1203 line 70897 MATCH x6a200000/mask=x7f200000
# CONSTRUCT x6a200000/mask=xff200000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x6a200000/mask=xff200000 --status pass --comment "flags"

:bics Rd_GPR32, Rn_GPR32, RegShift32Log
is sf=0 & opc=3 & b_2428=0xa & N=1 & RegShift32Log & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp_3:4 = RegShift32Log;
	tmp_2:4 = tmp_3 ^ -1:4;
	tmp_1:4 = Rn_GPR32 & tmp_2;
	resultflags(tmp_1);
	Rd_GPR64 = zext(tmp_1);
	affectLflags();
}

# C6.2.33 BICS (shifted register) page C6-1203 line 70897 MATCH x6a200000/mask=x7f200000
# CONSTRUCT xea200000/mask=xff200000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xea200000/mask=xff200000 --status pass --comment "flags"

:bics Rd_GPR64, Rn_GPR64, RegShift64Log
is sf=1 & opc=3 & b_2428=0xa & N=1 & RegShift64Log & Rn_GPR64 & Rd_GPR64
{
	tmp_3:8= RegShift64Log;
	tmp_2:8 = tmp_3 ^ -1:8;
	tmp_1:8 = Rn_GPR64 & tmp_2;
	resultflags(tmp_1);
	Rd_GPR64 = tmp_1;
	affectLflags();
}

# C6.2.34 BL page C6-1205 line 71008 MATCH x94000000/mask=xfc000000
# CONSTRUCT x94000000/mask=xfc000000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x94000000/mask=xfc000000 --status nodest --comment "qemuerr(illegal addresses cause qemu exit)"

:bl Addr26
is b_31=1 & b_2630=0x05 & Addr26
{
	x30 = inst_start + 4;
	call Addr26;
}

# C6.2.35 BLR page C6-1206 line 71050 MATCH xd63f0000/mask=xfffffc1f
# CONSTRUCT xd63f0000/mask=xfffffc1f MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd63f0000/mask=xfffffc1f --status nodest --comment "qemuerr(illegal addresses cause qemu exit)"

:blr Rn_GPR64
is b_2531=0x6b & b_2324=0 & b_2122=1 & b_1620=0x1f & b_1015=0 & Rn_GPR64 & b_0004=0
{
	pc = Rn_GPR64;
	x30 = inst_start + 4;
	call [pc];
}

# C6.2.33 BLRAA, BLRAAZ, BLRAB, BLRABZ page C6-574 line 33668 KEEPWITH

# Z == 0 && M == 0 && Rm = 11111 Key A, zero modifier variant

blinkop: "l" is b_2122=0b01 { x30 = inst_start + 4; call [pc]; }
blinkop: "" is b_2122=0b00 { goto[pc]; }

# C6.2.36 BLRAA, BLRAAZ, BLRAB, BLRABZ page C6-1207 line 71095 MATCH xd63f0800/mask=xfefff800
# C6.2.38 BRAA, BRAAZ, BRAB, BRABZ page C6-1210 line 71251 MATCH xd61f0800/mask=xfefff800
# C6.2.255 RETAA, RETAB page C6-1731 line 102135 MATCH xd65f0bff/mask=xfffffbff
# CONSTRUCT xd61f081f/mask=xff9ffc1f MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst xd61f081f/mask=xff9ffc1f --status nodest

:b^blinkop^"raaz" Rn_GPR64
is b_blinkop__raaz___PACpart & b_2531=0b1101011 & b_24=0 & b_23=0 & blinkop & b_1220=0b111110000 & b_11=1 & b_10=0 & b_0004=0b11111 & Rn_GPR64
{
	build b_blinkop__raaz___PACpart;
	pc = Rn_GPR64;
	build blinkop;
}

# C6.2.36 BLRAA, BLRAAZ, BLRAB, BLRABZ page C6-1207 line 71095 MATCH xd63f0800/mask=xfefff800
# C6.2.38 BRAA, BRAAZ, BRAB, BRABZ page C6-1210 line 71251 MATCH xd61f0800/mask=xfefff800
# CONSTRUCT xd71f0800/mask=xff9ffc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd71f0800/mask=xff9ffc00 --status nodest
# Z == 1 && M == 0 Key A, register modifier variant

:b^blinkop^"raa" Rn_GPR64, Rd_GPR64xsp
is b_blinkop__raa___PACpart & b_2531=0b1101011 & b_24=1 & b_23=0 & blinkop & b_1220=0b111110000 & b_11=1 & b_10=0 & Rd_GPR64xsp & Rn_GPR64
{
	build b_blinkop__raa___PACpart;
	pc = Rn_GPR64;
	build blinkop;
}

# C6.2.36 BLRAA, BLRAAZ, BLRAB, BLRABZ page C6-1207 line 71095 MATCH xd63f0800/mask=xfefff800
# C6.2.38 BRAA, BRAAZ, BRAB, BRABZ page C6-1210 line 71251 MATCH xd61f0800/mask=xfefff800
# C6.2.255 RETAA, RETAB page C6-1731 line 102135 MATCH xd65f0bff/mask=xfffffbff
# CONSTRUCT xd61f0c1f/mask=xff9ffc1f MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst xd61f0c1f/mask=xff9ffc1f --status nodest
# Z == 0 && M == 1 && Rm = 11111 Key B, zero modifier variant

:b^blinkop^"rabz" Rn_GPR64
is b_blinkop__rabz___PACpart & b_2531=0b1101011 & b_24=0 & b_23=0 & blinkop & b_1220=0b111110000 & b_11=1 & b_10=1 & b_0004=0b11111 & Rn_GPR64
{
	build b_blinkop__rabz___PACpart;
	pc = Rn_GPR64;
	build blinkop;
}

# C6.2.36 BLRAA, BLRAAZ, BLRAB, BLRABZ page C6-1207 line 71095 MATCH xd63f0800/mask=xfefff800
# C6.2.38 BRAA, BRAAZ, BRAB, BRABZ page C6-1210 line 71251 MATCH xd61f0800/mask=xfefff800
# CONSTRUCT xd71f0c00/mask=xff9ffc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd71f0c00/mask=xff9ffc00 --status nodest
# Z == 1 && M == 1 Key B, register modifier variant

:b^blinkop^"rab" Rn_GPR64, Rd_GPR64xsp
is b_blinkop__rab___PACpart & b_2531=0b1101011 & b_24=1 & b_23=0 & blinkop & b_1220=0b111110000 & b_11=1 & b_10=1 & Rd_GPR64xsp & Rn_GPR64
{
	build b_blinkop__rab___PACpart;
	pc = Rn_GPR64;
	build blinkop;
}

# C6.2.37 BR page C6-1209 line 71202 MATCH xd61f0000/mask=xfffffc1f
# CONSTRUCT xd61f0000/mask=xfffffc1f MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd61f0000/mask=xfffffc1f --status nodest

:br Rn_GPR64
is b_2531=0x6b & b_2324=0 & b_2122=0 & b_1620=0x1f & b_1015=0 & Rn_GPR64 & b_0004=0
{
	pc = Rn_GPR64;
	goto [pc];
}

# C6.2.40 BRK page C6-1213 line 71415 MATCH xd4200000/mask=xffe0001f
# CONSTRUCT xd4200000/mask=xffe0001f MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd4200000/mask=xffe0001f --status nodest

:brk "#"^imm16
is ALL_BTITARGETS & b_2431=0xd4 & b_2123=1 & imm16 & b_0204=0 & b_0001=0
{
	tmp:2 = imm16;
	preferred_exception_return:8 = inst_next;
	pc = SoftwareBreakpoint(tmp, preferred_exception_return);
	goto [pc];
}

# C6.2.37 CASB, CASAB, CASALB, CASLB page C6-580 line 33952 KEEPWITH

cas_var: "a" is b_22=1 & b_15=0 { }
cas_var: "al" is b_22=1 & b_15=1 { }
cas_var: "" is b_22=0 & b_15=0 { }
cas_var: "l" is b_22=0 & b_15=1 { }

# C6.2.42 CASB, CASAB, CASALB, CASLB page C6-1216 line 71570 MATCH x08a07c00/mask=xffa07c00
# CONSTRUCT x08a07c00/mask=xffa07c00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x08a07c00/mask=xffa07c00 --status nomem

# CAS{,A,AL,L}B size=0b10 (b_3031)

:cas^cas_var^"b" aa_Ws, aa_Wt, [Rn_GPR64xsp]
is b_3031=0b00 & b_2329=0b0010001 & b_21=1 & b_1014=0b11111 & cas_var & aa_Wt & Rn_GPR64xsp & aa_Ws
{
	comparevalue:1 = aa_Ws:1;
	newvalue:1 = aa_Wt:1;
	data:1 = *:1 Rn_GPR64xsp;
	if (data != comparevalue) goto <skip>;
	*:1 Rn_GPR64xsp = newvalue;
<skip>
	aa_Ws = zext(data);
}

# C6.2.43 CASH, CASAH, CASALH, CASLH page C6-1218 line 71692 MATCH x48a07c00/mask=xffa07c00
# CONSTRUCT x48a07c00/mask=xffa07c00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x48a07c00/mask=xffa07c00 --status nomem

# CAS{,A,AL,L}H size=0b10 (b_3031)

:cas^cas_var^"h" aa_Ws, aa_Wt, [Rn_GPR64xsp]
is b_3031=0b01 & b_2329=0b0010001 & b_21=1 & b_1014=0b11111 & cas_var & aa_Wt & Rn_GPR64xsp & aa_Ws
{
	comparevalue:2 = aa_Ws:2;
	newvalue:2 = aa_Wt:2;
	data:2 = *:2 Rn_GPR64xsp;
	if (data != comparevalue) goto <skip>;
	*:2 Rn_GPR64xsp = newvalue;
<skip>
	aa_Ws = zext(data);
}

# C6.2.44 CASP, CASPA, CASPAL, CASPL page C6-1220 line 71814 MATCH x08207c00/mask=xbfa07c00
# CONSTRUCT x08207c00/mask=xffa17c01 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x08207c00/mask=xffa17c01 --status nomem

# CASP{,A,AL,L} size=0b00 (b_3031)

:casp^cas_var aa_Ws, aa_Wss, aa_Wt, aa_Wtt, [Rn_GPR64xsp]
is b_3031=0b00 & b_2329=0b0010000 & b_21=1 & b_1014=0b11111 & b_16=0 & b_00=0 & cas_var & aa_Ws & aa_Wss & aa_Wt & aa_Wtt & Rn_GPR64xsp
{
@if DATA_ENDIAN == "big"
	comparevalue:8 = (zext(aa_Ws) << 32) | zext(aa_Wss);
	newvalue:8 = (zext(aa_Wt) << 32) | zext(aa_Wtt);
@else
	comparevalue:8 = (zext(aa_Wss) << 32) | zext(aa_Ws);
	newvalue:8 = (zext(aa_Wtt) << 32) | zext(aa_Wt);
@endif
	data:8 = *:8 Rn_GPR64xsp;
	if (data != comparevalue) goto <skip>;
	*:8 Rn_GPR64xsp = newvalue;
<skip>
@if DATA_ENDIAN == "big"
	aa_Ws = data(4);
	aa_Wss = data:4;
@else
	aa_Ws = data:4;
	aa_Wss = data(4);
@endif
}

# C6.2.44 CASP, CASPA, CASPAL, CASPL page C6-1220 line 71814 MATCH x08207c00/mask=xbfa07c00
# CONSTRUCT x48207c00/mask=xffa17c01 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x48207c00/mask=xffa17c01 --status nomem

# CASP{,A,AL,L} size=0b01 (b_3031)

:casp^cas_var aa_Xs, aa_Xss, aa_Xt, aa_Xtt, [Rn_GPR64xsp]
is b_3031=0b01 & b_2329=0b0010000 & b_21=1 & b_1014=0b11111 & b_16=0 & b_00=0 & cas_var & aa_Xs & aa_Xss & aa_Xt & aa_Xtt & Rn_GPR64xsp
{
	local tmp_s:8 = aa_Xs;
	local tmp_ss:8 = aa_Xss;
	local tmp_t:8 = aa_Xt;
	local tmp_tt:8 = aa_Xtt;

@if DATA_ENDIAN == "little"
	# for little endian, swap Xss/Xs and Xtt/Xt
	tmp_s = aa_Xss;
	tmp_ss = aa_Xs;
	tmp_t = aa_Xtt;
	tmp_tt = aa_Xt;
@endif

	local tmp_addr:8 = Rn_GPR64xsp;
	local tmp_d:8 = *:8 tmp_addr;
	tmp_addr = tmp_addr + 8;
	local tmp_dd:8 = *:8 tmp_addr;

	if (tmp_d != tmp_s) goto <skip>;
	if (tmp_dd != tmp_ss) goto <skip>;

	tmp_addr = Rn_GPR64xsp;
	*:8 tmp_addr = tmp_t;
	tmp_addr = tmp_addr + 8;
	*:8 tmp_addr = tmp_tt;
<skip>
	aa_Xs = tmp_d;
	aa_Xss = tmp_dd;
}

# C6.2.45 CAS, CASA, CASAL, CASL page C6-1223 line 71996 MATCH x88a07c00/mask=xbfa07c00
# CONSTRUCT x88a07c00/mask=xffa07c00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x88a07c00/mask=xffa07c00 --status nomem
# CAS{,A,AL,L} size=0b10 (b_3031)

:cas^cas_var aa_Ws, aa_Wt, [Rn_GPR64xsp]
is b_3031=0b10 & b_2329=0b0010001 & b_21=1 & b_1014=0b11111 & cas_var & aa_Wt & Rn_GPR64xsp & aa_Ws
{
	comparevalue:4 = aa_Ws;
	newvalue:4 = aa_Wt;
	data:4 = *:4 Rn_GPR64xsp;
	if (data != comparevalue) goto <skip>;
	*:4 Rn_GPR64xsp = newvalue;
<skip>
	aa_Ws = data;
}

# C6.2.45 CAS, CASA, CASAL, CASL page C6-1223 line 71996 MATCH x88a07c00/mask=xbfa07c00
# CONSTRUCT xc8a07c00/mask=xffa07c00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xc8a07c00/mask=xffa07c00 --status nomem

# CAS{,A,AL,L} size=0b11 (b_3031)

:cas^cas_var aa_Xs, aa_Xt, [Rn_GPR64xsp]
is b_3031=0b11 & b_2329=0b0010001 & b_21=1 & b_1014=0b11111 & cas_var & aa_Xt & Rn_GPR64xsp & aa_Xs
{
	comparevalue:8 = aa_Xs;
	newvalue:8 = aa_Xt;
	data:8 = *:8 Rn_GPR64xsp;
	if (data != comparevalue) goto <skip>;
	*:8 Rn_GPR64xsp = newvalue;
<skip>
	aa_Xs = data;
}

# C6.2.41 CBNZ page C6-589 line 34530 KEEPWITH

ZeroOp: "z" is cmpr_op=0 { export 1:1; }
ZeroOp: "nz" is cmpr_op=1 { export 0:1; }

BitPos: "#"^bitpos is sf=1 & b_31 & b_1923 & Rt_GPR64 [ bitpos = b_31 << 5 | b_1923; ]
{
	tmp:1 = ((Rt_GPR64 >> bitpos) & 1) == 0;
	export tmp;
}

BitPos: "#"^bitpos is sf=0 & b_31 & b_1923 & Rt_GPR32 [ bitpos = b_31 << 5 | b_1923; ]
{
	tmp:1 = ((Rt_GPR32 >> bitpos) & 1) == 0;
	export tmp;
}

# C6.2.46 CBNZ page C6-1226 line 72159 MATCH x35000000/mask=x7f000000
# C6.2.47 CBZ page C6-1227 line 72216 MATCH x34000000/mask=x7f000000
# CONSTRUCT xb4000000/mask=xfe000000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xb4000000/mask=xfe000000 --status nodest --comment "qemuerr(illegal addresses cause qemu exit)"

:cb^ZeroOp Rd_GPR64, Addr19
is sf=1 & b_2530=0x1a & ZeroOp & Addr19 & Rd_GPR64
{
	tmp:1 = Rd_GPR64 == 0;
	if (tmp == ZeroOp) goto Addr19;
}

# C6.2.46 CBNZ page C6-1226 line 72159 MATCH x35000000/mask=x7f000000
# C6.2.47 CBZ page C6-1227 line 72216 MATCH x34000000/mask=x7f000000
# CONSTRUCT x34000000/mask=xfe000000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x34000000/mask=xfe000000 --status nodest --comment "qemuerr(illegal addresses cause qemu exit)"

:cb^ZeroOp Rd_GPR32, Addr19
is sf=0 & b_2530=0x1a & ZeroOp & Addr19 & Rd_GPR32
{
	tmp:1 = Rd_GPR32 == 0;
	if (tmp == ZeroOp) goto Addr19;
}

# C6.2.46 CBNZ page C6-1226 line 72159 MATCH x35000000/mask=x7f000000
# CONSTRUCT x35000000/mask=xff000000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x35000000/mask=xff000000 --status nodest --comment "qemuerr(illegal addresses cause qemu exit)"

:cbnz Rt_GPR32, Addr19
is sf=0 & b_2530=0x1a & cmpr_op=1 & Addr19 & Rt_GPR32
{
	if (Rt_GPR32 != 0) goto Addr19;
}

# C6.2.46 CBNZ page C6-1226 line 72159 MATCH x35000000/mask=x7f000000
# CONSTRUCT xb5000000/mask=xff000000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xb5000000/mask=xff000000 --status nodest --comment "qemuerr(illegal addresses cause qemu exit)"

:cbnz Rt_GPR64, Addr19
is sf=1 & b_2530=0x1a & cmpr_op=1 & Addr19 & Rt_GPR64
{
	if (Rt_GPR64 != 0) goto Addr19;
}

# C6.2.47 CBZ page C6-1227 line 72216 MATCH x34000000/mask=x7f000000
# CONSTRUCT x34000000/mask=xff000000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x34000000/mask=xff000000 --status nodest --comment "qemuerr(illegal addresses cause qemu exit)"

:cbz Rt_GPR32, Addr19
is sf=0 & b_2530=0x1a & cmpr_op=0 & Addr19 & Rt_GPR32
{
	if (Rt_GPR32 == 0) goto Addr19;
}

# C6.2.47 CBZ page C6-1227 line 72216 MATCH x34000000/mask=x7f000000
# CONSTRUCT xb4000000/mask=xff000000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xb4000000/mask=xff000000 --status nodest --comment "qemuerr(illegal addresses cause qemu exit)"

:cbz Rt_GPR64, Addr19
is sf=1 & b_2530=0x1a & cmpr_op=0 & Addr19 & Rt_GPR64
{
	if (Rt_GPR64 == 0) goto Addr19;
}

# C6.2.48 CCMN (immediate) page C6-1228 line 72273 MATCH x3a400800/mask=x7fe00c10
# CONSTRUCT x3a400800/mask=xffe00c10 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x3a400800/mask=xffe00c10 --status pass --comment "flags"

:ccmn Rn_GPR32, UImm5, NZCVImm_uimm4, CondOp
is sf=0 & op=0 & s=1 & b_2428=0x1a & b_2123=2 & UImm5 & CondOp & b_1111=1 & o2=0 & Rn_GPR32 & o3=0 & NZCVImm_uimm4
{
	condition:1 = CondOp;
	condMask:1 = NZCVImm_uimm4;
	setCC_NZCV(condMask);
	if (!condition) goto inst_next;
	tmp:4 = UImm5;
	addflags(Rn_GPR32, tmp);
	result:4 = Rn_GPR32 + tmp;
	resultflags(result);
	affectflags();
}

# C6.2.48 CCMN (immediate) page C6-1228 line 72273 MATCH x3a400800/mask=x7fe00c10
# CONSTRUCT xba400800/mask=xffe00c10 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xba400800/mask=xffe00c10 --status pass --comment "flags"

:ccmn Rn_GPR64, UImm5, NZCVImm_uimm4, CondOp
is sf=1 & op=0 & s=1 & b_2428=0x1a & b_2123=2 & UImm5 & CondOp & b_1111=1 & o2=0 & Rn_GPR64 & o3=0 & NZCVImm_uimm4
{
	condition:1 = CondOp;
	condMask:1 = NZCVImm_uimm4;
	setCC_NZCV(condMask);
	if (!condition) goto inst_next;
	tmp:8 = zext(UImm5);
	addflags(Rn_GPR64, tmp);
	result:8 = Rn_GPR64 + tmp;
	resultflags(result);
	affectflags();
}

# C6.2.49 CCMN (register) page C6-1230 line 72358 MATCH x3a400000/mask=x7fe00c10
# CONSTRUCT x3a400000/mask=xffe00c10 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x3a400000/mask=xffe00c10 --status pass --comment "flags"

:ccmn Rn_GPR32, Rm_GPR32, NZCVImm_uimm4, CondOp
is sf=0 & op=0 & s=1 & b_2428=0x1a & b_2123=2 & Rm_GPR32 & CondOp & b_1111=0 & o2=0 & Rn_GPR32 & o3=0 & NZCVImm_uimm4
{
	condition:1 = CondOp;
	condMask:1 = NZCVImm_uimm4;
	setCC_NZCV(condMask);
	if (!condition) goto inst_next;
	tmp:4 = Rm_GPR32;
	addflags(Rn_GPR32, tmp);
	result:4 = Rn_GPR32 + tmp;
	resultflags(result);
	affectflags();
}

# C6.2.49 CCMN (register) page C6-1230 line 72358 MATCH x3a400000/mask=x7fe00c10
# CONSTRUCT xba400000/mask=xffe00c10 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xba400000/mask=xffe00c10 --status pass --comment "flags"

:ccmn Rn_GPR64, Rm_GPR64, NZCVImm_uimm4, CondOp
is sf=1 & op=0 & s=1 & b_2428=0x1a & b_2123=2 & Rm_GPR64 & CondOp & b_1111=0 & o2=0 & Rn_GPR64 & o3=0 & NZCVImm_uimm4
{
	condition:1 = CondOp;
	condMask:1 = NZCVImm_uimm4;
	setCC_NZCV(condMask);
	if (!condition) goto inst_next;
	tmp:8 = Rm_GPR64;
	addflags(Rn_GPR64, tmp);
	result:8 = Rn_GPR64 + tmp;
	resultflags(result);
	affectflags();
}

# C6.2.50 CCMP (immediate) page C6-1232 line 72446 MATCH x7a400800/mask=x7fe00c10
# CONSTRUCT x7a400800/mask=xffe00c10 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x7a400800/mask=xffe00c10 --status pass --comment "flags"

:ccmp Rn_GPR32, UImm5, NZCVImm_uimm4, CondOp
is sf=0 & op=1 & s=1 & b_2428=0x1a & b_2123=2 & UImm5 & CondOp & b_1111=1 & o2=0 & Rn_GPR32 & o3=0 & NZCVImm_uimm4
{
	condition:1 = CondOp;
	condMask:1 = NZCVImm_uimm4;
	setCC_NZCV(condMask);
	if (!condition) goto inst_next;
	subflags(Rn_GPR32, UImm5);
	tmp:4 = Rn_GPR32 - UImm5;
	resultflags(tmp);
	affectflags();
}

# C6.2.50 CCMP (immediate) page C6-1232 line 72446 MATCH x7a400800/mask=x7fe00c10
# CONSTRUCT xfa400800/mask=xffe00c10 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xfa400800/mask=xffe00c10 --status pass --comment "flags"

:ccmp Rn_GPR64, UImm5, NZCVImm_uimm4, CondOp
is sf=1 & op=1 & s=1 & b_2428=0x1a & b_2123=2 & UImm5 & CondOp & b_1111=1 & o2=0 & Rn_GPR64 & o3=0 & NZCVImm_uimm4
{
	condition:1 = CondOp;
	condMask:1 = NZCVImm_uimm4;
	setCC_NZCV(condMask);
	if (!condition) goto inst_next;
	tmp:8 = zext(UImm5);
	subflags(Rn_GPR64, tmp);
	tmp = Rn_GPR64 - tmp;
	resultflags(tmp);
	affectflags();
}

# C6.2.51 CCMP (register) page C6-1234 line 72531 MATCH x7a400000/mask=x7fe00c10
# CONSTRUCT x7a400000/mask=xffe00c10 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x7a400000/mask=xffe00c10 --status pass --comment "flags"

:ccmp Rn_GPR32, Rm_GPR32, NZCVImm_uimm4, CondOp
is sf=0 & op=1 & s=1 & b_2428=0x1a & b_2123=2 & Rm_GPR32 & CondOp & b_1111=0 & o2=0 & Rn_GPR32 & o3=0 & NZCVImm_uimm4
{
	condition:1 = CondOp;
	condMask:1 = NZCVImm_uimm4;
	setCC_NZCV(condMask);
	if (!condition) goto inst_next;
	subflags(Rn_GPR32, Rm_GPR32);
	tmp:4 = Rn_GPR32 - Rm_GPR32;
	resultflags(tmp);
	affectflags();
}

# C6.2.51 CCMP (register) page C6-1234 line 72531 MATCH x7a400000/mask=x7fe00c10
# CONSTRUCT xfa400000/mask=xffe00c10 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xfa400000/mask=xffe00c10 --status pass --comment "flags"

:ccmp Rn_GPR64, Rm_GPR64, NZCVImm_uimm4, CondOp
is sf=1 & op=1 & s=1 & b_2428=0x1a & b_2123=2 & Rm_GPR64 & CondOp & b_1111=0 & o2=0 & Rn_GPR64 & o3=0 & NZCVImm_uimm4
{
	condition:1 = CondOp;
	condMask:1 = NZCVImm_uimm4;
	setCC_NZCV(condMask);
	if (!condition) goto inst_next;
	subflags(Rn_GPR64, Rm_GPR64);
	tmp:8 = Rn_GPR64 - Rm_GPR64;
	resultflags(tmp);
	affectflags();
}

# C6.2.52 CFINV page C6-1236 line 72619 MATCH xd500401f/mask=xfffff0ff
# C6.2.229 MSR (immediate) page C6-1684 line 99649 MATCH xd500401f/mask=xfff8f01f
# CONSTRUCT xd500401f/mask=xfffff0ff MATCHED 2 DOCUMENTED OPCODES
# xd500401f/mask=xfffff0ff NOT MATCHED BY ANY CONSTRUCTOR

:cfinv
is b_1231=0b11010101000000000100 & b_0811 & b_0007=0b00011111
{
	CY = !CY;
}

# C6.2.54 CINC page C6-1238 line 72719 MATCH x1a800400/mask=x7fe00c00
# C6.2.104 CSET page C6-1445 line 86209 MATCH x1a9f07e0/mask=x7fff0fe0
# C6.2.106 CSINC page C6-1449 line 86382 MATCH x1a800400/mask=x7fe00c00
# CONSTRUCT x1a800400/mask=xffe00c00 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst x1a800400/mask=xffe00c00 --status pass --comment "flags"

:cinc Rd_GPR32, Rn_GPR32, InvCondOp
is sf=0 & op=0 & s=0 & b_2428=0x1a & b_2123=4 & Rm_GPR32 & InvCondOp & b_1011=1 & Rn=Rm & (Rn!=0x1f) & (b_15=0 | b_14=0 | b_13=0) & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	condition:1 = InvCondOp;
	tmp:4 = Rn_GPR32;
	if (!condition) goto <skip>;
	tmp = Rn_GPR32 + 1;
<skip>
	Rd_GPR64 = zext(tmp);
}

# C6.2.54 CINC page C6-1238 line 72719 MATCH x1a800400/mask=x7fe00c00
# C6.2.104 CSET page C6-1445 line 86209 MATCH x1a9f07e0/mask=x7fff0fe0
# C6.2.106 CSINC page C6-1449 line 86382 MATCH x1a800400/mask=x7fe00c00
# CONSTRUCT x9a800400/mask=xffe00c00 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst x9a800400/mask=xffe00c00 --status pass --comment "flags"

:cinc Rd_GPR64, Rn_GPR64, InvCondOp
is sf=1 & op=0 & s=0 & b_2428=0x1a & b_2123=4 & Rm_GPR64 & InvCondOp & b_1011=1 & Rn=Rm & (Rn!=0x1f) & (b_15=0 | b_14=0 | b_13=0) & Rn_GPR64 & Rd_GPR64
{
	condition:1 = InvCondOp;
	tmp:8 = Rn_GPR64;
	if (!condition) goto <skip>;
	tmp = Rn_GPR64 + 1;
<skip>
	Rd_GPR64 = tmp;
}

# C6.2.55 CINV page C6-1240 line 72809 MATCH x5a800000/mask=x7fe00c00
# C6.2.105 CSETM page C6-1447 line 86295 MATCH x5a9f03e0/mask=x7fff0fe0
# C6.2.107 CSINV page C6-1451 line 86486 MATCH x5a800000/mask=x7fe00c00
# CONSTRUCT x5a800000/mask=xffe00c00 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst x5a800000/mask=xffe00c00 --status pass --comment "flags"

:cinv Rd_GPR32, Rn_GPR32, InvCondOp
is sf=0 & op=1 & s=0 & b_2428=0x1a & b_2123=4 & Rm_GPR32 & InvCondOp & b_1011=0 & Rn=Rm & (Rn!=0x1f) & (b_15=0 | b_14=0 | b_13=0) & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	condition:1 = InvCondOp;
	tmp:4 = Rn_GPR32;
	if (!condition) goto <skip>;
	tmp = ~Rn_GPR32;
<skip>
	Rd_GPR64 = zext(tmp);
}

# C6.2.55 CINV page C6-1240 line 72809 MATCH x5a800000/mask=x7fe00c00
# C6.2.105 CSETM page C6-1447 line 86295 MATCH x5a9f03e0/mask=x7fff0fe0
# C6.2.107 CSINV page C6-1451 line 86486 MATCH x5a800000/mask=x7fe00c00
# CONSTRUCT xda800000/mask=xffe00c00 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst xda800000/mask=xffe00c00 --status pass --comment "flags"

:cinv Rd_GPR64, Rn_GPR64, InvCondOp
is sf=1 & op=1 & s=0 & b_2428=0x1a & b_2123=4 & Rm_GPR64 & InvCondOp & b_1011=0 & Rn=Rm & (Rn!=0x1f) & (b_15=0 | b_14=0 | b_13=0) & Rn_GPR64 & Rd_GPR64
{
	condition:1 = InvCondOp;
	tmp:8 = Rn_GPR64;
	if (!condition) goto <skip>;
	tmp = ~Rn_GPR64;
<skip>
	Rd_GPR64 = tmp;
}

# C6.2.56 CLREX page C6-1242 line 72899 MATCH xd503305f/mask=xfffff0ff
# CONSTRUCT xd503305f/mask=xfffff0ff MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd503305f/mask=xfffff0ff --status nodest

:clrex CRm_uimm4_def15
is b_2431=0xd5 & b_2223=0 & l=0 & Op0=0 & Op1=3 & CRn=0x3 & CRm_uimm4_def15 & Op2=2 & Rt=0x1f
{
	ClearExclusiveLocal();
}

# C6.2.57 CLS page C6-1243 line 72939 MATCH x5ac01400/mask=x7ffffc00
# CONSTRUCT x5ac01400/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x5ac01400/mask=xfffffc00 --status pass

:cls Rd_GPR32, Rn_GPR32
is sf=0 & b_3030=1 & S=0 & b_2428=0x1a & b_2123=6 & dp1.opcode2=0x0 & b_1015=0x5 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	local tmp:4 = (Rn_GPR32 ^ (Rn_GPR32<<1))|0x1;
	# first make all lower bits =1
	tmp = tmp | (tmp >> 1);
	tmp = tmp | (tmp >> 2);
	tmp = tmp | (tmp >> 4);
	tmp = tmp | (tmp >> 8);
	tmp = tmp | (tmp >> 16);
	# now add the 1 bits together, voila
	tmp = ((tmp & 0xaaaaaaaa)>>1) + (tmp & 0x55555555);
	tmp = ((tmp & 0xcccccccc)>>2) + (tmp & 0x33333333);
	tmp = ((tmp & 0xf0f0f0f0)>>4) + (tmp & 0x0f0f0f0f);
	tmp = ((tmp & 0xff00ff00)>>8) + (tmp & 0x00ff00ff);
	tmp = ((tmp & 0xffff0000)>>16) + (tmp & 0x0000ffff);
	Rd_GPR64 = zext(32 - (tmp & 0x3f));
}

# C6.2.57 CLS page C6-1243 line 72939 MATCH x5ac01400/mask=x7ffffc00
# CONSTRUCT xdac01400/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xdac01400/mask=xfffffc00 --status pass

:cls Rd_GPR64, Rn_GPR64
is sf=1 & b_3030=1 & S=0 & b_2428=0x1a & b_2123=6 & dp1.opcode2=0x0 & b_1015=0x5 & Rn_GPR64 & Rd_GPR64
{
	local tmp:8 = (Rn_GPR64 ^ (Rn_GPR64<<1))|0x1;
	# first make all lower bits =1
	tmp = tmp | (tmp >> 1);
	tmp = tmp | (tmp >> 2);
	tmp = tmp | (tmp >> 4);
	tmp = tmp | (tmp >> 8);
	tmp = tmp | (tmp >> 16);
	tmp = tmp | (tmp >> 32);
	# now add the 1 bits together, voila
	tmp = ((tmp & 0xaaaaaaaaaaaaaaaa)>>1) + (tmp & 0x5555555555555555);
	tmp = ((tmp & 0xcccccccccccccccc)>>2) + (tmp & 0x3333333333333333);
	tmp = ((tmp & 0xf0f0f0f0f0f0f0f0)>>4) + (tmp & 0x0f0f0f0f0f0f0f0f);
	tmp = ((tmp & 0xff00ff00ff00ff00)>>8) + (tmp & 0x00ff00ff00ff00ff);
	tmp = ((tmp & 0xffff0000ffff0000)>>16) + (tmp & 0x0000ffff0000ffff);
	tmp = ((tmp & 0xffffffff00000000)>>32) + (tmp & 0x00000000ffffffff);
	Rd_GPR64 = 64 - (tmp & 0x7f);
}

# C6.2.58 CLZ page C6-1245 line 73022 MATCH x5ac01000/mask=x7ffffc00
# CONSTRUCT x5ac01000/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x5ac01000/mask=xfffffc00 --status pass

:clz Rd_GPR32, Rn_GPR32
is sf=0 & b_3030=1 & S=0 & b_2428=0x1a & b_2123=6 & dp1.opcode2=0x0 & b_1015=0x4 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	local tmp:4 = Rn_GPR32;
	# first make all lower bits =1
	tmp = tmp | (tmp >> 1);
	tmp = tmp | (tmp >> 2);
	tmp = tmp | (tmp >> 4);
	tmp = tmp | (tmp >> 8);
	tmp = tmp | (tmp >> 16);
	# now add the 1 bits together, voila
	tmp = ((tmp & 0xaaaaaaaa)>>1) + (tmp & 0x55555555);
	tmp = ((tmp & 0xcccccccc)>>2) + (tmp & 0x33333333);
	tmp = ((tmp & 0xf0f0f0f0)>>4) + (tmp & 0x0f0f0f0f);
	tmp = ((tmp & 0xff00ff00)>>8) + (tmp & 0x00ff00ff);
	tmp = ((tmp & 0xffff0000)>>16) + (tmp & 0x0000ffff);
	Rd_GPR64 = zext(32 - (tmp & 0x3f));
}

# C6.2.58 CLZ page C6-1245 line 73022 MATCH x5ac01000/mask=x7ffffc00
# CONSTRUCT xdac01000/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xdac01000/mask=xfffffc00 --status pass

:clz Rd_GPR64, Rn_GPR64
is sf=1 & b_3030=1 & S=0 & b_2428=0x1a & b_2123=6 & dp1.opcode2=0x0 & b_1015=0x4 & Rn_GPR64 & Rd_GPR64
{
	local tmp:8 = Rn_GPR64;
	# first make all lower bits =1
	tmp = tmp | (tmp >> 1);
	tmp = tmp | (tmp >> 2);
	tmp = tmp | (tmp >> 4);
	tmp = tmp | (tmp >> 8);
	tmp = tmp | (tmp >> 16);
	tmp = tmp | (tmp >> 32);
	# now add the 1 bits together, voila
	tmp = ((tmp & 0xaaaaaaaaaaaaaaaa)>>1) + (tmp & 0x5555555555555555);
	tmp = ((tmp & 0xcccccccccccccccc)>>2) + (tmp & 0x3333333333333333);
	tmp = ((tmp & 0xf0f0f0f0f0f0f0f0)>>4) + (tmp & 0x0f0f0f0f0f0f0f0f);
	tmp = ((tmp & 0xff00ff00ff00ff00)>>8) + (tmp & 0x00ff00ff00ff00ff);
	tmp = ((tmp & 0xffff0000ffff0000)>>16) + (tmp & 0x0000ffff0000ffff);
	tmp = ((tmp & 0xffffffff00000000)>>32) + (tmp & 0x00000000ffffffff);
	Rd_GPR64 = 64 - (tmp & 0x7f);
}

# C6.2.59 CMN (extended register) page C6-1246 line 73092 MATCH x2b20001f/mask=x7fe0001f
# C6.2.7 ADDS (extended register) page C6-1156 line 68516 MATCH x2b200000/mask=x7fe00000
# CONSTRUCT x2b20001f/mask=xffe0001f MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x2b20001f/mask=xffe0001f --status pass --comment "flags"

:cmn Rn_GPR32wsp, ExtendRegShift32
is sf=0 & op=0 & S=1 & SBIT_CZNO & b_2428=0xb & opt=0 & b_2121=1 & ExtendRegShift32 & Rn_GPR32wsp & Rd=0x1f
{
	tmp_1:4 = ExtendRegShift32;
	addflags(Rn_GPR32wsp, tmp_1);
	result:4 = Rn_GPR32wsp + tmp_1;
	resultflags(result);
	build SBIT_CZNO;
}

# C6.2.59 CMN (extended register) page C6-1246 line 73092 MATCH x2b20001f/mask=x7fe0001f
# C6.2.7 ADDS (extended register) page C6-1156 line 68516 MATCH x2b200000/mask=x7fe00000
# CONSTRUCT xab20001f/mask=xffe0001f MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xab20001f/mask=xffe0001f --status pass --comment "flags"

:cmn Rn_GPR64xsp, ExtendRegShift64
is sf=1 & op=0 & S=1 & SBIT_CZNO & b_2428=0xb & b_2121=1 & opt=0 & ExtendRegShift64 & Rn_GPR64xsp & Rd=0x1f
{
	tmp_1:8 = ExtendRegShift64;
	addflags(Rn_GPR64xsp, tmp_1);
	result:8 = Rn_GPR64xsp + tmp_1;
	resultflags(result);
	build SBIT_CZNO;
}

# C6.2.60 CMN (immediate) page C6-1248 line 73219 MATCH x3100001f/mask=x7f80001f
# C6.2.8 ADDS (immediate) page C6-1159 line 68669 MATCH x31000000/mask=x7f800000
# CONSTRUCT x3100001f/mask=xff00001f MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x3100001f/mask=xff00001f --status pass --comment "flags"

:cmn Rn_GPR32xsp, ImmShift32
is sf=0 & b_30=0 & b_29=1 & aa_Xd=31 & b_2428=0x11 & ImmShift32 & Rn_GPR32xsp
{
	addflags(Rn_GPR32xsp, ImmShift32);
	tmp:4 = Rn_GPR32xsp + ImmShift32;
	resultflags(tmp);
	affectflags();
}

# C6.2.60 CMN (immediate) page C6-1248 line 73219 MATCH x3100001f/mask=x7f80001f
# C6.2.8 ADDS (immediate) page C6-1159 line 68669 MATCH x31000000/mask=x7f800000
# CONSTRUCT xb100001f/mask=xff00001f MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xb100001f/mask=xff00001f --status pass --comment "flags"

:cmn Rn_GPR64xsp, ImmShift64
is sf=1 & b_30=0 & b_29=1 & aa_Xd=31 & b_2428=0x11 & ImmShift64 & Rn_GPR64xsp
{
	addflags(Rn_GPR64xsp, ImmShift64);
	tmp:8 = Rn_GPR64xsp + ImmShift64;
	resultflags(tmp);
	affectflags();
}

# C6.2.60 CMN (immediate) page C6-1248 line 73219 MATCH x3100001f/mask=x7f80001f
# C6.2.8 ADDS (immediate) page C6-1159 line 68669 MATCH x31000000/mask=x7f800000
# CONSTRUCT x3100001f/mask=xffc0001f MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x3100001f/mask=xffc0001f --status pass --comment "flags"

:cmn Rn_GPR32wsp, Imm12_addsubimm_operand_i32_posimm_lsl0
is sf=0 & op=0 & S=1 & b_2428=0x11 & shift=0 & Imm12_addsubimm_operand_i32_posimm_lsl0 & Rn_GPR32wsp & Rd=0x1f
{
	tmp_1:4 = Imm12_addsubimm_operand_i32_posimm_lsl0;
	addflags(Rn_GPR32wsp, tmp_1);
	result:4 = Rn_GPR32wsp + tmp_1;
	resultflags(result);
	affectflags();
}

# C6.2.60 CMN (immediate) page C6-1248 line 73219 MATCH x3100001f/mask=x7f80001f
# C6.2.8 ADDS (immediate) page C6-1159 line 68669 MATCH x31000000/mask=x7f800000
# CONSTRUCT x3140001f/mask=xffc0001f MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x3140001f/mask=xffc0001f --status pass --comment "flags"

:cmn Rn_GPR32wsp, Imm12_addsubimm_operand_i32_posimm_lsl12
is sf=0 & op=0 & S=1 & b_2428=0x11 & shift=1 & Imm12_addsubimm_operand_i32_posimm_lsl12 & Rn_GPR32wsp & Rd=0x1f
{
	tmp_1:4 = Imm12_addsubimm_operand_i32_posimm_lsl12;
	addflags(Rn_GPR32wsp, tmp_1);
	result:4 = Rn_GPR32wsp + tmp_1;
	resultflags(result);
	affectflags();
}

# C6.2.60 CMN (immediate) page C6-1248 line 73219 MATCH x3100001f/mask=x7f80001f
# C6.2.8 ADDS (immediate) page C6-1159 line 68669 MATCH x31000000/mask=x7f800000
# CONSTRUCT xb100001f/mask=xffc0001f MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xb100001f/mask=xffc0001f --status pass --comment "flags"

:cmn Rn_GPR64xsp, Imm12_addsubimm_operand_i64_posimm_lsl0
is sf=1 & op=0 & S=1 & SBIT_CZNO & b_2428=0x11 & shift=0 & Imm12_addsubimm_operand_i64_posimm_lsl0 & Rn_GPR64xsp & Rd=0x1f
{
	tmp_1:8 = Imm12_addsubimm_operand_i64_posimm_lsl0;
	addflags(Rn_GPR64xsp, tmp_1);
	result:8 = Rn_GPR64xsp + tmp_1;
	resultflags(result);
	build SBIT_CZNO;
}

# C6.2.60 CMN (immediate) page C6-1248 line 73219 MATCH x3100001f/mask=x7f80001f
# C6.2.8 ADDS (immediate) page C6-1159 line 68669 MATCH x31000000/mask=x7f800000
# CONSTRUCT xb140001f/mask=xffc0001f MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xb140001f/mask=xffc0001f --status pass --comment "flags"

:cmn Rn_GPR64xsp, Imm12_addsubimm_operand_i64_posimm_lsl12
is sf=1 & op=0 & S=1 & b_2428=0x11 & shift=1 & Imm12_addsubimm_operand_i64_posimm_lsl12 & Rn_GPR64xsp & Rd=0x1f
{
	tmp_1:8 = Imm12_addsubimm_operand_i64_posimm_lsl12;
	addflags(Rn_GPR64xsp, tmp_1);
	result:8 = Rn_GPR64xsp + tmp_1;
	resultflags(result);
	affectflags();
}

# C6.2.61 CMN (shifted register) page C6-1250 line 73309 MATCH x2b00001f/mask=x7f20001f
# C6.2.9 ADDS (shifted register) page C6-1161 line 68775 MATCH x2b000000/mask=x7f200000
# CONSTRUCT x2b00001f/mask=xff20801f MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x2b00001f/mask=xff20801f --status pass --comment "flags"
# if shift == '11' then ReservedValue();

:cmn Rn_GPR32, RegShift32
is sf=0 & op=0 & S=1 & SBIT_CZNO & b_2428=0xb & b_2121=0 & b_15=0 & RegShift32 & Rn_GPR32 & Rd=0x1f
{
	tmp_1:4 = RegShift32;
	addflags(Rn_GPR32, tmp_1);
	result:4 = Rn_GPR32 + tmp_1;
	resultflags(result);
	build SBIT_CZNO;
}

# C6.2.61 CMN (shifted register) page C6-1250 line 73309 MATCH x2b00001f/mask=x7f20001f
# C6.2.9 ADDS (shifted register) page C6-1161 line 68775 MATCH x2b000000/mask=x7f200000
# CONSTRUCT xab00001f/mask=xff20001f MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xab00001f/mask=xff20001f --status pass --comment "flags"

:cmn Rn_GPR64, RegShift64
is sf=1 & op=0 & S=1 & SBIT_CZNO & b_2428=0xb & b_2121=0 & RegShift64 & Rn_GPR64 & Rd=0x1f
{
	tmp_1:8 = RegShift64;
	addflags(Rn_GPR64, tmp_1);
	result:8 = Rn_GPR64 + tmp_1;
	resultflags(result);
	build SBIT_CZNO;
}

# C6.2.62 CMP (extended register) page C6-1252 line 73406 MATCH x6b20001f/mask=x7fe0001f
# C6.2.362 SUBS (extended register) page C6-1950 line 114543 MATCH x6b200000/mask=x7fe00000
# CONSTRUCT x6b20001f/mask=xffe0001f MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x6b20001f/mask=xffe0001f --status pass --comment "flags"

:cmp Rn_GPR32wsp, ExtendRegShift32
is sf=0 & op=1 & S=1 & b_2428=0xb & opt=0 & b_2121=1 & ExtendRegShift32 & Rn_GPR32wsp & Rd=0x1f
{
	subflags(Rn_GPR32wsp, ExtendRegShift32);
	tmp:4 = Rn_GPR32wsp - ExtendRegShift32;
	resultflags(tmp);
	affectflags();
}

# C6.2.62 CMP (extended register) page C6-1252 line 73406 MATCH x6b20001f/mask=x7fe0001f
# C6.2.362 SUBS (extended register) page C6-1950 line 114543 MATCH x6b200000/mask=x7fe00000
# CONSTRUCT xeb20001f/mask=xffe0001f MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xeb20001f/mask=xffe0001f --status pass --comment "flags"

:cmp Rn_GPR64xsp, ExtendRegShift64
is sf=1 & op=1 & S=1 & b_2428=0xb & opt=0 & b_2121=1 & ExtendRegShift64 & Rn_GPR64xsp & Rd=0x1f
{
	subflags(Rn_GPR64xsp, ExtendRegShift64);
	tmp:8 = Rn_GPR64xsp - ExtendRegShift64;
	resultflags(tmp);
	affectflags();
}

# C6.2.63 CMP (immediate) page C6-1254 line 73533 MATCH x7100001f/mask=x7f80001f
# C6.2.363 SUBS (immediate) page C6-1953 line 114699 MATCH x71000000/mask=x7f800000
# CONSTRUCT x7100001f/mask=xff00001f MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x7100001f/mask=xff00001f --status pass --comment "flags"

:cmp Rn_GPR32xsp, ImmShift32
is sf=0 & b_30=1 & b_29=1 & b_2428=0x11 & ImmShift32 & Rn_GPR32xsp & aa_Wd=31
{
	subflags(Rn_GPR32xsp, ImmShift32);
	tmp:4 = Rn_GPR32xsp - ImmShift32;
	resultflags(tmp);
	affectflags();
}

# C6.2.63 CMP (immediate) page C6-1254 line 73533 MATCH x7100001f/mask=x7f80001f
# C6.2.363 SUBS (immediate) page C6-1953 line 114699 MATCH x71000000/mask=x7f800000
# CONSTRUCT xf100001f/mask=xff00001f MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xf100001f/mask=xff00001f --status pass --comment "flags"

:cmp Rn_GPR64xsp, ImmShift64
is sf=1 & b_30=1 & b_29=1 & b_2428=0x11 & ImmShift64 & Rn_GPR64xsp & aa_Wd=31
{
	subflags(Rn_GPR64xsp, ImmShift64);
	tmp:8 = Rn_GPR64xsp - ImmShift64;
	resultflags(tmp);
	affectflags();
}

# C6.2.63 CMP (immediate) page C6-1254 line 73533 MATCH x7100001f/mask=x7f80001f
# C6.2.363 SUBS (immediate) page C6-1953 line 114699 MATCH x71000000/mask=x7f800000
# CONSTRUCT x7100001f/mask=xffc0001f MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x7100001f/mask=xffc0001f --status pass --comment "flags"

:cmp Rn_GPR32wsp, Imm12_addsubimm_operand_i32_negimm_lsl0
is sf=0 & op=1 & S=1 & b_2428=0x11 & shift=0 & Imm12_addsubimm_operand_i32_negimm_lsl0 & Rn_GPR32wsp & Rd=0x1f
{
	tmp_1:4 = Imm12_addsubimm_operand_i32_negimm_lsl0;
	subflags(Rn_GPR32wsp, Imm12_addsubimm_operand_i32_negimm_lsl0);
	result:4 = Rn_GPR32wsp - tmp_1;
	resultflags(result);
	affectflags();
}

# C6.2.63 CMP (immediate) page C6-1254 line 73533 MATCH x7100001f/mask=x7f80001f
# C6.2.363 SUBS (immediate) page C6-1953 line 114699 MATCH x71000000/mask=x7f800000
# CONSTRUCT x7140001f/mask=xffc0001f MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x7140001f/mask=xffc0001f --status pass --comment "flags"

:cmp Rn_GPR32wsp, Imm12_addsubimm_operand_i32_negimm_lsl12
is sf=0 & op=1 & S=1 & b_2428=0x11 & shift=1 & Imm12_addsubimm_operand_i32_negimm_lsl12 & Rn_GPR32wsp & Rd=0x1f
{
	tmp_2:4 = Imm12_addsubimm_operand_i32_negimm_lsl12;
	subflags(Rn_GPR32wsp, tmp_2);
	tmp_1:4 = Rn_GPR32wsp - tmp_2;
	resultflags(tmp_1);
	affectflags();
}

# C6.2.63 CMP (immediate) page C6-1254 line 73533 MATCH x7100001f/mask=x7f80001f
# C6.2.363 SUBS (immediate) page C6-1953 line 114699 MATCH x71000000/mask=x7f800000
# CONSTRUCT xf100001f/mask=xffc0001f MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xf100001f/mask=xffc0001f --status pass --comment "flags"

:cmp Rn_GPR64xsp, Imm12_addsubimm_operand_i64_negimm_lsl0
is sf=1 & op=1 & S=1 & b_2428=0x11 & shift=0 & Imm12_addsubimm_operand_i64_negimm_lsl0 & Rn_GPR64xsp & Rd=0x1f
{
	tmp_2:8 = Imm12_addsubimm_operand_i64_negimm_lsl0;
	subflags(Rn_GPR64xsp, tmp_2);
	tmp_1:8 = Rn_GPR64xsp - tmp_2;
	resultflags(tmp_1);
	affectflags();
}

# C6.2.63 CMP (immediate) page C6-1254 line 73533 MATCH x7100001f/mask=x7f80001f
# C6.2.363 SUBS (immediate) page C6-1953 line 114699 MATCH x71000000/mask=x7f800000
# CONSTRUCT xf140001f/mask=xffc0001f MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xf140001f/mask=xffc0001f --status pass --comment "flags"

:cmp Rn_GPR64xsp, Imm12_addsubimm_operand_i64_negimm_lsl12
is sf=1 & op=1 & S=1 & b_2428=0x11 & shift=1 & Imm12_addsubimm_operand_i64_negimm_lsl12 & Rn_GPR64xsp & Rd=0x1f
{
	tmp_2:8 = Imm12_addsubimm_operand_i64_negimm_lsl12;
	subflags(Rn_GPR64xsp, tmp_2);
	tmp_1:8 = Rn_GPR64xsp - tmp_2;
	resultflags(tmp_1);
	affectflags();
}

# C6.2.64 CMP (shifted register) page C6-1256 line 73623 MATCH x6b00001f/mask=x7f20001f
# C6.2.235 NEGS page C6-1696 line 100340 MATCH x6b0003e0/mask=x7f2003e0
# C6.2.364 SUBS (shifted register) page C6-1955 line 114807 MATCH x6b000000/mask=x7f200000
# CONSTRUCT x6b00001f/mask=xff20001f MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst x6b00001f/mask=xff20001f --status pass --comment "flags"

:cmp Rn_GPR32, RegShift32
is sf=0 & op=1 & S=1 & b_2428=0xb & b_2121=0 & RegShift32 & Rn!=0x1f & Rn_GPR32 & Rd=0x1f
{
	subflags(Rn_GPR32, RegShift32);
	tmp:4 = Rn_GPR32 - RegShift32;
	resultflags(tmp);
	affectflags();
}

# C6.2.64 CMP (shifted register) page C6-1256 line 73623 MATCH x6b00001f/mask=x7f20001f
# C6.2.235 NEGS page C6-1696 line 100340 MATCH x6b0003e0/mask=x7f2003e0
# C6.2.364 SUBS (shifted register) page C6-1955 line 114807 MATCH x6b000000/mask=x7f200000
# CONSTRUCT xeb00001f/mask=xff20001f MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst xeb00001f/mask=xff20001f --status pass --comment "flags"

:cmp Rn_GPR64, RegShift64
is sf=1 & op=1 & S=1 & b_2428=0xb & b_2121=0 & Rm_GPR64 & RegShift64 & Rn!=0x1f & Rn_GPR64 & Rd=0x1f
{
	subflags(Rn_GPR64, RegShift64);
	tmp:8 = Rn_GPR64 - RegShift64;
	resultflags(tmp);
	affectflags();
}

# C6.2.66 CNEG page C6-1259 line 73771 MATCH x5a800400/mask=x7fe00c00
# C6.2.108 CSNEG page C6-1453 line 86590 MATCH x5a800400/mask=x7fe00c00
# CONSTRUCT x5a800400/mask=xffe00c00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x5a800400/mask=xffe00c00 --status pass --comment "flags"

:cneg Rd_GPR32, Rn_GPR32, InvCondOp
is sf=0 & op=1 & s=0 & b_2428=0x1a & b_2123=4 & Rm_GPR32 & InvCondOp & b_1011=1 & Rn=Rm & (b_15=0 | b_14=0 | b_13=0) & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	condition:1 = InvCondOp;
	tmp:4 = -Rn_GPR32;
	if (condition) goto <skip>;
	tmp = Rn_GPR32;
<skip>
	Rd_GPR64 = zext(tmp);
}

# C6.2.66 CNEG page C6-1259 line 73771 MATCH x5a800400/mask=x7fe00c00
# C6.2.108 CSNEG page C6-1453 line 86590 MATCH x5a800400/mask=x7fe00c00
# CONSTRUCT xda800400/mask=xffe00c00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xda800400/mask=xffe00c00 --status pass --comment "flags"

:cneg Rd_GPR64, Rn_GPR64, InvCondOp
is sf=1 & op=1 & s=0 & b_2428=0x1a & b_2123=4 & Rm_GPR64 & InvCondOp & b_1011=1 & Rn=Rm & (b_15=0 | b_14=0 | b_13=0) & Rn_GPR64 & Rd_GPR64
{
	condition:1 = InvCondOp;
	tmp:8 = -Rn_GPR64;
	if (condition) goto <skip>;
	tmp = Rn_GPR64;
<skip>
	Rd_GPR64 = tmp;
}

# C6.2.68 CPYFP, CPYFM, CPYFE page C6-1262 line 73913 MATCH x19000400/mask=x3f20fc00
# C6.2.69 CPYFPN, CPYFMN, CPYFEN page C6-1267 line 74246 MATCH x1900c400/mask=x3f20fc00
# C6.2.70 CPYFPRN, CPYFMRN, CPYFERN page C6-1272 line 74579 MATCH x19008400/mask=x3f20fc00
# C6.2.79 CPYFPWN, CPYFMWN, CPYFEWN page C6-1317 line 77576 MATCH x19004400/mask=x3f20fc00
# CONSTRUCT x19000400/mask=x3f20fc00 MATCHED 2 DOCUMENTED OPCODES

cpyPhase:"p" is opt=0 {export 0:1;}
cpyPhase:"m" is opt=1 {export 1:1;}
cpyPhase:"e" is opt=2 {export 2:1;}

cpyType: ""		is b_1015=0x01 {export 0x01:1; }
cpyType: "n"	is b_1015=0x31 {export 0x31:1; }
cpyType: "rn"	is b_1015=0x21 {export 0x21:1; }
cpyType: "wn"	is b_1015=0x11 {export 0x11:1; }

cpyType: "rt"	is b_1015=0x09 {export 0x09:1; }
cpyType: "rtn"	is b_1015=0x39 {export 0x39:1; }
cpyType: "rtrn"	is b_1015=0x29 {export 0x29:1; }
cpyType: "rtwn"	is b_1015=0x19 {export 0x19:1; }

cpyType: "t"	is b_1015=0x0d {export 0x0d:1; }
cpyType: "tn"	is b_1015=0x3d {export 0x3d:1; }
cpyType: "trn"	is b_1015=0x2d {export 0x2d:1; }
cpyType: "twn"	is b_1015=0x1d {export 0x1d:1; }

cpyType: "wt"	is b_1015=0x03 {export 0x03:1; }
cpyType: "wtn"	is b_1015=0x33 {export 0x33:1; }
cpyType: "wtrn"	is b_1015=0x23 {export 0x23:1; }
cpyType: "wtwn"	is b_1015=0x13 {export 0x13:1; }


define pcodeop MemoryCopyForward;
# Memory Copy Forward-only
:cpyf^cpyPhase^cpyType [Rd_GPR64]!, [Rs_GPR64]!, Rn_GPR64^"!"
is size.ldstr & b_2429=0x19 & opt != 3 & cpyPhase & b_2121=0 & Rs_GPR64 & cpyType & Rn_GPR64 & Rd_GPR64
{
	MemoryCopyForward(Rd_GPR64, Rs_GPR64, Rn_GPR64, cpyType, cpyPhase);
}
define pcodeop MemoryCopy;
:cpy^cpyPhase^cpyType [Rd_GPR64]!, [Rs_GPR64]!, Rn_GPR64^"!"
is size.ldstr & b_2429=0x1d & opt != 3 & cpyPhase & b_2121=0 & Rs_GPR64 & cpyType & Rn_GPR64 & Rd_GPR64
{
	MemoryCopy(Rd_GPR64, Rs_GPR64, Rn_GPR64, cpyType, cpyPhase);
}

# C6.2.59 CRC32B, CRC32H, CRC32W, CRC32X page C6-611 line 35802 KEEPWITH
# sf == 0 && sz = 00 CRC32CB variant

crcpoly: "" is b_12=0 {tmp:4 = 0x04C11DB7; export *[const]:4 tmp; }
crcpoly: "c" is b_12=1 { tmp:4 = 0x1EDC6F41; export *[const]:4 tmp; }

# C6.2.100 CRC32B, CRC32H, CRC32W, CRC32X page C6-1438 line 85850 MATCH x1ac04000/mask=x7fe0f000
# C6.2.101 CRC32CB, CRC32CH, CRC32CW, CRC32CX page C6-1440 line 85958 MATCH x1ac05000/mask=x7fe0f000
# CONSTRUCT x1ac04000/mask=xffe0ec00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x1ac04000/mask=xffe0ec00 --status noqemu

:crc32^crcpoly^"b" Rd_GPR32, Rn_GPR32, Rm_GPR32
is b_31=0 & b_2130=0b0011010110 & b_1315=0b010 & b_1011=0b00 & crcpoly & Rm_GPR32 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	local tmp_Rd:4 = crc32b(Rn_GPR32, Rm_GPR32, crcpoly);
	Rd_GPR64 = zext(tmp_Rd);
}

# C6.2.100 CRC32B, CRC32H, CRC32W, CRC32X page C6-1438 line 85850 MATCH x1ac04000/mask=x7fe0f000
# C6.2.101 CRC32CB, CRC32CH, CRC32CW, CRC32CX page C6-1440 line 85958 MATCH x1ac05000/mask=x7fe0f000
# CONSTRUCT x1ac04400/mask=xffe0ec00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x1ac04400/mask=xffe0ec00 --status noqemu
# sf == 0 && sz = 01 CRC32CH variant

:crc32^crcpoly^"h" Rd_GPR32, Rn_GPR32, Rm_GPR32
is b_31=0 & b_2130=0b0011010110 & b_1315=0b010 & b_1011=0b01 & crcpoly & Rm_GPR32 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	local tmp_Rd:4 = crc32h(Rn_GPR32, Rm_GPR32, crcpoly);
	Rd_GPR64 = zext(tmp_Rd);
}

# C6.2.100 CRC32B, CRC32H, CRC32W, CRC32X page C6-1438 line 85850 MATCH x1ac04000/mask=x7fe0f000
# C6.2.101 CRC32CB, CRC32CH, CRC32CW, CRC32CX page C6-1440 line 85958 MATCH x1ac05000/mask=x7fe0f000
# CONSTRUCT x1ac04800/mask=xffe0ec00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x1ac04800/mask=xffe0ec00 --status noqemu
# sf == 0 && sz = 10 CRC32CW variant

:crc32^crcpoly^"w" Rd_GPR32, Rn_GPR32, Rm_GPR32
is b_31=0 & b_2130=0b0011010110 & b_1315=0b010 & b_1011=0b10 & crcpoly & Rm_GPR32 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	local tmp_Rd:4 = crc32w(Rn_GPR32, Rm_GPR32, crcpoly);
	Rd_GPR64 = zext(tmp_Rd);
}

# C6.2.100 CRC32B, CRC32H, CRC32W, CRC32X page C6-1438 line 85850 MATCH x1ac04000/mask=x7fe0f000
# C6.2.101 CRC32CB, CRC32CH, CRC32CW, CRC32CX page C6-1440 line 85958 MATCH x1ac05000/mask=x7fe0f000
# CONSTRUCT x9ac04c00/mask=xffe0ec00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x9ac04c00/mask=xffe0ec00 --status noqemu
# sf == 1 && sz = 11 CRC32CX variant

:crc32^crcpoly^"x" Rd_GPR32, Rn_GPR32, Rm_GPR64
is b_31=1 & b_2130=0b0011010110 & b_1315=0b010 & b_1011=0b11 & crcpoly & Rm_GPR64 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	local tmp_Rd:4 = crc32x(Rn_GPR32, Rm_GPR64, crcpoly);
	Rd_GPR64 = zext(tmp_Rd);
}

# C6.2.103 CSEL page C6-1443 line 86120 MATCH x1a800000/mask=x7fe00c00
# CONSTRUCT x1a800000/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x1a800000/mask=xffe00c00 --status pass --comment "flags"

:csel Rd_GPR32, Rn_GPR32, Rm_GPR32, CondOp
is sf=0 & op=0 & s=0 & b_2428=0x1a & b_2123=4 & Rm_GPR32 & CondOp & b_1011=0 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	condition:1 = CondOp;
	tmp:4 = Rn_GPR32;
	if (condition) goto <skip>;
	tmp = Rm_GPR32;
<skip>
	Rd_GPR64 = zext(tmp);
}

# C6.2.103 CSEL page C6-1443 line 86120 MATCH x1a800000/mask=x7fe00c00
# CONSTRUCT x9a800000/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x9a800000/mask=xffe00c00 --status pass --comment "flags"

:csel Rd_GPR64, Rn_GPR64, Rm_GPR64, CondOp
is sf=1 & op=0 & s=0 & b_2428=0x1a & b_2123=4 & Rm_GPR64 & CondOp & b_1011=0 & Rn_GPR64 & Rd_GPR64
{
	condition:1 = CondOp;
	tmp:8 = Rn_GPR64;
	if (condition) goto <skip>;
	tmp = Rm_GPR64;
<skip>
	Rd_GPR64 = tmp;
}

# C6.2.104 CSET page C6-1445 line 86209 MATCH x1a9f07e0/mask=x7fff0fe0
# C6.2.54 CINC page C6-1238 line 72719 MATCH x1a800400/mask=x7fe00c00
# C6.2.106 CSINC page C6-1449 line 86382 MATCH x1a800400/mask=x7fe00c00
# CONSTRUCT x1a9f07e0/mask=xffff0fe0 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst x1a9f07e0/mask=xffff0fe0 --status pass --comment "flags"

:cset Rd_GPR32, InvCondOp
is sf=0 & op=0 & s=0 & b_2428=0x1a & b_2123=4 & InvCondOp & b_1011=1 & Rn=0x1f & Rm=0x1f & (b_15=0 | b_14=0 | b_13=0) & Rd_GPR32 & Rd_GPR64
{
	condition:1 = InvCondOp;
	Rd_GPR64 = zext(condition);
}

# C6.2.104 CSET page C6-1445 line 86209 MATCH x1a9f07e0/mask=x7fff0fe0
# C6.2.54 CINC page C6-1238 line 72719 MATCH x1a800400/mask=x7fe00c00
# C6.2.106 CSINC page C6-1449 line 86382 MATCH x1a800400/mask=x7fe00c00
# CONSTRUCT x9a9f07e0/mask=xffff0fe0 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst x9a9f07e0/mask=xffff0fe0 --status pass --comment "flags"

:cset Rd_GPR64, InvCondOp
is sf=1 & op=0 & s=0 & b_2428=0x1a & b_2123=4 & InvCondOp & b_1011=1 & Rn=0x1f & Rm=0x1f & (b_15=0 | b_14=0 | b_13=0) & Rd_GPR64
{
	condition:1 = InvCondOp;
	Rd_GPR64 = zext(condition);
}

# C6.2.105 CSETM page C6-1447 line 86295 MATCH x5a9f03e0/mask=x7fff0fe0
# C6.2.55 CINV page C6-1240 line 72809 MATCH x5a800000/mask=x7fe00c00
# C6.2.107 CSINV page C6-1451 line 86486 MATCH x5a800000/mask=x7fe00c00
# CONSTRUCT x5a9f03e0/mask=xffff0fe0 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst x5a9f03e0/mask=xffff0fe0 --status pass --comment "flags"

:csetm Rd_GPR32, InvCondOp
is sf=0 & op=1 & s=0 & b_2428=0x1a & b_2123=4 & Rm_GPR32 & InvCondOp & b_1011=0 & Rn=0x1f & Rm=0x1f & (b_15=0 | b_14=0 | b_13=0) & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	condition:1 = InvCondOp;
	tmp:4 = zext(condition) * -1;
	Rd_GPR64 = zext(tmp);
}

# C6.2.105 CSETM page C6-1447 line 86295 MATCH x5a9f03e0/mask=x7fff0fe0
# C6.2.55 CINV page C6-1240 line 72809 MATCH x5a800000/mask=x7fe00c00
# C6.2.107 CSINV page C6-1451 line 86486 MATCH x5a800000/mask=x7fe00c00
# CONSTRUCT xda9f03e0/mask=xffff0fe0 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst xda9f03e0/mask=xffff0fe0 --status pass --comment "flags"

:csetm Rd_GPR64, InvCondOp
is sf=1 & op=1 & s=0 & b_2428=0x1a & b_2123=4 & Rm_GPR64 & InvCondOp & b_1011=0 & Rn=0x1f & Rm=0x1f & (b_15=0 | b_14=0 | b_13=0) & Rn_GPR64 & Rd_GPR64
{
	condition:1 = InvCondOp;
	Rd_GPR64 = zext(condition) * -1;
}

# C6.2.106 CSINC page C6-1449 line 86382 MATCH x1a800400/mask=x7fe00c00
# C6.2.54 CINC page C6-1238 line 72719 MATCH x1a800400/mask=x7fe00c00
# C6.2.104 CSET page C6-1445 line 86209 MATCH x1a9f07e0/mask=x7fff0fe0
# CONSTRUCT x1a800400/mask=xffe00c00 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst x1a800400/mask=xffe00c00 --status pass --comment "flags"

:csinc Rd_GPR32, Rn_GPR32, Rm_GPR32, CondOp
is sf=0 & op=0 & s=0 & b_2428=0x1a & b_2123=4 & Rm_GPR32 & CondOp & b_1011=1 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	condition:1 = CondOp;
	tmp:4 = Rn_GPR32;
	if (condition) goto <skip>;
	tmp = Rm_GPR32 + 1;
<skip>
	Rd_GPR64 = zext(tmp);
}

# C6.2.106 CSINC page C6-1449 line 86382 MATCH x1a800400/mask=x7fe00c00
# C6.2.54 CINC page C6-1238 line 72719 MATCH x1a800400/mask=x7fe00c00
# C6.2.104 CSET page C6-1445 line 86209 MATCH x1a9f07e0/mask=x7fff0fe0
# CONSTRUCT x9a800400/mask=xffe00c00 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst x9a800400/mask=xffe00c00 --status pass --comment "flags"

:csinc Rd_GPR64, Rn_GPR64, Rm_GPR64, CondOp
is sf=1 & op=0 & s=0 & b_2428=0x1a & b_2123=4 & Rm_GPR64 & CondOp & b_1011=1 & Rn_GPR64 & Rd_GPR64
{
	condition:1 = CondOp;
	tmp:8 = Rn_GPR64;
	if (condition) goto <skip>;
	tmp = Rm_GPR64 + 1;
<skip>
	Rd_GPR64 = tmp;
}

# C6.2.107 CSINV page C6-1451 line 86486 MATCH x5a800000/mask=x7fe00c00
# C6.2.55 CINV page C6-1240 line 72809 MATCH x5a800000/mask=x7fe00c00
# C6.2.105 CSETM page C6-1447 line 86295 MATCH x5a9f03e0/mask=x7fff0fe0
# CONSTRUCT x5a800000/mask=xffe00c00 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst x5a800000/mask=xffe00c00 --status pass --comment "flags"

:csinv Rd_GPR32, Rn_GPR32, Rm_GPR32, CondOp
is sf=0 & op=1 & s=0 & b_2428=0x1a & b_2123=4 & Rm_GPR32 & CondOp & b_1011=0 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	condition:1 = CondOp;
	tmp:4 = Rn_GPR32;
	if (condition) goto <skip>;
	tmp = ~Rm_GPR32;
<skip>
	Rd_GPR64 = zext(tmp);
}

# C6.2.107 CSINV page C6-1451 line 86486 MATCH x5a800000/mask=x7fe00c00
# C6.2.55 CINV page C6-1240 line 72809 MATCH x5a800000/mask=x7fe00c00
# C6.2.105 CSETM page C6-1447 line 86295 MATCH x5a9f03e0/mask=x7fff0fe0
# CONSTRUCT xda800000/mask=xffe00c00 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst xda800000/mask=xffe00c00 --status pass --comment "flags"

:csinv Rd_GPR64, Rn_GPR64, Rm_GPR64, CondOp
is sf=1 & op=1 & s=0 & b_2428=0x1a & b_2123=4 & Rm_GPR64 & CondOp & b_1011=0 & Rn_GPR64 & Rd_GPR64
{
	condition:1 = CondOp;
	tmp:8 = Rn_GPR64;
	if (condition) goto <skip>;
	tmp = ~Rm_GPR64;
<skip>
	Rd_GPR64 = tmp;
}

# C6.2.108 CSNEG page C6-1453 line 86590 MATCH x5a800400/mask=x7fe00c00
# C6.2.66 CNEG page C6-1259 line 73771 MATCH x5a800400/mask=x7fe00c00
# CONSTRUCT x5a800400/mask=xffe00c00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x5a800400/mask=xffe00c00 --status pass --comment "flags"

:csneg Rd_GPR32, Rn_GPR32, Rm_GPR32, CondOp
is sf=0 & op=1 & s=0 & b_2428=0x1a & b_2123=4 & Rm_GPR32 & CondOp & b_1011=1 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	condition:1 = CondOp;
	tmp:4 = Rn_GPR32;
	if (condition) goto <skip>;
	tmp = -Rm_GPR32;
<skip>
	Rd_GPR64 = zext(tmp);
}

# C6.2.108 CSNEG page C6-1453 line 86590 MATCH x5a800400/mask=x7fe00c00
# C6.2.66 CNEG page C6-1259 line 73771 MATCH x5a800400/mask=x7fe00c00
# CONSTRUCT xda800400/mask=xffe00c00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xda800400/mask=xffe00c00 --status pass --comment "flags"

:csneg Rd_GPR64, Rn_GPR64, Rm_GPR64, CondOp
is sf=1 & op=1 & s=0 & b_2428=0x1a & b_2123=4 & Rm_GPR64 & CondOp & b_1011=1 & Rn_GPR64 & Rd_GPR64
{
	condition:1 = CondOp;
	tmp:8 = Rn_GPR64;
	if (condition) goto <skip>;
	tmp = -Rm_GPR64;
<skip>
	Rd_GPR64 = tmp;
}

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50b7420/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst xd50b7420/mask=xffffffe0 --status nodest

:dc "ZVA", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b011 & b_1215=0b0111 & b_0811=0b0100 & b_0507=0b001 & Rt_GPR64
{ DC_ZVA(Rt_GPR64); }

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5087620/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst xd5087620/mask=xffffffe0 --status nodest

:dc "IVAC", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b0111 & b_0811=0b0110 & b_0507=0b001 & Rt_GPR64
{ DC_IVAC(Rt_GPR64); }

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5087640/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst xd5087640/mask=xffffffe0 --status nodest

:dc "ISW", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b0111 & b_0811=0b0110 & b_0507=0b010 & Rt_GPR64
{ DC_ISW(Rt_GPR64); }

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50b7a20/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst xd50b7a20/mask=xffffffe0 --status nopcodeop

:dc "CVAC", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b011 & b_1215=0b0111 & b_0811=0b1010 & b_0507=0b001 & Rt_GPR64
{ DC_CVAC(Rt_GPR64); }

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5087a40/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst xd5087a40/mask=xffffffe0 --status nodest

:dc "CSW", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b0111 & b_0811=0b1010 & b_0507=0b010 & Rt_GPR64
{ DC_CSW(Rt_GPR64); }

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50b7b20/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst xd50b7b20/mask=xffffffe0 --status nodest

:dc "CVAU", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b011 & b_1215=0b0111 & b_0811=0b1011 & b_0507=0b001 & Rt_GPR64
{ DC_CVAU(Rt_GPR64); }

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50b7e20/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst xd50b7e20/mask=xffffffe0 --status nodest

:dc "CIVAC", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b011 & b_1215=0b0111 & b_0811=0b1110 & b_0507=0b001 & Rt_GPR64
{ DC_CIVAC(Rt_GPR64); }

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5087e40/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst xd5087e40/mask=xffffffe0 --status nodest

:dc "CISW", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b0111 & b_0811=0b1110 & b_0507=0b010 & Rt_GPR64
{ DC_CISW(Rt_GPR64); }

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50b7c20/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst xd50b7c20/mask=xffffffe0 --status nodest

:dc "CVAP", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b011 & b_1215=0b0111 & b_0811=0b1100 & b_0507=0b001 & Rt_GPR64
{ DC_CVAP(Rt_GPR64); }

# C6.2.110 DCPS1 page C6-1457 line 86790 MATCH xd4a00001/mask=xffe0001f
# CONSTRUCT xd4a00001/mask=xffe0001f MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd4a00001/mask=xffe0001f --status nodest

:dcps1 imm16
is b_2431=0xd4 & excCode=5 & imm16 & excCode2=0 & ll=1
{
	DCPSInstruction(1:2, imm16:2);
}

# C6.2.111 DCPS2 page C6-1458 line 86856 MATCH xd4a00002/mask=xffe0001f
# CONSTRUCT xd4a00002/mask=xffe0001f MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd4a00002/mask=xffe0001f --status nodest

:dcps2 imm16
is b_2431=0xd4 & excCode=5 & imm16 & excCode2=0 & ll=2
{
	DCPSInstruction(2:2, imm16:2);
}

# C6.2.112 DCPS3 page C6-1459 line 86927 MATCH xd4a00003/mask=xffe0001f
# CONSTRUCT xd4a00003/mask=xffe0001f MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd4a00003/mask=xffe0001f --status nodest

:dcps3 imm16
is b_2431=0xd4 & excCode=5 & imm16 & excCode2=0 & ll=3
{
	DCPSInstruction(3:2, imm16:2);
}

# C6.2.114 DMB page C6-1461 line 87029 MATCH xd50330bf/mask=xfffff0ff
# CONSTRUCT xd50330bf/mask=xfffff3ff MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd50330bf/mask=xfffff3ff --status nodest

:dmb CRm_CRx
is b_2431=0xd5 & b_2223=0 & l=0 & Op0=0 & Op1=3 & CRn=0x3 & CRm_dbarrier_op & CRm_CRx & CRm_32 & CRm_10=0 & Op2=5 & Rt=0x1f
{
	types:1 = 0x0;
	domain:1 = CRm_32;
	DataMemoryBarrier(domain, types);
}

# C6.2.114 DMB page C6-1461 line 87029 MATCH xd50330bf/mask=xfffff0ff
# CONSTRUCT xd50330bf/mask=xfffff0ff MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd50330bf/mask=xfffff0ff --status nodest

:dmb CRm_dbarrier_op
is b_2431=0xd5 & b_2223=0 & l=0 & Op0=0 & Op1=3 & CRn=0x3 & CRm_dbarrier_op & CRm_32 & CRm_10 & Op2=5 & Rt=0x1f
{
	types:1 = CRm_10;
	domain:1 = CRm_32;
	DataMemoryBarrier(domain, types);
}

# C6.2.115 DRPS page C6-1463 line 87125 MATCH xd6bf03e0/mask=xffffffff
# CONSTRUCT xd6bf03e0/mask=xffffffff MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd6bf03e0/mask=xffffffff --status nodest

:drps
is b_2531=0x6b & b_2324=1 & b_2122=1 & b_1620=0x1f & b_1015=0 & aa_Xn=31 & b_0004=0
{
	pc = DRPSInstruction();
	return [pc];
}

# C6.2.116 DSB page C6-1464 line 87160 MATCH xd503309f/mask=xfffff0ff
# C6.2.252 PSSBB page C6-1727 line 101951 MATCH xd503349f/mask=xffffffff
# C6.2.290 SSBB page C6-1810 line 106930 MATCH xd503309f/mask=xffffffff
# CONSTRUCT xd503309f/mask=xfffff3ff MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst xd503309f/mask=xfffff3ff --status nodest

:dsb CRm_CRx
is b_2431=0xd5 & b_2223=0 & l=0 & Op0=0 & Op1=3 & CRn=0x3 & CRm_dbarrier_op & CRm_CRx & CRm_32 & CRm_10=0 & Op2=4 & Rt=0x1f
{
	types:1 = 0x0;
	domain:1 = CRm_32;
	DataSynchronizationBarrier(domain, types);
}

# C6.2.116 DSB page C6-1464 line 87160 MATCH xd503309f/mask=xfffff0ff
# CONSTRUCT xd503309f/mask=xfffff0ff MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd503309f/mask=xfffff0ff --status nodest

:dsb CRm_dbarrier_op
is b_2431=0xd5 & b_2223=0 & l=0 & Op0=0 & Op1=3 & CRn=0x3 & CRm_dbarrier_op & CRm_32 & CRm_10=2 & Op2=4 & Rt=0x1f
{
	types:1 = 0x3; #MBReqTypes_All
	domain:1 = CRm_32;
	DataSynchronizationBarrier(domain, types);
}

# C6.2.116 DSB page C6-1464 line 87160 MATCH xd503323f/mask=xfffff3ff
# CONSTRUCT xd503323f/mask=xfffff3ff MATCHED 1 DOCUMENTED OPCODES
# xd503323f/mask=xfffff3ff NOT MATCHED BY ANY CONSTRUCTOR
# b_0031=11010101000000110011..1000111111

:dsb CRm_32
is b_2431=0xd5 & b_2223=0 & l=0 & Op0=0 & Op1=3 & CRn=0x3 & CRm_dbarrier_op & CRm_32 & CRm_10 & Op2=1 & Rt=0x1f
{
	types:1 = CRm_10;
	domain:1 = CRm_32;
	DataSynchronizationBarrier(domain, types);
}

# C6.2.118 EON (shifted register) page C6-1468 line 87407 MATCH x4a200000/mask=x7f200000
# CONSTRUCT x4a200000/mask=xff200000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x4a200000/mask=xff200000 --status pass

:eon Rd_GPR32, Rn_GPR32, RegShift32Log
is sf=0 & opc=2 & b_2428=0xa & N=1 & RegShift32Log & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp_3:4 = RegShift32Log;
	tmp_2:4 = tmp_3 ^ -1:4;
	tmp_1:4 = Rn_GPR32 ^ tmp_2;
	Rd_GPR64 = zext(tmp_1);
}

# C6.2.118 EON (shifted register) page C6-1468 line 87407 MATCH x4a200000/mask=x7f200000
# CONSTRUCT xca200000/mask=xff200000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xca200000/mask=xff200000 --status pass

:eon Rd_GPR64, Rn_GPR64, RegShift64Log
is sf=1 & opc=2 & b_2428=0xa & N=1 & Rm_GPR64 & RegShift64Log & Rn_GPR64 & Rd_GPR64
{
	tmp_3:8= RegShift64Log;
	tmp_2:8 = tmp_3 ^ -1:8;
	tmp_1:8 = Rn_GPR64 ^ tmp_2;
	Rd_GPR64 = tmp_1;
}

# C6.2.119 EOR (immediate) page C6-1470 line 87512 MATCH x52000000/mask=x7f800000
# CONSTRUCT x52000000/mask=xff800000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x52000000/mask=xff800000 --status pass

:eor Rd_GPR32wsp, Rn_GPR32, DecodeWMask32
is sf=0 & opc=2 & b_2428=0x12 & b_2323=0 & DecodeWMask32 & Rn_GPR32 & Rd_GPR32wsp & Rd_GPR64xsp
{
	tmp_1:4 = Rn_GPR32 ^ DecodeWMask32;
	Rd_GPR64xsp = zext(tmp_1);
}

# C6.2.119 EOR (immediate) page C6-1470 line 87512 MATCH x52000000/mask=x7f800000
# CONSTRUCT xd2000000/mask=xff800000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd2000000/mask=xff800000 --status pass

:eor Rd_GPR64xsp, Rn_GPR64, DecodeWMask64
is sf=1 & opc=2 & b_2428=0x12 & b_2323=0 & DecodeWMask64 & Rn_GPR64 & Rd_GPR64xsp
{
	tmp_1:8 = Rn_GPR64 ^ DecodeWMask64;
	Rd_GPR64xsp = tmp_1;
}

# C6.2.120 EOR (shifted register) page C6-1472 line 87604 MATCH x4a000000/mask=x7f200000
# CONSTRUCT x4a000000/mask=xff200000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x4a000000/mask=xff200000 --status pass

:eor Rd_GPR32, Rn_GPR32, RegShift32Log
is sf=0 & opc=2 & b_2428=0xa & N=0 & RegShift32Log & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp_2:4 = RegShift32Log;
	tmp_1:4 = Rn_GPR32 ^ tmp_2;
	Rd_GPR64 = zext(tmp_1);
}

# C6.2.120 EOR (shifted register) page C6-1472 line 87604 MATCH x4a000000/mask=x7f200000
# CONSTRUCT xca000000/mask=xff200000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xca000000/mask=xff200000 --status pass

:eor Rd_GPR64, Rn_GPR64, RegShift64Log
is sf=1 & opc=2 & b_2428=0xa & N=0 & Rm_GPR64 & RegShift64Log & Rn_GPR64 & Rd_GPR64
{
	tmp_2:8 = RegShift64Log;
	tmp_1:8 = Rn_GPR64 ^ tmp_2;
	Rd_GPR64 = tmp_1;
}

# C6.2.121 ERET page C6-1474 line 87707 MATCH xd69f03e0/mask=xffffffff
# CONSTRUCT xd69f03e0/mask=xffffffff MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd69f03e0/mask=xffffffff --status nodest

:eret
is b_2531=0x6b & b_2324=1 & b_2122=0 & b_1620=0x1f & b_1015=0 & aa_Xn=31 & b_0004=0
{
	pc = ExceptionReturn();
	return [pc];
}

# C6.2.122 ERETAA, ERETAB page C6-1475 line 87749 MATCH xd69f0bff/mask=xfffffbff
# CONSTRUCT xd69f0bff/mask=xffffffff MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd69f0bff/mask=xffffffff --status nodest

:eretaa
is eretaa__PACpart & b_0031=0xd69f0bff
{
	pc = ExceptionReturn();
	build eretaa__PACpart;
	return [pc];
}

# C6.2.122 ERETAA, ERETAB page C6-1475 line 87749 MATCH xd69f0bff/mask=xfffffbff
# CONSTRUCT xd69f0fff/mask=xffffffff MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd69f0fff/mask=xffffffff --status nodest

:eretab
is eretab__PACpart & b_0031=0xd69f0fff
{
	pc = ExceptionReturn();
	build eretab__PACpart;
	return [pc];
}

# C6.2.124 EXTR page C6-1477 line 87864 MATCH x13800000/mask=x7fa00000
# C6.2.261 ROR (immediate) page C6-1740 line 102633 MATCH x13800000/mask=x7fa00000
# CONSTRUCT x13800000/mask=xffe00000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x13800000/mask=xffe00000 --status pass

:extr Rd_GPR32, Rn_GPR32, Rm_GPR32, LSB_bitfield32_imm
is sf=0 & b_2930=0 & b_2428=0x13 & b_2323=1 & n=0 & b_21=0 & Rm_GPR32 & LSB_bitfield32_imm & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	lsb:8 = LSB_bitfield32_imm;
	result:8 = (zext(Rn_GPR32) << 32) | zext(Rm_GPR32);
	result = (result >> lsb);
	Rd_GPR64 = zext(result:4);
}

# C6.2.124 EXTR page C6-1477 line 87864 MATCH x13800000/mask=x7fa00000
# C6.2.261 ROR (immediate) page C6-1740 line 102633 MATCH x13800000/mask=x7fa00000
# CONSTRUCT x93c00000/mask=xffe00000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x93c00000/mask=xffe00000 --status pass

:extr Rd_GPR64, Rn_GPR64, Rm_GPR64, LSB_bitfield64_imm
is sf=1 & b_2930=0 & b_2428=0x13 & b_2323=1 & n=1 & b_21=0 & Rm_GPR64 & LSB_bitfield64_imm & Rn_GPR64 & Rd_GPR64
{
	local tmp:8 = (Rm_GPR64 >> LSB_bitfield64_imm:1);
	Rd_GPR64 = tmp | (Rn_GPR64 << (64:1 - LSB_bitfield64_imm:1));
}

# C6.2.126 HINT page C6-1480 line 88030 MATCH xd503201f/mask=xfffff01f
# C6.2.22 AUTIA, AUTIA1716, AUTIASP, AUTIAZ, AUTIZA page C6-1183 line 69908 MATCH xd503219f/mask=xfffffddf
# C6.2.23 AUTIB, AUTIB1716, AUTIBSP, AUTIBZ, AUTIZB page C6-1186 line 70065 MATCH xd50321df/mask=xfffffddf
# C6.2.102 CSDB page C6-1442 line 86066 MATCH xd503229f/mask=xffffffff
# C6.2.113 DGH page C6-1460 line 86992 MATCH xd50320df/mask=xffffffff
# C6.2.123 ESB page C6-1476 line 87816 MATCH xd503221f/mask=xffffffff
# C6.2.245 PACIA, PACIA1716, PACIASP, PACIAZ, PACIZA page C6-1712 line 101196 MATCH xd503211f/mask=xfffffddf
# C6.2.246 PACIB, PACIB1716, PACIBSP, PACIBZ, PACIZB page C6-1715 line 101358 MATCH xd503215f/mask=xfffffddf
# C6.2.251 PSB CSYNC page C6-1726 line 101911 MATCH xd503223f/mask=xffffffff
# C6.2.381 TSB CSYNC page C6-1982 line 116218 MATCH xd503225f/mask=xffffffff
# CONSTRUCT xd503201f/mask=xfffff01f MATCHED 10 DOCUMENTED OPCODES
# AUNIT --inst xd503201f/mask=xfffff01f --status nodest

:hint imm7Low
is b_2431=0xd5 & b_2223=0 & l=0 & Op0=0 & Op1=3 & CRn=0x2 & imm7Low & Rt=0x1f {}

# C6.2.127 HLT page C6-1482 line 88176 MATCH xd4400000/mask=xffe0001f
# CONSTRUCT xd4400000/mask=xffe0001f MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd4400000/mask=xffe0001f --status nodest

:hlt imm16
is ALL_BTITARGETS & b_2431=0xd4 & excCode=2 & imm16 & excCode2=0 & ll=0
{
	HaltBreakPoint();
}

# C6.2.128 HVC page C6-1483 line 88218 MATCH xd4000002/mask=xffe0001f
# CONSTRUCT xd4000002/mask=xffe0001f MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd4000002/mask=xffe0001f --status nodest

:hvc imm16
is b_2431=0xd4 & excCode=0 & imm16 & excCode2=0 & ll=2
{
	CallHyperVisor(imm16:2);
}

# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5087100/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst xd5087100/mask=xffffffe0 --status nodest

:ic "IALLUIS"
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b0111 & b_0811=0b0001 & b_0507=0b000
{ IC_IALLUIS(); }

# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5087500/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst xd5087500/mask=xffffffe0 --status nodest

:ic "IALLU"
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b0111 & b_0811=0b0101 & b_0507=0b000
{ IC_IALLU(); }

# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50b7520/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst xd50b7520/mask=xffffffe0 --status nopcodeop

:ic "IVAU", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b011 & b_1215=0b0111 & b_0811=0b0101 & b_0507=0b001 & Rt_GPR64
{ IC_IVAU(Rt_GPR64); }

# C6.2.85 ISB page C6-647 line 37682 KEEPWITH

IsbOption: "#"^CRm_isb_op is CRm_isb_op { export *[const]:4 CRm_isb_op; }
IsbOption: "" is CRm_isb_op=0xf { tmp:4 = 0xf; export tmp; }

# C6.2.131 ISB page C6-1487 line 88428 MATCH xd50330df/mask=xfffff0ff
# CONSTRUCT xd50330df/mask=xfffff0ff MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd50330df/mask=xfffff0ff --status nodest

:isb IsbOption
is b_2431=0xd5 & b_2223=0 & l=0 & Op0=0 & Op1=3 & CRn=0x3 & IsbOption & Op2=6 & Rt=0x1f
{
	InstructionSynchronizationBarrier();
}

# C6.2.86 LDADDB, LDADDAB, LDADDALB, LDADDLB page C6-648 line 37726 KEEPWITH

# variants, a=acquire, al=acquire+release, l=release
# build ls_loa to acquire and ls_lor to release

ls_loa: "a" is b_23=1 & b_22=0 { LOAcquire(); }
ls_loa: "al" is b_23=1 & b_22=1 { LOAcquire(); }
ls_loa: "" is b_23=0 & b_22=0 { }
ls_loa: "l" is b_23=0 & b_22=1 { }

ls_lor: "a" is b_23=1 & b_22=0 { }
ls_lor: "al" is b_23=1 & b_22=1 { LORelease(); }
ls_lor: "" is b_23=0 & b_22=0 { }
ls_lor: "l" is b_23=0 & b_22=1 { LORelease(); }

ls_data1: is b_3031=0b00 & Rn_GPR64xsp { tmp_ldWn = zext(*:1 Rn_GPR64xsp); }
ls_data2: is b_3031=0b01 & Rn_GPR64xsp { tmp_ldWn = zext(*:2 Rn_GPR64xsp); }
ls_data4: is b_3031=0b10 & Rn_GPR64xsp { tmp_ldWn = *:4 Rn_GPR64xsp; }
ls_data8: is b_3031=0b11 & Rn_GPR64xsp { tmp_ldXn = *:8 Rn_GPR64xsp; }

ls_mem1: is Rn_GPR64xsp { *:1 Rn_GPR64xsp = tmp_stWn:1; }
ls_mem2: is Rn_GPR64xsp { *:2 Rn_GPR64xsp = tmp_stWn:2; }
ls_mem4: is Rn_GPR64xsp { *:4 Rn_GPR64xsp = tmp_stWn; }
ls_mem8: is Rn_GPR64xsp { *:8 Rn_GPR64xsp = tmp_stXn; }

macro ls_opc_add (data, value, dest) { dest = data + value; }
macro ls_opc_clr (data, value, dest) { dest = data & (~ value); }
macro ls_opc_eor (data, value, dest) { dest = data ^ value; }
macro ls_opc_set (data, value, dest) { dest = data | value; }
macro ls_opc_smax(data, value, dest) { dest = zext(data s> value) * data + zext(data s<= value) * value; }
macro ls_opc_smin(data, value, dest) { dest = zext(data s> value) * value + zext(data s<= value) * data; }
macro ls_opc_umax(data, value, dest) { dest = zext(data > value) * data + zext(data <= value) * value; }
macro ls_opc_umin(data, value, dest) { dest = zext(data > value) * value + zext(data <= value) * data; }
macro ls_opc_swp (data, value, dest) { dest = value; }

ls_opc1: "add" is b_3031=0b00 & b_1215=0b0000 & aa_Ws & ls_data1 & ls_mem1 { build ls_data1; ls_opc_add(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem1; }
ls_opc2: "add" is b_3031=0b01 & b_1215=0b0000 & aa_Ws & ls_data2 & ls_mem2 { build ls_data2; ls_opc_add(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem2; }
ls_opc4: "add" is b_3031=0b10 & b_1215=0b0000 & aa_Ws & ls_data4 & ls_mem4 { build ls_data4; ls_opc_add(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem4; }
ls_opc8: "add" is b_3031=0b11 & b_1215=0b0000 & aa_Xs & ls_data8 & ls_mem8 { build ls_data8; ls_opc_add(tmp_ldXn, aa_Xs, tmp_stXn); build ls_mem8; }

ls_opc1: "clr" is b_3031=0b00 & b_1215=0b0001 & aa_Ws & ls_data1 & ls_mem1 { build ls_data1; ls_opc_clr(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem1; }
ls_opc2: "clr" is b_3031=0b01 & b_1215=0b0001 & aa_Ws & ls_data2 & ls_mem2 { build ls_data2; ls_opc_clr(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem2; }
ls_opc4: "clr" is b_3031=0b10 & b_1215=0b0001 & aa_Ws & ls_data4 & ls_mem4 { build ls_data4; ls_opc_clr(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem4; }
ls_opc8: "clr" is b_3031=0b11 & b_1215=0b0001 & aa_Xs & ls_data8 & ls_mem8 { build ls_data8; ls_opc_clr(tmp_ldXn, aa_Xs, tmp_stXn); build ls_mem8; }

ls_opc1: "eor" is b_3031=0b00 & b_1215=0b0010 & aa_Ws & ls_data1 & ls_mem1 { build ls_data1; ls_opc_eor(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem1; }
ls_opc2: "eor" is b_3031=0b01 & b_1215=0b0010 & aa_Ws & ls_data2 & ls_mem2 { build ls_data2; ls_opc_eor(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem2; }
ls_opc4: "eor" is b_3031=0b10 & b_1215=0b0010 & aa_Ws & ls_data4 & ls_mem4 { build ls_data4; ls_opc_eor(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem4; }
ls_opc8: "eor" is b_3031=0b11 & b_1215=0b0010 & aa_Xs & ls_data8 & ls_mem8 { build ls_data8; ls_opc_eor(tmp_ldXn, aa_Xs, tmp_stXn); build ls_mem8; }

ls_opc1: "set" is b_3031=0b00 & b_1215=0b0011 & aa_Ws & ls_data1 & ls_mem1 { build ls_data1; ls_opc_set(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem1; }
ls_opc2: "set" is b_3031=0b01 & b_1215=0b0011 & aa_Ws & ls_data2 & ls_mem2 { build ls_data2; ls_opc_set(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem2; }
ls_opc4: "set" is b_3031=0b10 & b_1215=0b0011 & aa_Ws & ls_data4 & ls_mem4 { build ls_data4; ls_opc_set(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem4; }
ls_opc8: "set" is b_3031=0b11 & b_1215=0b0011 & aa_Xs & ls_data8 & ls_mem8 { build ls_data8; ls_opc_set(tmp_ldXn, aa_Xs, tmp_stXn); build ls_mem8; }

ls_opc1: "smax" is b_3031=0b00 & b_1215=0b0100 & aa_Ws & ls_data1 & ls_mem1 { build ls_data1; ls_opc_smax(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem1; }
ls_opc2: "smax" is b_3031=0b01 & b_1215=0b0100 & aa_Ws & ls_data2 & ls_mem2 { build ls_data2; ls_opc_smax(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem2; }
ls_opc4: "smax" is b_3031=0b10 & b_1215=0b0100 & aa_Ws & ls_data4 & ls_mem4 { build ls_data4; ls_opc_smax(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem4; }
ls_opc8: "smax" is b_3031=0b11 & b_1215=0b0100 & aa_Xs & ls_data8 & ls_mem8 { build ls_data8; ls_opc_smax(tmp_ldXn, aa_Xs, tmp_stXn); build ls_mem8; }

ls_opc1: "smin" is b_3031=0b00 & b_1215=0b0101 & aa_Ws & ls_data1 & ls_mem1 { build ls_data1; ls_opc_smin(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem1; }
ls_opc2: "smin" is b_3031=0b01 & b_1215=0b0101 & aa_Ws & ls_data2 & ls_mem2 { build ls_data2; ls_opc_smin(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem2; }
ls_opc4: "smin" is b_3031=0b10 & b_1215=0b0101 & aa_Ws & ls_data4 & ls_mem4 { build ls_data4; ls_opc_smin(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem4; }
ls_opc8: "smin" is b_3031=0b11 & b_1215=0b0101 & aa_Xs & ls_data8 & ls_mem8 { build ls_data8; ls_opc_smin(tmp_ldXn, aa_Xs, tmp_stXn); build ls_mem8; }

ls_opc1: "umax" is b_3031=0b00 & b_1215=0b0110 & aa_Ws & ls_data1 & ls_mem1 { build ls_data1; ls_opc_umax(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem1; }
ls_opc2: "umax" is b_3031=0b01 & b_1215=0b0110 & aa_Ws & ls_data2 & ls_mem2 { build ls_data2; ls_opc_umax(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem2; }
ls_opc4: "umax" is b_3031=0b10 & b_1215=0b0110 & aa_Ws & ls_data4 & ls_mem4 { build ls_data4; ls_opc_umax(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem4; }
ls_opc8: "umax" is b_3031=0b11 & b_1215=0b0110 & aa_Xs & ls_data8 & ls_mem8 { build ls_data8; ls_opc_umax(tmp_ldXn, aa_Xs, tmp_stXn); build ls_mem8; }

ls_opc1: "umin" is b_3031=0b00 & b_1215=0b0111 & aa_Ws & ls_data1 & ls_mem1 { build ls_data1; ls_opc_umin(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem1; }
ls_opc2: "umin" is b_3031=0b01 & b_1215=0b0111 & aa_Ws & ls_data2 & ls_mem2 { build ls_data2; ls_opc_umin(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem2; }
ls_opc4: "umin" is b_3031=0b10 & b_1215=0b0111 & aa_Ws & ls_data4 & ls_mem4 { build ls_data4; ls_opc_umin(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem4; }
ls_opc8: "umin" is b_3031=0b11 & b_1215=0b0111 & aa_Xs & ls_data8 & ls_mem8 { build ls_data8; ls_opc_umin(tmp_ldXn, aa_Xs, tmp_stXn); build ls_mem8; }

# Nearly all of these instructions have the same "operation" in the
# manual, the differences being load vs store, the operation (o3:opc),
# the data size, and the load store semantics of the atomic load and
# store types (AccType). The opcode mnemonic varies, however. And to
# facilitate reading, the LD/ST/SWP variants have been separated out.

# C6.2.133 LDADDB, LDADDAB, LDADDALB, LDADDLB page C6-1489 line 88545 MATCH x38200000/mask=xff20fc00
# C6.2.152 LDCLRB, LDCLRAB, LDCLRALB, LDCLRLB page C6-1524 line 90495 MATCH x38201000/mask=xff20fc00
# C6.2.155 LDEORB, LDEORAB, LDEORALB, LDEORLB page C6-1531 line 90916 MATCH x38202000/mask=xff20fc00
# C6.2.181 LDSETB, LDSETAB, LDSETALB, LDSETLB page C6-1590 line 94403 MATCH x38203000/mask=xff20fc00
# C6.2.184 LDSMAXB, LDSMAXAB, LDSMAXALB, LDSMAXLB page C6-1597 line 94824 MATCH x38204000/mask=xff20fc00
# C6.2.187 LDSMINB, LDSMINAB, LDSMINALB, LDSMINLB page C6-1604 line 95245 MATCH x38205000/mask=xff20fc00
# C6.2.196 LDUMAXB, LDUMAXAB, LDUMAXALB, LDUMAXLB page C6-1623 line 96362 MATCH x38206000/mask=xff20fc00
# C6.2.199 LDUMINB, LDUMINAB, LDUMINALB, LDUMINLB page C6-1630 line 96783 MATCH x38207000/mask=xff20fc00
# CONSTRUCT x38200000/mask=xff208c00 MATCHED 8 DOCUMENTED OPCODES
# AUNIT --inst x38200000/mask=xff208c00 --status nomem

# size=0b00 (3031)

:ld^ls_opc1^ls_lor^"b" aa_Ws, aa_Wt, [Rn_GPR64xsp]
is b_3031=0b00 & b_2429=0b111000 & b_21=1 & b_1515=0 & b_1011=0b00 & ls_opc1 & ls_loa & ls_lor & aa_Wt & aa_Ws & Rn_GPR64xsp
{ build ls_loa; build ls_opc1; aa_Wt = tmp_ldWn; build ls_lor; }

# C6.2.134 LDADDH, LDADDAH, LDADDALH, LDADDLH page C6-1491 line 88670 MATCH x78200000/mask=xff20fc00
# C6.2.153 LDCLRH, LDCLRAH, LDCLRALH, LDCLRLH page C6-1526 line 90621 MATCH x78201000/mask=xff20fc00
# C6.2.156 LDEORH, LDEORAH, LDEORALH, LDEORLH page C6-1533 line 91042 MATCH x78202000/mask=xff20fc00
# C6.2.182 LDSETH, LDSETAH, LDSETALH, LDSETLH page C6-1592 line 94529 MATCH x78203000/mask=xff20fc00
# C6.2.185 LDSMAXH, LDSMAXAH, LDSMAXALH, LDSMAXLH page C6-1599 line 94950 MATCH x78204000/mask=xff20fc00
# C6.2.188 LDSMINH, LDSMINAH, LDSMINALH, LDSMINLH page C6-1606 line 95371 MATCH x78205000/mask=xff20fc00
# C6.2.197 LDUMAXH, LDUMAXAH, LDUMAXALH, LDUMAXLH page C6-1625 line 96488 MATCH x78206000/mask=xff20fc00
# C6.2.200 LDUMINH, LDUMINAH, LDUMINALH, LDUMINLH page C6-1632 line 96909 MATCH x78207000/mask=xff20fc00
# CONSTRUCT x78200000/mask=xff208c00 MATCHED 8 DOCUMENTED OPCODES
# AUNIT --inst x78200000/mask=xff208c00 --status nomem

# size=0b01 (3031)

:ld^ls_opc2^ls_lor^"h" aa_Ws, aa_Wt, [Rn_GPR64xsp]
is b_3031=0b01 & b_2429=0b111000 & b_21=1 & b_1515=0 & b_1011=0b00 & ls_opc2 & ls_loa & ls_lor & aa_Wt & aa_Ws & Rn_GPR64xsp
{ build ls_loa; build ls_opc2; aa_Wt = tmp_ldWn; build ls_lor; }

# C6.2.135 LDADD, LDADDA, LDADDAL, LDADDL page C6-1493 line 88796 MATCH xb8200000/mask=xbf20fc00
# C6.2.154 LDCLR, LDCLRA, LDCLRAL, LDCLRL page C6-1528 line 90747 MATCH xb8201000/mask=xbf20fc00
# C6.2.157 LDEOR, LDEORA, LDEORAL, LDEORL page C6-1535 line 91168 MATCH xb8202000/mask=xbf20fc00
# C6.2.183 LDSET, LDSETA, LDSETAL, LDSETL page C6-1594 line 94655 MATCH xb8203000/mask=xbf20fc00
# C6.2.186 LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL page C6-1601 line 95076 MATCH xb8204000/mask=xbf20fc00
# C6.2.189 LDSMIN, LDSMINA, LDSMINAL, LDSMINL page C6-1608 line 95497 MATCH xb8205000/mask=xbf20fc00
# C6.2.198 LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL page C6-1627 line 96614 MATCH xb8206000/mask=xbf20fc00
# C6.2.201 LDUMIN, LDUMINA, LDUMINAL, LDUMINL page C6-1634 line 97035 MATCH xb8207000/mask=xbf20fc00
# C6.2.297 STADD, STADDL page C6-1822 line 107555 MATCH xb820001f/mask=xbfa0fc1f
# C6.2.300 STCLR, STCLRL page C6-1828 line 107842 MATCH xb820101f/mask=xbfa0fc1f
# C6.2.303 STEOR, STEORL page C6-1834 line 108128 MATCH xb820201f/mask=xbfa0fc1f
# C6.2.330 STSET, STSETL page C6-1890 line 111216 MATCH xb820301f/mask=xbfa0fc1f
# C6.2.333 STSMAX, STSMAXL page C6-1896 line 111508 MATCH xb820401f/mask=xbfa0fc1f
# C6.2.336 STSMIN, STSMINL page C6-1902 line 111801 MATCH xb820501f/mask=xbfa0fc1f
# C6.2.342 STUMAX, STUMAXL page C6-1914 line 112409 MATCH xb820601f/mask=xbfa0fc1f
# C6.2.345 STUMIN, STUMINL page C6-1920 line 112703 MATCH xb820701f/mask=xbfa0fc1f
# CONSTRUCT xb8200000/mask=xff208c00 MATCHED 16 DOCUMENTED OPCODES
# AUNIT --inst xb8200000/mask=xff208c00 --status nomem

# size=0b10 (3031)

:ld^ls_opc4^ls_lor aa_Ws, aa_Wt, [Rn_GPR64xsp]
is b_3031=0b10 & b_2429=0b111000 & b_21=1 & b_1515=0 & b_1011=0b00 & ls_opc4 & ls_loa & ls_lor & aa_Wt & aa_Ws & Rn_GPR64xsp
{ build ls_loa; build ls_opc4; aa_Wt = tmp_ldWn; build ls_lor; }

# C6.2.135 LDADD, LDADDA, LDADDAL, LDADDL page C6-1493 line 88796 MATCH xb8200000/mask=xbf20fc00
# C6.2.154 LDCLR, LDCLRA, LDCLRAL, LDCLRL page C6-1528 line 90747 MATCH xb8201000/mask=xbf20fc00
# C6.2.157 LDEOR, LDEORA, LDEORAL, LDEORL page C6-1535 line 91168 MATCH xb8202000/mask=xbf20fc00
# C6.2.183 LDSET, LDSETA, LDSETAL, LDSETL page C6-1594 line 94655 MATCH xb8203000/mask=xbf20fc00
# C6.2.186 LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL page C6-1601 line 95076 MATCH xb8204000/mask=xbf20fc00
# C6.2.189 LDSMIN, LDSMINA, LDSMINAL, LDSMINL page C6-1608 line 95497 MATCH xb8205000/mask=xbf20fc00
# C6.2.198 LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL page C6-1627 line 96614 MATCH xb8206000/mask=xbf20fc00
# C6.2.201 LDUMIN, LDUMINA, LDUMINAL, LDUMINL page C6-1634 line 97035 MATCH xb8207000/mask=xbf20fc00
# C6.2.297 STADD, STADDL page C6-1822 line 107555 MATCH xb820001f/mask=xbfa0fc1f
# C6.2.300 STCLR, STCLRL page C6-1828 line 107842 MATCH xb820101f/mask=xbfa0fc1f
# C6.2.303 STEOR, STEORL page C6-1834 line 108128 MATCH xb820201f/mask=xbfa0fc1f
# C6.2.330 STSET, STSETL page C6-1890 line 111216 MATCH xb820301f/mask=xbfa0fc1f
# C6.2.333 STSMAX, STSMAXL page C6-1896 line 111508 MATCH xb820401f/mask=xbfa0fc1f
# C6.2.336 STSMIN, STSMINL page C6-1902 line 111801 MATCH xb820501f/mask=xbfa0fc1f
# C6.2.342 STUMAX, STUMAXL page C6-1914 line 112409 MATCH xb820601f/mask=xbfa0fc1f
# C6.2.345 STUMIN, STUMINL page C6-1920 line 112703 MATCH xb820701f/mask=xbfa0fc1f
# CONSTRUCT xf8200000/mask=xff208c00 MATCHED 16 DOCUMENTED OPCODES
# AUNIT --inst xf8200000/mask=xff208c00 --status nomem

# size=0b11 (3031)

:ld^ls_opc8^ls_lor aa_Xs, aa_Xt, [Rn_GPR64xsp]
is b_3031=0b11 & b_2429=0b111000 & b_21=1 & b_1515=0 & b_1011=0b00 & ls_opc8 & ls_loa & ls_lor & aa_Xt & aa_Xs & Rn_GPR64xsp
{ build ls_loa; build ls_opc8; aa_Xt = tmp_ldXn; build ls_lor; }

# C6.2.136 LDAPR page C6-1496 line 88965 MATCH xb8a0c000/mask=xbfe0fc00
# CONSTRUCT xb8a0c000/mask=xffe0fc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xb8a0c000/mask=xffe0fc00 --status nomem
# TODO unsure of load/release semantics for this instruction
# To enforce SHOULD BE ONE fields add: b_1620=0b11111
# size == 10 32-bit variant

:ldapr aa_Wt, [Rn_GPR64xsp]
is b_3031=0b10 & b_2129=0b111000101 & b_1015=0b110000 & Rn_GPR64xsp & aa_Wt & ls_data4
{
	aa_Wt = tmp_ldWn;
}

# C6.2.136 LDAPR page C6-1496 line 88965 MATCH xb8a0c000/mask=xbfe0fc00
# CONSTRUCT xf8a0c000/mask=xffe0fc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xf8a0c000/mask=xffe0fc00 --status nomem
# TODO unsure of load/release semantics for this instruction
# To enforce SHOULD BE ONE fields add: b_1620=0b11111
# size == 11 64-bit variant

:ldapr aa_Xt, [Rn_GPR64xsp]
is b_3031=0b11 & b_2129=0b111000101 & b_1015=0b110000 & Rn_GPR64xsp & aa_Xt
{
	aa_Xt = tmp_ldXn;
}

# C6.2.137 LDAPRB page C6-1498 line 89064 MATCH x38a0c000/mask=xffe0fc00
# CONSTRUCT x38a0c000/mask=xffe0fc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x38a0c000/mask=xffe0fc00 --status nomem
# To enforce SHOULD BE ONE fields add: b_1620=0b11111
# TODO unsure of load/release semantics for this instruction

:ldaprb aa_Wt, [Rn_GPR64xsp]
is b_3031=0b00 & b_2129=0b111000101 & b_1015=0b110000 & Rn_GPR64xsp & aa_Wt & ls_data1
{
	aa_Wt = tmp_ldWn;
}

# C6.2.138 LDAPRH page C6-1500 line 89148 MATCH x78a0c000/mask=xffe0fc00
# CONSTRUCT x78a0c000/mask=xffe0fc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x78a0c000/mask=xffe0fc00 --status nomem
# To enforce SHOULD BE ONE fields add: b_1620=0b11111

:ldaprh aa_Wt, [Rn_GPR64xsp]
is b_3031=0b01 & b_2129=0b111000101 & b_1015=0b110000 & Rn_GPR64xsp & aa_Wt & ls_data2
{
	aa_Wt = tmp_ldWn;
}


# C6.2.139 LDAPUR page C6-1502 line 89232 MATCH x99400000/mask=xbfe00c00
# CONSTRUCT x99400000/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# The following commands are not yet implemented.


# x99400000/mask=xbfe00c00 NOT MATCHED BY ANY CONSTRUCTOR

:ldapur aa_Wt, addr_SIMM9
is b_3031=0b10 & b_2129=0b011001010 & b_1011=0b00 & addr_SIMM9 & aa_Wt & aa_Xt
{
	aa_Xt = zext(*:4 addr_SIMM9);
}

# C6.2.139 LDAPUR page C6-1502 line 89232 MATCH x99400000/mask=xbfe00c00
# CONSTRUCT xd9400000/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES

:ldapur aa_Xt, addr_SIMM9
is b_3031=0b11 & b_2129=0b011001010 & b_1011=0b00 & addr_SIMM9 & aa_Xt
{
	aa_Xt = *addr_SIMM9;
}

# C6.2.140 LDAPURB page C6-1504 line 89343 MATCH x19400000/mask=xffe00c00
# CONSTRUCT x19400000/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# x19400000/mask=xffe00c00 NOT MATCHED BY ANY CONSTRUCTOR

:ldapurb aa_Wt, addr_SIMM9
is b_3031=0b00 & b_2129=0b011001010 & b_1011=0b00 & addr_SIMM9 & aa_Wt & aa_Xt
{
	aa_Xt = zext(*:1 addr_SIMM9);
}

# C6.2.141 LDAPURH page C6-1506 line 89439 MATCH x59400000/mask=xffe00c00
# CONSTRUCT x59400000/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# x59400000/mask=xffe00c00 NOT MATCHED BY ANY CONSTRUCTOR

:ldapurh aa_Wt, addr_SIMM9
is b_3031=0b01 & b_2129=0b011001010 & b_1011=0b00 & addr_SIMM9 & aa_Wt & aa_Xt
{
	aa_Xt = zext(*:2 addr_SIMM9);
}


# C6.2.142 LDAPURSB page C6-1508 line 89535 MATCH x19800000/mask=xffa00c00
# CONSTRUCT x19c00000/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# x19800000/mask=xffa00c00 NOT MATCHED BY ANY CONSTRUCTOR

:ldapursb aa_Wt, addr_SIMM9
is b_3031=0b00 & b_2329=0b0110011 & b_22=1 & b_2121=0b0 & b_1011=0b00 & addr_SIMM9 & aa_Wt & aa_Xt
{
	aa_Xt = 0;
	aa_Wt = sext(*:1 addr_SIMM9);
}

# C6.2.142 LDAPURSB page C6-1508 line 89535 MATCH x19800000/mask=xffa00c00
# CONSTRUCT x19800000/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES

:ldapursb aa_Xt, addr_SIMM9
is b_3031=0b00 & b_2329=0b0110011 & b_22=0 & b_2121=0b0 & b_1011=0b00 & addr_SIMM9 & aa_Xt
{
	aa_Xt = sext(*:1 addr_SIMM9);
}

# C6.2.143 LDAPURSH page C6-1510 line 89667 MATCH x59800000/mask=xffa00c00
# CONSTRUCT x59c00000/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# x59800000/mask=xffa00c00 NOT MATCHED BY ANY CONSTRUCTOR

:ldapursh aa_Wt, addr_SIMM9
is b_3031=0b01 & b_2329=0b0110011 & b_22=1 & b_2121=0b0 & b_1011=0b00 & addr_SIMM9 & aa_Wt & aa_Xt
{
	aa_Xt = 0;
	aa_Wt = sext(*:2 addr_SIMM9);
}

# C6.2.143 LDAPURSH page C6-1510 line 89667 MATCH x59800000/mask=xffa00c00
# CONSTRUCT x59800000/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES

:ldapursh aa_Xt, addr_SIMM9
is b_3031=0b01 & b_2329=0b0110011 & b_22=0 & b_2121=0b0 & b_1011=0b00 & addr_SIMM9 & aa_Xt
{
	aa_Xt = sext(*:2 addr_SIMM9);
}

# C6.2.144 LDAPURSW page C6-1512 line 89799 MATCH x99800000/mask=xffe00c00
# CONSTRUCT x99800000/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# x99800000/mask=xffe00c00 NOT MATCHED BY ANY CONSTRUCTOR

:ldapursw aa_Xt, addr_SIMM9
is b_3031=0b10 & b_2129=0b011001100 & b_1011=0b00 & addr_SIMM9 & aa_Xt
{
	aa_Xt = sext(*:4 addr_SIMM9);
}

# C6.2.145 LDAR page C6-1514 line 89895 MATCH x88c08000/mask=xbfe08000
# CONSTRUCT xc8c08000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xc8c08000/mask=xffe08000 --status nomem
# The manual states that Rs and Rt2 should be all ones, which is
# optionally enforced.
# To enforce SHOULD BE ONE fields add: b_1620=0b11111 & b_1014=0b11111

:ldar Rt_GPR64, addrReg
is size.ldstr=3 & b_2429=0x8 & b_23=1 & L=1 & b_21=0 & b_15=1 & addrReg & Rt_GPR64
{
	Rt_GPR64 = *addrReg;
}

# C6.2.145 LDAR page C6-1514 line 89895 MATCH x88c08000/mask=xbfe08000
# CONSTRUCT x88dffc00/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x88dffc00/mask=xfffffc00 --status nomem
# Enforce SHOULD BE ONE fields b_1620 & b_1014

:ldar Rt_GPR32, addrReg
is size.ldstr=2 & b_2429=0x8 & b_23=1 & L=1 & b_21=0 & b_1620=0b11111 & b_15=1 & b_1014=0b11111 & addrReg & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = *addrReg;
}

# C6.2.146 LDARB page C6-1516 line 89986 MATCH x08c08000/mask=xffe08000
# CONSTRUCT x08c08000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x08c08000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1620=0b11111 & b_1014=0b11111

:ldarb Rt_GPR32, addrReg
is size.ldstr=0 & b_2429=0x8 & b_23=1 & L=1 & b_21=0 & b_15=1 & addrReg & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = zext(*:1 addrReg);
}

# C6.2.147 LDARH page C6-1517 line 90054 MATCH x48c08000/mask=xffe08000
# CONSTRUCT x48dffc00/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x48dffc00/mask=xfffffc00 --status nomem
# Enforce SHOULD BE ONE fields b_1620 & b_1014

:ldarh Rt_GPR32, addrReg
is size.ldstr=1 & b_2429=0x8 & b_23=1 & L=1 & b_21=0 & b_1620=0b11111 & b_15=1 & b_1014=0b11111 & addrReg & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = zext(*:2 addrReg);
}

# C6.2.148 LDAXP page C6-1518 line 90122 MATCH x88608000/mask=xbfe08000
# CONSTRUCT xc8608000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xc8608000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1620=0b11111

:ldaxp Rt_GPR64, Rt2_GPR64, addrReg
is size.ldstr=3 & b_2429=0x8 & b_23=0 & L=1 & b_21=1 & b_15=1 & Rt2_GPR64 & addrReg & Rt_GPR64
{
	Rt_GPR64 = *(addrReg);
	Rt2_GPR64 = *(addrReg+8);
}

# C6.2.148 LDAXP page C6-1518 line 90122 MATCH x88608000/mask=xbfe08000
# CONSTRUCT x88608000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x88608000/mask=xffe08000 --status nomem

:ldaxp Rt_GPR32, Rt2_GPR32, addrReg
is size.ldstr=2 & b_2429=0x8 & b_23=0 & L=1 & b_21=1 & b_1620 & b_15=1 & Rt2_GPR32 & addrReg & Rt_GPR32 & Rt_GPR64 & Rt2_GPR64
{
	Rt_GPR64 = zext(*:4(addrReg));
	Rt2_GPR64 = zext(*:4(addrReg+4));
}

# C6.2.149 LDAXR page C6-1520 line 90256 MATCH x88408000/mask=xbfe08000
# CONSTRUCT xc8408000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xc8408000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1620=0b11111 & b_1014=0b11111

:ldaxr Rt_GPR64, addrReg
is size.ldstr=3 & b_2429=0x8 & b_23=0 & L=1 & b_21=0 & b_15=1 & addrReg & Rt_GPR64
{
	Rt_GPR64 = *addrReg;
}

# C6.2.149 LDAXR page C6-1520 line 90256 MATCH x88408000/mask=xbfe08000
# CONSTRUCT x88408000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x88408000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1620=0b11111 & b_1014=0b11111

:ldaxr Rt_GPR32, addrReg
is size.ldstr=2 & b_2429=0x8 & b_23=0 & L=1 & b_21=0 & b_15=1 & addrReg & Rt_GPR32 & Rt_GPR64
{
	tmp:4 = *addrReg;
	Rt_GPR64 = zext(tmp);
}

# C6.2.150 LDAXRB page C6-1522 line 90351 MATCH x08408000/mask=xffe08000
# CONSTRUCT x08408000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x08408000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1620=0b11111 & b_1014=0b11111

:ldaxrb Rt_GPR32, addrReg
is size.ldstr=0 & b_2429=0x8 & b_23=0 & L=1 & b_21=0 & b_15=1 & addrReg & Rt_GPR32 & Rt_GPR64
{
	tmp:1 = *addrReg;
	Rt_GPR64 = zext(tmp);
}

# C6.2.151 LDAXRH page C6-1523 line 90423 MATCH x48408000/mask=xffe08000
# CONSTRUCT x48408000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x48408000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1620=0b11111 & b_1014=0b11111

:ldaxrh Rt_GPR32, addrReg
is size.ldstr=1 & b_2429=0x8 & b_23=0 & L=1 & b_21=0 & b_15=1 & addrReg & Rt_GPR32 & Rt_GPR64
{
	tmp:2 = *addrReg;
	Rt_GPR64 = zext(tmp);
}

# C6.2.160 LDLARB page C6-1540 line 91472 MATCH x08c00000/mask=xffe08000
# CONSTRUCT x08c00000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x08c00000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1620=0b11111 & b_1014=0b11111
# size=0b00 (3031)

:ldlarb aa_Wt, [Rn_GPR64xsp]
is b_3031=0b00 & b_2329=0b0010001 & b_22=1 & b_21=0 & b_15=0 & aa_Wt & Rn_GPR64xsp
{ LOAcquire(); aa_Wt = zext(*:1 Rn_GPR64xsp); }

# C6.2.161 LDLARH page C6-1541 line 91541 MATCH x48c00000/mask=xffe08000
# CONSTRUCT x48c00000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x48c00000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1620=0b11111 & b_1014=0b11111
# size=0b01 (3031)

:ldlarh aa_Wt, [Rn_GPR64xsp]
is b_3031=0b01 & b_2329=0b0010001 & b_22=1 & b_21=0 & b_15=0 & aa_Wt & Rn_GPR64xsp
{ LOAcquire(); aa_Wt = zext(*:2 Rn_GPR64xsp); }

# C6.2.162 LDLAR page C6-1542 line 91610 MATCH x88c00000/mask=xbfe08000
# CONSTRUCT x88c00000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x88c00000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1620=0b11111 & b_1014=0b11111
# size=0b10 (3031)

:ldlar aa_Wt, [Rn_GPR64xsp]
is b_3031=0b10 & b_2329=0b0010001 & b_22=1 & b_21=0 & b_15=0 & aa_Wt & Rn_GPR64xsp
{ LOAcquire(); aa_Wt = *:4 Rn_GPR64xsp; }

# C6.2.162 LDLAR page C6-1542 line 91610 MATCH x88c00000/mask=xbfe08000
# CONSTRUCT xc8c00000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xc8c00000/mask=xffe08000 --status nomem
# size=0b11 (3031)

:ldlar aa_Xt, [Rn_GPR64xsp]
is b_3031=0b11 & b_2329=0b0010001 & b_22=1 & b_21=0 & b_15=0 & aa_Xt & Rn_GPR64xsp
{ LOAcquire(); aa_Xt = *:8 Rn_GPR64xsp; }

# C6.2.163 LDNP page C6-1544 line 91702 MATCH x28400000/mask=x7fc00000
# CONSTRUCT x28400000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x28400000/mask=xffc00000 --status nomem

:ldnp Rt_GPR32, Rt2_GPR32, addrPairIndexed
is b_3031=0b00 & b_2229=0b10100001 & Rt2_GPR32 & addrPairIndexed & Rt_GPR32 & Rt_GPR64 & Rt2_GPR64
{
	Rt_GPR64 = zext(*:4 addrPairIndexed);
	Rt2_GPR64 = zext(*:4 (addrPairIndexed + 4));
}

# C6.2.163 LDNP page C6-1544 line 91702 MATCH x28400000/mask=x7fc00000
# CONSTRUCT xa8400000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xa8400000/mask=xffc00000 --status nomem

:ldnp Rt_GPR64, Rt2_GPR64, addrPairIndexed
is b_3031=0b10 & b_2229=0b10100001 & Rt2_GPR64 & addrPairIndexed & Rt_GPR64
{
	Rt_GPR64 = *addrPairIndexed;
	Rt2_GPR64 = *(addrPairIndexed + 8);
}

# C6.2.164 LDP page C6-1546 line 91841 MATCH x28c00000/mask=x7fc00000
# C6.2.164 LDP page C6-1546 line 91841 MATCH x29c00000/mask=x7fc00000
# C6.2.164 LDP page C6-1546 line 91841 MATCH x29400000/mask=x7fc00000
# C6.2.163 LDNP page C6-1544 line 91702 MATCH x28400000/mask=x7fc00000
# CONSTRUCT x28400000/mask=xfe400000 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst x28400000/mask=xfe400000 --status nomem
# opc == 00 post-index, pre-index, and signed 32-bit variant

:ldp Rt_GPR32, Rt2_GPR32, addrPairIndexed
is b_3031=0b00 & b_2529=0b10100 & (b_24=1 | b_23=1) & b_22=1 & Rt2_GPR32 & addrPairIndexed & Rt_GPR32 & Rt_GPR64 & Rt2_GPR64
{
	Rt_GPR64 = zext(*:4 addrPairIndexed);
	Rt2_GPR64 = zext(*:4 (addrPairIndexed + 4));
}

# C6.2.164 LDP page C6-1546 line 91841 MATCH x28c00000/mask=x7fc00000
# C6.2.164 LDP page C6-1546 line 91841 MATCH x29c00000/mask=x7fc00000
# C6.2.164 LDP page C6-1546 line 91841 MATCH x29400000/mask=x7fc00000
# C6.2.163 LDNP page C6-1544 line 91702 MATCH x28400000/mask=x7fc00000
# CONSTRUCT xa8400000/mask=xfe400000 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst xa8400000/mask=xfe400000 --status nomem
# opc == 10 post-index, pre-index, and signed 64-bit variant

:ldp Rt_GPR64, Rt2_GPR64, addrPairIndexed
is b_3031=0b10 & b_2529=0b10100 & (b_24=1 | b_23=1) & b_22=1 & Rt2_GPR64 & addrPairIndexed & Rt_GPR64
{
	Rt_GPR64 = *addrPairIndexed;
	Rt2_GPR64 = *(addrPairIndexed + 8);
}

# C6.2.165 LDPSW page C6-1550 line 92077 MATCH x68c00000/mask=xffc00000
# C6.2.165 LDPSW page C6-1550 line 92077 MATCH x69c00000/mask=xffc00000
# C6.2.165 LDPSW page C6-1550 line 92077 MATCH x69400000/mask=xffc00000
# CONSTRUCT x68400000/mask=xfe400000 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst x68400000/mask=xfe400000 --status nomem

:ldpsw Rt_GPR64, Rt2_GPR64, addrPairIndexed
is b_2531=0b0110100 & (b_24=1 | b_23=1) & b_22=1 & Rt2_GPR64 & addrPairIndexed & Rt_GPR64
{
	Rt_GPR64 = *(addrPairIndexed);
	Rt2_GPR64 = *(addrPairIndexed+8);
}

# C6.2.166 LDR (immediate) page C6-1553 line 92262 MATCH xb9400000/mask=xbfc00000
# CONSTRUCT xb9400000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xb9400000/mask=xffc00000 --status nomem

:ldr Rt_GPR32, addrUIMM
is size.ldstr=2 & b_2729=7 & v=0 & b_2425=1 & b_23=0 & b_2222=1 & addrUIMM & Rn_GPR64xsp & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = zext(*:4 addrUIMM);
}

# C6.2.166 LDR (immediate) page C6-1553 line 92262 MATCH xb8400400/mask=xbfe00c00
# C6.2.166 LDR (immediate) page C6-1553 line 92262 MATCH xb8400c00/mask=xbfe00c00
# C6.2.190 LDTR page C6-1611 line 95666 MATCH xb8400800/mask=xbfe00c00
# C6.2.202 LDUR page C6-1637 line 97204 MATCH xb8400000/mask=xbfe00c00
# CONSTRUCT xb8400000/mask=xffe00000 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst xb8400000/mask=xffe00000 --status nomem

:ld^UnscPriv^"r" Rt_GPR32, addrIndexed
is size.ldstr=2 & b_2729=7 & v=0 & b_2425=0 & b_23=0 & b_2222=1 & b_2121=0 & UnscPriv & addrIndexed & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = zext(*:4 addrIndexed);
}

# C6.2.166 LDR (immediate) page C6-1553 line 92262 MATCH xb8400400/mask=xbfe00c00
# C6.2.166 LDR (immediate) page C6-1553 line 92262 MATCH xb8400c00/mask=xbfe00c00
# CONSTRUCT xb8400400/mask=xffe00400 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xb8400400/mask=xffe00400 --status nomem

:ldr Rt_GPR32, addrIndexed
is size.ldstr=2 & b_2729=7 & v=0 & b_2425=0 & b_23=0 & b_2222=1 & b_2121=0 & b_1010=1 & addrIndexed & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = zext(*:4 addrIndexed);
}

# C6.2.166 LDR (immediate) page C6-1553 line 92262 MATCH xb9400000/mask=xbfc00000
# CONSTRUCT xf9400000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xf9400000/mask=xffc00000 --status nomem

:ldr Rt_GPR64, addrUIMM
is size.ldstr=3 & b_2729=7 & v=0 & b_2425=1 & b_23=0 & b_2222=1 & addrUIMM & Rn_GPR64xsp & Rt_GPR64
{
	Rt_GPR64 = *addrUIMM;
}

# C6.2.166 LDR (immediate) page C6-1553 line 92262 MATCH xb8400400/mask=xbfe00c00
# C6.2.166 LDR (immediate) page C6-1553 line 92262 MATCH xb8400c00/mask=xbfe00c00
# CONSTRUCT xf8400400/mask=xffe00400 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xf8400400/mask=xffe00400 --status nomem

:ldr Rt_GPR64, addrIndexed
is size.ldstr=3 & b_2729=7 & v=0 & b_2425=0 & b_23=0 & b_2222=1 & b_2121=0 & b_1010=1 & addrIndexed & Rt_GPR64
{
	Rt_GPR64 = *addrIndexed;
}

# C6.2.167 LDR (literal) page C6-1556 line 92457 MATCH x18000000/mask=xbf000000
# CONSTRUCT x18000000/mask=xff000000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x18000000/mask=xff000000 --status nomem

:ldr Rt_GPR32, AddrLoc19
is size.ldstr=0 & b_2729=3 & v=0 & b_2425=0 & AddrLoc19 & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = zext(*:4 AddrLoc19);
}

# C6.2.167 LDR (literal) page C6-1556 line 92457 MATCH x18000000/mask=xbf000000
# CONSTRUCT x58000000/mask=xff000000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x58000000/mask=xff000000 --status nomem

:ldr Rt_GPR64, AddrLoc19
is size.ldstr=1 & b_2729=3 & v=0 & b_2425=0 & AddrLoc19 & Rt_GPR64
{
	Rt_GPR64 = *:4 AddrLoc19;
}

# C6.2.168 LDR (register) page C6-1558 line 92557 MATCH xb8600800/mask=xbfe00c00
# CONSTRUCT xb8600800/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xb8600800/mask=xffe00c00 --status nomem

:ldr Rt_GPR32, addrIndexed
is size.ldstr=2 & b_2729=7 & v=0 & b_2425=0 & b_23=0 & b_2222=1 & b_2121=1 & b_1011=2 & addrIndexed & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = zext(*:4 addrIndexed);
}

# C6.2.168 LDR (register) page C6-1558 line 92557 MATCH xb8600800/mask=xbfe00c00
# CONSTRUCT xf8600800/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xf8600800/mask=xffe00c00 --status nomem

:ldr Rt_GPR64, addrIndexed
is size.ldstr=3 & b_2729=7 & v=0 & b_2425=0 & b_23=0 & b_2222=1 & b_2121=1 & b_1011=2 & addrIndexed & Rt_GPR64
{
	Rt_GPR64 = *addrIndexed;
}


# C6.2.169 LDRAA, LDRAB page C6-1560 line 92679 MATCH xf8200400/mask=xff200400
# CONSTRUCT xf8200400/mask=xffa00400 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xf8200400/mask=xffa00400 --status nomem
# M == 0 && W == 0 key A, offset variant
# M == 0 && W == 1 key A, offset variant

:ldraa Rt_GPR64, addrIndexed
is ldraa__PACpart & b_2431=0b11111000 & b_23=0 & b_21=1 & b_10=1 & addrIndexed & Rn_GPR64xsp & Rt_GPR64
{
	build ldraa__PACpart;
	build addrIndexed;
	# Note: if writeback is used, the writeback'd value doesn't have a PAC code!  It's the output of AuthDA.
	Rt_GPR64 = *:8 addrIndexed;
}

# C6.2.169 LDRAA, LDRAB page C6-1560 line 92679 MATCH xf8200400/mask=xff200400
# CONSTRUCT xf8a00400/mask=xffa00400 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xf8a00400/mask=xffa00400 --status nomem
# M == 1 && W == 0 key B, offset variant
# M == 1 && W == 1 key B, offset variant

:ldrab Rt_GPR64, addrIndexed
is ldrab__PACpart & b_2431=0b11111000 & b_23=1 & b_21=1 & b_10=1 & addrIndexed & Rn_GPR64xsp & Rt_GPR64
{
	build ldrab__PACpart;
	build addrIndexed;
	# Note: if writeback is used, the writeback'd value doesn't have a PAC code!  It's the output of AuthDB.
	Rt_GPR64 = *:8 addrIndexed;
}

# C6.2.170 LDRB (immediate) page C6-1562 line 92814 MATCH x38400400/mask=xffe00c00
# C6.2.170 LDRB (immediate) page C6-1562 line 92814 MATCH x38400c00/mask=xffe00c00
# CONSTRUCT x38400400/mask=xffe00400 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x38400400/mask=xffe00400 --status nomem
# post-index and pre-index variants

:ldrb Rt_GPR32, addrIndexed
is b_2131=0b00111000010 & b_10=1 & addrIndexed & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = zext(*:1 addrIndexed);
}

# C6.2.170 LDRB (immediate) page C6-1562 line 92814 MATCH x39400000/mask=xffc00000
# CONSTRUCT x39400000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x39400000/mask=xffc00000 --status nomem
# unsigned offset variant

:ldrb Rt_GPR32, addrIndexed
is b_2231=0b0011100101 & addrIndexed & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = zext(*:1 addrIndexed);
}

# C6.2.171 LDRB (register) page C6-1565 line 92976 MATCH x38600800/mask=xffe00c00
# CONSTRUCT x38600800/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x38600800/mask=xffe00c00 --status nomem
# extended register and shifted register variant
# determined in addrIndexed subtable

:ldrb Rt_GPR32, addrIndexed
is b_2131=0b00111000011 & b_1011=2 & addrIndexed & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = zext(*:1 addrIndexed);
}

# C6.2.172 LDRH (immediate) page C6-1567 line 93076 MATCH x79400000/mask=xffc00000
# CONSTRUCT x79400000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x79400000/mask=xffc00000 --status nomem

:ldrh Rt_GPR32, addrUIMM
is size.ldstr=1 & b_2729=7 & v=0 & b_2425=1 & b_23=0 & b_2222=1 & addrUIMM & Rn_GPR64xsp & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = zext(*:2 addrUIMM);
}

# C6.2.172 LDRH (immediate) page C6-1567 line 93076 MATCH x78400400/mask=xffe00c00
# C6.2.172 LDRH (immediate) page C6-1567 line 93076 MATCH x78400c00/mask=xffe00c00
# CONSTRUCT x78400400/mask=xffe00400 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x78400400/mask=xffe00400 --status nomem

:ldrh Rt_GPR32, addrIndexed
is size.ldstr=1 & b_2729=7 & v=0 & b_2425=0 & b_23=0 & b_2222=1 & b_2121=0 & b_1010=1 & addrIndexed & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = zext(*:2 addrIndexed);
}

# C6.2.173 LDRH (register) page C6-1570 line 93238 MATCH x78600800/mask=xffe00c00
# CONSTRUCT x78600800/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x78600800/mask=xffe00c00 --status nomem

:ldrh Rt_GPR32, addrIndexed
is size.ldstr=1 & b_2729=7 & v=0 & b_2425=0 & b_23=0 & b_2222=1 & b_2121=1 & b_1011=2 & addrIndexed & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = zext(*:2 addrIndexed);
}

# C6.2.174 LDRSB (immediate) page C6-1572 line 93336 MATCH x39800000/mask=xff800000
# CONSTRUCT x39c00000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x39c00000/mask=xffc00000 --status nomem

:ldrsb Rt_GPR32, addrIndexed
is size.ldstr=0 & b_2729=7 & v=0 & b_2425=1 & b_2223=3 & addrIndexed & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = sext(*:1 addrIndexed);
}

# C6.2.174 LDRSB (immediate) page C6-1572 line 93336 MATCH x38800400/mask=xffa00c00
# C6.2.174 LDRSB (immediate) page C6-1572 line 93336 MATCH x38800c00/mask=xffa00c00
# C6.2.193 LDTRSB page C6-1617 line 95984 MATCH x38800800/mask=xffa00c00
# C6.2.205 LDURSB page C6-1641 line 97443 MATCH x38800000/mask=xffa00c00
# CONSTRUCT x38c00000/mask=xffe00000 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst x38c00000/mask=xffe00000 --status nomem

:ld^UnscPriv^"rsb" Rt_GPR32, addrIndexed
is size.ldstr=0 & b_2729=7 & v=0 & b_2425=0 & b_2223=3 & b_2121=0 & UnscPriv & addrIndexed & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = zext(*:1 addrIndexed);
}

# C6.2.174 LDRSB (immediate) page C6-1572 line 93336 MATCH x38800400/mask=xffa00c00
# C6.2.174 LDRSB (immediate) page C6-1572 line 93336 MATCH x38800c00/mask=xffa00c00
# CONSTRUCT x38c00400/mask=xffe00400 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x38c00400/mask=xffe00400 --status nomem

:ldrsb Rt_GPR32, addrIndexed
is size.ldstr=0 & b_2729=7 & v=0 & b_2425=0 & b_2223=3 & b_2121=0 & b_1010=1 & addrIndexed & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = sext(*:1 addrIndexed);
}

# C6.2.174 LDRSB (immediate) page C6-1572 line 93336 MATCH x39800000/mask=xff800000
# CONSTRUCT x39800000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x39800000/mask=xffc00000 --status nomem

:ldrsb Rt_GPR64, addrIndexed
is size.ldstr=0 & b_2729=7 & v=0 & b_2425=1 & b_2223=2 & addrIndexed & Rt_GPR64
{
	Rt_GPR64 = sext(*:1 addrIndexed);
}

# C6.2.174 LDRSB (immediate) page C6-1572 line 93336 MATCH x38800400/mask=xffa00c00
# C6.2.174 LDRSB (immediate) page C6-1572 line 93336 MATCH x38800c00/mask=xffa00c00
# C6.2.193 LDTRSB page C6-1617 line 95984 MATCH x38800800/mask=xffa00c00
# C6.2.205 LDURSB page C6-1641 line 97443 MATCH x38800000/mask=xffa00c00
# CONSTRUCT x38800000/mask=xffe00000 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst x38800000/mask=xffe00000 --status nomem

:ld^UnscPriv^"rsb" Rt_GPR64, addrIndexed
is size.ldstr=0 & b_2729=7 & v=0 & b_2425=0 & b_2223=2 & b_2121=0 & UnscPriv & addrIndexed & Rt_GPR64
{
	Rt_GPR64 = sext(*:1 addrIndexed);
}

# C6.2.174 LDRSB (immediate) page C6-1572 line 93336 MATCH x38800400/mask=xffa00c00
# C6.2.174 LDRSB (immediate) page C6-1572 line 93336 MATCH x38800c00/mask=xffa00c00
# CONSTRUCT x38800400/mask=xffe00400 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x38800400/mask=xffe00400 --status nomem

:ldrsb Rt_GPR64, addrIndexed
is size.ldstr=0 & b_2729=7 & v=0 & b_2425=0 & b_2223=2 & b_2121=0 & b_1010=1 & addrIndexed & Rt_GPR64
{
	Rt_GPR64 = sext(*:1 addrIndexed);
}

# C6.2.175 LDRSB (register) page C6-1576 line 93573 MATCH x38a00800/mask=xffa00c00
# CONSTRUCT x38e00800/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x38e00800/mask=xffe00c00 --status nomem

:ldrsb Rt_GPR32, addrIndexed
is size.ldstr=0 & b_2729=7 & v=0 & b_2425=0 & b_2223=3 & b_2121=1 & b_1011=2 & addrIndexed & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = sext(*:1 addrIndexed);
}

# C6.2.175 LDRSB (register) page C6-1576 line 93573 MATCH x38a00800/mask=xffa00c00
# CONSTRUCT x38a00800/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x38a00800/mask=xffe00c00 --status nomem

:ldrsb Rt_GPR64, addrIndexed
is size.ldstr=0 & b_2729=7 & v=0 & b_2425=0 & b_2223=2 & b_2121=1 & b_1011=2 & addrIndexed & Rt_GPR64
{
	Rt_GPR64 = sext(*:1 addrIndexed);
}

# C6.2.176 LDRSH (immediate) page C6-1578 line 93714 MATCH x79800000/mask=xff800000
# CONSTRUCT x79c00000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x79c00000/mask=xffc00000 --status nomem

:ldrsh Rt_GPR32, addrUIMM
is size.ldstr=1 & b_2729=7 & v=0 & b_2425=1 & b_2223=3 & addrUIMM & Rn_GPR64xsp & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = sext(*:2 addrUIMM);
}

# C6.2.176 LDRSH (immediate) page C6-1578 line 93714 MATCH x78800400/mask=xffa00c00
# C6.2.176 LDRSH (immediate) page C6-1578 line 93714 MATCH x78800c00/mask=xffa00c00
# C6.2.194 LDTRSH page C6-1619 line 96122 MATCH x78800800/mask=xffa00c00
# C6.2.206 LDURSH page C6-1643 line 97560 MATCH x78800000/mask=xffa00c00
# CONSTRUCT x78c00000/mask=xffe00000 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst x78c00000/mask=xffe00000 --status nomem

:ld^UnscPriv^"rsh" Rt_GPR32, addrIndexed
is size.ldstr=1 & b_2729=7 & v=0 & b_2425=0 & b_2223=3 & b_2121=0 & UnscPriv & addrIndexed & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = sext(*:2 addrIndexed);
}

# C6.2.176 LDRSH (immediate) page C6-1578 line 93714 MATCH x78800400/mask=xffa00c00
# C6.2.176 LDRSH (immediate) page C6-1578 line 93714 MATCH x78800c00/mask=xffa00c00
# CONSTRUCT x78c00400/mask=xffe00400 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x78c00400/mask=xffe00400 --status nomem

:ldrsh Rt_GPR32, addrIndexed
is size.ldstr=1 & b_2729=7 & v=0 & b_2425=0 & b_2223=3 & b_2121=0 & b_1010=1 & addrIndexed & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = sext(*:2 addrIndexed);
}

# C6.2.176 LDRSH (immediate) page C6-1578 line 93714 MATCH x79800000/mask=xff800000
# CONSTRUCT x79800000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x79800000/mask=xffc00000 --status nomem

:ldrsh Rt_GPR64, addrUIMM
is size.ldstr=1 & b_2729=7 & v=0 & b_2425=1 & b_2223=2 & addrUIMM & Rn_GPR64xsp & Rt_GPR64
{
	Rt_GPR64 = sext(*:2 addrUIMM);
}

# C6.2.176 LDRSH (immediate) page C6-1578 line 93714 MATCH x78800400/mask=xffa00c00
# C6.2.176 LDRSH (immediate) page C6-1578 line 93714 MATCH x78800c00/mask=xffa00c00
# C6.2.194 LDTRSH page C6-1619 line 96122 MATCH x78800800/mask=xffa00c00
# C6.2.206 LDURSH page C6-1643 line 97560 MATCH x78800000/mask=xffa00c00
# CONSTRUCT x78800000/mask=xffe00000 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst x78800000/mask=xffe00000 --status nomem

:ld^UnscPriv^"rsh" Rt_GPR64, addrIndexed
is size.ldstr=1 & b_2729=7 & v=0 & b_2425=0 & b_2223=2 & b_2121=0 & UnscPriv & addrIndexed & Rt_GPR64
{
	Rt_GPR64 = sext(*:2 addrIndexed);
}

# C6.2.176 LDRSH (immediate) page C6-1578 line 93714 MATCH x78800400/mask=xffa00c00
# C6.2.176 LDRSH (immediate) page C6-1578 line 93714 MATCH x78800c00/mask=xffa00c00
# CONSTRUCT x78800400/mask=xffe00400 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x78800400/mask=xffe00400 --status nomem

:ldrsh Rt_GPR64, addrIndexed
is size.ldstr=1 & b_2729=7 & v=0 & b_2425=0 & b_2223=2 & b_2121=0 & b_1010=1 & addrIndexed & Rt_GPR64
{
	Rt_GPR64 = sext(*:2 addrIndexed);
}

# C6.2.177 LDRSH (register) page C6-1582 line 93951 MATCH x78a00800/mask=xffa00c00
# CONSTRUCT x78e00800/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x78e00800/mask=xffe00c00 --status nomem

:ldrsh Rt_GPR32, addrIndexed
is size.ldstr=1 & b_2729=7 & v=0 & b_2425=0 & b_2223=3 & b_2121=1 & b_1011=2 & addrIndexed & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = sext(*:2 addrIndexed);
}

# C6.2.177 LDRSH (register) page C6-1582 line 93951 MATCH x78a00800/mask=xffa00c00
# CONSTRUCT x78a00800/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x78a00800/mask=xffe00c00 --status nomem

:ldrsh Rt_GPR64, addrIndexed
is size.ldstr=1 & b_2729=7 & v=0 & b_2425=0 & b_2223=2 & b_2121=1 & b_1011=2 & addrIndexed & Rt_GPR64
{
	Rt_GPR64 = sext(*:2 addrIndexed);
}

# C6.2.178 LDRSW (immediate) page C6-1584 line 94088 MATCH xb8800400/mask=xffe00c00
# C6.2.178 LDRSW (immediate) page C6-1584 line 94088 MATCH xb8800c00/mask=xffe00c00
# CONSTRUCT xb8800400/mask=xffe00400 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xb8800400/mask=xffe00400 --status nomem

:ldrsw Rt_GPR64, addrIndexed
is size.ldstr=2 & b_2729=7 & v=0 & b_2425=0 & b_2223=2 & b_2121=0 & b_1010=1 & addrIndexed & Rt_GPR64
{
	Rt_GPR64 = sext(*:4 addrIndexed);
}

# C6.2.178 LDRSW (immediate) page C6-1584 line 94088 MATCH xb9800000/mask=xffc00000
# CONSTRUCT xb9800000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xb9800000/mask=xffc00000 --status nomem

:ldrsw Rt_GPR64, addrIndexed
is size.ldstr=2 & b_2729=7 & v=0 & b_2425=1 & b_2223=2 & addrIndexed & Rt_GPR64
{
	Rt_GPR64 = sext(*:4 addrIndexed);
}

# C6.2.179 LDRSW (literal) page C6-1587 line 94246 MATCH x98000000/mask=xff000000
# CONSTRUCT x98000000/mask=xff000000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x98000000/mask=xff000000 --status nomem

:ldrsw Rt_GPR64, AddrLoc19
is b_2431=0b10011000 & AddrLoc19 & Rt_GPR64
{
	Rt_GPR64 = sext(*:4 AddrLoc19);
}

# C6.2.180 LDRSW (register) page C6-1588 line 94304 MATCH xb8a00800/mask=xffe00c00
# CONSTRUCT xb8a00800/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xb8a00800/mask=xffe00c00 --status nomem

:ldrsw Rt_GPR64, addrIndexed
is size.ldstr=2 & b_2729=7 & v=0 & b_2425=0 & b_2223=2 & b_2121=1 & b_1011=2 & addrIndexed & Rt_GPR64
{
	Rt_GPR64 = sext(*:4 addrIndexed);
}

# C6.2.190 LDTR page C6-1611 line 95666 MATCH xb8400800/mask=xbfe00c00
# CONSTRUCT xf8400800/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xf8400800/mask=xffe00c00 --status nomem

:ld^UnscPriv^"r" Rt_GPR64, addrIndexed
is size.ldstr=3 & b_2729=7 & v=0 & b_2425=0 & b_2223=1 & b_2121=0 & b_1011=2 & UnscPriv & addrIndexed & Rt_GPR64
{
	Rt_GPR64 = *addrIndexed;
}

# C6.2.191 LDTRB page C6-1613 line 95782 MATCH x38400800/mask=xffe00c00
# C6.2.203 LDURB page C6-1639 line 97301 MATCH x38400000/mask=xffe00c00
# CONSTRUCT x38400000/mask=xffe00000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x38400000/mask=xffe00000 --status nomem

:ld^UnscPriv^"rb" Rt_GPR32, addrIndexed
is size.ldstr=0 & b_2729=7 & v=0 & b_2425=0 & b_23=0 & b_2222=1 & b_2121=0 & UnscPriv & addrIndexed & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = zext(*:1 addrIndexed);
}

# C6.2.192 LDTRH page C6-1615 line 95883 MATCH x78400800/mask=xffe00c00
# C6.2.204 LDURH page C6-1640 line 97372 MATCH x78400000/mask=xffe00c00
# CONSTRUCT x78400000/mask=xffe00000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x78400000/mask=xffe00000 --status nomem

:ld^UnscPriv^"rh" Rt_GPR32, addrIndexed
is size.ldstr=1 & b_2729=7 & v=0 & b_2425=0 & b_23=0 & b_2222=1 & b_2121=0 & UnscPriv & addrIndexed & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = zext(*:2 addrIndexed);
}

# C6.2.195 LDTRSW page C6-1621 line 96261 MATCH xb8800800/mask=xffe00c00
# C6.2.207 LDURSW page C6-1645 line 97677 MATCH xb8800000/mask=xffe00c00
# CONSTRUCT xb8800000/mask=xffe00000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xb8800000/mask=xffe00000 --status nomem

:ld^UnscPriv^"rsw" Rt_GPR64, addrIndexed
is size.ldstr=2 & b_2729=7 & v=0 & b_2425=0 & b_2223=2 & b_2121=0 & UnscPriv & addrIndexed & Rt_GPR64
{
	Rt_GPR64 = sext(*:4 addrIndexed);
}

# C6.2.202 LDUR page C6-1637 line 97204 MATCH xb8400000/mask=xbfe00c00
# CONSTRUCT xf8400000/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xf8400000/mask=xffe00c00 --status nomem

:ld^UnscPriv^"r" Rt_GPR64, addrIndexed
is size.ldstr=3 & b_2729=7 & v=0 & b_2425=0 & b_23=0 & b_2122=2 & b_1011=0 & UnscPriv & addrIndexed & Rt_GPR64
{
	Rt_GPR64 = *addrIndexed;
}

# C6.2.208 LDXP page C6-1646 line 97748 MATCH x88600000/mask=xbfe08000
# CONSTRUCT xc8600000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xc8600000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1620=0b11111

:ldxp Rt_GPR64, Rt2_GPR64, addrReg
is size.ldstr=3 & b_2429=0x8 & b_23=0 & L=1 & b_21=1 & b_15=0 & Rt2_GPR64 & addrReg & Rt_GPR64
{
	Rt_GPR64 = *addrReg;
	Rt2_GPR64 = *(addrReg + 8);
}

# C6.2.208 LDXP page C6-1646 line 97748 MATCH x88600000/mask=xbfe08000
# CONSTRUCT x88600000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x88600000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1620=0b11111

:ldxp Rt_GPR32, Rt2_GPR32, addrReg
is size.ldstr=2 & b_2429=0x8 & b_23=0 & L=1 & b_21=1 & b_15=0 & Rt2_GPR32 & addrReg & Rt_GPR32 & Rt_GPR64 & Rt2_GPR64
{
	Rt_GPR64 = zext(*:4 addrReg);
	Rt2_GPR64 = zext(*:4 (addrReg + 4));
}

# C6.2.209 LDXR page C6-1648 line 97882 MATCH x88400000/mask=xbfe08000
# CONSTRUCT xc8400000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xc8400000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1620=0b11111 & b_1014=0b11111

:ldxr Rt_GPR64, addrReg
is size.ldstr=3 & b_2429=0x8 & b_23=0 & L=1 & b_21=0 & b_15=0 & addrReg & Rt_GPR64
{
	Rt_GPR64 = *addrReg;
}

# C6.2.209 LDXR page C6-1648 line 97882 MATCH x88400000/mask=xbfe08000
# CONSTRUCT x88400000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x88400000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1620=0b11111 & b_1014=0b11111

:ldxr Rt_GPR32, addrReg
is size.ldstr=2 & b_2429=0x8 & b_23=0 & L=1 & b_21=0 & b_15=0 & addrReg & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = zext(*:4 addrReg);
}

# C6.2.210 LDXRB page C6-1650 line 97976 MATCH x08400000/mask=xffe08000
# CONSTRUCT x08400000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x08400000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1620=0b11111 & b_1014=0b11111

:ldxrb Rt_GPR32, addrReg
is size.ldstr=0 & b_2429=0x8 & b_23=0 & L=1 & b_21=0 & b_15=0 & addrReg & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = zext(*:1 addrReg);
}

# C6.2.211 LDXRH page C6-1651 line 98048 MATCH x48400000/mask=xffe08000
# CONSTRUCT x48400000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x48400000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1620=0b11111 & b_1014=0b11111

:ldxrh Rt_GPR32, addrReg
is size.ldstr=1 & b_2429=0x8 & b_23=0 & L=1 & b_21=0 & b_15=0 & addrReg & Rt_GPR32 & Rt_GPR64
{
	Rt_GPR64 = zext(*:2 addrReg);
}

# C6.2.212 LSL (register) page C6-1652 line 98120 MATCH x1ac02000/mask=x7fe0fc00
# C6.2.214 LSLV page C6-1656 line 98305 MATCH x1ac02000/mask=x7fe0fc00
# CONSTRUCT x1ac02000/mask=xffe0fc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x1ac02000/mask=xffe0fc00 --status pass

:lsl Rd_GPR32, Rn_GPR32, Rm_GPR32
is sf=0 & b_3030=0 & S=0 & b_2428=0x1a & b_2123=6 & Rm_GPR32 & b_1015=0x8 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	shiftval:8 = zext(Rm_GPR32 & 0x1f);
	tmp_1:4 = Rn_GPR32 << shiftval;
	Rd_GPR64 = zext(tmp_1);
}

# C6.2.212 LSL (register) page C6-1652 line 98120 MATCH x1ac02000/mask=x7fe0fc00
# C6.2.214 LSLV page C6-1656 line 98305 MATCH x1ac02000/mask=x7fe0fc00
# CONSTRUCT x9ac02000/mask=xffe0fc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x9ac02000/mask=xffe0fc00 --status pass

:lsl Rd_GPR64, Rn_GPR64, Rm_GPR64
is sf=1 & b_3030=0 & S=0 & b_2428=0x1a & b_2123=6 & Rm_GPR64 & b_1015=0x8 & Rn_GPR64 & Rd_GPR64
{
	shiftval:8 = (Rm_GPR64 & 0x3f);
	tmp_1:8 = Rn_GPR64 << shiftval;
	Rd_GPR64 = tmp_1;
}

# C6.2.158 LSL (immediate) page C6-784 line 45779 KEEPWITH

ubfiz_lsb: "#"^imm is ImmR [ imm = 32 - ImmR; ] { export *[const]:4 imm; }
ubfiz_width: "#"^imm is ImmS [ imm = ImmS + 1; ] { export *[const]:4 imm; }
ubfiz_lsb64: "#"^imm is ImmR [ imm = 64 - ImmR; ] { export *[const]:4 imm; }
ubfx_width: "#"^imm is ImmR & ImmS [ imm = ImmS - ImmR + 1; ] { export *[const]:4 imm; }

# C6.2.213 LSL (immediate) page C6-1654 line 98214 MATCH x53000000/mask=x7f800000
# C6.2.216 LSR (immediate) page C6-1660 line 98490 MATCH x53007c00/mask=x7f807c00
# C6.2.384 UBFIZ page C6-1986 line 116416 MATCH x53000000/mask=x7f800000
# C6.2.385 UBFM page C6-1988 line 116507 MATCH x53000000/mask=x7f800000
# C6.2.386 UBFX page C6-1991 line 116651 MATCH x53000000/mask=x7f800000
# C6.2.394 UXTB page C6-2002 line 117228 MATCH x53001c00/mask=xfffffc00
# C6.2.395 UXTH page C6-2003 line 117288 MATCH x53003c00/mask=xfffffc00
# CONSTRUCT x53000012/mask=xffe0801e MATCHED 7 DOCUMENTED OPCODES
# AUNIT --inst x53000012/mask=xffe0801e --status pass
# Alias for ubfm where imms+1=immr and imms != '011111'
# if sf == '0' && (N != '0' || immr<5> != '0' || imms<5> != '0') then ReservedValue();

:lsl Rd_GPR32, Rn_GPR32, LSB_bitfield32_imm_shift
is ImmR=ImmS+1 & ImmS_ne_1f=1 & ImmS_LT_ImmR_minus_1=0 & ImmS_EQ_ImmR=0 & ImmS_LT_ImmR=1 & sf=0 & opc=2 & b_2428=0x13 & b_2323=0 & n=0 & b_21=0 & b_15=0 & LSB_bitfield32_imm_shift & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	local tmp:4 = Rn_GPR32 << LSB_bitfield32_imm_shift;
	Rd_GPR64 = zext(tmp);
}

# C6.2.213 LSL (immediate) page C6-1654 line 98214 MATCH x53000000/mask=x7f800000
# C6.2.216 LSR (immediate) page C6-1660 line 98490 MATCH x53007c00/mask=x7f807c00
# C6.2.384 UBFIZ page C6-1986 line 116416 MATCH x53000000/mask=x7f800000
# C6.2.385 UBFM page C6-1988 line 116507 MATCH x53000000/mask=x7f800000
# C6.2.386 UBFX page C6-1991 line 116651 MATCH x53000000/mask=x7f800000
# CONSTRUCT xd3400022/mask=xffc0002e MATCHED 5 DOCUMENTED OPCODES
# AUNIT --inst xd3400022/mask=xffc0002e --status pass
# Alias for ubfm where imms+1=immr and imms != '111111'

:lsl Rd_GPR64, Rn_GPR64, LSB_bitfield64_imm_shift
is ImmR=ImmS+1 & ImmS_ne_3f=1 & ImmS_LT_ImmR_minus_1=0 & ImmS_EQ_ImmR=0 & ImmS_LT_ImmR=1 & sf=1 & opc=2 & b_2428=0x13 & b_2323=0 & n=1 & LSB_bitfield64_imm_shift & Rn_GPR64 & Rd_GPR64
{
	Rd_GPR64 = Rn_GPR64 << LSB_bitfield64_imm_shift;
}

# C6.2.215 LSR (register) page C6-1658 line 98396 MATCH x1ac02400/mask=x7fe0fc00
# C6.2.217 LSRV page C6-1662 line 98580 MATCH x1ac02400/mask=x7fe0fc00
# CONSTRUCT x1ac02400/mask=xffe0fc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x1ac02400/mask=xffe0fc00 --status pass

:lsr Rd_GPR32, Rn_GPR32, Rm_GPR32
is sf=0 & b_3030=0 & S=0 & b_2428=0x1a & b_2123=6 & Rm_GPR32 & b_1015=0x9 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	shiftval:8 = zext(Rm_GPR32 & 0x1f);
	tmp_1:4 = Rn_GPR32 >> shiftval;
	Rd_GPR64 = zext(tmp_1);
}

# C6.2.215 LSR (register) page C6-1658 line 98396 MATCH x1ac02400/mask=x7fe0fc00
# C6.2.217 LSRV page C6-1662 line 98580 MATCH x1ac02400/mask=x7fe0fc00
# CONSTRUCT x9ac02400/mask=xffe0fc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x9ac02400/mask=xffe0fc00 --status pass

:lsr Rd_GPR64, Rn_GPR64, Rm_GPR64
is sf=1 & b_3030=0 & S=0 & b_2428=0x1a & b_2123=6 & Rm_GPR64 & b_1015=0x9 & Rn_GPR64 & Rd_GPR64
{
	shiftval:8 = Rm_GPR64 & 0x3f;
	tmp_1:8 = Rn_GPR64 >> shiftval;
	Rd_GPR64 = tmp_1;
}

# C6.2.216 LSR (immediate) page C6-1660 line 98490 MATCH x53007c00/mask=x7f807c00
# C6.2.213 LSL (immediate) page C6-1654 line 98214 MATCH x53000000/mask=x7f800000
# C6.2.384 UBFIZ page C6-1986 line 116416 MATCH x53000000/mask=x7f800000
# C6.2.385 UBFM page C6-1988 line 116507 MATCH x53000000/mask=x7f800000
# C6.2.386 UBFX page C6-1991 line 116651 MATCH x53000000/mask=x7f800000
# CONSTRUCT x53007c00/mask=xffe0fc1a MATCHED 5 DOCUMENTED OPCODES
# AUNIT --inst x53007c00/mask=xffe0fc1a --status pass
# Alias for ubfm where imms=='011111'
# imms is MAX_INT5, so it will never be less than immr. Note that immr is limited to [0,31]
# if sf == '0' && (N != '0' || immr<5> != '0' || imms<5> != '0') then ReservedValue();

:lsr Rd_GPR32, Rn_GPR32, ImmRConst32
is ImmS=0x1f & ImmS_ne_1f=0 & ImmS_LT_ImmR=0 & ImmS_LT_ImmR_minus_1=0 & sf=0 & opc=2 & b_2428=0x13 & b_2323=0 & n=0 & b_21=0 & b_15=0 & ImmRConst32 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp_2:4 = ImmRConst32;
	tmp_1:4 = Rn_GPR32 >> tmp_2;
	Rd_GPR64 = zext(tmp_1);
}

# C6.2.216 LSR (immediate) page C6-1660 line 98490 MATCH x53007c00/mask=x7f807c00
# C6.2.213 LSL (immediate) page C6-1654 line 98214 MATCH x53000000/mask=x7f800000
# C6.2.384 UBFIZ page C6-1986 line 116416 MATCH x53000000/mask=x7f800000
# C6.2.385 UBFM page C6-1988 line 116507 MATCH x53000000/mask=x7f800000
# C6.2.386 UBFX page C6-1991 line 116651 MATCH x53000000/mask=x7f800000
# CONSTRUCT xd340fc00/mask=xffc0fc2a MATCHED 5 DOCUMENTED OPCODES
# AUNIT --inst xd340fc00/mask=xffc0fc2a --status pass
# Alias for ubfm where imms=='111111'
# imms is MAX_INT6, so it will never be less than immr.

:lsr Rd_GPR64, Rn_GPR64, ImmRConst64
is ImmS=0x3f & ImmS_ne_3f=0 & ImmS_LT_ImmR=0 & ImmS_LT_ImmR_minus_1=0 & sf=1 & opc=2 & b_2428=0x13 & b_2323=0 & n=1 & ImmRConst64 & Rn_GPR64 & Rd_GPR64
{
	tmp_2:8 = ImmRConst64;
	tmp_1:8 = Rn_GPR64 >> tmp_2;
	Rd_GPR64 = tmp_1;
}

# C6.2.218 MADD page C6-1664 line 98671 MATCH x1b000000/mask=x7fe08000
# C6.2.232 MUL page C6-1691 line 100073 MATCH x1b007c00/mask=x7fe0fc00
# CONSTRUCT x1b000000/mask=xffe08000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x1b000000/mask=xffe08000 --status pass

:madd Rd_GPR32, Rn_GPR32, Rm_GPR32, Ra_GPR32
is sf=0 & op.dp3_op54=0 & b_2428=0x1b & op.dp3_op31=0 & Rm_GPR32 & op.dp3_o0=0 & Ra_GPR32 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp_2:4 = Rn_GPR32 * Rm_GPR32;
	addflags(Ra_GPR32, tmp_2);
	tmp_1:4 = Ra_GPR32 + tmp_2;
	Rd_GPR64 = zext(tmp_1);
}

# C6.2.218 MADD page C6-1664 line 98671 MATCH x1b000000/mask=x7fe08000
# C6.2.232 MUL page C6-1691 line 100073 MATCH x1b007c00/mask=x7fe0fc00
# CONSTRUCT x9b000000/mask=xffe08000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x9b000000/mask=xffe08000 --status pass

:madd Rd_GPR64, Rn_GPR64, Rm_GPR64, Ra_GPR64
is sf=1 & op.dp3_op54=0 & b_2428=0x1b & op.dp3_op31=0 & Rm_GPR64 & op.dp3_o0=0 & Ra_GPR64 & Rn_GPR64 & Rd_GPR64
{
	tmp_2:8 = Rn_GPR64 * Rm_GPR64;
	tmp_1:8 = Ra_GPR64 + tmp_2;
	Rd_GPR64 = tmp_1;
}

# C6.2.219 MNEG page C6-1666 line 98782 MATCH x1b00fc00/mask=x7fe0fc00
# C6.2.231 MSUB page C6-1689 line 99963 MATCH x1b008000/mask=x7fe08000
# CONSTRUCT x9b00fc00/mask=xffe0fc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x9b00fc00/mask=xffe0fc00 --status pass

:mneg Rd_GPR64, Rn_GPR64, Rm_GPR64
is sf=1 & op.dp3_op54=0 & b_2428=0x1b & op.dp3_op31=0 & Rm_GPR64 & op.dp3_o0=1 & Ra=0x1f & Rn_GPR64 & Rd_GPR64
{
	tmp_2:8 = Rn_GPR64 * Rm_GPR64;
	tmp_1:8 = -tmp_2;
	Rd_GPR64 = tmp_1;
}

# C6.2.219 MNEG page C6-1666 line 98782 MATCH x1b00fc00/mask=x7fe0fc00
# C6.2.231 MSUB page C6-1689 line 99963 MATCH x1b008000/mask=x7fe08000
# CONSTRUCT x1b00fc00/mask=xffe0fc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x1b00fc00/mask=xffe0fc00 --status pass

:mneg Rd_GPR32, Rn_GPR32, Rm_GPR32
is sf=0 & op.dp3_op54=0 & b_2428=0x1b & op.dp3_op31=0 & Rm_GPR32 & op.dp3_o0=1 & Ra=0x1f & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp_2:4 = Rn_GPR32 * Rm_GPR32;
	tmp_1:4 = -tmp_2;
	Rd_GPR64 = zext(tmp_1);
}

# C6.2.220 MOV (to/from SP) page C6-1668 line 98876 MATCH x11000000/mask=x7ffffc00
# C6.2.4 ADD (immediate) page C6-1151 line 68228 MATCH x11000000/mask=x7f800000
# CONSTRUCT x11000000/mask=xfffffc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x11000000/mask=xfffffc00 --status pass

:mov Rd_GPR32xsp, Rn_GPR32xsp
is sf=0 & b_30=0 & S=0 & b_2428=0x011 & (aa_Xn=31 | aa_Xd=31) & shift=0 & imm12=0 & Rn_GPR32xsp & Rd_GPR32xsp & Rd_GPR64xsp
{
	Rd_GPR64xsp = zext(Rn_GPR32xsp);
}

# C6.2.220 MOV (to/from SP) page C6-1668 line 98876 MATCH x11000000/mask=x7ffffc00
# C6.2.4 ADD (immediate) page C6-1151 line 68228 MATCH x11000000/mask=x7f800000
# CONSTRUCT x91000000/mask=xfffffc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x91000000/mask=xfffffc00 --status pass

:mov Rd_GPR64xsp, Rn_GPR64xsp
is sf=1 & b_30=0 & S=0 & b_2428=0x11 & (aa_Xn=31 | aa_Xd=31) & shift=0 & imm12=0 & Rn_GPR64xsp & Rd_GPR64xsp
{
	Rd_GPR64xsp = Rn_GPR64xsp;
}

# C6.2.166 MOV (inverted wide immediate) page C6-793 line 46366 KEEPWITH

FullImm_movz32_imm: "#"^val is imm16 & aa_hw=0 [ val = (imm16 << 0) & 0xffffffff; ] { export *[const]:8 val; }
FullImm_movz32_imm: "#"^val is imm16 & aa_hw=1 [ val = (imm16 << 16) & 0xffffffff; ] { export *[const]:8 val; }

FullImm_movz64_imm: "#"^val is imm16 & aa_hw [ val = imm16 << (aa_hw * 16); ] { export *[const]:8 val; }

FullImm_movn32_imm: "#"^val is imm16 & aa_hw=0 [ val = ~(imm16 << 0) & 0xffffffff; ] { export *[const]:8 val; }
FullImm_movn32_imm: "#"^val is imm16 & aa_hw=1 [ val = ~(imm16 << 16) & 0xffffffff; ] { export *[const]:8 val; }

FullImm_movn64_imm: "#"^val is imm16 & aa_hw [ val = ~(imm16 << (aa_hw * 16)); ] { export *[const]:8 val; }

FullImm_movk32_mask: mask is aa_hw [ mask = (~(0xffff << (aa_hw * 16))) & 0xffffffff; ] { export *[const]:4 mask; }
FullImm_movk32_shift: tmp is imm16 & aa_hw [ tmp = (imm16 << (aa_hw * 16)) & 0xffffffff; ] { export *[const]:4 tmp; }
FullImm_movk32_imm: "#"^imm16 is imm16 & aa_hw=0 { export *[const]:4 imm16; }
FullImm_movk32_imm: "#"^imm16, "LSL #16" is imm16 & aa_hw=1 & FullImm_movk32_shift { export FullImm_movk32_shift; }

FullImm_movk64_mask: mask is aa_hw [ mask = ~(0xffff << (aa_hw * 16)); ] { export *[const]:8 mask; }
FullImm_movk64_shift: tmp is imm16 & aa_hw [ tmp = (imm16 << (aa_hw * 16)); ] { export *[const]:8 tmp; }
FullImm_movk64_imm: "#"^imm16 is imm16 & aa_hw=0 { export *[const]:8 imm16; }
FullImm_movk64_imm: "#"^imm16, "LSL #16" is imm16 & aa_hw=1 & FullImm_movk64_shift { export FullImm_movk64_shift; }
FullImm_movk64_imm: "#"^imm16, "LSL #32" is imm16 & aa_hw=2 & FullImm_movk64_shift { export FullImm_movk64_shift; }
FullImm_movk64_imm: "#"^imm16, "LSL #48" is imm16 & aa_hw=3 & FullImm_movk64_shift { export FullImm_movk64_shift; }

# C6.2.221 MOV (inverted wide immediate) page C6-1669 line 98943 MATCH x12800000/mask=x7f800000
# C6.2.226 MOVN page C6-1679 line 99388 MATCH x12800000/mask=x7f800000
# CONSTRUCT x12800000/mask=xff800000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x12800000/mask=xff800000 --status pass

:mov Rd_GPR32, FullImm_movn32_imm
is sf=0 & opc=0 & b_2428=0x12 & b_2323=1 & FullImm_movn32_imm & Rd_GPR32 & Rd_GPR64
{
	# Special case MOVN
	Rd_GPR64 = FullImm_movn32_imm;
}

# C6.2.221 MOV (inverted wide immediate) page C6-1669 line 98943 MATCH x12800000/mask=x7f800000
# C6.2.226 MOVN page C6-1679 line 99388 MATCH x12800000/mask=x7f800000
# CONSTRUCT x92800000/mask=xff800000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x92800000/mask=xff800000 --status pass

:mov Rd_GPR64, FullImm_movn64_imm
is sf=1 & opc=0 & b_2428=0x12 & b_2323=1 & FullImm_movn64_imm & Rd_GPR64
{
	# Special case MOVN
	Rd_GPR64 = FullImm_movn64_imm;
}

# C6.2.222 MOV (wide immediate) page C6-1671 line 99035 MATCH x52800000/mask=x7f800000
# C6.2.227 MOVZ page C6-1681 line 99489 MATCH x52800000/mask=x7f800000
# CONSTRUCT x52800000/mask=xff800000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x52800000/mask=xff800000 --status pass

:mov Rd_GPR32, FullImm_movz32_imm
is sf=0 & opc=2 & b_2428=0x12 & b_2323=1 & FullImm_movz32_imm & Rd_GPR32 & Rd_GPR64
{
	Rd_GPR64 = FullImm_movz32_imm;
}

# C6.2.222 MOV (wide immediate) page C6-1671 line 99035 MATCH x52800000/mask=x7f800000
# C6.2.227 MOVZ page C6-1681 line 99489 MATCH x52800000/mask=x7f800000
# CONSTRUCT xd2800000/mask=xff800000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd2800000/mask=xff800000 --status pass

:mov Rd_GPR64, FullImm_movz64_imm
is sf=1 & opc=2 & b_2428=0x12 & b_2323=1 & FullImm_movz64_imm & Rd_GPR64
{
	Rd_GPR64 = FullImm_movz64_imm;
}

# C6.2.223 MOV (bitmask immediate) page C6-1673 line 99125 MATCH x320003e0/mask=x7f8003e0
# C6.2.240 ORR (immediate) page C6-1705 line 100779 MATCH x32000000/mask=x7f800000
# CONSTRUCT x320003e0/mask=xffe0ffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x320003e0/mask=xffe0ffe0 --status pass

:mov Rd_GPR32wsp, DecodeWMask32
is sf=0 & opc=1 & b_2428=0x12 & b_2223=0 & N=0 & imm6=0 & DecodeWMask32 & aa_Xn=31 & Rd_GPR32wsp & Rd_GPR64xsp
{
	# special case ORR
	tmp_1:4 = DecodeWMask32;
	Rd_GPR64xsp = zext(tmp_1);
}

# C6.2.223 MOV (bitmask immediate) page C6-1673 line 99125 MATCH x320003e0/mask=x7f8003e0
# C6.2.240 ORR (immediate) page C6-1705 line 100779 MATCH x32000000/mask=x7f800000
# CONSTRUCT xb20003e0/mask=xffc0ffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xb20003e0/mask=xffc0ffe0 --status pass

:mov Rd_GPR64xsp, DecodeWMask64
is sf=1 & opc=1 & b_2428=0x12 & b_2223=0 & imm6=0 & DecodeWMask64 & aa_Xn=31 & Rd_GPR64xsp
{
	# special case of ORR
	tmp_1:8 = DecodeWMask64;
	Rd_GPR64xsp = tmp_1;
}

# C6.2.224 MOV (register) page C6-1675 line 99214 MATCH x2a0003e0/mask=x7fe0ffe0
# C6.2.241 ORR (shifted register) page C6-1707 line 100882 MATCH x2a000000/mask=x7f200000
# CONSTRUCT x2a0003e0/mask=xff2003e0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x2a0003e0/mask=xff2003e0 --status pass

:mov Rd_GPR32, RegShift32Log
is b_31=0 & b_2430=0b0101010 & b_21=0 & b_0509=0b11111 & RegShift32Log & Rd_GPR32 & Rd_GPR64
{
	# special case ORR
	tmp_1:4 = RegShift32Log;
	Rd_GPR64 = zext(tmp_1);
}

# C6.2.224 MOV (register) page C6-1675 line 99214 MATCH x2a0003e0/mask=x7fe0ffe0
# C6.2.241 ORR (shifted register) page C6-1707 line 100882 MATCH x2a000000/mask=x7f200000
# CONSTRUCT xaa0003e0/mask=xff2003e0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xaa0003e0/mask=xff2003e0 --status pass

:mov Rd_GPR64, RegShift64Log
is b_31=1 & b_2430=0b0101010 & b_21=0 & b_0509=0b11111 & RegShift64Log & Rd_GPR64
{
	# special case of ORR
	tmp_1:8 = RegShift64Log;
	Rd_GPR64 = tmp_1;
}

# C6.2.225 MOVK page C6-1677 line 99301 MATCH x72800000/mask=x7f800000
# CONSTRUCT x72800000/mask=xff800000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x72800000/mask=xff800000 --status pass

:movk Rd_GPR32, FullImm_movk32_imm
is sf=0 & opc=3 & b_2428=0x12 & b_2323=1 & FullImm_movk32_imm & Rd_GPR32 & Rd_GPR64 & FullImm_movk32_mask
{
	local tmp:4 = Rd_GPR32 & FullImm_movk32_mask;
	tmp = tmp | FullImm_movk32_imm;
	Rd_GPR64 = zext(tmp);
}

# C6.2.225 MOVK page C6-1677 line 99301 MATCH x72800000/mask=x7f800000
# CONSTRUCT xf2800000/mask=xff800000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xf2800000/mask=xff800000 --status pass

:movk Rd_GPR64, FullImm_movk64_imm
is sf=1 & opc=3 & b_2428=0x12 & b_2323=1 & FullImm_movk64_imm & Rd_GPR64 & FullImm_movk64_mask
{
	Rd_GPR64 = Rd_GPR64 & FullImm_movk64_mask;
	Rd_GPR64 = Rd_GPR64 | FullImm_movk64_imm;
}

# C6.2.173 MRS page C6-802 line 46877 MATCH KEEPWITH

with : (l=0 | l=1) {
CopReg: spsr_el1 is Op0=3 & Op1_uimm3=0 & CRn=4 & CRm=0 & Op2_uimm3=0 & spsr_el1 { export spsr_el1; }
CopReg: elr_el1 is Op0=3 & Op1_uimm3=0 & CRn=4 & CRm=0 & Op2_uimm3=1 & elr_el1 { export elr_el1; }
CopReg: sp_el0 is Op0=3 & Op1_uimm3=0 & CRn=4 & CRm=1 & Op2_uimm3=0 & sp_el0 { export sp_el0; }
CopReg: spsel is Op0=3 & Op1_uimm3=0 & CRn=4 & CRm=2 & Op2_uimm3=0 & spsel { export spsel; }
CopReg: daif is Op0=3 & Op1_uimm3=3 & CRn=4 & CRm=2 & Op2_uimm3=1 & daif { export daif; }
CopReg: currentel is Op0=3 & Op1_uimm3=0 & CRn=4 & CRm=2 & Op2_uimm3=2 & currentel { export currentel; }
CopReg: nzcv is Op0=3 & Op1_uimm3=3 & CRn=4 & CRm=2 & Op2_uimm3=0 & nzcv { export nzcv; }
CopReg: fpcr is Op0=3 & Op1_uimm3=3 & CRn=4 & CRm=4 & Op2_uimm3=0 & fpcr { export fpcr; }
CopReg: fpsr is Op0=3 & Op1_uimm3=3 & CRn=4 & CRm=4 & Op2_uimm3=1 & fpsr { export fpsr; }
CopReg: dspsr_el0 is Op0=3 & Op1_uimm3=3 & CRn=4 & CRm=5 & Op2_uimm3=0 & dspsr_el0 { export dspsr_el0; }
CopReg: dlr_el0 is Op0=3 & Op1_uimm3=3 & CRn=4 & CRm=5 & Op2_uimm3=1 & dlr_el0 { export dlr_el0; }
CopReg: spsr_el2 is Op0=3 & Op1_uimm3=4 & CRn=4 & CRm=0 & Op2_uimm3=0 & spsr_el2 { export spsr_el2; }
CopReg: elr_el2 is Op0=3 & Op1_uimm3=4 & CRn=4 & CRm=0 & Op2_uimm3=1 & elr_el2 { export elr_el2; }
CopReg: sp_el1 is Op0=3 & Op1_uimm3=4 & CRn=4 & CRm=1 & Op2_uimm3=0 & sp_el1 { export sp_el1; }
CopReg: spsr_irq is Op0=3 & Op1_uimm3=4 & CRn=4 & CRm=3 & Op2_uimm3=0 & spsr_irq { export spsr_irq; }
CopReg: spsr_abt is Op0=3 & Op1_uimm3=4 & CRn=4 & CRm=3 & Op2_uimm3=1 & spsr_abt { export spsr_abt; }
CopReg: spsr_und is Op0=3 & Op1_uimm3=4 & CRn=4 & CRm=3 & Op2_uimm3=2 & spsr_und { export spsr_und; }
CopReg: spsr_fiq is Op0=3 & Op1_uimm3=4 & CRn=4 & CRm=3 & Op2_uimm3=3 & spsr_fiq { export spsr_fiq; }
CopReg: spsr_el3 is Op0=3 & Op1_uimm3=6 & CRn=4 & CRm=0 & Op2_uimm3=0 & spsr_el3 { export spsr_el3; }
CopReg: elr_el3 is Op0=3 & Op1_uimm3=6 & CRn=4 & CRm=0 & Op2_uimm3=1 & elr_el3 { export elr_el3; }
CopReg: sp_el2 is Op0=3 & Op1_uimm3=6 & CRn=4 & CRm=1 & Op2_uimm3=0 & sp_el2 { export sp_el2; }
# CopReg: spsr_svc is Op0=3 & Op1_uimm3=0 & CRn=4 & CRm=0 & Op2_uimm3=0 & spsr_svc { export spsr_svc; }
# CopReg: spsr_hyp is Op0=3 & Op1_uimm3=4 & CRn=4 & CRm=0 & Op2_uimm3=0 & spsr_hyp { export spsr_hyp; }

CopReg: midr_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=0 & Op2_uimm3=0 & midr_el1 { export midr_el1; }
CopReg: mpidr_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=0 & Op2_uimm3=5 & mpidr_el1 { export mpidr_el1; }
CopReg: revidr_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=0 & Op2_uimm3=6 & revidr_el1 { export revidr_el1; }
CopReg: id_dfr0_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=1 & Op2_uimm3=2 & id_dfr0_el1 { export id_dfr0_el1; }
CopReg: id_pfr0_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=1 & Op2_uimm3=0 & id_pfr0_el1 { export id_pfr0_el1; }
CopReg: id_pfr1_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=1 & Op2_uimm3=1 & id_pfr1_el1 { export id_pfr1_el1; }
CopReg: id_afr0_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=1 & Op2_uimm3=3 & id_afr0_el1 { export id_afr0_el1; }
CopReg: id_mmfr0_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=1 & Op2_uimm3=4 & id_mmfr0_el1 { export id_mmfr0_el1; }
CopReg: id_mmfr1_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=1 & Op2_uimm3=5 & id_mmfr1_el1 { export id_mmfr1_el1; }
CopReg: id_mmfr2_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=1 & Op2_uimm3=6 & id_mmfr2_el1 { export id_mmfr2_el1; }
CopReg: id_mmfr3_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=1 & Op2_uimm3=7 & id_mmfr3_el1 { export id_mmfr3_el1; }
CopReg: id_isar0_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=2 & Op2_uimm3=0 & id_isar0_el1 { export id_isar0_el1; }
CopReg: id_isar1_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=2 & Op2_uimm3=1 & id_isar1_el1 { export id_isar1_el1; }
CopReg: id_isar2_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=2 & Op2_uimm3=2 & id_isar2_el1 { export id_isar2_el1; }
CopReg: id_isar3_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=2 & Op2_uimm3=3 & id_isar3_el1 { export id_isar3_el1; }
CopReg: id_isar4_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=2 & Op2_uimm3=4 & id_isar4_el1 { export id_isar4_el1; }
CopReg: id_isar5_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=2 & Op2_uimm3=5 & id_isar5_el1 { export id_isar5_el1; }
CopReg: mvfr0_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=3 & Op2_uimm3=0 & mvfr0_el1 { export mvfr0_el1; }
CopReg: mvfr1_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=3 & Op2_uimm3=1 & mvfr1_el1 { export mvfr1_el1; }
CopReg: mvfr2_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=3 & Op2_uimm3=2 & mvfr2_el1 { export mvfr2_el1; }
CopReg: ccsidr_el1 is Op0=3 & Op1_uimm3=1 & CRn=0 & CRm=0 & Op2_uimm3=0 & ccsidr_el1 { export ccsidr_el1; }
CopReg: id_aa64pfr0_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=4 & Op2_uimm3=0 & id_aa64pfr0_el1 { export id_aa64pfr0_el1; }
CopReg: id_aa64pfr1_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=4 & Op2_uimm3=1 & id_aa64pfr1_el1 { export id_aa64pfr1_el1; }
CopReg: id_aa64dfr0_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=5 & Op2_uimm3=0 & id_aa64dfr0_el1 { export id_aa64dfr0_el1; }
CopReg: id_aa64dfr1_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=5 & Op2_uimm3=1 & id_aa64dfr1_el1 { export id_aa64dfr1_el1; }
CopReg: id_aa64isar0_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=6 & Op2_uimm3=0 & id_aa64isar0_el1 { export id_aa64isar0_el1; }
CopReg: id_aa64isar1_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=6 & Op2_uimm3=1 & id_aa64isar1_el1 { export id_aa64isar1_el1; }
CopReg: id_aa64mmfr0_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=7 & Op2_uimm3=0 & id_aa64mmfr0_el1 { export id_aa64mmfr0_el1; }
CopReg: id_aa64mmfr1_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=7 & Op2_uimm3=1 & id_aa64mmfr1_el1 { export id_aa64mmfr1_el1; }
CopReg: id_aa64afr0_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=5 & Op2_uimm3=4 & id_aa64afr0_el1 { export id_aa64afr0_el1; }
CopReg: id_aa64afr1_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=5 & Op2_uimm3=5 & id_aa64afr1_el1 { export id_aa64afr1_el1; }
CopReg: clidr_el1 is Op0=3 & Op1_uimm3=1 & CRn=0 & CRm=0 & Op2_uimm3=1 & clidr_el1 { export clidr_el1; }
CopReg: aidr_el1 is Op0=3 & Op1_uimm3=1 & CRn=0 & CRm=0 & Op2_uimm3=7 & aidr_el1 { export aidr_el1; }
CopReg: csselr_el1 is Op0=3 & Op1_uimm3=2 & CRn=0 & CRm=0 & Op2_uimm3=0 & csselr_el1 { export csselr_el1; }
CopReg: ctr_el0 is Op0=3 & Op1_uimm3=3 & CRn=0 & CRm=0 & Op2_uimm3=1 & ctr_el0 { export ctr_el0; }
CopReg: dczid_el0 is Op0=3 & Op1_uimm3=3 & CRn=0 & CRm=0 & Op2_uimm3=7 & dczid_el0 { export dczid_el0; }
CopReg: vpidr_el2 is Op0=3 & Op1_uimm3=4 & CRn=0 & CRm=0 & Op2_uimm3=0 & vpidr_el2 { export vpidr_el2; }
CopReg: vmpidr_el2 is Op0=3 & Op1_uimm3=4 & CRn=0 & CRm=0 & Op2_uimm3=5 & vmpidr_el2 { export vmpidr_el2; }
CopReg: sctlr_el1 is Op0=3 & Op1_uimm3=0 & CRn=1 & CRm=0 & Op2_uimm3=0 & sctlr_el1 { export sctlr_el1; }
CopReg: actlr_el1 is Op0=3 & Op1_uimm3=0 & CRn=1 & CRm=0 & Op2_uimm3=1 & actlr_el1 { export actlr_el1; }
CopReg: cpacr_el1 is Op0=3 & Op1_uimm3=0 & CRn=1 & CRm=0 & Op2_uimm3=2 & cpacr_el1 { export cpacr_el1; }
CopReg: sctlr_el2 is Op0=3 & Op1_uimm3=4 & CRn=1 & CRm=0 & Op2_uimm3=0 & sctlr_el2 { export sctlr_el2; }
CopReg: actlr_el2 is Op0=3 & Op1_uimm3=4 & CRn=1 & CRm=0 & Op2_uimm3=1 & actlr_el2 { export actlr_el2; }
CopReg: hcr_el2 is Op0=3 & Op1_uimm3=4 & CRn=1 & CRm=1 & Op2_uimm3=0 & hcr_el2 { export hcr_el2; }
CopReg: mdcr_el2 is Op0=3 & Op1_uimm3=4 & CRn=1 & CRm=1 & Op2_uimm3=1 & mdcr_el2 { export mdcr_el2; }
CopReg: cptr_el2 is Op0=3 & Op1_uimm3=4 & CRn=1 & CRm=1 & Op2_uimm3=2 & cptr_el2 { export cptr_el2; }
CopReg: hstr_el2 is Op0=3 & Op1_uimm3=4 & CRn=1 & CRm=1 & Op2_uimm3=3 & hstr_el2 { export hstr_el2; }
CopReg: hacr_el2 is Op0=3 & Op1_uimm3=4 & CRn=1 & CRm=1 & Op2_uimm3=7 & hacr_el2 { export hacr_el2; }
CopReg: sctlr_el3 is Op0=3 & Op1_uimm3=6 & CRn=1 & CRm=0 & Op2_uimm3=0 & sctlr_el3 { export sctlr_el3; }
CopReg: actlr_el3 is Op0=3 & Op1_uimm3=6 & CRn=1 & CRm=0 & Op2_uimm3=1 & actlr_el3 { export actlr_el3; }
CopReg: scr_el3 is Op0=3 & Op1_uimm3=6 & CRn=1 & CRm=1 & Op2_uimm3=0 & scr_el3 { export scr_el3; }
CopReg: cptr_el3 is Op0=3 & Op1_uimm3=6 & CRn=1 & CRm=1 & Op2_uimm3=2 & cptr_el3 { export cptr_el3; }
CopReg: mdcr_el3 is Op0=3 & Op1_uimm3=6 & CRn=1 & CRm=3 & Op2_uimm3=1 & mdcr_el3 { export mdcr_el3; }
CopReg: ttbr0_el1 is Op0=3 & Op1_uimm3=0 & CRn=2 & CRm=0 & Op2_uimm3=0 & ttbr0_el1 { export ttbr0_el1; }
CopReg: ttbr1_el1 is Op0=3 & Op1_uimm3=0 & CRn=2 & CRm=0 & Op2_uimm3=1 & ttbr1_el1 { export ttbr1_el1; }
CopReg: ttbr0_el2 is Op0=3 & Op1_uimm3=4 & CRn=2 & CRm=0 & Op2_uimm3=0 & ttbr0_el2 { export ttbr0_el2; }
CopReg: ttbr0_el3 is Op0=3 & Op1_uimm3=6 & CRn=2 & CRm=0 & Op2_uimm3=0 & ttbr0_el3 { export ttbr0_el3; }
CopReg: vttbr_el2 is Op0=3 & Op1_uimm3=4 & CRn=2 & CRm=1 & Op2_uimm3=0 & vttbr_el2 { export vttbr_el2; }
CopReg: tcr_el1 is Op0=3 & Op1_uimm3=0 & CRn=2 & CRm=0 & Op2_uimm3=2 & tcr_el1 { export tcr_el1; }
CopReg: tcr_el2 is Op0=3 & Op1_uimm3=4 & CRn=2 & CRm=0 & Op2_uimm3=2 & tcr_el2 { export tcr_el2; }
CopReg: tcr_el3 is Op0=3 & Op1_uimm3=6 & CRn=2 & CRm=0 & Op2_uimm3=2 & tcr_el3 { export tcr_el3; }
CopReg: vtcr_el2 is Op0=3 & Op1_uimm3=4 & CRn=2 & CRm=1 & Op2_uimm3=2 & vtcr_el2 { export vtcr_el2; }
CopReg: afsr0_el1 is Op0=3 & Op1_uimm3=0 & CRn=5 & CRm=1 & Op2_uimm3=0 & afsr0_el1 { export afsr0_el1; }
CopReg: afsr1_el1 is Op0=3 & Op1_uimm3=0 & CRn=5 & CRm=1 & Op2_uimm3=1 & afsr1_el1 { export afsr1_el1; }
CopReg: afsr0_el2 is Op0=3 & Op1_uimm3=4 & CRn=5 & CRm=1 & Op2_uimm3=0 & afsr0_el2 { export afsr0_el2; }
CopReg: afsr1_el2 is Op0=3 & Op1_uimm3=4 & CRn=5 & CRm=1 & Op2_uimm3=1 & afsr1_el2 { export afsr1_el2; }
CopReg: afsr0_el3 is Op0=3 & Op1_uimm3=6 & CRn=5 & CRm=1 & Op2_uimm3=0 & afsr0_el3 { export afsr0_el3; }
CopReg: afsr1_el3 is Op0=3 & Op1_uimm3=6 & CRn=5 & CRm=1 & Op2_uimm3=1 & afsr1_el3 { export afsr1_el3; }
CopReg: esr_el1 is Op0=3 & Op1_uimm3=0 & CRn=5 & CRm=2 & Op2_uimm3=0 & esr_el1 { export esr_el1; }
CopReg: esr_el2 is Op0=3 & Op1_uimm3=4 & CRn=5 & CRm=2 & Op2_uimm3=0 & esr_el2 { export esr_el2; }
CopReg: esr_el3 is Op0=3 & Op1_uimm3=6 & CRn=5 & CRm=2 & Op2_uimm3=0 & esr_el3 { export esr_el3; }
CopReg: fpexc32_el2 is Op0=3 & Op1_uimm3=4 & CRn=5 & CRm=3 & Op2_uimm3=0 & fpexc32_el2 { export fpexc32_el2; }
CopReg: far_el1 is Op0=3 & Op1_uimm3=0 & CRn=6 & CRm=0 & Op2_uimm3=0 & far_el1 { export far_el1; }
CopReg: far_el2 is Op0=3 & Op1_uimm3=4 & CRn=6 & CRm=0 & Op2_uimm3=0 & far_el2 { export far_el2; }
CopReg: far_el3 is Op0=3 & Op1_uimm3=6 & CRn=6 & CRm=0 & Op2_uimm3=0 & far_el3 { export far_el3; }
CopReg: hpfar_el2 is Op0=3 & Op1_uimm3=4 & CRn=6 & CRm=0 & Op2_uimm3=4 & hpfar_el2 { export hpfar_el2; }
CopReg: par_el1 is Op0=3 & Op1_uimm3=0 & CRn=7 & CRm=4 & Op2_uimm3=0 & par_el1 { export par_el1; }
CopReg: pmintenset_el1 is Op0=3 & Op1_uimm3=0 & CRn=9 & CRm=14 & Op2_uimm3=1 & pmintenset_el1 { export pmintenset_el1; }
CopReg: pmintenclr_el1 is Op0=3 & Op1_uimm3=0 & CRn=9 & CRm=14 & Op2_uimm3=2 & pmintenclr_el1 { export pmintenclr_el1; }
CopReg: pmcr_el0 is Op0=3 & Op1_uimm3=3 & CRn=9 & CRm=12 & Op2_uimm3=0 & pmcr_el0 { export pmcr_el0; }
CopReg: pmcntenset_el0 is Op0=3 & Op1_uimm3=3 & CRn=9 & CRm=12 & Op2_uimm3=1 & pmcntenset_el0 { export pmcntenset_el0; }
CopReg: pmcntenclr_el0 is Op0=3 & Op1_uimm3=3 & CRn=9 & CRm=12 & Op2_uimm3=2 & pmcntenclr_el0 { export pmcntenclr_el0; }
CopReg: pmovsclr_el0 is Op0=3 & Op1_uimm3=3 & CRn=9 & CRm=12 & Op2_uimm3=3 & pmovsclr_el0 { export pmovsclr_el0; }
CopReg: pmswinc_el0 is Op0=3 & Op1_uimm3=3 & CRn=9 & CRm=12 & Op2_uimm3=4 & pmswinc_el0 { export pmswinc_el0; }
CopReg: pmselr_el0 is Op0=3 & Op1_uimm3=3 & CRn=9 & CRm=12 & Op2_uimm3=5 & pmselr_el0 { export pmselr_el0; }
CopReg: pmceid0_el0 is Op0=3 & Op1_uimm3=3 & CRn=9 & CRm=12 & Op2_uimm3=6 & pmceid0_el0 { export pmceid0_el0; }
CopReg: pmceid1_el0 is Op0=3 & Op1_uimm3=3 & CRn=9 & CRm=12 & Op2_uimm3=7 & pmceid1_el0 { export pmceid1_el0; }
CopReg: pmccntr_el0 is Op0=3 & Op1_uimm3=3 & CRn=9 & CRm=13 & Op2_uimm3=0 & pmccntr_el0 { export pmccntr_el0; }
CopReg: pmxevtyper_el0 is Op0=3 & Op1_uimm3=3 & CRn=9 & CRm=13 & Op2_uimm3=1 & pmxevtyper_el0 { export pmxevtyper_el0; }
CopReg: pmxevcntr_el0 is Op0=3 & Op1_uimm3=3 & CRn=9 & CRm=13 & Op2_uimm3=2 & pmxevcntr_el0 { export pmxevcntr_el0; }
CopReg: pmuserenr_el0 is Op0=3 & Op1_uimm3=3 & CRn=9 & CRm=14 & Op2_uimm3=0 & pmuserenr_el0 { export pmuserenr_el0; }
CopReg: pmovsset_el0 is Op0=3 & Op1_uimm3=3 & CRn=9 & CRm=14 & Op2_uimm3=3 & pmovsset_el0 { export pmovsset_el0; }
CopReg: pmevcntr0_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=8 & Op2_uimm3=0 & pmevcntr0_el0 { export pmevcntr0_el0; }
CopReg: pmevcntr1_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=8 & Op2_uimm3=1 & pmevcntr1_el0 { export pmevcntr1_el0; }
CopReg: pmevcntr2_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=8 & Op2_uimm3=2 & pmevcntr2_el0 { export pmevcntr2_el0; }
CopReg: pmevcntr3_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=8 & Op2_uimm3=3 & pmevcntr3_el0 { export pmevcntr3_el0; }
CopReg: pmevcntr4_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=8 & Op2_uimm3=4 & pmevcntr4_el0 { export pmevcntr4_el0; }
CopReg: pmevcntr5_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=8 & Op2_uimm3=5 & pmevcntr5_el0 { export pmevcntr5_el0; }
CopReg: pmevcntr6_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=8 & Op2_uimm3=6 & pmevcntr6_el0 { export pmevcntr6_el0; }
CopReg: pmevcntr7_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=8 & Op2_uimm3=7 & pmevcntr7_el0 { export pmevcntr7_el0; }
CopReg: pmevcntr8_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=9 & Op2_uimm3=0 & pmevcntr8_el0 { export pmevcntr8_el0; }
CopReg: pmevcntr9_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=9 & Op2_uimm3=1 & pmevcntr9_el0 { export pmevcntr9_el0; }
CopReg: pmevcntr10_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=9 & Op2_uimm3=2 & pmevcntr10_el0 { export pmevcntr10_el0; }
CopReg: pmevcntr11_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=9 & Op2_uimm3=3 & pmevcntr11_el0 { export pmevcntr11_el0; }
CopReg: pmevcntr12_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=9 & Op2_uimm3=4 & pmevcntr12_el0 { export pmevcntr12_el0; }
CopReg: pmevcntr13_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=9 & Op2_uimm3=5 & pmevcntr13_el0 { export pmevcntr13_el0; }
CopReg: pmevcntr14_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=9 & Op2_uimm3=6 & pmevcntr14_el0 { export pmevcntr14_el0; }
CopReg: pmevcntr15_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=9 & Op2_uimm3=7 & pmevcntr15_el0 { export pmevcntr15_el0; }
CopReg: pmevcntr16_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=10 & Op2_uimm3=0 & pmevcntr16_el0 { export pmevcntr16_el0; }
CopReg: pmevcntr17_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=10 & Op2_uimm3=1 & pmevcntr17_el0 { export pmevcntr17_el0; }
CopReg: pmevcntr18_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=10 & Op2_uimm3=2 & pmevcntr18_el0 { export pmevcntr18_el0; }
CopReg: pmevcntr19_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=10 & Op2_uimm3=3 & pmevcntr19_el0 { export pmevcntr19_el0; }
CopReg: pmevcntr20_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=10 & Op2_uimm3=4 & pmevcntr20_el0 { export pmevcntr20_el0; }
CopReg: pmevcntr21_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=10 & Op2_uimm3=5 & pmevcntr21_el0 { export pmevcntr21_el0; }
CopReg: pmevcntr22_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=10 & Op2_uimm3=6 & pmevcntr22_el0 { export pmevcntr22_el0; }
CopReg: pmevcntr23_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=10 & Op2_uimm3=7 & pmevcntr23_el0 { export pmevcntr23_el0; }
CopReg: pmevcntr24_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=11 & Op2_uimm3=0 & pmevcntr24_el0 { export pmevcntr24_el0; }
CopReg: pmevcntr25_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=11 & Op2_uimm3=1 & pmevcntr25_el0 { export pmevcntr25_el0; }
CopReg: pmevcntr26_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=11 & Op2_uimm3=2 & pmevcntr26_el0 { export pmevcntr26_el0; }
CopReg: pmevcntr27_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=11 & Op2_uimm3=3 & pmevcntr27_el0 { export pmevcntr27_el0; }
CopReg: pmevcntr28_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=11 & Op2_uimm3=4 & pmevcntr28_el0 { export pmevcntr28_el0; }
CopReg: pmevcntr29_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=11 & Op2_uimm3=5 & pmevcntr29_el0 { export pmevcntr29_el0; }
CopReg: pmevcntr30_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=11 & Op2_uimm3=6 & pmevcntr30_el0 { export pmevcntr30_el0; }
CopReg: pmevtyper0_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=12 & Op2_uimm3=0 & pmevtyper0_el0 { export pmevtyper0_el0; }
CopReg: pmevtyper1_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=12 & Op2_uimm3=1 & pmevtyper1_el0 { export pmevtyper1_el0; }
CopReg: pmevtyper2_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=12 & Op2_uimm3=2 & pmevtyper2_el0 { export pmevtyper2_el0; }
CopReg: pmevtyper3_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=12 & Op2_uimm3=3 & pmevtyper3_el0 { export pmevtyper3_el0; }
CopReg: pmevtyper4_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=12 & Op2_uimm3=4 & pmevtyper4_el0 { export pmevtyper4_el0; }
CopReg: pmevtyper5_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=12 & Op2_uimm3=5 & pmevtyper5_el0 { export pmevtyper5_el0; }
CopReg: pmevtyper6_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=12 & Op2_uimm3=6 & pmevtyper6_el0 { export pmevtyper6_el0; }
CopReg: pmevtyper7_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=12 & Op2_uimm3=7 & pmevtyper7_el0 { export pmevtyper7_el0; }
CopReg: pmevtyper8_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=13 & Op2_uimm3=0 & pmevtyper8_el0 { export pmevtyper8_el0; }
CopReg: pmevtyper9_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=13 & Op2_uimm3=1 & pmevtyper9_el0 { export pmevtyper9_el0; }
CopReg: pmevtyper10_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=13 & Op2_uimm3=2 & pmevtyper10_el0 { export pmevtyper10_el0; }
CopReg: pmevtyper11_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=13 & Op2_uimm3=3 & pmevtyper11_el0 { export pmevtyper11_el0; }
CopReg: pmevtyper12_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=13 & Op2_uimm3=4 & pmevtyper12_el0 { export pmevtyper12_el0; }
CopReg: pmevtyper13_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=13 & Op2_uimm3=5 & pmevtyper13_el0 { export pmevtyper13_el0; }
CopReg: pmevtyper14_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=13 & Op2_uimm3=6 & pmevtyper14_el0 { export pmevtyper14_el0; }
CopReg: pmevtyper15_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=13 & Op2_uimm3=7 & pmevtyper15_el0 { export pmevtyper15_el0; }
CopReg: pmevtyper16_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=14 & Op2_uimm3=0 & pmevtyper16_el0 { export pmevtyper16_el0; }
CopReg: pmevtyper17_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=14 & Op2_uimm3=1 & pmevtyper17_el0 { export pmevtyper17_el0; }
CopReg: pmevtyper18_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=14 & Op2_uimm3=2 & pmevtyper18_el0 { export pmevtyper18_el0; }
CopReg: pmevtyper19_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=14 & Op2_uimm3=3 & pmevtyper19_el0 { export pmevtyper19_el0; }
CopReg: pmevtyper20_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=14 & Op2_uimm3=4 & pmevtyper20_el0 { export pmevtyper20_el0; }
CopReg: pmevtyper21_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=14 & Op2_uimm3=5 & pmevtyper21_el0 { export pmevtyper21_el0; }
CopReg: pmevtyper22_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=14 & Op2_uimm3=6 & pmevtyper22_el0 { export pmevtyper22_el0; }
CopReg: pmevtyper23_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=14 & Op2_uimm3=7 & pmevtyper23_el0 { export pmevtyper23_el0; }
CopReg: pmevtyper24_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=15 & Op2_uimm3=0 & pmevtyper24_el0 { export pmevtyper24_el0; }
CopReg: pmevtyper25_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=15 & Op2_uimm3=1 & pmevtyper25_el0 { export pmevtyper25_el0; }
CopReg: pmevtyper26_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=15 & Op2_uimm3=2 & pmevtyper26_el0 { export pmevtyper26_el0; }
CopReg: pmevtyper27_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=15 & Op2_uimm3=3 & pmevtyper27_el0 { export pmevtyper27_el0; }
CopReg: pmevtyper28_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=15 & Op2_uimm3=4 & pmevtyper28_el0 { export pmevtyper28_el0; }
CopReg: pmevtyper29_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=15 & Op2_uimm3=5 & pmevtyper29_el0 { export pmevtyper29_el0; }
CopReg: pmevtyper30_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=15 & Op2_uimm3=6 & pmevtyper30_el0 { export pmevtyper30_el0; }
CopReg: pmccfiltr_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=15 & Op2_uimm3=7 & pmccfiltr_el0 { export pmccfiltr_el0; }
CopReg: mair_el1 is Op0=3 & Op1_uimm3=0 & CRn=10 & CRm=2 & Op2_uimm3=0 & mair_el1 { export mair_el1; }
CopReg: mair_el2 is Op0=3 & Op1_uimm3=4 & CRn=10 & CRm=2 & Op2_uimm3=0 & mair_el2 { export mair_el2; }
CopReg: mair_el3 is Op0=3 & Op1_uimm3=6 & CRn=10 & CRm=2 & Op2_uimm3=0 & mair_el3 { export mair_el3; }
CopReg: amair_el1 is Op0=3 & Op1_uimm3=0 & CRn=10 & CRm=3 & Op2_uimm3=0 & amair_el1 { export amair_el1; }
CopReg: amair_el2 is Op0=3 & Op1_uimm3=4 & CRn=10 & CRm=3 & Op2_uimm3=0 & amair_el2 { export amair_el2; }
CopReg: amair_el3 is Op0=3 & Op1_uimm3=6 & CRn=10 & CRm=3 & Op2_uimm3=0 & amair_el3 { export amair_el3; }
CopReg: vbar_el1 is Op0=3 & Op1_uimm3=0 & CRn=12 & CRm=0 & Op2_uimm3=0 & vbar_el1 { export vbar_el1; }
CopReg: vbar_el2 is Op0=3 & Op1_uimm3=4 & CRn=12 & CRm=0 & Op2_uimm3=0 & vbar_el2 { export vbar_el2; }
CopReg: vbar_el3 is Op0=3 & Op1_uimm3=6 & CRn=12 & CRm=0 & Op2_uimm3=0 & vbar_el3 { export vbar_el3; }
CopReg: rvbar_el1 is Op0=3 & Op1_uimm3=0 & CRn=12 & CRm=0 & Op2_uimm3=1 & rvbar_el1 { export rvbar_el1; }
CopReg: rvbar_el2 is Op0=3 & Op1_uimm3=4 & CRn=12 & CRm=0 & Op2_uimm3=1 & rvbar_el2 { export rvbar_el2; }
CopReg: rvbar_el3 is Op0=3 & Op1_uimm3=6 & CRn=12 & CRm=0 & Op2_uimm3=1 & rvbar_el3 { export rvbar_el3; }
CopReg: rmr_el1 is Op0=3 & Op1_uimm3=0 & CRn=12 & CRm=0 & Op2_uimm3=2 & rmr_el1 { export rmr_el1; }
CopReg: rmr_el2 is Op0=3 & Op1_uimm3=4 & CRn=12 & CRm=0 & Op2_uimm3=2 & rmr_el2 { export rmr_el2; }
CopReg: rmr_el3 is Op0=3 & Op1_uimm3=6 & CRn=12 & CRm=0 & Op2_uimm3=2 & rmr_el3 { export rmr_el3; }
CopReg: isr_el1 is Op0=3 & Op1_uimm3=0 & CRn=12 & CRm=1 & Op2_uimm3=0 & isr_el1 { export isr_el1; }
CopReg: contextidr_el1 is Op0=3 & Op1_uimm3=0 & CRn=13 & CRm=0 & Op2_uimm3=1 & contextidr_el1 { export contextidr_el1; }
CopReg: tpidr_el0 is Op0=3 & Op1_uimm3=3 & CRn=13 & CRm=0 & Op2_uimm3=2 & tpidr_el0 { export tpidr_el0; }
CopReg: tpidrro_el0 is Op0=3 & Op1_uimm3=3 & CRn=13 & CRm=0 & Op2_uimm3=3 & tpidrro_el0 { export tpidrro_el0; }
CopReg: tpidr_el1 is Op0=3 & Op1_uimm3=0 & CRn=13 & CRm=0 & Op2_uimm3=4 & tpidr_el1 { export tpidr_el1; }
CopReg: tpidr_el2 is Op0=3 & Op1_uimm3=4 & CRn=13 & CRm=0 & Op2_uimm3=2 & tpidr_el2 { export tpidr_el2; }
CopReg: tpidr_el3 is Op0=3 & Op1_uimm3=6 & CRn=13 & CRm=0 & Op2_uimm3=2 & tpidr_el3 { export tpidr_el3; }
CopReg: teecr32_el1 is Op0=2 & Op1_uimm3=2 & CRn=0 & CRm=0 & Op2_uimm3=0 & teecr32_el1 { export teecr32_el1; }
CopReg: cntfrq_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=0 & Op2_uimm3=0 & cntfrq_el0 { export cntfrq_el0; }
CopReg: cntpct_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=0 & Op2_uimm3=1 & cntpct_el0 { export cntpct_el0; }
CopReg: cntvct_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=0 & Op2_uimm3=2 & cntvct_el0 { export cntvct_el0; }
CopReg: cntvoff_el2 is Op0=3 & Op1_uimm3=4 & CRn=14 & CRm=0 & Op2_uimm3=3 & cntvoff_el2 { export cntvoff_el2; }
CopReg: cntkctl_el1 is Op0=3 & Op1_uimm3=0 & CRn=14 & CRm=1 & Op2_uimm3=0 & cntkctl_el1 { export cntkctl_el1; }
CopReg: cnthctl_el2 is Op0=3 & Op1_uimm3=4 & CRn=14 & CRm=1 & Op2_uimm3=0 & cnthctl_el2 { export cnthctl_el2; }
CopReg: cntp_tval_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=2 & Op2_uimm3=0 & cntp_tval_el0 { export cntp_tval_el0; }
CopReg: cntp_ctl_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=2 & Op2_uimm3=1 & cntp_ctl_el0 { export cntp_ctl_el0; }
CopReg: cntp_cval_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=2 & Op2_uimm3=2 & cntp_cval_el0 { export cntp_cval_el0; }
CopReg: cntv_tval_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=3 & Op2_uimm3=0 & cntv_tval_el0 { export cntv_tval_el0; }
CopReg: cntv_ctl_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=3 & Op2_uimm3=1 & cntv_ctl_el0 { export cntv_ctl_el0; }
CopReg: cntv_cval_el0 is Op0=3 & Op1_uimm3=3 & CRn=14 & CRm=3 & Op2_uimm3=2 & cntv_cval_el0 { export cntv_cval_el0; }
CopReg: cnthp_tval_el2 is Op0=3 & Op1_uimm3=4 & CRn=14 & CRm=2 & Op2_uimm3=0 & cnthp_tval_el2 { export cnthp_tval_el2; }
CopReg: cnthp_ctl_el2 is Op0=3 & Op1_uimm3=4 & CRn=14 & CRm=2 & Op2_uimm3=1 & cnthp_ctl_el2 { export cnthp_ctl_el2; }
CopReg: cnthp_cval_el2 is Op0=3 & Op1_uimm3=4 & CRn=14 & CRm=2 & Op2_uimm3=2 & cnthp_cval_el2 { export cnthp_cval_el2; }
CopReg: cntps_tval_el1 is Op0=3 & Op1_uimm3=7 & CRn=14 & CRm=2 & Op2_uimm3=0 & cntps_tval_el1 { export cntps_tval_el1; }
CopReg: cntps_ctl_el1 is Op0=3 & Op1_uimm3=7 & CRn=14 & CRm=2 & Op2_uimm3=1 & cntps_ctl_el1 { export cntps_ctl_el1; }
CopReg: cntps_cval_el1 is Op0=3 & Op1_uimm3=7 & CRn=14 & CRm=2 & Op2_uimm3=2 & cntps_cval_el1 { export cntps_cval_el1; }
CopReg: dacr32_el2 is Op0=3 & Op1_uimm3=4 & CRn=3 & CRm=0 & Op2_uimm3=0 & dacr32_el2 { export dacr32_el2; }
CopReg: ifsr32_el2 is Op0=3 & Op1_uimm3=4 & CRn=5 & CRm=0 & Op2_uimm3=1 & ifsr32_el2 { export ifsr32_el2; }
CopReg: teehbr32_el1 is Op0=2 & Op1_uimm3=2 & CRn=1 & CRm=0 & Op2_uimm3=0 & teehbr32_el1 { export teehbr32_el1; }
CopReg: sder32_el3 is Op0=3 & Op1_uimm3=6 & CRn=1 & CRm=1 & Op2_uimm3=1 & sder32_el3 { export sder32_el3; }
CopReg: osdtrrx_el1 is Op0=3 & Op1_uimm3=0 & CRn=0 & CRm=0 & Op2_uimm3=2 & osdtrrx_el1 { export osdtrrx_el1; }

CopReg: mdccint_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=2 & Op2_uimm3=0 & mdccint_el1 { export mdccint_el1; }
CopReg: mdscr_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=2 & Op2_uimm3=2 & mdscr_el1 { export mdscr_el1; }
CopReg: osdtrtx_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=3 & Op2_uimm3=2 & osdtrtx_el1 { export osdtrtx_el1; }
CopReg: oseccr_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=6 & Op2_uimm3=2 & oseccr_el1 { export oseccr_el1; }
CopReg: dbgbvr0_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=0 & Op2_uimm3=4 & dbgbvr0_el1 { export dbgbvr0_el1; }
CopReg: dbgbvr1_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=1 & Op2_uimm3=4 & dbgbvr1_el1 { export dbgbvr1_el1; }
CopReg: dbgbvr2_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=2 & Op2_uimm3=4 & dbgbvr2_el1 { export dbgbvr2_el1; }
CopReg: dbgbvr3_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=3 & Op2_uimm3=4 & dbgbvr3_el1 { export dbgbvr3_el1; }
CopReg: dbgbvr4_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=4 & Op2_uimm3=4 & dbgbvr4_el1 { export dbgbvr4_el1; }
CopReg: dbgbvr5_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=5 & Op2_uimm3=4 & dbgbvr5_el1 { export dbgbvr5_el1; }
CopReg: dbgbvr6_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=6 & Op2_uimm3=4 & dbgbvr6_el1 { export dbgbvr6_el1; }
CopReg: dbgbvr7_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=7 & Op2_uimm3=4 & dbgbvr7_el1 { export dbgbvr7_el1; }
CopReg: dbgbvr8_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=8 & Op2_uimm3=4 & dbgbvr8_el1 { export dbgbvr8_el1; }
CopReg: dbgbvr9_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=9 & Op2_uimm3=4 & dbgbvr9_el1 { export dbgbvr9_el1; }
CopReg: dbgbvr10_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=10 & Op2_uimm3=4 & dbgbvr10_el1 { export dbgbvr10_el1; }
CopReg: dbgbvr11_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=11 & Op2_uimm3=4 & dbgbvr11_el1 { export dbgbvr11_el1; }
CopReg: dbgbvr12_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=12 & Op2_uimm3=4 & dbgbvr12_el1 { export dbgbvr12_el1; }
CopReg: dbgbvr13_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=13 & Op2_uimm3=4 & dbgbvr13_el1 { export dbgbvr13_el1; }
CopReg: dbgbvr14_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=14 & Op2_uimm3=4 & dbgbvr14_el1 { export dbgbvr14_el1; }
CopReg: dbgbvr15_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=15 & Op2_uimm3=4 & dbgbvr15_el1 { export dbgbvr15_el1; }
CopReg: dbgbcr0_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=0 & Op2_uimm3=5 & dbgbcr0_el1 { export dbgbcr0_el1; }
CopReg: dbgbcr1_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=1 & Op2_uimm3=5 & dbgbcr1_el1 { export dbgbcr1_el1; }
CopReg: dbgbcr2_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=2 & Op2_uimm3=5 & dbgbcr2_el1 { export dbgbcr2_el1; }
CopReg: dbgbcr3_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=3 & Op2_uimm3=5 & dbgbcr3_el1 { export dbgbcr3_el1; }
CopReg: dbgbcr4_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=4 & Op2_uimm3=5 & dbgbcr4_el1 { export dbgbcr4_el1; }
CopReg: dbgbcr5_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=5 & Op2_uimm3=5 & dbgbcr5_el1 { export dbgbcr5_el1; }
CopReg: dbgbcr6_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=6 & Op2_uimm3=5 & dbgbcr6_el1 { export dbgbcr6_el1; }
CopReg: dbgbcr7_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=7 & Op2_uimm3=5 & dbgbcr7_el1 { export dbgbcr7_el1; }
CopReg: dbgbcr8_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=8 & Op2_uimm3=5 & dbgbcr8_el1 { export dbgbcr8_el1; }
CopReg: dbgbcr9_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=9 & Op2_uimm3=5 & dbgbcr9_el1 { export dbgbcr9_el1; }
CopReg: dbgbcr10_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=10 & Op2_uimm3=5 & dbgbcr10_el1 { export dbgbcr10_el1; }
CopReg: dbgbcr11_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=11 & Op2_uimm3=5 & dbgbcr11_el1 { export dbgbcr11_el1; }
CopReg: dbgbcr12_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=12 & Op2_uimm3=5 & dbgbcr12_el1 { export dbgbcr12_el1; }
CopReg: dbgbcr13_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=13 & Op2_uimm3=5 & dbgbcr13_el1 { export dbgbcr13_el1; }
CopReg: dbgbcr14_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=14 & Op2_uimm3=5 & dbgbcr14_el1 { export dbgbcr14_el1; }
CopReg: dbgbcr15_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=15 & Op2_uimm3=5 & dbgbcr15_el1 { export dbgbcr15_el1; }
CopReg: dbgwvr0_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=0 & Op2_uimm3=6 & dbgwvr0_el1 { export dbgwvr0_el1; }
CopReg: dbgwvr1_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=1 & Op2_uimm3=6 & dbgwvr1_el1 { export dbgwvr1_el1; }
CopReg: dbgwvr2_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=2 & Op2_uimm3=6 & dbgwvr2_el1 { export dbgwvr2_el1; }
CopReg: dbgwvr3_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=3 & Op2_uimm3=6 & dbgwvr3_el1 { export dbgwvr3_el1; }
CopReg: dbgwvr4_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=4 & Op2_uimm3=6 & dbgwvr4_el1 { export dbgwvr4_el1; }
CopReg: dbgwvr5_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=5 & Op2_uimm3=6 & dbgwvr5_el1 { export dbgwvr5_el1; }
CopReg: dbgwvr6_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=6 & Op2_uimm3=6 & dbgwvr6_el1 { export dbgwvr6_el1; }
CopReg: dbgwvr7_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=7 & Op2_uimm3=6 & dbgwvr7_el1 { export dbgwvr7_el1; }
CopReg: dbgwvr8_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=8 & Op2_uimm3=6 & dbgwvr8_el1 { export dbgwvr8_el1; }
CopReg: dbgwvr9_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=9 & Op2_uimm3=6 & dbgwvr9_el1 { export dbgwvr9_el1; }
CopReg: dbgwvr10_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=10 & Op2_uimm3=6 & dbgwvr10_el1 { export dbgwvr10_el1; }
CopReg: dbgwvr11_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=11 & Op2_uimm3=6 & dbgwvr11_el1 { export dbgwvr11_el1; }
CopReg: dbgwvr12_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=12 & Op2_uimm3=6 & dbgwvr12_el1 { export dbgwvr12_el1; }
CopReg: dbgwvr13_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=13 & Op2_uimm3=6 & dbgwvr13_el1 { export dbgwvr13_el1; }
CopReg: dbgwvr14_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=14 & Op2_uimm3=6 & dbgwvr14_el1 { export dbgwvr14_el1; }
CopReg: dbgwvr15_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=15 & Op2_uimm3=6 & dbgwvr15_el1 { export dbgwvr15_el1; }
CopReg: dbgwcr0_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=0 & Op2_uimm3=7 & dbgwcr0_el1 { export dbgwcr0_el1; }
CopReg: dbgwcr1_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=1 & Op2_uimm3=7 & dbgwcr1_el1 { export dbgwcr1_el1; }
CopReg: dbgwcr2_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=2 & Op2_uimm3=7 & dbgwcr2_el1 { export dbgwcr2_el1; }
CopReg: dbgwcr3_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=3 & Op2_uimm3=7 & dbgwcr3_el1 { export dbgwcr3_el1; }
CopReg: dbgwcr4_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=4 & Op2_uimm3=7 & dbgwcr4_el1 { export dbgwcr4_el1; }
CopReg: dbgwcr5_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=5 & Op2_uimm3=7 & dbgwcr5_el1 { export dbgwcr5_el1; }
CopReg: dbgwcr6_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=6 & Op2_uimm3=7 & dbgwcr6_el1 { export dbgwcr6_el1; }
CopReg: dbgwcr7_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=7 & Op2_uimm3=7 & dbgwcr7_el1 { export dbgwcr7_el1; }
CopReg: dbgwcr8_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=8 & Op2_uimm3=7 & dbgwcr8_el1 { export dbgwcr8_el1; }
CopReg: dbgwcr9_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=9 & Op2_uimm3=7 & dbgwcr9_el1 { export dbgwcr9_el1; }
CopReg: dbgwcr10_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=10 & Op2_uimm3=7 & dbgwcr10_el1 { export dbgwcr10_el1; }
CopReg: dbgwcr11_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=11 & Op2_uimm3=7 & dbgwcr11_el1 { export dbgwcr11_el1; }
CopReg: dbgwcr12_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=12 & Op2_uimm3=7 & dbgwcr12_el1 { export dbgwcr12_el1; }
CopReg: dbgwcr13_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=13 & Op2_uimm3=7 & dbgwcr13_el1 { export dbgwcr13_el1; }
CopReg: dbgwcr14_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=14 & Op2_uimm3=7 & dbgwcr14_el1 { export dbgwcr14_el1; }
CopReg: dbgwcr15_el1 is Op0=2 & Op1_uimm3=0 & CRn=0 & CRm=15 & Op2_uimm3=7 & dbgwcr15_el1 { export dbgwcr15_el1; }
CopReg: mdrar_el1 is Op0=2 & Op1_uimm3=0 & CRn=1 & CRm=0 & Op2_uimm3=0 & mdrar_el1 { export mdrar_el1; }
CopReg: oslar_el1 is Op0=2 & Op1_uimm3=0 & CRn=1 & CRm=0 & Op2_uimm3=4 & oslar_el1 { export oslar_el1; }
CopReg: oslsr_el1 is Op0=2 & Op1_uimm3=0 & CRn=1 & CRm=1 & Op2_uimm3=4 & oslsr_el1 { export oslsr_el1; }
CopReg: osdlr_el1 is Op0=2 & Op1_uimm3=0 & CRn=1 & CRm=3 & Op2_uimm3=4 & osdlr_el1 { export osdlr_el1; }
CopReg: dbgprcr_el1 is Op0=2 & Op1_uimm3=0 & CRn=1 & CRm=4 & Op2_uimm3=4 & dbgprcr_el1 { export dbgprcr_el1; }
CopReg: dbgclaimset_el1 is Op0=2 & Op1_uimm3=0 & CRn=7 & CRm=8 & Op2_uimm3=6 & dbgclaimset_el1 { export dbgclaimset_el1; }
CopReg: dbgclaimclr_el1 is Op0=2 & Op1_uimm3=0 & CRn=7 & CRm=9 & Op2_uimm3=6 & dbgclaimclr_el1 { export dbgclaimclr_el1; }
CopReg: dbgauthstatus_el1 is Op0=2 & Op1_uimm3=0 & CRn=7 & CRm=14 & Op2_uimm3=6 & dbgauthstatus_el1 { export dbgauthstatus_el1; }
CopReg: mdccsr_el0 is Op0=2 & Op1_uimm3=3 & CRn=0 & CRm=1 & Op2_uimm3=0 & mdccsr_el0 { export mdccsr_el0; }
CopReg: dbgdtr_el0 is Op0=2 & Op1_uimm3=3 & CRn=0 & CRm=4 & Op2_uimm3=0 & dbgdtr_el0 { export dbgdtr_el0; }
CopReg: dbgvcr32_el2 is Op0=2 & Op1_uimm3=4 & CRn=0 & CRm=7 & Op2_uimm3=0 & dbgvcr32_el2 { export dbgvcr32_el2; }
# The SysReg document implies that GMID_EL1 can only be read - the doc only provides pseudocode for read access.
# However, the register is in this block (without a required value for 'l') because that might not be fully accurate.
CopReg: gmid_el1 is Op0=3 & Op1_uimm3=1 & CRn=0 & CRm=0 & Op2_uimm3=4 & gmid_el1 { export gmid_el1; }
CopReg: ssbs is Op0=3 & Op1_uimm3=3 & CRn=4 & CRm=2 & Op2_uimm3=6 & ssbs { export ssbs; }
} # with : (l=0 | l=1) {

CopReg: dbgdtrrx_el0 is l=0 & Op0=2 & Op1_uimm3=3 & CRn=0 & CRm=5 & Op2_uimm3=0 & dbgdtrrx_el0 { export dbgdtrrx_el0; }
CopReg: dbgdtrtx_el0 is l=1 & Op0=2 & Op1_uimm3=3 & CRn=0 & CRm=5 & Op2_uimm3=0 & dbgdtrtx_el0 { export dbgdtrtx_el0; }

CopReg: "sreg("^Op0^", "^Op1_uimm3^", c"^CRn^", c"^CRm^", "^Op2_uimm3^")" is l=1 & Op0 & Op1_uimm3 & CRn & CRm & Op2_uimm3 { tmp:8 = UnkSytemRegRead(Op0:1, Op1_uimm3:1, CRn:1, CRm:1, Op2_uimm3:1); export tmp; }
CopReg: "sreg("^Op0^", "^Op1_uimm3^", c"^CRn^", c"^CRm^", "^Op2_uimm3^")" is l=0 & Op0 & Op1_uimm3 & CRn & CRm & Op2_uimm3 & Rt_GPR64 { tmp:8 = UnkSytemRegWrite(Op0:1, Op1_uimm3:1, CRn:1, CRm:1, Op2_uimm3:1, Rt_GPR64); export tmp; }

PState_pstate_op: "DAIFSet" is Op1_uimm3=3 & Op2_uimm3=6 & CRm { daif = (CRm << 6) | daif; }
PState_pstate_op: "DAIFClr" is Op1_uimm3=3 & Op2_uimm3=7 & CRm { tmp:8 = CRm; daif = (~(tmp << 6)) & daif; }
PState_pstate_op: "PState.UAO" is Op1_uimm3=0 & Op2_uimm3=3 & CRm { tmp:8 = CRm; uao = tmp & 1; }
PState_pstate_op: "PState.PAN" is Op1_uimm3=0 & Op2_uimm3=4 & CRm { tmp:8 = CRm; pan = tmp & 1; }
PState_pstate_op: "PState.SP" is Op1_uimm3=0 & Op2_uimm3=5 & CRm { tmp:8 = CRm; spsel = tmp & 1; }
PState_pstate_op: "PState.TCO" is Op1_uimm3=3 & Op2_uimm3=4 & CRm { tmp:8 = CRm; tco = tmp & 1; }
PState_pstate_op: "PState.ALLINT" is Op1_uimm3=1 & Op2_uimm3=0 & b_0911=0 & CRm { tmp:8 = CRm; allint = tmp & 1; }
PState_pstate_op: "PState.DIT" is Op1_uimm3=3 & Op2_uimm3=2 & CRm { tmp:8 = CRm; dit = tmp & 1; }
#PState_pstate_op: "PState.SVCRSM" is Op1_uimm3=3 & Op2_uimm3=3 & b_0911=1 & b_08 { tmp:8 = b_08; svcrsm = tmp & 1; } # see SMSTART/SMSTOP
#PState_pstate_op: "PState.SVCRZA" is Op1_uimm3=3 & Op2_uimm3=3 & b_0911=2 & b_08 { tmp:8 = b_08; svcrza = tmp & 1; } # see SMSTART/SMSTOP
#PState_pstate_op: "PState.SVZRMZA" is Op1_uimm3=3 & Op2_uimm3=3 & b_0911=3 & b_08 { tmp:8 = b_08; svcrsmza = tmp & 1; } # see SMSTART/SMSTOP
PState_pstate_op: "PState.SSBS" is Op1_uimm3=3 & Op2_uimm3=1 & CRm { tmp:8 = CRm; ssbs = tmp & 1; }



# C6.2.228 MRS page C6-1683 line 99588 MATCH xd5300000/mask=xfff00000
# C6.2.379 TSTART page C6-1979 line 116075 MATCH xd5233060/mask=xffffffe0
# C6.2.380 TTEST page C6-1981 line 116175 MATCH xd5233160/mask=xffffffe0
# CONSTRUCT xd5200000/mask=xffe00000 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst xd5200000/mask=xffe00000 --status noqemu

:mrs Rt_GPR64, CopReg
is b_2431=0xd5 & b_2223=0 & l=1 & CopReg & Rt_GPR64
{
	Rt_GPR64 = CopReg;
}

# C6.2.229 MSR (immediate) page C6-1684 line 99649 MATCH xd500401f/mask=xfff8f01f
# CONSTRUCT xd500401f/mask=xfff8f01f MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd500401f/mask=xfff8f01f --status nodest

:msr PState_pstate_op, CRm_uimm4
is b_2431=0xd5 & b_2223=0 & l=0 & Op0=0 & PState_pstate_op & CRn=0x4 & CRm_uimm4 & Rt=0x1f
{
}

# CONSTRUCT xd5000000/mask=xffe00000 DID NOT MATCH ANY DOCUMENTED OPCODE
# AUNIT --inst xd5000000/mask=xffe00000 --status noqemu

:msr CopReg, Rt_GPR64
is b_2431=0xd5 & b_2223=0 & l=0 & CopReg & Rt_GPR64
{
	CopReg = Rt_GPR64;
}

# C6.2.231 MSUB page C6-1689 line 99963 MATCH x1b008000/mask=x7fe08000
# C6.2.219 MNEG page C6-1666 line 98782 MATCH x1b00fc00/mask=x7fe0fc00
# CONSTRUCT x1b008000/mask=xffe08000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x1b008000/mask=xffe08000 --status pass

:msub Rd_GPR32, Rn_GPR32, Rm_GPR32, Ra_GPR32
is sf=0 & op.dp3_op54=0 & b_2428=0x1b & op.dp3_op31=0 & Rm_GPR32 & op.dp3_o0=1 & Ra_GPR32 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp_2:4 = Rn_GPR32 * Rm_GPR32;
	tmp_1:4 = Ra_GPR32 - tmp_2;
	Rd_GPR64 = zext(tmp_1);
}

# C6.2.231 MSUB page C6-1689 line 99963 MATCH x1b008000/mask=x7fe08000
# C6.2.219 MNEG page C6-1666 line 98782 MATCH x1b00fc00/mask=x7fe0fc00
# CONSTRUCT x9b008000/mask=xffe08000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x9b008000/mask=xffe08000 --status pass

:msub Rd_GPR64, Rn_GPR64, Rm_GPR64, Ra_GPR64
is sf=1 & op.dp3_op54=0 & b_2428=0x1b & op.dp3_op31=0 & Rm_GPR64 & op.dp3_o0=1 & Ra_GPR64 & Rn_GPR64 & Rd_GPR64
{
	tmp_2:8 = Rn_GPR64 * Rm_GPR64;
	tmp_1:8 = Ra_GPR64 - tmp_2;
	Rd_GPR64 = tmp_1;
}

# C6.2.232 MUL page C6-1691 line 100073 MATCH x1b007c00/mask=x7fe0fc00
# C6.2.218 MADD page C6-1664 line 98671 MATCH x1b000000/mask=x7fe08000
# CONSTRUCT x1b007c00/mask=xffe0fc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x1b007c00/mask=xffe0fc00 --status pass

:mul Rd_GPR32, Rn_GPR32, Rm_GPR32
is sf=0 & op.dp3_op54=0 & b_2428=0x1b & op.dp3_op31=0 & Rm_GPR32 & op.dp3_o0=0 & Ra=0x1f & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp_2:4 = Rn_GPR32 * Rm_GPR32;
	Rd_GPR64 = zext(tmp_2);
}

# C6.2.232 MUL page C6-1691 line 100073 MATCH x1b007c00/mask=x7fe0fc00
# C6.2.218 MADD page C6-1664 line 98671 MATCH x1b000000/mask=x7fe08000
# CONSTRUCT x9b007c00/mask=xffe0fc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x9b007c00/mask=xffe0fc00 --status pass

:mul Rd_GPR64, Rn_GPR64, Rm_GPR64
is sf=1 & op.dp3_op54=0 & b_2428=0x1b & op.dp3_op31=0 & Rm_GPR64 & op.dp3_o0=0 & Ra=0x1f & Rn_GPR64 & Rd_GPR64
{
	tmp_2:8 = Rn_GPR64 * Rm_GPR64;
	Rd_GPR64 = tmp_2;
}

# C6.2.233 MVN page C6-1692 line 100146 MATCH x2a2003e0/mask=x7f2003e0
# C6.2.239 ORN (shifted register) page C6-1703 line 100663 MATCH x2a200000/mask=x7f200000
# CONSTRUCT x2a2003e0/mask=xff2003e0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x2a2003e0/mask=xff2003e0 --status pass

:mvn Rd_GPR32, RegShift32Log
is sf=0 & opc=1 & b_2428=0xa & N=1 & RegShift32Log & Rn=0x1f & Rd_GPR32 & Rd_GPR64
{
	tmp_1:4 = ~RegShift32Log;
	Rd_GPR64 = zext(tmp_1);
}

# C6.2.233 MVN page C6-1692 line 100146 MATCH x2a2003e0/mask=x7f2003e0
# C6.2.239 ORN (shifted register) page C6-1703 line 100663 MATCH x2a200000/mask=x7f200000
# CONSTRUCT xaa2003e0/mask=xff2003e0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xaa2003e0/mask=xff2003e0 --status pass

:mvn Rd_GPR64, RegShift64Log
is sf=1 & opc=1 & b_2428=0xa & N=1 & Rm_GPR64 & RegShift64Log & Rn=0x1f & Rd_GPR64
{
	tmp_1:8 = ~RegShift64Log;
	Rd_GPR64 = tmp_1;
}

# C6.2.234 NEG (shifted register) page C6-1694 line 100243 MATCH x4b0003e0/mask=x7f2003e0
# C6.2.358 SUB (shifted register) page C6-1945 line 114221 MATCH x4b000000/mask=x7f200000
# CONSTRUCT x4b0003e0/mask=xff2003e0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x4b0003e0/mask=xff2003e0 --status pass

:neg Rd_GPR32, RegShift32
is sf=0 & op=1 & s=0 & b_2428=0xb & b_2121=0 & RegShift32 & Rn=0x1f & Rd_GPR32 & Rd_GPR64
{
	tmp_2:4 = RegShift32;
	tmp_1:4 = - tmp_2;
	Rd_GPR64 = zext(tmp_1);
}

# C6.2.234 NEG (shifted register) page C6-1694 line 100243 MATCH x4b0003e0/mask=x7f2003e0
# C6.2.358 SUB (shifted register) page C6-1945 line 114221 MATCH x4b000000/mask=x7f200000
# CONSTRUCT xcb0003e0/mask=xff2003e0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xcb0003e0/mask=xff2003e0 --status pass

:neg Rd_GPR64, RegShift64
is sf=1 & op=1 & s=0 & b_2428=0xb & b_2121=0 & RegShift64 & Rn=0x1f & Rd_GPR64
{
	tmp_2:8 = RegShift64;
	tmp_1:8 = - tmp_2;
	Rd_GPR64 = tmp_1;
}

# C6.2.235 NEGS page C6-1696 line 100340 MATCH x6b0003e0/mask=x7f2003e0
# C6.2.64 CMP (shifted register) page C6-1256 line 73623 MATCH x6b00001f/mask=x7f20001f
# C6.2.364 SUBS (shifted register) page C6-1955 line 114807 MATCH x6b000000/mask=x7f200000
# CONSTRUCT x6b0003e0/mask=xff2003e0 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst x6b0003e0/mask=xff2003e0 --status pass --comment "flags"

:negs Rd_GPR32, RegShift32
is sf=0 & op=1 & s=1 & b_2428=0xb & b_2121=0 & RegShift32 & Rn=0x1f & Rd_GPR32 & Rd & Rd_GPR64
{
	tmp_2:4 = RegShift32;
	subflags0(tmp_2);
	tmp_1:4 = 0:4 - tmp_2;
	resultflags(tmp_1);
	Rd_GPR64 = zext(tmp_1);
	affectflags();
}

# C6.2.235 NEGS page C6-1696 line 100340 MATCH x6b0003e0/mask=x7f2003e0
# C6.2.64 CMP (shifted register) page C6-1256 line 73623 MATCH x6b00001f/mask=x7f20001f
# C6.2.364 SUBS (shifted register) page C6-1955 line 114807 MATCH x6b000000/mask=x7f200000
# CONSTRUCT xeb0003e0/mask=xff2003e0 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst xeb0003e0/mask=xff2003e0 --status pass --comment "flags"

:negs Rd_GPR64, RegShift64
is sf=1 & op=1 & s=1 & b_2428=0xb & b_2121=0 & RegShift64 & Rn=0x1f & Rd_GPR64 & Rd
{
	tmp_2:8 = RegShift64;
	subflags0(tmp_2);
	tmp_1:8 = 0:8 - tmp_2;
	resultflags(tmp_1);
	Rd_GPR64 = tmp_1;
	affectflags();
}

# C6.2.236 NGC page C6-1698 line 100437 MATCH x5a0003e0/mask=x7fe0ffe0
# C6.2.265 SBC page C6-1747 line 102973 MATCH x5a000000/mask=x7fe0fc00
# CONSTRUCT x5a0003e0/mask=xffe0ffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x5a0003e0/mask=xffe0ffe0 --status pass --comment "flags"

:ngc Rd_GPR32, Rm_GPR32
is sf=0 & op=1 & s=0 & b_2428=0x1a & b_2123=0 & Rm_GPR32 & opcode2=0x0 & Rn=0x1f & Rd_GPR32 & Rd_GPR64
{
	tmp:4 = Rm_GPR32 + zext(!CY);
	Rd_GPR64 = zext(-tmp);
}

# C6.2.236 NGC page C6-1698 line 100437 MATCH x5a0003e0/mask=x7fe0ffe0
# C6.2.265 SBC page C6-1747 line 102973 MATCH x5a000000/mask=x7fe0fc00
# CONSTRUCT xda0003e0/mask=xffe0ffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xda0003e0/mask=xffe0ffe0 --status pass --comment "flags"

:ngc Rd_GPR64, Rm_GPR64
is sf=1 & op=1 & s=0 & b_2428=0x1a & b_2123=0 & Rm_GPR64 & opcode2=0x0 & Rn=0x1f & Rd_GPR64
{
	tmp:8 = Rm_GPR64 + zext(!CY);
	Rd_GPR64 = -tmp;
}

# C6.2.237 NGCS page C6-1700 line 100524 MATCH x7a0003e0/mask=x7fe0ffe0
# C6.2.266 SBCS page C6-1749 line 103074 MATCH x7a000000/mask=x7fe0fc00
# CONSTRUCT x7a0003e0/mask=xffe0ffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x7a0003e0/mask=xffe0ffe0 --status pass --comment "flags"

:ngcs Rd_GPR32, Rm_GPR32
is sf=0 & op=1 & s=1 & b_2428=0x1a & b_2123=0 & Rn=0x1f & opcode2=0x0 & Rm_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp:4 = Rm_GPR32 + zext(!CY);
	add_with_carry_flags(0,~tmp);
	Rd_GPR64 = zext(-tmp);
	resultflags(Rd_GPR32);
	affectflags();
}

# C6.2.237 NGCS page C6-1700 line 100524 MATCH x7a0003e0/mask=x7fe0ffe0
# C6.2.266 SBCS page C6-1749 line 103074 MATCH x7a000000/mask=x7fe0fc00
# CONSTRUCT xfa0003e0/mask=xffe0ffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xfa0003e0/mask=xffe0ffe0 --status pass --comment "flags"

:ngcs Rd_GPR64, Rm_GPR64
is sf=1 & op=1 & s=1 & b_2428=0x1a & b_2123=0 & Rn=0x1f & opcode2=0x0 & Rm_GPR64 & Rd_GPR64
{
	tmp:8 = Rm_GPR64 + zext(!CY);
	add_with_carry_flags(0,~tmp);
	Rd_GPR64 = -tmp;
	resultflags(Rd_GPR64);
	affectflags();
}

# C6.2.238 NOP page C6-1702 line 100611 MATCH xd503201f/mask=xffffffff
# C6.2.126 HINT page C6-1480 line 88030 MATCH xd503201f/mask=xfffff01f
# CONSTRUCT xd503201f/mask=xffffffff MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd503201f/mask=xffffffff --status nodest

:nop
is b_2431=0xd5 & b_2223=0 & l=0 & Op0=0 & Op1=3 & CRn=0x2 & imm7Low=0 & Rt=0x1f
{
}

# C6.2.239 ORN (shifted register) page C6-1703 line 100663 MATCH x2a200000/mask=x7f200000
# C6.2.233 MVN page C6-1692 line 100146 MATCH x2a2003e0/mask=x7f2003e0
# CONSTRUCT x2a200000/mask=xff200000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x2a200000/mask=xff200000 --status pass

:orn Rd_GPR32, Rn_GPR32, RegShift32Log
is sf=0 & opc=1 & b_2428=0xa & N=1 & RegShift32Log & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp_3:4 = RegShift32Log;
	tmp_2:4 = tmp_3 ^ -1:4;
	tmp_1:4 = Rn_GPR32 | tmp_2;
	Rd_GPR64 = zext(tmp_1);
}

# C6.2.239 ORN (shifted register) page C6-1703 line 100663 MATCH x2a200000/mask=x7f200000
# C6.2.233 MVN page C6-1692 line 100146 MATCH x2a2003e0/mask=x7f2003e0
# CONSTRUCT xaa200000/mask=xff200000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xaa200000/mask=xff200000 --status pass

:orn Rd_GPR64, Rn_GPR64, RegShift64Log
is sf=1 & opc=1 & b_2428=0xa & N=1 & RegShift64Log & Rn_GPR64 & Rd_GPR64
{
	tmp_3:8= RegShift64Log;
	tmp_2:8 = tmp_3 ^ -1:8;
	tmp_1:8 = Rn_GPR64 | tmp_2;
	Rd_GPR64 = tmp_1;
}

# C6.2.240 ORR (immediate) page C6-1705 line 100779 MATCH x32000000/mask=x7f800000
# C6.2.223 MOV (bitmask immediate) page C6-1673 line 99125 MATCH x320003e0/mask=x7f8003e0
# CONSTRUCT x32000000/mask=xff800000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x32000000/mask=xff800000 --status pass

:orr Rd_GPR32wsp, Rn_GPR32, DecodeWMask32
is sf=0 & opc=1 & b_2428=0x12 & b_2323=0 & DecodeWMask32 & Rn_GPR32 & Rd_GPR32wsp & Rd_GPR64xsp
{
	tmp_1:4 = Rn_GPR32 | DecodeWMask32;
	Rd_GPR64xsp = zext(tmp_1);
}

# C6.2.240 ORR (immediate) page C6-1705 line 100779 MATCH x32000000/mask=x7f800000
# C6.2.223 MOV (bitmask immediate) page C6-1673 line 99125 MATCH x320003e0/mask=x7f8003e0
# CONSTRUCT xb2000000/mask=xff800000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xb2000000/mask=xff800000 --status pass

:orr Rd_GPR64xsp, Rn_GPR64, DecodeWMask64
is sf=1 & opc=1 & b_2428=0x12 & b_2323=0 & DecodeWMask64 & Rn_GPR64 & Rd_GPR64xsp
{
	tmp_1:8 = Rn_GPR64 | DecodeWMask64;
	Rd_GPR64xsp = tmp_1;
}

# C6.2.241 ORR (shifted register) page C6-1707 line 100882 MATCH x2a000000/mask=x7f200000
# C6.2.224 MOV (register) page C6-1675 line 99214 MATCH x2a0003e0/mask=x7fe0ffe0
# CONSTRUCT x2a000000/mask=xff200000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x2a000000/mask=xff200000 --status pass

:orr Rd_GPR32, Rn_GPR32, RegShift32Log
is b_31=0 & b_2430=0b0101010 & b_21=0 & RegShift32Log & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp_2:4 = RegShift32Log;
	tmp_1:4 = Rn_GPR32 | tmp_2;
	Rd_GPR64 = zext(tmp_1);
}

# C6.2.241 ORR (shifted register) page C6-1707 line 100882 MATCH x2a000000/mask=x7f200000
# C6.2.224 MOV (register) page C6-1675 line 99214 MATCH x2a0003e0/mask=x7fe0ffe0
# CONSTRUCT xaa000000/mask=xff200000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xaa000000/mask=xff200000 --status pass

:orr Rd_GPR64, Rn_GPR64, RegShift64Log
is b_31=1 & b_2430=0b0101010 & b_21=0 & RegShift64Log & Rn_GPR64 & Rd_GPR64
{
	tmp_2:8 = RegShift64Log;
	tmp_1:8 = Rn_GPR64 | tmp_2;
	Rd_GPR64 = tmp_1;
}

# C6.2.242 PACDA, PACDZA page C6-1709 line 100996 MATCH xdac10800/mask=xffffdc00
# CONSTRUCT xdac10800/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xdac10800/mask=xfffffc00 --status noqemu
# z == 0 pacda variant

:pacda Rd_GPR64, Rn_GPR64xsp
is pacda__PACpart & b_1431=0b110110101100000100 & b_1012=0b010 & b_13=0 & Rn_GPR64xsp & Rd_GPR64
{
	build pacda__PACpart;
}

# C6.2.242 PACDA, PACDZA page C6-1709 line 100996 MATCH xdac10800/mask=xffffdc00
# CONSTRUCT xdac12be0/mask=xffffffe0 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xdac12be0/mask=xffffffe0 --status noqemu
# z == 1 pacdza variant

:pacdza Rd_GPR64
is pacdza__PACpart & b_1431=0b110110101100000100 & b_1012=0b010 & b_13=1 & b_0509=0b11111 & Rd_GPR64
{
	build pacdza__PACpart;
}

# C6.2.243 PACDB, PACDZB page C6-1710 line 101067 MATCH xdac10c00/mask=xffffdc00
# CONSTRUCT xdac10c00/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xdac10c00/mask=xfffffc00 --status noqemu
# z == 0 pacdb variant

:pacdb Rd_GPR64, Rn_GPR64xsp
is pacdb__PACpart & b_1431=0b110110101100000100 & b_1012=0b011 & b_13=0 & Rn_GPR64xsp & Rd_GPR64
{
	build pacdb__PACpart;
}

# C6.2.243 PACDB, PACDZB page C6-1710 line 101067 MATCH xdac10c00/mask=xffffdc00
# CONSTRUCT xdac12fe0/mask=xffffffe0 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xdac12fe0/mask=xffffffe0 --status noqemu
# z == 1 pacdzb variant

:pacdzb Rd_GPR64
is pacdzb__PACpart & b_1431=0b110110101100000100 & b_1012=0b011 & b_13=1 & b_0509=0b11111 & Rd_GPR64
{
	build pacdzb__PACpart;
}

# C6.2.244 PACGA page C6-1711 line 101138 MATCH x9ac03000/mask=xffe0fc00
# CONSTRUCT x9ac03000/mask=xffe0fc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x9ac03000/mask=xffe0fc00 --status noqemu

:pacga Rd_GPR64, Rn_GPR64, Rm_GPR64xsp
is b_2131=0b10011010110 & b_1015=0b001100 & Rm_GPR64xsp & Rn_GPR64 & Rd_GPR64
{
	# This operation, unlike all other PAC operations, does not put its output in
	# the same register as its first input.  This means that putting a "noclobber"
	# variant on this operation would violate the definition of PACGA.
	Rd_GPR64 = pacga(Rn_GPR64, Rm_GPR64xsp);
}

# C6.2.245 PACIA, PACIA1716, PACIASP, PACIAZ, PACIZA page C6-1712 line 101196 MATCH xdac10000/mask=xffffdc00
# CONSTRUCT xdac10000/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xdac10000/mask=xfffffc00 --status noqemu
# Z == 0 PACIA variant

:pacia Rd_GPR64, Rn_GPR64xsp
is pacia__PACpart & b_1431=0b110110101100000100 & b_1012=0b000 & b_13=0 & Rn_GPR64xsp & Rd_GPR64
{
	build pacia__PACpart;
}

# C6.2.245 PACIA, PACIA1716, PACIASP, PACIAZ, PACIZA page C6-1712 line 101196 MATCH xdac10000/mask=xffffdc00
# CONSTRUCT xdac123e0/mask=xffffffe0 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xdac123e0/mask=xffffffe0 --status noqemu
# Z == 1 && Rn == 11111 PACIZA variant

:paciza Rd_GPR64
is paciza__PACpart & b_1431=0b110110101100000100 & b_1012=0b000 & b_13=1 & b_0509=0b11111 & Rd_GPR64
{
	build paciza__PACpart;
}

# C6.2.245 PACIA, PACIA1716, PACIASP, PACIAZ, PACIZA page C6-1712 line 101196 MATCH xd503211f/mask=xfffffddf
# C6.2.126 HINT page C6-1480 line 88030 MATCH xd503201f/mask=xfffff01f
# CONSTRUCT xd503211f/mask=xffffffff MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd503211f/mask=xffffffff --status nodest
# CRm == 0001 && op2 == 000 PICIA1716 variant

:pacia1716
is pacia1716__PACpart & b_1231=0b11010101000000110010 & b_0811=0b0001 & b_0507=0b000 & b_0004=0b11111
{
	build pacia1716__PACpart;
}

# C6.2.245 PACIA, PACIA1716, PACIASP, PACIAZ, PACIZA page C6-1712 line 101196 MATCH xd503211f/mask=xfffffddf
# C6.2.126 HINT page C6-1480 line 88030 MATCH xd503201f/mask=xfffff01f
# CONSTRUCT xd503233f/mask=xffffffff MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd503233f/mask=xffffffff --status nodest
# CRm == 0011 && op2 == 001 PACIASP variant

:paciasp
is paciasp__PACpart & PACIXSP_BTITARGETS & b_1231=0b11010101000000110010 & b_0811=0b0011 & b_0507=0b001 & b_0004=0b11111
{
	build paciasp__PACpart;
}

# C6.2.245 PACIA, PACIA1716, PACIASP, PACIAZ, PACIZA page C6-1712 line 101196 MATCH xd503211f/mask=xfffffddf
# C6.2.126 HINT page C6-1480 line 88030 MATCH xd503201f/mask=xfffff01f
# CONSTRUCT xd503231f/mask=xffffffff MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd503231f/mask=xffffffff --status nodest
# CRm == 0011 && op2 == 000 PACIAZ variant

:paciaz
is paciaz__PACpart & b_1231=0b11010101000000110010 & b_0811=0b0011 & b_0507=0b000 & b_0004=0b11111
{
	build paciaz__PACpart;
}

# C6.2.246 PACIB, PACIB1716, PACIBSP, PACIBZ, PACIZB page C6-1715 line 101358 MATCH xdac10400/mask=xffffdc00
# CONSTRUCT xdac10400/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xdac10400/mask=xfffffc00 --status noqemu
# Z == 0 PACIB variant

:pacib Rd_GPR64, Rn_GPR64xsp
is pacib__PACpart & b_1431=0b110110101100000100 & b_1012=0b001 & b_13=0 & Rn_GPR64xsp & Rd_GPR64
{
	build pacib__PACpart;
}

# C6.2.246 PACIB, PACIB1716, PACIBSP, PACIBZ, PACIZB page C6-1715 line 101358 MATCH xdac10400/mask=xffffdc00
# CONSTRUCT xdac127e0/mask=xffffffe0 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xdac127e0/mask=xffffffe0 --status noqemu
# Z == 1 && Rn = 11111 PACIZB variant

:pacizb Rd_GPR64
is pacizb__PACpart & b_1431=0b110110101100000100 & b_1012=0b001 & b_13=1 & b_0509=0b11111 & Rd_GPR64
{
	build pacizb__PACpart;
}

# C6.2.246 PACIB, PACIB1716, PACIBSP, PACIBZ, PACIZB page C6-1715 line 101358 MATCH xd503215f/mask=xfffffddf
# C6.2.126 HINT page C6-1480 line 88030 MATCH xd503201f/mask=xfffff01f
# CONSTRUCT xd503215f/mask=xffffffff MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd503215f/mask=xffffffff --status nodest
# CRm == 0001 && op2 == 010 PACIB1716 variant

:pacib1716
is pacib1716__PACpart & b_1231=0b11010101000000110010 & b_0811=0b0001 & b_0507=0b010 & b_0004=0b11111
{
	build pacib1716__PACpart;
}

# C6.2.246 PACIB, PACIB1716, PACIBSP, PACIBZ, PACIZB page C6-1715 line 101358 MATCH xd503215f/mask=xfffffddf
# C6.2.126 HINT page C6-1480 line 88030 MATCH xd503201f/mask=xfffff01f
# CONSTRUCT xd503237f/mask=xffffffff MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd503237f/mask=xffffffff --status nodest
# CRm == 0011 && op2 == 011 PACIBSP variant

:pacibsp
is pacibsp__PACpart & PACIXSP_BTITARGETS & b_1231=0b11010101000000110010 & b_0811=0b0011 & b_0507=0b011 & b_0004=0b11111
{
	build pacibsp__PACpart;
}

# C6.2.246 PACIB, PACIB1716, PACIBSP, PACIBZ, PACIZB page C6-1715 line 101358 MATCH xd503215f/mask=xfffffddf
# C6.2.126 HINT page C6-1480 line 88030 MATCH xd503201f/mask=xfffff01f
# CONSTRUCT xd503235f/mask=xffffffff MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd503235f/mask=xffffffff --status nodest
# CRm == 0011 && op2 == 010 PACIBZ variant

:pacibz
is pacibz__PACpart & b_1231=0b11010101000000110010 & b_0811=0b0011 & b_0507=0b010 & b_0004=0b11111
{
	build pacibz__PACpart;
}

# C6.2.247 PRFM (immediate) page C6-1718 line 101520 MATCH xf9800000/mask=xffc00000
# CONSTRUCT xf9800000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xf9800000/mask=xffc00000 --status nomem

:prfm aa_prefetch, addrIndexed
is size.ldstr=3 & b_2729=7 & v=0 & b_2425=1 & b_2223=2 & addrIndexed & b_0304 & b_0102 & b_00 & aa_prefetch
{
	addr:8 = addrIndexed;
	hint:1 = b_0304;
	target:1 = b_0102;
	stream:1 = b_00;
	Hint_Prefetch(addr, hint, target, stream);
}

# C6.2.248 PRFM (literal) page C6-1720 line 101616 MATCH xd8000000/mask=xff000000
# CONSTRUCT xd8000000/mask=xff000000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd8000000/mask=xff000000 --status nodest --comment "qemuerr(illegal addresses cause qemu exit)"

:prfm aa_prefetch, Addr19
is size.ldstr=3 & b_2729=3 & v=0 & b_2425=0 & Addr19 & b_0304 & b_0102 & b_00 & aa_prefetch
{
	addr:8 = &Addr19;
	hint:1 = b_0304;
	target:1 = b_0102;
	stream:1 = b_00;
	Hint_Prefetch(addr, hint, target, stream);
}

# C6.2.249 PRFM (register) page C6-1722 line 101700 MATCH xf8a04800/mask=xffe04c00
# CONSTRUCT xf8a00800/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xf8a00800/mask=xffe00c00 --status nomem

:prfm aa_prefetch, addrIndexed
is size.ldstr=3 & b_2729=7 & v=0 & b_2425=0 & b_2223=2 & b_2121=1 & addrIndexed & b_1011=2 & b_0304 & b_0102 & b_00 & aa_prefetch
{
	addr:8 = addrIndexed;
	hint:1 = b_0304;
	target:1 = b_0102;
	stream:1 = b_00;
	Hint_Prefetch(addr, hint, target, stream);
}

# C6.2.250 PRFUM page C6-1724 line 101815 MATCH xf8800000/mask=xffe00c00
# CONSTRUCT xf8800000/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xf8800000/mask=xfffffc00 --status nomem

:prfum aa_prefetch, addr_SIMM9
is size.ldstr=3 & b_2729=7 & v=0 & b_2425=0 & b_2223=2 & b_2121=0 & addr_SIMM9 & simm9=0 & b_1011=0 & b_0304 & b_0102 & b_00 & aa_prefetch
{
	addr:8 = addr_SIMM9;
	hint:1 = b_0304;
	target:1 = b_0102;
	stream:1 = b_00;
	Hint_Prefetch(addr, hint, target, stream);
}

# C6.2.250 PRFUM page C6-1724 line 101815 MATCH xf8800000/mask=xffe00c00
# CONSTRUCT xf8800000/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xf8800000/mask=xffe00c00 --status nomem

:prfum aa_prefetch, addr_SIMM9
is size.ldstr=3 & b_2729=7 & v=0 & b_2425=0 & b_2223=2 & b_2121=0 & addr_SIMM9 & b_1011=0 & b_0304 & b_0102 & b_00 & aa_prefetch
{
	addr:8 = addr_SIMM9;
	hint:1 = b_0304;
	target:1 = b_0102;
	stream:1 = b_00;
	Hint_Prefetch(addr, hint, target, stream);
}

# C6.2.253 RBIT page C6-1728 line 102006 MATCH x5ac00000/mask=x7ffffc00
# CONSTRUCT x5ac00000/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x5ac00000/mask=xfffffc00 --status pass

:rbit Rd_GPR32, Rn_GPR32
is sf=0 & b_3030=1 & S=0 & b_2428=0x1a & b_2123=6 & dp1.opcode2=0x0 & b_1015=0x0 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	# The algorithm swaps 1, 2, 4, 8 bits, ect
	local tmp:4 = Rn_GPR32;
	tmp = (((tmp & 0xaaaaaaaa) >> 1) | ((tmp & 0x55555555) << 1));
	tmp = (((tmp & 0xcccccccc) >> 2) | ((tmp & 0x33333333) << 2));
	tmp = (((tmp & 0xf0f0f0f0) >> 4) | ((tmp & 0x0f0f0f0f) << 4));
	tmp = (((tmp & 0xff00ff00) >> 8) | ((tmp & 0x00ff00ff) << 8));
	tmp = ((tmp >> 16) | (tmp << 16));
	Rd_GPR64 = zext(tmp);
}

# C6.2.253 RBIT page C6-1728 line 102006 MATCH x5ac00000/mask=x7ffffc00
# CONSTRUCT xdac00000/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xdac00000/mask=xfffffc00 --status pass

:rbit Rd_GPR64, Rn_GPR64
is sf=1 & b_3030=1 & S=0 & b_2428=0x1a & b_2123=6 & dp1.opcode2=0x0 & b_1015=0x0 & Rn_GPR64 & Rd_GPR64
{
	# The algorithm swaps 1, 2, 4, 8 bits, ect
	local tmp:8 = Rn_GPR64;
	tmp = (((tmp & 0xaaaaaaaaaaaaaaaa) >> 1) | ((tmp & 0x5555555555555555) << 1));
	tmp = (((tmp & 0xcccccccccccccccc) >> 2) | ((tmp & 0x3333333333333333) << 2));
	tmp = (((tmp & 0xf0f0f0f0f0f0f0f0) >> 4) | ((tmp & 0x0f0f0f0f0f0f0f0f) << 4));
	tmp = (((tmp & 0xff00ff00ff00ff00) >> 8) | ((tmp & 0x00ff00ff00ff00ff) << 8));
	tmp = (((tmp & 0xffff0000ffff0000) >> 16) | ((tmp & 0x0000ffff0000ffff) << 16));
	Rd_GPR64 = ((tmp >> 32) | (tmp << 32));
}

# C6.2.254 RET page C6-1730 line 102090 MATCH xd65f0000/mask=xfffffc1f
# CONSTRUCT xd65f0000/mask=xfffffc1f MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd65f0000/mask=xfffffc1f --status nodest

:ret Rn_GPR64
is b_2531=0x6b & b_2324=0 & b_2122=2 & b_1620=0x1f & b_1015=0 & Rn_GPR64 & b_0004=0
{
	pc = Rn_GPR64;
	return [pc];
}

# C6.2.254 RET page C6-1730 line 102090 MATCH xd65f0000/mask=xfffffc1f
# CONSTRUCT xd65f03c0/mask=xffffffff MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd65f03c0/mask=xffffffff --status nodest

:ret
is b_2531=0x6b & b_2324=0 & b_2122=2 & b_1620=0x1f & b_1015=0 & aa_Xn=30 & b_0004=0
{
	pc = x30;
	return [pc];
}

# C6.2.255 RETAA, RETAB page C6-1731 line 102135 MATCH xd65f0bff/mask=xfffffbff
# CONSTRUCT xd65f0bff/mask=xffffffff MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd65f0bff/mask=xffffffff --status nodest
# M == 0 RETAA variant

:retaa
is retaa__PACpart & b_1131=0b110101100101111100001 & b_0009=0b1111111111 & b_10=0
{
	build retaa__PACpart;
	pc = x30;
	return [pc];
}

# C6.2.255 RETAA, RETAB page C6-1731 line 102135 MATCH xd65f0bff/mask=xfffffbff
# CONSTRUCT xd65f0fff/mask=xffffffff MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd65f0fff/mask=xffffffff --status nodest
# M == 1 RETAB variant

:retab
is retab__PACpart & b_1131=0b110101100101111100001 & b_0009=0b1111111111 & b_10=1
{
	build retab__PACpart;
	pc = x30;
	return [pc];
}

# C6.2.256 REV page C6-1732 line 102201 MATCH x5ac00800/mask=x7ffff800
# CONSTRUCT x5ac00800/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x5ac00800/mask=xfffffc00 --status pass
# sf == 0 && opc == 10 32-bit variant (3210 -> 0123)

:rev Rd_GPR32, Rn_GPR32
is b_1230=0b1011010110000000000 & b_31=0 & b_1011=0b10 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	local tmp:4 = Rn_GPR32;
	tmp = (((tmp & 0xff00ff00) >> 8) | ((tmp & 0x00ff00ff) << 8));
	tmp = ((tmp >> 16) | (tmp << 16));
	Rd_GPR64 = zext(tmp);
}

# C6.2.256 REV page C6-1732 line 102201 MATCH x5ac00800/mask=x7ffff800
# C6.2.259 REV64 page C6-1738 line 102502 MATCH xdac00c00/mask=xfffffc00
# CONSTRUCT xdac00c00/mask=xfffffc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xdac00c00/mask=xfffffc00 --status pass
# sf == 1 && opc == 11 64-bit variant (76543210 -> 01234567)
# NB equivalent to REV64, which is never the preferred disassembly

:rev Rd_GPR64, Rn_GPR64
is b_1230=0b1011010110000000000 & b_31=1 & b_1011=0b11 & Rn_GPR64 & Rd_GPR64
{
	local tmp:8 = Rn_GPR64;
	tmp = (((tmp & 0xff00ff00ff00ff00) >> 8) | ((tmp & 0x00ff00ff00ff00ff) << 8));
	tmp = (((tmp & 0xffff0000ffff0000) >> 16) | ((tmp & 0x0000ffff0000ffff) << 16));
	Rd_GPR64 = ((tmp >> 32) | (tmp << 32));
}

# C6.2.257 REV16 page C6-1734 line 102308 MATCH x5ac00400/mask=x7ffffc00
# CONSTRUCT x5ac00400/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x5ac00400/mask=xfffffc00 --status pass
# sf == 0 (and opc == 01) 32-bit variant (3210 -> 2301)

:rev16 Rd_GPR32, Rn_GPR32
is b_1230=0b1011010110000000000 & b_31=0 & b_1011=0b01 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	local tmp:4 = Rn_GPR32;
	tmp = (((tmp & 0xff00ff00) >> 8) | ((tmp & 0x00ff00ff) << 8));
	Rd_GPR64 = zext(tmp);
}

# C6.2.257 REV16 page C6-1734 line 102308 MATCH x5ac00400/mask=x7ffffc00
# CONSTRUCT xdac00400/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xdac00400/mask=xfffffc00 --status pass
# sf == 1 (and opc=01) 64-bit variant (76543210 -> 67452301)

:rev16 Rd_GPR64, Rn_GPR64
is b_1230=0b1011010110000000000 & b_31=1 & b_1011=0b01 & Rn_GPR64 & Rd_GPR64
{
	local tmp:8 = Rn_GPR64;
	Rd_GPR64 = (((tmp & 0xff00ff00ff00ff00) >> 8) | ((tmp & 0x00ff00ff00ff00ff) << 8));
}

# C6.2.258 REV32 page C6-1736 line 102412 MATCH xdac00800/mask=xfffffc00
# C6.2.256 REV page C6-1732 line 102201 MATCH x5ac00800/mask=x7ffff800
# CONSTRUCT xdac00800/mask=xfffffc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xdac00800/mask=xfffffc00 --status pass
# sf == 1 (and opc == 10) 64-bit variant (76543210 -> 45670123)

:rev32 Rd_GPR64, Rn_GPR64
is b_1230=0b1011010110000000000 & b_31=1 & b_1011=0b10 & Rn_GPR64 & Rd_GPR64
{
	local tmp:8 = Rn_GPR64;
	tmp = (((tmp & 0xff00ff00ff00ff00) >> 8) | ((tmp & 0x00ff00ff00ff00ff) << 8));
	Rd_GPR64 = (((tmp & 0xffff0000ffff0000) >> 16) | ((tmp & 0x0000ffff0000ffff) << 16));
}

# C6.2.260 RMIF page C6-1739 line 102566 MATCH xba000400/mask=xffe07c10
# CONSTRUCT xba000400/mask=xffe07c10 MATCHED 1 DOCUMENTED OPCODES

:rmif Rn_GPR64, UImm6, NZCVImm_uimm4
is b_2131=0b10111010000 & b_1014=0b00001 & b_04=0b0 & Rn_GPR64 & UImm6 & NZCVImm_uimm4
{
	tmp:8 = Rn_GPR64 >> UImm6;
	condMask:1 = NZCVImm_uimm4;
	set_NZCV(tmp,condMask);
}

# C6.2.261 ROR (immediate) page C6-1740 line 102633 MATCH x13800000/mask=x7fa00000
# C6.2.124 EXTR page C6-1477 line 87864 MATCH x13800000/mask=x7fa00000
# CONSTRUCT x13800000/mask=xffe00000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x13800000/mask=xffe00000 --status pass

:ror Rd_GPR32, Rn_GPR32, LSB_bitfield32_imm
is sf=0 & b_2930=0 & b_2428=0x13 & b_2323=1 & n=0 & b_21=0 & Rn=Rm & Rm_GPR32 & LSB_bitfield32_imm & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	result:4 = (Rn_GPR32 >> LSB_bitfield32_imm) | (Rn_GPR32 << (32 - LSB_bitfield32_imm));
	Rd_GPR64 = zext(result);
}

# C6.2.261 ROR (immediate) page C6-1740 line 102633 MATCH x13800000/mask=x7fa00000
# C6.2.124 EXTR page C6-1477 line 87864 MATCH x13800000/mask=x7fa00000
# CONSTRUCT x93c00000/mask=xffe00000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x93c00000/mask=xffe00000 --status pass

:ror Rd_GPR64, Rn_GPR64, LSB_bitfield64_imm
is sf=1 & b_2930=0 & b_2428=0x13 & b_2323=1 & n=1 & b_21=0 & Rn=Rm & Rm_GPR64 & LSB_bitfield64_imm & Rn_GPR64 & Rd_GPR64
{
	result:8 = (Rn_GPR64 >> LSB_bitfield64_imm) | (Rn_GPR64 << (64 - LSB_bitfield64_imm));
	Rd_GPR64 = result;
}

# C6.2.262 ROR (register) page C6-1742 line 102726 MATCH x1ac02c00/mask=x7fe0fc00
# C6.2.263 RORV page C6-1744 line 102821 MATCH x1ac02c00/mask=x7fe0fc00
# CONSTRUCT x1ac02c00/mask=xffe0fc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x1ac02c00/mask=xffe0fc00 --status pass

:ror Rd_GPR32, Rn_GPR32, Rm_GPR32
is sf=0 & b_3030=0 & S=0 & b_2428=0x1a & b_2123=6 & Rm_GPR32 & b_1015=0xb & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	rval:4 = Rm_GPR32 & 0x1f;
	tmp_1:4 = ( Rn_GPR32 >> rval) | ( Rn_GPR32 << ( 32 - rval ) );
	Rd_GPR64 = zext(tmp_1);
}

# C6.2.262 ROR (register) page C6-1742 line 102726 MATCH x1ac02c00/mask=x7fe0fc00
# C6.2.263 RORV page C6-1744 line 102821 MATCH x1ac02c00/mask=x7fe0fc00
# CONSTRUCT x9ac02c00/mask=xffe0fc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x9ac02c00/mask=xffe0fc00 --status pass

:ror Rd_GPR64, Rn_GPR64, Rm_GPR64
is sf=1 & b_3030=0 & S=0 & b_2428=0x1a & b_2123=6 & Rm_GPR64 & b_1015=0xb & Rn_GPR64 & Rd_GPR64
{
	rval:8 = Rm_GPR64 & 0x3f;
	tmp_1:8 = ( Rn_GPR64 >> rval ) | ( Rn_GPR64 << ( 64 - rval ) );
	Rd_GPR64 = tmp_1;
}

# C6.2.264 SB page C6-1746 line 102913 MATCH xd50330ff/mask=xfffff0ff
# CONSTRUCT xd50330ff/mask=xfffff0ff MATCHED 1 DOCUMENTED OPCODES

:sb
is b_1231=0xd5033 & b_0007=0xff
{
	SpeculationBarrier();
}

# C6.2.265 SBC page C6-1747 line 102973 MATCH x5a000000/mask=x7fe0fc00
# C6.2.236 NGC page C6-1698 line 100437 MATCH x5a0003e0/mask=x7fe0ffe0
# CONSTRUCT x5a000000/mask=xffe0fc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x5a000000/mask=xffe0fc00 --status pass --comment "flags"

:sbc Rd_GPR32, Rn_GPR32, Rm_GPR32
is sf=0 & op=1 & s=0 & b_2428=0x1a & b_2123=0 & Rm_GPR32 & opcode2=0x0 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp:4 = Rm_GPR32 + zext(!CY);
	Rd_GPR64 = zext(Rn_GPR32 - tmp);
}

# C6.2.265 SBC page C6-1747 line 102973 MATCH x5a000000/mask=x7fe0fc00
# C6.2.236 NGC page C6-1698 line 100437 MATCH x5a0003e0/mask=x7fe0ffe0
# CONSTRUCT xda000000/mask=xffe0fc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xda000000/mask=xffe0fc00 --status pass --comment "flags"

:sbc Rd_GPR64, Rn_GPR64, Rm_GPR64
is sf=1 & op=1 & s=0 & b_2428=0x1a & b_2123=0 & Rm_GPR64 & opcode2=0x0 & Rn_GPR64 & Rd_GPR64
{
	tmp:8 = Rm_GPR64 + zext(!CY);
	Rd_GPR64 = Rn_GPR64 - tmp;
}

# C6.2.266 SBCS page C6-1749 line 103074 MATCH x7a000000/mask=x7fe0fc00
# C6.2.237 NGCS page C6-1700 line 100524 MATCH x7a0003e0/mask=x7fe0ffe0
# CONSTRUCT x7a000000/mask=xffe0fc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x7a000000/mask=xffe0fc00 --status pass --comment "flags"

:sbcs Rd_GPR32, Rn_GPR32, Rm_GPR32
is sf=0 & op=1 & s=1 & b_2428=0x1a & b_2123=0 & Rm_GPR32 & opcode2=0x0 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp:4 = Rm_GPR32 + zext(!CY);
	add_with_carry_flags(Rn_GPR32, ~Rm_GPR32);
	Rd_GPR64 = zext(Rn_GPR32 - tmp);
	resultflags(Rd_GPR32);
	affectflags();
}

# C6.2.266 SBCS page C6-1749 line 103074 MATCH x7a000000/mask=x7fe0fc00
# C6.2.237 NGCS page C6-1700 line 100524 MATCH x7a0003e0/mask=x7fe0ffe0
# CONSTRUCT xfa000000/mask=xffe0fc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xfa000000/mask=xffe0fc00 --status pass --comment "flags"

:sbcs Rd_GPR64, Rn_GPR64, Rm_GPR64
is sf=1 & op=1 & s=1 & b_2428=0x1a & b_2123=0 & Rm_GPR64 & opcode2=0x0 & Rn_GPR64 & Rd_GPR64
{
	tmp:8 = Rm_GPR64 + zext(!CY);
	add_with_carry_flags(Rn_GPR64, ~Rm_GPR64);
	Rd_GPR64 = Rn_GPR64 - tmp;
	resultflags(Rd_GPR64);
	affectflags();
}

# C6.2.209 SBFIZ page C6-856 line 49751 KEEPWITH

sbfiz_lsb: "#"^imm is ImmR [ imm = 32 - ImmR; ] { export *[const]:4 imm; }
sbfiz_width: "#"^imm is ImmS [ imm = ImmS + 1; ] { export *[const]:4 imm; }
sbfiz_lsb64: "#"^imm is ImmR [ imm = 64 - ImmR; ] { export *[const]:4 imm; }

# C6.2.267 SBFIZ page C6-1751 line 103178 MATCH x13000000/mask=x7f800000
# C6.2.17 ASR (immediate) page C6-1175 line 69498 MATCH x13007c00/mask=x7f807c00
# C6.2.268 SBFM page C6-1753 line 103272 MATCH x13000000/mask=x7f800000
# C6.2.269 SBFX page C6-1756 line 103421 MATCH x13000000/mask=x7f800000
# C6.2.369 SXTB page C6-1964 line 115324 MATCH x13001c00/mask=x7fbffc00
# C6.2.370 SXTH page C6-1966 line 115411 MATCH x13003c00/mask=x7fbffc00
# CONSTRUCT x13000002/mask=xffe08006 MATCHED 6 DOCUMENTED OPCODES
# AUNIT --inst x13000002/mask=xffe08006 --status pass
# Special alias case of sbfm for when ImmS < ImmR-1
# if sf == '0' && (N != '0' || immr<5> != '0' || imms<5> != '0') then ReservedValue();

:sbfiz Rd_GPR32, Rn_GPR32, sbfiz_lsb, sbfiz_width
is sbfiz_lsb & sbfiz_width & ImmS_LT_ImmR=1 & ImmS_EQ_ImmR=0 & sf=0 & opc=0 & b_2428=0x13 & b_2323=0 & n=0 & b_21=0 & b_15=0 & ImmRConst32 & ImmSConst32 & DecodeWMask32 & DecodeTMask32 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	local wmask:4 = DecodeWMask32;
	local tmask:4 = DecodeTMask32;
	local src:4 = Rn_GPR32;
	local bot:4 = ((src>>ImmRConst32)|(src<<(32-ImmRConst32))) & wmask;
	local top:4 = (((src>>ImmSConst32)&0x1)*(-1))&0xffffffff;
	Rd_GPR64 = zext((top & ~(tmask)) | (bot & tmask));
}

# C6.2.267 SBFIZ page C6-1751 line 103178 MATCH x13000000/mask=x7f800000
# C6.2.17 ASR (immediate) page C6-1175 line 69498 MATCH x13007c00/mask=x7f807c00
# C6.2.268 SBFM page C6-1753 line 103272 MATCH x13000000/mask=x7f800000
# C6.2.269 SBFX page C6-1756 line 103421 MATCH x13000000/mask=x7f800000
# C6.2.369 SXTB page C6-1964 line 115324 MATCH x13001c00/mask=x7fbffc00
# C6.2.370 SXTH page C6-1966 line 115411 MATCH x13003c00/mask=x7fbffc00
# C6.2.371 SXTW page C6-1968 line 115498 MATCH x93407c00/mask=xfffffc00
# CONSTRUCT x93400002/mask=xffc00006 MATCHED 7 DOCUMENTED OPCODES
# AUNIT --inst x93400002/mask=xffc00006 --status pass
# Special alias case of sbfm for when ImmS < ImmR-1

:sbfiz Rd_GPR64, Rn_GPR64, sbfiz_lsb64, sbfiz_width
is sbfiz_lsb64 & sbfiz_width & ImmS_LT_ImmR=1 & ImmS_EQ_ImmR=0 & sf=1 & opc=0 & b_2428=0x13 & b_2323=0 & n=1 & ImmRConst64 & ImmSConst64 & DecodeWMask64 & DecodeTMask64 & Rn_GPR64 & Rd_GPR64
{
	local wmask:8 = DecodeWMask64;
	local tmask:8 = DecodeTMask64;
	local src:8 = Rn_GPR64;
	local bot:8 = ((src>>ImmRConst64)|(src<<(64-ImmRConst64))) & wmask;
	local top:8 = ((src>>ImmSConst64)&0x1)*(-1);
	Rd_GPR64 = (top & ~(tmask)) | (bot & tmask);
}

# C6.2.268 SBFM page C6-1753 line 103272 MATCH x13000000/mask=x7f800000
# C6.2.17 ASR (immediate) page C6-1175 line 69498 MATCH x13007c00/mask=x7f807c00
# C6.2.267 SBFIZ page C6-1751 line 103178 MATCH x13000000/mask=x7f800000
# C6.2.269 SBFX page C6-1756 line 103421 MATCH x13000000/mask=x7f800000
# C6.2.369 SXTB page C6-1964 line 115324 MATCH x13001c00/mask=x7fbffc00
# C6.2.370 SXTH page C6-1966 line 115411 MATCH x13003c00/mask=x7fbffc00
# CONSTRUCT x13000000/mask=xffe08000 MATCHED 6 DOCUMENTED OPCODES
# AUNIT --inst x13000000/mask=xffe08000 --status pass
# if sf == '0' && (N != '0' || immr<5> != '0' || imms<5> != '0') then ReservedValue();

:sbfm Rd_GPR32, Rn_GPR32, ImmRConst32, ImmSConst32
is sf=0 & opc=0 & b_2428=0x13 & b_2323=0 & n=0 & b_21=0 & b_15=0 & ImmRConst32 & ImmSConst32 & DecodeWMask32 & DecodeTMask32 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	local wmask:4 = DecodeWMask32;
	local tmask:4 = DecodeTMask32;
	local src:4 = Rn_GPR32;
	local bot:4 = ((src>>ImmRConst32)|(src<<(32-ImmRConst32))) & wmask;
	local top:4 = (((src>>ImmSConst32)&0x1)*(-1))&0xffffffff;
	Rd_GPR64 = zext((top & ~(tmask)) | (bot & tmask));
}

# C6.2.268 SBFM page C6-1753 line 103272 MATCH x13000000/mask=x7f800000
# C6.2.17 ASR (immediate) page C6-1175 line 69498 MATCH x13007c00/mask=x7f807c00
# C6.2.267 SBFIZ page C6-1751 line 103178 MATCH x13000000/mask=x7f800000
# C6.2.269 SBFX page C6-1756 line 103421 MATCH x13000000/mask=x7f800000
# C6.2.369 SXTB page C6-1964 line 115324 MATCH x13001c00/mask=x7fbffc00
# C6.2.370 SXTH page C6-1966 line 115411 MATCH x13003c00/mask=x7fbffc00
# C6.2.371 SXTW page C6-1968 line 115498 MATCH x93407c00/mask=xfffffc00
# CONSTRUCT x93400000/mask=xffc00000 MATCHED 7 DOCUMENTED OPCODES
# AUNIT --inst x93400000/mask=xffc00000 --status pass

:sbfm Rd_GPR64, Rn_GPR64, ImmRConst64, ImmSConst64
is sf=1 & opc=0 & b_2428=0x13 & b_2323=0 & n=1 & ImmRConst64 & ImmSConst64 & DecodeWMask64 & DecodeTMask64 & Rn_GPR64 & Rd_GPR64
{
	local wmask:8 = DecodeWMask64;
	local tmask:8 = DecodeTMask64;
	local src:8 = Rn_GPR64;
	local bot:8 = ((src>>ImmRConst64)|(src<<(64-ImmRConst64))) & wmask;
	local top:8 = ((src>>ImmSConst64)&0x1)*(-1);
	Rd_GPR64 = (top & ~(tmask)) | (bot & tmask);
}

# C6.2.269 SBFX page C6-1756 line 103421 MATCH x13000000/mask=x7f800000
# C6.2.17 ASR (immediate) page C6-1175 line 69498 MATCH x13007c00/mask=x7f807c00
# C6.2.267 SBFIZ page C6-1751 line 103178 MATCH x13000000/mask=x7f800000
# C6.2.268 SBFM page C6-1753 line 103272 MATCH x13000000/mask=x7f800000
# C6.2.369 SXTB page C6-1964 line 115324 MATCH x13001c00/mask=x7fbffc00
# C6.2.370 SXTH page C6-1966 line 115411 MATCH x13003c00/mask=x7fbffc00
# CONSTRUCT x13000004/mask=xffe08006 MATCHED 6 DOCUMENTED OPCODES
# AUNIT --inst x13000004/mask=xffe08006 --status pass
# Special cases when just getting the 0 bit
# >> Not sure about the above old comment one, this is actually for getting one bit from Rn
# SBFX alias of SMFM is used when ImmS >= ImmR
# We split the '>=' into two separate cases
# Here ImmS = ImmR (for 32-bit)
# Alias for sbfm as determined by BFXPreferred()
# if sf == '0' && (N != '0' || immr<5> != '0' || imms<5> != '0') then ReservedValue();

:sbfx Rd_GPR32, Rn_GPR32, ImmRConst32, BFextractWidth32
is ImmS_LT_ImmR=0 & ImmS_EQ_ImmR=1 & sf=0 & opc=0 & b_2428=0x13 & b_2323=0 & n=0 & b_21=0 & b_15=0 & ImmRConst32 & BFextractWidth32 & ImmSConst32 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp:4 = ((Rn_GPR32 >> ImmSConst32) & 0x1) * 0xffffffff;
	Rd_GPR64 = zext(tmp);
}

# C6.2.269 SBFX page C6-1756 line 103421 MATCH x13000000/mask=x7f800000
# C6.2.17 ASR (immediate) page C6-1175 line 69498 MATCH x13007c00/mask=x7f807c00
# C6.2.267 SBFIZ page C6-1751 line 103178 MATCH x13000000/mask=x7f800000
# C6.2.268 SBFM page C6-1753 line 103272 MATCH x13000000/mask=x7f800000
# C6.2.369 SXTB page C6-1964 line 115324 MATCH x13001c00/mask=x7fbffc00
# C6.2.370 SXTH page C6-1966 line 115411 MATCH x13003c00/mask=x7fbffc00
# C6.2.371 SXTW page C6-1968 line 115498 MATCH x93407c00/mask=xfffffc00
# CONSTRUCT x93400004/mask=xffc00006 MATCHED 7 DOCUMENTED OPCODES
# AUNIT --inst x93400004/mask=xffc00006 --status pass
# Now, the case where ImmS = ImmR (for 64-bit)

:sbfx Rd_GPR64, Rn_GPR64, ImmRConst64, BFextractWidth64
is ImmS_LT_ImmR=0 & ImmS_EQ_ImmR=1 & sf=1 & opc=0 & b_2428=0x13 & b_2323=0 & n=1 & BFextractWidth64 & ImmRConst64 & ImmSConst64 & Rn_GPR64 & Rd_GPR64
{
	tmp:8 = ((Rn_GPR64 >> ImmSConst64) & 0x1) * 0xffffffffffffffff;
	Rd_GPR64 = tmp;
}

# C6.2.269 SBFX page C6-1756 line 103421 MATCH x13000000/mask=x7f800000
# C6.2.17 ASR (immediate) page C6-1175 line 69498 MATCH x13007c00/mask=x7f807c00
# C6.2.267 SBFIZ page C6-1751 line 103178 MATCH x13000000/mask=x7f800000
# C6.2.268 SBFM page C6-1753 line 103272 MATCH x13000000/mask=x7f800000
# C6.2.369 SXTB page C6-1964 line 115324 MATCH x13001c00/mask=x7fbffc00
# C6.2.370 SXTH page C6-1966 line 115411 MATCH x13003c00/mask=x7fbffc00
# CONSTRUCT x13000000/mask=xffe08006 MATCHED 6 DOCUMENTED OPCODES
# AUNIT --inst x13000000/mask=xffe08006 --status pass
# Now, the case where ImmS > ImmR (for 32-bit)
# if sf == '0' && (N != '0' || immr<5> != '0' || imms<5> != '0') then ReservedValue();

:sbfx Rd_GPR32, Rn_GPR32, ImmRConst32, BFextractWidth32
is ImmS_EQ_ImmR=0 & ImmS_LT_ImmR=0 & sf=0 & opc=0 & b_2428=0x13 & b_2323=0 & n=0 & b_21=0 & b_15=0 & ImmRConst32 & BFextractWidth32 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	src:4 = Rn_GPR32;
	tmp:4 = src << (31 - (ImmRConst32 + BFextractWidth32 - 1));
	tmp = tmp s>> (32 - BFextractWidth32);
	Rd_GPR64 = zext(tmp);
}

# C6.2.269 SBFX page C6-1756 line 103421 MATCH x13000000/mask=x7f800000
# C6.2.17 ASR (immediate) page C6-1175 line 69498 MATCH x13007c00/mask=x7f807c00
# C6.2.267 SBFIZ page C6-1751 line 103178 MATCH x13000000/mask=x7f800000
# C6.2.268 SBFM page C6-1753 line 103272 MATCH x13000000/mask=x7f800000
# C6.2.369 SXTB page C6-1964 line 115324 MATCH x13001c00/mask=x7fbffc00
# C6.2.370 SXTH page C6-1966 line 115411 MATCH x13003c00/mask=x7fbffc00
# C6.2.371 SXTW page C6-1968 line 115498 MATCH x93407c00/mask=xfffffc00
# CONSTRUCT x93400000/mask=xffc00000 MATCHED 7 DOCUMENTED OPCODES
# AUNIT --inst x93400000/mask=xffc00000 --status pass
# Finally, the case where ImmS > ImmR (for 64-bit)

:sbfx Rd_GPR64, Rn_GPR64, ImmRConst64, BFextractWidth64
is sf=1 & opc=0 & b_2428=0x13 & b_2323=0 & n=1 & ImmRConst64 & BFextractWidth64 & (ImmS_EQ_ImmR=0 & ImmS_LT_ImmR=0) & Rn_GPR64 & Rd_GPR64
{
	src:8 = Rn_GPR64;
	tmp:8 = src << (63 - (ImmRConst64 + BFextractWidth64 - 1));
	tmp = tmp s>> (64 - BFextractWidth64);
	Rd_GPR64 = tmp;
}

# C6.2.270 SDIV page C6-1758 line 103515 MATCH x1ac00c00/mask=x7fe0fc00
# CONSTRUCT x1ac00c00/mask=xffe0fc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x1ac00c00/mask=xffe0fc00 --status pass

:sdiv Rd_GPR32, Rn_GPR32, Rm_GPR32
is sf=0 & b_3030=0 & S=0 & b_2428=0x1a & b_2123=6 & Rm_GPR32 & b_1015=0x3 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	local tmp_1:4 = 0;
	if (Rm_GPR32 == 0) goto <zero>;
	tmp_1 = Rn_GPR32 s/ Rm_GPR32;
<zero>
	Rd_GPR64 = zext(tmp_1);
}

# C6.2.270 SDIV page C6-1758 line 103515 MATCH x1ac00c00/mask=x7fe0fc00
# CONSTRUCT x9ac00c00/mask=xffe0fc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x9ac00c00/mask=xffe0fc00 --status pass

:sdiv Rd_GPR64, Rn_GPR64, Rm_GPR64
is sf=1 & b_3030=0 & S=0 & b_2428=0x1a & b_2123=6 & Rm_GPR64 & b_1015=0x3 & Rn_GPR64 & Rd_GPR64
{
	local tmp_1:8 = 0;
	if (Rm_GPR64 == 0) goto <zero>;
	tmp_1 = Rn_GPR64 s/ Rm_GPR64;
<zero>
	Rd_GPR64 = tmp_1;
}


# C6.2.271 SETF8, SETF16 page C6-1759 line 103584 MATCH x3a00080d/mask=xffffbc1f
# CONSTRUCT x3a00080d/mask=xfffffc1f MATCHED 1 DOCUMENTED OPCODES

:setf8 aa_Wn
is b_1531=0b00111010000000000 & b_14=0 & b_1013=0b0010 & b_0004=0b01101 & aa_Wn
{
	NG = ((aa_Wn:1 >> 7) & 1) == 1;
	ZR = (aa_Wn:1 == 0);
	OV = (((aa_Wn >> 7) & 1) ^ ((aa_Wn >>8) & 1)) == 1;
}


# C6.2.271 SETF8, SETF16 page C6-1759 line 103584 MATCH x3a00080d/mask=xffffbc1f
# CONSTRUCT x3a00480d/mask=xfffffc1f MATCHED 1 DOCUMENTED OPCODES

:setf16 aa_Wn
is b_1531=0b00111010000000000 & b_14=1 & b_1013=0b0010 & b_0004=0b01101 & aa_Wn
{
	NG = ((aa_Wn:2 >> 15) & 1) == 1;
	ZR = (aa_Wn:2 == 0);
	OV = (((aa_Wn >> 15) & 1) ^ ((aa_Wn >>16) & 1)) == 1;
}




# C6.2.276 SETP, SETM, SETE page C6-1780 line 105072 MATCH x19c00400/mask=x3fe03c00
# C6.2.272 SETGP, SETGM, SETGE page C6-1760 line 103652 MATCH x1dc00400/mask=x3fe03c00
# CONSTRUCT x1dc00400/mask=x3fe03c00 MATCHED 5 DOCUMENTED OPCODES

setPhase:"p" is b_1415=0 {export 0:1;}
setPhase:"m" is b_1415=1 {export 1:1;}
setPhase:"e" is b_1415=2 {export 2:1;}

setType: ""		is b_1013=0x1 {export 1:1; }
setType: "n"	is b_1013=0x9 {export 9:1; }
setType: "t"	is b_1013=0x5 {export 5:1; }
setType: "tn"	is b_1013=0xd {export 13:1; }

define pcodeop memorySetTag;
:setg^setPhase^setType [Rd_GPR64]!, Rn_GPR64!, Rs_GPR64
is size.ldstr & b_2129=0xee & Rs_GPR64 & b_1415 <3 & setPhase & setType & Rn_GPR64 & Rd_GPR64 {
	memorySetTag(Rd_GPR64, Rn_GPR64, Rs_GPR64, setPhase, setType);
}


# C6.2.276 SETP, SETM, SETE page C6-1780 line 105072 MATCH x19c00400/mask=x3fe03c00
# CONSTRUCT x19c00400/mask=x3fe03c00 MATCHED 5 DOCUMENTED OPCODES
define pcodeop memorySet;
:setp^setPhase^setType [Rd_GPR64]!, Rn_GPR64!, Rs_GPR64
is size.ldstr & b_2129=0xce & Rs_GPR64 & b_1415 <3 & setPhase & setType & Rn_GPR64 & Rd_GPR64 {
	memorySet(Rd_GPR64, Rn_GPR64, Rs_GPR64, setPhase, setType);
}


# C6.2.280 SEV page C6-1796 line 106224 MATCH xd503209f/mask=xffffffff
# C6.2.126 HINT page C6-1480 line 88030 MATCH xd503201f/mask=xfffff01f
# CONSTRUCT xd503209f/mask=xffffffff MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd503209f/mask=xffffffff --status nodest

:sev
is b_2431=0xd5 & b_2223=0 & l=0 & Op0=0 & Op1=3 & CRn=0x2 & imm7Low=4 & Rt=0x1f
{
	SendEvent();
}

# C6.2.281 SEVL page C6-1797 line 106259 MATCH xd50320bf/mask=xffffffff
# C6.2.126 HINT page C6-1480 line 88030 MATCH xd503201f/mask=xfffff01f
# CONSTRUCT xd50320bf/mask=xffffffff MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50320bf/mask=xffffffff --status nodest

:sevl
is b_2431=0xd5 & b_2223=0 & l=0 & Op0=0 & Op1=3 & CRn=0x2 & imm7Low=5 & Rt=0x1f
{
	SendEventLocally();
}

# C6.2.282 SMADDL page C6-1798 line 106294 MATCH x9b200000/mask=xffe08000
# CONSTRUCT x9b200000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x9b200000/mask=xffe08000 --status pass

:smaddl Rd_GPR64, Rn_GPR32, Rm_GPR32, Ra_GPR64
is sf=1 & op.dp3_op54=0 & b_2428=0x1b & op.dp3_op31=1 & Rm_GPR32 & op.dp3_o0=0 & Ra_GPR64 & Rn_GPR32 & Rd_GPR64
{
	tmp_3:8 = sext(Rn_GPR32);
	tmp_4:8 = sext(Rm_GPR32);
	tmp_2:8 = tmp_3 * tmp_4;
	tmp_1:8 = Ra_GPR64 + tmp_2;
	Rd_GPR64 = tmp_1;
}

# C6.2.283 SMC page C6-1800 line 106384 MATCH xd4000003/mask=xffe0001f
# CONSTRUCT xd4000003/mask=xffe0001f MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd4000003/mask=xffe0001f --status nodest

:smc imm16
is b_2431=0xd4 & excCode=0 & imm16 & excCode2=0 & ll=3
{
	CallSecureMonitor(imm16:2);
}

# C6.2.284 SMNEGL page C6-1801 line 106433 MATCH x9b20fc00/mask=xffe0fc00
# C6.2.287 SMSUBL page C6-1806 line 106711 MATCH x9b208000/mask=xffe08000
# CONSTRUCT x9b20fc00/mask=xffe0fc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x9b20fc00/mask=xffe0fc00 --status pass

:smnegl Rd_GPR64, Rn_GPR32, Rm_GPR32
is sf=1 & op.dp3_op54=0 & b_2428=0x1b & op.dp3_op31=1 & Rm_GPR32 & op.dp3_o0=1 & Ra=0x1f & Rn_GPR32 & Rd_GPR64
{
	tmp_3:8 = sext(Rn_GPR32);
	tmp_4:8 = sext(Rm_GPR32);
	tmp_2:8 = tmp_3 * tmp_4;
	subflags0(tmp_2);
	tmp_1:8 = -tmp_2;
	Rd_GPR64 = tmp_1;
}

# C6.2.287 SMSUBL page C6-1806 line 106711 MATCH x9b208000/mask=xffe08000
# CONSTRUCT x9b208000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x9b208000/mask=xffe08000 --status pass

:smsubl Rd_GPR64, Rn_GPR32, Rm_GPR32, Ra_GPR64
is sf=1 & op.dp3_op54=0 & b_2428=0x1b & op.dp3_op31=1 & Rm_GPR32 & op.dp3_o0=1 & Ra_GPR64 & Rn_GPR32 & Rd_GPR64
{
	tmp_3:8 = sext(Rn_GPR32);
	tmp_4:8 = sext(Rm_GPR32);
	tmp_2:8 = tmp_3 * tmp_4;
	tmp_1:8 = Ra_GPR64 - tmp_2;
	Rd_GPR64 = tmp_1;
}


# C6.2.285 SMSTART page C6-1802 line 106497 MATCH xd503417f/mask=xfffff9ff
# C6.2.229 MSR (immediate) page C6-1684 line 99649 MATCH xd500401f/mask=xfff8f01f
# CONSTRUCT xd503417f/mask=xfffff9ff MATCHED 2 DOCUMENTED OPCODES
# xd503417f/mask=xfffff9ff NOT MATCHED BY ANY CONSTRUCTOR
# b_0031=110101010000001101000..101111111

define pcodeop sveStreamingModeStart;
define pcodeop sveStreamingModeStop;

SVAmodeOp: "SM" is b_0911=0x1 & b_08 { svcr[0,1] = b_08; }
SVAmodeOp: "ZA" is b_0911=0x2 & b_08 { svcr[1,1] = b_08; }
SVAmodeOp: ""   is b_0911=0x3 & b_08 { svcr[0,1] = b_08; svcr[1,1] = b_08; }

:smstart "{"^SVAmodeOp^"}"
is b_1131=0x1aa068 & SVAmodeOp & b_08=1 & b_0507=0x3 & op4=0x1f {
	build SVAmodeOp;
	sveStreamingModeStart();
}


# C6.2.286 SMSTOP page C6-1804 line 106604 MATCH xd503407f/mask=xfffff9ff
# C6.2.229 MSR (immediate) page C6-1684 line 99649 MATCH xd500401f/mask=xfff8f01f
# CONSTRUCT xd503407f/mask=xfffff9ff MATCHED 2 DOCUMENTED OPCODES
# xd503407f/mask=xfffff9ff NOT MATCHED BY ANY CONSTRUCTOR
# b_0031=110101010000001101000..001111111

:smstop "{"^SVAmodeOp^"}"
is b_1131=0x1aa068 & SVAmodeOp & b_08=0 & b_0507=0x3 & op4=0x1f {
	sveStreamingModeStop();
}


# C6.2.288 SMULH page C6-1808 line 106800 MATCH x9b400000/mask=xffe08000
# CONSTRUCT x9b400000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x9b400000/mask=xffe08000 --status pass
# To enforce SHOULD BE ONE fields add: b_1014=0b11111

:smulh Rd_GPR64, Rn_GPR64, Rm_GPR64
is sf=1 & op.dp3=0 & b_2428=0x1b & op.dp3_op31=2 & Rm_GPR64 & op.dp3_o0=0 & Ra & Rn_GPR64 & Rd_GPR64
{
	local tmpq:16 = sext(Rn_GPR64) * sext(Rm_GPR64);
	Rd_GPR64 = tmpq(8);
}

# C6.2.289 SMULL page C6-1809 line 106867 MATCH x9b207c00/mask=xffe0fc00
# C6.2.282 SMADDL page C6-1798 line 106294 MATCH x9b200000/mask=xffe08000
# CONSTRUCT x9b207c00/mask=xffe0fc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x9b207c00/mask=xffe0fc00 --status pass

:smull Rd_GPR64, Rn_GPR32, Rm_GPR32
is sf=1 & op.dp3_op54=0 & b_2428=0x1b & op.dp3_op31=1 & Rm_GPR32 & op.dp3_o0=0 & Ra=0x1f & Rn_GPR32 & Rd_GPR64
{
	tmp_3:8 = sext(Rn_GPR32);
	tmp_4:8 = sext(Rm_GPR32);
	tmp_2:8 = tmp_3 * tmp_4;
	tmp_1:8 = tmp_2;
	Rd_GPR64 = tmp_1;
}

# C6.2.295 STADDB, STADDLB page C6-1818 line 107383 MATCH x3820001f/mask=xffa0fc1f
# C6.2.298 STCLRB, STCLRLB page C6-1824 line 107670 MATCH x3820101f/mask=xffa0fc1f
# C6.2.301 STEORB, STEORLB page C6-1830 line 107956 MATCH x3820201f/mask=xffa0fc1f
# C6.2.328 STSETB, STSETLB page C6-1886 line 111044 MATCH x3820301f/mask=xffa0fc1f
# C6.2.331 STSMAXB, STSMAXLB page C6-1892 line 111330 MATCH x3820401f/mask=xffa0fc1f
# C6.2.334 STSMINB, STSMINLB page C6-1898 line 111623 MATCH x3820501f/mask=xffa0fc1f
# C6.2.340 STUMAXB, STUMAXLB page C6-1910 line 112231 MATCH x3820601f/mask=xffa0fc1f
# C6.2.343 STUMINB, STUMINLB page C6-1916 line 112525 MATCH x3820701f/mask=xffa0fc1f
# C6.2.133 LDADDB, LDADDAB, LDADDALB, LDADDLB page C6-1489 line 88545 MATCH x38200000/mask=xff20fc00
# C6.2.152 LDCLRB, LDCLRAB, LDCLRALB, LDCLRLB page C6-1524 line 90495 MATCH x38201000/mask=xff20fc00
# C6.2.155 LDEORB, LDEORAB, LDEORALB, LDEORLB page C6-1531 line 90916 MATCH x38202000/mask=xff20fc00
# C6.2.181 LDSETB, LDSETAB, LDSETALB, LDSETLB page C6-1590 line 94403 MATCH x38203000/mask=xff20fc00
# C6.2.184 LDSMAXB, LDSMAXAB, LDSMAXALB, LDSMAXLB page C6-1597 line 94824 MATCH x38204000/mask=xff20fc00
# C6.2.187 LDSMINB, LDSMINAB, LDSMINALB, LDSMINLB page C6-1604 line 95245 MATCH x38205000/mask=xff20fc00
# C6.2.196 LDUMAXB, LDUMAXAB, LDUMAXALB, LDUMAXLB page C6-1623 line 96362 MATCH x38206000/mask=xff20fc00
# C6.2.199 LDUMINB, LDUMINAB, LDUMINALB, LDUMINLB page C6-1630 line 96783 MATCH x38207000/mask=xff20fc00
# CONSTRUCT x3820001f/mask=xffa08c1f MATCHED 16 DOCUMENTED OPCODES
# AUNIT --inst x3820001f/mask=xffa08c1f --status nomem

# size=0b00 (3031)

:st^ls_opc1^ls_lor^"b" aa_Ws, [Rn_GPR64xsp]
is b_3031=0b00 & b_2429=0b111000 & b_23=0 & b_21=1 & b_1515=0 & b_1011=0b00 & b_0004=0b11111 & ls_opc1 & ls_lor & aa_Ws & Rn_GPR64xsp
{ build ls_opc1; build ls_lor; }

# C6.2.296 STADDH, STADDLH page C6-1820 line 107469 MATCH x7820001f/mask=xffa0fc1f
# C6.2.299 STCLRH, STCLRLH page C6-1826 line 107756 MATCH x7820101f/mask=xffa0fc1f
# C6.2.302 STEORH, STEORLH page C6-1832 line 108042 MATCH x7820201f/mask=xffa0fc1f
# C6.2.329 STSETH, STSETLH page C6-1888 line 111130 MATCH x7820301f/mask=xffa0fc1f
# C6.2.332 STSMAXH, STSMAXLH page C6-1894 line 111419 MATCH x7820401f/mask=xffa0fc1f
# C6.2.335 STSMINH, STSMINLH page C6-1900 line 111712 MATCH x7820501f/mask=xffa0fc1f
# C6.2.341 STUMAXH, STUMAXLH page C6-1912 line 112320 MATCH x7820601f/mask=xffa0fc1f
# C6.2.344 STUMINH, STUMINLH page C6-1918 line 112614 MATCH x7820701f/mask=xffa0fc1f
# C6.2.134 LDADDH, LDADDAH, LDADDALH, LDADDLH page C6-1491 line 88670 MATCH x78200000/mask=xff20fc00
# C6.2.153 LDCLRH, LDCLRAH, LDCLRALH, LDCLRLH page C6-1526 line 90621 MATCH x78201000/mask=xff20fc00
# C6.2.156 LDEORH, LDEORAH, LDEORALH, LDEORLH page C6-1533 line 91042 MATCH x78202000/mask=xff20fc00
# C6.2.182 LDSETH, LDSETAH, LDSETALH, LDSETLH page C6-1592 line 94529 MATCH x78203000/mask=xff20fc00
# C6.2.185 LDSMAXH, LDSMAXAH, LDSMAXALH, LDSMAXLH page C6-1599 line 94950 MATCH x78204000/mask=xff20fc00
# C6.2.188 LDSMINH, LDSMINAH, LDSMINALH, LDSMINLH page C6-1606 line 95371 MATCH x78205000/mask=xff20fc00
# C6.2.197 LDUMAXH, LDUMAXAH, LDUMAXALH, LDUMAXLH page C6-1625 line 96488 MATCH x78206000/mask=xff20fc00
# C6.2.200 LDUMINH, LDUMINAH, LDUMINALH, LDUMINLH page C6-1632 line 96909 MATCH x78207000/mask=xff20fc00
# CONSTRUCT x7820001f/mask=xffa08c1f MATCHED 16 DOCUMENTED OPCODES
# AUNIT --inst x7820001f/mask=xffa08c1f --status nomem

# size=0b01 (3031)

:st^ls_opc2^ls_lor^"h" aa_Ws, [Rn_GPR64xsp]
is b_3031=0b01 & b_2429=0b111000 & b_23=0 & b_21=1 & b_1515=0 & b_1011=0b00 & b_0004=0b11111 & ls_opc2 & ls_lor & aa_Ws & Rn_GPR64xsp
{ build ls_opc2; build ls_lor; }

# C6.2.297 STADD, STADDL page C6-1822 line 107555 MATCH xb820001f/mask=xbfa0fc1f
# C6.2.300 STCLR, STCLRL page C6-1828 line 107842 MATCH xb820101f/mask=xbfa0fc1f
# C6.2.303 STEOR, STEORL page C6-1834 line 108128 MATCH xb820201f/mask=xbfa0fc1f
# C6.2.330 STSET, STSETL page C6-1890 line 111216 MATCH xb820301f/mask=xbfa0fc1f
# C6.2.333 STSMAX, STSMAXL page C6-1896 line 111508 MATCH xb820401f/mask=xbfa0fc1f
# C6.2.336 STSMIN, STSMINL page C6-1902 line 111801 MATCH xb820501f/mask=xbfa0fc1f
# C6.2.342 STUMAX, STUMAXL page C6-1914 line 112409 MATCH xb820601f/mask=xbfa0fc1f
# C6.2.345 STUMIN, STUMINL page C6-1920 line 112703 MATCH xb820701f/mask=xbfa0fc1f
# C6.2.135 LDADD, LDADDA, LDADDAL, LDADDL page C6-1493 line 88796 MATCH xb8200000/mask=xbf20fc00
# C6.2.154 LDCLR, LDCLRA, LDCLRAL, LDCLRL page C6-1528 line 90747 MATCH xb8201000/mask=xbf20fc00
# C6.2.157 LDEOR, LDEORA, LDEORAL, LDEORL page C6-1535 line 91168 MATCH xb8202000/mask=xbf20fc00
# C6.2.183 LDSET, LDSETA, LDSETAL, LDSETL page C6-1594 line 94655 MATCH xb8203000/mask=xbf20fc00
# C6.2.186 LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL page C6-1601 line 95076 MATCH xb8204000/mask=xbf20fc00
# C6.2.189 LDSMIN, LDSMINA, LDSMINAL, LDSMINL page C6-1608 line 95497 MATCH xb8205000/mask=xbf20fc00
# C6.2.198 LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL page C6-1627 line 96614 MATCH xb8206000/mask=xbf20fc00
# C6.2.201 LDUMIN, LDUMINA, LDUMINAL, LDUMINL page C6-1634 line 97035 MATCH xb8207000/mask=xbf20fc00
# CONSTRUCT xb820001f/mask=xffa08c1f MATCHED 16 DOCUMENTED OPCODES
# AUNIT --inst xb820001f/mask=xffa08c1f --status nomem

# size=0b10 (3031)

:st^ls_opc4^ls_lor aa_Ws, [Rn_GPR64xsp]
is b_3031=0b10 & b_2429=0b111000 & b_23=0 & b_21=1 & b_1515=0 & b_1011=0b00 & b_0004=0b11111 & ls_opc4 & ls_lor & aa_Ws & Rn_GPR64xsp
{ build ls_opc4; build ls_lor; }

# C6.2.297 STADD, STADDL page C6-1822 line 107555 MATCH xb820001f/mask=xbfa0fc1f
# C6.2.300 STCLR, STCLRL page C6-1828 line 107842 MATCH xb820101f/mask=xbfa0fc1f
# C6.2.303 STEOR, STEORL page C6-1834 line 108128 MATCH xb820201f/mask=xbfa0fc1f
# C6.2.330 STSET, STSETL page C6-1890 line 111216 MATCH xb820301f/mask=xbfa0fc1f
# C6.2.333 STSMAX, STSMAXL page C6-1896 line 111508 MATCH xb820401f/mask=xbfa0fc1f
# C6.2.336 STSMIN, STSMINL page C6-1902 line 111801 MATCH xb820501f/mask=xbfa0fc1f
# C6.2.342 STUMAX, STUMAXL page C6-1914 line 112409 MATCH xb820601f/mask=xbfa0fc1f
# C6.2.345 STUMIN, STUMINL page C6-1920 line 112703 MATCH xb820701f/mask=xbfa0fc1f
# C6.2.135 LDADD, LDADDA, LDADDAL, LDADDL page C6-1493 line 88796 MATCH xb8200000/mask=xbf20fc00
# C6.2.154 LDCLR, LDCLRA, LDCLRAL, LDCLRL page C6-1528 line 90747 MATCH xb8201000/mask=xbf20fc00
# C6.2.157 LDEOR, LDEORA, LDEORAL, LDEORL page C6-1535 line 91168 MATCH xb8202000/mask=xbf20fc00
# C6.2.183 LDSET, LDSETA, LDSETAL, LDSETL page C6-1594 line 94655 MATCH xb8203000/mask=xbf20fc00
# C6.2.186 LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL page C6-1601 line 95076 MATCH xb8204000/mask=xbf20fc00
# C6.2.189 LDSMIN, LDSMINA, LDSMINAL, LDSMINL page C6-1608 line 95497 MATCH xb8205000/mask=xbf20fc00
# C6.2.198 LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL page C6-1627 line 96614 MATCH xb8206000/mask=xbf20fc00
# C6.2.201 LDUMIN, LDUMINA, LDUMINAL, LDUMINL page C6-1634 line 97035 MATCH xb8207000/mask=xbf20fc00
# CONSTRUCT xf820001f/mask=xffa08c1f MATCHED 16 DOCUMENTED OPCODES
# AUNIT --inst xf820001f/mask=xffa08c1f --status nomem
# size=0b11 (3031)

:st^ls_opc8^ls_lor aa_Xs, [Rn_GPR64xsp]
is b_3031=0b11 & b_2429=0b111000 & b_23=0 & b_21=1 & b_1515=0 & b_1011=0b00 & b_0004=0b11111 & ls_opc8 & ls_lor & aa_Xs & Rn_GPR64xsp
{ build ls_opc8; build ls_lor; }

# C6.2.307 STLLRB page C6-1842 line 108609 MATCH x08800000/mask=xffe08000
# CONSTRUCT x08800000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x08800000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1620=0b11111 & b_1014=0b11111
# size=0b00 (3031)

:stllrb aa_Wt, [Rn_GPR64xsp]
is b_3031=0b00 & b_2329=0b0010001 & b_22=0 & b_21=0 & b_15=0 & aa_Wt & Rn_GPR64xsp
{ *:1 Rn_GPR64xsp = aa_Wt:1; LORelease(); }

# C6.2.308 STLLRH page C6-1843 line 108673 MATCH x48800000/mask=xffe08000
# CONSTRUCT x48800000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x48800000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1620=0b11111 & b_1014=0b11111
# size=0b01 (3031)

:stllrh aa_Wt, [Rn_GPR64xsp]
is b_3031=0b01 & b_2329=0b0010001 & b_22=0 & b_21=0 & b_15=0 & aa_Wt & Rn_GPR64xsp
{ *:2 Rn_GPR64xsp = aa_Wt:2; LORelease(); }

# C6.2.309 STLLR page C6-1844 line 108737 MATCH x88800000/mask=xbfe08000
# CONSTRUCT x88800000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x88800000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1620=0b11111 & b_1014=0b11111
# size=0b10 (3031)

:stllr aa_Wt, [Rn_GPR64xsp]
is b_3031=0b10 & b_2329=0b0010001 & b_22=0 & b_21=0 & b_15=0 & aa_Wt & Rn_GPR64xsp
{ *:4 Rn_GPR64xsp = aa_Wt; LORelease(); }

# C6.2.309 STLLR page C6-1844 line 108737 MATCH x88800000/mask=xbfe08000
# CONSTRUCT xc8800000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xc8800000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1620=0b11111 & b_1014=0b11111
# size=0b11 (3031)

:stllr aa_Xt, [Rn_GPR64xsp]
is b_3031=0b11 & b_2329=0b0010001 & b_22=0 & b_21=0 & b_15=0 & aa_Xt & Rn_GPR64xsp
{ *:8 Rn_GPR64xsp = aa_Xt; LORelease(); }

# C6.2.310 STLR page C6-1846 line 108821 MATCH x88808000/mask=xbfe08000
# CONSTRUCT xc8808000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xc8808000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1620=0b11111 & b_1014=0b11111

:stlr Rt_GPR64, addrReg
is size.ldstr=3 & b_2429=0x8 & b_23=1 & L=0 & b_21=0 & b_15=1 & addrReg & Rt_GPR64
{
	*addrReg = Rt_GPR64;
}

# C6.2.310 STLR page C6-1846 line 108821 MATCH x88808000/mask=xbfe08000
# CONSTRUCT x88808000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x88808000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1620=0b11111 & b_1014=0b11111

:stlr Rt_GPR32, addrReg
is size.ldstr=2 & b_2429=0x8 & b_23=1 & L=0 & b_21=0 & b_15=1 & addrReg & Rt_GPR32
{
	*addrReg = Rt_GPR32;
}

# C6.2.311 STLRB page C6-1848 line 108904 MATCH x08808000/mask=xffe08000
# CONSTRUCT x08808000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x08808000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1620=0b11111 & b_1014=0b11111

:stlrb Rt_GPR32, addrReg
is size.ldstr=0 & b_2429=0x8 & b_23=1 & L=0 & b_21=0 & b_15=1 & addrReg & Rt_GPR32
{
	*addrReg = Rt_GPR32;
}

# C6.2.312 STLRH page C6-1849 line 108967 MATCH x48808000/mask=xffe08000
# CONSTRUCT x48808000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x48808000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1620=0b11111 & b_1014=0b11111

:stlrh Rt_GPR32, addrReg
is size.ldstr=1 & b_2429=0x8 & b_23=1 & L=0 & b_21=0 & b_15=1 & addrReg & Rt_GPR32
{
	*addrReg = Rt_GPR32;
}

# C6.2.313 STLUR page C6-1850 line 109030 MATCH x99000000/mask=xbfe00c00
# CONSTRUCT x99000000/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES

:stlur  aa_Wt, addr_SIMM9
is b_3031=0b10 & b_2129=0b011001000 & b_1011=0b00 & addr_SIMM9 & aa_Wt
{
	*addr_SIMM9 = aa_Wt;
}

# C6.2.313 STLUR page C6-1850 line 109030 MATCH x99000000/mask=xbfe00c00
# CONSTRUCT xd9000000/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES

:stlur aa_Xt, addr_SIMM9
is b_3031=0b11 & b_2129=0b011001000 & b_1011=0b00 & addr_SIMM9 & aa_Xt
{
	*addr_SIMM9 = aa_Xt;
}

# C6.2.314 STLURB page C6-1852 line 109129 MATCH x19000000/mask=xffe00c00
# CONSTRUCT x19000000/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# x19000000/mask=xffe00c00 NOT MATCHED BY ANY CONSTRUCTOR

:stlurb aa_Wt, addr_SIMM9
is b_2131=0b00011001000 & b_1011=0b00 & addr_SIMM9 & aa_Wt
{
	*addr_SIMM9 = aa_Wt:1;
}

# C6.2.315 STLURH page C6-1854 line 109217 MATCH x59000000/mask=xffe00c00
# CONSTRUCT x59000000/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# x59000000/mask=xffe00c00 NOT MATCHED BY ANY CONSTRUCTOR

:stlurh aa_Wt, addr_SIMM9
is b_2131=0b01011001000 & b_1011=0b00 & addr_SIMM9 & aa_Wt
{
	*addr_SIMM9 = aa_Wt:2;
}

# C6.2.316 STLXP page C6-1856 line 109305 MATCH x88208000/mask=xbfe08000
# CONSTRUCT xc8208000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xc8208000/mask=xffe08000 --status nomem

:stlxp Rs_GPR32, Rt_GPR64, Rt2_GPR64, addrReg
is size.ldstr=3 & b_2429=0x8 & b_23=0 & L=0 & b_21=1 & Rs_GPR32 & b_15=1 & Rt2_GPR64 & addrReg & Rt_GPR64 & Rs_GPR64
{
	status:1 = 1;
	rsize:1 = 16;
	check:1 = ExclusiveMonitorPass(addrReg, rsize);
	if (!check) goto <fail>;
	*addrReg = Rt_GPR64;
	*(addrReg + 4) = Rt2_GPR64;
	status = ExclusiveMonitorsStatus();
<fail>
	Rs_GPR64 = zext(status);
}

# C6.2.316 STLXP page C6-1856 line 109305 MATCH x88208000/mask=xbfe08000
# CONSTRUCT x88208000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x88208000/mask=xffe08000 --status nomem

:stlxp Rs_GPR32, Rt_GPR32, Rt2_GPR32, addrReg
is size.ldstr=2 & b_2429=0x8 & b_23=0 & L=0 & b_21=1 & Rs_GPR32 & b_15=1 & Rt2_GPR32 & addrReg & Rt_GPR32 & Rs_GPR64
{
	status:1 = 1;
	rsize:1 = 16;
	check:1 = ExclusiveMonitorPass(addrReg, rsize);
	if (!check) goto <fail>;
	*addrReg = Rt_GPR32;
	*(addrReg + 4) = Rt2_GPR32;
	status = ExclusiveMonitorsStatus();
<fail>
	Rs_GPR64 = zext(status);
}

# C6.2.317 STLXR page C6-1859 line 109472 MATCH x88008000/mask=xbfe08000
# CONSTRUCT xc8008000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xc8008000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1014=0b11111

:stlxr Rs_GPR32, Rt_GPR64, addrReg
is size.ldstr=3 & b_2429=0x8 & b_23=0 & L=0 & b_21=0 & Rs_GPR32 & b_15=1 & addrReg & Rt_GPR64 & Rs_GPR64
{
	status:1 = 1;
	rsize:1 = 16;
	check:1 = ExclusiveMonitorPass(addrReg, rsize);
	if (!check) goto <fail>;
	*addrReg = Rt_GPR64;
	status = ExclusiveMonitorsStatus();
<fail>
	Rs_GPR64 = zext(status);
}

# C6.2.317 STLXR page C6-1859 line 109472 MATCH x88008000/mask=xbfe08000
# CONSTRUCT x88008000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x88008000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1014=0b11111

:stlxr Rs_GPR32, Rt_GPR32, addrReg
is size.ldstr=2 & b_2429=0x8 & b_23=0 & L=0 & b_21=0 & Rs_GPR32 & b_15=1 & addrReg & Rt_GPR32 & Rs_GPR64
{
	status:1 = 1;
	rsize:1 = 16;
	check:1 = ExclusiveMonitorPass(addrReg, rsize);
	if (!check) goto <fail>;
	*addrReg = Rt_GPR32;
	status = ExclusiveMonitorsStatus();
<fail>
	Rs_GPR64 = zext(status);
}

# C6.2.318 STLXRB page C6-1862 line 109627 MATCH x08008000/mask=xffe08000
# CONSTRUCT x08008000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x08008000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1014=0b11111

:stlxrb Rs_GPR32, Rt_GPR32, addrReg
is size.ldstr=0 & b_2429=0x8 & b_23=0 & L=0 & b_21=0 & Rs_GPR32 & b_15=1 & addrReg & Rt_GPR32 & Rs_GPR64
{
	status:1 = 1;
	rsize:1 = 16;
	check:1 = ExclusiveMonitorPass(addrReg, rsize);
	if (!check) goto <fail>;
	local tmp:4 = Rt_GPR32;
	*addrReg = tmp:1;
	status = ExclusiveMonitorsStatus();
<fail>
	Rs_GPR64 = zext(status);
}

# C6.2.319 STLXRH page C6-1864 line 109754 MATCH x48008000/mask=xffe08000
# CONSTRUCT x48008000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x48008000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1014=0b11111

:stlxrh Rs_GPR32, Rt_GPR32, addrReg
is size.ldstr=1 & b_2429=0x8 & b_23=0 & L=0 & b_21=0 & Rs_GPR32 & b_15=1 & addrReg & Rt_GPR32 & Rs_GPR64
{
	status:1 = 1;
	rsize:1 = 16;
	check:1 = ExclusiveMonitorPass(addrReg, rsize);
	if (!check) goto <fail>;
	local tmp:4 = Rt_GPR32;
	*addrReg = tmp:2;
	status = ExclusiveMonitorsStatus();
<fail>
	Rs_GPR64 = zext(status);
}

# C6.2.320 STNP page C6-1866 line 109888 MATCH x28000000/mask=x7fc00000
# CONSTRUCT x28000000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x28000000/mask=xffc00000 --status nomem

:stnp Rt_GPR32, Rt2_GPR32, addrPairIndexed
is b_3031=0b00 & b_2229=0b10100000 & Rt2_GPR32 & addrPairIndexed & Rt_GPR32
{
	data1:4 = Rt_GPR32;
	data2:4 = Rt2_GPR32;
	build addrPairIndexed;
	*addrPairIndexed = data1;
	*(addrPairIndexed + 4) = data2;
}

# C6.2.320 STNP page C6-1866 line 109888 MATCH x28000000/mask=x7fc00000
# CONSTRUCT xa8000000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xa8000000/mask=xffc00000 --status nomem

:stnp Rt_GPR64, Rt2_GPR64, addrPairIndexed
is b_3031=0b10 & b_2229=0b10100000 & Rt2_GPR64 & addrPairIndexed & Rt_GPR64
{
	data1:8 = Rt_GPR64;
	data2:8 = Rt2_GPR64;
	build addrPairIndexed;
	*addrPairIndexed = data1;
	*(addrPairIndexed + 8) = data2;
}

# C6.2.321 STP page C6-1868 line 109996 MATCH x28800000/mask=x7fc00000
# C6.2.321 STP page C6-1868 line 109996 MATCH x29800000/mask=x7fc00000
# C6.2.321 STP page C6-1868 line 109996 MATCH x29000000/mask=x7fc00000
# C6.2.320 STNP page C6-1866 line 109888 MATCH x28000000/mask=x7fc00000
# CONSTRUCT x28000000/mask=xfe400000 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst x28000000/mask=xfe400000 --status nomem

:stp Rt_GPR32, Rt2_GPR32, addrPairIndexed
is b_3031=0b00 & b_2529=0b10100 & b_22=0b0 & Rt2_GPR32 & addrPairIndexed & Rt_GPR32
{
	data1:4 = Rt_GPR32;
	data2:4 = Rt2_GPR32;
	build addrPairIndexed;
	*addrPairIndexed = data1;
	*(addrPairIndexed + 4) = data2;
}

# C6.2.321 STP page C6-1868 line 109996 MATCH x28800000/mask=x7fc00000
# C6.2.321 STP page C6-1868 line 109996 MATCH x29800000/mask=x7fc00000
# C6.2.321 STP page C6-1868 line 109996 MATCH x29000000/mask=x7fc00000
# C6.2.320 STNP page C6-1866 line 109888 MATCH x28000000/mask=x7fc00000
# CONSTRUCT xa8000000/mask=xfe400000 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst xa8000000/mask=xfe400000 --status nomem

:stp Rt_GPR64, Rt2_GPR64, addrPairIndexed
is b_3031=0b10 & b_2529=0b10100 & b_22=0b0 & Rt2_GPR64 & addrPairIndexed & Rt_GPR64
{
	data1:8 = Rt_GPR64;
	data2:8 = Rt2_GPR64;
	build addrPairIndexed;
	*addrPairIndexed = data1;
	*(addrPairIndexed + 8) = data2;
}

# C6.2.322 STR (immediate) page C6-1871 line 110209 MATCH xb9000000/mask=xbfc00000
# CONSTRUCT xb9000000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xb9000000/mask=xffc00000 --status nomem

:str Rt_GPR32, addrUIMM
is size.ldstr=2 & b_2729=7 & v=0 & b_2425=1 & b_23=0 & b_2222=0 & addrUIMM & Rn_GPR64xsp & Rt_GPR32
{
	*addrUIMM = Rt_GPR32;
}

# C6.2.322 STR (immediate) page C6-1871 line 110209 MATCH xb8000400/mask=xbfe00c00
# C6.2.322 STR (immediate) page C6-1871 line 110209 MATCH xb8000c00/mask=xbfe00c00
# C6.2.337 STTR page C6-1904 line 111916 MATCH xb8000800/mask=xbfe00c00
# C6.2.346 STUR page C6-1922 line 112818 MATCH xb8000000/mask=xbfe00c00
# CONSTRUCT xb8000000/mask=xffe00000 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst xb8000000/mask=xffe00000 --status nomem

:st^UnscPriv^"r" Rt_GPR32, addrIndexed
is size.ldstr=2 & b_2729=7 & v=0 & b_2425=0 & b_23=0 & b_2222=0 & b_2121=0 & UnscPriv & addrIndexed & Rt_GPR32
{
	data1:4 = Rt_GPR32;
	build addrIndexed;
	*addrIndexed = data1;
}

# C6.2.322 STR (immediate) page C6-1871 line 110209 MATCH xb8000400/mask=xbfe00c00
# C6.2.322 STR (immediate) page C6-1871 line 110209 MATCH xb8000c00/mask=xbfe00c00
# CONSTRUCT xb8000400/mask=xffe00400 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xb8000400/mask=xffe00400 --status nomem

:str Rt_GPR32, addrIndexed
is size.ldstr=2 & b_2729=7 & v=0 & b_2425=0 & b_23=0 & b_2222=0 & b_2121=0 & b_1010=1 & addrIndexed & Rt_GPR32
{
	data1:4 = Rt_GPR32;
	build addrIndexed;
	*addrIndexed = data1;
}

# C6.2.322 STR (immediate) page C6-1871 line 110209 MATCH xb9000000/mask=xbfc00000
# CONSTRUCT xf9000000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xf9000000/mask=xffc00000 --status nomem

:str Rt_GPR64, addrUIMM
is size.ldstr=3 & b_2729=7 & v=0 & b_2425=1 & b_23=0 & b_2222=0 & addrUIMM & Rn_GPR64xsp & Rt_GPR64
{
	*addrUIMM = Rt_GPR64;
}

# C6.2.322 STR (immediate) page C6-1871 line 110209 MATCH xb8000400/mask=xbfe00c00
# C6.2.322 STR (immediate) page C6-1871 line 110209 MATCH xb8000c00/mask=xbfe00c00
# CONSTRUCT xf8000400/mask=xffe00400 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xf8000400/mask=xffe00400 --status nomem

:str Rt_GPR64, addrIndexed
is size.ldstr=3 & b_2729=7 & v=0 & b_2425=0 & b_23=0 & b_2222=0 & b_2121=0 & b_1010=1 & addrIndexed & Rt_GPR64
{
	data1:8 = Rt_GPR64;
	build addrIndexed;
	*addrIndexed = data1;
}

# C6.2.323 STR (register) page C6-1874 line 110394 MATCH xb8200800/mask=xbfe00c00
# CONSTRUCT xb8200800/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xb8200800/mask=xffe00c00 --status nomem

:str Rt_GPR32, addrIndexed
is size.ldstr=2 & b_2729=7 & v=0 & b_2425=0 & b_23=0 & b_2222=0 & b_2121=1 & b_1011=2 & addrIndexed & Rt_GPR32
{
	data1:4 = Rt_GPR32;
	build addrIndexed;
	*addrIndexed = data1;
}

# C6.2.323 STR (register) page C6-1874 line 110394 MATCH xb8200800/mask=xbfe00c00
# CONSTRUCT xf8200800/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xf8200800/mask=xffe00c00 --status nomem

:str Rt_GPR64, addrIndexed
is size.ldstr=3 & b_2729=7 & v=0 & b_2425=0 & b_23=0 & b_2222=0 & b_2121=1 & b_1011=2 & addrIndexed & Rt_GPR64
{
	data1:8 = Rt_GPR64;
	build addrIndexed;
	*addrIndexed = data1;
}

# C6.2.324 STRB (immediate) page C6-1876 line 110516 MATCH x39000000/mask=xffc00000
# CONSTRUCT x39000000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x39000000/mask=xffc00000 --status nomem

:strb Rt_GPR32, addrIndexed
is size.ldstr=0 & b_2729=7 & v=0 & b_2425=1 & b_23=0 & b_2222=0 & addrIndexed & Rt_GPR32
{
	tmp:4 = Rt_GPR32;
	build addrIndexed;
	*addrIndexed = tmp:1;
}

# C6.2.324 STRB (immediate) page C6-1876 line 110516 MATCH x38000400/mask=xffe00c00
# C6.2.324 STRB (immediate) page C6-1876 line 110516 MATCH x38000c00/mask=xffe00c00
# CONSTRUCT x38000400/mask=xffe00400 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x38000400/mask=xffe00400 --status nomem

:strb Rt_GPR32, addrIndexed
is size.ldstr=0 & b_2729=7 & v=0 & b_2425=0 & b_23=0 & b_2222=0 & b_2121=0 & b_1010=1 & addrIndexed & Rt_GPR32
{
	tmp:4 = Rt_GPR32;
	build addrIndexed;
	*addrIndexed = tmp:1;
}

# C6.2.325 STRB (register) page C6-1879 line 110678 MATCH x38200800/mask=xffe00c00
# CONSTRUCT x38200800/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x38200800/mask=xffe00c00 --status nomem

:strb Rt_GPR32, addrIndexed
is size.ldstr=0 & b_2729=7 & v=0 & b_2425=0 & b_23=0 & b_2222=0 & b_2121=1 & b_1011=2 & addrIndexed & Rt_GPR32
{
	tmp:4 = Rt_GPR32;
	build addrIndexed;
	*addrIndexed = tmp:1;
}

# C6.2.326 STRH (immediate) page C6-1881 line 110781 MATCH x79000000/mask=xffc00000
# CONSTRUCT x79000000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x79000000/mask=xffc00000 --status nomem

:strh Rt_GPR32, addrUIMM
is size.ldstr=1 & b_2729=7 & v=0 & b_2425=1 & b_23=0 & b_2222=0 & addrUIMM & Rn_GPR64xsp & Rt_GPR32
{
	tmp:4 = Rt_GPR32;
	*addrUIMM = tmp:2;
}

# C6.2.326 STRH (immediate) page C6-1881 line 110781 MATCH x78000400/mask=xffe00c00
# C6.2.326 STRH (immediate) page C6-1881 line 110781 MATCH x78000c00/mask=xffe00c00
# CONSTRUCT x78000400/mask=xffe00400 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x78000400/mask=xffe00400 --status nomem

:strh Rt_GPR32, addrIndexed
is size.ldstr=1 & b_2729=7 & v=0 & b_2425=0 & b_23=0 & b_2222=0 & b_2121=0 & b_1010=1 & addrIndexed & Rt_GPR32
{
	tmp:4 = Rt_GPR32;
	build addrIndexed;
	*addrIndexed = tmp:2;
}

# C6.2.327 STRH (register) page C6-1884 line 110943 MATCH x78200800/mask=xffe00c00
# CONSTRUCT x78200800/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x78200800/mask=xffe00c00 --status nomem

:strh Rt_GPR32, addrIndexed
is size.ldstr=1 & b_2729=7 & v=0 & b_2425=0 & b_23=0 & b_2222=0 & b_2121=1 & b_1011=2 & addrIndexed & Rt_GPR32
{
	tmp:4 = Rt_GPR32;
	build addrIndexed;
	*addrIndexed = tmp:2;
}

# C6.2.337 STTR page C6-1904 line 111916 MATCH xb8000800/mask=xbfe00c00
# CONSTRUCT xf8000800/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xf8000800/mask=xffe00c00 --status nomem

:st^UnscPriv^"r" Rt_GPR64, addrIndexed
is size.ldstr=3 & b_2729=7 & v=0 & b_2425=0 & b_2223=0 & b_2121=0 & b_1011=2 & UnscPriv & addrIndexed & Rt_GPR64
{
	data1:8 = Rt_GPR64;
	build addrIndexed;
	*addrIndexed = data1;
}

# C6.2.338 STTRB page C6-1906 line 112029 MATCH x38000800/mask=xffe00c00
# C6.2.347 STURB page C6-1924 line 112913 MATCH x38000000/mask=xffe00c00
# CONSTRUCT x38000000/mask=xffe00000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x38000000/mask=xffe00000 --status nomem

:st^UnscPriv^"rb" Rt_GPR32, addrIndexed
is size.ldstr=0 & b_2729=7 & v=0 & b_2425=0 & b_23=0 & b_2222=0 & b_2121=0 & UnscPriv & addrIndexed & Rt_GPR32
{
	local tmp:4 = Rt_GPR32;
	build addrIndexed;
	*addrIndexed = tmp:1;
}

# C6.2.339 STTRH page C6-1908 line 112130 MATCH x78000800/mask=xffe00c00
# C6.2.348 STURH page C6-1925 line 112984 MATCH x78000000/mask=xffe00c00
# CONSTRUCT x78000000/mask=xffe00000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x78000000/mask=xffe00000 --status nomem

:st^UnscPriv^"rh" Rt_GPR32, addrIndexed
is size.ldstr=1 & b_2729=7 & v=0 & b_2425=0 & b_23=0 & b_2222=0 & b_2121=0 & UnscPriv & addrIndexed & Rt_GPR32
{
	local tmp:4 = Rt_GPR32;
	build addrIndexed;
	*addrIndexed = tmp:2;
}

# C6.2.346 STUR page C6-1922 line 112818 MATCH xb8000000/mask=xbfe00c00
# CONSTRUCT xf8000000/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xf8000000/mask=xffe00c00 --status nomem

:st^UnscPriv^"r" Rt_GPR64, addrIndexed
is size.ldstr=3 & b_2729=7 & v=0 & b_2425=0 & b_23=0 & b_2122=0 & b_1011=0 & UnscPriv & addrIndexed & Rt_GPR64
{
	data1:8 = Rt_GPR64;
	build addrIndexed;
	*addrIndexed = data1;
}

# C6.2.349 STXP page C6-1926 line 113055 MATCH x88200000/mask=xbfe08000
# CONSTRUCT xc8200000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xc8200000/mask=xffe08000 --status nomem

:stxp Rs_GPR32, Rt_GPR64, Rt2_GPR64, addrReg
is size.ldstr=3 & b_2429=0x8 & b_23=0 & L=0 & b_21=1 & Rs_GPR32 & b_15=0 & Rt2_GPR64 & addrReg & Rt_GPR64 & Rs_GPR64
{
	status:1 = 1;
	rsize:1 = 16;
	check:1 = ExclusiveMonitorPass(addrReg, rsize);
	if (!check) goto <fail>;
	*addrReg = Rt_GPR64;
	*(addrReg + 8) = Rt2_GPR64;
	status = ExclusiveMonitorsStatus();
<fail>
	Rs_GPR64 = zext(status);
}

# C6.2.349 STXP page C6-1926 line 113055 MATCH x88200000/mask=xbfe08000
# CONSTRUCT x88200000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x88200000/mask=xffe08000 --status nomem

:stxp Rs_GPR32, Rt_GPR32, Rt2_GPR32, addrReg
is size.ldstr=2 & b_2429=0x8 & b_23=0 & L=0 & b_21=1 & Rs_GPR32 & b_15=0 & Rt2_GPR32 & addrReg & Rt_GPR32 & Rs_GPR64
{
	status:1 = 1;
	rsize:1 = 16;
	check:1 = ExclusiveMonitorPass(addrReg, rsize);
	if (!check) goto <fail>;
	*addrReg = Rt_GPR32;
	*(addrReg + 4) = Rt2_GPR32;
	status = ExclusiveMonitorsStatus();
<fail>
	Rs_GPR64 = zext(status);
}

# C6.2.350 STXR page C6-1929 line 113222 MATCH x88000000/mask=xbfe08000
# CONSTRUCT xc8000000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xc8000000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1014=0b11111

:stxr Rs_GPR32, Rt_GPR64, addrReg
is size.ldstr=3 & b_2429=0x8 & b_23=0 & L=0 & b_21=0 & Rs_GPR32 & b_15=0 & addrReg & Rt_GPR64 & Rs_GPR64
{
	status:1 = 1;
	rsize:1 = 16;
	check:1 = ExclusiveMonitorPass(addrReg, rsize);
	if (!check) goto <fail>;
	*addrReg = Rt_GPR64;
	status = ExclusiveMonitorsStatus();
<fail>
	Rs_GPR64 = zext(status);
}

# C6.2.350 STXR page C6-1929 line 113222 MATCH x88000000/mask=xbfe08000
# CONSTRUCT x88000000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x88000000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1014=0b11111

:stxr Rs_GPR32, Rt_GPR32, addrReg
is size.ldstr=2 & b_2429=0x8 & b_23=0 & L=0 & b_21=0 & Rs_GPR32 & b_15=0 & addrReg & Rt_GPR32 & Rs_GPR64
{
	status:1 = 1;
	rsize:1 = 16;
	check:1 = ExclusiveMonitorPass(addrReg, rsize);
	if (!check) goto <fail>;
	*addrReg = Rt_GPR32;
	status = ExclusiveMonitorsStatus();
<fail>
	Rs_GPR64 = zext(status);
}

# C6.2.351 STXRB page C6-1931 line 113368 MATCH x08000000/mask=xffe08000
# CONSTRUCT x08000000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x08000000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1014=0b11111

:stxrb Rs_GPR32, Rt_GPR32, addrReg
is size.ldstr=0 & b_2429=0x8 & b_23=0 & L=0 & b_21=0 & Rs_GPR32 & b_15=0 & addrReg & Rt_GPR32 & Rs_GPR64
{
	status:1 = 1;
	rsize:1 = 16;
	check:1 = ExclusiveMonitorPass(addrReg, rsize);
	if (!check) goto <fail>;
	local tmp:4 = Rt_GPR32;
	*addrReg = tmp:1;
	status = ExclusiveMonitorsStatus();
<fail>
	Rs_GPR64 = zext(status);
}

# C6.2.352 STXRH page C6-1933 line 113496 MATCH x48000000/mask=xffe08000
# CONSTRUCT x48000000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x48000000/mask=xffe08000 --status nomem
# To enforce SHOULD BE ONE fields add: b_1014=0b11111

:stxrh Rs_GPR32, Rt_GPR32, addrReg
is size.ldstr=1 & b_2429=0x8 & b_23=0 & L=0 & b_21=0 & Rs_GPR32 & b_15=0 & addrReg & Rt_GPR32 & Rs_GPR64
{
	status:1 = 1;
	rsize:1 = 16;
	check:1 = ExclusiveMonitorPass(addrReg, rsize);
	if (!check) goto <fail>;
	local tmp:4 = Rt_GPR32;
	*addrReg = tmp:2;
	status = ExclusiveMonitorsStatus();
<fail>
	Rs_GPR64 = zext(status);
}

# C6.2.356 SUB (extended register) page C6-1940 line 113972 MATCH x4b200000/mask=x7fe00000
# CONSTRUCT x4b200000/mask=xffe00000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x4b200000/mask=xffe00000 --status pass

:sub Rd_GPR32wsp, Rn_GPR32wsp, ExtendRegShift32
is sf=0 & op=1 & S=0 & b_2428=0xb & opt=0 & b_2121=1 & ExtendRegShift32 & Rn_GPR32wsp & Rd_GPR32wsp & Rd_GPR64xsp
{
	tmp_2:4 = ExtendRegShift32;
	tmp_1:4 = Rn_GPR32wsp - tmp_2;
	Rd_GPR64xsp = zext(tmp_1);
}

# C6.2.356 SUB (extended register) page C6-1940 line 113972 MATCH x4b200000/mask=x7fe00000
# CONSTRUCT xcb200000/mask=xffe00000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xcb200000/mask=xffe00000 --status pass

:sub Rd_GPR64xsp, Rn_GPR64xsp, ExtendRegShift64
is sf=1 & op=1 & S=0 & b_2428=0xb & opt=0 & b_2121=1 & ExtendRegShift64 & Rn_GPR64xsp & Rd_GPR64xsp
{
	tmp_2:8 = ExtendRegShift64;
	tmp_1:8 = Rn_GPR64xsp - tmp_2;
	Rd_GPR64xsp = tmp_1;
}

# C6.2.357 SUB (immediate) page C6-1943 line 114120 MATCH x51000000/mask=x7f800000
# C6.2.363 SUBS (immediate) page C6-1953 line 114699 MATCH x71000000/mask=x7f800000
# C6.2.63 CMP (immediate) page C6-1254 line 73533 MATCH x7100001f/mask=x7f80001f
# CONSTRUCT x51000000/mask=xdf000000 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst x51000000/mask=xdf000000 --status pass --comment "flags"

:sub^SBIT_CZNO Rd_GPR32xsp, Rn_GPR32xsp, ImmShift32
is sf=0 & b_30=1 & S & SBIT_CZNO & b_2428=0x11 & ImmShift32 & Rn_GPR32xsp & Rd_GPR32xsp & Rd_GPR64xsp
{
	subflags(Rn_GPR32xsp, ImmShift32);
	tmp:4 = Rn_GPR32xsp - ImmShift32;
	resultflags(tmp);
	build SBIT_CZNO;
	Rd_GPR64xsp = zext(tmp);
}

# C6.2.357 SUB (immediate) page C6-1943 line 114120 MATCH x51000000/mask=x7f800000
# C6.2.363 SUBS (immediate) page C6-1953 line 114699 MATCH x71000000/mask=x7f800000
# C6.2.63 CMP (immediate) page C6-1254 line 73533 MATCH x7100001f/mask=x7f80001f
# CONSTRUCT xd1000000/mask=xdf000000 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst xd1000000/mask=xdf000000 --status pass --comment "flags"

:sub^SBIT_CZNO Rd_GPR64xsp, Rn_GPR64xsp, ImmShift64
is sf=1 & b_30=1 & S & SBIT_CZNO & b_2428=0x11 & ImmShift64 & Rn_GPR64xsp & Rd_GPR64xsp
{
	subflags(Rn_GPR64xsp, ImmShift64);
	Rd_GPR64xsp = Rn_GPR64xsp - ImmShift64;
	resultflags(Rd_GPR64xsp);
	build SBIT_CZNO;
}

# C6.2.357 SUB (immediate) page C6-1943 line 114120 MATCH x51000000/mask=x7f800000
# CONSTRUCT x51000000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x51000000/mask=xffc00000 --status pass

:sub Rd_GPR32wsp, Rn_GPR32wsp, Imm12_addsubimm_operand_i32_negimm_lsl0
is sf=0 & op=1 & S=0 & b_2428=0x11 & shift=0 & Imm12_addsubimm_operand_i32_negimm_lsl0 & Rn_GPR32wsp & Rd_GPR32wsp & Rd_GPR64xsp
{
	tmp_2:4 = Imm12_addsubimm_operand_i32_negimm_lsl0;
	tmp_1:4 = Rn_GPR32wsp - tmp_2;
	Rd_GPR64xsp = zext(tmp_1);
}

# C6.2.357 SUB (immediate) page C6-1943 line 114120 MATCH x51000000/mask=x7f800000
# CONSTRUCT x51400000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x51400000/mask=xffc00000 --status pass

:sub Rd_GPR32wsp, Rn_GPR32wsp, Imm12_addsubimm_operand_i32_negimm_lsl12
is sf=0 & op=1 & S=0 & b_2428=0x11 & shift=1 & Imm12_addsubimm_operand_i32_negimm_lsl12 & Rn_GPR32wsp & Rd_GPR32wsp & Rd_GPR64xsp
{
	tmp_2:4 = Imm12_addsubimm_operand_i32_negimm_lsl12;
	tmp_1:4 = Rn_GPR32wsp - tmp_2;
	Rd_GPR64xsp = zext(tmp_1);
}

# C6.2.357 SUB (immediate) page C6-1943 line 114120 MATCH x51000000/mask=x7f800000
# CONSTRUCT xd1000000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd1000000/mask=xffc00000 --status pass

:sub Rd_GPR64xsp, Rn_GPR64xsp, Imm12_addsubimm_operand_i64_negimm_lsl0
is sf=1 & op=1 & S=0 & b_2428=0x11 & shift=0 & Imm12_addsubimm_operand_i64_negimm_lsl0 & Rn_GPR64xsp & Rd_GPR64xsp
{
	tmp_2:8 = Imm12_addsubimm_operand_i64_negimm_lsl0;
	tmp_1:8 = Rn_GPR64xsp - tmp_2;
	Rd_GPR64xsp = tmp_1;
}

# C6.2.357 SUB (immediate) page C6-1943 line 114120 MATCH x51000000/mask=x7f800000
# CONSTRUCT xd1400000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd1400000/mask=xffc00000 --status pass

:sub Rd_GPR64xsp, Rn_GPR64xsp, Imm12_addsubimm_operand_i64_negimm_lsl12
is sf=1 & op=1 & S=0 & b_2428=0x11 & shift=1 & Imm12_addsubimm_operand_i64_negimm_lsl12 & Rn_GPR64xsp & Rd_GPR64xsp
{
	tmp_2:8 = Imm12_addsubimm_operand_i64_negimm_lsl12;
	tmp_1:8 = Rn_GPR64xsp - tmp_2;
	Rd_GPR64xsp = tmp_1;
}

# C6.2.358 SUB (shifted register) page C6-1945 line 114221 MATCH x4b000000/mask=x7f200000
# C6.2.234 NEG (shifted register) page C6-1694 line 100243 MATCH x4b0003e0/mask=x7f2003e0
# CONSTRUCT x4b000000/mask=xff200000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x4b000000/mask=xff200000 --status pass

:sub Rd_GPR32, Rn_GPR32, RegShift32
is sf=0 & op=1 & s=0 & b_2428=0xb & b_2121=0 & RegShift32 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp_2:4 = RegShift32;
	tmp_1:4 = Rn_GPR32 - tmp_2;
	Rd_GPR64 = zext(tmp_1);
}

# C6.2.358 SUB (shifted register) page C6-1945 line 114221 MATCH x4b000000/mask=x7f200000
# C6.2.234 NEG (shifted register) page C6-1694 line 100243 MATCH x4b0003e0/mask=x7f2003e0
# CONSTRUCT xcb000000/mask=xff200000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xcb000000/mask=xff200000 --status pass

:sub Rd_GPR64, Rn_GPR64, RegShift64
is sf=1 & op=1 & s=0 & b_2428=0xb & b_2121=0 & RegShift64 & Rn_GPR64 & Rd_GPR64
{
	tmp_2:8 = RegShift64;
	tmp_1:8 = Rn_GPR64 - tmp_2;
	Rd_GPR64 = tmp_1;
}

# C6.2.362 SUBS (extended register) page C6-1950 line 114543 MATCH x6b200000/mask=x7fe00000
# C6.2.62 CMP (extended register) page C6-1252 line 73406 MATCH x6b20001f/mask=x7fe0001f
# CONSTRUCT x6b200000/mask=xffe00000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x6b200000/mask=xffe00000 --status pass --comment "flags"

:subs Rd_GPR32, Rn_GPR32wsp, ExtendRegShift32
is sf=0 & op=1 & S=1 & b_2428=0xb & opt=0 & b_2121=1 & ExtendRegShift32 & Rn_GPR32wsp & Rd_GPR32 & Rd_GPR64
{
	tmp_2:4 = ExtendRegShift32;
	subflags(Rn_GPR32wsp, tmp_2);
	tmp_1:4 = Rn_GPR32wsp - tmp_2;
	resultflags(tmp_1);
	Rd_GPR64 = zext(tmp_1);
	affectflags();
}

# C6.2.362 SUBS (extended register) page C6-1950 line 114543 MATCH x6b200000/mask=x7fe00000
# C6.2.364 SUBS (shifted register) page C6-1955 line 114807 MATCH x6b000000/mask=x7f200000
# C6.2.62 CMP (extended register) page C6-1252 line 73406 MATCH x6b20001f/mask=x7fe0001f
# C6.2.64 CMP (shifted register) page C6-1256 line 73623 MATCH x6b00001f/mask=x7f20001f
# C6.2.235 NEGS page C6-1696 line 100340 MATCH x6b0003e0/mask=x7f2003e0
# CONSTRUCT xeb000000/mask=xffc00000 MATCHED 5 DOCUMENTED OPCODES
# AUNIT --inst xeb000000/mask=xffc00000 --status pass --comment "flags"

:subs Rd_GPR64, Rn_GPR64xsp, ExtendRegShift64
is sf=1 & op=1 & S=1 & b_2428=0xb & opt=0 & b_2121=1 & ExtendRegShift64 & Rn_GPR64xsp & Rd_GPR64
{
	tmp_2:8 = ExtendRegShift64;
	subflags(Rn_GPR64xsp, tmp_2);
	tmp_1:8 = Rn_GPR64xsp - tmp_2;
	resultflags(tmp_1);
	Rd_GPR64 = tmp_1;
	affectflags();
}

# C6.2.363 SUBS (immediate) page C6-1953 line 114699 MATCH x71000000/mask=x7f800000
# C6.2.63 CMP (immediate) page C6-1254 line 73533 MATCH x7100001f/mask=x7f80001f
# CONSTRUCT x71000000/mask=xffc00000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x71000000/mask=xffc00000 --status pass --comment "flags"

:subs Rd_GPR32, Rn_GPR32wsp, Imm12_addsubimm_operand_i32_negimm_lsl0
is sf=0 & op=1 & S=1 & b_2428=0x11 & shift=0 & Imm12_addsubimm_operand_i32_negimm_lsl0 & Rn_GPR32wsp & Rd_GPR32 & Rd_GPR64
{
	tmp_2:4 = Imm12_addsubimm_operand_i32_negimm_lsl0;
	subflags(Rn_GPR32wsp, tmp_2);
	tmp_1:4 = Rn_GPR32wsp - tmp_2;
	resultflags(tmp_1);
	Rd_GPR64 = zext(tmp_1);
	affectflags();
}

# C6.2.363 SUBS (immediate) page C6-1953 line 114699 MATCH x71000000/mask=x7f800000
# C6.2.63 CMP (immediate) page C6-1254 line 73533 MATCH x7100001f/mask=x7f80001f
# CONSTRUCT x71400000/mask=xffc00000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x71400000/mask=xffc00000 --status pass --comment "flags"

:subs Rd_GPR32, Rn_GPR32wsp, Imm12_addsubimm_operand_i32_negimm_lsl12
is sf=0 & op=1 & S=1 & b_2428=0x11 & shift=1 & Imm12_addsubimm_operand_i32_negimm_lsl12 & Rn_GPR32wsp & Rd_GPR32 & Rd_GPR64
{
	tmp_2:4 = Imm12_addsubimm_operand_i32_negimm_lsl12;
	subflags(Rn_GPR32wsp, tmp_2);
	tmp_1:4 = Rn_GPR32wsp - tmp_2;
	resultflags(tmp_1);
	Rd_GPR64 = zext(tmp_1);
	affectflags();
}

# C6.2.363 SUBS (immediate) page C6-1953 line 114699 MATCH x71000000/mask=x7f800000
# C6.2.63 CMP (immediate) page C6-1254 line 73533 MATCH x7100001f/mask=x7f80001f
# CONSTRUCT xf1000000/mask=xffc00000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xf1000000/mask=xffc00000 --status pass --comment "flags"

:subs Rd_GPR64, Rn_GPR64xsp, Imm12_addsubimm_operand_i64_negimm_lsl0
is sf=1 & op=1 & S=1 & b_2428=0x11 & shift=0 & Imm12_addsubimm_operand_i64_negimm_lsl0 & Rn_GPR64xsp & Rd_GPR64
{
	tmp_2:8 = Imm12_addsubimm_operand_i64_negimm_lsl0;
	subflags(Rn_GPR64xsp, tmp_2);
	tmp_1:8 = Rn_GPR64xsp - tmp_2;
	resultflags(tmp_1);
	Rd_GPR64 = tmp_1;
	affectflags();
}

# C6.2.363 SUBS (immediate) page C6-1953 line 114699 MATCH x71000000/mask=x7f800000
# C6.2.63 CMP (immediate) page C6-1254 line 73533 MATCH x7100001f/mask=x7f80001f
# CONSTRUCT xf1400000/mask=xffc00000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xf1400000/mask=xffc00000 --status pass --comment "flags"

:subs Rd_GPR64, Rn_GPR64xsp, Imm12_addsubimm_operand_i64_negimm_lsl12
is sf=1 & op=1 & S=1 & b_2428=0x11 & shift=1 & Imm12_addsubimm_operand_i64_negimm_lsl12 & Rn_GPR64xsp & Rd_GPR64
{
	tmp_2:8 = Imm12_addsubimm_operand_i64_negimm_lsl12;
	subflags(Rn_GPR64xsp, tmp_2);
	tmp_1:8 = Rn_GPR64xsp - tmp_2;
	resultflags(tmp_1);
	Rd_GPR64 = tmp_1;
	affectflags();
}

# C6.2.364 SUBS (shifted register) page C6-1955 line 114807 MATCH x6b000000/mask=x7f200000
# C6.2.64 CMP (shifted register) page C6-1256 line 73623 MATCH x6b00001f/mask=x7f20001f
# C6.2.235 NEGS page C6-1696 line 100340 MATCH x6b0003e0/mask=x7f2003e0
# CONSTRUCT x6b000000/mask=xff200000 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst x6b000000/mask=xff200000 --status pass

:subs Rd_GPR32, Rn_GPR32, RegShift32
is sf=0 & op=1 & s=1 & b_2428=0xb & b_2121=0 & RegShift32 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp_2:4 = RegShift32;
	subflags(Rn_GPR32, tmp_2);
	tmp_1:4 = Rn_GPR32 - tmp_2;
	resultflags(tmp_1);
	Rd_GPR64 = zext(tmp_1);
	affectflags();
}

# C6.2.364 SUBS (shifted register) page C6-1955 line 114807 MATCH x6b000000/mask=x7f200000
# C6.2.64 CMP (shifted register) page C6-1256 line 73623 MATCH x6b00001f/mask=x7f20001f
# C6.2.235 NEGS page C6-1696 line 100340 MATCH x6b0003e0/mask=x7f2003e0
# CONSTRUCT xeb000000/mask=xff200000 MATCHED 3 DOCUMENTED OPCODES
# AUNIT --inst xeb000000/mask=xff200000 --status pass

:subs Rd_GPR64, Rn_GPR64, RegShift64
is sf=1 & op=1 & s=1 & b_2428=0xb & b_2121=0 & RegShift64 & Rn_GPR64 & Rd_GPR64 & Rd
{
	tmp_2:8 = RegShift64;
	subflags(Rn_GPR64, tmp_2);
	tmp_1:8 = Rn_GPR64 - tmp_2;
	resultflags(tmp_1);
	Rd_GPR64 = tmp_1;
	affectflags();
}

# C6.2.365 SVC page C6-1957 line 114930 MATCH xd4000001/mask=xffe0001f
# CONSTRUCT xd4000001/mask=xffe0001f MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd4000001/mask=xffe0001f --status nodest

:svc imm16
is b_2431=0xd4 & excCode=0 & imm16 & excCode2=0 & ll=1
{
	CallSupervisor(imm16:2);
}

# C6.2.366 SWPB, SWPAB, SWPALB, SWPLB page C6-1958 line 114973 MATCH x38208000/mask=xff20fc00
# CONSTRUCT x38208000/mask=xff20fc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x38208000/mask=xff20fc00 --status nomem

# size=0b00 (3031)

:swp^ls_lor^"b" aa_Ws, aa_Wt, [Rn_GPR64xsp]
is b_3031=0b00 & b_2429=0b111000 & b_21=1 & b_1215=0b1000 & b_1011=0b00 & ls_loa & ls_lor & aa_Wt & ls_data1 & ls_mem1 & aa_Ws & Rn_GPR64xsp
{ build ls_loa; build ls_data1; ls_opc_swp(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem1; aa_Wt = tmp_ldWn; build ls_lor; }

# C6.2.367 SWPH, SWPAH, SWPALH, SWPLH page C6-1960 line 115079 MATCH x78208000/mask=xff20fc00
# CONSTRUCT x78208000/mask=xff20fc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x78208000/mask=xff20fc00 --status nomem

# size=0b01 (3031)

:swp^ls_lor^"h" aa_Ws, aa_Wt, [Rn_GPR64xsp]
is b_3031=0b01 & b_2429=0b111000 & b_21=1 & b_1215=0b1000 & b_1011=0b00 & ls_loa & ls_lor & aa_Wt & ls_data2 & ls_mem2 & aa_Ws & Rn_GPR64xsp
{ build ls_loa; build ls_data2; ls_opc_swp(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem2; aa_Wt = tmp_ldWn; build ls_lor; }

# C6.2.368 SWP, SWPA, SWPAL, SWPL page C6-1962 line 115186 MATCH xb8208000/mask=xbf20fc00
# CONSTRUCT xb8208000/mask=xff20fc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xb8208000/mask=xff20fc00 --status nomem

# size=0b10 (3031)

:swp^ls_lor aa_Ws, aa_Wt, [Rn_GPR64xsp]
is b_3031=0b10 & b_2429=0b111000 & b_21=1 & b_1215=0b1000 & b_1011=0b00 & ls_loa & ls_lor & aa_Wt & ls_data4 & ls_mem4 & aa_Ws & Rn_GPR64xsp
{ build ls_loa; build ls_data4; ls_opc_swp(tmp_ldWn, aa_Ws, tmp_stWn); build ls_mem4; aa_Wt = tmp_ldWn; build ls_lor; }

# C6.2.368 SWP, SWPA, SWPAL, SWPL page C6-1962 line 115186 MATCH xb8208000/mask=xbf20fc00
# CONSTRUCT xf8208000/mask=xff20fc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xf8208000/mask=xff20fc00 --status nomem

# size=0b11 (3031)

:swp^ls_lor aa_Xs, aa_Xt, [Rn_GPR64xsp]
is b_3031=0b11 & b_2429=0b111000 & b_21=1 & b_1215=0b1000 & b_1011=0b00 & ls_loa & ls_lor & aa_Xt & ls_data8 & ls_mem8 & aa_Xs & Rn_GPR64xsp
{ build ls_loa; build ls_data8; ls_opc_swp(tmp_ldXn, aa_Xs, tmp_stXn); build ls_mem8; aa_Xt = tmp_ldXn; build ls_lor; }

# C6.2.369 SXTB page C6-1964 line 115324 MATCH x13001c00/mask=x7fbffc00
# C6.2.267 SBFIZ page C6-1751 line 103178 MATCH x13000000/mask=x7f800000
# C6.2.268 SBFM page C6-1753 line 103272 MATCH x13000000/mask=x7f800000
# C6.2.269 SBFX page C6-1756 line 103421 MATCH x13000000/mask=x7f800000
# CONSTRUCT x93401c00/mask=xfffffc06 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst x93401c00/mask=xfffffc06 --status pass

# Special case of sbfm where imms='000111' and immr='000000'

:sxtb Rd_GPR64, Rn_GPR32
is ImmR=0x0 & ImmS=0x7 & ImmS_EQ_ImmR=0 & ImmS_LT_ImmR=0 & sf=1 & opc=0 & b_2428=0x13 & b_2323=0 & n=1 & Rn_GPR32 & Rd_GPR64
{
	tmp:4 = Rn_GPR32;
	tmp_byte:1 = tmp:1;
	result:8 = sext(tmp_byte);
	Rd_GPR64 = result;
}

# C6.2.369 SXTB page C6-1964 line 115324 MATCH x13001c00/mask=x7fbffc00
# C6.2.267 SBFIZ page C6-1751 line 103178 MATCH x13000000/mask=x7f800000
# C6.2.268 SBFM page C6-1753 line 103272 MATCH x13000000/mask=x7f800000
# C6.2.269 SBFX page C6-1756 line 103421 MATCH x13000000/mask=x7f800000
# CONSTRUCT x13001c00/mask=xfffffc06 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst x13001c00/mask=xfffffc06 --status pass

# Special case of sbfm when ImmS=7 and ImmR=0. Note that this implies ImmS > ImmR-1
# Otherwise, this might appear to conflict with sbfiz

:sxtb Rd_GPR32, Rn_GPR32
is ImmR=0x0 & ImmS=0x7 & ImmS_EQ_ImmR=0 & ImmS_LT_ImmR=0 & sf=0 & opc=0 & b_2428=0x13 & b_2323=0 & n=0 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp:4 = Rn_GPR32;
	tmp_byte:1 = tmp:1;
	result:4 = sext(tmp_byte);
	Rd_GPR64 = zext(result);
}

# C6.2.370 SXTH page C6-1966 line 115411 MATCH x13003c00/mask=x7fbffc00
# C6.2.267 SBFIZ page C6-1751 line 103178 MATCH x13000000/mask=x7f800000
# C6.2.268 SBFM page C6-1753 line 103272 MATCH x13000000/mask=x7f800000
# C6.2.269 SBFX page C6-1756 line 103421 MATCH x13000000/mask=x7f800000
# CONSTRUCT x93403c00/mask=xfffffc06 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst x93403c00/mask=xfffffc06 --status pass

# Special case of sbfm where imms='001111' and immr='000000'

:sxth Rd_GPR64, Rn_GPR32
is ImmR=0x0 & ImmS=0xf & ImmS_EQ_ImmR=0 & ImmS_LT_ImmR=0 & sf=1 & opc=0 & b_2428=0x13 & b_2323=0 & n=1 & Rn_GPR32 & Rd_GPR64
{
	tmp:4 = Rn_GPR32;
	tmp_1:2 = tmp:2;
	tmp_2:8 = sext(tmp_1);
	Rd_GPR64 = tmp_2;
}

# C6.2.370 SXTH page C6-1966 line 115411 MATCH x13003c00/mask=x7fbffc00
# C6.2.267 SBFIZ page C6-1751 line 103178 MATCH x13000000/mask=x7f800000
# C6.2.268 SBFM page C6-1753 line 103272 MATCH x13000000/mask=x7f800000
# C6.2.269 SBFX page C6-1756 line 103421 MATCH x13000000/mask=x7f800000
# CONSTRUCT x13003c00/mask=xfffffc06 MATCHED 4 DOCUMENTED OPCODES
# AUNIT --inst x13003c00/mask=xfffffc06 --status pass

# Special case of sbfm where imms='001111' and immr='000000'

:sxth Rd_GPR32, Rn_GPR32
is ImmR=0x0 & ImmS=0xf & ImmS_EQ_ImmR=0 & ImmS_LT_ImmR=0 & sf=0 & opc=0 & b_2428=0x13 & b_2323=0 & n=0 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp:4 = Rn_GPR32;
	tmp_1:2 = tmp:2;
	tmp_2:4 = sext(tmp_1);
	Rd_GPR64 = zext(tmp_2);
}

# C6.2.371 SXTW page C6-1968 line 115498 MATCH x93407c00/mask=xfffffc00
# C6.2.17 ASR (immediate) page C6-1175 line 69498 MATCH x13007c00/mask=x7f807c00
# C6.2.267 SBFIZ page C6-1751 line 103178 MATCH x13000000/mask=x7f800000
# C6.2.268 SBFM page C6-1753 line 103272 MATCH x13000000/mask=x7f800000
# C6.2.269 SBFX page C6-1756 line 103421 MATCH x13000000/mask=x7f800000
# CONSTRUCT x93407c00/mask=xfffffc06 MATCHED 5 DOCUMENTED OPCODES
# AUNIT --inst x93407c00/mask=xfffffc06 --status pass

# Special case of sbfm where imms='011111' and immr='000000'

:sxtw Rd_GPR64, Rn_GPR32
is ImmR=0x0 & ImmS=0x1f & ImmS_EQ_ImmR=0 & ImmS_LT_ImmR=0 & sf=1 & opc=0 & b_2428=0x13 & b_2323=0 & n=1 & Rn_GPR32 & Rd_GPR64
{
	tmp:4 = Rn_GPR32;
	Rd_GPR64 = sext(tmp);
}

# C6.2.286 SYS page C6-979 line 56782 KEEPWITH

SysArgs: Op1_uimm3, CRn_CRx, CRm_CRx, Op2_uimm3, Rt_GPR64 is Op1_uimm3 & CRn_CRx & CRm_CRx & Op2_uimm3 & aa_Xt & Rt_GPR64 { export Rt_GPR64; }
SysArgs: Op1_uimm3, CRn_CRx, CRm_CRx, Op2_uimm3 is Op1_uimm3 & CRn_CRx & CRm_CRx & Op2_uimm3 & aa_Xt=31 & Rt_GPR64 { export 0:8; }

# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# C6.2.19 AT page C6-1179 line 69679 MATCH xd5087800/mask=xfff8fe00
# C6.2.39 BRB page C6-1212 line 71361 MATCH xd5097200/mask=xffffff00
# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# CONSTRUCT xd5080000/mask=xfff80000 MATCHED 6 DOCUMENTED OPCODES
# AUNIT --inst xd5080000/mask=xfff80000 --status nodest

:sys SysArgs
is b_1931=0b1101010100001 & Op1_uimm3 & CRn_CRx & CRm_CRx & Op2_uimm3 & SysArgs
{
	tmp1:4 = Op1_uimm3;
	tmp2:4 = CRn_CRx;
	tmp3:4 = CRm_CRx;
	tmp4:4 = Op2_uimm3;
	SysOp_W(tmp1, tmp2, tmp3, tmp4, SysArgs);
}

# C6.2.373 SYSL page C6-1971 line 115652 MATCH xd5280000/mask=xfff80000
# CONSTRUCT xd5280000/mask=xfff80000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd5280000/mask=xfff80000 --status nodest

:sysl Rt_GPR64, Op1_uimm3, CRn_CRx, CRm_CRx, Op2_uimm3
is b_2431=0xd5 & b_2223=0 & l=1 & Op0=1 & Op1_uimm3 & CRn_CRx & CRm_CRx & Op2_uimm3 & aa_Xt & Rt_GPR64
{
	tmp1:4 = Op1_uimm3;
	tmp2:4 = CRn_CRx;
	tmp3:4 = CRm_CRx;
	tmp4:4 = Op2_uimm3;
	Rt_GPR64 = SysOp_R(tmp1, tmp2, tmp3, tmp4);
}

# C6.2.373 SYSL page C6-1971 line 115652 MATCH xd5280000/mask=xfff80000
# CONSTRUCT xd528001f/mask=xfff8001f MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xd528001f/mask=xfff8001f --status nodest

:sysl Op1_uimm3, CRn_CRx, CRm_CRx, Op2_uimm3
is b_2431=0xd5 & b_2223=0 & l=1 & Op0=1 & Op1_uimm3 & CRn_CRx & CRm_CRx & Op2_uimm3 & aa_Xt=31 & Rt_GPR64
{
	tmp1:4 = Op1_uimm3;
	tmp2:4 = CRn_CRx;
	tmp3:4 = CRm_CRx;
	tmp4:4 = Op2_uimm3;
	SysOp_R(tmp1, tmp2, tmp3, tmp4);
}

# C6.2.374 TBNZ page C6-1972 line 115708 MATCH x37000000/mask=x7f000000
# C6.2.375 TBZ page C6-1973 line 115766 MATCH x36000000/mask=x7f000000
# CONSTRUCT xb6000000/mask=xfe000000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xb6000000/mask=xfe000000 --status nodest

:tb^ZeroOp Rd_GPR64, BitPos, Addr14
is sf=1 & b_2530=0x1b & BitPos & ZeroOp & Addr14 & Rd_GPR64
{
	tmp:1 = BitPos;
	if (tmp == ZeroOp) goto Addr14;
}

# C6.2.374 TBNZ page C6-1972 line 115708 MATCH x37000000/mask=x7f000000
# C6.2.375 TBZ page C6-1973 line 115766 MATCH x36000000/mask=x7f000000
# CONSTRUCT x36000000/mask=xfe000000 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x36000000/mask=xfe000000 --status nodest

:tb^ZeroOp Rd_GPR32, BitPos, Addr14
is sf=0 & b_2530=0x1b & BitPos & ZeroOp & Addr14 & Rd_GPR32
{
	tmp:1 = BitPos;
	if (tmp == ZeroOp) goto Addr14;
}

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50c8020/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50c8020/mask=xffffffe0 --status nodest

:tlbi "IPAS2E1IS", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b100 & b_1215=0b1000 & b_0811=0b0000 & b_0507=0b001 & Rt_GPR64
{ TLBI_IPAS2E1IS(Rt_GPR64); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50c80a0/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50c80a0/mask=xffffffe0 --status nodest

:tlbi "IPAS2LE1IS", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b100 & b_1215=0b1000 & b_0811=0b0000 & b_0507=0b101 & Rt_GPR64
{ TLBI_IPAS2LE1IS(Rt_GPR64); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5088300/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd5088300/mask=xffffffe0 --status nodest

:tlbi "VMALLE1IS"
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b1000 & b_0811=0b0011 & b_0507=0b000
{ TLBI_VMALLE1IS(); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50c8300/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50c8300/mask=xffffffe0 --status nodest

:tlbi "ALLE2IS"
is b_1931=0b1101010100001 & b_1618=0b100 & b_1215=0b1000 & b_0811=0b0011 & b_0507=0b000
{ TLBI_ALLE2IS(); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50e8300/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50e8300/mask=xffffffe0 --status nodest

:tlbi "ALLE3IS"
is b_1931=0b1101010100001 & b_1618=0b110 & b_1215=0b1000 & b_0811=0b0011 & b_0507=0b000
{ TLBI_ALLE3IS(); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5088320/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd5088320/mask=xffffffe0 --status nodest

:tlbi "VAE1IS", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b1000 & b_0811=0b0011 & b_0507=0b001 & Rt_GPR64
{ TLBI_VAE1IS(Rt_GPR64); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50c8320/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50c8320/mask=xffffffe0 --status nodest

:tlbi "VAE2IS", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b100 & b_1215=0b1000 & b_0811=0b0011 & b_0507=0b001 & Rt_GPR64
{ TLBI_VAE2IS(Rt_GPR64); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50e8320/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50e8320/mask=xffffffe0 --status nodest

:tlbi "VAE3IS", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b110 & b_1215=0b1000 & b_0811=0b0011 & b_0507=0b001 & Rt_GPR64
{ TLBI_VAE3IS(Rt_GPR64); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5088340/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd5088340/mask=xffffffe0 --status nodest

:tlbi "ASIDE1IS", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b1000 & b_0811=0b0011 & b_0507=0b010 & Rt_GPR64
{ TLBI_ASIDE1IS(Rt_GPR64); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5088360/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd5088360/mask=xffffffe0 --status nodest

:tlbi "VAAE1IS", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b1000 & b_0811=0b0011 & b_0507=0b011 & Rt_GPR64
{ TLBI_VAAE1IS(Rt_GPR64); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50c8380/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50c8380/mask=xffffffe0 --status nodest

:tlbi "ALLE1IS"
is b_1931=0b1101010100001 & b_1618=0b100 & b_1215=0b1000 & b_0811=0b0011 & b_0507=0b100
{ TLBI_ALLE1IS(); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50883a0/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50883a0/mask=xffffffe0 --status nodest

:tlbi "VALE1IS", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b1000 & b_0811=0b0011 & b_0507=0b101 & Rt_GPR64
{ TLBI_VALE1IS(Rt_GPR64); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50c83a0/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50c83a0/mask=xffffffe0 --status nodest

:tlbi "VALE2IS", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b100 & b_1215=0b1000 & b_0811=0b0011 & b_0507=0b101 & Rt_GPR64
{ TLBI_VALE2IS(Rt_GPR64); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50e83a0/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50e83a0/mask=xffffffe0 --status nodest

:tlbi "VALE3IS", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b110 & b_1215=0b1000 & b_0811=0b0011 & b_0507=0b101 & Rt_GPR64
{ TLBI_VALE3IS(Rt_GPR64); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50c83c0/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50c83c0/mask=xffffffe0 --status nodest

:tlbi "VMALLS12E1IS"
is b_1931=0b1101010100001 & b_1618=0b100 & b_1215=0b1000 & b_0811=0b0011 & b_0507=0b110
{ TLBI_VMALLS12E1IS(); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50883e0/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50883e0/mask=xffffffe0 --status nodest

:tlbi "VAALE1IS", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b1000 & b_0811=0b0011 & b_0507=0b111 & Rt_GPR64
{ TLBI_VAALE1IS(Rt_GPR64); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50c8420/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50c8420/mask=xffffffe0 --status nodest

:tlbi "IPAS2E1", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b100 & b_1215=0b1000 & b_0811=0b0100 & b_0507=0b001 & Rt_GPR64
{ TLBI_IPAS2E1(Rt_GPR64); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50c84a0/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50c84a0/mask=xffffffe0 --status nodest

:tlbi "IPAS2LE1", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b100 & b_1215=0b1000 & b_0811=0b0100 & b_0507=0b101 & Rt_GPR64
{ TLBI_IPAS2LE1(Rt_GPR64); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5088700/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd5088700/mask=xffffffe0 --status nodest

:tlbi "VMALLE1"
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b1000 & b_0811=0b0111 & b_0507=0b000
{ TLBI_VMALLE1(); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50c8700/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50c8700/mask=xffffffe0 --status nodest

:tlbi "ALLE2"
is b_1931=0b1101010100001 & b_1618=0b100 & b_1215=0b1000 & b_0811=0b0111 & b_0507=0b000
{ TLBI_ALLE2(); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50e8700/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50e8700/mask=xffffffe0 --status nodest

:tlbi "ALLE3"
is b_1931=0b1101010100001 & b_1618=0b110 & b_1215=0b1000 & b_0811=0b0111 & b_0507=0b000
{ TLBI_ALLE3(); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5088720/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd5088720/mask=xffffffe0 --status nodest

:tlbi "VAE1", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b1000 & b_0811=0b0111 & b_0507=0b001 & Rt_GPR64
{ TLBI_VAE1(Rt_GPR64); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50c8720/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50c8720/mask=xffffffe0 --status nodest

:tlbi "VAE2", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b100 & b_1215=0b1000 & b_0811=0b0111 & b_0507=0b001 & Rt_GPR64
{ TLBI_VAE2(Rt_GPR64); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50e8720/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50e8720/mask=xffffffe0 --status nodest

:tlbi "VAE3", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b110 & b_1215=0b1000 & b_0811=0b0111 & b_0507=0b001 & Rt_GPR64
{ TLBI_VAE3(Rt_GPR64); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5088740/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd5088740/mask=xffffffe0 --status nodest

:tlbi "ASIDE1", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b1000 & b_0811=0b0111 & b_0507=0b010 & Rt_GPR64
{ TLBI_ASIDE1(Rt_GPR64); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5088760/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd5088760/mask=xffffffe0 --status nodest

:tlbi "VAAE1", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b1000 & b_0811=0b0111 & b_0507=0b011 & Rt_GPR64
{ TLBI_VAAE1(Rt_GPR64); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50c8780/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50c8780/mask=xffffffe0 --status nodest

:tlbi "ALLE1"
is b_1931=0b1101010100001 & b_1618=0b100 & b_1215=0b1000 & b_0811=0b0111 & b_0507=0b100
{ TLBI_ALLE1(); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50887a0/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50887a0/mask=xffffffe0 --status nodest

:tlbi "VALE1", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b1000 & b_0811=0b0111 & b_0507=0b101 & Rt_GPR64
{ TLBI_VALE1(Rt_GPR64); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50c87a0/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50c87a0/mask=xffffffe0 --status nodest

:tlbi "VALE2", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b100 & b_1215=0b1000 & b_0811=0b0111 & b_0507=0b101 & Rt_GPR64
{ TLBI_VALE2(Rt_GPR64); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50e87a0/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50e87a0/mask=xffffffe0 --status nodest

:tlbi "VALE3", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b110 & b_1215=0b1000 & b_0811=0b0111 & b_0507=0b101 & Rt_GPR64
{ TLBI_VALE3(Rt_GPR64); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50c87c0/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50c87c0/mask=xffffffe0 --status nodest

:tlbi "VMALLS12E1"
is b_1931=0b1101010100001 & b_1618=0b100 & b_1215=0b1000 & b_0811=0b0111 & b_0507=0b110
{ TLBI_VMALLS12E1(); }

# C6.2.378 TLBI page C6-1976 line 115920 MATCH xd5088000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50887e0/mask=xffffffe0 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50887e0/mask=xffffffe0 --status nodest

:tlbi "VAALE1", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b1000 & b_0811=0b0111 & b_0507=0b111 & Rt_GPR64
{ TLBI_VAALE1(Rt_GPR64); }

# C6.2.382 TST (immediate) page C6-1983 line 116255 MATCH x7200001f/mask=x7f80001f
# C6.2.14 ANDS (immediate) page C6-1169 line 69185 MATCH x72000000/mask=x7f800000
# CONSTRUCT x7200001f/mask=xff80001f MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x7200001f/mask=xff80001f --status pass --comment "flags"

:tst Rn_GPR32, DecodeWMask32
is sf=0 & opc=3 & b_2428=0x12 & b_2323=0 & DecodeWMask32 & Rn_GPR32 & Rd=0x1f
{
	tmp_2:4 = DecodeWMask32;
	tmp_1:4 = Rn_GPR32 & tmp_2;
	resultflags(tmp_1);
	affectLflags();
}

# C6.2.382 TST (immediate) page C6-1983 line 116255 MATCH x7200001f/mask=x7f80001f
# C6.2.14 ANDS (immediate) page C6-1169 line 69185 MATCH x72000000/mask=x7f800000
# CONSTRUCT xf200001f/mask=xff80001f MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xf200001f/mask=xff80001f --status pass --comment "flags"

:tst Rn_GPR64, DecodeWMask64
is sf=1 & opc=3 & b_2428=0x12 & b_2323=0 & DecodeWMask64 & Rn_GPR64 & Rd=0x1f
{
	tmp_2:8 = DecodeWMask64;
	tmp_1:8 = Rn_GPR64 & tmp_2;
	resultflags(tmp_1);
	affectLflags();
}

# C6.2.383 TST (shifted register) page C6-1984 line 116319 MATCH x6a00001f/mask=x7f20001f
# C6.2.15 ANDS (shifted register) page C6-1171 line 69286 MATCH x6a000000/mask=x7f200000
# CONSTRUCT x6a00001f/mask=xff20001f MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x6a00001f/mask=xff20001f --status pass --comment "flags"

:tst Rn_GPR32, RegShift32Log
is sf=0 & opc=3 & b_2428=0xa & N=0 & RegShift32Log & Rn_GPR32 & Rd=0x1f
{
	tmp_2:4 = RegShift32Log;
	tmp_1:4 = Rn_GPR32 & tmp_2;
	resultflags(tmp_1);
	affectLflags();
}

# C6.2.383 TST (shifted register) page C6-1984 line 116319 MATCH x6a00001f/mask=x7f20001f
# C6.2.15 ANDS (shifted register) page C6-1171 line 69286 MATCH x6a000000/mask=x7f200000
# CONSTRUCT xea00001f/mask=xff20001f MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xea00001f/mask=xff20001f --status pass --comment "flags"

:tst Rn_GPR64, RegShift64Log
is sf=1 & opc=3 & b_2428=0xa & N=0 & RegShift64Log & Rn_GPR64 & Rd=0x1f
{
	tmp_2:8 = RegShift64Log;
	tmp_1:8 = Rn_GPR64 & tmp_2;
	resultflags(tmp_1);
	affectLflags();
}

# C6.2.384 UBFIZ page C6-1986 line 116416 MATCH x53000000/mask=x7f800000
# C6.2.213 LSL (immediate) page C6-1654 line 98214 MATCH x53000000/mask=x7f800000
# C6.2.216 LSR (immediate) page C6-1660 line 98490 MATCH x53007c00/mask=x7f807c00
# C6.2.385 UBFM page C6-1988 line 116507 MATCH x53000000/mask=x7f800000
# C6.2.386 UBFX page C6-1991 line 116651 MATCH x53000000/mask=x7f800000
# C6.2.394 UXTB page C6-2002 line 117228 MATCH x53001c00/mask=xfffffc00
# C6.2.395 UXTH page C6-2003 line 117288 MATCH x53003c00/mask=xfffffc00
# CONSTRUCT x53000008/mask=xffe0800c MATCHED 7 DOCUMENTED OPCODES
# AUNIT --inst x53000008/mask=xffe0800c --status pass
# Special case of ubfm where UInt(imms) < UInt(immr).
# Note because LSL is preferred where imms + 1 == immr, we use ImmS_LT_ImmR_minus_1
# if sf == '0' && (N != '0' || immr<5> != '0' || imms<5> != '0') then ReservedValue();

:ubfiz Rd_GPR32, Rn_GPR32, ubfiz_lsb, ubfiz_width
is ImmS_LT_ImmR_minus_1=1 & ImmS_EQ_ImmR=0 & sf=0 & opc=2 & b_2428=0x13 & b_2323=0 & n=0 & b_21=0 & b_15=0 & ImmRConst32 & ubfiz_lsb & ubfiz_width & Rn_GPR32 & Rd_GPR32 & Rd_GPR64 & DecodeWMask32 & DecodeTMask32
{
	local wmask:4 = DecodeWMask32;
	local tmask:4 = DecodeTMask32;
	local src:4 = Rn_GPR32;
	local bot:4 = ((src>>ImmRConst32)|(src<<(32-ImmRConst32))) & wmask;
	Rd_GPR64 = zext(bot & tmask);
}

# C6.2.384 UBFIZ page C6-1986 line 116416 MATCH x53000000/mask=x7f800000
# C6.2.213 LSL (immediate) page C6-1654 line 98214 MATCH x53000000/mask=x7f800000
# C6.2.216 LSR (immediate) page C6-1660 line 98490 MATCH x53007c00/mask=x7f807c00
# C6.2.385 UBFM page C6-1988 line 116507 MATCH x53000000/mask=x7f800000
# C6.2.386 UBFX page C6-1991 line 116651 MATCH x53000000/mask=x7f800000
# CONSTRUCT xd340000a/mask=xffc0000a MATCHED 5 DOCUMENTED OPCODES
# AUNIT --inst xd340000a/mask=xffc0000a --status pass
# Special case of ubfm where UInt(imms) < UInt(immr).
# Note because LSL is preferred where imms + 1 == immr, we use ImmS_LT_ImmR_minus_1

:ubfiz Rd_GPR64, Rn_GPR64, ubfiz_lsb64, ubfiz_width
is ImmS_LT_ImmR_minus_1=1 & ImmS_LT_ImmR=1 & sf=1 & opc=2 & b_2428=0x13 & b_2323=0 & n=1 & ImmR_bitfield64_imm & ImmS_bitfield64_imm & ImmRConst64 & ubfiz_lsb64 & ubfiz_width & Rn_GPR64 & Rd_GPR64 & DecodeWMask64 & DecodeTMask64
{
	local wmask:8 = DecodeWMask64;
	local tmask:8 = DecodeTMask64;
	local src:8 = Rn_GPR64;
	local bot:8 = ((src>>ImmRConst64)|(src<<(64-ImmRConst64))) & wmask;
	Rd_GPR64 = bot & tmask;
}

# C6.2.385 UBFM page C6-1988 line 116507 MATCH x53000000/mask=x7f800000
# C6.2.213 LSL (immediate) page C6-1654 line 98214 MATCH x53000000/mask=x7f800000
# C6.2.216 LSR (immediate) page C6-1660 line 98490 MATCH x53007c00/mask=x7f807c00
# C6.2.384 UBFIZ page C6-1986 line 116416 MATCH x53000000/mask=x7f800000
# C6.2.386 UBFX page C6-1991 line 116651 MATCH x53000000/mask=x7f800000
# C6.2.394 UXTB page C6-2002 line 117228 MATCH x53001c00/mask=xfffffc00
# C6.2.395 UXTH page C6-2003 line 117288 MATCH x53003c00/mask=xfffffc00
# CONSTRUCT x53000000/mask=xffe08000 MATCHED 7 DOCUMENTED OPCODES
# AUNIT --inst x53000000/mask=xffe08000 --status pass
# if sf == '0' && (N != '0' || immr<5> != '0' || imms<5> != '0') then ReservedValue();

:ubfm Rd_GPR32, Rn_GPR32, ImmRConst32, ImmSConst32
is sf=0 & opc=2 & b_2428=0x13 & b_2323=0 & n=0 & b_21=0 & b_15=0 & ImmRConst32 & ImmSConst32 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64 & DecodeWMask32 & DecodeTMask32
{
	local wmask:4 = DecodeWMask32;
	local tmask:4 = DecodeTMask32;
	local src:4 = Rn_GPR32;
	local bot:4 = ((src>>ImmRConst32)|(src<<(32-ImmRConst32))) & wmask;
	Rd_GPR64 = zext(bot & tmask);
}

# C6.2.385 UBFM page C6-1988 line 116507 MATCH x53000000/mask=x7f800000
# C6.2.213 LSL (immediate) page C6-1654 line 98214 MATCH x53000000/mask=x7f800000
# C6.2.216 LSR (immediate) page C6-1660 line 98490 MATCH x53007c00/mask=x7f807c00
# C6.2.384 UBFIZ page C6-1986 line 116416 MATCH x53000000/mask=x7f800000
# C6.2.386 UBFX page C6-1991 line 116651 MATCH x53000000/mask=x7f800000
# CONSTRUCT xd3400000/mask=xffc00000 MATCHED 5 DOCUMENTED OPCODES
# AUNIT --inst xd3400000/mask=xffc00000 --status pass

:ubfm Rd_GPR64, Rn_GPR64, ImmRConst64, ImmSConst64
is sf=1 & opc=2 & b_2428=0x13 & b_2323=0 & n=1 & ImmR_bitfield64_imm & ImmS_bitfield64_imm & ImmRConst64 & ImmSConst64 & Rn_GPR64 & Rd_GPR64 & DecodeWMask64 & DecodeTMask64
{
	local wmask:8 = DecodeWMask64;
	local tmask:8 = DecodeTMask64;
	local src:8 = Rn_GPR64;
	local bot:8 = ((src>>ImmRConst64)|(src<<(64-ImmRConst64))) & wmask;
	Rd_GPR64 = bot & tmask;
}

# C6.2.386 UBFX page C6-1991 line 116651 MATCH x53000000/mask=x7f800000
# C6.2.213 LSL (immediate) page C6-1654 line 98214 MATCH x53000000/mask=x7f800000
# C6.2.216 LSR (immediate) page C6-1660 line 98490 MATCH x53007c00/mask=x7f807c00
# C6.2.384 UBFIZ page C6-1986 line 116416 MATCH x53000000/mask=x7f800000
# C6.2.385 UBFM page C6-1988 line 116507 MATCH x53000000/mask=x7f800000
# C6.2.394 UXTB page C6-2002 line 117228 MATCH x53001c00/mask=xfffffc00
# C6.2.395 UXTH page C6-2003 line 117288 MATCH x53003c00/mask=xfffffc00
# CONSTRUCT x53000010/mask=xffe0801a MATCHED 7 DOCUMENTED OPCODES
# AUNIT --inst x53000010/mask=xffe0801a --status pass
# Special case of ubfm as determined by BFXPreferred()
# if sf == '0' && (N != '0' || immr<5> != '0' || imms<5> != '0') then ReservedValue();

:ubfx Rd_GPR32, Rn_GPR32, ImmRConst32, ubfx_width
is ImmS_ne_1f=1 & ImmS_LT_ImmR=0 & ImmS_LT_ImmR_minus_1=0 & ImmRConst32 & ubfx_width & sf=0 & opc=2 & b_2428=0x13 & b_2323=0 & n=0 & b_21=0 & b_15=0 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64 & DecodeWMask32 & DecodeTMask32
{
	local wmask:4 = DecodeWMask32;
	local tmask:4 = DecodeTMask32;
	local src:4 = Rn_GPR32;
	local bot:4 = ((src>>ImmRConst32)|(src<<(32-ImmRConst32))) & wmask;
	Rd_GPR64 = zext(bot & tmask);
}

# C6.2.386 UBFX page C6-1991 line 116651 MATCH x53000000/mask=x7f800000
# C6.2.213 LSL (immediate) page C6-1654 line 98214 MATCH x53000000/mask=x7f800000
# C6.2.216 LSR (immediate) page C6-1660 line 98490 MATCH x53007c00/mask=x7f807c00
# C6.2.384 UBFIZ page C6-1986 line 116416 MATCH x53000000/mask=x7f800000
# C6.2.385 UBFM page C6-1988 line 116507 MATCH x53000000/mask=x7f800000
# CONSTRUCT xd3400020/mask=xffc0002a MATCHED 5 DOCUMENTED OPCODES
# AUNIT --inst xd3400020/mask=xffc0002a --status pass

# Special case of ubfm as determined by BFXPreferred()

:ubfx Rd_GPR64, Rn_GPR64, ImmRConst64, ubfx_width
is ImmS_ne_3f=1 & ImmS_LT_ImmR=0 & ImmS_LT_ImmR_minus_1=0 & ImmRConst64 & ubfx_width & sf=1 & opc=2 & b_2428=0x13 & b_2323=0 & n=1 & ImmR_bitfield64_imm & ImmS_bitfield64_imm & Rn_GPR64 & Rd_GPR64 & DecodeWMask64 & DecodeTMask64
{
	local wmask:8 = DecodeWMask64;
	local tmask:8 = DecodeTMask64;
	local src:8 = Rn_GPR64;
	local bot:8 = ((src>>ImmRConst64)|(src<<(64-ImmRConst64))) & wmask;
	Rd_GPR64 = bot & tmask;
}

# C6.2.388 UDIV page C6-1994 line 116786 MATCH x1ac00800/mask=x7fe0fc00
# CONSTRUCT x1ac00800/mask=xffe0fc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x1ac00800/mask=xffe0fc00 --status pass

:udiv Rd_GPR32, Rn_GPR32, Rm_GPR32
is sf=0 & b_3030=0 & S=0 & b_2428=0x1a & b_2123=6 & Rm_GPR32 & b_1015=0x2 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	local tmp_1:4 = 0;
	if (Rm_GPR32 == 0) goto <zero>;
	tmp_1 = Rn_GPR32 / Rm_GPR32;
<zero>
	Rd_GPR64 = zext(tmp_1);
}

# C6.2.388 UDIV page C6-1994 line 116786 MATCH x1ac00800/mask=x7fe0fc00
# CONSTRUCT x9ac00800/mask=xffe0fc00 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x9ac00800/mask=xffe0fc00 --status pass

:udiv Rd_GPR64, Rn_GPR64, Rm_GPR64
is sf=1 & b_3030=0 & S=0 & b_2428=0x1a & b_2123=6 & Rm_GPR64 & b_1015=0x2 & Rn_GPR64 & Rd_GPR64
{
	local tmp_1:8 = 0;
	if (Rm_GPR64 == 0) goto <zero>;
	tmp_1 = Rn_GPR64 / Rm_GPR64;
<zero>
	Rd_GPR64 = tmp_1;
}

# C6.2.389 UMADDL page C6-1995 line 116855 MATCH x9ba00000/mask=xffe08000
# CONSTRUCT x9ba00000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x9ba00000/mask=xffe08000 --status pass

:umaddl Rd_GPR64, Rn_GPR32, Rm_GPR32, Ra_GPR64
is sf=1 & op.dp3_op54=0 & b_2428=0x1b & op.dp3_op31=5 & Rm_GPR32 & op.dp3_o0=0 & Ra_GPR64 & Rn_GPR32 & Rd_GPR64
{
	tmp_3:8 = zext(Rn_GPR32);
	tmp_4:8 = zext(Rm_GPR32);
	tmp_2:8 = tmp_3 * tmp_4;
	tmp_1:8 = Ra_GPR64 + tmp_2;
	Rd_GPR64 = tmp_1;
}

# C6.2.390 UMNEGL page C6-1997 line 116945 MATCH x9ba0fc00/mask=xffe0fc00
# C6.2.391 UMSUBL page C6-1998 line 117009 MATCH x9ba08000/mask=xffe08000
# CONSTRUCT x9ba0fc00/mask=xffe0fc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x9ba0fc00/mask=xffe0fc00 --status pass

:umnegl Rd_GPR64, Rn_GPR32, Rm_GPR32
is sf=1 & op.dp3_op54=0 & b_2428=0x1b & op.dp3_op31=5 & Rm_GPR32 & op.dp3_o0=1 & Ra=0x1f & Rn_GPR32 & Rd_GPR64
{
	tmp_3:8 = zext(Rn_GPR32);
	tmp_4:8 = zext(Rm_GPR32);
	tmp_2:8 = tmp_3 * tmp_4;
	tmp_1:8 = - tmp_2;
	Rd_GPR64 = tmp_1;
}

# C6.2.391 UMSUBL page C6-1998 line 117009 MATCH x9ba08000/mask=xffe08000
# CONSTRUCT x9ba08000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x9ba08000/mask=xffe08000 --status pass

:umsubl Rd_GPR64, Rn_GPR32, Rm_GPR32, Ra_GPR64
is sf=1 & op.dp3_op54=0 & b_2428=0x1b & op.dp3_op31=5 & Rm_GPR32 & op.dp3_o0=1 & Ra_GPR64 & Rn_GPR32 & Rd_GPR64
{
	tmp_3:8 = zext(Rn_GPR32);
	tmp_4:8 = zext(Rm_GPR32);
	tmp_2:8 = tmp_3 * tmp_4;
	tmp_1:8 = Ra_GPR64 - tmp_2;
	Rd_GPR64 = tmp_1;
}

# C6.2.392 UMULH page C6-2000 line 117098 MATCH x9bc00000/mask=xffe08000
# CONSTRUCT x9bc00000/mask=xffe08000 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst x9bc00000/mask=xffe08000 --status pass
# To enforce SHOULD BE ONE fields add: b_1014=0b11111

:umulh Rd_GPR64, Rn_GPR64, Rm_GPR64
is sf=1 & op.dp3=0 & b_2428=0x1b & op.dp3_op31=6 & Rm_GPR64 & op.dp3_o0=0 & Ra & Rn_GPR64 & Rd_GPR64
{
	local tmpq:16 = zext(Rn_GPR64) * zext(Rm_GPR64);
	Rd_GPR64 = tmpq(8);
}

# C6.2.393 UMULL page C6-2001 line 117165 MATCH x9ba07c00/mask=xffe0fc00
# C6.2.389 UMADDL page C6-1995 line 116855 MATCH x9ba00000/mask=xffe08000
# CONSTRUCT x9ba07c00/mask=xffe0fc00 MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst x9ba07c00/mask=xffe0fc00 --status pass

:umull Rd_GPR64, Rn_GPR32, Rm_GPR32
is sf=1 & op.dp3_op54=0 & b_2428=0x1b & op.dp3_op31=5 & Rm_GPR32 & op.dp3_o0=0 & Ra=0x1f & Rn_GPR32 & Rd_GPR64
{
	tmp_3:8 = zext(Rn_GPR32);
	tmp_4:8 = zext(Rm_GPR32);
	tmp_2:8 = tmp_3 * tmp_4;
	Rd_GPR64 = tmp_2;
}

# C6.2.394 UXTB page C6-2002 line 117228 MATCH x53001c00/mask=xfffffc00
# C6.2.213 LSL (immediate) page C6-1654 line 98214 MATCH x53000000/mask=x7f800000
# C6.2.384 UBFIZ page C6-1986 line 116416 MATCH x53000000/mask=x7f800000
# C6.2.385 UBFM page C6-1988 line 116507 MATCH x53000000/mask=x7f800000
# C6.2.386 UBFX page C6-1991 line 116651 MATCH x53000000/mask=x7f800000
# CONSTRUCT x53001c10/mask=xfffffc1e MATCHED 5 DOCUMENTED OPCODES
# AUNIT --inst x53001c10/mask=xfffffc1e --status pass

# Alias for ubfm where immr=='000000' and imms='000111'
# These imply things about the inequalities

:uxtb Rd_GPR32, Rn_GPR32
is ImmR=0x0 & ImmS=0x7 & ImmS_ne_1f=1 & ImmS_LT_ImmR=0 & ImmS_LT_ImmR_minus_1=0 & ImmS_EQ_ImmR=0 & sf=0 & opc=2 & b_2428=0x13 & b_2323=0 & n=0 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp:4 = Rn_GPR32;
	Rd_GPR64 = zext(tmp:1);
}

# C6.2.395 UXTH page C6-2003 line 117288 MATCH x53003c00/mask=xfffffc00
# C6.2.213 LSL (immediate) page C6-1654 line 98214 MATCH x53000000/mask=x7f800000
# C6.2.384 UBFIZ page C6-1986 line 116416 MATCH x53000000/mask=x7f800000
# C6.2.385 UBFM page C6-1988 line 116507 MATCH x53000000/mask=x7f800000
# C6.2.386 UBFX page C6-1991 line 116651 MATCH x53000000/mask=x7f800000
# CONSTRUCT x53003c10/mask=xfffffc1e MATCHED 5 DOCUMENTED OPCODES
# AUNIT --inst x53003c10/mask=xfffffc1e --status pass

# Alias for ubfm where immr=='000000' and imms='001111'
# These imply things about the inequalities

:uxth Rd_GPR32, Rn_GPR32
is ImmR=0x0 & ImmS=0x0f & ImmS_ne_1f=1 & ImmS_LT_ImmR=0 & ImmS_LT_ImmR_minus_1=0 & ImmS_EQ_ImmR=0 & sf=0 & opc=2 & b_2428=0x13 & b_2323=0 & n=0 & Rn_GPR32 & Rd_GPR32 & Rd_GPR64
{
	tmp:4 = Rn_GPR32;
	Rd_GPR64 = zext(tmp:2);
}

# C6.2.396 WFE page C6-2004 line 117348 MATCH xd503205f/mask=xffffffff
# C6.2.126 HINT page C6-1480 line 88030 MATCH xd503201f/mask=xfffff01f
# CONSTRUCT xd503205f/mask=xffffffff MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd503205f/mask=xffffffff --status nodest

:wfe
is b_2431=0xd5 & b_2223=0 & l=0 & Op0=0 & Op1=3 & CRn=0x2 & imm7Low=2 & Rt=0x1f
{
	WaitForEvent();
}

# C6.2.397 WFET page C6-2005 line 117387 MATCH xd5031000/mask=xffffffe0
# CONSTRUCT xd5031000/mask=xffffffe0 MATCHED 1 DOCUMENTED OPCODES
# xd5031000/mask=xffffffe0 NOT MATCHED BY ANY CONSTRUCTOR
# b_0031=110101010000001100010000000.....

:wfet Rd_GPR64
is b_0531=0x6a81880 & Rd_GPR64
{
	WaitForEvent(Rd_GPR64);
}

# C6.2.398 WFI page C6-2006 line 117439 MATCH xd503207f/mask=xffffffff
# C6.2.126 HINT page C6-1480 line 88030 MATCH xd503201f/mask=xfffff01f
# CONSTRUCT xd503207f/mask=xffffffff MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd503207f/mask=xffffffff --status nodest

:wfi
is b_2431=0xd5 & b_2223=0 & l=0 & Op0=0 & Op1=3 & CRn=0x2 & imm7Low=3 & Rt=0x1f
{
	WaitForInterrupt();
}

# C6.2.399 WFIT page C6-2007 line 117477 MATCH xd5031020/mask=xffffffe0
# CONSTRUCT xd5031020/mask=xffffffe0 MATCHED 1 DOCUMENTED OPCODES
# xd5031020/mask=xffffffe0 NOT MATCHED BY ANY CONSTRUCTOR
# b_0031=110101010000001100010000001.....

:wfit Rd_GPR64
is b_0531=0x6a81881 & Rd_GPR64
{
	WaitForInterrupt(Rd_GPR64);
}

# C6.2.401 XPACD, XPACI, XPACLRI page C6-2009 line 117573 MATCH xdac143e0/mask=xfffffbe0
# CONSTRUCT xdac147e0/mask=xffffffe0 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xdac147e0/mask=xffffffe0 --status noqemu
# D == 1 XPACD variant

:xpacd Rd_GPR64
is xpacd__PACpart & b_1131=0b110110101100000101000 & b_0509=0b11111 & b_10=1 & Rd_GPR64
{
	build xpacd__PACpart;
}

# C6.2.401 XPACD, XPACI, XPACLRI page C6-2009 line 117573 MATCH xdac143e0/mask=xfffffbe0
# CONSTRUCT xdac143e0/mask=xffffffe0 MATCHED 1 DOCUMENTED OPCODES
# AUNIT --inst xdac143e0/mask=xffffffe0 --status noqemu
# D == 0 XPACI variant

:xpaci Rd_GPR64
is xpaci__PACpart & b_1131=0b110110101100000101000 & b_0509=0b11111 & b_10=0 & Rd_GPR64
{
	build xpaci__PACpart;
}

# C6.2.401 XPACD, XPACI, XPACLRI page C6-2009 line 117573 MATCH xd50320ff/mask=xffffffff
# C6.2.126 HINT page C6-1480 line 88030 MATCH xd503201f/mask=xfffff01f
# CONSTRUCT xd50320ff/mask=xffffffff MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd50320ff/mask=xffffffff --status nodest
# System variant

:xpaclri
is xpaclri__PACpart & b_0031=0b11010101000000110010000011111111
{
	build xpaclri__PACpart;
}

# C6.2.402 YIELD page C6-2011 line 117656 MATCH xd503203f/mask=xffffffff
# C6.2.126 HINT page C6-1480 line 88030 MATCH xd503201f/mask=xfffff01f
# CONSTRUCT xd503203f/mask=xffffffff MATCHED 2 DOCUMENTED OPCODES
# AUNIT --inst xd503203f/mask=xffffffff --status nodest

:yield
is b_2431=0xd5 & b_2223=0 & l=0 & Op0=0 & Op1=3 & CRn=0x2 & imm7Low=1 & Rt=0x1f
{
	Yield();
}

# C6.2.6 ADDG page C6-787 line 46877 MATCH KEEPWITH

with : ShowMemTag=1 {

# C6.2.6 ADDG page C6-1155 line 68448 MATCH x91800000/mask=xffc00000
# CONSTRUCT x91800000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES

:addg Rd_GPR64xsp, Rn_GPR64xsp, "#"^shifted_imm, "#"^b_1013
is sf=1 & op=0 & S=0 & b_2328=0b100011 & b_22=0 & b_1621 & b_1013 & Rd_GPR64xsp & Rn_GPR64xsp
# " & b_1415=0" is not required by the spec (op3 doesn't have any requirements and is not used)
[ shifted_imm = b_1621 << $(LOG2_TAG_GRANULE); ]
{
	# we don't actually modify the target register, so Ghidra understands the pointer target is still the same.
	# pseudo-ops let us do that, but it means that the decompiler can put an unintuitive value in the
	# "CopyPtrTag_AddToPtrTag_Exclude" argument, e.g. "param_2 + 0x20".
	uimm4:1 = b_1013;
	exclude:2 = 0;
	Or2BytesWithExcludedTags(exclude);
	Rd_GPR64xsp = Rn_GPR64xsp + shifted_imm;
	CopyPtrTag_AddToPtrTag_Exclude(Rd_GPR64xsp, Rn_GPR64xsp, uimm4, exclude);
}

}

# C6.2.6 ADDG page C6-787 line 44223 KEEPWITH
with : ShowMemTag=0 {

# C6.2.6 ADDG page C6-1155 line 68448 MATCH x91800000/mask=xffc00000
# CONSTRUCT x91800000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES

:addg Rd_GPR64xsp, Rn_GPR64xsp, "#"^shifted_imm, "#"^b_1013
is sf=1 & op=0 & S=0 & b_2328=0b100011 & b_22=0 & b_1621 & b_1013 & Rd_GPR64xsp & Rn_GPR64xsp
# " & b_1415=0" is not required by the spec (op3 doesn't have any requirements and is not used)
[ shifted_imm = b_1621 << $(LOG2_TAG_GRANULE); ]
{
	Rd_GPR64xsp = Rn_GPR64xsp + shifted_imm;
}

}


# C6.2.24 AXFLAG page C6-1189 line 70222 MATCH xd500405f/mask=xfffff0ff
# C6.2.229 MSR (immediate) page C6-1684 line 99649 MATCH xd500401f/mask=xfff8f01f
# CONSTRUCT xd500405f/mask=xfffff0ff MATCHED 2 DOCUMENTED OPCODES
# To enforce SHOULD BE ZERO fields add: b_0811=0b0000
:axflag
is b_1231=0b11010101000000000100 & b_0007=0b01011111
{
	tmpZR = ZR | OV;
	tmpCY = CY & !OV;

	NG = 0;
	ZR = tmpZR;
	CY = tmpCY;
	OV = 0;
}

# C6.2.41 BTI page C6-1214 line 71457 MATCH xd503241f/mask=xffffff3f
# C6.2.126 HINT page C6-1480 line 88030 MATCH xd503201f/mask=xfffff01f
# CONSTRUCT xd503241f/mask=xffffff1f MATCHED 2 DOCUMENTED OPCODES

:bti BTI_BTITARGETS
is BTI_BTITARGETS & b_1231=0xd5032 & b_0811=4 & b_0004=0x1f
{
	# This instruction is a valid target for jumps, calls, or both; see the BTI_BTITARGETS table.
}

# C6.2.53 CFP page C6-1237 line 72667 MATCH xd50b7380/mask=xffffffe0
# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50b7380/mask=xffffffe0 MATCHED 4 DOCUMENTED OPCODES

:cfp "RCTX", Rt_GPR64
is b_1931=0b1101010100001 & Op1_uimm3=3 & b_1215=7 & b_0811=3 & Op2_uimm3=4 & Rt_GPR64
{
	ControlFlowPredictionRestrictionByContext(Rt_GPR64);
}


# C6.2.65 CMPP page C6-1258 line 73720 MATCH xbac0001f/mask=xffe0fc1f
# C6.2.361 SUBPS page C6-1949 line 114470 MATCH xbac00000/mask=xffe0fc00
# CONSTRUCT xbac0001f/mask=xffe0fc1f MATCHED 2 DOCUMENTED OPCODES
# CMPP: Compare Pointers
#  Compare two pointer 56-bit pointer values and set flags
:cmpp Rn_GPR64xsp, Rm_GPR64xsp
is sf=1 & b_30=0 & S=1 & b_2128=0b11010110 & Rm_GPR64xsp & b_1015=0b000000 & Rd=0b11111 & Rn_GPR64xsp
{
	# out of a 64-bit value, keep the lowest 56 bits, which is 7 bytes.
	# sign-extend a 7-byte value to an 8-byte value.  If the boundary weren't byte-aligned,
	# sext() wouldn't work so well.
	tmp_2:8 = Rm_GPR64xsp;
	tmp_2 = sext(tmp_2:7);  # if Rm:7 is used here, the decompiler considers the Rm register an int7 for the whole function.
	tmp_1:8 = Rn_GPR64xsp;
	tmp_1 = sext(tmp_1:7);
	subflags(tmp_1, tmp_2);
	tmp_1 = tmp_1 - tmp_2;
	resultflags(tmp_1);
	affectflags();
}


# C6.2.67 CPP page C6-1261 line 73861 MATCH xd50b73e0/mask=xffffffe0
# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50b73e0/mask=xffffffe0 MATCHED 4 DOCUMENTED OPCODES

:cpp "RCTX", Rt_GPR64
is b_1931=0b1101010100001 & Op1_uimm3=3 & b_1215=7 & b_0811=3 & Op2_uimm3=7 & Rt_GPR64
{
	CachePrefetchPredictionRestrictionByContext(Rt_GPR64);
}

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5087660/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES
# the new DC instruction types from ARMv8.5

:dc "IGVAC", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b0111 & b_0811=0b0110 & b_0507=0b011 & Rt_GPR64
{ DC_IGVAC(Rt_GPR64); }

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5087680/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES

:dc "IGSW", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b0111 & b_0811=0b0110 & b_0507=0b100 & Rt_GPR64
{ DC_IGSW(Rt_GPR64); }

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50876a0/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES

:dc "IGDVAC", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b0111 & b_0811=0b0110 & b_0507=0b101 & Rt_GPR64
{ DC_IGDVAC(Rt_GPR64); }

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50876c0/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES

:dc "IGDSW", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b0111 & b_0811=0b0110 & b_0507=0b110 & Rt_GPR64
{ DC_IGDSW(Rt_GPR64); }

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5087a80/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES

:dc "CGSW", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b0111 & b_0811=0b1010 & b_0507=0b100 & Rt_GPR64
{ DC_CGSW(Rt_GPR64); }

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5087ac0/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES

:dc "CGDSW", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b0111 & b_0811=0b1010 & b_0507=0b110 & Rt_GPR64
{ DC_CGDSW(Rt_GPR64); }

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5087e80/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES

:dc "CIGSW", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b0111 & b_0811=0b1110 & b_0507=0b100 & Rt_GPR64
{ DC_CIGSW(Rt_GPR64); }

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd5087ec0/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES

:dc "CIGDSW", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b000 & b_1215=0b0111 & b_0811=0b1110 & b_0507=0b110 & Rt_GPR64
{ DC_CIGDSW(Rt_GPR64); }

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50b7460/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES

:dc "GVA", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b011 & b_1215=0b0111 & b_0811=0b0100 & b_0507=0b011 & Rt_GPR64
{ DC_GVA(Rt_GPR64); }

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50b7480/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES

:dc "GZVA", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b011 & b_1215=0b0111 & b_0811=0b0100 & b_0507=0b100 & Rt_GPR64
{ DC_GZVA(Rt_GPR64); }

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50b7a60/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES

:dc "CGVAC", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b011 & b_1215=0b0111 & b_0811=0b1010 & b_0507=0b011 & Rt_GPR64
{ DC_CGVAC(Rt_GPR64); }

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50b7aa0/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES

:dc "CGDVAC", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b011 & b_1215=0b0111 & b_0811=0b1010 & b_0507=0b101 & Rt_GPR64
{ DC_CGDVAC(Rt_GPR64); }

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50b7c60/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES

:dc "CGVAP", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b011 & b_1215=0b0111 & b_0811=0b1100 & b_0507=0b011 & Rt_GPR64
{ DC_CGVAP(Rt_GPR64); }

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50b7ca0/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES

:dc "CGDVAP", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b011 & b_1215=0b0111 & b_0811=0b1100 & b_0507=0b101 & Rt_GPR64
{ DC_CGDVAP(Rt_GPR64); }

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50b7d60/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES

:dc "CGVADP", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b011 & b_1215=0b0111 & b_0811=0b1101 & b_0507=0b011 & Rt_GPR64
{ DC_CGVADP(Rt_GPR64); }

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50b7da0/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES

:dc "CGDVADP", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b011 & b_1215=0b0111 & b_0811=0b1101 & b_0507=0b101 & Rt_GPR64
{ DC_CGDVADP(Rt_GPR64); }

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50b7e60/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES

:dc "CIGVAC", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b011 & b_1215=0b0111 & b_0811=0b1110 & b_0507=0b011 & Rt_GPR64
{ DC_CIGVAC(Rt_GPR64); }

# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50b7ea0/mask=xffffffe0 MATCHED 3 DOCUMENTED OPCODES

:dc "CIGDVAC", Rt_GPR64
is b_1931=0b1101010100001 & b_1618=0b011 & b_1215=0b0111 & b_0811=0b1110 & b_0507=0b101 & Rt_GPR64
{ DC_CIGDVAC(Rt_GPR64); }

# C6.2.117 DVP page C6-1467 line 87355 MATCH xd50b73a0/mask=xffffffe0
# C6.2.109 DC page C6-1455 line 86693 MATCH xd5087000/mask=xfff8f000
# C6.2.129 IC page C6-1484 line 88281 MATCH xd5087000/mask=xfff8f000
# C6.2.372 SYS page C6-1969 line 115559 MATCH xd5080000/mask=xfff80000
# CONSTRUCT xd50b73a0/mask=xffffffe0 MATCHED 4 DOCUMENTED OPCODES

:dvp "RCTX", Rt_GPR64
is b_1931=0b1101010100001 & Op1_uimm3=3 & b_1215=7 & b_0811=3 & Op2_uimm3=5 & Rt_GPR64
{
	DataValuePredictionRestrictionByContext(Rt_GPR64);
}


# GMI: Tag Mask Insert
#  Extracts tag from first source register (Xn) and adds as an excluded tag to list of excluded
# tags in second source register, writing the updated exclusion set to the destination register

with : ShowMemTag=1 {

# C6.2.125 GMI page C6-1479 line 87976 MATCH x9ac01400/mask=xffe0fc00
# CONSTRUCT x9ac01400/mask=xffe0fc00 MATCHED 1 DOCUMENTED OPCODES

:gmi Rd_GPR64, Rn_GPR64xsp, Rm_GPR64
is sf=1 & b_30=0 & S=0 & b_2128=0b11010110 & Rm_GPR64 & b_1015=0b000101 & Rn_GPR64xsp & Rd_GPR64
{
	# get tag from address
	#tag:8 = (Rn_GPR64xsp >> 56) & 0xf;
	tag:8 = 0;
	AllocationTagFromAddress(tag, Rn_GPR64xsp);
	Rd_GPR64 = Rm_GPR64 | (1 << tag);
}

}
with : ShowMemTag=0 {

# C6.2.125 GMI page C6-1479 line 87976 MATCH x9ac01400/mask=xffe0fc00
# CONSTRUCT x9ac01400/mask=xffe0fc00 MATCHED 1 DOCUMENTED OPCODES

:gmi Rd_GPR64, Rn_GPR64xsp, Rm_GPR64
is sf=1 & b_30=0 & S=0 & b_2128=0b11010110 & Rm_GPR64 & b_1015=0b000101 & Rn_GPR64xsp & Rd_GPR64
{
	# The only expected use of the output of this instruction is in "exclude" arguments, which will be totally ignored
	# with ShowMemTag off anyway, so for the sake of more concise code don't set any mask bits at all.
	Rd_GPR64 = Rm_GPR64;
}

}

# IRG: Insert Random Tag
#  Generates random tag (honoring excluded tags specified in optional second source register
# and GCR_EL1.Exclude) into the address from first source register, writing the result to the
# destination register.
with : ShowMemTag=1 {

# C6.2.130 IRG page C6-1485 line 88340 MATCH x9ac01000/mask=xffe0fc00
# CONSTRUCT x9ac01000/mask=xffe0fc00 MATCHED 1 DOCUMENTED OPCODES

:irg Rd_GPR64xsp, Rn_GPR64xsp^OPTIONAL_XM
is sf=1 & b_30=0 & S=0 & b_2128=0b11010110 & OPTIONAL_XM & b_1015=0b000100 & Rn_GPR64xsp & Rd_GPR64xsp
{
	tmp:8 = OPTIONAL_XM;
	exclude:2 = tmp:2;
	Or2BytesWithExcludedTags(exclude);
	Rd_GPR64xsp = Rn_GPR64xsp;
	RandomizePtrTag_Exclude(Rd_GPR64xsp, exclude);
}

}
with : ShowMemTag=0 {

# C6.2.130 IRG page C6-1485 line 88340 MATCH x9ac01000/mask=xffe0fc00
# CONSTRUCT x9ac01000/mask=xffe0fc00 MATCHED 1 DOCUMENTED OPCODES

:irg Rd_GPR64xsp, Rn_GPR64xsp^OPTIONAL_XM
is sf=1 & b_30=0 & S=0 & b_2128=0b11010110 & OPTIONAL_XM & b_1015=0b000100 & Rn_GPR64xsp & Rd_GPR64xsp
{
	Rd_GPR64xsp = Rn_GPR64xsp;
}

}


with : ShowMemTag=1 {

# C6.2.158 LDG page C6-1538 line 91337 MATCH xd9600000/mask=xffe00c00
# CONSTRUCT xd9600000/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES

:ldg Rt_GPR64, addr_granuleSIMM
is b_2131=0b11011001011 & addr_granuleSIMM & b_1011=0b00 & Rt_GPR64
{
	tmp:8 = addr_granuleSIMM;
	Align(tmp, $(TAG_GRANULE));
	tag:8 = LoadMemTag(tmp);
	SetPtrTag(Rt_GPR64, tag);
}

}
with : ShowMemTag=0 {

# C6.2.158 LDG page C6-1538 line 91337 MATCH xd9600000/mask=xffe00c00
# CONSTRUCT xd9600000/mask=xffe00c00 MATCHED 1 DOCUMENTED OPCODES

:ldg Rt_GPR64, addr_granuleSIMM
is b_2131=0b11011001011 & addr_granuleSIMM & b_1011=0b00 & Rt_GPR64
{
}

}


with : ShowMemTag=1 {

# C6.2.159 LDGM page C6-1539 line 91400 MATCH xd9e00000/mask=xfffffc00
# CONSTRUCT xd9e00000/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES

:ldgm Rt_GPR64, "["^Rn_GPR64xsp^"]"
is b_1031=0b1101100111100000000000 & Rt_GPR64 & Rn_GPR64xsp
{
	sze:8 = 4 << (gmid_el1 & 0xf);  # The value in parentheses (GMID_EL1.BS) varies between 2 and 6.
	address:8 = Rn_GPR64xsp;
	Align(address, sze);  # this ensures that address will be granule-aligned, so we don't need to check it
	count:8 = sze >> $(LOG2_TAG_GRANULE);
	data:8 = 0:8;  # output value
	index:8 = (address >> $(LOG2_TAG_GRANULE)) & 0xf;
	# for tmp = 0 to count-1
	tmp:8 = 0;
<loopstart>
	tag:8 = LoadMemTag(address) & 0xf;
		# The 0xf doesn't do anything to streamline the representation of this
		# instruction in the decompiler, but it shows the size of a tag.
	data = data | (tag << (index * 4));
	address = address + $(TAG_GRANULE);
	index = index + 1;
	tmp = tmp + 1;
	# next tmp
	if (tmp < count) goto <loopstart>;
	Rt_GPR64 = data;
}

}
with : ShowMemTag=0 {

# C6.2.159 LDGM page C6-1539 line 91400 MATCH xd9e00000/mask=xfffffc00
# CONSTRUCT xd9e00000/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES

:ldgm Rt_GPR64, "["^Rn_GPR64xsp^"]"
is b_1031=0b1101100111100000000000 & Rt_GPR64 & Rn_GPR64xsp
{
	data:8 = 0:8;  # output value
	Rt_GPR64 = data;
}

}

# C6.2.132 LD64B page C6-1488 line 88475 MATCH xf83fd000/mask=xfffffc00
# CONSTRUCT xf83fd000/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES
# xf83fd000/mask=xfffffc00 NOT MATCHED BY ANY CONSTRUCTOR
# b_0031=1111100000111111110100..........

# Single-copy Atomic 64-byte Load
:ld64b Rn_GPR64, [Rt_GPR64xsp]
is b_1031=0x3e0ff4 & Rn_GPR64 & Rt_GPR64xsp {
	Rn_GPR64 = *Rt_GPR64xsp;
}


# C6.2.292 ST64B page C6-1813 line 107121 MATCH xf83f9000/mask=xfffffc00
# CONSTRUCT xf83f9000/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES

:st64b Rn_GPR64, [Rt_GPR64xsp]
is b_1031=0x3e0fe4 & Rn_GPR64 & Rt_GPR64xsp {
	*Rt_GPR64xsp = Rn_GPR64;
}


# C6.2.293 ST64BV page C6-1814 line 107190 MATCH xf820b000/mask=xffe0fc00
# CONSTRUCT xf820b000/mask=xffe0fc00 MATCHED 1 DOCUMENTED OPCODES
define pcodeop store64ByteAtomic;
:st64bv Rs_GPR64, Rn_GPR64, [Rt_GPR64xsp]
is b_2131=0x7c1 & Rs_GPR64 & b_1015=0x2c & Rn_GPR64 & Rt_GPR64xsp {
	*Rt_GPR64xsp = Rn_GPR64;
	Rs_GPR64 = store64ByteAtomic(Rn_GPR64, Rt_GPR64xsp);
}


# C6.2.294 ST64BV0 page C6-1816 line 107284 MATCH xf820a000/mask=xffe0fc00
# CONSTRUCT xf820a000/mask=xffe0fc00 MATCHED 1 DOCUMENTED OPCODES

:st64bv0
is b_2131=0b11111000001 & Rs_GPR64 & b_1015=0x28 & Rn_GPR64 & Rt_GPR64xsp {
	local st64bv_addr:8 = (Rt_GPR64xsp & 0xffff0000) | (accdata & 0xffff);
	*st64bv_addr = Rn_GPR64;
	Rs_GPR64 = store64ByteAtomic(Rn_GPR64, st64bv_addr);
}


addrGranuleIndexed_checkAlignment: addrGranuleIndexed is Rn=0b11111 & addrGranuleIndexed { export addrGranuleIndexed; }  # don't check alignment if we're working with the stack, it's assumed to be 16-byte-aligned, though that is technically optional
addrGranuleIndexed_checkAlignment: addrGranuleIndexed is Rn & addrGranuleIndexed { tmp:8 = addrGranuleIndexed; RequireGranuleAlignment(tmp); export tmp; }  # if the address in tmp is derived from sp, the error condition in RequireGranuleAlignment can still be an unreachable block; it doesn't seem possible to avoid the decompiler message in that case

addrPairGranuleIndexed_checkAlignment: addrPairGranuleIndexed is Rn=0b11111 & addrPairGranuleIndexed { export addrPairGranuleIndexed; }  # don't check alignment if we're working with the stack, it's assumed to be 16-byte-aligned, though that is technically optional
addrPairGranuleIndexed_checkAlignment: addrPairGranuleIndexed is Rn & addrPairGranuleIndexed { tmp:8 = addrPairGranuleIndexed; RequireGranuleAlignment(tmp); export tmp; }  # if the address in tmp is derived from sp, the error condition in RequireGranuleAlignment can still be an unreachable block; it doesn't seem possible to avoid the decompiler message in that case


with : ShowMemTag=1 {

# C6.2.291 ST2G page C6-1811 line 106987 MATCH xd9a00400/mask=xffe00c00
# C6.2.291 ST2G page C6-1811 line 106987 MATCH xd9a00c00/mask=xffe00c00
# C6.2.291 ST2G page C6-1811 line 106987 MATCH xd9a00800/mask=xffe00c00
# CONSTRUCT xd9a00000/mask=xffe00000 MATCHED 3 DOCUMENTED OPCODES

:st2g Rt_GPR64xsp, addrGranuleIndexed_checkAlignment
is b_2131=0b11011001101 & (b_10=1 | b_11=1) & Rt_GPR64xsp & addrGranuleIndexed_checkAlignment
{
	# in case Rt == Rn, get the tag first so any updates in addrGranuleIndexed_checkAlignment don't affect it
	tag:8 = 0;
	AllocationTagFromAddress(tag, Rt_GPR64xsp);

	build addrGranuleIndexed_checkAlignment;

	# this instruction throws an alignment fault if address is not granule-aligned
	address:8 = addrGranuleIndexed_checkAlignment;

	StoreMemTag(address, tag );
	StoreMemTag(address + $(TAG_GRANULE), tag );
}

}
with : ShowMemTag=0 {

# C6.2.291 ST2G page C6-1811 line 106987 MATCH xd9a00400/mask=xffe00c00
# C6.2.291 ST2G page C6-1811 line 106987 MATCH xd9a00c00/mask=xffe00c00
# C6.2.291 ST2G page C6-1811 line 106987 MATCH xd9a00800/mask=xffe00c00
# CONSTRUCT xd9a00000/mask=xffe00000 MATCHED 3 DOCUMENTED OPCODES

:st2g Rt_GPR64xsp, addrGranuleIndexed
is b_2131=0b11011001101 & (b_10=1 | b_11=1) & Rt_GPR64xsp & addrGranuleIndexed
{
	# for the sake of simplified output, omit the alignment check when ShowMemTag is off
}

}


with : ShowMemTag=1 {

# C6.2.304 STG page C6-1836 line 108242 MATCH xd9200400/mask=xffe00c00
# C6.2.304 STG page C6-1836 line 108242 MATCH xd9200c00/mask=xffe00c00
# C6.2.304 STG page C6-1836 line 108242 MATCH xd9200800/mask=xffe00c00
# CONSTRUCT xd9200000/mask=xffe00000 MATCHED 3 DOCUMENTED OPCODES

:stg Rt_GPR64xsp, addrGranuleIndexed_checkAlignment
is b_2131=0b11011001001 & (b_10=1 | b_11=1) & Rt_GPR64xsp & addrGranuleIndexed_checkAlignment
{
	# in case Rt == Rn, get the tag first so any updates in addrGranuleIndexed_checkAlignment don't affect it
	tag:8 = 0;
	AllocationTagFromAddress(tag, Rt_GPR64xsp);

	build addrGranuleIndexed_checkAlignment;

	# this instruction throws an alignment fault if address is not granule-aligned
	address:8 = addrGranuleIndexed_checkAlignment;

	StoreMemTag(address, tag );
}

}
with : ShowMemTag=0 {

# C6.2.304 STG page C6-1836 line 108242 MATCH xd9200400/mask=xffe00c00
# C6.2.304 STG page C6-1836 line 108242 MATCH xd9200c00/mask=xffe00c00
# C6.2.304 STG page C6-1836 line 108242 MATCH xd9200800/mask=xffe00c00
# CONSTRUCT xd9200000/mask=xffe00000 MATCHED 3 DOCUMENTED OPCODES

:stg Rt_GPR64xsp, addrGranuleIndexed
is b_2131=0b11011001001 & (b_10=1 | b_11=1) & Rt_GPR64xsp & addrGranuleIndexed
{
	# for the sake of simplified output, omit the alignment check when ShowMemTag is off
}

}


with : ShowMemTag=1 {

# C6.2.305 STGM page C6-1838 line 108375 MATCH xd9a00000/mask=xfffffc00
# CONSTRUCT xd9a00000/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES

:stgm Rt_GPR64, "["^Rn_GPR64xsp^"]"
is b_1031=0b1101100110100000000000 & Rt_GPR64 & Rn_GPR64xsp
{
	sze:8 = 4 << (gmid_el1 & 0xf);  # The value of GMID_EL1.BS varies between 2 and 6.  Can that be asserted somehow?
	address:8 = Rn_GPR64xsp;
	Align(address, sze);  # this ensures that address will be granule-aligned, so we don't need to check it
	count:8 = sze >> $(LOG2_TAG_GRANULE);
	data:8 = Rt_GPR64;
	index:8 = (address >> $(LOG2_TAG_GRANULE)) & 0xf;
	# for tmp = 0 to count-1
	tmp:8 = 0;
<loopstart>
	# This could also be done by leaving index and address constant and adding a tmp-based
	# offset to them both, but that crams everything together into the StoreMemTag line in
	# the decompiler and makes it harder to assign names and figure out what's going on.
	# (Or at least, my opinion is that it's harder that way.)
	# Also in favor of this design is that the ARM spec pseudocode describes it this way,
	# so it's easier to see that this code matches the pseudocode.
	tag:8 = (data >> (index * 4)) & 0xf;
	StoreMemTag(address, tag );
	address = address + $(TAG_GRANULE);
	index = index + 1;
	tmp = tmp + 1;
	# next tmp
	if (tmp < count) goto <loopstart>;
}

}
with : ShowMemTag=0 {

# C6.2.305 STGM page C6-1838 line 108375 MATCH xd9a00000/mask=xfffffc00
# CONSTRUCT xd9a00000/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES

:stgm Rt_GPR64, "["^Rn_GPR64xsp^"]"
is b_1031=0b1101100110100000000000 & Rt_GPR64 & Rn_GPR64xsp
{
}

}


with : ShowMemTag=1 {

# C6.2.306 STGP page C6-1839 line 108445 MATCH x68800000/mask=xffc00000
# C6.2.306 STGP page C6-1839 line 108445 MATCH x69800000/mask=xffc00000
# C6.2.306 STGP page C6-1839 line 108445 MATCH x69000000/mask=xffc00000
# CONSTRUCT x68000000/mask=xfe400000 MATCHED 3 DOCUMENTED OPCODES

:stgp Rt_GPR64, Rt2_GPR64, addrPairGranuleIndexed_checkAlignment
is b_3031=0b01 & b_2529=0b10100 & (b_23=1 | b_24=1) & b_22=0 & Rt2_GPR64 & addrPairGranuleIndexed_checkAlignment & Rt_GPR64
{
	# Read all registers before addrPairGranuleIndexed_checkAlignment takes effect, or pre-index writeback could modify their values
	# (unusually, this instruction does not have unpredictable behavior in that case).
	data1:8 = Rt_GPR64;
	data2:8 = Rt2_GPR64;

	build addrPairGranuleIndexed_checkAlignment;
	address:8 = addrPairGranuleIndexed_checkAlignment;  # StoreMemTag requires granule alignment

	tag:8 = 0;
	AllocationTagFromAddress(tag, address);

	# The decompiler apparently doesn't show changes to [sp+X] unless the new values
	# are used in the function.  However, the changes really are happening.
	*address = data1;
	*(address + 8) = data2;
	StoreMemTag(address, tag);
}

}
with : ShowMemTag=0 {

# C6.2.306 STGP page C6-1839 line 108445 MATCH x68800000/mask=xffc00000
# C6.2.306 STGP page C6-1839 line 108445 MATCH x69800000/mask=xffc00000
# C6.2.306 STGP page C6-1839 line 108445 MATCH x69000000/mask=xffc00000
# CONSTRUCT x68000000/mask=xfe400000 MATCHED 3 DOCUMENTED OPCODES

:stgp Rt_GPR64, Rt2_GPR64, addrPairGranuleIndexed
is b_3031=0b01 & b_2529=0b10100 & (b_23=1 | b_24=1) & b_22=0 & Rt2_GPR64 & addrPairGranuleIndexed & Rt_GPR64
{
	# Read all registers before addrPairGranuleIndexed takes effect, or pre-index writeback could modify their values
	# (unusually, this instruction does not have unpredictable behavior in this case).
	data1:8 = Rt_GPR64;
	data2:8 = Rt2_GPR64;

	# for the sake of simplified output, omit the alignment check when ShowMemTag is off
	build addrPairGranuleIndexed;
	address:8 = addrPairGranuleIndexed;

	# The decompiler apparently doesn't show changes to [sp+X] unless the new values
	# are used in the function.  However, the changes really are happening.
	*address = data1;
	*(address + 8) = data2;
}

}


with : ShowMemTag=1 {

# C6.2.353 STZ2G page C6-1935 line 113626 MATCH xd9e00400/mask=xffe00c00
# C6.2.353 STZ2G page C6-1935 line 113626 MATCH xd9e00c00/mask=xffe00c00
# C6.2.353 STZ2G page C6-1935 line 113626 MATCH xd9e00800/mask=xffe00c00
# CONSTRUCT xd9e00000/mask=xffe00000 MATCHED 3 DOCUMENTED OPCODES

:stz2g Rt_GPR64xsp, addrGranuleIndexed_checkAlignment
is b_2131=0b11011001111 & (b_10=1 | b_11=1) & addrGranuleIndexed_checkAlignment & Rt_GPR64xsp
{
	tag:8 = 0;
	AllocationTagFromAddress(tag, Rt_GPR64xsp);

	# Although the zero-storage is not required to be granule-aligned, the tag-updating is,
	# so effectively the entire operation must be at a granule-aligned address.
	build addrGranuleIndexed_checkAlignment;
	address:8 = addrGranuleIndexed_checkAlignment;

	# store two granules worth of zeros and tag it from Rt
	tmp:8 = 0;
	addr:8 = 0;
	count:8 = $(TAG_GRANULE) * 2;
<loopstart>
	addr = address + tmp;
	*addr = 0:8;
	tmp = tmp + 8;
	if (tmp < count) goto <loopstart>;

	StoreMemTag(address, tag);
	StoreMemTag(address + $(TAG_GRANULE), tag);
}

}
with : ShowMemTag=0 {

# C6.2.353 STZ2G page C6-1935 line 113626 MATCH xd9e00400/mask=xffe00c00
# C6.2.353 STZ2G page C6-1935 line 113626 MATCH xd9e00c00/mask=xffe00c00
# C6.2.353 STZ2G page C6-1935 line 113626 MATCH xd9e00800/mask=xffe00c00
# CONSTRUCT xd9e00000/mask=xffe00000 MATCHED 3 DOCUMENTED OPCODES

:stz2g Rt_GPR64xsp, addrGranuleIndexed
is b_2131=0b11011001111 & (b_10=1 | b_11=1) & addrGranuleIndexed & Rt_GPR64xsp
{
	# for the sake of simplified output, omit the alignment check when ShowMemTag is off
	build addrGranuleIndexed;
	address:8 = addrGranuleIndexed;

	# store two granules worth of zeros
	tmp:8 = 0;
	addr:8 = 0;
	count:8 = $(TAG_GRANULE) * 2;
<loopstart>
	addr = address + tmp;
	*addr = 0:8;
	tmp = tmp + 8;
	if (tmp < count) goto <loopstart>;
}

}


with : ShowMemTag=1 {

# C6.2.354 STZG page C6-1937 line 113766 MATCH xd9600400/mask=xffe00c00
# C6.2.354 STZG page C6-1937 line 113766 MATCH xd9600c00/mask=xffe00c00
# C6.2.354 STZG page C6-1937 line 113766 MATCH xd9600800/mask=xffe00c00
# CONSTRUCT xd9600000/mask=xffe00000 MATCHED 3 DOCUMENTED OPCODES

:stzg Rt_GPR64xsp, addrGranuleIndexed_checkAlignment
is b_2131=0b11011001011 & (b_10=1 | b_11=1) & addrGranuleIndexed_checkAlignment & Rt_GPR64xsp
{
	tag:8 = 0;
	AllocationTagFromAddress(tag, Rt_GPR64xsp);

	# Although the zero-storage is not required to be granule-aligned, the tag-updating is,
	# so effectively the entire operation must be at a granule-aligned address.
	build addrGranuleIndexed_checkAlignment;
	address:8 = addrGranuleIndexed_checkAlignment;

	# store one granule worth of zeros and tag it from Rt
	tmp:8 = 0;
	addr:8 = 0;
	count:8 = $(TAG_GRANULE);
<loopstart>
	addr = address + tmp;
	*addr = 0:8;
	tmp = tmp + 8;
	if (tmp < count) goto <loopstart>;

	StoreMemTag(address, tag);
}

}
with : ShowMemTag=0 {

# C6.2.354 STZG page C6-1937 line 113766 MATCH xd9600400/mask=xffe00c00
# C6.2.354 STZG page C6-1937 line 113766 MATCH xd9600c00/mask=xffe00c00
# C6.2.354 STZG page C6-1937 line 113766 MATCH xd9600800/mask=xffe00c00
# CONSTRUCT xd9600000/mask=xffe00000 MATCHED 3 DOCUMENTED OPCODES

:stzg Rt_GPR64xsp, addrGranuleIndexed
is b_2131=0b11011001011 & (b_10=1 | b_11=1) & addrGranuleIndexed & Rt_GPR64xsp
{
	# for the sake of simplified output, omit the alignment check when ShowMemTag is off
	build addrGranuleIndexed;
	address:8 = addrGranuleIndexed;

	# store one granule worth of zeros
	tmp:8 = 0;
	addr:8 = 0;
	count:8 = $(TAG_GRANULE);
<loopstart>
	addr = address + tmp;
	*addr = 0:8;
	tmp = tmp + 8;
	if (tmp < count) goto <loopstart>;
}

}



with : ShowMemTag=1 {

# C6.2.355 STZGM page C6-1939 line 113904 MATCH xd9200000/mask=xfffffc00
# CONSTRUCT xd9200000/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES

:stzgm Rt_GPR64, "["^Rn_GPR64xsp^"]"
is b_1031=0b1101100100100000000000 & Rt_GPR64 & Rn_GPR64xsp
{
	sze:8 = 4 << (dczid_el0 & 0xf);  # the last value (DCZID_EL0.BS) can be up to 9 (for a size of 2KB) and seems
	                        # to be hardware-dependent and unwriteable (sysreg spec doesn't show how to write it).
	                        # minimum is probably 2, which would make the size equal to a tag granule
	address:8 = Rn_GPR64xsp;
	Align(address, sze);  # based on the educated guess above, address is probably granule-aligned by this, so we won't check it explicitly (compare to LDGM or STGM)
	count:8 = sze >> $(LOG2_TAG_GRANULE);
	data:8 = Rt_GPR64;
	tag:8 = data & 0xf;
	# for tmp = 0 to count-1
	tmp:8 = 0;
<loopstart>
	StoreMemTag(address, tag );

	# store zeros to the entire granule
	tmp_zero:8 = 0;
	addr_zero:8 = address;
	count_zero:8 = $(TAG_GRANULE);
<zeroloop>
	addr_zero = address + tmp_zero;
	*addr_zero = 0:8;
	tmp_zero = tmp_zero + 8;
	if (tmp_zero < count_zero) goto <zeroloop>;

	address = address + $(TAG_GRANULE);
	# next tmp
	tmp = tmp + 1;
	if (tmp < count) goto <loopstart>;
}

}
with : ShowMemTag=0 {

# C6.2.355 STZGM page C6-1939 line 113904 MATCH xd9200000/mask=xfffffc00
# CONSTRUCT xd9200000/mask=xfffffc00 MATCHED 1 DOCUMENTED OPCODES

:stzgm Rt_GPR64, "["^Rn_GPR64xsp^"]"
is b_1031=0b1101100100100000000000 & Rt_GPR64 & Rn_GPR64xsp
{
	sze:8 = 4 << (dczid_el0 & 0xf);  # the last value (DCZID_EL0.BS) can be up to 9 (for a size of 2KB) and seems
	                        # to be hardware-dependent and unwriteable (sysreg spec doesn't show how to write it).
	                        # minimum is probably 2, which would make the size equal to a tag granule
	address:8 = Rn_GPR64xsp;
	Align(address, sze);  # based on the educated guess above, address is probably granule-aligned by this, so we won't check it explicitly (compare to LDGM or STGM)
	count:8 = sze >> $(LOG2_TAG_GRANULE);
	# for tmp = 0 to count-1
	tmp:8 = 0;
<loopstart>

	# store zeros to the entire granule
	tmp_zero:8 = 0;
	addr_zero:8 = address;
	count_zero:8 = $(TAG_GRANULE);
<zeroloop>
	addr_zero = address + tmp_zero;
	*addr_zero = 0:8;
	tmp_zero = tmp_zero + 8;
	if (tmp_zero < count_zero) goto <zeroloop>;

	address = address + $(TAG_GRANULE);
	# next tmp
	tmp = tmp + 1;
	if (tmp < count) goto <loopstart>;
}

}


# To enforce SHOULD BE ZERO fields add: b_1415=0b00

with : ShowMemTag=1 {

# C6.2.359 SUBG page C6-1947 line 114340 MATCH xd1800000/mask=xffc00000
# CONSTRUCT xd1800000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES

:subg Rd_GPR64xsp, Rn_GPR64xsp, "#"^shifted_imm, "#"^b_1013
is sf=1 & op=1 & S=0 & b_2328=0b100011 & b_22=0 & b_1621 & b_1013 & Rd_GPR64xsp & Rn_GPR64xsp
# " & b_1415=0" is not required by the spec (op3 doesn't have any requirements and is not used)
[ shifted_imm = b_1621 << $(LOG2_TAG_GRANULE); ]
{
	# we don't actually modify the target register, so Ghidra understands the pointer target is still the same.
	# pseudo-ops let us do that, but it means that the decompiler can put an unintuitive value in the
	# "CopyPtrTag_AddToPtrTag_Exclude" argument, e.g. "param_2 - 0x20".
	uimm4:1 = b_1013;
	exclude:2 = 0;
	Or2BytesWithExcludedTags(exclude);
	Rd_GPR64xsp = Rn_GPR64xsp - shifted_imm;
	CopyPtrTag_AddToPtrTag_Exclude(Rd_GPR64xsp, Rn_GPR64xsp, uimm4, exclude);
}

}
with : ShowMemTag=0 {

# C6.2.359 SUBG page C6-1947 line 114340 MATCH xd1800000/mask=xffc00000
# CONSTRUCT xd1800000/mask=xffc00000 MATCHED 1 DOCUMENTED OPCODES

:subg Rd_GPR64xsp, Rn_GPR64xsp, "#"^shifted_imm, "#"^b_1013
is sf=1 & op=1 & S=0 & b_2328=0b100011 & b_22=0 & b_1621 & b_1013 & Rd_GPR64xsp & Rn_GPR64xsp
# " & b_1415=0" is not required by the spec (op3 doesn't have any requirements and is not used)
[ shifted_imm = b_1621 << $(LOG2_TAG_GRANULE); ]
{
	Rd_GPR64xsp = Rn_GPR64xsp - shifted_imm;
}

}


# Subtract Pointer [setting Flags]:
#  Subtract the 56-bit address held in the second operand from the first and store the result
# in the destination register.  If the destination register is XZR, then just use as a side-
# effect of being a pointer comparison (CMPP).
# C6.2.360 SUBP page C6-1948 line 114410 MATCH x9ac00000/mask=xffe0fc00
# C6.2.361 SUBPS page C6-1949 line 114470 MATCH xbac00000/mask=xffe0fc00
# CONSTRUCT x9ac00000/mask=xdfe0fc00 MATCHED 2 DOCUMENTED OPCODES

:subp^SBIT_CZNO Rd_GPR64, Rn_GPR64xsp, Rm_GPR64xsp
is sf=1 & b_30=0 & S & SBIT_CZNO & b_2128=0b11010110 & b_1015=0b000000 & Rd_GPR64 & Rn_GPR64xsp & Rm_GPR64xsp
{
	# out of a 64-bit value, keep the lowest 56 bits, which is 7 bytes.
	# sign-extend a 7-byte value to an 8-byte value.  If the boundary weren't byte-aligned,
	# sext() wouldn't work so well.
	tmp_2:8 = Rm_GPR64xsp;
	tmp_2 = sext(tmp_2:7);  # if Rm:7 is used here, the decompiler considers the Rm register an int7 for the whole function.
	tmp_1:8 = Rn_GPR64xsp;
	tmp_1 = sext(tmp_1:7);
	subflags(tmp_1, tmp_2);
	tmp_1 = tmp_1 - tmp_2;
	resultflags(tmp_1);
	Rd_GPR64 = tmp_1;
	build SBIT_CZNO;
}


# C6.2.376 TCANCEL page C6-1974 line 115824 MATCH xd4600000/mask=xffe0001f
# CONSTRUCT xd4600000/mask=xffe0001f MATCHED 1 DOCUMENTED OPCODES

define pcodeop cancelTransaction;
:tcancel "#"^imm16
is b_2131=0x6a3 & imm16 & b_0519 & b_2020 & b_0004=0x0 {
	local tmp:2 = imm16;
	local reason:2 = b_0519;
	local retry:1 = b_2020;
	cancelTransaction(reason, retry);
}


# C6.2.377 TCOMMIT page C6-1975 line 115871 MATCH xd503307f/mask=xffffffff
# CONSTRUCT xd503307f/mask=xffffffff MATCHED 1 DOCUMENTED OPCODES

define pcodeop commitTransaction;
:tcommit
is b_0031=0xd503307f {
	commitTransaction();
}


# C6.2.379 TSTART page C6-1979 line 116075

define pcodeop transactionStart;
:tstart Rd_GPR64
is b_0531=0x6a9193a & Rd_GPR64 {
	transactionStart(Rd_GPR64);
}


# C6.2.380 TTEST page C6-1981 line 116175

define pcodeop transactionDepth;
:ttest Rd_GPR64
is b_0531=0x6a9198b & Rd_GPR64 {
	Rd_GPR64 = transactionDepth();
}



# C6.2.387 UDF page C6-1993 line 116744 MATCH x00000000/mask=xffff0000
# CONSTRUCT x00000000/mask=xffff0000 MATCHED 1 DOCUMENTED OPCODES
# Undefined instruction
:udf b_0015
is b_1631=0b0000000000000000 & b_0015
{
    local excaddr:8 = inst_start;
    local id:2 = b_0015;
	local target:8 = UndefinedInstructionException(id, excaddr);
	goto [target];
}


# C6.2.400 XAFLAG page C6-2008 line 117528 MATCH xd500403f/mask=xfffff0ff
# C6.2.229 MSR (immediate) page C6-1684 line 99649 MATCH xd500401f/mask=xfff8f01f
# CONSTRUCT xd500403f/mask=xfffff0ff MATCHED 2 DOCUMENTED OPCODES

:xaflag
is b_1231=0b11010101000000000100 & b_0007=0b00111111
{
	tmpNG = !CY & !ZR;
	tmpZR = ZR & CY;
	tmpCY = CY | ZR;
	tmpOV = !CY & ZR;

	NG = tmpNG;
	ZR = tmpZR;
	CY = tmpCY;
	OV = tmpOV;
}


