diff --git a/src/lib.rs b/src/lib.rs index ab0c0e5..644513d 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -1,14 +1,13 @@ use std::borrow::Cow; use std::collections::HashMap; use icicle_cpu::mem::{Mapping, MemError, perm}; -use icicle_cpu::{Cpu, ExceptionCode, ValueSource, VarSource, VmExit}; +use icicle_cpu::{Cpu, ExceptionCode, ValueSource, VmExit}; use pyo3::prelude::*; use icicle_vm; use pyo3::exceptions::*; use target_lexicon; use indexmap::IndexMap; use target_lexicon::Architecture; -use icicle_cpu::lifter::InstructionSource; use sleigh_runtime::NamedRegister; // References: @@ -270,7 +269,7 @@ impl Icicle { #[getter] pub fn get_icount(&mut self) -> u64 { - return self.vm.cpu.icount; + self.vm.cpu.icount } #[setter] @@ -352,7 +351,7 @@ impl Icicle { } } - // Setup the CPU state for the target triple + // Set up the CPU state for the target triple let mut config = icicle_vm::cpu::Config::from_target_triple( format!("{architecture}-none").as_str() ); @@ -412,8 +411,9 @@ impl Icicle { } pub fn mem_map(&mut self, address: u64, size: u64, protection: MemoryProtection) -> PyResult<()> { + let init_perm = if self.vm.cpu.mem.track_uninitialized { perm::NONE } else { perm::INIT }; let mapping = Mapping { - perm: convert_protection(protection), + perm: convert_protection(protection) | init_perm, value: 0, }; if self.vm.cpu.mem.map_memory_len(address, size, mapping) { @@ -465,7 +465,7 @@ impl Icicle { e, ) })?; - return Ok(Cow::Owned(buffer)); + Ok(Cow::Owned(buffer)) } pub fn mem_write(&mut self, address: u64, data: Vec) -> PyResult<()> { @@ -486,7 +486,7 @@ impl Icicle { let name = sleigh.get_str(reg.name); result.insert(name.to_string(), (reg.offset, reg.var.size)); } - return Ok(result); + Ok(result) } pub fn reg_offset(&self, name: &str) -> PyResult {