mirror of
https://github.com/intel/linux-sgx
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Li, Xun
e7bbc158fa
Supported the AEX (Asynchronous Enclave Exit) Notify feature. Supported Mbed-TLS Cryptography library (excluding SSL/TLS portion) in Enclave. Applied patches to OpenSSL 1.1.1t, fixed CVE-2023-1255, CVE-2023-0465 and CVE-2023-0466. Upgraded to Intel(R) Integrated Performance Primitives (IPP) Cryptography library version 2021.7. Upgraded Intel SGX Quote Verification Enclave to integrate updated SgxSSL. Enhanced the attestation local cache functionality by giving users the option to provide their own cache file. Enabled QPL/QCNL log in DCAP samples. Fixed bugs. Signed-off-by: Li, Xun <xun.li@intel.com>
28 lines
942 B
XML
28 lines
942 B
XML
<EnclaveConfiguration>
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<ProdID>0</ProdID>
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<ISVSVN>0</ISVSVN>
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<!--In this case, there will be 3 static threads available and up to 7 threads
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can be created dynamically as necessary.
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-->
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<TCSNum>10</TCSNum>
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<TCSMinPool>3</TCSMinPool>
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<TCSPolicy>1</TCSPolicy>
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<!-- For a static thread, total stack available is 0x40000 bytes. -->
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<!-- For a dynamic thread, once it is created, total stack available is
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0x40000 bytes and no stack expansion will occur.
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-->
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<StackMaxSize>0x40000</StackMaxSize>
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<StackMinSize>0x40000</StackMinSize>
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<!-- HeapMinSize is omitted, defaults to 0x1000 -->
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<!-- HeapInitSize is omitted, defaults to HeapMaxSize -->
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<HeapMaxSize>0x100000</HeapMaxSize>
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<!-- Recommend changing 'DisableDebug' to 1 to make the enclave undebuggable for enclave release -->
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<DisableDebug>0</DisableDebug>
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<MiscSelect>1</MiscSelect>
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<MiscMask>0xFFFFFFFE</MiscMask>
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</EnclaveConfiguration>
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