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c636761ff4
Add a runtime agnostic enclave memory manager implementation in sdk/emm. The EMM APIs are based on design proposed in this PR: https://github.com/openenclave/openenclave/pull/3991 Enclave common loader changes are in psw/enclave_common/sgx_mm_ocalls.cpp, which are basically OCall support needed for EMM. Intel SDK runtime specific support are implemented as runtime abstraction layer: sdk/trts/ema_rt.c Current limitations, steps to build and test are documented in sdk/emm/README.md Signed-off-by: Haitao Huang <4699115+haitaohuang@users.noreply.github.com> Signed-off-by: Xiaofeng Xu <20158212+xxu36@users.noreply.github.com>
26 lines
943 B
XML
26 lines
943 B
XML
<EnclaveConfiguration>
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<ProdID>0</ProdID>
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<ISVSVN>0</ISVSVN>
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<StackMaxSize>0x40000</StackMaxSize>
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<!-- On a system with SGX EDMM, the amount of available heap once the enclave
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is initialized is HeapMinSize (0x1000 bytes). The gap between HeapMinSize
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and HeapMaxSize will be expanded as necessary.
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On a system without SGX EDMM, the amount of available heap once the enclave
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is initialized is HeapInitSize (0x40000 bytes), and there is no heap expansion.
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-->
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<HeapMaxSize>0x100000</HeapMaxSize>
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<HeapInitSize>0x40000</HeapInitSize>
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<HeapMinSize>0x1000</HeapMinSize>
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<TCSMaxNum>10</TCSMaxNum>
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<TCSNum>10</TCSNum>
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<TCSMinPool>10</TCSMinPool>
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<TCSPolicy>1</TCSPolicy>
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<!-- Recommend changing 'DisableDebug' to 1 to make the enclave undebuggable for enclave release -->
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<DisableDebug>0</DisableDebug>
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<MiscSelect>1</MiscSelect>
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<MiscMask>0xFFFFFFFF</MiscMask>
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</EnclaveConfiguration>
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