mirror of
https://github.com/intel/linux-sgx
synced 2026-06-08 14:49:32 +00:00
Li, Xun
120 lines
4.2 KiB
C
120 lines
4.2 KiB
C
/*
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* Copyright (C) 2011-2020 Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include "stdint.h"
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#include "se_cpu_feature.h"
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#include "se_cdefs.h"
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// add a version to tlibc.
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SGX_ACCESS_VERSION(tstdc, 1)
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#ifdef _TLIBC_USE_INTEL_FAST_STRING_
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extern uint64_t __intel_cpu_feature_indicator;
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extern uint64_t __intel_cpu_feature_indicator_x;
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extern unsigned int __intel_cpu_indicator;
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static int _intel_cpu_indicator_init(uint64_t cpu_feature_bits)
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{
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// We have the assumption that SSE3 is the lowest feature for enclave loading,
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// so failure will be returned if features are all below-SSE3.
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__intel_cpu_indicator = CPU_GENERIC;
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if ((cpu_feature_bits & CPU_FEATURE_AVX2) &&
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(cpu_feature_bits & CPU_FEATURE_FMA) &&
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(cpu_feature_bits & CPU_FEATURE_BMI) &&
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(cpu_feature_bits & CPU_FEATURE_LZCNT) &&
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(cpu_feature_bits & CPU_FEATURE_HLE) &&
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(cpu_feature_bits & CPU_FEATURE_RTM)) {
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__intel_cpu_indicator = CPU_HSW;
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}
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else if (cpu_feature_bits & CPU_FEATURE_F16C) {
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__intel_cpu_indicator = CPU_IVB;
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}
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else if (cpu_feature_bits & CPU_FEATURE_AVX) {
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__intel_cpu_indicator = CPU_SNB;
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}
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else if ((cpu_feature_bits & CPU_FEATURE_PCLMULQDQ) &&
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(cpu_feature_bits & CPU_FEATURE_AES)) {
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__intel_cpu_indicator = CPU_WSM;
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}
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else if ((cpu_feature_bits & CPU_FEATURE_SSE4_2) &&
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(cpu_feature_bits & CPU_FEATURE_POPCNT)) {
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__intel_cpu_indicator = CPU_NHM;
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}
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else if (cpu_feature_bits & CPU_FEATURE_SSE4_1) {
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__intel_cpu_indicator = CPU_SNI;
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}
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else if (cpu_feature_bits & CPU_FEATURE_MOVBE) {
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__intel_cpu_indicator = CPU_BNL;
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}
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else if (cpu_feature_bits & CPU_FEATURE_SSSE3) {
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__intel_cpu_indicator = CPU_MNI;
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}
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else if (cpu_feature_bits & CPU_FEATURE_SSE3) {
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__intel_cpu_indicator = CPU_PENTIUM_4_PNI;
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}
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else if (cpu_feature_bits & CPU_FEATURE_SSE2) {
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__intel_cpu_indicator = CPU_BNI;
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}
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else if (cpu_feature_bits & CPU_FEATURE_SSE) {
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__intel_cpu_indicator = CPU_PENTIUM_III_SSE;
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}
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else {
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return -1;
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}
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return 0;
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}
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int sgx_init_string_lib(uint64_t cpu_feature_indicator)
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{
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int genuine_intel = (cpu_feature_indicator & ~(CPU_FEATURE_GENERIC_IA32));
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if(genuine_intel) {
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__intel_cpu_feature_indicator = __intel_cpu_feature_indicator_x = cpu_feature_indicator;
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}
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else {
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__intel_cpu_feature_indicator = __intel_cpu_feature_indicator_x = CPU_FEATURE_GENERIC_IA32;
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}
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return _intel_cpu_indicator_init(cpu_feature_indicator);
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}
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#else
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int sgx_init_string_lib(uint64_t cpu_feature_indicator)
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{
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(void)cpu_feature_indicator;
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return 0;
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}
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#endif
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