mirror of
https://github.com/intel/linux-sgx
synced 2026-06-08 14:49:32 +00:00
4589daddd5
Fixed bugs. Signed-off-by: Li, Xun <xun.li@intel.com>
89 lines
3.6 KiB
C++
89 lines
3.6 KiB
C++
/*
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* Copyright (C) 2011-2020 Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include "arch.h"
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#include "xsave.h"
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#include "trts_inst.h"
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#include "util.h"
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#include "global_data.h"
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#include "stdlib.h"
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#include "sgx_utils.h"
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#define SYNTHETIC_STATE_SIZE (512 + 64) // 512 for legacy regs, 64 for xsave header
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//FXRSTOR only cares about the first 512 bytes, while
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//XRSTOR in compacted mode will ignore the first 512 bytes.
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extern "C" SE_DECLSPEC_ALIGN(XSAVE_ALIGN_SIZE) const uint32_t
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SYNTHETIC_STATE[SYNTHETIC_STATE_SIZE/sizeof(uint32_t)] __attribute__((section(".niprod"))) = {
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0x037F, 0, 0, 0, 0, 0, 0x1F80, 0xFFFF, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0x80000000, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // XCOMP_BV[63] = 1, compaction mode
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};
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int g_xsave_enabled __attribute__((section(".nipd"))) = 0; // flag to indicate whether xsave is enabled or not
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#ifdef SE_SIM
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uint32_t g_xsave_mask_high __attribute__((section(".nipd"))) = 0xFFFFFFFF;
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uint32_t g_xsave_mask_low __attribute__((section(".nipd"))) = 0xFFFFFFFF;
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#endif
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// EENTER will set xcr0 with secs.attr.xfrm,
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// So use the xfeature mask from report instead of calling xgetbv
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#ifdef __clang__
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#define SE_OPTIMIZE_OFF [[clang::optnone]]
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#else
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#define SE_OPTIMIZE_OFF
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#endif
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SE_OPTIMIZE_OFF
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uint64_t get_xfeature_state()
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{
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auto *report = sgx_self_report();
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g_xsave_enabled = (report->body.attributes.xfrm == SGX_XFRM_LEGACY) ? 0 : 1;
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uint64_t xfrm = report->body.attributes.xfrm;
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#ifdef SE_SIM
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g_xsave_mask_high = (uint32_t)(xfrm >> 32);
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g_xsave_mask_low = (uint32_t)(xfrm & 0xFFFFFFFF);
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#endif
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// no secrets in target_info, report_data, and report. no need to clear them before return
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// tlibc functions cannot be used before calling init_optimized_libs().
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return xfrm;
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}
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