mirror of
https://github.com/intel/linux-sgx
synced 2026-06-08 14:49:32 +00:00
Li, Xun
b0af6e75ac
Along with the latest processor microcode address CVE-2022-21233. Modified the Switchless library to have mitigations for the associated issue. Added support for the Linux kernel APIs for the Enclave Dynamic Memory Management (EDMM) features that are available with the Linux kernel v6.0 or later. Refer to the SGX SDK developer reference for details on new trusted APIs and enclave configuration for the EDMM features. Enabled C++17 within SGX SDK. Supported AMX (Advanced Matrix Extensions) in Enclave. Replace hardcoded Enclave signing keys in all sample projects with dynamically generated keys. Added a new API to allow user to configure enclave internal cache size in the Protected File System library. Upgraded to OpenSSL 1.1.1q and upgraded Intel(R) SGX Quote Verification Enclave to integrate SgxSSL/OpenSSL version 1.1.1q. Supported new OS: Ubuntu* 22.04 LTS 64-bit Server version, CentOS* 8.3 64bits, Red Hat* Enterprise Linux* Server 8.6 (for x86_64), SUSE* Linux* Enterprise Server 15.4 64bits, Debian* 10 and Anolis* OS 8.6. Upgraded Intel SGX QE3 to make it backward compatible. Improved ECDSA quote generation and verification performance by caching PCK certificates and collaterals in memory and disk drive. Added Java support for quote verification library. Added new APIs to unify Intel SGX and TDX quote verification in Quote Verification Library. Added Advisory ID in ECDSA quote verification supplemental data. Added Intel TDX support in RA-TLS (Remote Attestation based TLS) library. Improved TDX quote generation throughput in vsock mode. Added Rust support for TDX quote generation. Fixed bugs. Signed-off-by: Li, Xun <xun.li@intel.com>
281 lines
6.1 KiB
C
281 lines
6.1 KiB
C
/*
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* Copyright (C) 2011-2021 Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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/*
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* This header wraps the register names for x86/x64.
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*/
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#ifndef LINUX_REGS_H__
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#define LINUX_REGS_H__
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#include "sgx_cet.h"
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#if defined(__i386) || defined(__i386__)
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# define LINUX32 1
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# define SE_WORDSIZE 4
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/* Generic argument picker for `naked' functions */
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# define naked_arg0 4(%esp)
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# define naked_arg1 8(%esp)
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# define naked_arg2 12(%esp)
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# define naked_arg3 16(%esp)
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# define xax eax
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# define xbx ebx
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# define xcx ecx
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# define xdx edx
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# define xsi esi
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# define xdi edi
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# define xbp ebp
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# define xsp esp
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#elif defined(__x86_64) || defined(__x86_64__)
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# define LINUX64 1
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# define SE_WORDSIZE 8
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/* For x86_64, the first six parameters are passed by
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* rdi, rsi, rdx, rcx, r8, r9.
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*/
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# define naked_arg0 %rdi
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# define naked_arg1 %rsi
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# define naked_arg2 %rdx
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# define naked_arg3 %rcx
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# define xax rax
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# define xbx rbx
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# define xcx rcx
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# define xdx rdx
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# define xsi rsi
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# define xdi rdi
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# define xbp rbp
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# define xsp rsp
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#else
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# error unknown platform!
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#endif
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/* SE instructions - needs to be sync-up with inst70.h */
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#define SE_EREPORT 0
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#define SE_EGETKEY 1
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#define SE_EENTER 2
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#define SE_EEXIT 4
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#define SE_EACCEPT 5
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#define SE_EMODPE 6
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#define SE_EACCEPTCOPY 7
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#define SE_EVERIFYREPORT2 8
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#define SE_ECREATE 0
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#define SE_EADD 1
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#define SE_EINIT 2
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#define SE_EREMOVE 3
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/*
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* Macros for GNU assembly
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*/
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.macro ENCLU
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#ifdef SE_SIM
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cmp $SE_EEXIT, %xax
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jne 1f
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/* if leaf is EEXIT, xbp and xsp need to be passed by xdx and xcx */
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mov %xbp, %xdx
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mov %xsp, %xcx
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1:
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push %xdi
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push %xsi
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push %xdx
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push %xcx
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push %xbx
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push %xax
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# ifdef LINUX64
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pop %rdi
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pop %rsi
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pop %rdx
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pop %rcx
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pop %r8
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pop %r9
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# endif
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.type _SE3,@function
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.protected _SE3
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call _SE3
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# ifdef LINUX32
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add $(SE_WORDSIZE * 6), %esp
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# endif
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#else /* SE_SIM */
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.byte 0x0f, 0x01, 0xd7 /* 0xf3 */
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#endif /* !SE_SIM */
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.endm
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/* declare a function with default visibility */
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.macro DECLARE_GLOBAL_FUNC name
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.globl \name
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.type \name, @function
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\name:
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_CET_ENDBR
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.endm
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/* declare a function with visibility='hidden' */
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.macro DECLARE_LOCAL_FUNC name
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.globl \name
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.hidden \name
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.type \name, @function
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\name:
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_CET_ENDBR
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.endm
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.macro NAKED_PROLOG
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push %xbp
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mov %xsp, %xbp
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sub $(7 * SE_WORDSIZE), %xsp
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.endm
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.macro NAKED_EPILOG
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mov %xbp, %xsp
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pop %xbp
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.endm
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/* `paramN' (N = 1,2,3,4) should be registers. */
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.macro SET_PARAMS param1:req, param2, param3, param4
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#if defined(LINUX32)
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.ifnb \param4
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mov \param4, 3*SE_WORDSIZE(%esp)
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.endif
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.ifnb \param3
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mov \param3, 2*SE_WORDSIZE(%esp)
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.endif
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.ifnb \param2
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mov \param2, 1*SE_WORDSIZE(%esp)
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.endif
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mov \param1, 0*SE_WORDSIZE(%esp)
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#else /* LINUX32 */
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.ifnb \param4
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.ifnc \param4, %rcx
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mov \param4, %rcx
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.endif
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.endif
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.ifnb \param3
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.ifnc \param3, %rdx
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mov \param3, %rdx
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.endif
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.endif
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.ifnb \param2
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.ifnc \param2, %rsi
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mov \param2, %rsi
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.endif
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.endif
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.ifnc \param1, %rdi
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mov \param1, %rdi
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.endif
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#endif /* LINUX64 */
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.endm
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/*******************************************************************/
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.macro SE_PROLOG
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.cfi_startproc
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#ifdef LINUX32
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pushl %ebp
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movl %esp, %ebp
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#endif
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push %xbx
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push %xcx
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push %xdx
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#if defined LINUX64
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movq %rdi, %rbx
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movq %rsi, %rcx
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/* rdx remains the same, rdi/rsi is not used by _SE0
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*/
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#elif defined LINUX32
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movl 2*SE_WORDSIZE(%ebp), %ebx
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movl 3*SE_WORDSIZE(%ebp), %ecx
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movl 4*SE_WORDSIZE(%ebp), %edx
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#endif
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.endm
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/*******************************************************************/
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.macro SE_EPILOG
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pop %xdx
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pop %xcx
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pop %xbx
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#ifdef LINUX32
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movl %ebp, %esp
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popl %ebp
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#endif
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ret
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.cfi_endproc
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.endm
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/*******************************************************************/
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/* load the address of `symbol' to the register `reg' in PIC way. */
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.macro lea_pic symbol, reg
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#ifdef LINUX64
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lea \symbol(%rip), \reg
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#else
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/* The real code on x86 would look like this (get `bar' from `foo'):
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*
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* 00000198 <bar>:
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* 198: c3 ret
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*
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* 00000199 <foo>:
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* 199: e8 00 00 00 00 call 19e <foo+0x5>
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* 19e: 58 pop %eax
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* 19f: 8d 40 fa lea -0x6(%eax),%eax
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*/
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call . + 0x5 /* No label here to avoid interfering w/ calling code */
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pop \reg
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lea (\symbol - . + 1)(\reg), \reg
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#endif
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.endm
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#endif /* LINUX_REGS_H__ */
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