diff --git a/.gitignore b/.gitignore index c29ddb7b0..4ee1744f3 100644 --- a/.gitignore +++ b/.gitignore @@ -18,6 +18,18 @@ # Object files *.o +*.idb +*.id0 +*.id1 +*.id2 +*.log +*.nam +*.til + +mc-sema/tests/*.bc +mc-sema/tests/*.cfg +mc-sema/tests/*.exe + #autogenerated file: test_a.auto.asm mc-sema/validator/valTest/test_a.auto.asm mc-sema/validator/x86_64/valTest/test_a.auto.asm diff --git a/CHANGELOG.txt b/CHANGELOG.txt deleted file mode 100644 index f293e5404..000000000 --- a/CHANGELOG.txt +++ /dev/null @@ -1,48 +0,0 @@ -========= -ChangeLog -========= - - This is the list of all noteworthy changes made in every public release of - the tool. See README for the general instruction manual. - ----------------- -Staying informed ----------------- - -Want to stay in the loop on major new features? Join our mailing list by -sending a mail to . - --------------- -July 29 2015: --------------- - - Initial set of changes from CGC: - - Annotation of bitcode with original x86 instruction - - Fixes for signed multiplication and division - - MUL16r/MUL16m/MUL8r/MUL8m, SHLD32mrCL - - BSF, SETP, FLDLN2, FLDL2E, FLDLG2, FPTAN, FPREM, FCHS, FISTT, FUCOMI - - *LOTS* of new SSE instructions - - Lots of new instruction semanticts tests - --------------- -July 08 2015 --------------- - - - Added 64-bit [x86_64] support - --------------- -Apr 04 2014: --------------- - - - Better IDA based CFG recovery - - New Instructions - - Registers are now an enum - - Better implementation of shifts - - Much better implementtion of CMOVxx - - Support for VS2013, CMake 3.1 - --------------- -Jan 30 2015: --------------- - - - Upgrade from LLVM 3.2 to LLVM 3.5 - - Many new instructions diff --git a/CMakeLists.txt b/CMakeLists.txt index d9f0a014d..e45e14822 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -1,79 +1,6 @@ project(mc-sema) cmake_minimum_required(VERSION 2.8) -include(ExternalProject) -ExternalProject_add(boost - SOURCE_DIR ${CMAKE_CURRENT_SOURCE_DIR}/boost - CMAKE_CACHE_ARGS - -DBUILD_PROJECTS:STRING=thread;system;filesystem;date_time;program_options - -DCMAKE_INSTALL_PREFIX:STRING=${CMAKE_CURRENT_BINARY_DIR}/boost - ) - -#WHY CAN'T IT EVER BE SMOOTH -if(WIN32) -include_directories(${CMAKE_CURRENT_BINARY_DIR}/boost/include) -else(WIN32) -include_directories(${CMAKE_CURRENT_BINARY_DIR}/boost/include/boost-1.52.0) -endif(WIN32) - -if (MSVC60) - set(BOOST_TOOLSET "vc6") -elseif(MSVC70) - set(BOOST_TOOLSET "vc7") -elseif(MSVC71) - set(BOOST_TOOLSET "vc71") -elseif(MSVC80) - set(BOOST_TOOLSET "vc80") -elseif(MSVC90) - set(BOOST_TOOLSET "vc90") -elseif(MSVC10) - set(BOOST_TOOLSET "vc100") -elseif(MSVC11) - set(BOOST_TOOLSET "vc110") -elseif(MSVC12) - set(BOOST_TOOLSET "vc120") -elseif(MSVC14) - set(BOOST_TOOLSET "vc140") -else(MSVC14) - set(BOOST_TOOLSET "vc") -endif(MSVC60) - -if(CMAKE_BUILD_TYPE MATCHES Debug) - if(WIN32) - #use .lib paths here - set(Boost_LIBRARIES - ${CMAKE_CURRENT_BINARY_DIR}/boost/lib/boost_filesystem-${BOOST_TOOLSET}-mt-gd-1_52.lib - ${CMAKE_CURRENT_BINARY_DIR}/boost/lib/boost_date_time-${BOOST_TOOLSET}-mt-gd-1_52.lib - ${CMAKE_CURRENT_BINARY_DIR}/boost/lib/boost_program_options-${BOOST_TOOLSET}-mt-gd-1_52.lib - ${CMAKE_CURRENT_BINARY_DIR}/boost/lib/boost_system-${BOOST_TOOLSET}-mt-gd-1_52.lib - ${CMAKE_CURRENT_BINARY_DIR}/boost/lib/boost_thread-${BOOST_TOOLSET}-mt-gd-1_52.lib) - else(WIN32) - #use .a / .so paths here - set(Boost_LIBRARIES - ${CMAKE_CURRENT_BINARY_DIR}/boost/lib/boost-1.52.0/libboost_program_options-mt-d.a - ${CMAKE_CURRENT_BINARY_DIR}/boost/lib/boost-1.52.0/libboost_system-mt-d.a - ${CMAKE_CURRENT_BINARY_DIR}/boost/lib/boost-1.52.0/libboost_date_time-mt-d.a - ${CMAKE_CURRENT_BINARY_DIR}/boost/lib/boost-1.52.0/libboost_filesystem-mt-d.a) - endif(WIN32) -else(CMAKE_BUILD_TYPE MATCHES Debug) - if(WIN32) - #use .lib paths here - set(Boost_LIBRARIES - ${CMAKE_CURRENT_BINARY_DIR}/boost/lib/boost_filesystem-${BOOST_TOOLSET}-mt-1_52.lib - ${CMAKE_CURRENT_BINARY_DIR}/boost/lib/boost_date_time-${BOOST_TOOLSET}-mt-1_52.lib - ${CMAKE_CURRENT_BINARY_DIR}/boost/lib/boost_program_options-${BOOST_TOOLSET}-mt-1_52.lib - ${CMAKE_CURRENT_BINARY_DIR}/boost/lib/boost_system-${BOOST_TOOLSET}-mt-1_52.lib - ${CMAKE_CURRENT_BINARY_DIR}/boost/lib/boost_thread-${BOOST_TOOLSET}-mt-1_52.lib) - else(WIN32) - #use .a / .so paths here - set(Boost_LIBRARIES - ${CMAKE_CURRENT_BINARY_DIR}/boost/lib/boost-1.52.0/libboost_program_options-mt.a - ${CMAKE_CURRENT_BINARY_DIR}/boost/lib/boost-1.52.0/libboost_system-mt.a - ${CMAKE_CURRENT_BINARY_DIR}/boost/lib/boost-1.52.0/libboost_date_time-mt.a - ${CMAKE_CURRENT_BINARY_DIR}/boost/lib/boost-1.52.0/libboost_filesystem-mt.a) - endif(WIN32) -endif(CMAKE_BUILD_TYPE MATCHES Debug) - if(WIN32) SET(CMAKE_EXE_LINKER_FLAGS "/LARGEADDRESSAWARE ${CMAKE_EXE_LINKER_FLAGS}") endif(WIN32) diff --git a/CONTRIBUTORS b/CONTRIBUTORS index fc2b01b58..72c0fab52 100644 --- a/CONTRIBUTORS +++ b/CONTRIBUTORS @@ -1,4 +1,4 @@ -akshay kumarak +Akshay Kumar Andrew Ruef Artem Dinaburg Clayton Walker diff --git a/Changelist-64bit.txt b/Changelist-64bit.txt deleted file mode 100644 index 2bcb179c4..000000000 --- a/Changelist-64bit.txt +++ /dev/null @@ -1,13 +0,0 @@ - -> Support for 64-bit binaries; - -> Updated Registers list, Calling Convention; - -> Added Target component to initialize MCDisassembler; - -> Handling of 64-bit relocation types and Data section Layout; - -> Handling of 64-bit pointers and stack layout - -> New instructions - -> Updated Unit-test framework - - TODO: - -> Handling statically linked binaries - -> RIP-relative instructions - -> Support new instructions; Update Unit-testcases - -> Test COFF and PE Target binaries \ No newline at end of file diff --git a/README.md b/README.md index 11ea8b56d..06079b870 100644 --- a/README.md +++ b/README.md @@ -17,11 +17,11 @@ We hope that this library is useful to the program analysis and reverse engineer ## Separation of Components -MC-Semantics is separated into two conceptual parts: control flow recovery and instruction translation. +McSema is separated into two conceptual parts: control flow recovery and instruction translation. The two parts communicate via a control flow graph structure that contains native code. This control flow graph structure connects basic blocks and defines information about external calls, but provides no further semantic information. -The `bin_descend` program attempts to recover a control flow graph from a given binary file. It will write the recovered control flow graph into a Google Protocol Buffer serialized file. There is also an IDAPython script to recover control flow from within IDA Pro. +An IDAPython script, `get_cfg.py`, attempts to recover a control flow graph from a given binary file. It will write the recovered control flow graph into a Google Protocol Buffer serialized file. There is also an IDAPython script to recover control flow from within IDA Pro. The `cfg_to_bc` program attempts to convert a control flow graph structure into LLVM bitcode. This translation process is more a transcription act than an analysis, since a control flow structure has already been recovered. @@ -57,6 +57,10 @@ mcsema uses external code which has been included in this source release: mcsema uses Intel Pin, which has not been included in this source release, but is freely available. Pin is used only for testing of instruction semantics and is not required to use the library. +### Pronunciation + +McSema is pronounced as "mick sema". + ## Contact For any questions: diff --git a/docs/DEMOS.md b/docs/DEMOS.md index 344550849..2a5c29848 100644 --- a/docs/DEMOS.md +++ b/docs/DEMOS.md @@ -6,7 +6,7 @@ The output of each demo appears after its description. The demos live in `mc-sema\tests` in the source tree. These demos require that a **debug version** of the mc-sema be built prior to execution. -The output may differ in debug statements from what you see. Demos are usually tested by using IDAPython as the CFG recovery script, but should work with `bin_descend`. +The output may differ in debug statements from what you see. Demos are tested by using IDAPython as the CFG recovery script. ## demo1 diff --git a/docs/NAVIGATION.md b/docs/NAVIGATION.md index f4caea2c5..50d651671 100644 --- a/docs/NAVIGATION.md +++ b/docs/NAVIGATION.md @@ -2,54 +2,17 @@ This document describes where in the code features of `mc-sema` are located. Additionally, this document describes some of the internal functions and macros that are used throughout the code. -## PE/COFF Parsing - -The code to parse PE/COFF files and map them into a programatically accessible state lives in `mc-sema/binary_common`. This code is split into two parts: the core parsing, and binary object abstraction. The core parsing reads data structures from the PE/COFF file, determines validity, and makes the data structures accessible programatically. The binary object abstraction provides higher-level utilities for working with executable files, such as relocating addresses, iterating over sections, import tables, and export tables, etc. - -The core of the PE/COFF parsing is provided by a separate open source project, [pe-parse](https://github.com/trailofbits/pe-parse). The pe-parse code is located in `mc-sema/binary_common/pe-parse`. For more details, please see the project website. - -### Binary Object Abstraction - -The binary object abstraction lives in `mc-sema/binary_common/bincomm.{h,cpp}`. An abstract base class, `ExecutableContainer`, is the external interface for working with both COFF and PE files. The internal concrete classes, `PeTarget` and `CoffTarget` should never be used in the rest of the code. - -The class method `ExecutableContainer *open(std::string filename, const llvm::Target *target)` will open a PE or COFF file and return an `ExecutableSection` object representation of it. The `target` argument is currently unused. The extension of `filename` determines whether a file is PE or COFF. - -The `ExecutableContainer` class provides helper methods for operating on executables. All methods return a boolean indicating whether they succeeded (true) or failed (false). A description of some of the methods: - -* `bool find_import_name(uint32_t addr, std::string &s)`: Get the name of the imported function referenced at address `addr`. -* `bool is_addr_relocated(uint32_t addr)`: is the address `addr` relocated? -* `bool relocate_addr(uint32_t addr, uint32_t &toAddr)`: Find the relocation at `addr`. Store the address of the symbol the relocation references in `toAddr`. Note that this is a **double** indirection: it will get the address of the relocated symbol, not the address of the relocation in the relocation table. This is usually what you want, anyway. -* `bool get_exports(std::list > &exports)`: Parse the export table and store it in `exports`. The entries are a tuple of (export name, virtual address of export). The entry point is included as an export named 'entry'. -* `bool get_sections(std::vector §ions)`: Get a reference to this binary's sections. The `ExecutableContainer` class defines an internal struct, `SectionDesc`, that is a simple way to describe binary sections. The struct is defined in `bincomm.h` and is fairly self explanatory. -* `uint64_t getBase()`: The base address of this executable. -* `uint64_t getExtent()`: The size of this executable. -* `int readByte(uint64_t addr, uint8_t *b)`: Attempt to read a byte at virtual address `addr` (as seen from inside the executable), and store it in `b`. - -### COFF Headaches - -COFF object have every section based at 0x0. This makes sense, since the final executable is not yet created, and sections may be merged/deleted/changed. However, this present a problem for translation, since each virtual address reference should be unambiguious. Each COFF section is rebaesd internally, by the order in which it appears in the COFF file. So for example, if a COFF file has two sections of size 0x80 both based at 0x0, the first section will have virtual addresses 0x0 - 0x7F, and the second will have virtual addresses 0x80 - 0xFF. This is similar to what tools like IDA Pro to when working with object files. The rebasing code lives in `CoffTarget::CoffTarget` in `bincomm.cpp`. - ## CFG Recovery -The high-level actions of the CFG recovery code are in `bin_descend/bin_descend.cpp`:`makeNativeModule`. This function will first identify an entry point into the code via a symbol or numerical value supplied on the command line. Then unless `-ignore-native-entry-points` is specified, all exported code symbols are added to the entry point work list. Finally, `addDataEntryPoints` will loops through the data section looking for relocations that point to the code section. Any such relocations are assumed to be function pointers and are also added to the entry point work list. +The high-level actions of the CFG recovery code are in `bin_descend/get_cfg.py`. McSema uses IDA Pro for disassembling programs and producing CFG files. -Once the entry point worklist is created, every function in it is recursively disassembled by `bin_descend/cfg_recover.cpp`:`getFuncs`. The main loop in `getFuncs` will recursively disassemble starting at an entry point, and return a list of disassembled functions. +### `llvm::MCInst` and `NativeInst` -`getFuncs` will repeatedly call `bin_descend/cfg_recover.cpp`:`getFunc` until all functions reachable from the entry point are disassebmled. The `getFunc` code will disassemble a function via `bin_descend/cfg_recover.cpp`:`decodeBlock`, which builds basic blocks from disassembly and has special per-instruction processing. +The `llvm::MCInst` class is defined by LLVM and stores the disassembly of a machine instruction. Unfortunately, the class is missing control flow related information and other data useful for translation. The `Inst` class, defined in `peToCFG/peToCFG.h`, augments `llvm::MCInst` with data not needed by LLVM itself. For instance, `Inst` records instruction prefixes, whether the instruction is the last in a block, whether any others point to it, whether it references external data, etc. All of the `mc-sema` code will operate on `NativeInst` instances, and not `llvm:MCInst`. -It is `decodeBlock` that does special per-instruction processing. For example, this is where `call` instructions are identified and new functions are added to the work list. Also this is where external calls (including calls to APIs), and data references are identified. The actual graph portion of the CFG is also made here via terminating and connecting instructions. `decodeBlock` doesn't do the x86 opcode to metadata conversion itself. That is done in `peToCFG/inst_decoder_fe.cpp`:`LLVMByteDecoder::getInstFromBuff`, which is covered in a later section. +New instances of the `NativeInst` class are created in `peToCFG/inst_decoder_fe.cpp`:`LLVMByteDecoder::getInstFromBuff`. The `getInstFromBuff` method starts with an `llvm::MCInst` from the LLVM disassembler, and then augments additional information: the instruction prefix, whether the instruction terminates a block, and whether it points to another instruction. Later code will then modify more instruction parameters. -After recovering the CFG, `makeNativeModule` must still create a data section for the recovered code. The data section is an LLVM structure made from data blobs and references to code and data. These are created by calling `bin_descend/cfg_recover.cpp`:`processDataSection` for every data section in the original binary. - -Finally, `makeNativeModule` calls `peToCFG/peToCFG.cpp`:`addExterns` to visit every node of the CFG and add any external function references to the global `NativeModule` container. This is done to simplify referencing all external calls in the recovered code. - -### `llvm::MCInst` and `Inst` - -The `llvm::MCInst` class is defined by LLVM and stores the disassembly of a machine instruction. Unfortunately, the class is missing control flow related information and other data useful for translation. The `Inst` class, defined in `peToCFG/peToCFG.h`, augments `llvm::MCInst` with data not needed by LLVM itself. For instance, `Inst` records instruction prefixes, whether the instruction is the last in a block, whether any others point to it, whether it references external data, etc. All of the `mc-sema` code will operate on `Inst` instances, and not `llvm:MCInst`. - -New instances of the `Inst` class are created in `peToCFG/inst_decoder_fe.cpp`:`LLVMByteDecoder::getInstFromBuff`. The `getInstFromBuff` method starts with an `llvm::MCInst` from the LLVM disassembler, and then augments additional information: the instruction prefix, whether the instruction terminates a block, and whether it points to another instruction. Later code will then modify more instruction parameters. - -To enable some of the Inst functionality, such as determining operand location and prefix, changes to LLVM's MCInst class had to be made. Most of those should be in `lib/Target/X86/Disassembler/X86Disassembler.cpp` and `lib/Target/X86/Disassembler/X86DisassemblerDecoder.c`. +To enable some of the Inst functionality, such as determining operand location and prefix, changes to LLVM's `MCInst` class had to be made. Most of those should be in `lib/Target/X86/Disassembler/X86Disassembler.cpp` and `lib/Target/X86/Disassembler/X86DisassemblerDecoder.c`. ### Relocations / Code and Data References @@ -57,29 +20,27 @@ Determining what is code and what is data, and what is a code or a data referenc ## External Functions -Call instructions to external functions have an extra annotation indicating the external call and the function name, calling convention, and arument count. The actual annotation is done in `bin_descend/cfg_recover.cpp`:`decodeBlock`. +Call instructions to external functions have an extra annotation indicating the external call and the function name, calling convention, and arument count. External functions cannot be modeled like translated functions, and the control flow recovery tool need to know the calling convention and argument count of these extrnal functions. The calling convention and argument count are specified by an external function map file. More details on this file are in [USAGE_AND_APIS.md](USAGE_AND_APIS.md). There is a default external function map in `tests/std_defs.txt`. This function map should cover the vast majority of the Windows API and the C runtime. ## Serialization and Deserialization -The serialization functions that convert a NativeModule to a .cfg file are all in `peToCFG/peToCFG.cpp`. The serialization functions are generally prefixed with `dump`, and the deserialization functions are prefixed with `read`. The main serialization function is `dumpProtoBuf`, and the main deserialization function is `readProtoBuf`. - The protobuf format is defined in `peToCFG/CFG.proto`, and described in more detail in [USAGE_AND_APIS.md](USAGE_AND_APIS.md). ## Translation Instruction translation begins life in the cfg_to_bc executable, which takes a serialized Google protocol buffer CFG, and converts it to LLVM bitcode. The high-level actions of translation are defined in `bitcode_from_cfg/cfg_to_bc.cpp`:`main` and described in this section. -First, the CFG it re-serialized via a call to `peToCFG/peToCFG.cpp`:`readModule`, which will in turn de-serialze the protocol buffer file via `readProtobuf`. The CFG is then transformed into an `llvm::Module`, with some initial data structures populated. +First, the CFG it re-serialized via a call to `peToCFG/peToCFG.cpp`:`ReadProtoBuf`, which will in turn de-serialze the protocol buffer file. The CFG is then transformed into an `llvm::Module`, with some initial data structures populated. -Next, the real translation can begin. The raw translation loop is in `cfgToLLVM/raiseX86.cpp`:`natModToModule`. The first action of `natModToModule` is to pre-populate all defined functions as stubs without any code. This is done so that these functions may be referenced in the data section and by other functions, as translation happens. Then, the data sections can be inserted. +Next, the real translation can begin. The raw translation loop is in `cfgToLLVM/raiseX86.cpp`:`LiftCodeIntoModule`. The first action of `LiftCodeIntoModule` is to pre-populate all defined functions (`InitLiftedFunctions`) as stubs without any code. This is done so that these functions may be referenced in the data section and by other functions, as translation happens. Then, the data sections can be inserted. After the data sections are inserted, the code contents of each function are lifted into the pre-defined LLVM functions. This is done by the `LiftFunctionsIntoModule`. Each function is lifted using the `InsertFunctionIntoModule`. ### Data Section Translation -Data sections from the CFG are transformed into bitcode in `cfgToLLVM/raiseX86.cpp`:`insertDataSections`. +Data sections from the CFG are transformed into bitcode in `cfgToLLVM/raiseX86.cpp`:`InsertDataSections`. -First, `insertDataSections` will create blank stubs for every data section. Once again, the purpose is to allow cross-data section references. +First, `InsertDataSections` will create blank stubs for every data section. Once again, the purpose is to allow cross-data section references. Then the actual data insertion begins. Data sections are translated to packed LLVM structures. Representing data as a packed structure lets us reference individual data items and to insert references to other code and data sections, that will be correctly relocated in bitcode. The translation happens via two nested loops: the first one loops over every data section in the CFG, and the second one loops over every item in the data section. @@ -87,19 +48,21 @@ For every data section item, one of three things can happen. The item can be a a ### External Function References -After data insertion, external function references are populated. These must be populated before any instruction translation, since instructions may reference these external functions. The translation loop in `natModToModule` is pretty straightforward: all external definitions are simply converted to an `llvm::Function` object with appropriate return type and arguments and added to the module. +After data insertion, external function references are populated. These must be populated before any instruction translation, since instructions may reference these external functions. The translation loop in `LiftCodeIntoModule` is pretty straightforward: all external definitions are simply converted to an `llvm::Function` object with appropriate return type and arguments and added to the module. ### Instruction Translation -Once the external function mappings are added, each function in the CFG is translated to LLVM bitcode. The function translation is done by `cfgToLLVM/raiseX86.cpp`:`insertFunctionIntoModule`. +Once the external function mappings are added, each function in the CFG is translated to LLVM bitcode. The function translation is done by `cfgToLLVM/raiseX86.cpp`:`InsertFunctionIntoModule`. -Each translated function takes a single argument, the register state. Then this register state is spilled into local variables for use within the function. The allocation of the local register state is done by `allocateLocals`, and the spilling of the register state is done by `cfgToLLVM/x86Instrs.cpp`:`writeContextToLocals`. +Each translated function takes a single argument, the register state. Then this register state is referenced by local variables for use within the function. The creation of the local references into the register state is done by `ArchAllocRegisterVars`. -Next, every basic block in the CFG is visited by `cfgToLLVM/raiseX86.cpp`:`bfs_cfg_visitor::discover_vertex`. This function will create an llvm::BasicBlock object to represent the block and any following blocks, and then begin populating the block with translated instructions. +Next, an empty LLVM `BasicBlock` is created for every machine code basic block. The basic blocks are defined ahead-of-time so that the basic blocks can be referenced when lifting control-flow instructions. -The `disInstr` function does the actual intruction translation. More literally, it adds an annotation so one can tell what instruction is being translated in the resulting IR, and calls `cfgToLLVM/x86Instrs.cpp`:`disInstrX86` to do the translation. This is done in case there is a need for multiple decoders or architectures. +Next, the contents every basic block in the CFG is visited by `cfgToLLVM/raiseX86.cpp`:`LiftBlockIntoFunction`. This function will begin populating the block with translated instructions. -`disInstrX86` is a dispatch routine that calls the appropriate translation function based on the instruction's LLVM opcode. The translation map is stored in `cfgToLLVM/InstructionDispatch.cpp`:`translationDispatchMap`. +The `LiftInstIntoBlock` function does the actual intruction translation. More literally, it adds an annotation so one can tell what instruction is being translated in the resulting IR, and calls `cfgToLLVM/x86Instrs.cpp`:`LiftInstIntoBlockImpl` to do the translation. This is done in case there is a need for multiple decoders or architectures. + +`LiftInstIntoBlockImpl` is a dispatch routine that calls the appropriate translation function based on the instruction's LLVM opcode. The translation map is stored in `cfgToLLVM/InstructionDispatch.cpp`:`translationDispatchMap`. The `translationDispatchMap` variable is populated by `cfgToLLVM/InstructionDispatch.cpp`:`initInstructionDispatch`. The actual population routines, described briefly below, appear in their own files. The files are named `cfgToLLVM/x86Instrs_.cpp`, where `` correpsonds to the types of instructions translated there. @@ -209,12 +172,4 @@ The functionality demos are meant to only run on Win32 and live in `mc-sema/test ### Instruction Semantics Tests -Other than the full transformation demos, there are separate instruction semantics tests that verify only that instruction semantics in LLVM match those of x86. These tets are run via the `testSemantics` appliation, more detail of which are in the TOOLS document. The rest of this section will describe how `testSematics` is implemented. - -The actual test cases are all in `validator/tests`. Each test is in its own `.asm` file, with the file name being the test name. Each file is valid nasm-style x86 assembly with a special format, described in the ADD A TEST document. - -Since the number of tests is always changing, the ground truth results and the test driver are determined at build time. First, lets describe how the ground truth for instruction semantics is generated. The main build script responsible for this is `validator/valTest/CMakeLists.txt`. The ground truth for instruction semantics is determined by each instruction's effect on register state as seen by Intel's PIN tool. There is a custom pin tool used to record instruction semantics compiled in `validator/valTool`. The build script calls `valiator/testgen.py` to combine all of the individual test `.asm` files into one file, adds code to re-set state between each instruction, and runs this combined file through the semantics recording pin tool. The pin tool then outputs a ground truth file called `tests.out`. - -The test driver is built via the build script `validator/testSemantics/CMakeLists.txt`. This script uses the file `validator/testSemantics/testSemantics.tempalte` as a tempalte for the C++ code of the final driver. The individual test assembly files are parsed, and test information is inserted into the template driver. After all tests are inserted, a file named `testSemantics.auto.cpp` is emitted and used to build the `testSemantics.exe` executable. - -The `testSemantics` executable uses the Google testing framework as the base for verifying unit tests. It compares the register state saved in `tests.out` with the register state produced after JITting the LLVM code produced by the mc-sema for the same x86 instructions. The actual JITting happens in `ModuleTest::runFunctionOnState`. New tests are defined via the `TEST_F` macro, provided by the Google test framework. The `IN_OUT_TEST` macro is used to wrap the creation of a new test and output comparison. The Intel PIN output and raw register state output are not directly comparable, and need some massaging (e.g. transforming FPU state from a flat index to one relative to the TOP flag). The `DEBUG` compile time symbol can be defined to enable very verbose debugging of the semantics testing. +Instruction semantics tests have been temporarily removed, pending a reimplementation that simplifies the testing process. diff --git a/docs/TOOLS.md b/docs/TOOLS.md index 7e17bccac..e755642a4 100644 --- a/docs/TOOLS.md +++ b/docs/TOOLS.md @@ -81,90 +81,12 @@ Recover control flow from `demo_dll_6.dll`. Start recovery at the symbol `get_va `"%IDA_PATH%\idaq.exe" -B -S"%GET_CFG_PY% --batch --std-defs \"%STD_DEFS%\" demo_6_defs.txt --entry-symbol get_value --output demo_dll_6.cfg" demo_dll_6.dll` -## bin_descend - -bin_descend is a recursive descent disassembler and control flow recovery tool. As input, bin_descend accepts COFF object files and Windows PE DLLs. To accurately recover control flow, it is imperative that relocation information *not* be stripped from the input file. - -The output file is named `.cfg`. That is, an input of `foo.obj` will produce `foo.cfg`. - -When recovering control flow, bin_descend uses certain heuristics to attempt accurate control flow recovery: - -* Relocated immediate values in code (e.g. PUSH imm32) that point to the code section are assumed to be function pointers. These will be added to the list of entry points from which to recover control flow. -* Relocated values in the data section that point to the code section are assumed to be function pointers. These will be added to the list of entry points from which to recover control flow. -* Additionally, relocated function pointers in the data section are assumed to be used as callbacks. A thunk that takes current register state and transforms it into a translator specific register context will automatically be created for these functions, and used in place of the function when it referenced not by a direct call. -* Relocated immediate values in code (e.g. PUSH imm32) that point to the data section are assumed to be data values. -* Relocated immediate values in the data section that point to the data section are assumed to be data values. - -### Limitations - -COFF files will have several sections based at address zero. As there is no specification for how to assign addresses, we will assign addresses to sections in the order in which they are processed. This usually matches the address what other tools (e.g. IDA Pro) select, but not always. It is recommended that the entry point for COFF object should be specified by `-entry-symbol` and not `-e`. - -### Usage - - C:\>bin_descend -help - - OVERVIEW: binary recursive descent - USAGE: bin_descend.exe [options] - - OPTIONS: - -d - Print debug information - -e= - Entry point - -entry-symbol= - Entry point symbol(s) - -func-map= - Function map files - -help - Display available options (-help-hidden for more) - -i= - Input filename - -ignore-native-entry-points - Ignore any exported functions not explicitly specified via -e or -entry-symbol - -mc-x86-disable-arith-relaxation - Disable relaxation of arithmetic instruction for X86 - -mtriple= - Target Triple - -stats - Enable statistics output from program - -v= - Verbosity level - -version - Display the version of this program - -x86-asm-syntax - Choose style of code to emit from X86 backend: - =att - Emit AT&T-style assembly - =intel - Emit Intel-style assembly - - -* `-d`: This flag will enable output of extra debugging information to standard out. -* `-e=`: Specify the entry point address where disassembly will begin. This value should be a virtual address in the target module. Both decimal and hex values are accepted. Hex values must be prefixed with 0x or 0X. -* `-entry-symbol`: Specify entry point symbol(s) from which to start disassembly. This is particualrly useful for COFF files where several sections based at address zero will be rebased during control flow recovery. -* `-func-map=`: Location of file(s) that specify arguments and calling conventions of externally referenced functions. Externally referenced functions are those that are not a part of the translated code: APIs, functions in other compilation units, etc. The file `std_defs.txt` is a pre-existing define file that provides definitions for most of the Win32 API and the standard C library. -* `-help`: Display the help screen above. -* `-i=`: Specify the input file. This should be a COFF object or a Window PE DLL. -* `-ignore-native-entry-points`: Do not process any exported functions other than the one specified by `-e` or `-entry-symbol`. This option should be used when processing DLLs that import C runtime initialization code or include exports unrelated to the one you are trying to lift. -* `-mc-x86-disable-arith-relaxation`: -* `-mtriple=`: Specify the target triple (e.g. i686-pc-win32, i686-pc-linux-gnu) of the input file. This option should be used when processing Windows object files on Linux, or vice versa. -* `-stats`: -* `-v=`: -* `-version`: Display the version of bin_descend. -* `-x86-asm-syntax`: Chose whether assembly output will use ATT or Intel syntax. - -### Examples - -These examples are taken from the tests present in `mc-sema/tests`. - -Recover control flow for `demo_test1.obj` starting at symbol `start` and enable debugging output: - -`bin_descend.exe -d -entry-symbol=start -i=demo_test1.obj` - -Recover control flow for `demo_test4.obj` starting at symbol `_doTrans`, enable debugging, and specify a definitions file for external functions (to properly link API calls): - -`bin_descend.exe -d -func-map=std_defs.txt -entry-symbol=_doTrans -i=demo_test4.obj` - -Recover control flow for `sailboat.obj` starting at symbol `_keycomp`, enable debugging, and specify two external function definition files: - -`bin_descend.exe -d -func-map=sailboat.txt,std_defs.txt -entry-symbol=_keycomp -i=sailboat.obj` - -Recover control flow from `demo_dll_1.dll`, starting at symbol `HelloWorld`, enable debugging, specify an external function definition, and ignore all entry points other than `HelloWorld`: - -`bin_descend.exe -d -entry-symbol=HelloWorld -ignore-native-entry-points=true -i=demo_dll_1.dll -func-map=std_defs.txt` - - ## cfg_to_bc The cfg_to_bc tool will take a control flow graph in the format produced by bin_descend, and translate it to LLVM bitcode. The resulting bitcode will have a driver function, specified by `-driver-name`. The driver is an exported function that takes place of the entrypoint in the original code. If the original function accepted arguments as 32-bit values pushed onto the stack, a stub to place these into a register context can be automatically generated by specifying the argument count via `-driver-argc`. In case of other calling conventions, a raw driver that accepts a complete register context can be defined via `-driver-raw`. -The CFG is in Google protocol buffer format. The definition of the protocol is in `mc-sema/peToCFG/CFG.proto`. The CFG does not have to be created by bin_descend, but it can be created by any tool (e.g. IDA Python) that can write to the protocol buffer format. The control flow recovery and translation portions were explicitly designed to be separable. +The CFG is in Google protocol buffer format. The definition of the protocol is in `mc-sema/peToCFG/CFG.proto`. The CFG can be created by any tool (e.g. IDA Python) that can write to the protocol buffer format. The control flow recovery and translation portions were explicitly designed to be separable. ### Limitations diff --git a/docs/USAGE_AND_APIS.md b/docs/USAGE_AND_APIS.md index 911284004..739203fe8 100644 --- a/docs/USAGE_AND_APIS.md +++ b/docs/USAGE_AND_APIS.md @@ -1,12 +1,12 @@ # Usage and APIs -To use mcsema on its valid input files, two tools are provided: `bin_descend` for control flow recovery and `cfg_to_bc` for translation. The `bin_descend` tool takes as input a valid COFF object or PE DLL, and recovers its control flow. The `cfg_to_bc` tool takes a control flow graph in Google protocol buffer format, and translates it into LLVM bitcode. The generated bitcode is not optimized and will be very noisy with unnecessarily live variables. Unoptimized bitcode is useful for debugging translation errors, but before use this bitcode should be run through the LLVM `opt` tool. +The `cfg_to_bc` tool takes a control flow graph in Google protocol buffer format, and translates it into LLVM bitcode. The generated bitcode is not optimized and will be very noisy with unnecessarily live variables. Unoptimized bitcode is useful for debugging translation errors, but before use this bitcode should be run through the LLVM `opt` tool. More information on the syntax and usage of each tool is in the TOOLS document. ## CFG Recovery -The `bin_descend` tool performs recursive descent based control flow recovery on COFF objects and PE DLLs. The output is a serialized Google protocol buffer, defined in `CFG.proto`. This CFG is then used in by the translator to generate LLVM bitcode. +CFG recovery is performed using an IDAPython script, `mc-sema/bin_descend/get_cfg.py`. The output is a serialized Google protocol buffer, defined in `CFG.proto`. This CFG is then used in by the translator to generate LLVM bitcode. The following is a description of the current (November, 2013) of the fields in the protocol. @@ -190,7 +190,7 @@ The Module message represents all the recovered information about the input prog ### External Calls -Since external calls (e.g. calls to APIs or other compilation units) are not translated by mcsema, their semantics must be accurately known to reference them from translated code. The information needed about external calls is external name, calling convention, number of arguments, and whether or not the call returns. The `bin_descend` tool identifies information about external calls from a definition file specified by the `-func-map` argument. A default mapping, that includes the vast majority of the Windows API, is provided in `mc-sema/std_defs/std_defs.txt`. +Since external calls (e.g. calls to APIs or other compilation units) are not translated by mcsema, their semantics must be accurately known to reference them from translated code. The information needed about external calls is external name, calling convention, number of arguments, and whether or not the call returns. A default mapping, that includes the vast majority of the Windows API, is provided in `mc-sema/std_defs/std_defs.txt`. ## Translation @@ -217,7 +217,7 @@ All functions referenced in the data section are assumed to be used as callbacks ## Using the bitcode -The bitcode output can be used as input to `opt` for optimization and to `llc` as input for object file generation. The demos in `mc-sema/tests` show how to use `bin_descend`, `cfg_to_bc`, `opt` and `llc` to take a COFF object, translate it, and link it with existing code. +The bitcode output can be used as input to `opt` for optimization and to `llc` as input for object file generation. The demos in `mc-sema/tests` show how to use `cfg_to_bc`, `opt` and `llc` to take a COFF object, translate it, and link it with existing code. Prior to using any generated bitcode, it is recommended to run it through `opt` with the `-O3` optimization level. diff --git a/mc-sema/CMakeLists.txt b/mc-sema/CMakeLists.txt index acf0143ca..a2a0537ee 100644 --- a/mc-sema/CMakeLists.txt +++ b/mc-sema/CMakeLists.txt @@ -96,37 +96,3 @@ add_subdirectory(bitcode_from_cfg) add_subdirectory(binary_common) add_subdirectory(bin_descend) add_subdirectory(runtime) - -if(MCSEMA_ENABLE_PIN_VALIDATOR) - find_package(Pin) - if(NOT PIN_FOUND AND NOT WIN32) - - if(UNIX) - set(PIN_DOWNLOAD_URL https://software.intel.com/sites/landingpage/pintool/downloads/pin-2.14-67254-gcc.4.4.7-linux.tar.gz) - set(PIN_DOWNLOAD_HASH 792eaaa199e9deba84cde79858e93ffc) - endif(UNIX) - - if(APPLE) - set(PIN_DOWNLOAD_URL https://software.intel.com/sites/landingpage/pintool/downloads/pin-2.14-67254-clang.5.1-mac.tar.gz) - set(PIN_DOWNLOAD_HASH 0f93c64484d039ceca828cd2909d321b) - endif(APPLE) - - ExternalProject_add(Pin - URL ${PIN_DOWNLOAD_URL} - URL_MD5 ${PIN_DOWNLOAD_HASH} - CONFIGURE_COMMAND "" - BUILD_COMMAND "" - SOURCE_DIR pin - INSTALL_COMMAND "" - ) - - set(PIN_PATH ${CMAKE_CURRENT_BINARY_DIR}/pin) - set(PIN_EXECUTABLE ${CMAKE_CURRENT_BINARY_DIR}/pin/pin) - - add_subdirectory(validator) - endif(NOT PIN_FOUND AND NOT WIN32) - - if(WIN32 AND PIN_FOUND) - add_subdirectory(validator) - endif(WIN32 AND PIN_FOUND) -endif(MCSEMA_ENABLE_PIN_VALIDATOR) diff --git a/mc-sema/bitcode_from_cfg/cfg_to_bc.cpp b/mc-sema/bitcode_from_cfg/cfg_to_bc.cpp index 2bd3a5a30..8959a095a 100644 --- a/mc-sema/bitcode_from_cfg/cfg_to_bc.cpp +++ b/mc-sema/bitcode_from_cfg/cfg_to_bc.cpp @@ -8,7 +8,8 @@ Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or + Redistributions in binary form must reproduce the above copyright notice, this + list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. Neither the name of the {organization} nor the names of its @@ -67,10 +68,6 @@ #include "../common/LExcn.h" #include "../common/Defaults.h" -#include -#include -#include - using namespace llvm; static cl::opt OutputFilename("o", cl::desc("Output filename"), @@ -94,55 +91,14 @@ static cl::opt OutputModule("m", cl::desc("Output native module format")); static cl::opt IgnoreUnsupported( "ignore-unsupported", cl::desc("Ignore unsupported instructions")); -static cl::opt ShouldVerify( - "should-verify", cl::desc("Verify module after bitcode emission?"), - cl::init(true)); - static void printVersion(void) { std::cout << "0.6" << std::endl; } -class block_label_writer { - private: - NativeFunctionPtr func; - public: - block_label_writer(NativeFunctionPtr f) - : func(f) { - return; - } - template - void operator()(std::ostream &out, const VertexOrEdge &v) const { - NativeBlockPtr curB = this->func->block_from_id(v); - - if (curB) { - std::string blockS = curB->print_block(); - out << "[label=\"" << blockS << "\"]"; - } - - return; - } -}; - -static void doPrintModule(NativeModulePtr m) { - std::string pathBase = "./"; - - for (auto f : m->get_funcs()) { - std::string n = pathBase + to_string(f->get_start(), std::hex) - + ".dot"; - - std::ofstream out(n.c_str()); - - block_label_writer bgl(f); - CFG g = f->get_cfg(); - write_graphviz(out, g, bgl); - } - - return; -} - -llvm::Module *createModuleForArch(std::string name, const std::string &triple) { - llvm::Module *M = new llvm::Module(name, llvm::getGlobalContext()); - llvm::Triple TT = llvm::Triple(triple); +static llvm::Module *CreateModule(std::string name, + const std::string &triple) { + auto M = new llvm::Module(name, llvm::getGlobalContext()); + llvm::Triple TT(triple); M->setTargetTriple(triple); std::string layout; @@ -150,7 +106,9 @@ llvm::Module *createModuleForArch(std::string name, const std::string &triple) { if (TT.getOS() == llvm::Triple::Win32) { if (TT.getArch() == llvm::Triple::x86) { layout = - "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32"; + "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:" + "32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:" + "32:32-n8:16:32-S32"; } else if (TT.getArch() == llvm::Triple::x86_64) { layout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"; } else { @@ -160,7 +118,9 @@ llvm::Module *createModuleForArch(std::string name, const std::string &triple) { } else if (TT.getOS() == llvm::Triple::Linux) { if (TT.getArch() == llvm::Triple::x86) { layout = - "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S128"; + "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:" + "32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:" + "16:32-S128"; } else if (TT.getArch() == llvm::Triple::x86_64) { // x86_64-linux-gnu layout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"; @@ -177,13 +137,13 @@ llvm::Module *createModuleForArch(std::string name, const std::string &triple) { return M; } -static VA findSymInModule(NativeModulePtr mod, const std::string &sym_name) { +static VA FindSymbolInModule(NativeModulePtr mod, const std::string &sym_name) { for (auto &sym : mod->getEntryPoints()) { if (sym.getName() == sym_name) { return sym.getAddr(); } } - return (VA)(-1); + return static_cast(-1); } int main(int argc, char *argv[]) { @@ -202,9 +162,8 @@ int main(int argc, char *argv[]) { std::string errstr; std::cerr << "Looking up target..." << std::endl; - auto x86Target = llvm::TargetRegistry::lookupTarget(TargetTriple, errstr); - - if (!x86Target) { + auto target = llvm::TargetRegistry::lookupTarget(TargetTriple, errstr); + if (!target) { std::cerr << "Could not find target triple: " << TargetTriple << std::endl << "Error: " << errstr << "\n"; @@ -214,58 +173,39 @@ int main(int argc, char *argv[]) { //reproduce NativeModule from CFG input argument std::cerr << "Reading module ..." << std::endl; try { - auto mod = readModule(InputFilename, ProtoBuff, std::list(), x86Target); + auto mod = ReadProtoBuf(InputFilename, TargetTriple, target); if (!mod) { std::cerr << "Could not process input module: " << InputFilename - << std::endl; + << std::endl; return EXIT_FAILURE; } - // set native module target - std::cerr << "Setting initial triples..." << std::endl; - mod->setTarget(x86Target); - mod->setTargetTriple(TargetTriple); - - if ( !mod) { + if (!mod) { std::cerr << "Unable to read module from CFG" << std::endl; return EXIT_FAILURE; } - if (OutputModule) { - doPrintModule(mod); - } - if (IgnoreUnsupported) { ignoreUnsupportedInsts = true; } //now, convert it to an LLVM module - std::cerr << "Getting LLVM module..." << std::endl; - auto M = createModuleForArch(mod->name(), TargetTriple); - - if ( !M) { - std::cerr << "Unable to get LLVM module" << std::endl; - return EXIT_FAILURE; - } - - initRegStateStruct(M); + auto M = CreateModule(mod->name(), TargetTriple); + ArchInitRegStateStruct(M); ArchInitAttachDetach(M); - initInstructionDispatch(); + ArchInitInstructionDispatch(); - std::cerr << "Converting to LLVM..." << std::endl; - if (!liftNativeCodeIntoModule(mod, M)) { + if (!LiftCodeIntoModule(mod, M)) { std::cerr << "Failure to convert to LLVM module!" << std::endl; return EXIT_FAILURE; } std::set entry_point_pcs; - for (const auto &entry_point_name : EntryPoints) { - std::cerr << "Adding entry point: " << entry_point_name << std::endl; - - auto entry_pc = findSymInModule(mod, entry_point_name); - if ((VA)(-1) != entry_pc) { - std::cerr << entry_point_name << " is implemented by sub_" << std::hex + auto entry_pc = FindSymbolInModule(mod, entry_point_name); + if (entry_pc != static_cast(-1)) { + std::cerr << "Adding entry point: " << entry_point_name << std::endl + << entry_point_name << " is implemented by sub_" << std::hex << entry_pc << std::endl; if (!ArchAddEntryPointDriver(M, entry_point_name, entry_pc)) { @@ -274,32 +214,34 @@ int main(int argc, char *argv[]) { entry_point_pcs.insert(entry_pc); } else { - llvm::errs() << "Could not find entry point: " << entry_point_name - << "; aborting\n"; + std::cerr << "Could not find entry point: " << entry_point_name + << "; aborting" << std::endl; return EXIT_FAILURE; } } - renameLiftedFunctions(mod, M, entry_point_pcs); + RenameLiftedFunctions(mod, M, entry_point_pcs); // will abort if verification fails - if (ShouldVerify && llvm::verifyModule( *M, &errs())) { - std::cerr << "Could not verify module!\n"; + if (llvm::verifyModule(*M, &errs())) { + std::cerr << "Could not verify module!" << std::endl; return EXIT_FAILURE; } - M->addModuleFlag(Module::Error, "Debug Info Version", - DEBUG_METADATA_VERSION); - M->addModuleFlag(Module::Error, "Dwarf Version", 3); + M->addModuleFlag(llvm::Module::Error, "Debug Info Version", + llvm::DEBUG_METADATA_VERSION); + M->addModuleFlag(llvm::Module::Error, "Dwarf Version", 3); std::string errorInfo; llvm::tool_output_file Out(OutputFilename.c_str(), errorInfo, - sys::fs::F_None); - WriteBitcodeToFile(M, Out.os()); + llvm::sys::fs::F_None); + llvm::WriteBitcodeToFile(M, Out.os()); Out.keep(); + } catch (std::exception &e) { std::cerr << "error: " << std::endl << e.what() << std::endl; return EXIT_FAILURE; } + return EXIT_SUCCESS; } diff --git a/mc-sema/cfgToLLVM/Annotation.cpp b/mc-sema/cfgToLLVM/Annotation.cpp index 6f3406720..471d9a082 100644 --- a/mc-sema/cfgToLLVM/Annotation.cpp +++ b/mc-sema/cfgToLLVM/Annotation.cpp @@ -8,35 +8,23 @@ #include -using namespace std; -using namespace llvm; - -const char MCSEMA_ANNOT_STRING[] = "mcsema_real_eip"; +const char * const kRealEIPAnnotation = "mcsema_real_eip"; void addAnnotation(llvm::Instruction *inst, VA addr) { - - Constant *C = ConstantInt::get(Type::getInt64Ty(llvm::getGlobalContext()), addr); - MDNode *n = MDNode::get(llvm::getGlobalContext(), C); - - inst->setMetadata(MCSEMA_ANNOT_STRING, n); + auto C = llvm::ConstantInt::get( + llvm::Type::getInt64Ty(llvm::getGlobalContext()), addr); + auto n = llvm::MDNode::get(llvm::getGlobalContext(), C); + inst->setMetadata(kRealEIPAnnotation, n); } bool getAnnotation(llvm::Instruction *inst, VA &its_eip) { - MDNode *metad = inst->getMetadata(MCSEMA_ANNOT_STRING); - if(metad == nullptr) { - return false; - } - - Value *val = metad->getOperand(0); - if(val == nullptr) { - return false; - } - - if (ConstantInt *ci = dyn_cast(val)) { + if (auto metad = inst->getMetadata(kRealEIPAnnotation)) { + if (auto val = metad->getOperand(0)) { + if (auto ci = llvm::dyn_cast(val)) { its_eip = ci->getLimitedValue(); - return true; + } } - - return false; + } + return false; } diff --git a/mc-sema/cfgToLLVM/Annotation.h b/mc-sema/cfgToLLVM/Annotation.h index 8ec539e88..c1bcfbaf7 100644 --- a/mc-sema/cfgToLLVM/Annotation.h +++ b/mc-sema/cfgToLLVM/Annotation.h @@ -27,11 +27,14 @@ ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #pragma once + +#include +#include + #include "llvm/IR/Module.h" #include "llvm/IR/BasicBlock.h" #include "llvm/IR/Function.h" -#include -#include + typedef uint64_t VA; void addAnnotation(llvm::Instruction *inst, VA addr); diff --git a/mc-sema/cfgToLLVM/ArchOps.cpp b/mc-sema/cfgToLLVM/ArchOps.cpp index a43b07b28..b3e3aa0d6 100644 --- a/mc-sema/cfgToLLVM/ArchOps.cpp +++ b/mc-sema/cfgToLLVM/ArchOps.cpp @@ -162,49 +162,49 @@ static void LinuxAddPushJumpStub(llvm::Module *M, llvm::Function *F, M->appendModuleInlineAsm(as.str()); } -std::string ArchNameMcsemaCall(const std::string &name) { +std::string ArchNameMcSemaCall(const std::string &name) { return "__mcsema_" + name; } - -static std::string WindowsDecorateName(llvm::Function *F, const std::string &name) { +static std::string WindowsDecorateName(llvm::Function *F, + const std::string &name) { // 64-bit doesn't mangle - Module *M = F->getParent(); - if(64 == ArchPointerSize(M)) { - return name; + Module *M = F->getParent(); + if (64 == ArchPointerSize(M)) { + return name; + } + + switch (F->getCallingConv()) { + + case CallingConv::C: + return "_" + name; + break; + case CallingConv::X86_StdCall: { + std::stringstream as; + int argc = F->arg_size(); + as << "_" << name << "@" << argc * 4; + return as.str(); } - - switch(F->getCallingConv()) - { - - case CallingConv::C: - return "_" + name; - break; - case CallingConv::X86_StdCall: - { - std::stringstream as; - int argc = F->arg_size(); - as << "_" << name << "@" << argc*4; - return as.str(); - } - break; - case CallingConv::X86_FastCall: - { - std::stringstream as; - int argc = F->arg_size(); - as << "@" << name << "@" << argc*4; - return as.str(); - } - break; - default: - TASSERT(false, "Unsupported Calling Convention for 32-bit Windows"); - break; - } - return ""; + break; + case CallingConv::X86_FastCall: { + std::stringstream as; + int argc = F->arg_size(); + as << "@" << name << "@" << argc * 4; + return as.str(); + } + break; + default: + TASSERT(false, "Unsupported Calling Convention for 32-bit Windows") + ; + break; + } + return ""; } -static void WindowsAddPushJumpStub(bool decorateStub, llvm::Module *M, llvm::Function *F, - llvm::Function *W, const char *stub_handler) { + +static void WindowsAddPushJumpStub(bool decorateStub, llvm::Module *M, + llvm::Function *F, llvm::Function *W, + const char *stub_handler) { auto stub_name = W->getName().str(); auto stubbed_func_name = F->getName().str(); @@ -405,17 +405,15 @@ bool shouldSubtractImageBase(llvm::Module *M) { llvm::Value *doSubtractImageBaseInt(llvm::Value *original, llvm::BasicBlock *block) { - llvm::Module *M = block->getParent()->getParent(); - llvm::Value *ImageBase = archGetImageBase(M); + auto M = block->getParent()->getParent(); + auto ImageBase = archGetImageBase(M); // convert image base pointer to int - llvm::Value *ImageBase_int = new llvm::PtrToIntInst( - ImageBase, llvm::Type::getIntNTy(block->getContext(), 64), "", block); + auto ImageBase_int = new llvm::PtrToIntInst( + ImageBase, llvm::Type::getIntNTy(block->getContext(), ArchPointerSize(M)), + "", block); // do the subtraction - llvm::Value *data_v = BinaryOperator::CreateSub(original, ImageBase_int, "", - block); - - return data_v; + return llvm::BinaryOperator::CreateSub(original, ImageBase_int, "", block); } diff --git a/mc-sema/cfgToLLVM/ArchOps.h b/mc-sema/cfgToLLVM/ArchOps.h index a76dde68a..74146ac3c 100644 --- a/mc-sema/cfgToLLVM/ArchOps.h +++ b/mc-sema/cfgToLLVM/ArchOps.h @@ -1,14 +1,14 @@ #ifndef ARCHOPS_H #define ARCHOPS_H +#include + #include "llvm/IR/Value.h" #include "llvm/IR/Module.h" #include "llvm/IR/Instructions.h" #include "llvm/IR/BasicBlock.h" #include "llvm/ADT/Triple.h" -#include - typedef uint64_t VA; enum SystemArchType { @@ -44,7 +44,7 @@ SystemArchType SystemArch(llvm::Module *M); PointerSize ArchPointerSize(llvm::Module *M); -std::string ArchNameMcsemaCall(const std::string &name); +std::string ArchNameMcSemaCall(const std::string &name); template diff --git a/mc-sema/cfgToLLVM/Externals.h b/mc-sema/cfgToLLVM/Externals.h index 0a9a06409..4ff69c8ed 100644 --- a/mc-sema/cfgToLLVM/Externals.h +++ b/mc-sema/cfgToLLVM/Externals.h @@ -1,131 +1,171 @@ /* -Copyright (c) 2014, Trail of Bits -All rights reserved. + Copyright (c) 2014, Trail of Bits + All rights reserved. -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: + Redistribution and use in source and binary forms, with or without modification, + are permitted provided that the following conditions are met: - Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. + Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. - Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. + Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or + other materials provided with the distribution. - Neither the name of Trail of Bits nor the names of its - contributors may be used to endorse or promote products derived from - this software without specific prior written permission. + Neither the name of Trail of Bits nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ #ifndef _EXTERNALS_H #define _EXTERNALS_H -#include -#include + +#include #include -using boost::int8_t; +#include class ExternalRef { + public: + ExternalRef(const std::string &sn) + : symbolName(sn), + weak(false) {} -public: - ExternalRef(const std::string &sn): symbolName(sn) {}; - virtual std::string getSymbolName(void) { return this->symbolName; } - virtual void setWeak(bool w) { this->weak = w; } - virtual bool isWeak(void) { return this->weak; } - virtual ~ExternalRef() {}; + virtual const std::string &getSymbolName(void) { + return this->symbolName; + } -protected: - std::string symbolName; - bool weak; + virtual void setWeak(bool w) { + this->weak = w; + } + + virtual bool isWeak(void) { + return this->weak; + } + + virtual ~ExternalRef() {} + + protected: + std::string symbolName; + bool weak; }; class ExternalDataRef : public ExternalRef { - - protected: - size_t dataSize; + protected: + size_t dataSize; + public: - public: - - ExternalDataRef(const std::string &name): dataSize(0), ExternalRef(name) - { - } - ExternalDataRef(const std::string &name, size_t dtsz) : dataSize(dtsz), ExternalRef(name) - { - // empty constructor - } + ExternalDataRef(const std::string &name) + : dataSize(0), + ExternalRef(name) {} - void setDataSize(size_t newsize) { this->dataSize = newsize; } - size_t getDataSize() { return this->dataSize; } + ExternalDataRef(const std::string &name, size_t dtsz) + : dataSize(dtsz), + ExternalRef(name) {} + + void setDataSize(size_t newsize) { + this->dataSize = newsize; + } + + size_t getDataSize() { + return this->dataSize; + } }; class ExternalCodeRef : public ExternalRef { -public: - enum CallingConvention { - CallerCleanup, - CalleeCleanup, - FastCall, - X86_64_SysV, - X86_64_Win64, - McsemaCall - }; + public: + enum CallingConvention { + CallerCleanup, + CalleeCleanup, + FastCall, + X86_64_SysV, + X86_64_Win64, + McsemaCall + }; - enum ReturnType { - Unknown, - VoidTy, - IntTy, - NoReturn - }; + enum ReturnType { + Unknown, + VoidTy, + IntTy, + NoReturn + }; - int8_t getNumArgs(void) { return this->numArgs; } - ReturnType getReturnType(void) { return this->ret; } - CallingConvention getCallingConvention(void) { return this->conv; } + int8_t getNumArgs(void) { + return this->numArgs; + } - void setReturnType(ReturnType r) { this->ret = r; } + ReturnType getReturnType(void) { + return this->ret; + } - std::string getFunctionSignature(void) { return this->funcSign; } + CallingConvention getCallingConvention(void) { + return this->conv; + } - ExternalCodeRef(const std::string &fn, int8_t d, CallingConvention c, ReturnType r, const std::string &sign) : - numArgs(d), - conv(c), - ret(r), ExternalRef(fn), funcSign(sign) { } + void setReturnType(ReturnType r) { + this->ret = r; + } - ExternalCodeRef(const std::string &fn, int8_t d, CallingConvention c, ReturnType r) : - numArgs(d), - conv(c), - ret(r), ExternalRef(fn), funcSign("") { } + const std::string &getFunctionSignature(void) { + return this->funcSign; + } - ExternalCodeRef(const std::string &fn, int8_t d, CallingConvention c) : - numArgs(d), - conv(c), - ret(Unknown), ExternalRef(fn), funcSign("") { } + ExternalCodeRef(const std::string &fn, int d, CallingConvention c, + ReturnType r, const std::string &sign) + : numArgs(d), + conv(c), + ret(r), + ExternalRef(fn), + funcSign(sign) {} - ExternalCodeRef(const std::string &fn, int8_t d) : numArgs(d), - conv(CallerCleanup), - ret(Unknown), ExternalRef(fn), funcSign("") { } + ExternalCodeRef(const std::string &fn, int d, CallingConvention c, + ReturnType r) + : numArgs(d), + conv(c), + ret(r), + ExternalRef(fn), + funcSign("") {} - ExternalCodeRef(const std::string &fn) : numArgs(-1), - conv(CallerCleanup), - ret(Unknown), ExternalRef(fn), funcSign("") { } + ExternalCodeRef(const std::string &fn, int d, CallingConvention c) + : numArgs(d), + conv(c), + ret(Unknown), + ExternalRef(fn), + funcSign("") {} -protected: + ExternalCodeRef(const std::string &fn, int d) + : numArgs(d), + conv(CallerCleanup), + ret(Unknown), + ExternalRef(fn), + funcSign("") {} - int8_t numArgs; - CallingConvention conv; - ReturnType ret; - std::string funcSign; + ExternalCodeRef(const std::string &fn) + : numArgs(-1), + conv(CallerCleanup), + ret(Unknown), + ExternalRef(fn), + funcSign("") {} + + protected: + + int numArgs; + CallingConvention conv; + ReturnType ret; + std::string funcSign; }; -typedef boost::shared_ptr ExternalCodeRefPtr; -typedef boost::shared_ptr ExternalDataRefPtr; +typedef ExternalCodeRef *ExternalCodeRefPtr; +typedef ExternalDataRef *ExternalDataRefPtr; #endif diff --git a/mc-sema/cfgToLLVM/InstructionDispatch.cpp b/mc-sema/cfgToLLVM/InstructionDispatch.cpp index 30c09e4d7..a8cba15d7 100644 --- a/mc-sema/cfgToLLVM/InstructionDispatch.cpp +++ b/mc-sema/cfgToLLVM/InstructionDispatch.cpp @@ -50,7 +50,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. DispatchMap translationDispatchMap; -bool initInstructionDispatch() { +bool ArchInitInstructionDispatch(void) { FPU_populateDispatchMap(translationDispatchMap); MOV_populateDispatchMap(translationDispatchMap); diff --git a/mc-sema/cfgToLLVM/InstructionDispatch.h b/mc-sema/cfgToLLVM/InstructionDispatch.h index 7e2528806..a08d3dded 100644 --- a/mc-sema/cfgToLLVM/InstructionDispatch.h +++ b/mc-sema/cfgToLLVM/InstructionDispatch.h @@ -40,12 +40,22 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #include "peToCFG.h" #include "raiseX86.h" -typedef InstTransResult(*TranslationFuncPtr)(NativeModulePtr natM, llvm::BasicBlock *&block, InstPtr ip, llvm::MCInst &inst); +struct TranslationContext { + NativeModulePtr natM; + NativeFunctionPtr natF; + NativeBlockPtr natB; + NativeInstPtr natI; + llvm::Module *M; + llvm::Function *F; + std::map va_to_bb; +}; + +typedef InstTransResult(*TranslationFuncPtr)(TranslationContext &, llvm::BasicBlock *&); typedef std::map DispatchMap; extern DispatchMap translationDispatchMap; -bool initInstructionDispatch(); +bool ArchInitInstructionDispatch(void); #define OP(x) inst.getOperand(x) @@ -54,12 +64,16 @@ bool initInstructionDispatch(); ADDR_NOREF_IMPL<32>(natM, block, x, ip, inst) :\ ADDR_NOREF_IMPL<64>(natM, block, x, ip, inst) -#define CREATE_BLOCK(nm, b) BasicBlock *block_ ## nm = BasicBlock::Create((b)->getContext(), #nm, (b)->getParent()) +#define CREATE_BLOCK(nm, b) auto block_ ## nm = llvm::BasicBlock::Create((b)->getContext(), #nm, (b)->getParent()) #define MEM_REFERENCE(which) MEM_AS_DATA_REF(block, natM, inst, ip, which) -#define GENERIC_TRANSLATION_MI(NAME, NOREFS, MEMREF, IMMREF, TWOREFS) static InstTransResult translate_ ## NAME (NativeModulePtr natM, BasicBlock *&block, InstPtr ip, MCInst &inst) {\ +#define GENERIC_TRANSLATION_MI(NAME, NOREFS, MEMREF, IMMREF, TWOREFS) \ + static InstTransResult translate_ ## NAME (TranslationContext &ctx, llvm::BasicBlock *&block) {\ InstTransResult ret;\ - Function *F = block->getParent(); \ + auto natM = ctx.natM; \ + Function *F = ctx.F; \ + auto ip = ctx.natI; \ + auto &inst = ip->get_inst(); \ if( ip->has_mem_reference && ip->has_imm_reference) {\ TWOREFS; \ } else if( ip->has_mem_reference ) { \ @@ -73,9 +87,12 @@ bool initInstructionDispatch(); } -#define GENERIC_TRANSLATION_REF(NAME, NOREFS, HASREF) static InstTransResult translate_ ## NAME (NativeModulePtr natM, BasicBlock *&block, InstPtr ip, MCInst &inst) {\ +#define GENERIC_TRANSLATION_REF(NAME, NOREFS, HASREF) static InstTransResult translate_ ## NAME (TranslationContext &ctx, BasicBlock *&block) {\ InstTransResult ret;\ - Function *F = block->getParent(); \ + auto natM = ctx.natM; \ + Function *F = ctx.F; \ + auto ip = ctx.natI; \ + auto &inst = ip->get_inst(); \ if( ip->has_mem_reference || ip->has_imm_reference || ip->has_external_ref() ) {\ HASREF;\ } else {\ @@ -84,8 +101,12 @@ bool initInstructionDispatch(); return ContinueBlock;\ } -#define GENERIC_TRANSLATION(NAME, NOREFS) static InstTransResult translate_ ## NAME (NativeModulePtr natM, BasicBlock *&block, InstPtr ip, MCInst &inst) {\ +#define GENERIC_TRANSLATION(NAME, NOREFS) static InstTransResult translate_ ## NAME (TranslationContext &ctx, BasicBlock *&block) {\ InstTransResult ret;\ + auto natM = ctx.natM; \ + Function *F = ctx.F; \ + auto ip = ctx.natI; \ + auto &inst = ip->get_inst(); \ ret = NOREFS;\ return ret;\ } diff --git a/mc-sema/cfgToLLVM/JumpTables.cpp b/mc-sema/cfgToLLVM/JumpTables.cpp index 7dfa2a7e1..b96c8b9b6 100644 --- a/mc-sema/cfgToLLVM/JumpTables.cpp +++ b/mc-sema/cfgToLLVM/JumpTables.cpp @@ -1,31 +1,31 @@ /* -Copyright (c) 2014, Trail of Bits -All rights reserved. + Copyright (c) 2014, Trail of Bits + All rights reserved. -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: + Redistribution and use in source and binary forms, with or without modification, + are permitted provided that the following conditions are met: - Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. + Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. - Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. + Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or + other materials provided with the distribution. - Neither the name of Trail of Bits nor the names of its - contributors may be used to endorse or promote products derived from - this software without specific prior written permission. + Neither the name of Trail of Bits nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ #include #include #include @@ -48,439 +48,354 @@ using namespace llvm; extern llvm::PointerType *g_PRegStruct; // convert a jump table to a data section of symbols -static DataSection* tableToDataSection(VA new_base, const MCSJumpTable& jt) { - DataSection *ds = new DataSection(); - - const vector& entries = jt.getJumpTable(); - VA curAddr = new_base; +static DataSection* tableToDataSection(VA new_base, const MCSJumpTable &jt) { + auto ds = new DataSection(); + const auto &entries = jt.getJumpTable(); + VA curAddr = new_base; - for(vector::const_iterator itr = entries.begin(); - itr != entries.end(); - itr++) - { - string sub_name = "sub_" + to_string(*itr, hex); - DataSectionEntry dse(curAddr, sub_name); - ds->addEntry(dse); - curAddr += 4; - } + for (auto va : entries) { + std::string sub_name = "sub_" + to_string(va, hex); + DataSectionEntry dse(curAddr, sub_name); + ds->addEntry(dse); + curAddr += 4; + } - return ds; + return ds; } // convert an index table to a data blob -static DataSection* tableToDataSection(VA new_base, const JumpIndexTable& jit) { - DataSection *ds = new DataSection(); - - const vector& entries = jit.getJumpIndexTable(); - - DataSectionEntry dse(new_base, entries); - ds->addEntry(dse); - - return ds; +static DataSection *tableToDataSection(VA new_base, const JumpIndexTable &jit) { + auto ds = new DataSection(); + const auto &entries = jit.getJumpIndexTable(); + DataSectionEntry dse(new_base, entries); + ds->addEntry(dse); + return ds; } -template -static bool addTableDataSection(NativeModulePtr natMod, - Module *M, VA &newVA, const T& table) -{ +template +static bool addTableDataSection(TranslationContext &ctx, + VA &newVA, const T &table) { + auto natMod = ctx.natM; + auto M = ctx.M; - list &globaldata = natMod->getData(); - list::const_iterator git = globaldata.begin(); - - // ensure we make this the last data section - newVA = 0; - while( git != globaldata.end() ) { - const DataSection &dt = *git; - uint64_t extent = dt.getBase() + dt.getSize(); - if(newVA < extent) { - newVA = extent; - } - git++; + // ensure we make this the last data section + newVA = 0; + for (const auto &dt : natMod->getData()) { + uint64_t extent = dt.getBase() + dt.getSize(); + if (newVA < extent) { + newVA = extent; } + } - // skip a few - newVA += 4; + // skip a few + newVA += 4; - // create a new data section from the table - DataSection *ds = tableToDataSection(newVA, table); - - // add to global data section list - globaldata.push_back(*ds); + // create a new data section from the table + DataSection *ds = tableToDataSection(newVA, table); - // create the GlobalVariable - string bufferName = "data_0x" + to_string(newVA, hex); - StructType *st_opaque = StructType::create(M->getContext()); - GlobalVariable *gv = new GlobalVariable(*M, - st_opaque, - true, - GlobalVariable::InternalLinkage, - NULL, - bufferName); + // add to global data section list + natMod->addDataSection(*ds); - vector data_section_types; - vector secContents; + // create the GlobalVariable + std::string bufferName = "data_0x" + to_string(newVA, std::hex); + auto st_opaque = llvm::StructType::create(M->getContext()); + auto gv = new llvm::GlobalVariable( *M, st_opaque, true, + llvm::GlobalVariable::InternalLinkage, + NULL, + bufferName); - dataSectionToTypesContents(globaldata, - *ds, - M, - secContents, - data_section_types, - false); + std::vector data_section_types; + std::vector secContents; + dataSectionToTypesContents(natMod->getData(), *ds, M, secContents, + data_section_types, false); - st_opaque->setBody(data_section_types, true); - Constant *cst = ConstantStruct::get(st_opaque, secContents); - gv->setAlignment(4); - gv->setInitializer(cst); + st_opaque->setBody(data_section_types, true); + auto cst = llvm::ConstantStruct::get(st_opaque, secContents); + gv->setAlignment(4); + gv->setInitializer(cst); - return true; + return true; -} -bool addJumpTableDataSection(NativeModulePtr natMod, - Module *M, - VA &newVA, - const MCSJumpTable& table) -{ - return addTableDataSection(natMod, M, newVA, table); +} +bool addJumpTableDataSection(TranslationContext &ctx, VA &newVA, + const MCSJumpTable &table) { + return addTableDataSection(ctx, newVA, table); } -bool addJumpIndexTableDataSection(NativeModulePtr natMod, - Module *M, - VA &newVA, - const JumpIndexTable& table) -{ - return addTableDataSection(natMod, M, newVA, table); +bool addJumpIndexTableDataSection(TranslationContext &ctx, VA &newVA, const JumpIndexTable &table) { + return addTableDataSection(ctx, newVA, table); } -void doJumpTableViaData( - BasicBlock *& block, - Value *fptr, - const int bitness) -{ - Function *ourF = block->getParent(); - //make the call, the only argument should be our parents arguments - TASSERT(ourF->arg_size() == 1, ""); +void doJumpTableViaData(llvm::BasicBlock *&block, llvm::Value *fptr, + const int bitness) { + auto ourF = block->getParent(); + //make the call, the only argument should be our parents arguments + TASSERT(ourF->arg_size() == 1, ""); - - if(!fptr->getType()->isPtrOrPtrVectorTy()) { - Module *M = ourF->getParent(); - // get mem address - std::vector args; - args.push_back(g_PRegStruct); - Type *returnTy = Type::getVoidTy(M->getContext()); - FunctionType *FT = FunctionType::get(returnTy, args, false); - - PointerType *FptrTy = PointerType::get(FT, 0); - fptr = new IntToPtrInst(fptr, FptrTy, "", block); - } - std::vector subArgs; - subArgs.push_back(ourF->arg_begin()); - CallInst *c = CallInst::Create(fptr, subArgs, "", block); -} - -void doJumpTableViaData( - NativeModulePtr natM, - BasicBlock *& block, - InstPtr ip, - MCInst &inst, - const int bitness) -{ - Value *addr = MEM_REFERENCE(0); - //doJumpTableViaData(block, addr, bitness); - - llvm::errs() << __FUNCTION__ << ": Doing jump table via data\n"; - Function *ourF = block->getParent(); - Module *M = ourF->getParent(); + if (!fptr->getType()->isPtrOrPtrVectorTy()) { + auto M = ourF->getParent(); // get mem address - std::vector args; + std::vector args; args.push_back(g_PRegStruct); - Type *returnTy = Type::getVoidTy(M->getContext()); - FunctionType *FT = FunctionType::get(returnTy, args, false); - - PointerType *FptrTy = PointerType::get(FT, 0); - PointerType *Fptr2Ty = PointerType::get(FptrTy, 0); - - Value *func_addr = CastInst::CreatePointerCast(addr, Fptr2Ty, "", block); - - // read in entry from table - Instruction *new_func = noAliasMCSemaScope(new LoadInst(func_addr, "", block)); - - doJumpTableViaData(block, new_func, bitness); + auto returnTy = llvm::Type::getVoidTy(M->getContext()); + auto FT = llvm::FunctionType::get(returnTy, args, false); + auto FptrTy = llvm::PointerType::get(FT, 0); + fptr = new llvm::IntToPtrInst(fptr, FptrTy, "", block); + } + std::vector subArgs; + subArgs.push_back(ourF->arg_begin()); + llvm::CallInst::Create(fptr, subArgs, "", block); } -template -static void doJumpTableViaSwitch( - NativeModulePtr natM, - BasicBlock *& block, - InstPtr ip, - MCInst &inst) -{ +void doJumpTableViaData(TranslationContext &ctx, llvm::BasicBlock *&block, + const int bitness) { + auto ip = ctx.natI; + auto &inst = ip->get_inst(); + auto natM = ctx.natM; - llvm::errs() << __FUNCTION__ << ": Doing jumpt table via switch\n"; - Function *F = block->getParent(); - Module *M = F->getParent(); - // we know this conforms to - // jmp [reg*4+displacement] + llvm::Value *addr = MEM_REFERENCE(0); + //doJumpTableViaData(block, addr, bitness); - // sanity check - const MCOperand& scale = OP(1); - const MCOperand& index = OP(2); + llvm::errs() << __FUNCTION__ << ": Doing jump table via data\n"; + auto ourF = block->getParent(); + auto M = ourF->getParent(); + // get mem address + std::vector args; + args.push_back(g_PRegStruct); + auto returnTy = llvm::Type::getVoidTy(M->getContext()); + auto FT = llvm::FunctionType::get(returnTy, args, false); - TASSERT(index.isReg(), "Conformant jump tables need index to be a register"); - TASSERT(scale.isImm() && scale.getImm() == (bitness/8), "Conformant jump tables have scale == 4"); + auto FptrTy = llvm::PointerType::get(FT, 0); + auto Fptr2Ty = llvm::PointerType::get(FptrTy, 0); + auto func_addr = llvm::CastInst::CreatePointerCast(addr, Fptr2Ty, "", block); - MCSJumpTablePtr jmpptr = ip->get_jump_table(); - - // to ensure no negative entries - Value *adjustment = CONST_V(block, jmpptr->getInitialEntry()); - Value *reg_val = R_READ(block, index.getReg()); - Value *real_index = - BinaryOperator::Create(Instruction::Add, adjustment, reg_val, "", block); - - // create a default block that just traps - BasicBlock *defaultBlock = - BasicBlock::Create(block->getContext(), "", block->getParent(), 0); - Function *trapFn = Intrinsic::getDeclaration(M, Intrinsic::trap); - CallInst::Create(trapFn, "", defaultBlock); - ReturnInst::Create(defaultBlock->getContext(), defaultBlock); - // end default block - - const std::vector &jmpblocks = jmpptr->getJumpTable(); - - // create a switch inst - SwitchInst *theSwitch = SwitchInst::Create( - real_index, - defaultBlock, - jmpblocks.size(), - block); - - // populate switch - int myindex = 0; - for(std::vector::const_iterator itr = jmpblocks.begin(); - itr != jmpblocks.end(); - itr++) - { - std::string bbname = "block_0x"+to_string(*itr, std::hex); - BasicBlock *toBlock = bbFromStrName(bbname, F); - TASSERT(toBlock != NULL, "Could not find block: "+bbname); - theSwitch->addCase(CONST_V(block, myindex), toBlock); - ++myindex; - } + // read in entry from table + auto new_func = noAliasMCSemaScope(new llvm::LoadInst(func_addr, "", block)); + doJumpTableViaData(block, new_func, bitness); } -void doJumpTableViaSwitch( - NativeModulePtr natM, - BasicBlock *& block, - InstPtr ip, - MCInst &inst, - const int bitness) -{ - switch(bitness) - { - case 32: - return doJumpTableViaSwitch<32>(natM, block, ip, inst); - case 64: - return doJumpTableViaSwitch<64>(natM, block, ip, inst); - default: - TASSERT(false, "Invalid bitness!"); - } +template +static void doJumpTableViaSwitch(TranslationContext &ctx, llvm::BasicBlock *&block) { + auto ip = ctx.natI; + auto &inst = ip->get_inst(); + auto natM = ctx.natM; + llvm::errs() << __FUNCTION__ << ": Doing jump table via switch\n"; + auto F = block->getParent(); + auto M = F->getParent(); + // we know this conforms to + // jmp [reg*4+displacement] + + // sanity check + const auto &scale = OP(1); + const auto &index = OP(2); + + TASSERT(index.isReg(), "Conformant jump tables need index to be a register"); + TASSERT(scale.isImm() && scale.getImm() == (bitness / 8), + "Conformant jump tables have scale == 4"); + + MCSJumpTablePtr jmpptr = ip->get_jump_table(); + + // to ensure no negative entries + llvm::Value *adjustment = CONST_V(block, jmpptr->getInitialEntry()); + llvm::Value *reg_val = R_READ(block, index.getReg()); + llvm::Value *real_index = llvm::BinaryOperator::Create(llvm::Instruction::Add, + adjustment, reg_val, + "", block); + + // create a default block that just traps + auto defaultBlock = llvm::BasicBlock::Create(block->getContext(), "", + block->getParent(), 0); + auto trapFn = llvm::Intrinsic::getDeclaration(M, llvm::Intrinsic::trap); + + llvm::CallInst::Create(trapFn, "", defaultBlock); + llvm::ReturnInst::Create(defaultBlock->getContext(), defaultBlock); + // end default block + + const auto &jmpblocks = jmpptr->getJumpTable(); + + // create a switch inst + SwitchInst *theSwitch = SwitchInst::Create(real_index, defaultBlock, + jmpblocks.size(), block); + + // populate switch + int myindex = 0; + for (auto jmp_block_va : jmpblocks) { + BasicBlock *toBlock = ctx.va_to_bb[jmp_block_va]; + TASSERT(toBlock != NULL, "Could not find block"); + theSwitch->addCase(CONST_V(block, myindex), toBlock); + ++myindex; + } } - -template -static void doJumpTableViaSwitchReg( - BasicBlock *& block, - InstPtr ip, - Value *regVal, - BasicBlock *&default_block) -{ - - llvm::errs() << __FUNCTION__ << ": Doing jumpt table via switch(reg)\n"; - Function *F = block->getParent(); - Module *M = F->getParent(); - - - MCSJumpTablePtr jmpptr = ip->get_jump_table(); - - // create a default block that just traps - default_block = - BasicBlock::Create(block->getContext(), "", block->getParent(), 0); - // end default block - - const std::vector &jmpblocks = jmpptr->getJumpTable(); - std::unordered_set uniq_blocks(jmpblocks.begin(), jmpblocks.end()); - - // create a switch inst - SwitchInst *theSwitch = SwitchInst::Create( - regVal, - default_block, - uniq_blocks.size(), - block); - - // populate switch - for(auto blockVA : uniq_blocks) - { - std::string bbname = "block_0x"+to_string(blockVA, std::hex); - BasicBlock *toBlock = bbFromStrName(bbname, F); - llvm::errs() << __FUNCTION__ << ": Mapping from " << to_string(blockVA, std::hex) << " => " << bbname << "\n"; - TASSERT(toBlock != NULL, "Could not find block: "+bbname); - - ConstantInt *thecase = CONST_V(block, blockVA); - - theSwitch->addCase( - thecase, - toBlock); - } - +void doJumpTableViaSwitch(TranslationContext &ctx, llvm::BasicBlock *&block, int bitness) { + switch (bitness) { + case 32: + doJumpTableViaSwitch<32>(ctx, block); + break; + case 64: + doJumpTableViaSwitch<64>(ctx, block); + break; + default: + TASSERT(false, "Invalid bitness!") + ; + } } -void doJumpOffsetTableViaSwitchReg( - BasicBlock *& block, - InstPtr ip, - Value *regVal, - BasicBlock *&default_block, - Value *data_location, - MCSOffsetTablePtr ot_ptr) -{ +template +static void doJumpTableViaSwitchReg(TranslationContext &ctx, + llvm::BasicBlock *&block, + llvm::Value *regVal, + llvm::BasicBlock *&default_block) { - llvm::errs() << __FUNCTION__ << ": Doing jump offset table via switch(reg)\n"; - Function *F = block->getParent(); - + llvm::errs() << __FUNCTION__ << ": Doing jump table via switch(reg)\n"; - // create a default block that just traps - default_block = - BasicBlock::Create(block->getContext(), "", block->getParent(), 0); - // end default block + auto F = block->getParent(); + auto M = F->getParent(); + auto ip = ctx.natI; + auto jmpptr = ip->get_jump_table(); - const std::vector< std::pair > &offset_dest = ot_ptr->getConstTable(); - std::unordered_map uniq_blocks; - for (auto const & blockpair : offset_dest) { - uniq_blocks[blockpair.first] = blockpair.second; - } + // create a default block that just traps + default_block = BasicBlock::Create(block->getContext(), "", + block->getParent(), 0); + // end default block - // switch on the offset, not the memory value - Value *switch_val = BinaryOperator::CreateSub(regVal, data_location, "", block); - switch_val = BinaryOperator::CreateAnd(switch_val, CONST_V<64>(block, 0xFFFFFFFF), "", block); - // create a switch inst - SwitchInst *theSwitch = SwitchInst::Create( - switch_val, - default_block, - uniq_blocks.size(), - block); + const std::vector &jmpblocks = jmpptr->getJumpTable(); + std::unordered_set uniq_blocks(jmpblocks.begin(), jmpblocks.end()); - // populate switch - for(const auto & entry : uniq_blocks) - { - std::string bbname = "block_0x"+to_string(entry.second, std::hex); - BasicBlock *toBlock = bbFromStrName(bbname, F); - llvm::errs() << __FUNCTION__ << ": Mapping from " << to_string(entry.first, std::hex) << " => " << bbname << "\n"; - TASSERT(toBlock != NULL, "Could not find block: "+bbname); - - ConstantInt *thecase = CONST_V<64>(block, entry.first); - - theSwitch->addCase( - thecase, - toBlock); - } + // create a switch inst + auto theSwitch = llvm::SwitchInst::Create(regVal, default_block, + uniq_blocks.size(), block); + // populate switch + for (auto blockVA : uniq_blocks) { + auto toBlock = ctx.va_to_bb[blockVA]; + TASSERT(toBlock != NULL, "Could not find block!"); + auto thecase = CONST_V(block, blockVA); + theSwitch->addCase(thecase, toBlock); + } } -void doJumpTableViaSwitchReg( - BasicBlock *& block, - InstPtr ip, - Value *regVal, - BasicBlock *&default_block, - const int bitness) -{ - switch(bitness) - { - case 32: - return doJumpTableViaSwitchReg<32>(block, ip, regVal, default_block); - case 64: - return doJumpTableViaSwitchReg<64>(block, ip, regVal, default_block); - default: - TASSERT(false, "Invalid bitness!"); - } +void doJumpOffsetTableViaSwitchReg(TranslationContext &ctx, llvm::BasicBlock *&block, + llvm::Value *regVal, + llvm::BasicBlock *&default_block, + llvm::Value *data_location, + MCSOffsetTablePtr ot_ptr) { + auto ip = ctx.natI; + llvm::errs() << __FUNCTION__ << ": Doing jump offset table via switch(reg)\n"; + auto F = block->getParent(); + + // create a default block that just traps + default_block = llvm::BasicBlock::Create(block->getContext(), "", + block->getParent(), 0); + // end default block + + const auto &offset_dest = ot_ptr->getConstTable(); + std::unordered_map uniq_blocks; + for (auto const &blockpair : offset_dest) { + uniq_blocks[blockpair.first] = blockpair.second; + } + + // switch on the offset, not the memory value + llvm::Value *switch_val = llvm::BinaryOperator::CreateSub(regVal, + data_location, "", + block); + switch_val = llvm::BinaryOperator::CreateAnd(switch_val, + CONST_V<64>(block, 0xFFFFFFFF), + "", block); + // create a switch inst + auto theSwitch = llvm::SwitchInst::Create(switch_val, default_block, + uniq_blocks.size(), block); + + // populate switch + for (const auto &entry : uniq_blocks) { + auto toBlock = ctx.va_to_bb[entry.second]; + TASSERT(toBlock != NULL, "Could not find block!"); + auto thecase = CONST_V<64>(block, entry.first); + theSwitch->addCase(thecase, toBlock); + } } -static BasicBlock *emitJumpIndexWrite( - Function *F, - uint8_t idx_val, - unsigned dest_reg, - BasicBlock *contBlock - ) -{ - // create new block - BasicBlock *writeBlock = - BasicBlock::Create(F->getContext(), "", F, 0); - - // write index to destination register - R_WRITE<32>(writeBlock, dest_reg, CONST_V<32>(writeBlock, idx_val)); - - // jump to continue block - BranchInst::Create(contBlock, writeBlock); - - return writeBlock; +void doJumpTableViaSwitchReg(TranslationContext &ctx, llvm::BasicBlock *&block, + llvm::Value *regVal, + llvm::BasicBlock *&default_block, + const int bitness) { + switch (bitness) { + case 32: + return doJumpTableViaSwitchReg<32>(ctx, block, regVal, default_block); + case 64: + return doJumpTableViaSwitchReg<64>(ctx, block, regVal, default_block); + default: + TASSERT(false, "Invalid bitness!") + ; + } } -void doJumpIndexTableViaSwitch( - BasicBlock *&block, - InstPtr ip) -{ - Function *F = block->getParent(); - Module *M = F->getParent(); - // we know this conforms to - // movzx reg32, [base+disp] +static llvm::BasicBlock *emitJumpIndexWrite(llvm::Function *F, uint8_t idx_val, + unsigned dest_reg, + llvm::BasicBlock *contBlock) { + // create new block + auto writeBlock = llvm::BasicBlock::Create(F->getContext(), "", F, 0); - // sanity check - const MCInst &inst = ip->get_inst(); - const MCOperand& dest = OP(0); - const MCOperand& base = OP(1); + // write index to destination register + R_WRITE<32>(writeBlock, dest_reg, CONST_V<32>(writeBlock, idx_val)); - TASSERT(base.isReg(), "Conformant jump index tables need base to be a register"); - TASSERT(dest.isReg(), "Conformant jump index tables need to write to a register"); + // jump to continue block + llvm::BranchInst::Create(contBlock, writeBlock); - JumpIndexTablePtr idxptr = ip->get_jump_index_table(); - - // to ensure no negative entries - Value *adjustment = CONST_V<32>(block, idxptr->getInitialEntry()); - Value *reg_val = R_READ<32>(block, base.getReg()); - Value *real_index = - BinaryOperator::Create(Instruction::Add, adjustment, reg_val, "", block); - - BasicBlock *continueBlock = - BasicBlock::Create(block->getContext(), "", F, 0); - - // create a default block that just traps - BasicBlock *defaultBlock = - BasicBlock::Create(block->getContext(), "", F, 0); - Function *trapFn = Intrinsic::getDeclaration(M, Intrinsic::trap); - CallInst::Create(trapFn, "", defaultBlock); - BranchInst::Create(continueBlock, defaultBlock); - // end default block - - const std::vector &idxblocks = idxptr->getJumpIndexTable(); - - - // create a switch inst - SwitchInst *theSwitch = SwitchInst::Create( - real_index, - defaultBlock, - idxblocks.size(), - block); - - // populate switch - int myindex = 0; - for(std::vector::const_iterator itr = idxblocks.begin(); - itr != idxblocks.end(); - itr++) - { - BasicBlock *writeBl = emitJumpIndexWrite(F, *itr, dest.getReg(), continueBlock ); - theSwitch->addCase(CONST_V<32>(block, myindex), writeBl); - ++myindex; - } - - // new block to write to is continue block - block = continueBlock; + return writeBlock; +} + +void doJumpIndexTableViaSwitch(llvm::BasicBlock *&block, NativeInstPtr ip) { + auto F = block->getParent(); + auto M = F->getParent(); + // we know this conforms to + // movzx reg32, [base+disp] + + // sanity check + const auto &inst = ip->get_inst(); + const auto &dest = OP(0); + const auto &base = OP(1); + + TASSERT(base.isReg(), + "Conformant jump index tables need base to be a register"); + TASSERT(dest.isReg(), + "Conformant jump index tables need to write to a register"); + + JumpIndexTablePtr idxptr = ip->get_jump_index_table(); + + // to ensure no negative entries + llvm::Value *adjustment = CONST_V<32>(block, idxptr->getInitialEntry()); + llvm::Value *reg_val = R_READ<32>(block, base.getReg()); + llvm::Value *real_index = llvm::BinaryOperator::Create(llvm::Instruction::Add, + adjustment, reg_val, + "", block); + + auto continueBlock = llvm::BasicBlock::Create(block->getContext(), "", F, 0); + + // create a default block that just traps + auto defaultBlock = llvm::BasicBlock::Create(block->getContext(), "", F, 0); + auto trapFn = Intrinsic::getDeclaration(M, llvm::Intrinsic::trap); + llvm::CallInst::Create(trapFn, "", defaultBlock); + llvm::BranchInst::Create(continueBlock, defaultBlock); + // end default block + + const auto &idxblocks = idxptr->getJumpIndexTable(); + + // create a switch inst + auto theSwitch = llvm::SwitchInst::Create(real_index, defaultBlock, + idxblocks.size(), block); + + // populate switch + int myindex = 0; + for (auto index : idxblocks) { + BasicBlock *writeBl = emitJumpIndexWrite(F, index, dest.getReg(), + continueBlock); + theSwitch->addCase(CONST_V<32>(block, myindex), writeBl); + ++myindex; + } + + // new block to write to is continue block + block = continueBlock; } diff --git a/mc-sema/cfgToLLVM/JumpTables.h b/mc-sema/cfgToLLVM/JumpTables.h index 2a2229ba1..f64722927 100644 --- a/mc-sema/cfgToLLVM/JumpTables.h +++ b/mc-sema/cfgToLLVM/JumpTables.h @@ -1,171 +1,186 @@ /* -Copyright (c) 2014, Trail of Bits -All rights reserved. + Copyright (c) 2014, Trail of Bits + All rights reserved. -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: + Redistribution and use in source and binary forms, with or without modification, + are permitted provided that the following conditions are met: - Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. + Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. - Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. + Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or + other materials provided with the distribution. - Neither the name of Trail of Bits nor the names of its - contributors may be used to endorse or promote products derived from - this software without specific prior written permission. + Neither the name of Trail of Bits nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ #ifndef _JUMPTABLES_H #define _JUMPTABLES_H -#include -#include + +#include +#include #include #include #include -template class Table { -public: - Table(const std::vector &table, int entry): m_table(table), m_entry(entry) {}; - virtual int getInitialEntry() const { return this->m_entry; } - virtual ~Table() {}; - virtual const std::vector& getTable(void) const { return this->m_table; } - virtual const std::vector& getConstTable(void) const { return this->m_table; } +struct TranslationContext; -protected: - std::vector m_table; - int m_entry; - virtual std::vector& getTable(void) { return this->m_table; } +template +class Table { + public: + Table(const std::vector &table, int entry) + : m_table(table), + m_entry(entry) {} + + virtual int getInitialEntry(void) const { + return this->m_entry; + } + + virtual ~Table(void) {} + + virtual const std::vector &getTable(void) const { + return this->m_table; + } + + virtual const std::vector &getConstTable(void) const { + return this->m_table; + } + + protected: + std::vector m_table; + int m_entry; + + virtual std::vector &getTable(void) { + return this->m_table; + } }; -class MCSOffsetTable : public Table< std::pair > { - protected: - VA m_start_addr; - public: - MCSOffsetTable(const std::vector< std::pair > &table, int entry, VA start): - Table< std::pair >::Table(table, entry), m_start_addr(start) {}; - virtual ~MCSOffsetTable() {}; +class MCSOffsetTable : public Table> { + protected: + VA m_start_addr; + public: + MCSOffsetTable(const std::vector> &table, + int entry, VA start) + : Table>::Table(table, entry), + m_start_addr(start) {} - virtual VA getStartAddr() const {return this->m_start_addr;} + virtual ~MCSOffsetTable(void) {} + + virtual VA getStartAddr(void) const { + return this->m_start_addr; + } }; class MCSJumpTable : public Table { + protected: + VA m_offset_from_data; -protected: - VA m_offset_from_data; -public: - MCSJumpTable(const std::vector &table, int entry, VA data_offset): - Table::Table(table, entry), m_offset_from_data(data_offset) {}; - virtual const std::vector& getJumpTable(void) const { return this->getTable(); } - virtual std::vector& getJumpTable(void) { return this->getTable(); } - virtual VA getOffsetFromData() const {return this->m_offset_from_data; } - virtual ~MCSJumpTable() {}; + public: + MCSJumpTable(const std::vector &table, int entry, VA data_offset) + : Table::Table(table, entry), + m_offset_from_data(data_offset) {} + + virtual const std::vector &getJumpTable(void) const { + return this->getTable(); + } + + virtual std::vector &getJumpTable(void) { + return this->getTable(); + } + + virtual VA getOffsetFromData(void) const { + return this->m_offset_from_data; + } + + virtual ~MCSJumpTable(void) {} }; class JumpIndexTable : public Table { -public: - JumpIndexTable(const std::vector &table, int entry): - Table::Table(table, entry) {}; - virtual const std::vector& getJumpIndexTable(void) const { return this->getTable(); } - virtual std::vector& getJumpIndexTable(void) { return this->getTable(); } - virtual ~JumpIndexTable() {}; + public: + JumpIndexTable(const std::vector &table, int entry) + : Table::Table(table, entry) {} + virtual const std::vector &getJumpIndexTable(void) const { + return this->getTable(); + } + + virtual std::vector &getJumpIndexTable(void) { + return this->getTable(); + } + + virtual ~JumpIndexTable() {} }; +typedef MCSJumpTable *MCSJumpTablePtr; +typedef JumpIndexTable *JumpIndexTablePtr; -typedef boost::shared_ptr MCSJumpTablePtr; -typedef boost::shared_ptr JumpIndexTablePtr; +bool addJumpTableDataSection(TranslationContext &ctx, VA &newVA, + const MCSJumpTable &table); - -bool addJumpTableDataSection(NativeModulePtr natMod, - llvm::Module *M, - VA &newVA, - const MCSJumpTable& table); - -bool addJumpIndexTableDataSection(NativeModulePtr natMod, - llvm::Module *M, - VA &newVA, - const JumpIndexTable& table); +bool addJumpIndexTableDataSection(TranslationContext &ctx, + VA &newVA, const JumpIndexTable &table); // check for the format: // jmp [reg*4+] -static bool isConformantJumpInst(InstPtr jmpinst) { +// +// TODO(pag): This is x86-specific; factor into an arch-specific place. +static bool isConformantJumpInst(NativeInstPtr jmpinst) { - const llvm::MCInst &inst = jmpinst->get_inst(); + const auto &inst = jmpinst->get_inst(); - // these are now done via switch() - if(inst.getOpcode() == llvm::X86::JMP32r || - inst.getOpcode() == llvm::X86::JMP64r) { - return true; - } - - if (inst.getNumOperands() < 4) { - - return false; - } - const llvm::MCOperand& scale = inst.getOperand(1); - const llvm::MCOperand& index = inst.getOperand(2); - const llvm::MCOperand& disp = inst.getOperand(3); - - if(scale.isImm() && // scale: - // can be 4 (32-bit) or 8 (64-bit) - (scale.getImm() == 4 || scale.getImm() == 8) && - index.isReg() && // index must be a register - disp.isImm()) - { - return true; - } + // these are now done via switch() + if (inst.getOpcode() == llvm::X86::JMP32r || + inst.getOpcode() == llvm::X86::JMP64r) { + return true; + } + if (inst.getNumOperands() < 4) { return false; + } + + const auto &scale = inst.getOperand(1); + const auto &index = inst.getOperand(2); + const auto &disp = inst.getOperand(3); + + // scale: can be 4 (32-bit) or 8 (64-bit) + // index must be a register + return scale.isImm() && index.isReg() && disp.isImm() && + (scale.getImm() == 4 || scale.getImm() == 8); } -void doJumpTableViaData( - NativeModulePtr natM, - llvm::BasicBlock *& block, - InstPtr ip, - llvm::MCInst &inst, - const int bitness); +void doJumpTableViaData(TranslationContext &ctx, llvm::BasicBlock *&block, + const int bitness); -void doJumpTableViaData( - llvm::BasicBlock *& block, - llvm::Value *val, - const int bitness); +void doJumpTableViaData(llvm::BasicBlock *&block, llvm::Value *val, + const int bitness); -void doJumpTableViaSwitch( - NativeModulePtr natM, - llvm::BasicBlock *& block, - InstPtr ip, - llvm::MCInst &inst, - const int bitness); +void doJumpTableViaSwitch(TranslationContext &ctx, llvm::BasicBlock *&block, + const int bitness); -void doJumpTableViaSwitchReg( - llvm::BasicBlock *& block, - InstPtr ip, - llvm::Value *regVal, - llvm::BasicBlock *&default_block, - const int bitness); +void doJumpTableViaSwitchReg(TranslationContext &ctx, llvm::BasicBlock *& block, + llvm::Value *regVal, + llvm::BasicBlock *&default_block, + const int bitness); -void doJumpIndexTableViaSwitch( - llvm::BasicBlock *& block, - InstPtr ip); +void doJumpIndexTableViaSwitch(llvm::BasicBlock *& block, NativeInstPtr ip); -void doJumpOffsetTableViaSwitchReg( - llvm::BasicBlock *& block, - InstPtr ip, - llvm::Value *regVal, - llvm::BasicBlock *&default_block, - llvm::Value *data_location, - MCSOffsetTablePtr ot_ptr); +void doJumpOffsetTableViaSwitchReg(TranslationContext &ctx, llvm::BasicBlock *&block, + llvm::Value *regVal, + llvm::BasicBlock *&default_block, + llvm::Value *data_location, + MCSOffsetTablePtr ot_ptr); #endif diff --git a/mc-sema/cfgToLLVM/raiseX86.cpp b/mc-sema/cfgToLLVM/raiseX86.cpp index 10a81c95d..620e8e529 100644 --- a/mc-sema/cfgToLLVM/raiseX86.cpp +++ b/mc-sema/cfgToLLVM/raiseX86.cpp @@ -32,6 +32,7 @@ #include "x86Helpers.h" #include "ArchOps.h" #include "RegisterUsage.h" +#include "InstructionDispatch.h" #include "llvm/ADT/StringSwitch.h" @@ -52,7 +53,6 @@ #include "llvm/Support/CommandLine.h" -#include #include "Externals.h" #include "../common/to_string.h" #include "../common/Defaults.h" @@ -71,14 +71,6 @@ static llvm::cl::opt AddBreakpoints( "Add debug breakpoint function calls before each lifted instruction."), llvm::cl::init(false)); - -static llvm::cl::opt BlockPerInstr( - "put-instrs-in-blocks", - llvm::cl::desc( - "Add debug breakpoint function calls before each lifted instruction."), - llvm::cl::init(false)); - - #include Instruction *noAliasMCSemaScope(Instruction *inst) { @@ -168,7 +160,7 @@ void INTERNAL_M_WRITE(int width, unsigned addrspace, llvm::BasicBlock *b, return; } -void M_WRITE_T(InstPtr ip, llvm::BasicBlock *b, llvm::Value *addr, +void M_WRITE_T(NativeInstPtr ip, llvm::BasicBlock *b, llvm::Value *addr, llvm::Value *data, llvm::Type *ptrtype) { //this is also straightforward llvm::Value *writeLoc = addr; @@ -193,23 +185,6 @@ void M_WRITE_T(InstPtr ip, llvm::BasicBlock *b, llvm::Value *addr, return; } -class bfs_cfg_visitor : public boost::default_bfs_visitor { - private: - NativeFunctionPtr natFun; - Function *F; - NativeModulePtr natMod; - bool &didError; - public: - bfs_cfg_visitor(NativeFunctionPtr n, NativeModulePtr m, Function *F_, bool &e) - : natFun(n), - F(F_), - natMod(m), - didError(e) { - } - template - void discover_vertex(Vertex u, const Graph & g) const; -}; - Value *MCRegToValue(BasicBlock *b, unsigned reg) { Module *M = b->getParent()->getParent(); @@ -876,18 +851,18 @@ static Instruction *GEPLocal(Type *Ty, const char *name, Instruction *I) { } // namespace x86 -void allocateLocals(Function *F, int bits) { +void ArchAllocRegisterVars(llvm::BasicBlock *begin, int bits) { + auto &C = begin->getContext(); //always at the beginning of a function //we need to allocate local variables via alloca, these locals will //live for the life of the function context and be the sources/sinks //of any activity involving registers or flags - BasicBlock *begin = &F->getEntryBlock(); switch (bits) { case 32: { //UPDATEREGS -- when we add something to 'regs' struct change here //create a local for every member in the 'regs' struct //create 32-bit width general purpose registers - Type *RegTy = Type::getInt32Ty(F->getContext()); + Type *RegTy = Type::getInt32Ty(C); Instruction *eipA = x86::GEPLocal(RegTy, "XIP", begin); Instruction *eaxA = x86::GEPLocal(RegTy, "XAX", eipA); @@ -900,7 +875,7 @@ void allocateLocals(Function *F, int bits) { Instruction *espA = x86::GEPLocal(RegTy, "XSP", ebpA); //create other fields for flags - Type *boolTy = Type::getInt1Ty(F->getContext()); + Type *boolTy = Type::getInt1Ty(C); Instruction *zfA = x86::GEPLocal(boolTy, "ZF", espA); Instruction *sfA = x86::GEPLocal(boolTy, "PF", zfA); Instruction *ofA = x86::GEPLocal(boolTy, "AF", sfA); @@ -911,7 +886,7 @@ void allocateLocals(Function *F, int bits) { TASSERT(dfA != nullptr, ""); // FPU STACK - Type *floatTy = Type::getX86_FP80Ty(F->getContext()); + Type *floatTy = Type::getX86_FP80Ty(C); // 8 float values make up the ST registers Type *floatArrayTy = ArrayType::get(floatTy, 8); Instruction *stRegs = x86::GEPLocal(floatArrayTy, "STi", afA); @@ -922,7 +897,7 @@ void allocateLocals(Function *F, int bits) { // TOP of stack from FPU flags // really a 3-bit integer - Type *topTy = Type::getIntNTy(F->getContext(), 3); + Type *topTy = Type::getIntNTy(C, 3); Instruction *fpu_TOP = x86::GEPLocal(topTy, "FPU_FLAG_TOP", fpu_C3); TASSERT(fpu_TOP != nullptr, ""); @@ -942,7 +917,7 @@ void allocateLocals(Function *F, int bits) { TASSERT(fpu_IE != nullptr, ""); // FPU CONTROL FLAGS - Type *int2Ty = Type::getIntNTy(F->getContext(), 2); + Type *int2Ty = Type::getIntNTy(C, 2); Instruction *fpu_X = x86::GEPLocal(boolTy, "FPU_CONTROL_X", fpu_IE); Instruction *fpu_RC = x86::GEPLocal(int2Ty, "FPU_CONTROL_RC", fpu_X); Instruction *fpu_PC = x86::GEPLocal(int2Ty, "FPU_CONTROL_PC", fpu_RC); @@ -960,54 +935,40 @@ void allocateLocals(Function *F, int bits) { Type *tagArrayType = ArrayType::get(int2Ty, 8); Instruction *fpu_TagWord = x86::GEPLocal(tagArrayType, "FPU_TAG", fpu_IM); - Instruction *fpu_LASTIP_SEG = x86::GEPLocal( - Type::getInt16Ty(F->getContext()), "FPU_LASTIP_SEG", fpu_TagWord); + Instruction *fpu_LASTIP_SEG = x86::GEPLocal(Type::getInt16Ty(C), + "FPU_LASTIP_SEG", + fpu_TagWord); Instruction *fpu_LASTIP_OFF = x86::GEPLocal(RegTy, "FPU_LASTIP_OFF", fpu_LASTIP_SEG); - Instruction *fpu_LASTDATA_SEG = x86::GEPLocal( - Type::getInt16Ty(F->getContext()), "FPU_LASTDATA_SEG", - fpu_LASTIP_OFF); + Instruction *fpu_LASTDATA_SEG = x86::GEPLocal(Type::getInt16Ty(C), + "FPU_LASTDATA_SEG", + fpu_LASTIP_OFF); Instruction *fpu_LASTDATA_OFF = x86::GEPLocal(RegTy, "FPU_LASTDATA_OFF", fpu_LASTDATA_SEG); - Instruction *fpu_FOPCODE = x86::GEPLocal( - Type::getIntNTy(F->getContext(), 11), "FPU_FOPCODE", - fpu_LASTDATA_OFF); + Instruction *fpu_FOPCODE = x86::GEPLocal(Type::getIntNTy(C, 11), + "FPU_FOPCODE", fpu_LASTDATA_OFF); TASSERT(fpu_FOPCODE != nullptr, ""); + auto Int128Ty = Type::getIntNTy(C, 128); + //vector registers - Instruction *vec_xmm0 = x86::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM0", fpu_FOPCODE); - Instruction *vec_xmm1 = x86::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM1", vec_xmm0); - Instruction *vec_xmm2 = x86::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM2", vec_xmm1); - Instruction *vec_xmm3 = x86::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM3", vec_xmm2); - Instruction *vec_xmm4 = x86::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM4", vec_xmm3); - Instruction *vec_xmm5 = x86::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM5", vec_xmm4); - Instruction *vec_xmm6 = x86::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM6", vec_xmm5); - Instruction *vec_xmm7 = x86::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM7", vec_xmm6); - Instruction *vec_xmm8 = x86::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM8", vec_xmm7); - Instruction *vec_xmm9 = x86::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM9", vec_xmm8); - Instruction *vec_xmm10 = x86::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM10", vec_xmm9); - Instruction *vec_xmm11 = x86::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM11", vec_xmm10); - Instruction *vec_xmm12 = x86::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM12", vec_xmm11); - Instruction *vec_xmm13 = x86::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM13", vec_xmm12); - Instruction *vec_xmm14 = x86::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM14", vec_xmm13); - Instruction *vec_xmm15 = x86::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM15", vec_xmm14); + Instruction *vec_xmm0 = x86::GEPLocal(Int128Ty, "XMM0", fpu_FOPCODE); + Instruction *vec_xmm1 = x86::GEPLocal(Int128Ty, "XMM1", vec_xmm0); + Instruction *vec_xmm2 = x86::GEPLocal(Int128Ty, "XMM2", vec_xmm1); + Instruction *vec_xmm3 = x86::GEPLocal(Int128Ty, "XMM3", vec_xmm2); + Instruction *vec_xmm4 = x86::GEPLocal(Int128Ty, "XMM4", vec_xmm3); + Instruction *vec_xmm5 = x86::GEPLocal(Int128Ty, "XMM5", vec_xmm4); + Instruction *vec_xmm6 = x86::GEPLocal(Int128Ty, "XMM6", vec_xmm5); + Instruction *vec_xmm7 = x86::GEPLocal(Int128Ty, "XMM7", vec_xmm6); + Instruction *vec_xmm8 = x86::GEPLocal(Int128Ty, "XMM8", vec_xmm7); + Instruction *vec_xmm9 = x86::GEPLocal(Int128Ty, "XMM9", vec_xmm8); + Instruction *vec_xmm10 = x86::GEPLocal(Int128Ty, "XMM10", vec_xmm9); + Instruction *vec_xmm11 = x86::GEPLocal(Int128Ty, "XMM11", vec_xmm10); + Instruction *vec_xmm12 = x86::GEPLocal(Int128Ty, "XMM12", vec_xmm11); + Instruction *vec_xmm13 = x86::GEPLocal(Int128Ty, "XMM13", vec_xmm12); + Instruction *vec_xmm14 = x86::GEPLocal(Int128Ty, "XMM14", vec_xmm13); + Instruction *vec_xmm15 = x86::GEPLocal(Int128Ty, "XMM15", vec_xmm14); // stack base and limit Instruction *stack_base = x86::GEPLocal(RegTy, "STACK_BASE", vec_xmm15); @@ -1018,7 +979,7 @@ void allocateLocals(Function *F, int bits) { case 64: { //create 64-bit width general purpose registers - Type *RegTy = Type::getInt64Ty(F->getContext()); + Type *RegTy = Type::getInt64Ty(C); Instruction *ripA = x86_64::GEPLocal(RegTy, "XIP", begin); Instruction *raxA = x86_64::GEPLocal(RegTy, "XAX", ripA); Instruction *rbxA = x86_64::GEPLocal(RegTy, "XBX", raxA); @@ -1031,7 +992,7 @@ void allocateLocals(Function *F, int bits) { //create other fields for flags - Type *boolTy = Type::getInt1Ty(F->getContext()); + Type *boolTy = Type::getInt1Ty(C); Instruction *zfA = x86_64::GEPLocal(boolTy, "ZF", rspA); Instruction *sfA = x86_64::GEPLocal(boolTy, "PF", zfA); Instruction *ofA = x86_64::GEPLocal(boolTy, "AF", sfA); @@ -1043,7 +1004,7 @@ void allocateLocals(Function *F, int bits) { // FPU STACK //Type *floatTy = IntegerType::get(F->getContext(), 128); - Type *floatTy = Type::getX86_FP80Ty(F->getContext()); + Type *floatTy = Type::getX86_FP80Ty(C); // 8 float values make up the ST registers Type *floatArrayTy = ArrayType::get(floatTy, 8); Instruction *stRegs = x86_64::GEPLocal(floatArrayTy, "STi", dfA); @@ -1057,7 +1018,7 @@ void allocateLocals(Function *F, int bits) { // TOP of stack from FPU flags // really a 3-bit integer - Type *topTy = Type::getIntNTy(F->getContext(), 3); + Type *topTy = Type::getIntNTy(C, 3); Instruction *fpu_TOP = x86_64::GEPLocal(topTy, "FPU_FLAG_TOP", fpu_C3); TASSERT(fpu_TOP != nullptr, ""); @@ -1077,7 +1038,7 @@ void allocateLocals(Function *F, int bits) { TASSERT(fpu_IE != nullptr, ""); // FPU CONTROL FLAGS - Type *int2Ty = Type::getIntNTy(F->getContext(), 2); + Type *int2Ty = Type::getIntNTy(C, 2); Instruction *fpu_X = x86_64::GEPLocal(boolTy, "FPU_CONTROL_X", fpu_IE); Instruction *fpu_RC = x86_64::GEPLocal(int2Ty, "FPU_CONTROL_RC", fpu_X); Instruction *fpu_PC = x86_64::GEPLocal(int2Ty, "FPU_CONTROL_PC", fpu_RC); @@ -1098,55 +1059,42 @@ void allocateLocals(Function *F, int bits) { TASSERT(fpu_TagWord != nullptr, ""); - Instruction *fpu_LASTIP_SEG = x86_64::GEPLocal( - Type::getInt16Ty(F->getContext()), "FPU_LASTIP_SEG", fpu_TagWord); + Instruction *fpu_LASTIP_SEG = x86_64::GEPLocal(Type::getInt16Ty(C), + "FPU_LASTIP_SEG", + fpu_TagWord); Instruction *fpu_LASTIP_OFF = x86_64::GEPLocal(RegTy, "FPU_LASTIP_OFF", fpu_LASTIP_SEG); - Instruction *fpu_LASTDATA_SEG = x86_64::GEPLocal( - Type::getInt16Ty(F->getContext()), "FPU_LASTDATA_SEG", - fpu_LASTIP_OFF); + Instruction *fpu_LASTDATA_SEG = x86_64::GEPLocal(Type::getInt16Ty(C), + "FPU_LASTDATA_SEG", + fpu_LASTIP_OFF); Instruction *fpu_LASTDATA_OFF = x86_64::GEPLocal(RegTy, "FPU_LASTDATA_OFF", fpu_LASTDATA_SEG); - Instruction *fpu_FOPCODE = x86_64::GEPLocal( - Type::getIntNTy(F->getContext(), 11), "FPU_FOPCODE", - fpu_LASTDATA_OFF); + Instruction *fpu_FOPCODE = x86_64::GEPLocal(Type::getIntNTy(C, 11), + "FPU_FOPCODE", + fpu_LASTDATA_OFF); TASSERT(fpu_FOPCODE != nullptr, ""); + auto Int128Ty = Type::getIntNTy(C, 128); + //vector registers - Instruction *vec_xmm0 = x86_64::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM0", fpu_FOPCODE); - Instruction *vec_xmm1 = x86_64::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM1", vec_xmm0); - Instruction *vec_xmm2 = x86_64::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM2", vec_xmm1); - Instruction *vec_xmm3 = x86_64::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM3", vec_xmm2); - Instruction *vec_xmm4 = x86_64::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM4", vec_xmm3); - Instruction *vec_xmm5 = x86_64::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM5", vec_xmm4); - Instruction *vec_xmm6 = x86_64::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM6", vec_xmm5); - Instruction *vec_xmm7 = x86_64::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM7", vec_xmm6); - Instruction *vec_xmm8 = x86_64::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM8", vec_xmm7); - Instruction *vec_xmm9 = x86_64::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM9", vec_xmm8); - Instruction *vec_xmm10 = x86_64::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM10", vec_xmm9); - Instruction *vec_xmm11 = x86_64::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM11", vec_xmm10); - Instruction *vec_xmm12 = x86_64::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM12", vec_xmm11); - Instruction *vec_xmm13 = x86_64::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM13", vec_xmm12); - Instruction *vec_xmm14 = x86_64::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM14", vec_xmm13); - Instruction *vec_xmm15 = x86_64::GEPLocal( - Type::getIntNTy(F->getContext(), 128), "XMM15", vec_xmm14); + Instruction *vec_xmm0 = x86_64::GEPLocal(Int128Ty, "XMM0", fpu_FOPCODE); + Instruction *vec_xmm1 = x86_64::GEPLocal(Int128Ty, "XMM1", vec_xmm0); + Instruction *vec_xmm2 = x86_64::GEPLocal(Int128Ty, "XMM2", vec_xmm1); + Instruction *vec_xmm3 = x86_64::GEPLocal(Int128Ty, "XMM3", vec_xmm2); + Instruction *vec_xmm4 = x86_64::GEPLocal(Int128Ty, "XMM4", vec_xmm3); + Instruction *vec_xmm5 = x86_64::GEPLocal(Int128Ty, "XMM5", vec_xmm4); + Instruction *vec_xmm6 = x86_64::GEPLocal(Int128Ty, "XMM6", vec_xmm5); + Instruction *vec_xmm7 = x86_64::GEPLocal(Int128Ty, "XMM7", vec_xmm6); + Instruction *vec_xmm8 = x86_64::GEPLocal(Int128Ty, "XMM8", vec_xmm7); + Instruction *vec_xmm9 = x86_64::GEPLocal(Int128Ty, "XMM9", vec_xmm8); + Instruction *vec_xmm10 = x86_64::GEPLocal(Int128Ty, "XMM10", vec_xmm9); + Instruction *vec_xmm11 = x86_64::GEPLocal(Int128Ty, "XMM11", vec_xmm10); + Instruction *vec_xmm12 = x86_64::GEPLocal(Int128Ty, "XMM12", vec_xmm11); + Instruction *vec_xmm13 = x86_64::GEPLocal(Int128Ty, "XMM13", vec_xmm12); + Instruction *vec_xmm14 = x86_64::GEPLocal(Int128Ty, "XMM14", vec_xmm13); + Instruction *vec_xmm15 = x86_64::GEPLocal(Int128Ty, "XMM15", vec_xmm14); // stack base and limit Instruction *stack_base = x86_64::GEPLocal(RegTy, "STACK_BASE", @@ -1173,21 +1121,6 @@ void allocateLocals(Function *F, int bits) { return; } -BasicBlock *bbFromStrName(string n, Function *F) { - BasicBlock *found = nullptr; - - for (Function::iterator it = F->begin(); it != F->end(); ++it) { - BasicBlock *b = it; - - if (b->getName() == n) { - found = b; - break; - } - } - - return found; -} - static void CreateInstrBreakpoint(llvm::BasicBlock *B, VA pc) { auto M = B->getParent()->getParent(); auto &C = M->getContext(); @@ -1218,21 +1151,11 @@ static void CreateInstrBreakpoint(llvm::BasicBlock *B, VA pc) { llvm::CallInst::Create(IFT, "", B); } -InstTransResult liftInstr(InstPtr ip, BasicBlock *&block, NativeBlockPtr nb, - Function *F, NativeFunctionPtr natF, - NativeModulePtr natM, bool doAnnotation) { +static InstTransResult LiftInstIntoBlock(TranslationContext &ctx, + llvm::BasicBlock *&block, + bool doAnnotation) { - auto pc = ip->get_loc(); - - // Put each instruction into its own basic block. - if (BlockPerInstr) { - std::stringstream ss; - ss << "instr_0x" << std::hex << pc; - auto &C = F->getContext(); - auto instr_block = BasicBlock::Create(C, ss.str(), F); - BranchInst::Create(instr_block, block); - block = instr_block; - } + auto pc = ctx.natI->get_loc(); // At the beginning of the block, make a call to a dummy function with the // same name as the block. This function call cannot be optimized away, and @@ -1241,15 +1164,15 @@ InstTransResult liftInstr(InstPtr ip, BasicBlock *&block, NativeBlockPtr nb, CreateInstrBreakpoint(block, pc); } - InstTransResult disInst_result = liftInstrImpl(ip, block, nb, F, natF, natM); + InstTransResult disInst_result = LiftInstIntoBlockImpl(ctx, block); // we need to loop over this function and find any un-annotated instructions. // then we annotate each instruction if (doAnnotation) { - for (auto &B : *F) { + for (auto &B : *ctx.F) { for (auto &I : B) { VA inst_eip; - if (!getAnnotation( &I, inst_eip)) { + if (!getAnnotation(&I, inst_eip)) { addAnnotation(&I, pc); } } @@ -1259,124 +1182,93 @@ InstTransResult liftInstr(InstPtr ip, BasicBlock *&block, NativeBlockPtr nb, return disInst_result; } -template -void bfs_cfg_visitor::discover_vertex(Vertex u, const Graph &g) const { - auto curBlock = this->natFun->block_from_id(u); - llvm::BasicBlock *curLLVMBlock = nullptr; - - if ( !curBlock) { - throw TErr(__LINE__, __FILE__, - "Could not look up block " + to_string(u, dec)); - } +static bool LiftBlockIntoFunction(TranslationContext &ctx) { + auto didError = false; //first, either create or look up the LLVM basic block for this native //block. we are either creating it for the first time, or, we are //going to look up a blank block - curLLVMBlock = bbFromStrName(curBlock->get_name(), this->F); - - if (curLLVMBlock == nullptr) { - //we need to create the block, so do that - curLLVMBlock = BasicBlock::Create(this->F->getContext(), - curBlock->get_name(), this->F); - TASSERT(curLLVMBlock != nullptr, ""); - } + auto block_name = ctx.natB->get_name(); + auto curLLVMBlock = ctx.va_to_bb[ctx.natB->get_base()]; //then, create a basic block for every follow of this block, if we do not //already have that basic block in our LLVM CFG - const auto &follows = curBlock->get_follows(); - for (auto blockBase : follows) { - //try and look up a block that has this blocks name - auto followNat = this->natFun->block_from_base(blockBase); - auto followName = followNat->get_name(); - auto fBB = bbFromStrName(followName, this->F); - - if ( !fBB) { - fBB = BasicBlock::Create(this->F->getContext(), followNat->get_name(), - this->F); + const auto &follows = ctx.natB->get_follows(); + for (auto succ_block_va : follows) { + if (!ctx.va_to_bb.count(succ_block_va)) { + throw TErr(__LINE__, __FILE__, "Missing successor block!"); } } //now, go through each statement and translate it into LLVM IR //statements that branch SHOULD be the last statement in a block - for (InstPtr inst : curBlock->get_insts()) { - auto r = liftInstr(inst, curLLVMBlock, curBlock, this->F, this->natFun, - this->natMod, true); - + for (auto inst : ctx.natB->get_insts()) { + ctx.natI = inst; + auto r = LiftInstIntoBlock(ctx, curLLVMBlock, true); if (r == TranslateError) { - this->didError = true; + didError = true; break; - } else if (r == TranslateErrorUnsupported - && ignoreUnsupportedInsts == false) { - this->didError = true; + } else if (r == TranslateErrorUnsupported && !ignoreUnsupportedInsts) { + didError = true; break; } } if (curLLVMBlock->getTerminator()) { - return; + return didError; } // we may need to insert a branch inst to the successor // if the block ended on a non-terminator (this happens since we // may split blocks in cfg recovery to avoid code duplication) if (follows.size() == 1) { - VA blockBase = *(follows.begin()); - std::string bbName = "block_0x" + to_string(blockBase, std::hex); - BasicBlock *nextBB = bbFromStrName(bbName, this->F); - - BranchInst::Create(nextBB, curLLVMBlock); + llvm::BranchInst::Create(ctx.va_to_bb[follows.front()], curLLVMBlock); } else { - new UnreachableInst(curLLVMBlock->getContext(), curLLVMBlock); + new llvm::UnreachableInst(curLLVMBlock->getContext(), curLLVMBlock); } + + return didError; } -static bool insertFunctionIntoModule(NativeModulePtr mod, +static bool InsertFunctionIntoModule(NativeModulePtr mod, NativeFunctionPtr func, Module *M) { - //okay, now we traverse the graph and add the instructions and blocks - //into the llvm module - - //first, get the LLVM function for this native function - Function *F = M->getFunction(func->get_name()); - - if ( !F) { + auto &C = M->getContext(); + auto F = M->getFunction(func->get_name()); + if (!F) { throw TErr(__LINE__, __FILE__, "Could not get func " + func->get_name()); } - if (F->empty() == false) { - cout << "WARNING: Asking to re-insert function: " << func->get_name() - << std::endl; - cout << "\tReturning current function instead" << std::endl; + if (!F->empty()) { + std::cout << "WARNING: Asking to re-insert function: " << func->get_name() + << std::endl << "\tReturning current function instead" + << std::endl; return true; } - //create the entry block for the function - //this block will alloca cells on the 'stack' for every register in the - //register member structure - BasicBlock *entryBlock = BasicBlock::Create(F->getContext(), "entry", F); - TASSERT(entryBlock != nullptr, ""); + auto entryBlock = llvm::BasicBlock::Create(F->getContext(), "entry", F); + ArchAllocRegisterVars(entryBlock, ArchPointerSize(M)); - allocateLocals(F, ArchPointerSize(M)); + TranslationContext ctx; + ctx.natM = mod; + ctx.natF = func; + ctx.M = M; + ctx.F = F; - //then we put an unconditional branch from the 'entry' block to the first - //block, and we create the first block - NativeBlockPtr funcEntry = func->block_from_base(func->get_start()); - BasicBlock *firstBlock = BasicBlock::Create(F->getContext(), - funcEntry->get_name(), F); - TASSERT(firstBlock != nullptr, ""); - //create a branch from the end of the entry block to the first block - BranchInst::Create(firstBlock, entryBlock); + // Create basic blocks for each basic block in the original function. + for (auto block_info : func->get_blocks()) { + ctx.va_to_bb[block_info.first] = llvm::BasicBlock::Create( + C, block_info.second->get_name(), F); + } - //now, start crawling everything in NativeFunctionPtr - CFG funcGraph = func->get_cfg(); - bool error = false; - bfs_cfg_visitor v(func, mod, F, error); + // Create a branch from the end of the entry block to the first block + llvm::BranchInst::Create(ctx.va_to_bb[func->get_start()], entryBlock); - //visit every vertex in the graph, starting from the entry block, which - //always should be block 0 - //this traversal wil build us the LLVM graph from the native graph - boost::breadth_first_search(funcGraph, - boost::vertex(func->entry_block_id(), funcGraph), - boost::visitor(v)); + // Lift every basic block into the functions. + auto error = false; + for (auto block_info : func->get_blocks()) { + ctx.natB = block_info.second; + error = LiftBlockIntoFunction(ctx) || error; + } // For ease of debugging generated code, don't allow lifted functions to // be inlined. This will make lifted and native call graphs one-to-one. @@ -1387,22 +1279,19 @@ static bool insertFunctionIntoModule(NativeModulePtr mod, } -static Constant* makeConstantBlob(llvm::LLVMContext &ctx, - const std::vector &blob) { - - Type *charTy = llvm::Type::getInt8Ty(ctx); +static Constant *CreateConstantBlob(llvm::LLVMContext &ctx, + const std::vector &blob) { + auto charTy = llvm::Type::getInt8Ty(ctx); auto arrT = llvm::ArrayType::get(charTy, blob.size()); std::vector array_elements; for (auto cur : blob) { - auto ty = llvm::Type::getInt8Ty(ctx); - auto c = llvm::ConstantInt::get(ty, cur); + auto c = llvm::ConstantInt::get(charTy, cur); array_elements.push_back(c); } - return llvm::ConstantArray::get(arrT, array_elements); } -static llvm::GlobalVariable *getSectionForDataAddr( +static llvm::GlobalVariable *GetSectionForDataAddr( const std::list &dataSecs, llvm::Module *M, VA data_addr, VA §ion_base) { @@ -1411,15 +1300,12 @@ static llvm::GlobalVariable *getSectionForDataAddr( VA end = start + dt.getSize(); if (data_addr >= start && data_addr < end) { - std::string gvar_name = "data_0x" + to_string(start, hex); //+"_ptr"; + std::string gvar_name = "data_0x" + to_string(start, std::hex); section_base = start; return M->getNamedGlobal(gvar_name); } - } - return nullptr; - } static llvm::Constant* getPtrSizedValue(llvm::Module *M, llvm::Constant *v, @@ -1443,7 +1329,7 @@ static llvm::Constant* getPtrSizedValue(llvm::Module *M, llvm::Constant *v, } void dataSectionToTypesContents(const std::list &globaldata, - DataSection& ds, llvm::Module *M, + const DataSection &ds, llvm::Module *M, std::vector &secContents, std::vector &data_section_types, bool convert_to_callback) { @@ -1464,32 +1350,29 @@ void dataSectionToTypesContents(const std::list &globaldata, // }; // const std::list &ds_entries = ds.getEntries(); - for (list::const_iterator dsec_itr = ds_entries.begin(); - dsec_itr != ds_entries.end(); dsec_itr++) { - string sym_name; + for (auto &data_sec_entry : ds_entries) { + std::string sym_name; - if (dsec_itr->getSymbol(sym_name)) { + if (data_sec_entry.getSymbol(sym_name)) { const char *func_addr_str = sym_name.c_str() + 4; VA func_addr = strtoull(func_addr_str, nullptr, 16); - std::cout << __FUNCTION__ << ": Found symbol: " << sym_name << "\n"; + std::cout << __FUNCTION__ << ": Found symbol: " << sym_name << std::endl; if (sym_name.find("ext_") == 0) { - - Constant *final_val = nullptr; - - GlobalValue *ext_v = M->getNamedValue(func_addr_str); + llvm::Constant *final_val = nullptr; + auto ext_v = M->getNamedValue(func_addr_str); if (ext_v != nullptr && isa(ext_v)) { - final_val = getPtrSizedValue(M, ext_v, dsec_itr->getSize()); + final_val = getPtrSizedValue(M, ext_v, data_sec_entry.getSize()); //cout << "External function" << sym_name << " has type: " << final_val->getType() << "\n"; } else if (ext_v != nullptr) { - final_val = getPtrSizedValue(M, ext_v, dsec_itr->getSize()); + final_val = getPtrSizedValue(M, ext_v, data_sec_entry.getSize()); //cout << "External data" << sym_name << " has type: " << final_val->getType() << "\n"; // assume ext data } else { TASSERT(ext_v != nullptr, - "Could not find external: " + string(func_addr_str)); + "Could not find external: " + std::string(func_addr_str)); //cout << "External fail" << sym_name << " has type: " << final_val->getType() << "\n"; } @@ -1501,7 +1384,7 @@ void dataSectionToTypesContents(const std::list &globaldata, // to do this, create a callback driver for // it first (since it may be called externally) - Function *func = nullptr; + llvm::Function *func = nullptr; if (convert_to_callback) { func = ArchAddCallbackDriver(M, func_addr); @@ -1511,7 +1394,7 @@ void dataSectionToTypesContents(const std::list &globaldata, TASSERT(func != nullptr, "Could not find function: " + sym_name); } - Constant *final_val = getPtrSizedValue(M, func, dsec_itr->getSize()); + auto final_val = getPtrSizedValue(M, func, data_sec_entry.getSize()); secContents.push_back(final_val); data_section_types.push_back(final_val->getType()); @@ -1521,29 +1404,29 @@ void dataSectionToTypesContents(const std::list &globaldata, // then compute the offset from base of data // and store as integer value of (base+offset) VA section_base; - GlobalVariable *g_ref = getSectionForDataAddr(globaldata, M, func_addr, - section_base); + auto g_ref = GetSectionForDataAddr(globaldata, M, func_addr, + section_base); TASSERT(g_ref != nullptr, - "Could not get data addr for:" + string(func_addr_str)); + "Could not get data addr for:" + std::string(func_addr_str)); // instead of referencing an element directly // we just convert the pointer to an integer // and add its offset from the base of data // to the new data section pointer VA addr_diff = func_addr - section_base; - Constant *final_val; + llvm::Constant *final_val = nullptr; //cout << " Symbol name : " << string(func_addr_str) << " : " // << to_string(func_addr, hex) << " : " // << to_string(section_base, hex) << "\n"; //cout.flush(); if (ArchPointerSize(M) == Pointer32) { - Constant *int_val = ConstantExpr::getPtrToInt( - g_ref, Type::getInt32Ty(M->getContext())); - final_val = ConstantExpr::getAdd( + auto int_val = llvm::ConstantExpr::getPtrToInt( + g_ref, llvm::Type::getInt32Ty(M->getContext())); + final_val = llvm::ConstantExpr::getAdd( int_val, CONST_V_INT<32>(M->getContext(), addr_diff)); } else { - Constant *int_val = ConstantExpr::getPtrToInt( - g_ref, Type::getInt64Ty(M->getContext())); - final_val = ConstantExpr::getAdd( + auto int_val = llvm::ConstantExpr::getPtrToInt( + g_ref, llvm::Type::getInt64Ty(M->getContext())); + final_val = llvm::ConstantExpr::getAdd( int_val, CONST_V_INT<64>(M->getContext(), addr_diff)); } secContents.push_back(final_val); @@ -1552,7 +1435,7 @@ void dataSectionToTypesContents(const std::list &globaldata, } else { // add array // this holds opaque data in a byte array - Constant *arr = makeConstantBlob(M->getContext(), dsec_itr->getBytes()); + auto arr = CreateConstantBlob(M->getContext(), data_sec_entry.getBytes()); secContents.push_back(arr); data_section_types.push_back(arr->getType()); } // if dsec_itr @@ -1560,16 +1443,14 @@ void dataSectionToTypesContents(const std::list &globaldata, } struct DataSectionVar { - DataSection *section; + const DataSection *section; llvm::StructType *opaque_type; llvm::GlobalVariable *var; }; -static bool insertDataSections(NativeModulePtr natMod, Module *M) { - - list &globaldata = natMod->getData(); - list::iterator git = globaldata.begin(); +static bool InsertDataSections(NativeModulePtr natMod, Module *M) { + auto &globaldata = natMod->getData(); //insert all global data before we insert the CFG std::vector gvars; @@ -1578,9 +1459,9 @@ static bool insertDataSections(NativeModulePtr natMod, Module *M) { // as later we may have data references that are // from one section into another - for (DataSection &dt : globaldata) { + for (auto &dt : globaldata) { std::string bufferName; - bufferName = "data_0x" + to_string(dt.getBase(), hex); + bufferName = "data_0x" + to_string(dt.getBase(), std::hex); //report << "inserting global data section named "; //report << bufferName << "\n"; std::cout << "inserting global data section named "; @@ -1597,7 +1478,7 @@ static bool insertDataSections(NativeModulePtr natMod, Module *M) { } // actually populate the data sections - for (DataSectionVar &var : gvars) { + for (auto &var : gvars) { //data we use to create LLVM values for this section // secContents is the actual values we will be inserting @@ -1606,7 +1487,6 @@ static bool insertDataSections(NativeModulePtr natMod, Module *M) { // the global variable std::vector data_section_types; - dataSectionToTypesContents(globaldata, *var.section, M, secContents, data_section_types, true); @@ -1615,45 +1495,44 @@ static bool insertDataSections(NativeModulePtr natMod, Module *M) { // create an initializer list using the now filled in opaque // structure type - auto cst = ConstantStruct::get(var.opaque_type, secContents); + auto cst = llvm::ConstantStruct::get(var.opaque_type, secContents); // align on pointer size boundary, max needed by SSE instructions var.var->setAlignment(ArchPointerSize(M)); var.var->setInitializer(cst); } - return true; - } -void renameLiftedFunctions(NativeModulePtr natMod, llvm::Module *M, +void RenameLiftedFunctions(NativeModulePtr natMod, llvm::Module *M, const std::set &entry_point_pcs) { - list funcs = natMod->get_funcs(); - // Rename the functions to have their 'nice' names, where available. - for (auto f : funcs) { - if (entry_point_pcs.count(f->get_start())) { + for (auto &f : natMod->get_funcs()) { + auto native_func = f.second; + if (entry_point_pcs.count(native_func->get_start())) { continue; } - auto sub_name = f->get_name(); + + auto sub_name = native_func->get_name(); auto F = M->getFunction(sub_name); std::stringstream ss; ss << "callback_" << sub_name; - if ( !M->getFunction(ss.str())) { - auto &sym_name = f->get_symbol_name(); - if ( !sym_name.empty()) { + if (!M->getFunction(ss.str())) { + auto &sym_name = native_func->get_symbol_name(); + if (!sym_name.empty()) { F->setName(sym_name); } } } } -static void initLiftedFunctions(NativeModulePtr natMod, llvm::Module *M) { - for (auto f : natMod->get_funcs()) { - auto fname = f->get_name(); +static void InitLiftedFunctions(NativeModulePtr natMod, llvm::Module *M) { + for (auto &f : natMod->get_funcs()) { + auto native_func = f.second; + auto fname = native_func->get_name(); auto F = M->getFunction(fname); - if ( !F) { + if (!F) { F = llvm::dyn_cast( M->getOrInsertFunction(fname, getBaseFunctionType(M))); @@ -1662,33 +1541,32 @@ static void initLiftedFunctions(NativeModulePtr natMod, llvm::Module *M) { ArchSetCallingConv(M, F); // make local functions 'static' F->setLinkage(llvm::GlobalValue::InternalLinkage); - cout << "Inserted function: " << fname << std::endl; + std::cout << "Inserted function: " << fname << std::endl; } else { - cout << "Already inserted function: " << fname << ", skipping." - << std::endl; + std::cout << "Already inserted function: " << fname << ", skipping." + << std::endl; } } } -static void initExternalData(NativeModulePtr natMod, llvm::Module *M) { +static void InitExternalData(NativeModulePtr natMod, llvm::Module *M) { for (auto dr : natMod->getExtDataRefs()) { auto dsize = dr->getDataSize(); auto symname = dr->getSymbolName(); auto extType = llvm::ArrayType::get(llvm::Type::getInt8Ty(M->getContext()), dsize); - auto gv = llvm::dyn_cast( M->getOrInsertGlobal(symname, extType)); TASSERT(gv != nullptr, "Could not make global value!"); + if (dr->isWeak()) { gv->setLinkage(llvm::GlobalValue::ExternalWeakLinkage); } else { gv->setLinkage(llvm::GlobalValue::ExternalLinkage); } - const auto &triple = M->getTargetTriple(); - if (WINDOWS_TRIPLE == triple) { - // this only makes sense for win32 + llvm::Triple triple(M->getTargetTriple()); + if (llvm::Triple::Win32 == triple.getOS()) { gv->setDLLStorageClass(llvm::GlobalValue::DLLImportStorageClass); } } @@ -1696,7 +1574,7 @@ static void initExternalData(NativeModulePtr natMod, llvm::Module *M) { // Iterate over the list of external functions and insert them as // global functions. -static void initExternalCode(NativeModulePtr natMod, llvm::Module *M) { +static void InitExternalCode(NativeModulePtr natMod, llvm::Module *M) { for (auto e : natMod->getExtCalls()) { auto conv = e->getCallingConvention(); auto argCount = e->getNumArgs(); @@ -1710,16 +1588,16 @@ static void initExternalCode(NativeModulePtr natMod, llvm::Module *M) { continue; } - if(conv == ExternalCodeRef::McsemaCall) { + if (ExternalCodeRef::McsemaCall == conv) { // normal mcsema function prototypes - llvm::Function *newF = llvm::dyn_cast( - M->getOrInsertFunction(ArchNameMcsemaCall(symName), getBaseFunctionType(M))); - ArchSetCallingConv(M, newF); - newF->setLinkage(llvm::GlobalValue::ExternalLinkage); + F = llvm::dyn_cast(M->getOrInsertFunction( + ArchNameMcSemaCall(symName), getBaseFunctionType(M))); + ArchSetCallingConv(M, F); + F->setLinkage(llvm::GlobalValue::ExternalLinkage); continue; } - std::vector arguments; + std::vector arguments; llvm::Type *returnType = nullptr; // Create arguments. @@ -1788,25 +1666,24 @@ static void initExternalCode(NativeModulePtr natMod, llvm::Module *M) { } } -static bool liftFunctionsIntoModule(NativeModulePtr natMod, Module *M) { +static bool LiftFunctionsIntoModule(NativeModulePtr natMod, Module *M) { // populate functions - for (auto f : natMod->get_funcs()) { - if ( !insertFunctionIntoModule(natMod, f, M)) { + for (auto &func_info : natMod->get_funcs()) { + auto f = func_info.second; + if (!InsertFunctionIntoModule(natMod, f, M)) { std::string fname = f->get_name(); - cerr << "Could not insert function: " << fname - << " into the LLVM module\n"; + std::cerr << "Could not insert function: " << fname + << " into the LLVM module" << std::endl; return false; - break; } } return true; } -bool liftNativeCodeIntoModule(NativeModulePtr natMod, Module *M) { - bool result = true; - initLiftedFunctions(natMod, M); - initExternalData(natMod, M); - initExternalCode(natMod, M); - insertDataSections(natMod, M); - return liftFunctionsIntoModule(natMod, M); +bool LiftCodeIntoModule(NativeModulePtr natMod, Module *M) { + InitLiftedFunctions(natMod, M); + InitExternalData(natMod, M); + InitExternalCode(natMod, M); + InsertDataSections(natMod, M); + return LiftFunctionsIntoModule(natMod, M); } diff --git a/mc-sema/cfgToLLVM/raiseX86.h b/mc-sema/cfgToLLVM/raiseX86.h index 63beafb00..b24cd5d17 100644 --- a/mc-sema/cfgToLLVM/raiseX86.h +++ b/mc-sema/cfgToLLVM/raiseX86.h @@ -64,8 +64,6 @@ typedef std::vector regDefT; //registers via alloca and then copies into them from the structure argument void setupFlow(llvm::Function *, regDefT &); -llvm::BasicBlock *bbFromStrName(std::string n, llvm::Function *F); - /////////////////////////////////////////////////////////////////////////////// // state modeling functions /////////////////////////////////////////////////////////////////////////////// @@ -106,7 +104,6 @@ static llvm::ConstantInt *CONST_V(llvm::BasicBlock *b, uint64_t width, return llvm::ConstantInt::get(bTy, val); } - llvm::Value *MCRegToValue(llvm::BasicBlock *b, unsigned reg); void GENERIC_WRITEREG(llvm::BasicBlock *b, MCSemaRegs reg, llvm::Value *v); @@ -149,11 +146,11 @@ llvm::Value *R_READ(llvm::BasicBlock *b, int reg) { } } -llvm::Value *INTERNAL_M_READ(unsigned width, unsigned addrspace, llvm::BasicBlock *b, - llvm::Value *addr); +llvm::Value *INTERNAL_M_READ(unsigned width, unsigned addrspace, + llvm::BasicBlock *b, llvm::Value *addr); template -llvm::Value *M_READ(InstPtr ip, llvm::BasicBlock *b, llvm::Value *addr) { +llvm::Value *M_READ(NativeInstPtr ip, llvm::BasicBlock *b, llvm::Value *addr) { return INTERNAL_M_READ(width, ip->get_addr_space(), b, addr); } @@ -163,14 +160,14 @@ llvm::Value *M_READ_0(llvm::BasicBlock *b, llvm::Value *addr) { } // defined in raiseX86.cpp -void M_WRITE_T(InstPtr ip, llvm::BasicBlock *b, llvm::Value *addr, +void M_WRITE_T(NativeInstPtr ip, llvm::BasicBlock *b, llvm::Value *addr, llvm::Value *data, llvm::Type *ptrtype); void INTERNAL_M_WRITE(int width, unsigned addrspace, llvm::BasicBlock *b, llvm::Value *addr, llvm::Value *data); template -void M_WRITE(InstPtr ip, llvm::BasicBlock *b, llvm::Value *addr, +void M_WRITE(NativeInstPtr ip, llvm::BasicBlock *b, llvm::Value *addr, llvm::Value *data) { return INTERNAL_M_WRITE(width, ip->get_addr_space(), b, addr, data); } @@ -189,23 +186,16 @@ void F_SET(llvm::BasicBlock *b, MCSemaRegs flag); void F_CLEAR(llvm::BasicBlock *b, MCSemaRegs flag); -void allocateLocals(llvm::Function *, int); - -llvm::BasicBlock *bbFromStrName(std::string, llvm::Function *); +void ArchAllocRegisterVars(llvm::BasicBlock *, int); /////////////////////////////////////////////////////////////////////////////// // API usage functions /////////////////////////////////////////////////////////////////////////////// -InstTransResult liftInstr(InstPtr ip, llvm::BasicBlock *&block, - NativeBlockPtr nb, llvm::Function *F, - NativeFunctionPtr natF, NativeModulePtr natM, - bool doAnnotation); - llvm::Value *makeCallbackForLocalFunction(llvm::Module *M, VA local_target); void dataSectionToTypesContents(const std::list &globaldata, - DataSection& ds, llvm::Module *M, + const DataSection &ds, llvm::Module *M, std::vector& secContents, std::vector& data_section_types, bool convert_to_callback); diff --git a/mc-sema/cfgToLLVM/toLLVM.cpp b/mc-sema/cfgToLLVM/toLLVM.cpp index ce033182a..1503ac726 100644 --- a/mc-sema/cfgToLLVM/toLLVM.cpp +++ b/mc-sema/cfgToLLVM/toLLVM.cpp @@ -34,41 +34,31 @@ #include #include -using namespace llvm; -using namespace std; +llvm::StructType *g_RegStruct = nullptr; +llvm::PointerType *g_PRegStruct = nullptr; -StructType *g_RegStruct; -PointerType *g_PRegStruct; - -FunctionType *getBaseFunctionType(Module *M) { - vector baseFunctionArgs; +llvm::FunctionType *getBaseFunctionType(llvm::Module *M) { + std::vector baseFunctionArgs; baseFunctionArgs.push_back(g_PRegStruct); - FunctionType *funcTy = FunctionType::get(Type::getVoidTy(M->getContext()), - baseFunctionArgs, false); - TASSERT(funcTy != NULL, ""); - + auto funcTy = llvm::FunctionType::get( + llvm::Type::getVoidTy(M->getContext()), + baseFunctionArgs, false); return funcTy; } -Triple *getTargetTriple(const llvm::Target *T) { - if (T->getName() == "x86") - return new Triple("i386", "unknown", "unknown"); - else if (T->getName() == "x86-64") - return new Triple("x86_64", "unknown", "unknown"); -} - -void initRegStateStruct(Module *M) { +void ArchInitRegStateStruct(llvm::Module *M) { unsigned int regWidth = ArchPointerSize(M); //create the "reg" struct type auto &C = M->getContext(); - StructType *regs = StructType::create(C, "RegState"); - vector regFields; + auto regs = llvm::StructType::create(C, "RegState"); + std::vector regFields; - Type *RegTy = IntegerType::getIntNTy(C, regWidth); - Type *XMMTy = IntegerType::getIntNTy(C, 128); - Type *FlagTy = IntegerType::getInt8Ty(C); + auto RegTy = llvm::IntegerType::getIntNTy(C, regWidth); + auto XMMTy = llvm::IntegerType::getIntNTy(C, 128); + auto FlagTy = llvm::IntegerType::getInt8Ty(C); + auto SegTy = llvm::Type::getInt16Ty(C); //UPDATEREGS -- when we add something to 'regs', add it here //GPRs @@ -91,7 +81,7 @@ void initRegStateStruct(Module *M) { regFields.push_back(FlagTy); // OF // 14 regFields.push_back(FlagTy); // DF // 15 - ArrayType *fpu_regs = ArrayType::get(Type::getX86_FP80Ty(C), 8); + auto fpu_regs = llvm::ArrayType::get(llvm::Type::getX86_FP80Ty(C), 8); regFields.push_back(fpu_regs); // 80 bytes 24 // FPU Status Word @@ -121,18 +111,18 @@ void initRegStateStruct(Module *M) { regFields.push_back(FlagTy); // FPU Invalid Operation Mask // 39 // FPU tag word; 8 element array of 2-bit entries - ArrayType *fpu_tag_word = ArrayType::get(FlagTy, 8); + auto fpu_tag_word = llvm::ArrayType::get(FlagTy, 8); regFields.push_back(fpu_tag_word); // 40 // Last Instruction. - regFields.push_back(Type::getInt16Ty(C)); // Segment // 41 + regFields.push_back(SegTy); // Segment // 41 regFields.push_back(RegTy); // Offset // 42 // Last Data - regFields.push_back(Type::getInt16Ty(C)); // Segment // 43 + regFields.push_back(SegTy); // Segment // 43 regFields.push_back(RegTy); // Offset // 44 - regFields.push_back(Type::getInt16Ty(C)); // FPU FOPCODE // 45 + regFields.push_back(llvm::Type::getInt16Ty(C)); // FPU FOPCODE // 45 // vector registers regFields.push_back(XMMTy); // XMM0 46 @@ -158,21 +148,19 @@ void initRegStateStruct(Module *M) { regFields.push_back(RegTy); // 71: stack limit (smallest value) if (64 == regWidth) { - regFields.push_back(RegTy); // R8 // 8 - regFields.push_back(RegTy); // R9 // 9 - regFields.push_back(RegTy); // R10 // 10 - regFields.push_back(RegTy); // R11 // 11 - regFields.push_back(RegTy); // R12 // 12 - regFields.push_back(RegTy); // R13 // 13 - regFields.push_back(RegTy); // R14 // 14 - regFields.push_back(RegTy); // R15 // 15 + regFields.push_back(RegTy); // R8 72 + regFields.push_back(RegTy); // R9 73 + regFields.push_back(RegTy); // R10 74 + regFields.push_back(RegTy); // R11 75 + regFields.push_back(RegTy); // R12 76 + regFields.push_back(RegTy); // R13 77 + regFields.push_back(RegTy); // R14 78 + regFields.push_back(RegTy); // R15 79 } - PointerType *ptrToRegs = PointerType::get(regs, 0); + auto ptrToRegs = llvm::PointerType::get(regs, 0); regs->setBody(regFields, true); g_RegStruct = regs; g_PRegStruct = ptrToRegs; - - return; } diff --git a/mc-sema/cfgToLLVM/toLLVM.h b/mc-sema/cfgToLLVM/toLLVM.h index 0eda336a3..acbb83e31 100644 --- a/mc-sema/cfgToLLVM/toLLVM.h +++ b/mc-sema/cfgToLLVM/toLLVM.h @@ -60,9 +60,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #include llvm::FunctionType *getBaseFunctionType(llvm::Module *M); -llvm::Triple *getTargetTriple(const llvm::Target *T); extern llvm::StructType *g_RegStruct; extern llvm::PointerType *g_PRegStruct; -void initRegStateStruct(llvm::Module *); +void ArchInitRegStateStruct(llvm::Module *); diff --git a/mc-sema/cfgToLLVM/toModule.h b/mc-sema/cfgToLLVM/toModule.h index 17cf230b4..01b32f9f6 100644 --- a/mc-sema/cfgToLLVM/toModule.h +++ b/mc-sema/cfgToLLVM/toModule.h @@ -34,7 +34,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #include "Externals.h" //translate a NativeModule into an LLVM Module -void renameLiftedFunctions(NativeModulePtr natMod, llvm::Module *M, +void RenameLiftedFunctions(NativeModulePtr mod, llvm::Module *M, const std::set &entry_point_pcs); -bool liftNativeCodeIntoModule(NativeModulePtr, llvm::Module *); +bool LiftCodeIntoModule(NativeModulePtr, llvm::Module *); #endif diff --git a/mc-sema/cfgToLLVM/x86Helpers.cpp b/mc-sema/cfgToLLVM/x86Helpers.cpp index 1f1733300..614843171 100644 --- a/mc-sema/cfgToLLVM/x86Helpers.cpp +++ b/mc-sema/cfgToLLVM/x86Helpers.cpp @@ -1,31 +1,31 @@ /* -Copyright (c) 2013, Trail of Bits -All rights reserved. + Copyright (c) 2013, Trail of Bits + All rights reserved. -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: + Redistribution and use in source and binary forms, with or without modification, + are permitted provided that the following conditions are met: - Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. + Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. - Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. + Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or + other materials provided with the distribution. - Neither the name of the {organization} nor the names of its - contributors may be used to endorse or promote products derived from - this software without specific prior written permission. + Neither the name of the {organization} nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ #include "toLLVM.h" #include "raiseX86.h" #include "Externals.h" @@ -42,34 +42,30 @@ using namespace std; // is a data reference or an immediate value; in some cases data is mapped // at 0x0 and determining this could be tricky -bool addrIsInData(VA addr, NativeModulePtr m, VA &base, VA minAddr = 0x0 ) { - list §ions = m->getData(); - list::iterator it = sections.begin(); - - // sanity check: - // assume no data references before minAddr. - if (addr < minAddr) { - return false; - } - - if(sections.size() == 0) { - llvm::dbgs() << __FUNCTION__ << ": WARNING: no data sections!\n"; - return false; - } - while( it != sections.end() ) { - DataSection &curSec = *it; - VA low = curSec.getBase(); - VA high = low+curSec.getSize(); - - if( addr >= low && addr < high ) { - base = low; - return true; - } - - ++it; - } - +bool addrIsInData(VA addr, NativeModulePtr m, VA &base, VA minAddr = 0x0) { + // sanity check: + // assume no data references before minAddr. + if (addr < minAddr) { return false; + } + + auto §ions = m->getData(); + if (sections.empty()) { + llvm::dbgs() << __FUNCTION__ << ": WARNING: no data sections!\n"; + return false; + + } + for (auto &curSec : sections) { + VA low = curSec.getBase(); + VA high = low + curSec.getSize(); + + if (addr >= low && addr < high) { + base = low; + return true; + } + } + + return false; } // Compute a Value from a complex address expression @@ -78,177 +74,140 @@ bool addrIsInData(VA addr, NativeModulePtr m, VA &base, VA minAddr = 0x0 ) { // that in the computation instead of assuming values // are opaque immediates namespace x86 { -Value *getAddrFromExpr( BasicBlock *b, - NativeModulePtr mod, - const MCOperand &Obase, - const MCOperand &Oscale, - const MCOperand &Oindex, - const int64_t Odisp, - const MCOperand &Oseg, - bool dataOffset) -{ - TASSERT(Obase.isReg(), ""); - TASSERT(Oscale.isImm(), ""); - TASSERT(Oindex.isReg(), ""); - TASSERT(Oseg.isReg(), ""); +Value *getAddrFromExpr(BasicBlock *b, NativeModulePtr mod, + const MCOperand &Obase, const MCOperand &Oscale, + const MCOperand &Oindex, const int64_t Odisp, + const MCOperand &Oseg, bool dataOffset) { + TASSERT(Obase.isReg(), ""); + TASSERT(Oscale.isImm(), ""); + TASSERT(Oindex.isReg(), ""); + TASSERT(Oseg.isReg(), ""); - unsigned baseReg = Obase.getReg(); - int64_t disp = Odisp; + unsigned baseReg = Obase.getReg(); + int64_t disp = Odisp; - //first, we should ask, is disp an absolute reference to - //some global symbol in the original source module? - //if it is, we can replace its value with that of a pointer - //to global data - //HANDY HEURISTIC HACK - //if the base register is the stack pointer or the frame - //pointer, then skip this part - Value *d = NULL; - IntegerType *iTy = IntegerType::getInt32Ty(b->getContext()); + //first, we should ask, is disp an absolute reference to + //some global symbol in the original source module? + //if it is, we can replace its value with that of a pointer + //to global data + //HANDY HEURISTIC HACK + //if the base register is the stack pointer or the frame + //pointer, then skip this part + Value *d = NULL; + IntegerType *iTy = IntegerType::getInt32Ty(b->getContext()); - if( dataOffset || - (mod && disp && baseReg != X86::EBP && baseReg!= X86::ESP) ) - { - Value *int_val = getGlobalFromOriginalAddr<32>( - disp, mod, dataOffset ? 0 : 0x1000, b); - d = int_val; - } else { - //there is no disp value, or its relative to esp/ebp in which case - //we might not want to do anything + if (dataOffset + || (mod && disp && baseReg != X86::EBP && baseReg != X86::ESP)) { + Value *int_val = getGlobalFromOriginalAddr<32>(disp, mod, + dataOffset ? 0 : 0x1000, b); + d = int_val; + } else { + //there is no disp value, or its relative to esp/ebp in which case + //we might not want to do anything + } + + if (nullptr == d) { + //create a constant integer out of the raw displacement + //we were unable to assign the displacement to an address + d = ConstantInt::getSigned(iTy, disp); + } + + Value *rVal = nullptr; + + //read the base register (if given) + if (baseReg != X86::NoRegister) { + rVal = R_READ<32>(b, baseReg); + } else { + //if the base is not present, just use 0 + rVal = CONST_V<32>(b, 0); + } + + Value *dispComp; + dispComp = BinaryOperator::Create(Instruction::Add, rVal, d, "", b); + + //add the index amount, if present + if (Oindex.getReg() != X86::NoRegister) { + Value *index = R_READ<32>(b, Oindex.getReg()); + + int64_t scaleAmt = Oscale.getImm(); + if (scaleAmt > 1) { + index = BinaryOperator::CreateMul(index, CONST_V<32>(b, scaleAmt), "", b); } - if( nullptr == d ) { - //create a constant integer out of the raw displacement - //we were unable to assign the displacement to an address - d = ConstantInt::getSigned(iTy, disp); - } + dispComp = BinaryOperator::CreateAdd(dispComp, index, "", b); - Value *rVal = nullptr; + } - //read the base register (if given) - if( baseReg != X86::NoRegister ) { - rVal = R_READ<32>(b, baseReg); - } else { - //if the base is not present, just use 0 - rVal = CONST_V<32>(b, 0); - } + //convert the resulting integer into a pointer type + PointerType *piTy = Type::getInt32PtrTy(b->getContext()); + Value *dispPtr = new IntToPtrInst(dispComp, piTy, "", b); - Value *dispComp; - dispComp = - BinaryOperator::Create( Instruction::Add, rVal, d, "", b); - - //add the index amount, if present - if( Oindex.getReg() != X86::NoRegister ) { - Value *index = R_READ<32>(b, Oindex.getReg()); - - int64_t scaleAmt = Oscale.getImm(); - if( scaleAmt > 1 ) { - index = - BinaryOperator::CreateMul(index,CONST_V<32>(b, scaleAmt),"",b); - } - - dispComp = - BinaryOperator::CreateAdd(dispComp, index, "", b); - - } - - //convert the resulting integer into a pointer type - PointerType *piTy = Type::getInt32PtrTy(b->getContext()); - Value *dispPtr = new IntToPtrInst(dispComp, piTy, "", b); - - return dispPtr; + return dispPtr; } } +Value *getAddrFromExpr(BasicBlock *b, NativeModulePtr mod, const MCInst &inst, + NativeInstPtr ip, uint32_t which) { + const MCOperand& base = inst.getOperand(which + 0); + const MCOperand& scale = inst.getOperand(which + 1); + const MCOperand& index = inst.getOperand(which + 2); + const MCOperand& disp = inst.getOperand(which + 3); + const MCOperand& seg = inst.getOperand(which + 4); -Value *getAddrFromExpr( BasicBlock *b, - NativeModulePtr mod, - const MCInst &inst, - InstPtr ip, - uint32_t which) -{ - const MCOperand& base = inst.getOperand( which +0); - const MCOperand& scale = inst.getOperand( which +1); - const MCOperand& index = inst.getOperand( which +2); - const MCOperand& disp = inst.getOperand( which +3); - const MCOperand& seg = inst.getOperand( which +4); + TASSERT(base.isReg(), ""); + TASSERT(scale.isImm(), ""); + TASSERT(index.isReg(), ""); + TASSERT(disp.isImm(), ""); + TASSERT(seg.isReg(), ""); - TASSERT(base.isReg(), ""); - TASSERT(scale.isImm(), ""); - TASSERT(index.isReg(), ""); - TASSERT(disp.isImm(), ""); - TASSERT(seg.isReg(), ""); + // determine if this instruction is using a memory reference + // or if the displacement should be used at face value + bool has_ref = ip->has_reference(NativeInst::MEMRef); + int64_t real_disp = has_ref ? ip->get_reference(NativeInst::MEMRef) : disp.getImm(); + llvm::Module *M = b->getParent()->getParent(); - // determine if this instruction is using a memory reference - // or if the displacement should be used at face value - bool has_ref = ip->has_reference(Inst::MEMRef); - int64_t real_disp = has_ref ? ip->get_reference(Inst::MEMRef) : disp.getImm(); - llvm::Module *M = b->getParent()->getParent(); - - if(ArchPointerSize(M) == Pointer32) { + if (ArchPointerSize(M) == Pointer32) { - return x86::getAddrFromExpr(b, - mod, - base, - scale, - index, - real_disp, - seg, - has_ref); - - } else { - return x86_64::getAddrFromExpr(b, - mod, - base, - scale, - index, - real_disp, - seg, - has_ref); - } + return x86::getAddrFromExpr(b, mod, base, scale, index, real_disp, seg, + has_ref); + } else { + return x86_64::getAddrFromExpr(b, mod, base, scale, index, real_disp, seg, + has_ref); + } } -Value *MEM_AS_DATA_REF(BasicBlock *B, - NativeModulePtr natM, - const MCInst &inst, - InstPtr ip, - uint32_t which) -{ - if(false == ip->has_mem_reference) { - throw TErr(__LINE__, __FILE__, "Want to use MEM as data ref but have no MEM reference"); - } - return getAddrFromExpr(B, natM, inst, ip, which); +Value *MEM_AS_DATA_REF(BasicBlock *B, NativeModulePtr natM, const MCInst &inst, + NativeInstPtr ip, uint32_t which) { + if (false == ip->has_mem_reference) { + throw TErr(__LINE__, __FILE__, + "Want to use MEM as data ref but have no MEM reference"); + } + return getAddrFromExpr(B, natM, inst, ip, which); } +Instruction* callMemcpy(BasicBlock *B, Value *dest, Value *src, uint32_t size, + uint32_t align, bool isVolatile) { + Value *copySize = CONST_V<32>(B, size); + // ALIGN: 4 byte alignment, i think + Value *alignSize = CONST_V<32>(B, align); + // VOLATILE: false + Value *vIsVolatile = CONST_V<1>(B, isVolatile); -Instruction* callMemcpy(BasicBlock *B, Value *dest, Value *src, uint32_t size, - uint32_t align, bool isVolatile) -{ - Value *copySize = CONST_V<32>(B, size); - // ALIGN: 4 byte alignment, i think - Value *alignSize = CONST_V<32>(B, align); - // VOLATILE: false - Value *vIsVolatile = CONST_V<1>(B, isVolatile); + Type *Tys[] = {dest->getType(), src->getType(), copySize->getType()}; - Type *Tys[] = { - dest->getType(), - src->getType(), - copySize->getType()}; + Module *M = B->getParent()->getParent(); - Module *M = B->getParent()->getParent(); + Function *doMemCpy = Intrinsic::getDeclaration(M, Intrinsic::memcpy, Tys); - Function *doMemCpy = - Intrinsic::getDeclaration(M, Intrinsic::memcpy, Tys); + Value *callArgs[] = {dest, // DST + src, // SRC + copySize, // SIZE + alignSize, // ALIGN + vIsVolatile // VOLATILE + }; - Value *callArgs[] = { - dest, // DST - src, // SRC - copySize, // SIZE - alignSize, // ALIGN - vIsVolatile // VOLATILE - }; - - // actually call llvm.memcpy - return CallInst::Create(doMemCpy, callArgs, "", B); + // actually call llvm.memcpy + return CallInst::Create(doMemCpy, callArgs, "", B); } diff --git a/mc-sema/cfgToLLVM/x86Helpers.h b/mc-sema/cfgToLLVM/x86Helpers.h index d1156dc9b..287a25297 100644 --- a/mc-sema/cfgToLLVM/x86Helpers.h +++ b/mc-sema/cfgToLLVM/x86Helpers.h @@ -1,292 +1,287 @@ /* -Copyright (c) 2013, Trail of Bits -All rights reserved. + Copyright (c) 2013, Trail of Bits + All rights reserved. -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: + Redistribution and use in source and binary forms, with or without modification, + are permitted provided that the following conditions are met: - Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. + Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. - Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. + Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or + other materials provided with the distribution. - Neither the name of the {organization} nor the names of its - contributors may be used to endorse or promote products derived from - this software without specific prior written permission. + Neither the name of the {organization} nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ #pragma once #include #include "ArchOps.h" -template -llvm::Value *getValueForExternal(llvm::Module *M, InstPtr ip, llvm::BasicBlock *block) { +template +llvm::Value *getValueForExternal(llvm::Module *M, NativeInstPtr ip, + llvm::BasicBlock *block) { - llvm::Value *addrInt = NULL; + llvm::Value *addrInt = NULL; - if( ip->has_ext_call_target() ) { - std::string target = ip->get_ext_call_target()->getSymbolName(); - llvm::Value *ext_fn = M->getFunction(target); - TASSERT(ext_fn != NULL, "Could not find external: " + target); - addrInt = new llvm::PtrToIntInst( - ext_fn, llvm::Type::getIntNTy(block->getContext(), width), "", block); - } else if (ip->has_ext_data_ref() ) { - std::string target = ip->get_ext_data_ref()->getSymbolName(); - llvm::GlobalValue *gvar = M->getGlobalVariable(target); - TASSERT(gvar != NULL, "Could not find external data: " + target); - std::cout << __FUNCTION__ << ": Found external data ref to: " << target << "\n"; - - if (SystemOS(M) == llvm::Triple::Win32) { - gvar->setDLLStorageClass(llvm::GlobalValue::DLLImportStorageClass); - // sometimes windows will import this directly as the variable instead of - // as a reference to a variable. But the rest of the code wants a pointer to var - llvm::Value *toPtr = new llvm::AllocaInst(gvar->getType(), "", block); - llvm::Value *writeIt = new llvm::StoreInst(gvar, toPtr, block); - addrInt = new llvm::PtrToIntInst( - toPtr, llvm::Type::getIntNTy(block->getContext(), width), "", block); - } else { - - addrInt = new llvm::PtrToIntInst( - gvar, llvm::Type::getIntNTy(block->getContext(), width), "", block); - } + if (ip->has_ext_call_target()) { + std::string target = ip->get_ext_call_target()->getSymbolName(); + llvm::Value *ext_fn = M->getFunction(target); + TASSERT(ext_fn != NULL, "Could not find external: " + target); + addrInt = new llvm::PtrToIntInst( + ext_fn, llvm::Type::getIntNTy(block->getContext(), width), "", block); + } else if (ip->has_ext_data_ref()) { + std::string target = ip->get_ext_data_ref()->getSymbolName(); + llvm::GlobalValue *gvar = M->getGlobalVariable(target); + TASSERT(gvar != NULL, "Could not find external data: " + target); + std::cout << __FUNCTION__ << ": Found external data ref to: " << target + << "\n"; + if (SystemOS(M) == llvm::Triple::Win32) { + gvar->setDLLStorageClass(llvm::GlobalValue::DLLImportStorageClass); + // sometimes windows will import this directly as the variable instead of + // as a reference to a variable. But the rest of the code wants a pointer to var + llvm::Value *toPtr = new llvm::AllocaInst(gvar->getType(), "", block); + llvm::Value *writeIt = new llvm::StoreInst(gvar, toPtr, block); + addrInt = new llvm::PtrToIntInst( + toPtr, llvm::Type::getIntNTy(block->getContext(), width), "", block); } else { - throw TErr(__LINE__, __FILE__, "No external refernce to get value for!"); + + addrInt = new llvm::PtrToIntInst( + gvar, llvm::Type::getIntNTy(block->getContext(), width), "", block); } - return addrInt; + } else { + throw TErr(__LINE__, __FILE__, "No external refernce to get value for!"); + } + + return addrInt; } - - -template +template llvm::Value *concatInts(llvm::BasicBlock *b, llvm::Value *a1, llvm::Value *a2) { - TASSERT(width == 8 || width == 16 || width == 32 || width == 64, ""); - llvm::Type *typeTo = llvm::Type::getIntNTy(b->getContext(), width*2); - - TASSERT(typeTo != NULL, ""); - //bitcast a to twice width - assert(a1->getType()->getScalarSizeInBits() < typeTo->getScalarSizeInBits()); - llvm::Value *twiceLarger = new llvm::ZExtInst(a1, typeTo, "", b); - //shift twiceL to the left by width - llvm::Value *tlShifted = llvm::BinaryOperator::Create(llvm::Instruction::Shl, - twiceLarger, - CONST_V(b, width), - "", - b); + TASSERT(width == 8 || width == 16 || width == 32 || width == 64, ""); + llvm::Type *typeTo = llvm::Type::getIntNTy(b->getContext(), width * 2); - //add a2 to the result, after zero-extending a2 - llvm::Value *a2Larger = new llvm::SExtInst(a2, typeTo, "", b); - llvm::Value *addRes = - llvm::BinaryOperator::CreateOr(tlShifted, a2Larger, "", b); + TASSERT(typeTo != NULL, ""); + //bitcast a to twice width + assert(a1->getType()->getScalarSizeInBits() < typeTo->getScalarSizeInBits()); + llvm::Value *twiceLarger = new llvm::ZExtInst(a1, typeTo, "", b); + //shift twiceL to the left by width + llvm::Value *tlShifted = llvm::BinaryOperator::Create( + llvm::Instruction::Shl, twiceLarger, CONST_V(b, width), "", b); - return addRes; + //add a2 to the result, after zero-extending a2 + llvm::Value *a2Larger = new llvm::SExtInst(a2, typeTo, "", b); + llvm::Value *addRes = llvm::BinaryOperator::CreateOr(tlShifted, a2Larger, "", + b); + + return addRes; } // Compute a complex address expression, such as // [0x1245678+eax*4] and return a Value that represents the computation // result -llvm::Value *getAddrFromExpr( - llvm::BasicBlock *b, - NativeModulePtr mod, - const llvm::MCInst &inst, - InstPtr ip, - uint32_t which); +llvm::Value *getAddrFromExpr(llvm::BasicBlock *b, NativeModulePtr mod, + const llvm::MCInst &inst, NativeInstPtr ip, + uint32_t which); bool addrIsInData(VA addr, NativeModulePtr m, VA &base, VA minAddr); -template -llvm::Value* getGlobalFromOriginalAddr( - VA original_addr, NativeModulePtr mod, - VA addr_start, llvm::BasicBlock *b) -{ - VA baseGlobal; - if( addrIsInData(original_addr, mod, baseGlobal, addr_start) ) { - //we should be able to find a reference to this in global data - llvm::Module *M = b->getParent()->getParent(); - std::string sn = "data_0x" + to_string(baseGlobal, std::hex); +template +llvm::Value* getGlobalFromOriginalAddr(VA original_addr, NativeModulePtr mod, + VA addr_start, llvm::BasicBlock *b) { + VA baseGlobal; + if (addrIsInData(original_addr, mod, baseGlobal, addr_start)) { + //we should be able to find a reference to this in global data + llvm::Module *M = b->getParent()->getParent(); + std::string sn = "data_0x" + to_string(baseGlobal, std::hex); - llvm::GlobalVariable *gData = M->getNamedGlobal(sn); + llvm::GlobalVariable *gData = M->getNamedGlobal(sn); - //if we thought it was a global, we should be able to - //pin it to a global array we made during module setup - if( gData == NULL) - throw TErr(__LINE__, __FILE__, "Global variable not found"); + //if we thought it was a global, we should be able to + //pin it to a global array we made during module setup + if (gData == NULL) + throw TErr(__LINE__, __FILE__, "Global variable not found"); - // since globals are now a structure - // we cannot simply slice into them. - // Need to get ptr and then add integer displacement to ptr - // - llvm::Type *int_ty = llvm::Type::getIntNTy(b->getContext(), width); - llvm::Value *globalGEPV[] = - { llvm::ConstantInt::get(int_ty, 0), - llvm::ConstantInt::get(llvm::Type::getInt32Ty(b->getContext()), 0) - }; - llvm::Instruction *globalGEP = - llvm::GetElementPtrInst::Create(gData, globalGEPV, "", b); - llvm::Value *intVal = new llvm::PtrToIntInst(globalGEP, int_ty, "", b); - uint64_t addr_offset = original_addr-baseGlobal; - llvm::Value *int_adjusted = - llvm::BinaryOperator::CreateAdd(intVal, CONST_V(b, addr_offset), "", b); - return int_adjusted; - } else { - return nullptr; - } + // since globals are now a structure + // we cannot simply slice into them. + // Need to get ptr and then add integer displacement to ptr + // + llvm::Type *int_ty = llvm::Type::getIntNTy(b->getContext(), width); + llvm::Value *globalGEPV[] = {llvm::ConstantInt::get(int_ty, 0), + llvm::ConstantInt::get(llvm::Type::getInt32Ty(b->getContext()), 0)}; + llvm::Instruction *globalGEP = llvm::GetElementPtrInst::Create(gData, + globalGEPV, + "", b); + llvm::Value *intVal = new llvm::PtrToIntInst(globalGEP, int_ty, "", b); + uint64_t addr_offset = original_addr - baseGlobal; + llvm::Value *int_adjusted = llvm::BinaryOperator::CreateAdd( + intVal, CONST_V(b, addr_offset), "", b); + return int_adjusted; + } else { + return nullptr; + } } - // same as the simpler form, see above namespace x86 { -llvm::Value *getAddrFromExpr( llvm::BasicBlock *b, - NativeModulePtr mod, - const llvm::MCOperand &Obase, - const llvm::MCOperand &Oscale, - const llvm::MCOperand &Oindex, - const int64_t Odisp, - const llvm::MCOperand &Oseg, - bool dataOffset); +llvm::Value *getAddrFromExpr(llvm::BasicBlock *b, NativeModulePtr mod, + const llvm::MCOperand &Obase, + const llvm::MCOperand &Oscale, + const llvm::MCOperand &Oindex, const int64_t Odisp, + const llvm::MCOperand &Oseg, bool dataOffset); } namespace x86_64 { -llvm::Value *getAddrFromExpr( llvm::BasicBlock *b, - NativeModulePtr mod, - const llvm::MCOperand &Obase, - const llvm::MCOperand &Oscale, - const llvm::MCOperand &Oindex, - const int64_t Odisp, - const llvm::MCOperand &Oseg, - bool dataOffset); +llvm::Value *getAddrFromExpr(llvm::BasicBlock *b, NativeModulePtr mod, + const llvm::MCOperand &Obase, + const llvm::MCOperand &Oscale, + const llvm::MCOperand &Oindex, const int64_t Odisp, + const llvm::MCOperand &Oseg, bool dataOffset); } // Convert the number to a constant in LLVM IR llvm::ConstantInt *CONST_V(llvm::BasicBlock *b, uint64_t val); // this is an alias for getAddressFromExpr, but used when // we expect the address computation to contain a data reference -llvm::Value *MEM_AS_DATA_REF(llvm::BasicBlock *B, - NativeModulePtr natM, - const llvm::MCInst &inst, - InstPtr ip, - uint32_t which); +llvm::Value *MEM_AS_DATA_REF(llvm::BasicBlock *B, NativeModulePtr natM, + const llvm::MCInst &inst, NativeInstPtr ip, + uint32_t which); // emit an llvm memcpy intrinsic -llvm::Instruction* callMemcpy(llvm::BasicBlock *B, llvm::Value *dest, llvm::Value *src, uint32_t size, - uint32_t align=4, bool isVolatile=false); - +llvm::Instruction* callMemcpy(llvm::BasicBlock *B, llvm::Value *dest, + llvm::Value *src, uint32_t size, uint32_t align = + 4, + bool isVolatile = false); using namespace llvm; using namespace std; // return a computed pointer to that data reference for 32/64 bit architecture -template -llvm::Value* IMM_AS_DATA_REF(BasicBlock *b, NativeModulePtr mod , InstPtr ip) -{ - TASSERT(width == 32 || width == 64, "Pointer size must be sane"); - VA baseGlobal; - // off is the displacement part of a memory reference +template +llvm::Value* IMM_AS_DATA_REF(llvm::BasicBlock *B, NativeModulePtr mod, + NativeInstPtr ip) { + auto &C = B->getContext(); - if( ip->has_external_ref()) { - Function *F = b->getParent(); - Value *addrInt = getValueForExternal(F->getParent(), ip, b); - TASSERT(addrInt != 0, "Could not get external data reference"); - return addrInt; - } + TASSERT(width == 32 || width == 64, "Pointer size must be sane"); + VA baseGlobal; + // off is the displacement part of a memory reference - if(false == ip->has_imm_reference) { - throw TErr(__LINE__, __FILE__, "Want to use IMM as data ref but have no IMM reference"); - } - uint64_t off = ip->get_reference(Inst::IMMRef); - - if(ip->has_code_ref()) { - Value *callback_fn = ArchAddCallbackDriver( - b->getParent()->getParent(), - ip->get_reference(Inst::IMMRef)); - Value *addrInt = new PtrToIntInst( - callback_fn, llvm::Type::getIntNTy(b->getContext(), width), "", b); - return addrInt; - } else if( addrIsInData(off, mod, baseGlobal, 0) ) { - //we should be able to find a reference to this in global data - Module *M = b->getParent()->getParent(); - string sn = "data_0x" + to_string(baseGlobal, hex); - Value *int_adjusted; - GlobalVariable *gData = M->getNamedGlobal(sn); + if (ip->has_external_ref()) { + Function *F = B->getParent(); + Value *addrInt = getValueForExternal(F->getParent(), ip, B); + TASSERT(addrInt != 0, "Could not get external data reference"); + return addrInt; + } - //if we thought it was a global, we should be able to - //pin it to a global variable we made during module setup - if( gData == NULL) - throw TErr(__LINE__, __FILE__, "Global variable not found"); + if (false == ip->has_imm_reference) { + throw TErr(__LINE__, __FILE__, + "Want to use IMM as data ref but have no IMM reference"); + } + uint64_t off = ip->get_reference(NativeInst::IMMRef); - // since globals are now a structure - // we cannot simply slice into them. - // Need to get ptr and then add integer displacement to ptr + if (ip->has_code_ref()) { + auto callback_fn = ArchAddCallbackDriver( + B->getParent()->getParent(), ip->get_reference(NativeInst::IMMRef)); + auto addrInt = new llvm::PtrToIntInst(callback_fn, + llvm::Type::getIntNTy(C, width), "", + B); + return addrInt; - Value *globalGEPV[] = - { ConstantInt::get(Type::getIntNTy(b->getContext(), width), 0), - ConstantInt::get(Type::getInt32Ty(b->getContext()), 0)}; - Instruction *globalGEP = - GetElementPtrInst::Create(gData, globalGEPV, "", b); - Type *ty = Type::getIntNTy(b->getContext(), width); - Value *intVal = new PtrToIntInst(globalGEP, ty, "", b); - uint32_t addr_offset = off-baseGlobal; - int_adjusted = BinaryOperator::CreateAdd(intVal, - CONST_V(b, addr_offset), "", b); - //then, assign this to the outer 'd' so that the rest of the - //logic picks up on that address instead of another address + } else if (addrIsInData(off, mod, baseGlobal, 0)) { + //we should be able to find a reference to this in global data + auto M = B->getParent()->getParent(); + std::string sn = "data_0x" + to_string(baseGlobal, hex); + llvm::Value *int_adjusted = nullptr; + auto gData = M->getNamedGlobal(sn); - return int_adjusted; - } else { - throw TErr(__LINE__, __FILE__, "Address not in data"); - return NULL; - } + //if we thought it was a global, we should be able to + //pin it to a global variable we made during module setup + if (gData == NULL) + throw TErr(__LINE__, __FILE__, "Global variable not found"); + + // since globals are now a structure + // we cannot simply slice into them. + // Need to get ptr and then add integer displacement to ptr + + llvm::Value *globalGEPV[] = {llvm::ConstantInt::get( + llvm::Type::getIntNTy(C, width), 0), llvm::ConstantInt::get( + llvm::Type::getInt32Ty(C), 0)}; + auto globalGEP = llvm::GetElementPtrInst::Create(gData, globalGEPV, "", B); + auto ty = llvm::Type::getIntNTy(C, width); + auto intVal = new llvm::PtrToIntInst(globalGEP, ty, "", B); + uint32_t addr_offset = off - baseGlobal; + int_adjusted = llvm::BinaryOperator::CreateAdd( + intVal, CONST_V(B, addr_offset), "", B); + //then, assign this to the outer 'd' so that the rest of the + //logic picks up on that address instead of another address + + return int_adjusted; + } else { + throw TErr(__LINE__, __FILE__, "Address not in data"); + return NULL; + } } // Assume the instruction has a data reference, and // return a computed pointer to that data reference -static inline llvm::Value* IMM_AS_DATA_REF(llvm::BasicBlock *b, - NativeModulePtr mod, - InstPtr ip) -{ - - llvm::Module *M = b->getParent()->getParent(); - int regWidth = ArchPointerSize(M); - if(regWidth <= x86::REG_SIZE) { - return IMM_AS_DATA_REF<32>(b, mod, ip); - } else { - return IMM_AS_DATA_REF<64>(b, mod, ip); - } +static inline llvm::Value* IMM_AS_DATA_REF(llvm::BasicBlock *b, + NativeModulePtr mod, + NativeInstPtr ip) { + + auto M = b->getParent()->getParent(); + int regWidth = ArchPointerSize(M); + if (regWidth <= x86::REG_SIZE) { + return IMM_AS_DATA_REF<32>(b, mod, ip); + } else { + return IMM_AS_DATA_REF<64>(b, mod, ip); + } } -inline llvm::PointerType *getVoidPtrType (llvm::LLVMContext & C) { - llvm::Type * Int8Type = llvm::IntegerType::getInt8Ty(C); - return llvm::PointerType::getUnqual(Int8Type); +inline llvm::PointerType *getVoidPtrType(llvm::LLVMContext & C) { + auto Int8Type = llvm::IntegerType::getInt8Ty(C); + return llvm::PointerType::getUnqual(Int8Type); } -template -static inline Value *ADDR_NOREF_IMPL(NativeModulePtr natM, llvm::BasicBlock *b, int x, InstPtr ip, const llvm::MCInst &inst) { +template +static inline llvm::Value *ADDR_NOREF_IMPL(NativeModulePtr natM, + llvm::BasicBlock *b, int x, + NativeInstPtr ip, + const llvm::MCInst &inst) { - // Turns out this function name is a lie. This case can ref external data - llvm::Module *M = b->getParent()->getParent(); - if(ip->has_external_ref()) { - llvm::Value *addrInt = getValueForExternal(M, ip, b); - TASSERT(addrInt != NULL, "Could not get address for external"); - return addrInt; - } + // Turns out this function name is a lie. This case can ref external data + auto M = b->getParent()->getParent(); + if (ip->has_external_ref()) { + auto addrInt = getValueForExternal(M, ip, b); + TASSERT(addrInt != NULL, "Could not get address for external"); + return addrInt; + } - if(ArchPointerSize(M) == Pointer32) { - return x86::getAddrFromExpr(b, natM, inst.getOperand(x+0), inst.getOperand(x+1), inst.getOperand(x+2), inst.getOperand(x+3).getImm(), inst.getOperand(x+4), false); - } else { - return x86_64::getAddrFromExpr(b, natM, inst.getOperand(x+0), inst.getOperand(x+1), inst.getOperand(x+2), inst.getOperand(x+3).getImm(), inst.getOperand(x+4), false); - } + if (ArchPointerSize(M) == Pointer32) { + return x86::getAddrFromExpr(b, natM, inst.getOperand(x + 0), + inst.getOperand(x + 1), inst.getOperand(x + 2), + inst.getOperand(x + 3).getImm(), + inst.getOperand(x + 4), false); + } else { + return x86_64::getAddrFromExpr(b, natM, inst.getOperand(x + 0), + inst.getOperand(x + 1), + inst.getOperand(x + 2), + inst.getOperand(x + 3).getImm(), + inst.getOperand(x + 4), false); + } } diff --git a/mc-sema/cfgToLLVM/x86Instrs.cpp b/mc-sema/cfgToLLVM/x86Instrs.cpp index abbf8f4cc..cc04607cd 100644 --- a/mc-sema/cfgToLLVM/x86Instrs.cpp +++ b/mc-sema/cfgToLLVM/x86Instrs.cpp @@ -56,9 +56,9 @@ using namespace x86; // currently used to turn non-conforming jump talbles // into data sections // -static void preprocessInstruction(NativeModulePtr natM, BasicBlock *&block, - InstPtr ip, MCInst &inst) { - +static void PreProcessInst(TranslationContext &ctx, llvm::BasicBlock *&block) { + auto ip = ctx.natI; + auto &inst = ip->get_inst(); // only add data sections for non-conformant jump tables // // the conformant tables are handled in the instruction @@ -67,46 +67,41 @@ static void preprocessInstruction(NativeModulePtr natM, BasicBlock *&block, if ( !isConformantJumpInst(ip)) { { llvm::dbgs() << "WARNING: jump table but non-conformant instruction:\n"; - llvm::dbgs() << to_string(ip->get_loc(), hex) << ": "; + llvm::dbgs() << to_string(ip->get_loc(), std::hex) << ": "; llvm::dbgs() << inst << "\n"; - VA tbl_va; - MCSJumpTablePtr jmptbl = ip->get_jump_table(); + VA tbl_va = 0; + auto jmptbl = ip->get_jump_table(); - bool ok = addJumpTableDataSection(natM, block->getParent()->getParent(), - tbl_va, *jmptbl); + bool ok = addJumpTableDataSection(ctx, tbl_va, *jmptbl); TASSERT(ok, "Could not add jump table data section!\n"); - uint32_t data_ref_va = static_cast(tbl_va - + 4 * jmptbl->getInitialEntry()); + auto data_ref_va = static_cast(tbl_va + + (4 * jmptbl->getInitialEntry())); - ip->set_reference(Inst::MEMRef, data_ref_va); - ip->set_ref_type(Inst::MEMRef, Inst::CFGDataRef); + ip->set_reference(NativeInst::MEMRef, data_ref_va); + ip->set_ref_type(NativeInst::MEMRef, NativeInst::CFGDataRef); } - } - } - // only add data references for unknown jump index table - // reads - else if (ip->has_jump_index_table() && inst.getOpcode() != X86::MOVZX32rm8) { - VA idx_va; + // only add data references for unknown jump index table reads + } else if (ip->has_jump_index_table() && + inst.getOpcode() != llvm::X86::MOVZX32rm8) { + + VA idx_va = 0; JumpIndexTablePtr idxtbl = ip->get_jump_index_table(); - bool ok = addJumpIndexTableDataSection(natM, - block->getParent()->getParent(), - idx_va, *idxtbl); + bool ok = addJumpIndexTableDataSection(ctx, idx_va, *idxtbl); TASSERT(ok, "Could not add jump index table data section!\n"); uint32_t data_ref_va = static_cast(idx_va + idxtbl->getInitialEntry()); - ip->set_reference(Inst::MEMRef, data_ref_va); - ip->set_ref_type(Inst::MEMRef, Inst::CFGDataRef); + ip->set_reference(NativeInst::MEMRef, data_ref_va); + ip->set_ref_type(NativeInst::MEMRef, NativeInst::CFGDataRef); } - } // Take the supplied MCInst and turn it into a series of LLVM instructions. @@ -135,56 +130,40 @@ static void preprocessInstruction(NativeModulePtr natM, BasicBlock *&block, // // The innermost is where most of the intelligent decisions happen. // -InstTransResult liftInstrImpl(InstPtr ip, BasicBlock *&block, NativeBlockPtr nb, - Function *F, NativeFunctionPtr natF, - NativeModulePtr natM) { - MCInst inst = ip->get_inst(); +InstTransResult LiftInstIntoBlockImpl(TranslationContext &ctx, + llvm::BasicBlock *&block) { InstTransResult itr = ContinueBlock; - string outS; - raw_string_ostream strOut(outS); - MCInstPrinter *IP = nb->get_printer(); - - if (IP == NULL) { - throw TErr(__LINE__, __FILE__, - "No instruction printer supplied with native block"); - } // For conditional instructions, get the "true" and "false" targets. // This will also look up the target for nonconditional jumps. //string trueStrName = "block_0x" + to_string(ip->get_tr(), hex); //string falseStrName = "block_0x" + to_string(ip->get_fa(), hex); - TranslationFuncPtr translationPtr; + auto &inst = ctx.natI->get_inst(); + auto opcode = inst.getOpcode(); - unsigned opcode = inst.getOpcode(); - if (translationDispatchMap.find(opcode) != translationDispatchMap.end()) { - // Instruction translation defined. - translationPtr = translationDispatchMap[opcode]; - preprocessInstruction(natM, block, ip, inst); - itr = translationPtr(natM, block, ip, inst); + if (translationDispatchMap.count(opcode)) { + auto translationPtr = translationDispatchMap[opcode]; + PreProcessInst(ctx, block); + itr = translationPtr(ctx, block); if (TranslateError == itr || TranslateErrorUnsupported == itr) { - errs() << "Error translating!"; - IP->printInst( &inst, errs(), to_string(ip->get_loc(), hex)); - errs() << "\n"; + std::cerr << "Error translating instruction at " << std::hex + << ctx.natI->get_loc() << std::endl; } - } else { + // Instruction translation not defined. - errs() << "Unsupported opcode " << opcode << "!"; - IP->printInst( &inst, errs(), to_string(ip->get_loc(), hex)); - // Print out the unhandled opcode. - errs() << to_string(ip->get_loc(), hex) << " "; - errs() << strOut.str() << "\n"; - errs() << inst.getOpcode() << "\n"; - if (X86::REP_PREFIX != opcode && X86::REPNE_PREFIX != opcode) { + } else { + std::cerr << "Error translating instruction at " << std::hex + << ctx.natI->get_loc() << "; unsupported opcode " << std::dec + << opcode << std::endl; + if (llvm::X86::REP_PREFIX != opcode && llvm::X86::REPNE_PREFIX != opcode) { itr = TranslateErrorUnsupported; } else { - errs() - << "Unsupported instruction is a rep/repne, trying to skip to next instr.\n"; + std::cerr + << "Unsupported instruction is a rep/repne, trying to skip to next instr." + << std::endl; } } - - //D(cout << __FUNCTION__ << " : " << opcode << "\n"; - //cout.flush();) return itr; } diff --git a/mc-sema/cfgToLLVM/x86Instrs.h b/mc-sema/cfgToLLVM/x86Instrs.h index 2d6a1701f..2559437ce 100644 --- a/mc-sema/cfgToLLVM/x86Instrs.h +++ b/mc-sema/cfgToLLVM/x86Instrs.h @@ -26,9 +26,6 @@ ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -InstTransResult liftInstrImpl( InstPtr ip, - llvm::BasicBlock *&block, - NativeBlockPtr nb, - llvm::Function *F, - NativeFunctionPtr natF, - NativeModulePtr natM); +struct TranslationContext; +InstTransResult LiftInstIntoBlockImpl(TranslationContext &ctx, + llvm::BasicBlock *&block); diff --git a/mc-sema/cfgToLLVM/x86Instrs_ADD.cpp b/mc-sema/cfgToLLVM/x86Instrs_ADD.cpp index cb62e190b..9071021db 100644 --- a/mc-sema/cfgToLLVM/x86Instrs_ADD.cpp +++ b/mc-sema/cfgToLLVM/x86Instrs_ADD.cpp @@ -45,7 +45,7 @@ static InstTransResult doNoop(BasicBlock *b) { GENERIC_TRANSLATION(NOOP, doNoop(block)) template -static Value * doAddVV(InstPtr ip, BasicBlock *&b, Value *lhs, Value *rhs) +static Value * doAddVV(NativeInstPtr ip, BasicBlock *&b, Value *lhs, Value *rhs) { // Add src1 to the constant formed by src2. Value *addRes = BinaryOperator::Create(Instruction::Add, rhs, lhs, "", b); @@ -68,7 +68,7 @@ static Value * doAddVV(InstPtr ip, BasicBlock *&b, Value *lhs, Value *rhs) } template -static InstTransResult doAddMI(InstPtr ip, BasicBlock *&b, +static InstTransResult doAddMI(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &imm) { @@ -86,7 +86,7 @@ static InstTransResult doAddMI(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doAddMV(InstPtr ip, BasicBlock *&b, +static InstTransResult doAddMV(NativeInstPtr ip, BasicBlock *&b, Value *addr, Value *rhs) { @@ -103,7 +103,7 @@ static InstTransResult doAddMV(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doAddMR(InstPtr ip, BasicBlock *&b, +static InstTransResult doAddMR(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand ®) { @@ -121,7 +121,7 @@ static InstTransResult doAddMR(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doAddRI(InstPtr ip, BasicBlock *&b, +static InstTransResult doAddRI(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst, const MCOperand &src1, const MCOperand &src2) @@ -146,7 +146,7 @@ static InstTransResult doAddRI(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doAddRM(InstPtr ip, BasicBlock *&b, +static InstTransResult doAddRM(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &o1, const MCOperand &o2) @@ -171,7 +171,7 @@ static InstTransResult doAddRM(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doAddRV(InstPtr ip, BasicBlock *&b, +static InstTransResult doAddRV(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &o1, const MCOperand &o2) @@ -196,7 +196,7 @@ static InstTransResult doAddRV(InstPtr ip, BasicBlock *&b, template -static InstTransResult doAddRR(InstPtr ip, BasicBlock *&b, +static InstTransResult doAddRR(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst, const MCOperand &o1, const MCOperand &o2) @@ -220,7 +220,7 @@ static InstTransResult doAddRR(InstPtr ip, BasicBlock *&b, } template -static Value * doAdcVV(InstPtr ip, BasicBlock *&b, Value *dst, Value *src) +static Value * doAdcVV(NativeInstPtr ip, BasicBlock *&b, Value *dst, Value *src) { Type *t; @@ -259,7 +259,7 @@ static Value * doAdcVV(InstPtr ip, BasicBlock *&b, Value *dst, Value *src) } template -static InstTransResult doAdcRV(InstPtr ip, BasicBlock *&b, +static InstTransResult doAdcRV(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &o1, const MCOperand &o2) @@ -281,7 +281,7 @@ static InstTransResult doAdcRV(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doAdcI(InstPtr ip, BasicBlock *&b, const MCOperand &src) +static InstTransResult doAdcI(NativeInstPtr ip, BasicBlock *&b, const MCOperand &src) { TASSERT(src.isImm(), ""); @@ -330,7 +330,7 @@ static InstTransResult doAdcI(InstPtr ip, BasicBlock *&b, const MCOperand &src) } template -static InstTransResult doAdcMI(InstPtr ip, BasicBlock *&b, +static InstTransResult doAdcMI(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &src) { @@ -348,7 +348,7 @@ static InstTransResult doAdcMI(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doAdcMV(InstPtr ip, BasicBlock *&b, +static InstTransResult doAdcMV(NativeInstPtr ip, BasicBlock *&b, Value *addr, Value *rhs) { @@ -366,7 +366,7 @@ static InstTransResult doAdcMV(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doAdcMI8(InstPtr ip, BasicBlock *&b, +static InstTransResult doAdcMI8(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &src) { @@ -389,7 +389,7 @@ static InstTransResult doAdcMI8(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doAdcMR(InstPtr ip, BasicBlock *&b, +static InstTransResult doAdcMR(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand ®) { @@ -407,7 +407,7 @@ static InstTransResult doAdcMR(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doAdcRI(InstPtr ip, BasicBlock *&b, +static InstTransResult doAdcRI(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst, const MCOperand &o1, const MCOperand &o2) @@ -427,7 +427,7 @@ static InstTransResult doAdcRI(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doAdcRI8(InstPtr ip, BasicBlock *&b, +static InstTransResult doAdcRI8(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst, const MCOperand &o1, const MCOperand &o2) @@ -452,7 +452,7 @@ static InstTransResult doAdcRI8(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doAdcRM(InstPtr ip, BasicBlock *&b, +static InstTransResult doAdcRM(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &o1, const MCOperand &o2) @@ -477,7 +477,7 @@ static InstTransResult doAdcRM(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doAdcRR(InstPtr ip, BasicBlock *&b, +static InstTransResult doAdcRR(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst, const MCOperand &o1, const MCOperand &o2) diff --git a/mc-sema/cfgToLLVM/x86Instrs_Branches.cpp b/mc-sema/cfgToLLVM/x86Instrs_Branches.cpp index 7fd7de392..2dbc2e230 100644 --- a/mc-sema/cfgToLLVM/x86Instrs_Branches.cpp +++ b/mc-sema/cfgToLLVM/x86Instrs_Branches.cpp @@ -40,20 +40,19 @@ #include "llvm/Support/Debug.h" #include "ArchOps.h" -using namespace llvm; - template -static InstTransResult doLRet(BasicBlock *b) { +static InstTransResult doLRet(llvm::BasicBlock *b) { //do a read from the location pointed to by ESP TASSERT(width == 32 || width == 64, "Invalid reg width for RET"); - auto xsp = 32 == width ? X86::ESP : X86::RSP; - Value *rESP = R_READ(b, xsp); - Value *nESP = BinaryOperator::CreateAdd(rESP, CONST_V(b, 2 * width / 8), - "", b); + auto xsp = 32 == width ? llvm::X86::ESP : llvm::X86::RSP; + auto rESP = R_READ(b, xsp); + auto nESP = llvm::BinaryOperator::CreateAdd(rESP, + CONST_V(b, 2 * width / 8), + "", b); - auto xip = 32 == width ? X86::EIP : X86::RIP; - Value *ra = M_READ_0(b, rESP); + auto xip = 32 == width ? llvm::X86::EIP : llvm::X86::RIP; + auto ra = M_READ_0(b, rESP); // set EIP -- this is used by the asm stubs that // connect translated code and native code R_WRITE(b, xip, ra); @@ -61,23 +60,24 @@ static InstTransResult doLRet(BasicBlock *b) { //write back to ESP R_WRITE(b, xsp, nESP); - ReturnInst::Create(b->getContext(), b); + llvm::ReturnInst::Create(b->getContext(), b); return EndCFG; } template -static InstTransResult doRet(BasicBlock *b) { +static InstTransResult doRet(llvm::BasicBlock *b) { //do a read from the location pointed to by ESP TASSERT(width == 32 || width == 64, "Invalid reg width for RET"); auto xsp = 32 == width ? X86::ESP : X86::RSP; - Value *rESP = R_READ(b, xsp); - Value *nESP = BinaryOperator::CreateAdd(rESP, CONST_V(b, width / 8), - "", b); + auto rESP = R_READ(b, xsp); + auto nESP = llvm::BinaryOperator::CreateAdd(rESP, + CONST_V(b, width / 8), "", + b); - auto xip = 32 == width ? X86::EIP : X86::RIP; - Value *ra = M_READ_0(b, rESP); + auto xip = 32 == width ? llvm::X86::EIP : llvm::X86::RIP; + auto ra = M_READ_0(b, rESP); // set EIP -- this is used by the asm stubs that // connect translated code and native code R_WRITE(b, xip, ra); @@ -85,46 +85,48 @@ static InstTransResult doRet(BasicBlock *b) { //write back to ESP R_WRITE(b, xsp, nESP); - ReturnInst::Create(b->getContext(), b); + llvm::ReturnInst::Create(b->getContext(), b); return EndCFG; } template -static InstTransResult doRetI(BasicBlock *&b, const MCOperand &o) { +static InstTransResult doRetI(llvm::BasicBlock *&b, const llvm::MCOperand &o) { TASSERT(width == 32 || width == 64, "Invalid reg width for RETI"); TASSERT(o.isImm(), "Operand not immediate"); - auto xsp = 32 == width ? X86::ESP : X86::RSP; - Value *c = CONST_V(b, o.getImm()); - Value *rESP = R_READ(b, xsp); - Value *ra = M_READ_0(b, rESP); + auto xsp = 32 == width ? llvm::X86::ESP : llvm::X86::RSP; + auto c = CONST_V(b, o.getImm()); + auto rESP = R_READ(b, xsp); + auto ra = M_READ_0(b, rESP); TASSERT(ra != NULL, "Could not read value from stack"); - auto xip = 32 == width ? X86::EIP : X86::RIP; + auto xip = 32 == width ? llvm::X86::EIP : llvm::X86::RIP; // set EIP -- this is used by the asm stubs that // connect translated code and native code R_WRITE(b, xip, ra); //add the immediate to ESP - Value *rESP_1 = BinaryOperator::CreateAdd(rESP, c, "", b); + auto rESP_1 = llvm::BinaryOperator::CreateAdd(rESP, c, "", b); //add pointer width to ESP - Value *nESP = BinaryOperator::CreateAdd(rESP_1, CONST_V(b, width / 8), - "", b); + auto nESP = llvm::BinaryOperator::CreateAdd(rESP_1, + CONST_V(b, width / 8), "", + b); //write back to ESP R_WRITE(b, xsp, nESP); //spill all locals into the structure - ReturnInst::Create(b->getContext(), b); + llvm::ReturnInst::Create(b->getContext(), b); return EndCFG; } //emit a nonconditional branch -static InstTransResult doNonCondBranch(BasicBlock *&b, BasicBlock *tgt) { +static InstTransResult doNonCondBranch(llvm::BasicBlock *&b, + llvm::BasicBlock *tgt) { TASSERT(tgt != NULL, "Branch to a NULL target"); - BranchInst::Create(tgt, b); + llvm::BranchInst::Create(tgt, b); return EndBlock; } @@ -132,93 +134,96 @@ static InstTransResult doNonCondBranch(BasicBlock *&b, BasicBlock *tgt) { //for the LOOP class of instructions, we'll assume that the //target of the loop branch has already been defined as a block template -static InstTransResult doLoopIMPL(BasicBlock *&b, BasicBlock *T, - BasicBlock *F) { +static InstTransResult doLoopIMPL(llvm::BasicBlock *&b, llvm::BasicBlock *T, + llvm::BasicBlock *F) { TASSERT(T != NULL, "True block is NULL"); TASSERT(F != NULL, "False block is NULL"); //retrieve ECX - auto xcx = 32 == width ? X86::ECX : X86::RCX; + auto xcx = 32 == width ? llvm::X86::ECX : llvm::X86::RCX; - Value *count = R_READ(b, xcx); + auto count = R_READ(b, xcx); //decrement ECX - Value *count_dec = BinaryOperator::CreateSub(count, CONST_V(b, 1), "", - b); + auto count_dec = llvm::BinaryOperator::CreateSub(count, CONST_V(b, 1), + "", b); //write ECX back into the register R_WRITE(b, xcx, count_dec); //test and see if ECX is 0 - Value *testRes = new ICmpInst( *b, CmpInst::ICMP_NE, count_dec, - CONST_V(b, 0)); + auto testRes = new llvm::ICmpInst( *b, llvm::CmpInst::ICMP_NE, count_dec, + CONST_V(b, 0)); //conditionally branch on this result - BranchInst::Create(T, F, testRes, b); + llvm::BranchInst::Create(T, F, testRes, b); return EndBlock; } template -static InstTransResult doLoopEIMPL(BasicBlock *&b, BasicBlock *T, - BasicBlock *F) { +static InstTransResult doLoopEIMPL(llvm::BasicBlock *&b, llvm::BasicBlock *T, + llvm::BasicBlock *F) { TASSERT(T != NULL, ""); TASSERT(F != NULL, ""); //retrieve ECX - auto xcx = 32 == width ? X86::ECX : X86::RCX; - Value *count = R_READ(b, xcx); + auto xcx = 32 == width ? X86::ECX : llvm::X86::RCX; + auto count = R_READ(b, xcx); //decrement ECX - Value *count_dec = BinaryOperator::CreateSub(count, CONST_V(b, 1), "", - b); + auto count_dec = llvm::BinaryOperator::CreateSub(count, CONST_V(b, 1), + "", b); //write ECX back into the register R_WRITE(b, xcx, count_dec); //test and see if ECX is 0 - Value *testRes = new ICmpInst( *b, CmpInst::ICMP_NE, count_dec, - CONST_V(b, 0)); + auto testRes = new llvm::ICmpInst( *b, llvm::CmpInst::ICMP_NE, count_dec, + CONST_V(b, 0)); //also test and see if ZF is 1 - Value *zf = F_READ(b, ZF); - Value *zfRes = new ICmpInst( *b, CmpInst::ICMP_EQ, zf, CONST_V<1>(b, 1)); + auto zf = F_READ(b, ZF); + auto zfRes = new llvm::ICmpInst( *b, llvm::CmpInst::ICMP_EQ, zf, + CONST_V<1>(b, 1)); - Value *andRes = BinaryOperator::CreateAnd(zfRes, testRes, "", b); + auto andRes = llvm::BinaryOperator::CreateAnd(zfRes, testRes, "", b); //conditionally branch on this result - BranchInst::Create(T, F, andRes, b); + llvm::BranchInst::Create(T, F, andRes, b); return EndBlock; } template -static InstTransResult doLoopNEIMPL(BasicBlock *&b, BasicBlock *T, - BasicBlock *F) { +static InstTransResult doLoopNEIMPL(llvm::BasicBlock *&b, llvm::BasicBlock *T, + llvm::BasicBlock *F) { TASSERT(T != NULL, ""); TASSERT(F != NULL, ""); //retrieve ECX auto xcx = 32 == width ? X86::ECX : X86::RCX; - Value *count = R_READ(b, xcx); + auto count = R_READ(b, xcx); //decrement ECX - Value *count_dec = BinaryOperator::CreateSub(count, CONST_V(b, 1), "", - b); + auto count_dec = llvm::BinaryOperator::CreateSub(count, CONST_V(b, 1), + "", b); //write ECX back into the register R_WRITE(b, xcx, count_dec); //test and see if ECX is 0 - Value *testRes = new ICmpInst( *b, CmpInst::ICMP_NE, count_dec, - CONST_V(b, 0)); + auto testRes = new llvm::ICmpInst( *b, llvm::CmpInst::ICMP_NE, count_dec, + CONST_V(b, 0)); //test and see if ZF is 0 - Value *zf = F_READ(b, ZF); - Value *zfRes = new ICmpInst( *b, CmpInst::ICMP_EQ, zf, CONST_V<1>(b, 0)); + auto zf = F_READ(b, ZF); + auto zfRes = new llvm::ICmpInst( *b, llvm::CmpInst::ICMP_EQ, zf, + CONST_V<1>(b, 0)); - Value *andRes = BinaryOperator::CreateAnd(zfRes, testRes, "", b); + auto andRes = llvm::BinaryOperator::CreateAnd(zfRes, testRes, "", b); //conditionally branch on this result - BranchInst::Create(T, F, andRes, b); + llvm::BranchInst::Create(T, F, andRes, b); return EndBlock; } -static InstTransResult doLoop(BasicBlock *&b, BasicBlock *T, BasicBlock *F) { - llvm::Module *M = b->getParent()->getParent(); +static InstTransResult doLoop(llvm::BasicBlock *&b, llvm::BasicBlock *T, + llvm::BasicBlock *F) { + auto M = b->getParent()->getParent(); if (ArchPointerSize(M) == Pointer32) { return doLoopIMPL<32>(b, T, F); @@ -227,8 +232,9 @@ static InstTransResult doLoop(BasicBlock *&b, BasicBlock *T, BasicBlock *F) { } } -static InstTransResult doLoopE(BasicBlock *&b, BasicBlock *T, BasicBlock *F) { - llvm::Module *M = b->getParent()->getParent(); +static InstTransResult doLoopE(llvm::BasicBlock *&b, llvm::BasicBlock *T, + llvm::BasicBlock *F) { + auto M = b->getParent()->getParent(); if (ArchPointerSize(M) == Pointer32) { return doLoopEIMPL<32>(b, T, F); @@ -237,8 +243,9 @@ static InstTransResult doLoopE(BasicBlock *&b, BasicBlock *T, BasicBlock *F) { } } -static InstTransResult doLoopNE(BasicBlock *&b, BasicBlock *T, BasicBlock *F) { - llvm::Module *M = b->getParent()->getParent(); +static InstTransResult doLoopNE(llvm::BasicBlock *&b, llvm::BasicBlock *T, + llvm::BasicBlock *F) { + auto M = b->getParent()->getParent(); if (ArchPointerSize(M) == Pointer32) { return doLoopNEIMPL<32>(b, T, F); @@ -248,81 +255,83 @@ static InstTransResult doLoopNE(BasicBlock *&b, BasicBlock *T, BasicBlock *F) { } template -static void writeReturnAddr(BasicBlock *B) { - auto xsp = 32 == width ? X86::ESP : X86::RSP; - auto xip = 32 == width ? X86::EIP : X86::RIP; - Value *espOld = R_READ(B, xsp); - Value *espSub = BinaryOperator::CreateSub(espOld, - CONST_V(B, width / 8), "", - B); +static void writeReturnAddr(llvm::BasicBlock *B) { + auto xsp = 32 == width ? llvm::X86::ESP : llvm::X86::RSP; + auto xip = 32 == width ? llvm::X86::EIP : llvm::X86::RIP; + auto espOld = R_READ(B, xsp); + auto espSub = llvm::BinaryOperator::CreateSub(espOld, + CONST_V(B, width / 8), + "", B); M_WRITE_0(B, espSub, CONST_V(B, 0xbadf00d0badbeef0)); R_WRITE(B, xsp, espSub); } template -static void writeDetachReturnAddr(BasicBlock *B) { - auto xsp = 32 == width ? X86::ESP : X86::RSP; - auto xip = 32 == width ? X86::EIP : X86::RIP; - Value *espOld = R_READ(B, xsp); - Value *espSub = BinaryOperator::CreateSub(espOld, - CONST_V(B, width / 8), "", - B); +static void writeDetachReturnAddr(llvm::BasicBlock *B) { + auto xsp = 32 == width ? llvm::X86::ESP : llvm::X86::RSP; + auto xip = 32 == width ? llvm::X86::EIP : llvm::X86::RIP; + auto espOld = R_READ(B, xsp); + auto espSub = llvm::BinaryOperator::CreateSub(espOld, + CONST_V(B, width / 8), + "", B); M_WRITE_0(B, espSub, CONST_V(B, 0xde7accccde7acccc)); R_WRITE(B, xsp, espSub); } -static void doCallV(BasicBlock *&block, InstPtr ip, Value *call_addr, bool is_jump) { +static void doCallV(llvm::BasicBlock *&block, NativeInstPtr ip, + llvm::Value *call_addr, bool is_jump) { - Function *F = block->getParent(); - Module *M = F->getParent(); + auto F = block->getParent(); + auto M = F->getParent(); auto &C = M->getContext(); uint32_t bitWidth = ArchPointerSize(M); if (_X86_64_ == SystemArch(M)) { - R_WRITE<64>(block, X86::RIP, call_addr); - if (!is_jump) { + R_WRITE<64>(block, llvm::X86::RIP, call_addr); + if ( !is_jump) { writeDetachReturnAddr<64>(block); } } else { - R_WRITE<32>(block, X86::EIP, call_addr); - if (!is_jump) { + R_WRITE<32>(block, llvm::X86::EIP, call_addr); + if ( !is_jump) { writeDetachReturnAddr<32>(block); } } auto detach = M->getFunction("__mcsema_detach_call_value"); - auto call_detach = CallInst::Create(detach, "", block); + auto call_detach = llvm::CallInst::Create(detach, "", block); call_detach->setCallingConv(CallingConv::C); } template -static void doCallM(BasicBlock *&block, InstPtr ip, Value *mem_addr, bool is_jump) { - Value *call_addr = M_READ(ip, block, mem_addr); +static void doCallM(llvm::BasicBlock *&block, NativeInstPtr ip, + llvm::Value *mem_addr, bool is_jump) { + auto call_addr = M_READ(ip, block, mem_addr); return doCallV(block, ip, call_addr, is_jump); } - template -static llvm::CallInst* emitInternalCall(BasicBlock *&b, Module *M, const std::string &target_fn, bool is_jmp) { +static llvm::CallInst* emitInternalCall(llvm::BasicBlock *&b, llvm::Module *M, + const std::string &target_fn, + bool is_jmp) { // we need the parent function to get the regstate argument - Function *ourF = b->getParent(); + auto ourF = b->getParent(); TASSERT(ourF->arg_size() == 1, ""); // figure out who we are calling - Function *targetF = M->getFunction(target_fn); - - TASSERT(targetF != nullptr, "Could not find target function: "+target_fn); + auto targetF = M->getFunction(target_fn); + + TASSERT(targetF != nullptr, "Could not find target function: " + target_fn); // do we need to push a ret addr? - if (!is_jmp) { + if ( !is_jmp) { writeReturnAddr(b); } - // emit: call target_fn(regstate); - std::vector subArgs; + std::vector subArgs; subArgs.push_back(ourF->arg_begin()); - CallInst *c = CallInst::Create(targetF, subArgs, "", b); + auto c = llvm::CallInst::Create(targetF, subArgs, "", b); ArchSetCallingConv(M, c); // return ptr to this callinst @@ -330,16 +339,17 @@ static llvm::CallInst* emitInternalCall(BasicBlock *&b, Module *M, const std::st } template -static InstTransResult doCallPC(InstPtr ip, BasicBlock *&b, VA tgtAddr, bool is_jump) { - Module *M = b->getParent()->getParent(); +static InstTransResult doCallPC(NativeInstPtr ip, llvm::BasicBlock *&b, + VA tgtAddr, bool is_jump) { + auto M = b->getParent()->getParent(); //We should be able to look it up in our module. std::cout << __FUNCTION__ << "target address : " << to_string(tgtAddr, std::hex) << "\n"; std::string fname = "sub_" + to_string(tgtAddr, std::hex); - CallInst *c = emitInternalCall(b, M, fname, is_jump); - Function *F = c->getCalledFunction(); + auto c = emitInternalCall(b, M, fname, is_jump); + auto F = c->getCalledFunction(); if (ip->has_local_noreturn() || F->doesNotReturn()) { // noreturn functions just hit unreachable @@ -348,7 +358,7 @@ static InstTransResult doCallPC(InstPtr ip, BasicBlock *&b, VA tgtAddr, bool is_ << std::endl; c->setDoesNotReturn(); c->setTailCall(); - Value *unreachable = new UnreachableInst(b->getContext(), b); + auto unreachable = new llvm::UnreachableInst(b->getContext(), b); return EndBlock; } //and we can continue to run the old code @@ -357,93 +367,91 @@ static InstTransResult doCallPC(InstPtr ip, BasicBlock *&b, VA tgtAddr, bool is_ } namespace x86 { -static InstTransResult doCallPCExtern(BasicBlock *&b, std::string target, bool is_jump) { - Module *M = b->getParent()->getParent(); +static InstTransResult doCallPCExtern(llvm::BasicBlock *&b, std::string target, + bool is_jump) { + auto M = b->getParent()->getParent(); //write it into the location pointer to by ESP-4 - Value *espOld = x86::R_READ<32>(b, X86::ESP); + auto espOld = x86::R_READ<32>(b, llvm::X86::ESP); //lookup the function in the module - Function *externFunction = M->getFunction(target); - TASSERT(externFunction != NULL, "Could not find external function: " + target); - FunctionType *externFunctionTy = externFunction->getFunctionType(); - Type *rType = externFunction->getReturnType(); + auto externFunction = M->getFunction(target); + TASSERT(externFunction != nullptr, + "Could not find external function: " + target); + auto externFunctionTy = externFunction->getFunctionType(); + auto rType = externFunction->getReturnType(); int paramCount = externFunctionTy->getNumParams(); //now we need to do a series of reads off the stack, essentially //a series of POPs but without writing anything back to ESP - Value *baseEspVal = NULL; - std::vector arguments; + llvm::Value *baseEspVal = nullptr; + std::vector arguments; // in fastcall, the first two params are passed via register // only need to adjust stack if there are more than two args // - Function *exit_point = ArchAddExitPointDriver(externFunction); + auto exit_point = ArchAddExitPointDriver(externFunction); if (externFunction->getCallingConv() == CallingConv::X86_FastCall) { - Function::ArgumentListType::iterator it = externFunction->getArgumentList() - .begin(); - Function::ArgumentListType::iterator end = externFunction->getArgumentList() - .end(); + auto it = externFunction->getArgumentList().begin(); + auto end = externFunction->getArgumentList().end(); - Function::ArgumentListType::iterator it_ep = exit_point->getArgumentList() - .begin(); - Function::ArgumentListType::iterator end_ep = exit_point->getArgumentList() - .end(); + auto it_ep = exit_point->getArgumentList().begin(); + auto end_ep = exit_point->getArgumentList().end(); - AttrBuilder B; - B.addAttribute(Attribute::InReg); + llvm::AttrBuilder B; + B.addAttribute(llvm::Attribute::InReg); if (paramCount && it != end) { - Value *r_ecx = x86::R_READ<32>(b, X86::ECX); + auto r_ecx = x86::R_READ<32>(b, llvm::X86::ECX); arguments.push_back(r_ecx); --paramCount; // set argument 1's attribute: make it in a register - it->addAttr(AttributeSet::get(it->getContext(), 1, B)); - it_ep->addAttr(AttributeSet::get(it_ep->getContext(), 1, B)); + it->addAttr(llvm::AttributeSet::get(it->getContext(), 1, B)); + it_ep->addAttr(llvm::AttributeSet::get(it_ep->getContext(), 1, B)); ++it; ++it_ep; } if (paramCount && it != end) { - Value *r_edx = x86::R_READ<32>(b, X86::EDX); + auto r_edx = x86::R_READ<32>(b, llvm::X86::EDX); arguments.push_back(r_edx); --paramCount; // set argument 2's attribute: make it in a register - it->addAttr(AttributeSet::get(it->getContext(), 2, B)); - it_ep->addAttr(AttributeSet::get(it_ep->getContext(), 2, B)); + it->addAttr(llvm::AttributeSet::get(it->getContext(), 2, B)); + it_ep->addAttr(llvm::AttributeSet::get(it_ep->getContext(), 2, B)); ++it; ++it_ep; } } if (paramCount) { - baseEspVal = x86::R_READ<32>(b, X86::ESP); + baseEspVal = x86::R_READ<32>(b, llvm::X86::ESP); // if this is a JMP, there is already a fake return address // on the stack. Skip it to read stack arguments - if(is_jump) { - baseEspVal = BinaryOperator::CreateAdd(baseEspVal, CONST_V<32>(b, 4), "", b); + if (is_jump) { + baseEspVal = llvm::BinaryOperator::CreateAdd(baseEspVal, + CONST_V<32>(b, 4), "", b); } } for (int i = 0; i < paramCount; i++) { - Value *vFromStack = M_READ_0<32>(b, baseEspVal); + auto vFromStack = M_READ_0<32>(b, baseEspVal); arguments.push_back(vFromStack); if (i + 1 != paramCount) { - baseEspVal = BinaryOperator::CreateAdd(baseEspVal, CONST_V<32>(b, 4), "", - b); + baseEspVal = llvm::BinaryOperator::CreateAdd(baseEspVal, + CONST_V<32>(b, 4), "", b); } } - if (!is_jump) { + if ( !is_jump) { writeDetachReturnAddr<32>(b); } - CallInst *callR = CallInst::Create(exit_point, - arguments, "", b); + auto callR = llvm::CallInst::Create(exit_point, arguments, "", b); callR->setCallingConv(externFunction->getCallingConv()); noAliasMCSemaScope(callR); @@ -454,7 +462,7 @@ static InstTransResult doCallPCExtern(BasicBlock *&b, std::string target, bool i << std::endl; callR->setDoesNotReturn(); callR->setTailCall(); - Value *unreachable = new UnreachableInst(b->getContext(), b); + (void) new llvm::UnreachableInst(b->getContext(), b); return EndBlock; } @@ -465,8 +473,8 @@ static InstTransResult doCallPCExtern(BasicBlock *&b, std::string target, bool i //if our convention says to keep the call result alive then do it //really, we could always keep the call result alive... - if (rType == Type::getInt32Ty(M->getContext())) { - x86::R_WRITE<32>(b, X86::EAX, callR); + if (rType == llvm::Type::getInt32Ty(M->getContext())) { + x86::R_WRITE<32>(b, llvm::X86::EAX, callR); } return ContinueBlock; @@ -475,14 +483,16 @@ static InstTransResult doCallPCExtern(BasicBlock *&b, std::string target, bool i namespace x86_64 { -static InstTransResult doCallPCExtern(BasicBlock *&b, std::string target, bool is_jump) { - Module *M = b->getParent()->getParent(); +static InstTransResult doCallPCExtern(llvm::BasicBlock *&b, std::string target, + bool is_jump) { + auto M = b->getParent()->getParent(); //lookup the function in the module - Function *externFunction = M->getFunction(target); - TASSERT(externFunction != NULL, "Could not find external function: " + target); - FunctionType *externFunctionTy = externFunction->getFunctionType(); - Type *rType = externFunction->getReturnType(); + auto externFunction = M->getFunction(target); + TASSERT(externFunction != nullptr, + "Could not find external function: " + target); + auto externFunctionTy = externFunction->getFunctionType(); + auto rType = externFunction->getReturnType(); int paramCount = externFunctionTy->getNumParams(); //std::string funcSign = externFunction->getSignature(); @@ -495,157 +505,157 @@ static InstTransResult doCallPCExtern(BasicBlock *&b, std::string target, bool i //now we need to do a series of reads off the stack, essentially //a series of POPs but without writing anything back to ESP - Value *baseRspVal = NULL; - std::vector arguments; + llvm::Value *baseRspVal = nullptr; + std::vector arguments; // on x86_64 platform all calls will be x86_64_SysV - Function::ArgumentListType::iterator it = externFunction->getArgumentList() - .begin(); - Function::ArgumentListType::iterator end = externFunction->getArgumentList() - .end(); - AttrBuilder B; - B.addAttribute(Attribute::InReg); + auto it = externFunction->getArgumentList().begin(); + auto end = externFunction->getArgumentList().end(); + llvm::AttrBuilder B; + B.addAttribute(llvm::Attribute::InReg); if (SystemOS(M) == llvm::Triple::Win32) { if (paramCount && it != end) { - Type *T = it->getType(); - Value *arg1; + auto T = it->getType(); + llvm::Value *arg1 = nullptr; if (T->isDoubleTy()) { int k = x86_64::getRegisterOffset(XMM0); - Value *arg1FieldGEPV[] = {CONST_V<64>(b, 0), CONST_V<32>(b, k)}; + llvm::Value *arg1FieldGEPV[] = {CONST_V<64>(b, 0), CONST_V<32>(b, k)}; - Instruction *GEP_128 = GetElementPtrInst::CreateInBounds( + auto GEP_128 = llvm::GetElementPtrInst::CreateInBounds( b->getParent()->arg_begin(), arg1FieldGEPV, "XMM0", b); - Instruction *GEP_double = CastInst::CreatePointerCast( - GEP_128, PointerType::get(Type::getDoubleTy(M->getContext()), 0), + auto GEP_double = llvm::CastInst::CreatePointerCast( + GEP_128, + llvm::PointerType::get(llvm::Type::getDoubleTy(M->getContext()), 0), "conv0", b); - arg1 = new LoadInst(GEP_double, "", b); + arg1 = new llvm::LoadInst(GEP_double, "", b); } else { - arg1 = x86_64::R_READ<64>(b, X86::RCX); + arg1 = x86_64::R_READ<64>(b, llvm::X86::RCX); } arguments.push_back(arg1); --paramCount; - it->addAttr(AttributeSet::get(it->getContext(), 1, B)); + it->addAttr(llvm::AttributeSet::get(it->getContext(), 1, B)); ++it; } if (paramCount && it != end) { - Type *T = it->getType(); - Value *arg2; + auto T = it->getType(); + llvm::Value *arg2 = nullptr; if (T->isDoubleTy()) { int k = x86_64::getRegisterOffset(XMM1); - Value *arg2FieldGEPV[] = {CONST_V<64>(b, 0), CONST_V<32>(b, k)}; + llvm::Value *arg2FieldGEPV[] = {CONST_V<64>(b, 0), CONST_V<32>(b, k)}; - Instruction *GEP_128 = GetElementPtrInst::CreateInBounds( + auto GEP_128 = llvm::GetElementPtrInst::CreateInBounds( b->getParent()->arg_begin(), arg2FieldGEPV, "XMM1", b); - Instruction *GEP_double = CastInst::CreatePointerCast( - GEP_128, PointerType::get(Type::getDoubleTy(M->getContext()), 0), + auto GEP_double = llvm::CastInst::CreatePointerCast( + GEP_128, + llvm::PointerType::get(llvm::Type::getDoubleTy(M->getContext()), 0), "conv1", b); - arg2 = new LoadInst(GEP_double, "", b); - } else - arg2 = x86_64::R_READ<64>(b, X86::RDX); - + arg2 = new llvm::LoadInst(GEP_double, "", b); + } else { + arg2 = x86_64::R_READ<64>(b, llvm::X86::RDX); + } arguments.push_back(arg2); --paramCount; - it->addAttr(AttributeSet::get(it->getContext(), 2, B)); + it->addAttr(llvm::AttributeSet::get(it->getContext(), 2, B)); ++it; } if (paramCount && it != end) { - Type *T = it->getType(); - Value *arg3; + auto T = it->getType(); + llvm::Value *arg3 = nullptr; if (T->isDoubleTy()) { int k = x86_64::getRegisterOffset(XMM2); - Value *arg3FieldGEPV[] = {CONST_V<64>(b, 0), CONST_V<32>(b, k)}; + llvm::Value *arg3FieldGEPV[] = {CONST_V<64>(b, 0), CONST_V<32>(b, k)}; - Instruction *GEP_128 = GetElementPtrInst::CreateInBounds( + auto GEP_128 = llvm::GetElementPtrInst::CreateInBounds( b->getParent()->arg_begin(), arg3FieldGEPV, "XMM2", b); - Instruction *GEP_double = CastInst::CreatePointerCast( - GEP_128, PointerType::get(Type::getDoubleTy(M->getContext()), 0), + auto GEP_double = llvm::CastInst::CreatePointerCast( + GEP_128, + llvm::PointerType::get(llvm::Type::getDoubleTy(M->getContext()), 0), "conv2", b); - arg3 = new LoadInst(GEP_double, "", b); + arg3 = new llvm::LoadInst(GEP_double, "", b); + } else { + arg3 = x86_64::R_READ<64>(b, llvm::X86::R8); } - - else - arg3 = x86_64::R_READ<64>(b, X86::R8); - arguments.push_back(arg3); --paramCount; - it->addAttr(AttributeSet::get(it->getContext(), 3, B)); + it->addAttr(llvm::AttributeSet::get(it->getContext(), 3, B)); ++it; } if (paramCount && it != end) { - Type *T = it->getType(); - Value *arg4; + auto T = it->getType(); + llvm::Value *arg4 = nullptr; if (T->isDoubleTy()) { int k = x86_64::getRegisterOffset(XMM3); - Value *arg4FieldGEPV[] = {CONST_V<64>(b, 0), CONST_V<32>(b, k)}; + llvm::Value *arg4FieldGEPV[] = {CONST_V<64>(b, 0), CONST_V<32>(b, k)}; - Instruction *GEP_128 = GetElementPtrInst::CreateInBounds( + auto GEP_128 = llvm::GetElementPtrInst::CreateInBounds( b->getParent()->arg_begin(), arg4FieldGEPV, "XMM3", b); - Instruction *GEP_double = CastInst::CreatePointerCast( - GEP_128, PointerType::get(Type::getDoubleTy(M->getContext()), 0), + auto GEP_double = llvm::CastInst::CreatePointerCast( + GEP_128, + llvm::PointerType::get(llvm::Type::getDoubleTy(M->getContext()), 0), "conv3", b); - arg4 = new LoadInst(GEP_double, "", b); - } else - arg4 = x86_64::R_READ<64>(b, X86::R9); - + arg4 = new llvm::LoadInst(GEP_double, "", b); + } else { + arg4 = x86_64::R_READ<64>(b, llvm::X86::R9); + } arguments.push_back(arg4); --paramCount; - it->addAttr(AttributeSet::get(it->getContext(), 4, B)); + it->addAttr(llvm::AttributeSet::get(it->getContext(), 4, B)); ++it; } } else { if (paramCount && it != end) { // fix it by updating the value type - Value *reg_rdi = x86_64::R_READ<64>(b, X86::RDI); + auto reg_rdi = x86_64::R_READ<64>(b, llvm::X86::RDI); arguments.push_back(reg_rdi); --paramCount; - it->addAttr(AttributeSet::get(it->getContext(), 1, B)); + it->addAttr(llvm::AttributeSet::get(it->getContext(), 1, B)); ++it; } if (paramCount && it != end) { - Value *reg_rsi = x86_64::R_READ<64>(b, X86::RSI); + auto reg_rsi = x86_64::R_READ<64>(b, llvm::X86::RSI); arguments.push_back(reg_rsi); --paramCount; - it->addAttr(AttributeSet::get(it->getContext(), 2, B)); + it->addAttr(llvm::AttributeSet::get(it->getContext(), 2, B)); ++it; } if (paramCount && it != end) { - Value *reg_rdx = x86_64::R_READ<64>(b, X86::RDX); + auto reg_rdx = x86_64::R_READ<64>(b, llvm::X86::RDX); arguments.push_back(reg_rdx); --paramCount; - it->addAttr(AttributeSet::get(it->getContext(), 3, B)); + it->addAttr(llvm::AttributeSet::get(it->getContext(), 3, B)); ++it; } if (paramCount && it != end) { - Value *reg_rcx = x86_64::R_READ<64>(b, X86::RCX); + auto reg_rcx = x86_64::R_READ<64>(b, llvm::X86::RCX); arguments.push_back(reg_rcx); --paramCount; - it->addAttr(AttributeSet::get(it->getContext(), 4, B)); + it->addAttr(llvm::AttributeSet::get(it->getContext(), 4, B)); ++it; } if (paramCount && it != end) { - Value *reg_r8 = x86_64::R_READ<64>(b, X86::R8); + auto reg_r8 = x86_64::R_READ<64>(b, llvm::X86::R8); arguments.push_back(reg_r8); --paramCount; - it->addAttr(AttributeSet::get(it->getContext(), 5, B)); + it->addAttr(llvm::AttributeSet::get(it->getContext(), 5, B)); ++it; } if (paramCount && it != end) { - Value *reg_r9 = x86_64::R_READ<64>(b, X86::R9); + auto reg_r9 = x86_64::R_READ<64>(b, llvm::X86::R9); arguments.push_back(reg_r9); --paramCount; - it->addAttr(AttributeSet::get(it->getContext(), 6, B)); + it->addAttr(llvm::AttributeSet::get(it->getContext(), 6, B)); ++it; } } @@ -653,40 +663,42 @@ static InstTransResult doCallPCExtern(BasicBlock *&b, std::string target, bool i if (paramCount) { // rest of the arguments are passed over stack // adjust the stack pointer if required - baseRspVal = x86_64::R_READ<64>(b, X86::RSP); + baseRspVal = x86_64::R_READ<64>(b, llvm::X86::RSP); // The Windows amd64 calling convention requires // 32-bytes of stack reserved in each function call. At the call point, // the stack is already pre-reserved, so the arguments start 32 bytes up // of where we would expect if (SystemOS(M) == llvm::Triple::Win32) { - baseRspVal = BinaryOperator::CreateAdd(baseRspVal, CONST_V<64>(b, 0x20), "", b); + baseRspVal = llvm::BinaryOperator::CreateAdd(baseRspVal, + CONST_V<64>(b, 0x20), "", b); } // if this is a JMP, there is already a fake return address // on the stack. Skip it to read stack arguments - if(is_jump) { - baseRspVal = BinaryOperator::CreateAdd(baseRspVal, CONST_V<64>(b, 8), "", b); + if (is_jump) { + baseRspVal = llvm::BinaryOperator::CreateAdd(baseRspVal, + CONST_V<64>(b, 8), "", b); } } for (int i = 0; i < paramCount; i++) { - Value *vFromStack = M_READ_0<64>(b, baseRspVal); + auto vFromStack = M_READ_0<64>(b, baseRspVal); arguments.push_back(vFromStack); if (i + 1 != paramCount) { - baseRspVal = BinaryOperator::CreateAdd(baseRspVal, CONST_V<64>(b, 8), "", - b); + baseRspVal = llvm::BinaryOperator::CreateAdd(baseRspVal, + CONST_V<64>(b, 8), "", b); } } - if (!is_jump) { + if ( !is_jump) { writeDetachReturnAddr<64>(b); } - CallInst *callR = CallInst::Create(ArchAddExitPointDriver(externFunction), - arguments, "", b); + auto callR = llvm::CallInst::Create(ArchAddExitPointDriver(externFunction), + arguments, "", b); ArchSetCallingConv(M, callR); if (externFunction->doesNotReturn()) { @@ -695,13 +707,13 @@ static InstTransResult doCallPCExtern(BasicBlock *&b, std::string target, bool i << std::endl; callR->setDoesNotReturn(); callR->setTailCall(); - Value *unreachable = new UnreachableInst(b->getContext(), b); + (void) new llvm::UnreachableInst(b->getContext(), b); return EndBlock; } //if our convention says to keep the call result alive then do it //really, we could always keep the call result alive... - if (rType == Type::getInt64Ty(M->getContext())) { + if (rType == llvm::Type::getInt64Ty(M->getContext())) { x86_64::R_WRITE<64>(b, X86::RAX, callR); } @@ -711,9 +723,12 @@ static InstTransResult doCallPCExtern(BasicBlock *&b, std::string target, bool i } template -static InstTransResult translate_JMPm(NativeModulePtr natM, BasicBlock *& block, - InstPtr ip, MCInst &inst) { +static InstTransResult translate_JMPm(TranslationContext &ctx, + llvm::BasicBlock *& block) { InstTransResult ret; + auto natM = ctx.natM; + auto ip = ctx.natI; + auto &inst = ip->get_inst(); // translate JMP mem64 API calls // as a call , ret; @@ -723,11 +738,12 @@ static InstTransResult translate_JMPm(NativeModulePtr natM, BasicBlock *& block, // this is really an internal call; this calling convention // is reserved for functions that we are going to implement internally - if(ip->get_ext_call_target()->getCallingConvention() == ExternalCodeRef::McsemaCall) { - Module *M = block->getParent()->getParent(); - std::string target_fn = ArchNameMcsemaCall(s); - emitInternalCall(block, M, target_fn, true); - return ContinueBlock; + if (ip->get_ext_call_target()->getCallingConvention() + == ExternalCodeRef::McsemaCall) { + auto M = block->getParent()->getParent(); + std::string target_fn = ArchNameMcSemaCall(s); + emitInternalCall(block, M, target_fn, true); + return ContinueBlock; } if (64 == width) { @@ -736,15 +752,15 @@ static InstTransResult translate_JMPm(NativeModulePtr natM, BasicBlock *& block, ret = x86::doCallPCExtern(block, s, true); } if (ret != EndBlock) { - //doRet(block); - llvm::ReturnInst::Create(block->getContext(), block); - return EndBlock; + //doRet(block); + llvm::ReturnInst::Create(block->getContext(), block); + return EndBlock; } else { - // the external was a call to donotreturn function - return ret; + // the external was a call to donotreturn function + return ret; } } else if (ip->has_ext_data_ref()) { - Module *M = block->getParent()->getParent(); + auto M = block->getParent()->getParent(); std::string target = ip->get_ext_data_ref()->getSymbolName(); llvm::Value *gvar = M->getGlobalVariable(target); @@ -761,14 +777,14 @@ static InstTransResult translate_JMPm(NativeModulePtr natM, BasicBlock *& block, } else if (ip->has_jump_table() && ip->has_mem_reference) { // this is a jump table that got converted // into a table in the data section - doJumpTableViaData(natM, block, ip, inst, width); + doJumpTableViaData(ctx, block, width); llvm::ReturnInst::Create(block->getContext(), block); return EndBlock; } else if (ip->has_jump_table()) { // this is a conformant jump table // emit an llvm switch - doJumpTableViaSwitch(natM, block, ip, inst, width); + doJumpTableViaSwitch(ctx, block, width); return EndBlock; } else if (ip->has_mem_reference) { @@ -784,28 +800,30 @@ static InstTransResult translate_JMPm(NativeModulePtr natM, BasicBlock *& block, } template -static InstTransResult translate_JMPr(NativeModulePtr natM, BasicBlock *&block, - InstPtr ip, MCInst &inst) { - const MCOperand &tgtOp = inst.getOperand(0); +static InstTransResult translate_JMPr(TranslationContext &ctx, + llvm::BasicBlock *&block) { + auto ip = ctx.natI; + auto &inst = ip->get_inst(); + const auto &tgtOp = inst.getOperand(0); TASSERT(inst.getNumOperands() == 1, ""); TASSERT(tgtOp.isReg(), ""); //read the register - Value *fromReg = R_READ(block, tgtOp.getReg()); + auto fromReg = R_READ(block, tgtOp.getReg()); - Module *M = block->getParent()->getParent(); + auto M = block->getParent()->getParent(); VA ot_addr = ip->offset_table; // does this inst have an offset table? if (ot_addr != -1) { - auto ot_value = natM->offsetTables.find(ot_addr); + auto ot_value = ctx.natM->offset_tables.find(ot_addr); TASSERT( - ot_value != natM->offsetTables.end(), + ot_value != ctx.natM->offset_tables.end(), "Could not find offset table for addr:" + to_string(ot_addr, std::hex)); - if (ot_value != natM->offsetTables.end()) { + if (ot_value != ctx.natM->offset_tables.end()) { llvm::dbgs() << __FUNCTION__ << ": We have an offset table for: " << to_string(ip->get_loc(), std::hex) << " at: " << to_string(ot_addr, std::hex) << "\n"; @@ -813,22 +831,21 @@ static InstTransResult translate_JMPr(NativeModulePtr natM, BasicBlock *&block, VA data_section = 0; MCSOffsetTablePtr ot = ot_value->second; VA old_table_addr = ot->getStartAddr(); - Value *global_v = getGlobalFromOriginalAddr(old_table_addr, natM, - 0, block); + auto global_v = getGlobalFromOriginalAddr(old_table_addr, ctx.natM, + 0, block); TASSERT( global_v != nullptr, "Could not find global for addr:" + to_string(old_table_addr, std::hex)); if (global_v != nullptr) { - BasicBlock *defaultb = nullptr; - doJumpOffsetTableViaSwitchReg(block, ip, fromReg, defaultb, global_v, + llvm::BasicBlock *defaultb = nullptr; + doJumpOffsetTableViaSwitchReg(ctx, block, fromReg, defaultb, global_v, ot); // add trap to default block - Function *trapIntrin = Intrinsic::getDeclaration(M, Intrinsic::trap); - CallInst::Create(trapIntrin, "", defaultb); - Value *unreachable = new UnreachableInst(defaultb->getContext(), - defaultb); + auto trapIntrin = Intrinsic::getDeclaration(M, llvm::Intrinsic::trap); + llvm::CallInst::Create(trapIntrin, "", defaultb); + (void) new llvm::UnreachableInst(defaultb->getContext(), defaultb); return EndCFG; } } @@ -840,23 +857,23 @@ static InstTransResult translate_JMPr(NativeModulePtr natM, BasicBlock *&block, llvm::dbgs() << __FUNCTION__ << ": jump table via register: " << to_string(ip->get_loc(), std::hex) << "\n"; - BasicBlock *defaultb = nullptr; + llvm::BasicBlock *defaultb = nullptr; // Terrible HACK // Subtract image base since we assume win64 adds it for jump // tables. This may not always be true. - Value *minus_base = nullptr; + llvm::Value *minus_base = nullptr; if (width == 64 && shouldSubtractImageBase(M)) { minus_base = doSubtractImageBaseInt(fromReg, block); } else { minus_base = fromReg; } // end terrible HACK - doJumpTableViaSwitchReg(block, ip, minus_base, defaultb, width); + doJumpTableViaSwitchReg(ctx, block, minus_base, defaultb, width); TASSERT(defaultb != nullptr, "Default block has to exit"); // fallback to doing do_call_value doCallV(defaultb, ip, fromReg, true); - ReturnInst::Create(defaultb->getContext(), defaultb); + llvm::ReturnInst::Create(defaultb->getContext(), defaultb); return EndCFG; } else { @@ -864,27 +881,30 @@ static InstTransResult translate_JMPr(NativeModulePtr natM, BasicBlock *&block, llvm::dbgs() << __FUNCTION__ << ": regular jump via register: " << to_string(ip->get_loc(), std::hex) << "\n"; doCallV(block, ip, fromReg, true); - ReturnInst::Create(block->getContext(), block); + llvm::ReturnInst::Create(block->getContext(), block); return EndCFG; } } template -static InstTransResult translate_CALLpcrel32(NativeModulePtr natM, - BasicBlock *& block, InstPtr ip, - MCInst &inst) { +static InstTransResult translate_CALLpcrel32(TranslationContext &ctx, + llvm::BasicBlock *&block) { InstTransResult ret; + auto natM = ctx.natM; + auto ip = ctx.natI; + auto &inst = ip->get_inst(); if (ip->has_ext_call_target()) { std::string s = ip->get_ext_call_target()->getSymbolName(); - if(ip->get_ext_call_target()->getCallingConvention() == ExternalCodeRef::McsemaCall) { - Module *M = block->getParent()->getParent(); - std::string target_fn = ArchNameMcsemaCall(s); - emitInternalCall(block, M, target_fn, false); - return ContinueBlock; + if (ip->get_ext_call_target()->getCallingConvention() + == ExternalCodeRef::McsemaCall) { + auto M = block->getParent()->getParent(); + std::string target_fn = ArchNameMcSemaCall(s); + emitInternalCall(block, M, target_fn, false); + return ContinueBlock; } else { llvm::dbgs() << __FUNCTION__ << ": function is: " << s << ", cc is: " - << ip->get_ext_call_target()->getCallingConvention() << "\n"; + << ip->get_ext_call_target()->getCallingConvention() << "\n"; } if (width == 64) { ret = x86_64::doCallPCExtern(block, s, false); @@ -892,21 +912,24 @@ static InstTransResult translate_CALLpcrel32(NativeModulePtr natM, ret = x86::doCallPCExtern(block, s, false); } } else if (ip->has_code_ref()) { - int64_t off = (int64_t) ip->get_reference(Inst::MEMRef); + VA off = ip->get_reference(NativeInst::MEMRef); ret = doCallPC(ip, block, off, false); } else { - int64_t off = (int64_t) OP(0).getImm(); - ret = doCallPC(ip, block, ip->get_loc() + ip->get_len() + off, false); + VA off = OP(0).getImm(); + ret = doCallPC(ip, block, ip->get_loc() + ip->get_len() + off, + false); } return ret; } template -static InstTransResult translate_CALLm(NativeModulePtr natM, - BasicBlock *& block, InstPtr ip, - MCInst &inst) { +static InstTransResult translate_CALLm(TranslationContext &ctx, + llvm::BasicBlock *&block) { InstTransResult ret; + auto natM = ctx.natM; + auto ip = ctx.natI; + auto &inst = ip->get_inst(); // is this an external call? if (ip->has_ext_call_target()) { @@ -914,11 +937,12 @@ static InstTransResult translate_CALLm(NativeModulePtr natM, // this is really an internal call; this calling convention // is reserved for functions that we are going to implement internally - if(ip->get_ext_call_target()->getCallingConvention() == ExternalCodeRef::McsemaCall) { - Module *M = block->getParent()->getParent(); - std::string target_fn = ArchNameMcsemaCall(s); - emitInternalCall(block, M, target_fn, false); - return ContinueBlock; + if (ip->get_ext_call_target()->getCallingConvention() + == ExternalCodeRef::McsemaCall) { + auto M = block->getParent()->getParent(); + std::string target_fn = ArchNameMcSemaCall(s); + emitInternalCall(block, M, target_fn, false); + return ContinueBlock; } if (width == 64) { @@ -930,7 +954,7 @@ static InstTransResult translate_CALLm(NativeModulePtr natM, // not external call, but some weird way of calling local function? } else if (ip->has_code_ref()) { cout << __FUNCTION__ << ":" << __LINE__ << ": doing call" << std::endl; - doCallPC(ip, block, ip->get_reference(Inst::MEMRef), false); + doCallPC(ip, block, ip->get_reference(NativeInst::MEMRef), false); } // is this referencing global data? else if (ip->has_mem_reference) { @@ -946,9 +970,11 @@ static InstTransResult translate_CALLm(NativeModulePtr natM, } template -static InstTransResult translate_CALLr(NativeModulePtr natM, BasicBlock *&block, - InstPtr ip, MCInst &inst) { - const MCOperand &tgtOp = inst.getOperand(0); +static InstTransResult translate_CALLr(TranslationContext &ctx, + llvm::BasicBlock *&block) { + auto ip = ctx.natI; + auto &inst = ip->get_inst(); + const auto &tgtOp = inst.getOperand(0); //we are calling a register! this is VERY EXCITING //first, we need to know which register we are calling. read that //register, then make a call to the external procedure. @@ -959,23 +985,16 @@ static InstTransResult translate_CALLr(NativeModulePtr natM, BasicBlock *&block, TASSERT(tgtOp.isReg(), ""); //read the register - Value *fromReg = R_READ(block, tgtOp.getReg()); - - Module *M = block->getParent()->getParent(); - const std::string &triple = M->getTargetTriple(); - + auto fromReg = R_READ(block, tgtOp.getReg()); doCallV(block, ip, fromReg, false); - return ContinueBlock; } -#define BLOCKNAMES_TRANSLATION(NAME, THECALL) static InstTransResult translate_ ## NAME (NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) {\ - Function *F = block->getParent(); \ - std::string trueStrName = "block_0x"+to_string(ip->get_tr(), std::hex); \ - std::string falseStrName = "block_0x"+to_string(ip->get_fa(), std::hex); \ - BasicBlock *ifTrue = bbFromStrName(trueStrName, F); \ - TASSERT(ifTrue != NULL, "Could not find true block:"+trueStrName); \ - BasicBlock *ifFalse = bbFromStrName(falseStrName, F); \ +#define BLOCKNAMES_TRANSLATION(NAME, THECALL) static InstTransResult translate_ ## NAME (TranslationContext &ctx, llvm::BasicBlock *&block) {\ + auto F = block->getParent(); \ + auto ip = ctx.natI; \ + auto ifTrue = ctx.va_to_bb[ip->get_tr()]; \ + auto ifFalse = ctx.va_to_bb[ip->get_fa()]; \ InstTransResult ret;\ ret = THECALL ; \ return ret ;\ @@ -992,16 +1011,15 @@ GENERIC_TRANSLATION(RETIQ, doRetI<64>(block, OP(0))) GENERIC_TRANSLATION(LRET, doLRet<32>(block)) - BLOCKNAMES_TRANSLATION(JMP_4, doNonCondBranch(block, ifTrue)) BLOCKNAMES_TRANSLATION(JMP_2, doNonCondBranch(block, ifTrue)) BLOCKNAMES_TRANSLATION(JMP_1, doNonCondBranch(block, ifTrue)) void Branches_populateDispatchMap(DispatchMap &m) { - m[X86::JMP32r] = (translate_JMPr<32> ); - m[X86::JMP32m] = (translate_JMPm<32> ); - m[X86::JMP64r] = (translate_JMPr<64> ); - m[X86::JMP64m] = (translate_JMPm<64> ); + m[X86::JMP32r] = translate_JMPr<32>; + m[X86::JMP32m] = translate_JMPm<32>; + m[X86::JMP64r] = translate_JMPr<64>; + m[X86::JMP64m] = translate_JMPm<64>; m[X86::JMP_4] = translate_JMP_4; m[X86::JMP_2] = translate_JMP_2; @@ -1009,10 +1027,10 @@ void Branches_populateDispatchMap(DispatchMap &m) { m[X86::CALLpcrel32] = (translate_CALLpcrel32<32> ); m[X86::CALL64pcrel32] = (translate_CALLpcrel32<64> ); - m[X86::CALL32m] = (translate_CALLm<32> ); - m[X86::CALL64m] = (translate_CALLm<64> ); - m[X86::CALL32r] = (translate_CALLr<32> ); - m[X86::CALL64r] = (translate_CALLr<64> ); + m[X86::CALL32m] = translate_CALLm<32>; + m[X86::CALL64m] = translate_CALLm<64>; + m[X86::CALL32r] = translate_CALLr<32>; + m[X86::CALL64r] = translate_CALLr<64>; m[X86::LOOP] = translate_LOOP; m[X86::LOOPE] = translate_LOOPE; @@ -1023,6 +1041,5 @@ void Branches_populateDispatchMap(DispatchMap &m) { m[X86::RETIQ] = translate_RETIQ; m[X86::RETIW] = translate_RETIW; - m[X86::LRETL] = translate_LRET; } diff --git a/mc-sema/cfgToLLVM/x86Instrs_CMOV.cpp b/mc-sema/cfgToLLVM/x86Instrs_CMOV.cpp index 1b9904419..02f766bcf 100644 --- a/mc-sema/cfgToLLVM/x86Instrs_CMOV.cpp +++ b/mc-sema/cfgToLLVM/x86Instrs_CMOV.cpp @@ -94,8 +94,11 @@ static InstTransResult doCMOV( return ContinueBlock; } -#define EMIT_CMOV_RM(width, condition) [] (NativeModulePtr natM, BasicBlock *&block, InstPtr ip, MCInst &inst)->InstTransResult {\ - BasicBlock *b = block;\ +#define EMIT_CMOV_RM(width, condition) [] (TranslationContext &ctx, BasicBlock *&block)->InstTransResult {\ + auto ip = ctx.natI; \ + auto &inst = ip->get_inst(); \ + auto natM = ctx.natM; \ + llvm::BasicBlock *b = block;\ if( ip->has_mem_reference ) {\ return doCMOV(block, OP(0), condition, M_READ(ip, b, MEM_REFERENCE(2)));\ }else {\ @@ -103,7 +106,10 @@ static InstTransResult doCMOV( }\ } -#define EMIT_CMOV_RR(width, condition) [] (NativeModulePtr natM, BasicBlock *&b, InstPtr ip, MCInst &inst)->InstTransResult {\ +#define EMIT_CMOV_RR(width, condition) [] (TranslationContext &ctx, BasicBlock *&b)->InstTransResult {\ + auto ip = ctx.natI; \ + auto &inst = ip->get_inst(); \ + auto natM = ctx.natM; \ return doCMOV(b, OP(0), condition, R_READ(b, OP(2).getReg())); \ } diff --git a/mc-sema/cfgToLLVM/x86Instrs_CMPTEST.cpp b/mc-sema/cfgToLLVM/x86Instrs_CMPTEST.cpp index 8f71d31d4..cbbb9d5dc 100644 --- a/mc-sema/cfgToLLVM/x86Instrs_CMPTEST.cpp +++ b/mc-sema/cfgToLLVM/x86Instrs_CMPTEST.cpp @@ -35,12 +35,11 @@ #include "llvm/Support/Debug.h" #define NASSERT(cond) TASSERT(cond, "") -#define INSTR_DEBUG(ip) llvm::dbgs() << __FUNCTION__ << "\tRepresentation: " << ip->printInst() << "\n" using namespace llvm; template -static InstTransResult doCmpRR(InstPtr ip, BasicBlock *&b, const MCOperand &lhs, +static InstTransResult doCmpRR(NativeInstPtr ip, BasicBlock *&b, const MCOperand &lhs, const MCOperand &rhs) { NASSERT(lhs.isReg()); NASSERT(rhs.isReg()); @@ -54,7 +53,7 @@ static InstTransResult doCmpRR(InstPtr ip, BasicBlock *&b, const MCOperand &lhs, } template -static InstTransResult doCmpRI(InstPtr ip, BasicBlock *&b, const MCOperand &lhs, +static InstTransResult doCmpRI(NativeInstPtr ip, BasicBlock *&b, const MCOperand &lhs, const MCOperand &rhs) { NASSERT(lhs.isReg()); NASSERT(rhs.isImm()); @@ -68,7 +67,7 @@ static InstTransResult doCmpRI(InstPtr ip, BasicBlock *&b, const MCOperand &lhs, } template -static InstTransResult doCmpRV(InstPtr ip, BasicBlock *&b, const MCOperand &lhs, +static InstTransResult doCmpRV(NativeInstPtr ip, BasicBlock *&b, const MCOperand &lhs, llvm::Value *rhs) { NASSERT(lhs.isReg()); @@ -81,7 +80,7 @@ static InstTransResult doCmpRV(InstPtr ip, BasicBlock *&b, const MCOperand &lhs, } template -static InstTransResult doCmpMR(InstPtr ip, BasicBlock *&b, Value *mem, +static InstTransResult doCmpMR(NativeInstPtr ip, BasicBlock *&b, Value *mem, const MCOperand ®) { NASSERT(reg.isReg()); NASSERT(mem!=NULL); @@ -99,7 +98,7 @@ static InstTransResult doCmpMR(InstPtr ip, BasicBlock *&b, Value *mem, } template -static InstTransResult doCmpRM(InstPtr ip, BasicBlock *&b, const MCOperand ®, +static InstTransResult doCmpRM(NativeInstPtr ip, BasicBlock *&b, const MCOperand ®, Value *mem) { NASSERT(reg.isReg()); NASSERT(mem!=NULL); @@ -117,7 +116,7 @@ static InstTransResult doCmpRM(InstPtr ip, BasicBlock *&b, const MCOperand ®, } template -static InstTransResult doCmpMI(InstPtr ip, BasicBlock *&b, Value *r1, +static InstTransResult doCmpMI(NativeInstPtr ip, BasicBlock *&b, Value *r1, const MCOperand &r2) { NASSERT(r1 != NULL); NASSERT(r2.isImm()); @@ -132,7 +131,7 @@ static InstTransResult doCmpMI(InstPtr ip, BasicBlock *&b, Value *r1, } template -static InstTransResult doCmpMV(InstPtr ip, BasicBlock *&b, Value *r1, +static InstTransResult doCmpMV(NativeInstPtr ip, BasicBlock *&b, Value *r1, Value *rhs) { NASSERT(r1 != NULL); NASSERT(rhs != NULL); @@ -146,7 +145,7 @@ static InstTransResult doCmpMV(InstPtr ip, BasicBlock *&b, Value *r1, } template -static void doTestVV(InstPtr ip, BasicBlock *&b, Value *lhs, Value *rhs) { +static void doTestVV(NativeInstPtr ip, BasicBlock *&b, Value *lhs, Value *rhs) { Value *temp = BinaryOperator::CreateAnd(lhs, rhs, "", b); @@ -177,7 +176,7 @@ static void doTestVV(InstPtr ip, BasicBlock *&b, Value *lhs, Value *rhs) { } template -static InstTransResult doTestMI(InstPtr ip, BasicBlock *&b, Value *lhs, +static InstTransResult doTestMI(NativeInstPtr ip, BasicBlock *&b, Value *lhs, const MCOperand &rhs) { NASSERT(lhs != NULL); NASSERT(rhs.isImm()); @@ -189,7 +188,7 @@ static InstTransResult doTestMI(InstPtr ip, BasicBlock *&b, Value *lhs, } template -static InstTransResult doTestMV(InstPtr ip, BasicBlock *&b, Value *lhs, +static InstTransResult doTestMV(NativeInstPtr ip, BasicBlock *&b, Value *lhs, Value *rhs) { NASSERT(lhs != NULL); NASSERT(rhs != NULL); @@ -200,7 +199,7 @@ static InstTransResult doTestMV(InstPtr ip, BasicBlock *&b, Value *lhs, } template -static InstTransResult doTestRM(InstPtr ip, BasicBlock *&b, +static InstTransResult doTestRM(NativeInstPtr ip, BasicBlock *&b, const MCOperand &lhs, Value *rhs) { NASSERT(rhs != NULL); NASSERT(lhs.isReg()); @@ -212,7 +211,7 @@ static InstTransResult doTestRM(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doTestRR(InstPtr ip, BasicBlock *&b, +static InstTransResult doTestRR(NativeInstPtr ip, BasicBlock *&b, const MCOperand &lhs, const MCOperand &rhs) { NASSERT(lhs.isReg()); NASSERT(rhs.isReg()); @@ -224,7 +223,7 @@ static InstTransResult doTestRR(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doTestRI(InstPtr ip, BasicBlock *&b, +static InstTransResult doTestRI(NativeInstPtr ip, BasicBlock *&b, const MCOperand &lhs, const MCOperand &rhs) { NASSERT(lhs.isReg()); NASSERT(rhs.isImm()); @@ -236,7 +235,7 @@ static InstTransResult doTestRI(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doTestRV(InstPtr ip, BasicBlock *&b, +static InstTransResult doTestRV(NativeInstPtr ip, BasicBlock *&b, const MCOperand &lhs, llvm::Value *rhs) { NASSERT(lhs.isReg()); diff --git a/mc-sema/cfgToLLVM/x86Instrs_CMPTEST.h b/mc-sema/cfgToLLVM/x86Instrs_CMPTEST.h index ca1a3a41a..271a90c7d 100644 --- a/mc-sema/cfgToLLVM/x86Instrs_CMPTEST.h +++ b/mc-sema/cfgToLLVM/x86Instrs_CMPTEST.h @@ -34,7 +34,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. void CMPTEST_populateDispatchMap(DispatchMap &m); template -void doCmpVV(InstPtr ip, llvm::BasicBlock *b, llvm::Value *lhs, llvm::Value *rhs) { +void doCmpVV(NativeInstPtr ip, llvm::BasicBlock *b, llvm::Value *lhs, llvm::Value *rhs) { llvm::Value *subRes = llvm::BinaryOperator::Create(Instruction::Sub, lhs, rhs, "", b); diff --git a/mc-sema/cfgToLLVM/x86Instrs_Exchanges.cpp b/mc-sema/cfgToLLVM/x86Instrs_Exchanges.cpp index 680fdbf7d..e8effa6e6 100644 --- a/mc-sema/cfgToLLVM/x86Instrs_Exchanges.cpp +++ b/mc-sema/cfgToLLVM/x86Instrs_Exchanges.cpp @@ -37,7 +37,7 @@ #define NASSERT(cond) TASSERT(cond, "") template -static InstTransResult doCmpxchgRR(InstPtr ip, BasicBlock *&b, +static InstTransResult doCmpxchgRR(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dstReg, const MCOperand &srcReg) { NASSERT(dstReg.isReg()); @@ -101,7 +101,7 @@ static InstTransResult doCmpxchgRR(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doCmpxchgRM(InstPtr ip, BasicBlock *&b, Value *dstAddr, +static InstTransResult doCmpxchgRM(NativeInstPtr ip, BasicBlock *&b, Value *dstAddr, const MCOperand &srcReg) { NASSERT(dstAddr != NULL); NASSERT(srcReg.isReg()); @@ -180,7 +180,7 @@ static InstTransResult doCmpxchgRM(InstPtr ip, BasicBlock *&b, Value *dstAddr, } template -static InstTransResult doXaddRM(InstPtr ip, BasicBlock *&b, +static InstTransResult doXaddRM(NativeInstPtr ip, BasicBlock *&b, const MCOperand &srcReg, Value *dstAddr) { NASSERT(srcReg.isReg()); NASSERT(dstAddr != NULL); @@ -211,7 +211,7 @@ static InstTransResult doXaddRM(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doXaddRR(InstPtr ip, BasicBlock *&b, +static InstTransResult doXaddRR(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dstReg, const MCOperand &srcReg) { NASSERT(dstReg.isReg()); @@ -243,7 +243,7 @@ static InstTransResult doXaddRR(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doXchgRR(InstPtr ip, BasicBlock *&b, const MCOperand &o1, +static InstTransResult doXchgRR(NativeInstPtr ip, BasicBlock *&b, const MCOperand &o1, const MCOperand &o2) { NASSERT(o1.isReg()); NASSERT(o2.isReg()); @@ -258,7 +258,7 @@ static InstTransResult doXchgRR(InstPtr ip, BasicBlock *&b, const MCOperand &o1, } template -static InstTransResult doXchgRM(InstPtr ip, BasicBlock *&b, const MCOperand &r, +static InstTransResult doXchgRM(NativeInstPtr ip, BasicBlock *&b, const MCOperand &r, Value *mem) { NASSERT(mem != NULL); NASSERT(r.isReg()); diff --git a/mc-sema/cfgToLLVM/x86Instrs_INCDECNEG.cpp b/mc-sema/cfgToLLVM/x86Instrs_INCDECNEG.cpp index 0c6e0e89d..efeff33a5 100644 --- a/mc-sema/cfgToLLVM/x86Instrs_INCDECNEG.cpp +++ b/mc-sema/cfgToLLVM/x86Instrs_INCDECNEG.cpp @@ -39,7 +39,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. using namespace llvm; template -static Value *doNegV(InstPtr ip, BasicBlock *&b, Value *v) { +static Value *doNegV(NativeInstPtr ip, BasicBlock *&b, Value *v) { //compare dest to 0 Value *cmpRes = new ICmpInst(*b, CmpInst::ICMP_NE, v, CONST_V(b, 0)); @@ -57,7 +57,7 @@ static Value *doNegV(InstPtr ip, BasicBlock *&b, Value *v) { } template -static InstTransResult doNegM(InstPtr ip, BasicBlock *&b, Value *v) { +static InstTransResult doNegM(NativeInstPtr ip, BasicBlock *&b, Value *v) { NASSERT(v != NULL); Value *fromMem = M_READ(ip, b, v); @@ -68,7 +68,7 @@ static InstTransResult doNegM(InstPtr ip, BasicBlock *&b, Value *v) { } template -static InstTransResult doNegR(InstPtr ip, BasicBlock *&b, +static InstTransResult doNegR(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst) { NASSERT(dst.isReg()); @@ -98,7 +98,7 @@ static InstTransResult doNegR(InstPtr ip, BasicBlock *&b, } template -static Value *doIncV(InstPtr ip, BasicBlock *&b, Value *val) { +static Value *doIncV(NativeInstPtr ip, BasicBlock *&b, Value *val) { //add by 1 Value *result = BinaryOperator::CreateAdd(val, CONST_V(b, 1), "", b); @@ -114,7 +114,7 @@ static Value *doIncV(InstPtr ip, BasicBlock *&b, Value *val) { } template -static InstTransResult doIncM(InstPtr ip, BasicBlock *&b, +static InstTransResult doIncM(NativeInstPtr ip, BasicBlock *&b, Value *addr) { NASSERT(addr != NULL); @@ -129,7 +129,7 @@ static InstTransResult doIncM(InstPtr ip, BasicBlock *&b, } template -static Value *doDecV(InstPtr ip, BasicBlock *&b, Value *val) { +static Value *doDecV(NativeInstPtr ip, BasicBlock *&b, Value *val) { Value *result = BinaryOperator::CreateSub(val, CONST_V(b, 1), "", b); @@ -144,7 +144,7 @@ static Value *doDecV(InstPtr ip, BasicBlock *&b, Value *val) { } template -static InstTransResult doDecR(InstPtr ip, BasicBlock *&b, +static InstTransResult doDecR(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst) { NASSERT(dst.isReg()); @@ -168,7 +168,7 @@ static InstTransResult doDecR(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doDecM(InstPtr ip, BasicBlock *&b, Value *m) { +static InstTransResult doDecM(NativeInstPtr ip, BasicBlock *&b, Value *m) { NASSERT(m != NULL); Value *from_mem = M_READ(ip, b, m); @@ -230,7 +230,7 @@ GENERIC_TRANSLATION_REF(INC64m, doIncM<64>(ip, block, MEM_REFERENCE(0))) template -static InstTransResult doIncR(InstPtr ip, BasicBlock *&b, +static InstTransResult doIncR(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst) { NASSERT(dst.isReg()); diff --git a/mc-sema/cfgToLLVM/x86Instrs_Jcc.cpp b/mc-sema/cfgToLLVM/x86Instrs_Jcc.cpp index 066b4cef7..07c826f8a 100644 --- a/mc-sema/cfgToLLVM/x86Instrs_Jcc.cpp +++ b/mc-sema/cfgToLLVM/x86Instrs_Jcc.cpp @@ -1,31 +1,31 @@ /* -Copyright (c) 2014, Trail of Bits -All rights reserved. + Copyright (c) 2014, Trail of Bits + All rights reserved. -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: + Redistribution and use in source and binary forms, with or without modification, + are permitted provided that the following conditions are met: - Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. + Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. - Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. + Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or + other materials provided with the distribution. - Neither the name of Trail of Bits nor the names of its - contributors may be used to endorse or promote products derived from - this software without specific prior written permission. + Neither the name of Trail of Bits nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ #include "InstructionDispatch.h" #include "toLLVM.h" #include "X86.h" @@ -38,228 +38,223 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #define NASSERT(cond) TASSERT(cond, "") -using namespace llvm; - -static Value *CMP(BasicBlock *&b, Value *x, Value *y) { - return new ICmpInst(*b, CmpInst::ICMP_EQ, x, y); +static llvm::Value *CMP(llvm::BasicBlock *&b, llvm::Value *x, llvm::Value *y) { + return new llvm::ICmpInst( *b, llvm::CmpInst::ICMP_EQ, x, y); } -static Value *AND(BasicBlock *&b, Value *x, Value *y) { - return BinaryOperator::Create(Instruction::And, x, y, "", b); +static llvm::Value *AND(llvm::BasicBlock *&b, llvm::Value *x, llvm::Value *y) { + return llvm::BinaryOperator::Create(llvm::Instruction::And, x, y, "", b); } -static Value *OR(BasicBlock *&b, Value *x, Value *y) { - return BinaryOperator::Create(Instruction::Or, x, y, "", b); +static llvm::Value *OR(llvm::BasicBlock *&b, llvm::Value *x, llvm::Value *y) { + return llvm::BinaryOperator::Create(llvm::Instruction::Or, x, y, "", b); } //emit the LLVM statements that perform the test associated with each //type of conditional jump -Value *emitTestCode(BasicBlock *&b, unsigned opCode) { - Value *emittedInsn = NULL; - #define ONE CONST_V<1>(b, 1) - #define ZERO CONST_V<1>(b, 0) - #define OF_F F_READ(b, OF) - #define CF_F F_READ(b, CF) - #define PF_F F_READ(b, PF) - #define AF_F F_READ(b, AF) - #define ZF_F F_READ(b, ZF) - #define SF_F F_READ(b, SF) +Value *emitTestCode(llvm::BasicBlock *&b, unsigned opCode) { + llvm::Value *emittedInsn = nullptr; +#define ONE CONST_V<1>(b, 1) +#define ZERO CONST_V<1>(b, 0) +#define OF_F F_READ(b, OF) +#define CF_F F_READ(b, CF) +#define PF_F F_READ(b, PF) +#define AF_F F_READ(b, AF) +#define ZF_F F_READ(b, ZF) +#define SF_F F_READ(b, SF) - switch(opCode) { - case X86::JO_4: - case X86::JO_1: - // OF == 1 - emittedInsn = CMP(b, OF_F, ONE); - break; + switch (opCode) { + case llvm::X86::JO_4: + case llvm::X86::JO_1: + // OF == 1 + emittedInsn = CMP(b, OF_F, ONE); + break; - case X86::JNO_4: - case X86::JNO_1: - // OF == 0 - emittedInsn = CMP(b, OF_F, ZERO); - break; + case llvm::X86::JNO_4: + case llvm::X86::JNO_1: + // OF == 0 + emittedInsn = CMP(b, OF_F, ZERO); + break; - case X86::JB_4: - case X86::JB_1: - // CF == 1 - emittedInsn = CMP(b, CF_F, ONE); - break; + case llvm::X86::JB_4: + case llvm::X86::JB_1: + // CF == 1 + emittedInsn = CMP(b, CF_F, ONE); + break; - case X86::JAE_4: - case X86::JAE_1: - // CF == 0 - emittedInsn = CMP(b, CF_F, ZERO); - break; + case llvm::X86::JAE_4: + case llvm::X86::JAE_1: + // CF == 0 + emittedInsn = CMP(b, CF_F, ZERO); + break; - case X86::JE_4: - case X86::JE_1: - //ZF == 1 - emittedInsn = CMP(b, ZF_F, ONE); - break; + case llvm::X86::JE_4: + case llvm::X86::JE_1: + //ZF == 1 + emittedInsn = CMP(b, ZF_F, ONE); + break; - case X86::JNE_4: - case X86::JNE_1: - //ZF == 0 - emittedInsn = CMP(b, ZF_F, ZERO); - break; + case llvm::X86::JNE_4: + case llvm::X86::JNE_1: + //ZF == 0 + emittedInsn = CMP(b, ZF_F, ZERO); + break; - case X86::JBE_4: - case X86::JBE_1: - //CF = 1 or ZF = 1 - emittedInsn = OR(b, CMP(b, CF_F, ONE), CMP(b, ZF_F, ONE)); - break; + case llvm::X86::JBE_4: + case llvm::X86::JBE_1: + //CF = 1 or ZF = 1 + emittedInsn = OR(b, CMP(b, CF_F, ONE), CMP(b, ZF_F, ONE)); + break; - case X86::JA_4: - case X86::JA_1: - //CF = 0 and ZF = 0 - emittedInsn = AND(b, CMP(b, CF_F, ZERO), CMP(b, ZF_F, ZERO)); - break; + case llvm::X86::JA_4: + case llvm::X86::JA_1: + //CF = 0 and ZF = 0 + emittedInsn = AND(b, CMP(b, CF_F, ZERO), CMP(b, ZF_F, ZERO)); + break; - case X86::JS_4: - case X86::JS_1: - //SF = 1 - emittedInsn = CMP(b, SF_F, ONE); - break; + case llvm::X86::JS_4: + case llvm::X86::JS_1: + //SF = 1 + emittedInsn = CMP(b, SF_F, ONE); + break; - case X86::JNS_4: - case X86::JNS_1: - //SF = 0 - emittedInsn = CMP(b, SF_F, ZERO); - break; + case llvm::X86::JNS_4: + case llvm::X86::JNS_1: + //SF = 0 + emittedInsn = CMP(b, SF_F, ZERO); + break; - case X86::JP_4: - case X86::JP_1: - //PF = 1 - emittedInsn = CMP(b, PF_F, ONE); - break; + case llvm::X86::JP_4: + case llvm::X86::JP_1: + //PF = 1 + emittedInsn = CMP(b, PF_F, ONE); + break; - case X86::JNP_4: - case X86::JNP_1: - //PF = 0 - emittedInsn = CMP(b, PF_F, ZERO); - break; + case llvm::X86::JNP_4: + case llvm::X86::JNP_1: + //PF = 0 + emittedInsn = CMP(b, PF_F, ZERO); + break; - case X86::JL_4: - case X86::JL_1: - //SF!=OF - emittedInsn = CMP(b, CMP(b, SF_F, OF_F), ZERO); - break; + case llvm::X86::JL_4: + case llvm::X86::JL_1: + //SF!=OF + emittedInsn = CMP(b, CMP(b, SF_F, OF_F), ZERO); + break; - case X86::JGE_4: - case X86::JGE_1: - //SF=OF - emittedInsn = CMP(b, SF_F, OF_F); - break; + case llvm::X86::JGE_4: + case llvm::X86::JGE_1: + //SF=OF + emittedInsn = CMP(b, SF_F, OF_F); + break; - case X86::JLE_4: - case X86::JLE_1: - //ZF=1 or SF != OF - emittedInsn = OR(b, CMP(b, ZF_F, ONE), CMP(b, CMP(b, SF_F, OF_F), ZERO)); - break; + case llvm::X86::JLE_4: + case llvm::X86::JLE_1: + //ZF=1 or SF != OF + emittedInsn = OR(b, CMP(b, ZF_F, ONE), CMP(b, CMP(b, SF_F, OF_F), ZERO)); + break; - case X86::JG_4: - case X86::JG_1: - //ZF=0 and SF=OF - emittedInsn = AND(b, CMP(b, ZF_F, ZERO), CMP(b, SF_F, OF_F)); - break; + case llvm::X86::JG_4: + case llvm::X86::JG_1: + //ZF=0 and SF=OF + emittedInsn = AND(b, CMP(b, ZF_F, ZERO), CMP(b, SF_F, OF_F)); + break; - case X86::JCXZ: - emittedInsn = CMP(b, R_READ<16>(b, X86::CX), CONST_V<16>(b, 0)); - break; + case llvm::X86::JCXZ: + emittedInsn = CMP(b, R_READ<16>(b, X86::CX), CONST_V<16>(b, 0)); + break; - case X86::JECXZ_32: - emittedInsn = CMP(b, R_READ<32>(b, X86::ECX), CONST_V<32>(b, 0)); - break; + case llvm::X86::JECXZ_32: + emittedInsn = CMP(b, R_READ<32>(b, X86::ECX), CONST_V<32>(b, 0)); + break; - default: - //case X86::JRCXZ: - throw TErr(__LINE__, __FILE__, "NIY"); - break; + default: + //case llvm::X86::JRCXZ: + throw TErr(__LINE__, __FILE__, "NIY"); + break; } - #undef ONE - #undef ZERO - #undef OF_F - #undef CF_F - #undef PF_F - #undef AF_F - #undef ZF_F - #undef SF_F +#undef ONE +#undef ZERO +#undef OF_F +#undef CF_F +#undef PF_F +#undef AF_F +#undef ZF_F +#undef SF_F - NASSERT(emittedInsn != NULL ); + NASSERT(emittedInsn != nullptr); - return emittedInsn; + return emittedInsn; } //emit a conditional branch -static InstTransResult doCondBranch(InstPtr ip, BasicBlock *&b, - BasicBlock *ifTrue, - BasicBlock *ifFalse, - Value *cond) -{ - //we should have targets for this branch - NASSERT( ifTrue != NULL ); - NASSERT( ifFalse != NULL ); - NASSERT( cond != NULL ); +static InstTransResult doCondBranch(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::BasicBlock *ifTrue, + llvm::BasicBlock *ifFalse, + llvm::Value *cond) { + //we should have targets for this branch + NASSERT(ifTrue != nullptr); + NASSERT(ifFalse != nullptr); + NASSERT(cond != nullptr); - //emit a branch on the condition - BranchInst::Create(ifTrue, ifFalse, cond, b); + //emit a branch on the condition + llvm::BranchInst::Create(ifTrue, ifFalse, cond, b); - return EndBlock; + return EndBlock; } -static InstTransResult translate_Jcc(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) { +static InstTransResult translate_Jcc(TranslationContext &ctx, + llvm::BasicBlock *&block) { - Function *F = block->getParent(); - // llvm::dbgs() << __FUNCTION__ << "\tRepresentation: " << ip->printInst() << "\n"; + auto F = block->getParent(); + auto ip = ctx.natI; + auto &inst = ip->get_inst(); - std::string trueStrName = "block_0x"+to_string(ip->get_tr(), std::hex); - std::string falseStrName = "block_0x"+to_string(ip->get_fa(), std::hex); + auto ifTrue = ctx.va_to_bb[ip->get_tr()]; + auto ifFalse = ctx.va_to_bb[ip->get_fa()]; - BasicBlock *ifTrue = bbFromStrName(trueStrName, F); - BasicBlock *ifFalse = bbFromStrName(falseStrName, F); - - return doCondBranch(ip, block, ifTrue, - ifFalse, - emitTestCode(block, inst.getOpcode() ) ); + return doCondBranch(ip, block, ifTrue, ifFalse, + emitTestCode(block, inst.getOpcode())); } void Jcc_populateDispatchMap(DispatchMap &m) { - //for conditional instructions, get the "true" and "false" targets - //this will also look up the target for nonconditional jumps + //for conditional instructions, get the "true" and "false" targets + //this will also look up the target for nonconditional jumps - m[X86::JBE_4] = translate_Jcc; - m[X86::JBE_1] = translate_Jcc; - m[X86::JA_4] = translate_Jcc; - m[X86::JA_1] = translate_Jcc; - m[X86::JS_4] = translate_Jcc; - m[X86::JS_1] = translate_Jcc; - m[X86::JNS_4] = translate_Jcc; - m[X86::JNS_1] = translate_Jcc; - m[X86::JP_4] = translate_Jcc; - m[X86::JP_1] = translate_Jcc; - m[X86::JNP_4] = translate_Jcc; - m[X86::JNP_1] = translate_Jcc; - m[X86::JL_4] = translate_Jcc; - m[X86::JL_1] = translate_Jcc; - m[X86::JGE_4] = translate_Jcc; - m[X86::JGE_1] = translate_Jcc; - m[X86::JG_4] = translate_Jcc; - m[X86::JG_1] = translate_Jcc; - m[X86::JCXZ] = translate_Jcc; - m[X86::JRCXZ] = translate_Jcc; - m[X86::JO_4] = translate_Jcc; - m[X86::JO_1] = translate_Jcc; - m[X86::JNO_4] = translate_Jcc; - m[X86::JNO_1] = translate_Jcc; - m[X86::JB_4] = translate_Jcc; - m[X86::JB_1] = translate_Jcc; - m[X86::JAE_4] = translate_Jcc; - m[X86::JAE_1] = translate_Jcc; - m[X86::JLE_4] = translate_Jcc; - m[X86::JLE_1] = translate_Jcc; - m[X86::JNE_4] = translate_Jcc; - m[X86::JNE_1] = translate_Jcc; - m[X86::JE_4] = translate_Jcc; - m[X86::JE_1] = translate_Jcc; + m[X86::JBE_4] = translate_Jcc; + m[X86::JBE_1] = translate_Jcc; + m[X86::JA_4] = translate_Jcc; + m[X86::JA_1] = translate_Jcc; + m[X86::JS_4] = translate_Jcc; + m[X86::JS_1] = translate_Jcc; + m[X86::JNS_4] = translate_Jcc; + m[X86::JNS_1] = translate_Jcc; + m[X86::JP_4] = translate_Jcc; + m[X86::JP_1] = translate_Jcc; + m[X86::JNP_4] = translate_Jcc; + m[X86::JNP_1] = translate_Jcc; + m[X86::JL_4] = translate_Jcc; + m[X86::JL_1] = translate_Jcc; + m[X86::JGE_4] = translate_Jcc; + m[X86::JGE_1] = translate_Jcc; + m[X86::JG_4] = translate_Jcc; + m[X86::JG_1] = translate_Jcc; + m[X86::JCXZ] = translate_Jcc; + m[X86::JRCXZ] = translate_Jcc; + m[X86::JO_4] = translate_Jcc; + m[X86::JO_1] = translate_Jcc; + m[X86::JNO_4] = translate_Jcc; + m[X86::JNO_1] = translate_Jcc; + m[X86::JB_4] = translate_Jcc; + m[X86::JB_1] = translate_Jcc; + m[X86::JAE_4] = translate_Jcc; + m[X86::JAE_1] = translate_Jcc; + m[X86::JLE_4] = translate_Jcc; + m[X86::JLE_1] = translate_Jcc; + m[X86::JNE_4] = translate_Jcc; + m[X86::JNE_1] = translate_Jcc; + m[X86::JE_4] = translate_Jcc; + m[X86::JE_1] = translate_Jcc; } diff --git a/mc-sema/cfgToLLVM/x86Instrs_MOV.cpp b/mc-sema/cfgToLLVM/x86Instrs_MOV.cpp index dd589f4f0..e8edf4c37 100644 --- a/mc-sema/cfgToLLVM/x86Instrs_MOV.cpp +++ b/mc-sema/cfgToLLVM/x86Instrs_MOV.cpp @@ -1,31 +1,32 @@ /* -Copyright (c) 2014, Trail of Bits -All rights reserved. + Copyright (c) 2014, Trail of Bits + All rights reserved. -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: + Redistribution and use in source and binary forms, with or without modification, + are permitted provided that the following conditions are met: - Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. + Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. - Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. + Redistributions in binary form must reproduce the above copyright notice, this + list of conditions and the following disclaimer in the documentation and/or + other materials provided with the distribution. - Neither the name of Trail of Bits nor the names of its - contributors may be used to endorse or promote products derived from - this software without specific prior written permission. + Neither the name of Trail of Bits nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ #include "InstructionDispatch.h" #include "toLLVM.h" #include "X86.h" @@ -41,262 +42,219 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. using namespace llvm; -template +template static Value* getSegmentValue(BasicBlock *&b, unsigned sreg) { - Value *val = NULL; + Value *val = NULL; - switch(sreg) - { - case X86::SS: - val = CONST_V(b, 0x23); - break; - case X86::CS: - val = CONST_V(b, 0x1B); - break; - case X86::DS: - val = CONST_V(b, 0x23); - break; - case X86::ES: - val = CONST_V(b, 0x23); - break; - case X86::FS: - val = CONST_V(b, 0x3B); - break; - case X86::GS: - val = CONST_V(b, 0x00); - break; - default: - throw TErr(__LINE__, __FILE__, "Unknown Segment Register"); - break; - } + switch (sreg) { + case X86::SS: + val = CONST_V(b, 0x23); + break; + case X86::CS: + val = CONST_V(b, 0x1B); + break; + case X86::DS: + val = CONST_V(b, 0x23); + break; + case X86::ES: + val = CONST_V(b, 0x23); + break; + case X86::FS: + val = CONST_V(b, 0x3B); + break; + case X86::GS: + val = CONST_V(b, 0x00); + break; + default: + throw TErr(__LINE__, __FILE__, "Unknown Segment Register"); + break; + } - return val; + return val; } -template -static InstTransResult doMSMov(InstPtr ip, BasicBlock *&b, - Value *dstAddr, - const MCOperand &src) -{ - NASSERT(dstAddr != NULL); - NASSERT(src.isReg()); +template +static InstTransResult doMSMov(NativeInstPtr ip, BasicBlock *&b, Value *dstAddr, + const MCOperand &src) { + NASSERT(dstAddr != NULL); + NASSERT(src.isReg()); - Value *seg_val = getSegmentValue(b, src.getReg()); + Value *seg_val = getSegmentValue(b, src.getReg()); - M_WRITE(ip, b, dstAddr, seg_val); + M_WRITE(ip, b, dstAddr, seg_val); - return ContinueBlock; + return ContinueBlock; } -template -static InstTransResult doSMMov(InstPtr ip, BasicBlock *&b, - Value *dstAddr, - const MCOperand &src) -{ - NASSERT(dstAddr != NULL); - NASSERT(src.isReg()); +template +static InstTransResult doSMMov(NativeInstPtr ip, BasicBlock *&b, Value *dstAddr, + const MCOperand &src) { + NASSERT(dstAddr != NULL); + NASSERT(src.isReg()); - Value *seg_val = getSegmentValue(b, src.getReg()); + Value *seg_val = getSegmentValue(b, src.getReg()); - M_WRITE(ip, b, dstAddr, seg_val); + M_WRITE(ip, b, dstAddr, seg_val); - return ContinueBlock; + return ContinueBlock; } -template -static InstTransResult doRSMov(InstPtr ip, BasicBlock *&b, - const MCOperand &dst, - const MCOperand &src) -{ - NASSERT(dst.isReg()); - NASSERT(src.isReg()); +template +static InstTransResult doRSMov(NativeInstPtr ip, BasicBlock *&b, + const MCOperand &dst, const MCOperand &src) { + NASSERT(dst.isReg()); + NASSERT(src.isReg()); - Value *seg_val = getSegmentValue(b, src.getReg()); + Value *seg_val = getSegmentValue(b, src.getReg()); - R_WRITE(b, dst.getReg(), seg_val); + R_WRITE(b, dst.getReg(), seg_val); - return ContinueBlock; + return ContinueBlock; } -template -static Value *doMovSXV(InstPtr ip, BasicBlock * b, Value *src) { - // do an SX - return new SExtInst(src, Type::getIntNTy(b->getContext(), dstWidth), "", b); +template +static Value *doMovSXV(NativeInstPtr ip, BasicBlock * b, Value *src) { + // do an SX + return new SExtInst(src, Type::getIntNTy(b->getContext(), dstWidth), "", b); } -template -static InstTransResult doRIMovV(InstPtr ip, - BasicBlock *&b, - Value *src, - const MCOperand &dst) -{ - //MOV , - NASSERT(src != NULL); - NASSERT(dst.isReg()); +template +static InstTransResult doRIMovV(NativeInstPtr ip, BasicBlock *&b, Value *src, + const MCOperand &dst) { + //MOV , + NASSERT(src != NULL); + NASSERT(dst.isReg()); - //write the constant into the supplied register - R_WRITE(b, dst.getReg(), src); + //write the constant into the supplied register + R_WRITE(b, dst.getReg(), src); - return ContinueBlock; + return ContinueBlock; } -template -static InstTransResult doRIMov(InstPtr ip, BasicBlock *&b, - const MCOperand &src, - const MCOperand &dst) -{ - //MOV , - NASSERT(src.isImm()); - NASSERT(dst.isReg()); +template +static InstTransResult doRIMov(NativeInstPtr ip, BasicBlock *&b, + const MCOperand &src, const MCOperand &dst) { + //MOV , + NASSERT(src.isImm()); + NASSERT(dst.isReg()); - //write the constant into the supplied register - R_WRITE(b, dst.getReg(), CONST_V(b, src.getImm())); + //write the constant into the supplied register + R_WRITE(b, dst.getReg(), CONST_V(b, src.getImm())); - return ContinueBlock; + return ContinueBlock; } -template -static InstTransResult doMIMovV(InstPtr ip, BasicBlock *&b, - Value *dstAddr, - Value *src) -{ - //MOV , - //store the constant in src into dstAddr +template +static InstTransResult doMIMovV(NativeInstPtr ip, BasicBlock *&b, + Value *dstAddr, Value *src) { + //MOV , + //store the constant in src into dstAddr - M_WRITE(ip, b, dstAddr, src); + M_WRITE(ip, b, dstAddr, src); - return ContinueBlock; + return ContinueBlock; } -template -static InstTransResult doMIMov(InstPtr ip, BasicBlock *&b, - Value *dstAddr, - const MCOperand &src) -{ - //MOV , - //store the constant in src into dstAddr - NASSERT(dstAddr != NULL); - NASSERT(src.isImm()); +template +static InstTransResult doMIMov(NativeInstPtr ip, BasicBlock *&b, Value *dstAddr, + const MCOperand &src) { + //MOV , + //store the constant in src into dstAddr + NASSERT(dstAddr != NULL); + NASSERT(src.isImm()); - return doMIMovV(ip, b, dstAddr, CONST_V(b, src.getImm())); -} - -template -static InstTransResult doMIMov(InstPtr ip, BasicBlock *&b, - Value *dstAddr, - const MCOperand &src) -{ - //MOV , - //store the constant in src into dstAddr - NASSERT(dstAddr != NULL); - NASSERT(src.isImm()); - INSTR_DEBUG(ip); - return doMIMovV(ip, b, dstAddr, CONST_V(b, src.getImm())); -} - -template -static InstTransResult doMovZXRR(InstPtr ip, BasicBlock *&b, - const MCOperand &dst, - const MCOperand &src) -{ - NASSERT(dst.isReg()); - NASSERT(src.isReg()); - TASSERT(dstWidth > srcWidth, "Must ZExt to a greater bitwidth") - - //do a read from src of the appropriate width - Value *fromSrc = R_READ(b, src.getReg()); - - //extend - Type *toT = Type::getIntNTy(b->getContext(), dstWidth); - Value *xt = new ZExtInst(fromSrc, toT, "", b); - - //write into dst - R_WRITE(b, dst.getReg(), xt); - - return ContinueBlock; -} - -template -static InstTransResult doMovZXRM(InstPtr ip, BasicBlock *&b, - const MCOperand &dst, - Value *src) -{ - NASSERT(dst.isReg()); - NASSERT(src != NULL); - - if( dstWidth == 32 && - srcWidth == 8 && - ip->has_jump_index_table()) - { - doJumpIndexTableViaSwitch(b, ip); - return ContinueBlock; - } - - TASSERT(dstWidth > srcWidth, "Must ZExt to a greater bitwidth") - //do a read from src of the appropriate width - Value *fromSrc = M_READ(ip, b, src); - - //extend - Type *toT = Type::getIntNTy(b->getContext(), dstWidth); - Value *xt = new ZExtInst(fromSrc, toT, "", b); - - //write into dst - R_WRITE(b, dst.getReg(), xt); - - return ContinueBlock; + return doMIMovV(ip, b, dstAddr, CONST_V(b, src.getImm())); } template -static InstTransResult doMovSXRR(InstPtr ip, BasicBlock *&b, - const MCOperand &dst, - const MCOperand &src) -{ - NASSERT(dst.isReg()); - NASSERT(src.isReg()); - - Value *regOp; - - regOp = R_READ(b, src.getReg()); - - Value *r = doMovSXV(ip, b, regOp); - - R_WRITE(b, dst.getReg(), r); - - return ContinueBlock; +static InstTransResult doMIMov(NativeInstPtr ip, BasicBlock *&b, Value *dstAddr, + const MCOperand &src) { + //MOV , + //store the constant in src into dstAddr + NASSERT(dstAddr != NULL); + NASSERT(src.isImm()); + return doMIMovV(ip, b, dstAddr, CONST_V(b, src.getImm())); } -template -static InstTransResult doMovSXRM(InstPtr ip, BasicBlock *&b, - const MCOperand &dst, - Value *src) -{ - NASSERT(dst.isReg()); - NASSERT(src != NULL); +template +static InstTransResult doMovZXRR(NativeInstPtr ip, BasicBlock *&b, + const MCOperand &dst, const MCOperand &src) { + NASSERT(dst.isReg()); + NASSERT(src.isReg()); + TASSERT(dstWidth > srcWidth, "Must ZExt to a greater bitwidth") - Value *r = doMovSXV(ip, b, M_READ(ip, b, src)); + //do a read from src of the appropriate width + Value *fromSrc = R_READ(b, src.getReg()); - R_WRITE(b, dst.getReg(), r); + //extend + Type *toT = Type::getIntNTy(b->getContext(), dstWidth); + Value *xt = new ZExtInst(fromSrc, toT, "", b); - return ContinueBlock; + //write into dst + R_WRITE(b, dst.getReg(), xt); + + return ContinueBlock; } -template -static InstTransResult doMovSMR(InstPtr ip, BasicBlock *&b, - Value *memAddr, - const MCOperand &dest) -{ - NASSERT(dest.isReg()); - NASSERT(memAddr != NULL); +template +static InstTransResult doMovZXRM(NativeInstPtr ip, BasicBlock *&b, + const MCOperand &dst, Value *src) { + NASSERT(dst.isReg()); + NASSERT(src != NULL); - throw TErr(__LINE__, __FILE__, "NIY"); + if (dstWidth == 32 && srcWidth == 8 && ip->has_jump_index_table()) { + doJumpIndexTableViaSwitch(b, ip); + return ContinueBlock; + } - return ContinueBlock; + TASSERT(dstWidth > srcWidth, "Must ZExt to a greater bitwidth") + //do a read from src of the appropriate width + Value *fromSrc = M_READ(ip, b, src); + + //extend + Type *toT = Type::getIntNTy(b->getContext(), dstWidth); + Value *xt = new ZExtInst(fromSrc, toT, "", b); + + //write into dst + R_WRITE(b, dst.getReg(), xt); + + return ContinueBlock; } -GENERIC_TRANSLATION(MOV8rr, doRRMov<8>(ip, block, OP(0), OP(1)) ) -GENERIC_TRANSLATION(MOV8rr_REV, doRRMov<8>(ip, block, OP(0), OP(1)) ) +template +static InstTransResult doMovSXRR(NativeInstPtr ip, BasicBlock *&b, + const MCOperand &dst, const MCOperand &src) { + NASSERT(dst.isReg()); + NASSERT(src.isReg()); + + Value *regOp; + + regOp = R_READ(b, src.getReg()); + + Value *r = doMovSXV(ip, b, regOp); + + R_WRITE(b, dst.getReg(), r); + + return ContinueBlock; +} + +template +static InstTransResult doMovSXRM(NativeInstPtr ip, BasicBlock *&block, + const MCOperand &dst, Value *src) { + NASSERT(dst.isReg()); + NASSERT(src != NULL); + + Value *r = doMovSXV(ip, block, M_READ(ip, block, src)); + + R_WRITE(block, dst.getReg(), r); + + return ContinueBlock; +} + +GENERIC_TRANSLATION(MOV8rr, doRRMov<8>(ip, block, OP(0), OP(1))) +GENERIC_TRANSLATION(MOV8rr_REV, doRRMov<8>(ip, block, OP(0), OP(1))) GENERIC_TRANSLATION(MOV16rr, doRRMov<16>(ip, block, OP(0), OP(1))) GENERIC_TRANSLATION(MOV16rr_REV, doRRMov<16>(ip, block, OP(0), OP(1))) GENERIC_TRANSLATION(MOV32rr, doRRMov<32>(ip, block, OP(0), OP(1))) @@ -311,13 +269,11 @@ GENERIC_TRANSLATION(MOVPQIto64rr, doRRMovD<64>(ip, block, OP(0), OP(1))) GENERIC_TRANSLATION(MOV8ri, doRIMov<8>(ip, block, OP(1), OP(0))) GENERIC_TRANSLATION(MOV16ri, doRIMov<16>(ip, block, OP(1), OP(0))) -GENERIC_TRANSLATION_REF(MOV8mi, - doMIMov<8>(ip, block, ADDR_NOREF(0), OP(5)), - doMIMov<8>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION_REF(MOV8mi, doMIMov<8>(ip, block, ADDR_NOREF(0), OP(5)), + doMIMov<8>(ip, block, MEM_REFERENCE(0), OP(5))) -GENERIC_TRANSLATION_REF(MOV16mi, - doMIMov<16>(ip, block, ADDR_NOREF(0), OP(5)), - doMIMov<16>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION_REF(MOV16mi, doMIMov<16>(ip, block, ADDR_NOREF(0), OP(5)), + doMIMov<16>(ip, block, MEM_REFERENCE(0), OP(5))) //GENERIC_TRANSLATION_32MI(MOV32mi, // doMIMov<32>(ip, block, ADDR_NOREF(0), OP(5)), @@ -325,245 +281,249 @@ GENERIC_TRANSLATION_REF(MOV16mi, // doMIMovV<32>(ip, block, ADDR_NOREF(0), IMM_AS_DATA_REF(block, natM, ip)) // ) // -static InstTransResult translate_MOV32mi(NativeModulePtr natM, BasicBlock *&block, InstPtr ip, MCInst &inst) { - InstTransResult ret; - - Function *F = block->getParent(); - Module *M = F->getParent(); +static InstTransResult translate_MOV32mi(TranslationContext &ctx, + BasicBlock *&block) { + InstTransResult ret; + auto F = block->getParent(); + auto M = F->getParent(); + auto ip = ctx.natI; + auto natM = ctx.natM; + auto &inst = ip->get_inst(); - if( ip->has_code_ref() ) { - Value *addrInt = IMM_AS_DATA_REF(block, natM, ip); - if( ip->has_mem_reference) { - ret = doMIMovV<32>(ip, block, MEM_REFERENCE(0), addrInt); - } else { - ret = doMIMovV<32>(ip, block, ADDR_NOREF(0), addrInt); - } - } - else - { - if( ip->has_mem_reference && ip->has_imm_reference) { - Value *data_v = nullptr; - if(shouldSubtractImageBase(M)) { - // if we're here, then - // * archGetImageBase is defined - // * we are on win64 - - data_v = IMM_AS_DATA_REF(block, natM, ip); - data_v = doSubtractImageBase<32>(data_v, block); - } else { - data_v = IMM_AS_DATA_REF(block, natM, ip); - } - doMIMovV<32>(ip, block, MEM_REFERENCE(0), data_v); - } else if (ip->has_mem_reference) { - doMIMov<32>(ip, block, MEM_REFERENCE(0), OP(5)); - } else if (ip->has_imm_reference) { - Value *data_v = nullptr; - if(shouldSubtractImageBase(M)) { - // if we're here, then - // * archGetImageBase is defined - // * we are on win64 - - data_v = IMM_AS_DATA_REF(block, natM, ip); - data_v = doSubtractImageBase<32>(data_v, block); - } else { - data_v = IMM_AS_DATA_REF(block, natM, ip); - } - - doMIMovV<32>(ip, block, ADDR_NOREF(0), data_v); - } else { - // no references - doMIMov<32>(ip, block, ADDR_NOREF(0), OP(5)); - } - } - ret = ContinueBlock; - return ret; -} - -static InstTransResult translate_MOV64mi32(NativeModulePtr natM, BasicBlock *&block, InstPtr ip, MCInst &inst) { - InstTransResult ret; - Function *F = block->getParent(); - Module *M = F->getParent(); - - if( ip->has_code_ref() ) { - Value *addrInt = IMM_AS_DATA_REF(block, natM, ip); - if (ip->has_mem_reference) { - ret = doMIMovV<64>(ip, block, MEM_REFERENCE(0), addrInt); - } else { - ret = doMIMovV<64>(ip, block, ADDR_NOREF(0), addrInt); - } + if (ip->has_code_ref()) { + Value *addrInt = IMM_AS_DATA_REF(block, natM, ip); + if (ip->has_mem_reference) { + ret = doMIMovV<32>(ip, block, MEM_REFERENCE(0), addrInt); } else { - if(ip->has_mem_reference && ip->has_imm_reference) { - Value *data_v = IMM_AS_DATA_REF(block, natM, ip); - if(shouldSubtractImageBase(M)) { - data_v = doSubtractImageBase<64>(data_v, block); - } - doMIMovV<64>(ip, block, MEM_REFERENCE(0), data_v); - - } else if (ip->has_imm_reference) { - Value *data_v = IMM_AS_DATA_REF(block, natM, ip); - if(shouldSubtractImageBase(M)) { - data_v = doSubtractImageBase<64>(data_v, block); - } - doMIMovV<64>(ip, block, ADDR_NOREF(0), data_v); - } else if (ip->has_mem_reference) { - doMIMov<64>(ip, block, MEM_REFERENCE(0), OP(5)); - } else { - ret = doMIMov<64>(ip, block, ADDR_NOREF(0), OP(5)); - } - + ret = doMIMovV<32>(ip, block, ADDR_NOREF(0), addrInt); } - ret = ContinueBlock; - return ret; + } else { + if (ip->has_mem_reference && ip->has_imm_reference) { + Value *data_v = nullptr; + if (shouldSubtractImageBase(M)) { + // if we're here, then + // * archGetImageBase is defined + // * we are on win64 + + data_v = IMM_AS_DATA_REF(block, natM, ip); + data_v = doSubtractImageBase<32>(data_v, block); + } else { + data_v = IMM_AS_DATA_REF(block, natM, ip); + } + doMIMovV<32>(ip, block, MEM_REFERENCE(0), data_v); + } else if (ip->has_mem_reference) { + doMIMov<32>(ip, block, MEM_REFERENCE(0), OP(5)); + } else if (ip->has_imm_reference) { + Value *data_v = nullptr; + if (shouldSubtractImageBase(M)) { + // if we're here, then + // * archGetImageBase is defined + // * we are on win64 + + data_v = IMM_AS_DATA_REF(block, natM, ip); + data_v = doSubtractImageBase<32>(data_v, block); + } else { + data_v = IMM_AS_DATA_REF(block, natM, ip); + } + + doMIMovV<32>(ip, block, ADDR_NOREF(0), data_v); + } else { + // no references + doMIMov<32>(ip, block, ADDR_NOREF(0), OP(5)); + } + } + ret = ContinueBlock; + return ret; } -GENERIC_TRANSLATION_REF(MOV8mr, - doMRMov<8>(ip, block, ADDR_NOREF(0), OP(5)), - doMRMov<8>(ip, block, MEM_REFERENCE(0), OP(5))) -GENERIC_TRANSLATION_REF(MOV16mr, - doMRMov<16>(ip, block, ADDR_NOREF(0), OP(5)), - doMRMov<16>(ip, block, MEM_REFERENCE(0), OP(5))) -GENERIC_TRANSLATION_REF(MOV8rm, - doRMMov<8>(ip, block, ADDR_NOREF(1), OP(0)), - doRMMov<8>(ip, block, MEM_REFERENCE(1), OP(0))) -GENERIC_TRANSLATION_REF(MOV16rm, - doRMMov<16>(ip, block, ADDR_NOREF(1), OP(0)), - doRMMov<16>(ip, block, MEM_REFERENCE(1), OP(0))) -GENERIC_TRANSLATION(MOVZX16rr8, (doMovZXRR<16,8>(ip, block, OP(0), OP(1))) ) -GENERIC_TRANSLATION(MOVZX32rr8, (doMovZXRR<32,8>(ip, block, OP(0), OP(1))) ) -GENERIC_TRANSLATION(MOVZX32rr16,( doMovZXRR<32,16>(ip, block, OP(0), OP(1))) ) +static InstTransResult translate_MOV64mi32(TranslationContext &ctx, + BasicBlock *&block) { + InstTransResult ret; + auto F = block->getParent(); + auto M = F->getParent(); + auto ip = ctx.natI; + auto natM = ctx.natM; + auto &inst = ip->get_inst(); + + if (ip->has_code_ref()) { + Value *addrInt = IMM_AS_DATA_REF(block, natM, ip); + if (ip->has_mem_reference) { + ret = doMIMovV<64>(ip, block, MEM_REFERENCE(0), addrInt); + } else { + ret = doMIMovV<64>(ip, block, ADDR_NOREF(0), addrInt); + } + } else { + if (ip->has_mem_reference && ip->has_imm_reference) { + Value *data_v = IMM_AS_DATA_REF(block, natM, ip); + if (shouldSubtractImageBase(M)) { + data_v = doSubtractImageBase<64>(data_v, block); + } + doMIMovV<64>(ip, block, MEM_REFERENCE(0), data_v); + + } else if (ip->has_imm_reference) { + Value *data_v = IMM_AS_DATA_REF(block, natM, ip); + if (shouldSubtractImageBase(M)) { + data_v = doSubtractImageBase<64>(data_v, block); + } + doMIMovV<64>(ip, block, ADDR_NOREF(0), data_v); + } else if (ip->has_mem_reference) { + doMIMov<64>(ip, block, MEM_REFERENCE(0), OP(5)); + } else { + ret = doMIMov<64>(ip, block, ADDR_NOREF(0), OP(5)); + } + + } + ret = ContinueBlock; + return ret; +} + +GENERIC_TRANSLATION_REF(MOV8mr, doMRMov<8>(ip, block, ADDR_NOREF(0), OP(5)), + doMRMov<8>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION_REF(MOV16mr, doMRMov<16>(ip, block, ADDR_NOREF(0), OP(5)), + doMRMov<16>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION_REF(MOV8rm, doRMMov<8>(ip, block, ADDR_NOREF(1), OP(0)), + doRMMov<8>(ip, block, MEM_REFERENCE(1), OP(0))) +GENERIC_TRANSLATION_REF(MOV16rm, doRMMov<16>(ip, block, ADDR_NOREF(1), OP(0)), + doRMMov<16>(ip, block, MEM_REFERENCE(1), OP(0))) +GENERIC_TRANSLATION(MOVZX16rr8, (doMovZXRR<16,8>(ip, block, OP(0), OP(1)))) +GENERIC_TRANSLATION(MOVZX32rr8, (doMovZXRR<32,8>(ip, block, OP(0), OP(1)))) +GENERIC_TRANSLATION(MOVZX32rr16, ( doMovZXRR<32,16>(ip, block, OP(0), OP(1)))) GENERIC_TRANSLATION(MOV16rs, doRSMov<16>(ip, block, OP(0), OP(1))) GENERIC_TRANSLATION(MOV32rs, doRSMov<32>(ip, block, OP(0), OP(1))) GENERIC_TRANSLATION(MOV64rs, doRSMov<64>(ip, block, OP(0), OP(1))) -GENERIC_TRANSLATION_REF(MOV64ms, - doMSMov<64>(ip, block, ADDR_NOREF(0), OP(5)), - doMSMov<64>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION_REF(MOV64ms, doMSMov<64>(ip, block, ADDR_NOREF(0), OP(5)), + doMSMov<64>(ip, block, MEM_REFERENCE(0), OP(5))) -GENERIC_TRANSLATION_REF(MOV64sm, - doSMMov<64>(ip, block, ADDR_NOREF(0), OP(5)), - doSMMov<64>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION_REF(MOV64sm, doSMMov<64>(ip, block, ADDR_NOREF(0), OP(5)), + doSMMov<64>(ip, block, MEM_REFERENCE(0), OP(5))) -GENERIC_TRANSLATION_REF(MOV32ms, - doMSMov<32>(ip, block, ADDR_NOREF(0), OP(5)), - doMSMov<32>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION_REF(MOV32ms, doMSMov<32>(ip, block, ADDR_NOREF(0), OP(5)), + doMSMov<32>(ip, block, MEM_REFERENCE(0), OP(5))) -GENERIC_TRANSLATION_REF(MOV16ms, - doMSMov<16>(ip, block, ADDR_NOREF(0), OP(5)), - doMSMov<16>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION_REF(MOV16ms, doMSMov<16>(ip, block, ADDR_NOREF(0), OP(5)), + doMSMov<16>(ip, block, MEM_REFERENCE(0), OP(5))) GENERIC_TRANSLATION_REF(MOVZX16rm8, - (doMovZXRM<16,8>(ip, block, OP(0), ADDR_NOREF(1))), - (doMovZXRM<16,8>(ip, block, OP(0), MEM_REFERENCE(1))) ) + (doMovZXRM<16,8>(ip, block, OP(0), ADDR_NOREF(1))), + (doMovZXRM<16,8>(ip, block, OP(0), MEM_REFERENCE(1)))) GENERIC_TRANSLATION_REF(MOVZX32rm8, - (doMovZXRM<32,8>(ip, block, OP(0), ADDR_NOREF(1))), - (doMovZXRM<32,8>(ip, block, OP(0), MEM_REFERENCE(1))) ) + (doMovZXRM<32,8>(ip, block, OP(0), ADDR_NOREF(1))), + (doMovZXRM<32,8>(ip, block, OP(0), MEM_REFERENCE(1)))) GENERIC_TRANSLATION_REF(MOVZX32rm16, - (doMovZXRM<32,16>(ip, block, OP(0), ADDR_NOREF(1))), - (doMovZXRM<32,16>(ip, block, OP(0), MEM_REFERENCE(1))) ) + (doMovZXRM<32,16>(ip, block, OP(0), ADDR_NOREF(1))), + (doMovZXRM<32,16>(ip, block, OP(0), MEM_REFERENCE(1)))) -GENERIC_TRANSLATION(MOVSX16rr8, (doMovSXRR<16,8>(ip, block, OP(0), OP(1))) ) -GENERIC_TRANSLATION(MOVSX32rr16,( doMovSXRR<32,16>(ip, block, OP(0), OP(1))) ) -GENERIC_TRANSLATION(MOVSX32rr8, (doMovSXRR<32,8>(ip, block, OP(0), OP(1))) ) -GENERIC_TRANSLATION(MOVSX64rr32, (doMovSXRR<64,32>(ip, block, OP(0), OP(1))) ) +GENERIC_TRANSLATION(MOVSX16rr8, (doMovSXRR<16,8>(ip, block, OP(0), OP(1)))) +GENERIC_TRANSLATION(MOVSX32rr16, ( doMovSXRR<32,16>(ip, block, OP(0), OP(1)))) +GENERIC_TRANSLATION(MOVSX32rr8, (doMovSXRR<32,8>(ip, block, OP(0), OP(1)))) +GENERIC_TRANSLATION(MOVSX64rr32, (doMovSXRR<64,32>(ip, block, OP(0), OP(1)))) GENERIC_TRANSLATION_REF(MOVSX16rm8, - (doMovSXRM<16,8>(ip, block, OP(0), ADDR_NOREF(1))), - (doMovSXRM<16,8>(ip, block, OP(0), MEM_REFERENCE(1))) ) + (doMovSXRM<16,8>(ip, block, OP(0), ADDR_NOREF(1))), + (doMovSXRM<16,8>(ip, block, OP(0), MEM_REFERENCE(1)))) GENERIC_TRANSLATION_REF(MOVSX32rm8, - (doMovSXRM<32,8>(ip, block, OP(0), ADDR_NOREF(1))), - (doMovSXRM<32,8>(ip, block, OP(0), MEM_REFERENCE(1))) ) + (doMovSXRM<32,8>(ip, block, OP(0), ADDR_NOREF(1))), + (doMovSXRM<32,8>(ip, block, OP(0), MEM_REFERENCE(1)))) GENERIC_TRANSLATION_REF(MOVSX32rm16, - (doMovSXRM<32,16>(ip, block, OP(0), ADDR_NOREF(1))), - (doMovSXRM<32,16>(ip, block, OP(0), MEM_REFERENCE(1))) ) + (doMovSXRM<32,16>(ip, block, OP(0), ADDR_NOREF(1))), + (doMovSXRM<32,16>(ip, block, OP(0), MEM_REFERENCE(1)))) GENERIC_TRANSLATION_REF(MOVSX64rm8, - (doMovSXRM<64,8>(ip, block, OP(0), ADDR_NOREF(1))), - (doMovSXRM<64,8>(ip, block, OP(0), MEM_REFERENCE(1))) ) + (doMovSXRM<64,8>(ip, block, OP(0), ADDR_NOREF(1))), + (doMovSXRM<64,8>(ip, block, OP(0), MEM_REFERENCE(1)))) GENERIC_TRANSLATION_REF(MOVSX64rm16, - (doMovSXRM<64,16>(ip, block, OP(0), ADDR_NOREF(1))), - (doMovSXRM<64,16>(ip, block, OP(0), MEM_REFERENCE(1))) ) + (doMovSXRM<64,16>(ip, block, OP(0), ADDR_NOREF(1))), + (doMovSXRM<64,16>(ip, block, OP(0), MEM_REFERENCE(1)))) GENERIC_TRANSLATION_REF(MOVSX64rm32, - (doMovSXRM<64, 32>(ip, block, OP(0), ADDR_NOREF(1))), - (doMovSXRM<64, 32>(ip, block, OP(0), MEM_REFERENCE(1))) ) + (doMovSXRM<64, 32>(ip, block, OP(0), ADDR_NOREF(1))), + (doMovSXRM<64, 32>(ip, block, OP(0), MEM_REFERENCE(1)))) GENERIC_TRANSLATION_REF(MOVBE16rm, - doMRMovBE<16>(ip, block, ADDR_NOREF(0), OP(5)), - doMRMovBE<16>(ip, block, MEM_REFERENCE(0), OP(5))) + doMRMovBE<16>(ip, block, ADDR_NOREF(0), OP(5)), + doMRMovBE<16>(ip, block, MEM_REFERENCE(0), OP(5))) GENERIC_TRANSLATION_REF(MOVBE32rm, - doMRMovBE<32>(ip, block, ADDR_NOREF(0), OP(5)), - doMRMovBE<32>(ip, block, MEM_REFERENCE(0), OP(5))) + doMRMovBE<32>(ip, block, ADDR_NOREF(0), OP(5)), + doMRMovBE<32>(ip, block, MEM_REFERENCE(0), OP(5))) GENERIC_TRANSLATION_REF(MOVBE64rm, - doMRMovBE<64>(ip, block, ADDR_NOREF(0), OP(5)), - doMRMovBE<64>(ip, block, MEM_REFERENCE(0), OP(5))) + doMRMovBE<64>(ip, block, ADDR_NOREF(0), OP(5)), + doMRMovBE<64>(ip, block, MEM_REFERENCE(0), OP(5))) GENERIC_TRANSLATION_REF(MOVBE16mr, - doRMMovBE<16>(ip, block, ADDR_NOREF(0), OP(5)), - doRMMovBE<16>(ip, block, MEM_REFERENCE(0), OP(5))) + doRMMovBE<16>(ip, block, ADDR_NOREF(0), OP(5)), + doRMMovBE<16>(ip, block, MEM_REFERENCE(0), OP(5))) GENERIC_TRANSLATION_REF(MOVBE32mr, - doRMMovBE<32>(ip, block, ADDR_NOREF(0), OP(5)), - doRMMovBE<32>(ip, block, MEM_REFERENCE(0), OP(5))) + doRMMovBE<32>(ip, block, ADDR_NOREF(0), OP(5)), + doRMMovBE<32>(ip, block, MEM_REFERENCE(0), OP(5))) GENERIC_TRANSLATION_REF(MOVBE64mr, - doRMMovBE<64>(ip, block, ADDR_NOREF(0), OP(5)), - doRMMovBE<64>(ip, block, MEM_REFERENCE(0), OP(5))) + doRMMovBE<64>(ip, block, ADDR_NOREF(0), OP(5)), + doRMMovBE<64>(ip, block, MEM_REFERENCE(0), OP(5))) -static InstTransResult translate_MOV32ri(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) { - InstTransResult ret; - Function *F = block->getParent(); - Module *M = F->getParent(); +static InstTransResult translate_MOV32ri(TranslationContext &ctx, + BasicBlock *&block) { + InstTransResult ret; + auto F = block->getParent(); + auto M = F->getParent(); + auto ip = ctx.natI; + auto natM = ctx.natM; + auto &inst = ip->get_inst(); + + if (ip->has_code_ref()) { + Value *addrInt = IMM_AS_DATA_REF(block, natM, ip); + ret = doRIMovV<32>(ip, block, addrInt, OP(0)); + } else { + if (ip->has_imm_reference) { + Value *data_v = nullptr; + if (shouldSubtractImageBase(M)) { + // if we're here, then + // * archGetImageBase is defined + // * we are on win64 + + data_v = IMM_AS_DATA_REF(block, natM, ip); + data_v = doSubtractImageBase<32>(data_v, block); + } else { + data_v = IMM_AS_DATA_REF(block, natM, ip); + } + + ret = doRIMovV<32>(ip, block, data_v, OP(0)); - if( ip->has_code_ref() ) { - Value *addrInt = IMM_AS_DATA_REF(block, natM, ip); - ret = doRIMovV<32>(ip, block, addrInt, OP(0) ); } else { - if( ip->has_imm_reference) { - Value *data_v = nullptr; - if(shouldSubtractImageBase(M)) { - // if we're here, then - // * archGetImageBase is defined - // * we are on win64 - - data_v = IMM_AS_DATA_REF(block, natM, ip); - data_v = doSubtractImageBase<32>(data_v, block); - } else { - data_v = IMM_AS_DATA_REF(block, natM, ip); - } - - ret = doRIMovV<32>(ip, block, data_v, OP(0) ); - - } else { - ret = doRIMov<32>(ip, block, OP(1), OP(0)) ; - } + ret = doRIMov<32>(ip, block, OP(1), OP(0)); } - return ret ; + } + return ret; } -static InstTransResult translate_MOV64ri(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) { - InstTransResult ret; - Function *F = block->getParent(); - Module *M = F->getParent(); +static InstTransResult translate_MOV64ri(TranslationContext &ctx, + BasicBlock *&block) { + InstTransResult ret; + auto F = block->getParent(); + auto M = F->getParent(); + auto ip = ctx.natI; + auto natM = ctx.natM; + auto &inst = ip->get_inst(); - if( ip->has_code_ref() ) { - Value *addrInt = IMM_AS_DATA_REF(block, natM, ip); - ret = doRIMovV<64>(ip, block, addrInt, OP(0) ); - } - else if( ip->has_imm_reference ) { - Value *data_v = IMM_AS_DATA_REF(block, natM, ip); - if(shouldSubtractImageBase(M)) { - // if we're here, then - // * archGetImageBase is defined - // * we are on win64 - - data_v = doSubtractImageBase<64>(data_v, block); - } + if (ip->has_code_ref()) { + Value *addrInt = IMM_AS_DATA_REF(block, natM, ip); + ret = doRIMovV<64>(ip, block, addrInt, OP(0)); + } else if (ip->has_imm_reference) { + Value *data_v = IMM_AS_DATA_REF(block, natM, ip); + if (shouldSubtractImageBase(M)) { + // if we're here, then + // * archGetImageBase is defined + // * we are on win64 - ret = doRIMovV<64>(ip, block, data_v, OP(0) ); - } else { - ret = doRIMov<64>(ip, block, OP(1), OP(0)) ; + data_v = doSubtractImageBase<64>(data_v, block); } - return ret ; + + ret = doRIMovV<64>(ip, block, data_v, OP(0)); + } else { + ret = doRIMov<64>(ip, block, OP(1), OP(0)); + } + return ret; } -template +template int GET_XAX() { if (64 == width) { return X86::RAX; @@ -579,290 +539,318 @@ int GET_XAX() { } //write to memory -template -static InstTransResult translate_MOVao (NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) { - InstTransResult ret; +template +static InstTransResult translate_MOVao(TranslationContext &ctx, + BasicBlock *&block) { + InstTransResult ret; - Function *F = block->getParent(); - Module *M = F->getParent(); + auto F = block->getParent(); + auto M = F->getParent(); + auto ip = ctx.natI; + auto natM = ctx.natM; + auto &inst = ip->get_inst(); - // this is awful, but sometimes IDA detects the immediate - // as a memory reference. However, this instruction can only - // have an immediate, so this is safe - if( ip->has_imm_reference || ip->has_mem_reference ) { - ip->has_imm_reference = true; - ip->set_reference(Inst::IMMRef, ip->get_reference(Inst::MEMRef)); - } + // this is awful, but sometimes IDA detects the immediate + // as a memory reference. However, this instruction can only + // have an immediate, so this is safe + if (ip->has_imm_reference || ip->has_mem_reference) { + ip->has_imm_reference = true; + ip->set_reference(NativeInst::IMMRef, + ip->get_reference(NativeInst::MEMRef)); + } - if( ip->has_imm_reference ) { - - Value *data_v = nullptr; - if(width == 32 && shouldSubtractImageBase(M)) { - // if we're here, then - // * archGetImageBase is defined - // * we are on win64 - - data_v = IMM_AS_DATA_REF(block, natM, ip); - data_v = doSubtractImageBase<32>(data_v, block); - } else { - data_v = IMM_AS_DATA_REF(block, natM, ip); - } - ret = doMRMov(ip, block, data_v, - MCOperand::CreateReg(GET_XAX()) ); + if (ip->has_imm_reference) { + + Value *data_v = nullptr; + if (width == 32 && shouldSubtractImageBase(M)) { + // if we're here, then + // * archGetImageBase is defined + // * we are on win64 + + data_v = IMM_AS_DATA_REF(block, natM, ip); + data_v = doSubtractImageBase<32>(data_v, block); } else { - Value *addrv = CONST_V(block, OP(0).getImm()); - ret = doMRMov(ip, block, addrv, MCOperand::CreateReg(GET_XAX())) ; + data_v = IMM_AS_DATA_REF(block, natM, ip); } - return ret ; + ret = doMRMov(ip, block, data_v, + MCOperand::CreateReg(GET_XAX())); + } else { + Value *addrv = CONST_V(block, OP(0).getImm()); + ret = doMRMov(ip, block, addrv, + MCOperand::CreateReg(GET_XAX())); + } + return ret; } //write to EAX -template -static InstTransResult translate_MOVoa (NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) { - InstTransResult ret; - Function *F = block->getParent(); - Module *M = F->getParent(); +template +static InstTransResult translate_MOVoa(TranslationContext &ctx, + BasicBlock *&block) { + InstTransResult ret; + auto F = block->getParent(); + auto M = F->getParent(); + auto ip = ctx.natI; + auto natM = ctx.natM; + auto &inst = ip->get_inst(); - unsigned eaxReg = GET_XAX(); + unsigned eaxReg = GET_XAX(); - // loading functions only available if its a 32-bit offset - if( ip->has_external_ref() && width == 32) { - Value *addrInt = getValueForExternal<32>(F->getParent(), ip, block); - TASSERT(addrInt != 0, "Could not get external data reference"); - doRMMov(ip, block, addrInt, MCOperand::CreateReg(eaxReg)); - return ContinueBlock; - } + // loading functions only available if its a 32-bit offset + if (ip->has_external_ref() && width == 32) { + Value *addrInt = getValueForExternal<32>(F->getParent(), ip, block); + TASSERT(addrInt != 0, "Could not get external data reference"); + doRMMov(ip, block, addrInt, MCOperand::CreateReg(eaxReg)); + return ContinueBlock; + } - // this is awful, but sometimes IDA detects the immediate - // as a memory reference. However, this instruction can only - // have an immediate, so this is safe - if( ip->has_imm_reference || ip->has_mem_reference ) { - ip->has_imm_reference = true; - ip->set_reference(Inst::IMMRef, ip->get_reference(Inst::MEMRef)); - } + // this is awful, but sometimes IDA detects the immediate + // as a memory reference. However, this instruction can only + // have an immediate, so this is safe + if (ip->has_imm_reference || ip->has_mem_reference) { + ip->has_imm_reference = true; + ip->set_reference(NativeInst::IMMRef, + ip->get_reference(NativeInst::MEMRef)); + } - if( ip->has_code_ref() ) { - Value *addrInt = IMM_AS_DATA_REF(block, natM, ip); - ret = doRMMov(ip, block, addrInt, MCOperand::CreateReg(eaxReg)) ; + if (ip->has_code_ref()) { + Value *addrInt = IMM_AS_DATA_REF(block, natM, ip); + ret = doRMMov(ip, block, addrInt, MCOperand::CreateReg(eaxReg)); + } else { + if (ip->has_imm_reference) { + Value *data_v = nullptr; + if (width == 32 && shouldSubtractImageBase(M)) { + // if we're here, then + // * archGetImageBase is defined + // * we are on win64 + + data_v = IMM_AS_DATA_REF(block, natM, ip); + data_v = doSubtractImageBase<32>(data_v, block); + } else { + data_v = IMM_AS_DATA_REF(block, natM, ip); + } + ret = doRMMov(ip, block, data_v, MCOperand::CreateReg(eaxReg)); } else { - if( ip->has_imm_reference ) { - Value *data_v = nullptr; - if(width == 32 && shouldSubtractImageBase(M)) { - // if we're here, then - // * archGetImageBase is defined - // * we are on win64 - - data_v = IMM_AS_DATA_REF(block, natM, ip); - data_v = doSubtractImageBase<32>(data_v, block); - } else { - data_v = IMM_AS_DATA_REF(block, natM, ip); - } - ret = doRMMov(ip, block, - data_v, - MCOperand::CreateReg(eaxReg) ); - } else { - Value *addrv = CONST_V(block, OP(0).getImm()); - ret = doRMMov(ip, block, addrv, MCOperand::CreateReg(eaxReg)) ; - } + Value *addrv = CONST_V(block, OP(0).getImm()); + ret = doRMMov(ip, block, addrv, MCOperand::CreateReg(eaxReg)); } - return ret ; + } + return ret; } -static InstTransResult translate_MOV32rm(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) -{ +static InstTransResult translate_MOV32rm(TranslationContext &ctx, + BasicBlock *&block) { - InstTransResult ret; - Function *F = block->getParent(); - Module *M = F->getParent(); + InstTransResult ret; + auto F = block->getParent(); + auto M = F->getParent(); + auto ip = ctx.natI; + auto natM = ctx.natM; + auto &inst = ip->get_inst(); - if( ip->has_external_ref()) { - Value *addrInt = getValueForExternal<32>(F->getParent(), ip, block); - ret = doRMMov<32>(ip, block, addrInt, OP(0) ); - TASSERT(addrInt != NULL, "Could not get address for external"); - return ContinueBlock; - } - else if( ip->has_mem_reference ) { + if (ip->has_external_ref()) { + Value *addrInt = getValueForExternal<32>(F->getParent(), ip, block); + ret = doRMMov<32>(ip, block, addrInt, OP(0)); + TASSERT(addrInt != NULL, "Could not get address for external"); + return ContinueBlock; + } else if (ip->has_mem_reference) { - Value *data_v = nullptr; - if(shouldSubtractImageBase(M)) { - // if we're here, then - // * archGetImageBase is defined - // * we are on win64 + Value *data_v = nullptr; + if (shouldSubtractImageBase(M)) { + // if we're here, then + // * archGetImageBase is defined + // * we are on win64 - data_v = MEM_AS_DATA_REF( block, natM, inst, ip, 1 ); - data_v = doSubtractImageBase<32>(data_v, block); - } else { - data_v = MEM_AS_DATA_REF( block, natM, inst, ip, 1 ); - } - - ret = doRMMov<32>(ip, block, data_v, OP(0) ); + data_v = MEM_AS_DATA_REF(block, natM, inst, ip, 1); + data_v = doSubtractImageBase<32>(data_v, block); } else { - ret = doRMMov<32>(ip, block, ADDR_NOREF(1), OP(0)); + data_v = MEM_AS_DATA_REF(block, natM, inst, ip, 1); } - return ret ; + + ret = doRMMov<32>(ip, block, data_v, OP(0)); + } else { + ret = doRMMov<32>(ip, block, ADDR_NOREF(1), OP(0)); + } + return ret; } -static InstTransResult translate_MOV32mr(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) -{ - InstTransResult ret; - Function *F = block->getParent(); - if( ip->has_external_ref()) { - Value *addrInt = getValueForExternal<32>(F->getParent(), ip, block); - TASSERT(addrInt != NULL, "Could not get address for external"); - return doMRMov<32>(ip, block, addrInt, OP(5) ); - } - else if( ip->has_mem_reference ) { - ret = doMRMov<32>(ip, block, MEM_AS_DATA_REF( block, natM, inst, ip, 0), OP(5) ); - } else { - ret = doMRMov<32>(ip, block, ADDR_NOREF(0), OP(5)) ; - } - return ret ; +static InstTransResult translate_MOV32mr(TranslationContext &ctx, + BasicBlock *&block) { + InstTransResult ret; + auto F = block->getParent(); + auto M = F->getParent(); + auto ip = ctx.natI; + auto natM = ctx.natM; + auto &inst = ip->get_inst(); + + if (ip->has_external_ref()) { + Value *addrInt = getValueForExternal<32>(F->getParent(), ip, block); + TASSERT(addrInt != NULL, "Could not get address for external"); + return doMRMov<32>(ip, block, addrInt, OP(5)); + } else if (ip->has_mem_reference) { + ret = doMRMov<32>(ip, block, MEM_AS_DATA_REF(block, natM, inst, ip, 0), + OP(5)); + } else { + ret = doMRMov<32>(ip, block, ADDR_NOREF(0), OP(5)); + } + return ret; } +static InstTransResult translate_MOV64rm(TranslationContext &ctx, + BasicBlock *&block) { + InstTransResult ret; + auto F = block->getParent(); + auto M = F->getParent(); + auto ip = ctx.natI; + auto natM = ctx.natM; + auto &inst = ip->get_inst(); -static InstTransResult translate_MOV64rm(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) -{ - InstTransResult ret; - Function *F = block->getParent(); - Module *M = F->getParent(); + if (ip->has_external_ref()) { + Value *addrInt = getValueForExternal<64>(F->getParent(), ip, block); + TASSERT(addrInt != NULL, "Could not get address for external"); + doRMMov<64>(ip, block, addrInt, OP(0)); + return ContinueBlock; + } else if (ip->has_mem_reference) { + Value *data_v = nullptr; + if (shouldSubtractImageBase(M)) { + // if we're here, then + // * archGetImageBase is defined + // * we are on win64 - if( ip->has_external_ref()) { - Value *addrInt = getValueForExternal<64>(F->getParent(), ip, block); - TASSERT(addrInt != NULL, "Could not get address for external"); - doRMMov<64>(ip, block, addrInt, OP(0) ); - return ContinueBlock; - } - else if( ip->has_mem_reference ) { - Value *data_v = nullptr; - if(shouldSubtractImageBase(M)) { - // if we're here, then - // * archGetImageBase is defined - // * we are on win64 - - data_v = MEM_AS_DATA_REF( block, natM, inst, ip, 1 ); - data_v = doSubtractImageBase<64>(data_v, block); - } else { - data_v = MEM_AS_DATA_REF( block, natM, inst, ip, 1 ); - } - ret = doRMMov<64>(ip, block, data_v, OP(0) ); + data_v = MEM_AS_DATA_REF(block, natM, inst, ip, 1); + data_v = doSubtractImageBase<64>(data_v, block); } else { - ret = doRMMov<64>(ip, block, ADDR_NOREF(1), OP(0)); + data_v = MEM_AS_DATA_REF(block, natM, inst, ip, 1); } - return ret ; + ret = doRMMov<64>(ip, block, data_v, OP(0)); + } else { + ret = doRMMov<64>(ip, block, ADDR_NOREF(1), OP(0)); + } + return ret; } -static InstTransResult translate_MOV64mr(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) -{ - InstTransResult ret; - Function *F = block->getParent(); - if( ip->has_external_ref()) { - Value *addrInt = getValueForExternal<64>(F->getParent(), ip, block); - TASSERT(addrInt != NULL, "Could not get address for external"); - return doMRMov<64>(ip, block, addrInt, OP(5) ); - } - else if( ip->has_mem_reference ) { - ret = doMRMov<64>(ip, block, MEM_AS_DATA_REF( block, natM, inst, ip, 0), OP(5) ); - } else { - ret = doMRMov<64>(ip, block, ADDR_NOREF(0), OP(5)) ; - } - return ret ; +static InstTransResult translate_MOV64mr(TranslationContext &ctx, + BasicBlock *&block) { + InstTransResult ret; + auto F = block->getParent(); + auto M = F->getParent(); + auto ip = ctx.natI; + auto natM = ctx.natM; + auto &inst = ip->get_inst(); + + if (ip->has_external_ref()) { + Value *addrInt = getValueForExternal<64>(F->getParent(), ip, block); + TASSERT(addrInt != NULL, "Could not get address for external"); + return doMRMov<64>(ip, block, addrInt, OP(5)); + } else if (ip->has_mem_reference) { + ret = doMRMov<64>(ip, block, MEM_AS_DATA_REF(block, natM, inst, ip, 0), + OP(5)); + } else { + ret = doMRMov<64>(ip, block, ADDR_NOREF(0), OP(5)); + } + return ret; } // sign extend %eax to %rax -static InstTransResult translate_CDQE(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) -{ - InstTransResult ret = ContinueBlock; - llvm::Value *eax = R_READ<32>(block, X86::EAX); - llvm::Value *rax = new llvm::SExtInst(eax, - llvm::Type::getInt64Ty(block->getContext()), "", block); - R_WRITE<64>(block, X86::RAX, rax); - return ret ; +static InstTransResult translate_CDQE(TranslationContext &ctx, + BasicBlock *&block) { + InstTransResult ret = ContinueBlock; + auto F = block->getParent(); + auto M = F->getParent(); + auto ip = ctx.natI; + auto natM = ctx.natM; + auto &inst = ip->get_inst(); + + llvm::Value *eax = R_READ<32>(block, X86::EAX); + llvm::Value *rax = new llvm::SExtInst( + eax, llvm::Type::getInt64Ty(block->getContext()), "", block); + R_WRITE<64>(block, X86::RAX, rax); + return ret; } void MOV_populateDispatchMap(DispatchMap &m) { - m[X86::MOV8rr] = translate_MOV8rr; - m[X86::MOV8rr_REV] = translate_MOV8rr_REV; - m[X86::MOV16rr] = translate_MOV16rr; - m[X86::MOV16rr_REV] = translate_MOV16rr_REV; - m[X86::MOV32rr] = translate_MOV32rr; - m[X86::MOV32rr_REV] = translate_MOV32rr_REV; - m[X86::MOV64rr] = translate_MOV64rr; - m[X86::MOV64rr_REV] = translate_MOV64rr_REV; + m[X86::MOV8rr] = translate_MOV8rr; + m[X86::MOV8rr_REV] = translate_MOV8rr_REV; + m[X86::MOV16rr] = translate_MOV16rr; + m[X86::MOV16rr_REV] = translate_MOV16rr_REV; + m[X86::MOV32rr] = translate_MOV32rr; + m[X86::MOV32rr_REV] = translate_MOV32rr_REV; + m[X86::MOV64rr] = translate_MOV64rr; + m[X86::MOV64rr_REV] = translate_MOV64rr_REV; - m[X86::MOV8ri] = translate_MOV8ri; - m[X86::MOV16ri] = translate_MOV16ri; - m[X86::MOV32ao32] = translate_MOVao<32>; - m[X86::MOV16ao16] = translate_MOVao<16>; - m[X86::MOV8ao8] = translate_MOVao<8>; - m[X86::MOV32o32a] = translate_MOVoa<32>; - m[X86::MOV16o16a] = translate_MOVoa<16>; - m[X86::MOV8o8a] = translate_MOVoa<8>; - m[X86::MOV32ri] = translate_MOV32ri; - m[X86::MOV64ri] = translate_MOV64ri; - m[X86::MOV64ri32] = translate_MOV64ri; + m[X86::MOV8ri] = translate_MOV8ri; + m[X86::MOV16ri] = translate_MOV16ri; + m[X86::MOV32ao32] = translate_MOVao<32>; + m[X86::MOV16ao16] = translate_MOVao<16>; + m[X86::MOV8ao8] = translate_MOVao<8>; + m[X86::MOV32o32a] = translate_MOVoa<32>; + m[X86::MOV16o16a] = translate_MOVoa<16>; + m[X86::MOV8o8a] = translate_MOVoa<8>; + m[X86::MOV32ri] = translate_MOV32ri; + m[X86::MOV64ri] = translate_MOV64ri; + m[X86::MOV64ri32] = translate_MOV64ri; - m[X86::MOV8mi] = translate_MOV8mi; - m[X86::MOV16mi] = translate_MOV16mi; - m[X86::MOV32mi] = translate_MOV32mi; - m[X86::MOV64mi32] = translate_MOV64mi32; + m[X86::MOV8mi] = translate_MOV8mi; + m[X86::MOV16mi] = translate_MOV16mi; + m[X86::MOV32mi] = translate_MOV32mi; + m[X86::MOV64mi32] = translate_MOV64mi32; - m[X86::MOV8mr] = translate_MOV8mr; - m[X86::MOV16mr] = translate_MOV16mr; - m[X86::MOV32mr] = translate_MOV32mr; - m[X86::MOV64mr] = translate_MOV64mr; + m[X86::MOV8mr] = translate_MOV8mr; + m[X86::MOV16mr] = translate_MOV16mr; + m[X86::MOV32mr] = translate_MOV32mr; + m[X86::MOV64mr] = translate_MOV64mr; - m[X86::MOV8rm] = translate_MOV8rm; - m[X86::MOV16rm] = translate_MOV16rm; - m[X86::MOV32rm] = translate_MOV32rm; - m[X86::MOV64rm] = translate_MOV64rm; + m[X86::MOV8rm] = translate_MOV8rm; + m[X86::MOV16rm] = translate_MOV16rm; + m[X86::MOV32rm] = translate_MOV32rm; + m[X86::MOV64rm] = translate_MOV64rm; - m[X86::MOVZX16rr8] = translate_MOVZX16rr8; - m[X86::MOVZX32rr8] = translate_MOVZX32rr8; - m[X86::MOVZX32rr16] = translate_MOVZX32rr16; + m[X86::MOVZX16rr8] = translate_MOVZX16rr8; + m[X86::MOVZX32rr8] = translate_MOVZX32rr8; + m[X86::MOVZX32rr16] = translate_MOVZX32rr16; - m[X86::MOVZX16rm8] = translate_MOVZX16rm8; - m[X86::MOVZX32rm8] = translate_MOVZX32rm8; - m[X86::MOVZX32rm16] = translate_MOVZX32rm16; + m[X86::MOVZX16rm8] = translate_MOVZX16rm8; + m[X86::MOVZX32rm8] = translate_MOVZX32rm8; + m[X86::MOVZX32rm16] = translate_MOVZX32rm16; - m[X86::MOVSX16rr8] = translate_MOVSX16rr8; - m[X86::MOVSX32rr16] = translate_MOVSX32rr16; - m[X86::MOVSX32rr8] = translate_MOVSX32rr8; - m[X86::MOVSX64rr8] = translate_MOVSX32rr8; - m[X86::MOVSX64rr16] = translate_MOVSX32rr8; - m[X86::MOVSX64rr32] = translate_MOVSX64rr32; + m[X86::MOVSX16rr8] = translate_MOVSX16rr8; + m[X86::MOVSX32rr16] = translate_MOVSX32rr16; + m[X86::MOVSX32rr8] = translate_MOVSX32rr8; + m[X86::MOVSX64rr8] = translate_MOVSX32rr8; + m[X86::MOVSX64rr16] = translate_MOVSX32rr8; + m[X86::MOVSX64rr32] = translate_MOVSX64rr32; - m[X86::MOVSX16rm8] = translate_MOVSX16rm8; - m[X86::MOVSX32rm8] = translate_MOVSX32rm8; - m[X86::MOVSX32rm16] = translate_MOVSX32rm16; - m[X86::MOVSX64rm8] = translate_MOVSX64rm8; - m[X86::MOVSX64rm16] = translate_MOVSX64rm16; - m[X86::MOVSX64rm32] = translate_MOVSX64rm32; + m[X86::MOVSX16rm8] = translate_MOVSX16rm8; + m[X86::MOVSX32rm8] = translate_MOVSX32rm8; + m[X86::MOVSX32rm16] = translate_MOVSX32rm16; + m[X86::MOVSX64rm8] = translate_MOVSX64rm8; + m[X86::MOVSX64rm16] = translate_MOVSX64rm16; + m[X86::MOVSX64rm32] = translate_MOVSX64rm32; - m[X86::MOV16rs] = translate_MOV16rs; - m[X86::MOV32rs] = translate_MOV32rs; - m[X86::MOV64rs] = translate_MOV64rs; + m[X86::MOV16rs] = translate_MOV16rs; + m[X86::MOV32rs] = translate_MOV32rs; + m[X86::MOV64rs] = translate_MOV64rs; - m[X86::MOV16ms] = translate_MOV16ms; - m[X86::MOV32ms] = translate_MOV32ms; - m[X86::MOV64ms] = translate_MOV64ms; + m[X86::MOV16ms] = translate_MOV16ms; + m[X86::MOV32ms] = translate_MOV32ms; + m[X86::MOV64ms] = translate_MOV64ms; - m[X86::MOV16sr] = translate_MOV32rs; - m[X86::MOV32sr] = translate_MOV32rs; - m[X86::MOV64sr] = translate_MOV32rs; + m[X86::MOV16sr] = translate_MOV32rs; + m[X86::MOV32sr] = translate_MOV32rs; + m[X86::MOV64sr] = translate_MOV32rs; - //m[X86::MOV16sm] = translate_MOV16sm; - // m[X86::MOV32sm] = translate_MOV32sm; - // m[X86::MOV64sm] = translate_MOV64sm; + //m[X86::MOV16sm] = translate_MOV16sm; + // m[X86::MOV32sm] = translate_MOV32sm; + // m[X86::MOV64sm] = translate_MOV64sm; - m[X86::MOVBE16rm] = translate_MOVBE16rm; - m[X86::MOVBE32rm] = translate_MOVBE32rm; - m[X86::MOVBE64rm] = translate_MOVBE64rm; + m[X86::MOVBE16rm] = translate_MOVBE16rm; + m[X86::MOVBE32rm] = translate_MOVBE32rm; + m[X86::MOVBE64rm] = translate_MOVBE64rm; - m[X86::MOVBE16mr] = translate_MOVBE16mr; - m[X86::MOVBE32mr] = translate_MOVBE32mr; - m[X86::MOVBE64mr] = translate_MOVBE64mr; + m[X86::MOVBE16mr] = translate_MOVBE16mr; + m[X86::MOVBE32mr] = translate_MOVBE32mr; + m[X86::MOVBE64mr] = translate_MOVBE64mr; - m[X86::CDQE] = translate_CDQE; + m[X86::CDQE] = translate_CDQE; } diff --git a/mc-sema/cfgToLLVM/x86Instrs_MOV.h b/mc-sema/cfgToLLVM/x86Instrs_MOV.h index d51fed6cb..f24980a46 100644 --- a/mc-sema/cfgToLLVM/x86Instrs_MOV.h +++ b/mc-sema/cfgToLLVM/x86Instrs_MOV.h @@ -32,13 +32,10 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. using namespace llvm; -#define INSTR_DEBUG(ip) llvm::dbgs() << __FUNCTION__ << "\tRepresentation: " << ip->printInst() << "\n" - -//class INSTR_DEBUG; void MOV_populateDispatchMap(DispatchMap &m); template -InstTransResult doMRMov(InstPtr ip, llvm::BasicBlock *&b, +InstTransResult doMRMov(NativeInstPtr ip, llvm::BasicBlock *&b, llvm::Value *dstAddr, const llvm::MCOperand &src) { @@ -52,7 +49,7 @@ InstTransResult doMRMov(InstPtr ip, llvm::BasicBlock *&b, } template -InstTransResult doMRMovBE(InstPtr ip, llvm::BasicBlock *&b, +InstTransResult doMRMovBE(NativeInstPtr ip, llvm::BasicBlock *&b, llvm::Value *dstAddr, const llvm::MCOperand &src) { @@ -125,7 +122,7 @@ InstTransResult doMRMovBE(InstPtr ip, llvm::BasicBlock *&b, } template -InstTransResult doMRMov(InstPtr ip, llvm::BasicBlock *&b, +InstTransResult doMRMov(NativeInstPtr ip, llvm::BasicBlock *&b, llvm::Value *dstAddr, const llvm::MCOperand &src) { @@ -140,7 +137,7 @@ InstTransResult doMRMov(InstPtr ip, llvm::BasicBlock *&b, template -InstTransResult doRRMov(InstPtr ip, llvm::BasicBlock *b, +InstTransResult doRRMov(NativeInstPtr ip, llvm::BasicBlock *b, const llvm::MCOperand &dst, const llvm::MCOperand &src) { @@ -154,7 +151,7 @@ InstTransResult doRRMov(InstPtr ip, llvm::BasicBlock *b, } template -InstTransResult doRRMov(InstPtr ip, llvm::BasicBlock *b, +InstTransResult doRRMov(NativeInstPtr ip, llvm::BasicBlock *b, const llvm::MCOperand &dst, const llvm::MCOperand &src) { @@ -169,7 +166,7 @@ InstTransResult doRRMov(InstPtr ip, llvm::BasicBlock *b, } template -InstTransResult doRRMovD(InstPtr ip, llvm::BasicBlock *b, +InstTransResult doRRMovD(NativeInstPtr ip, llvm::BasicBlock *b, const llvm::MCOperand &dst, const llvm::MCOperand &src) { @@ -185,7 +182,7 @@ InstTransResult doRRMovD(InstPtr ip, llvm::BasicBlock *b, template -InstTransResult doRMMovBE(InstPtr ip, llvm::BasicBlock *&b, +InstTransResult doRMMovBE(NativeInstPtr ip, llvm::BasicBlock *&b, llvm::Value *srcAddr, const llvm::MCOperand &dst) { @@ -261,7 +258,7 @@ InstTransResult doRMMovBE(InstPtr ip, llvm::BasicBlock *&b, template -InstTransResult doRMMov(InstPtr ip, llvm::BasicBlock *b, +InstTransResult doRMMov(NativeInstPtr ip, llvm::BasicBlock *b, llvm::Value *srcAddr, const llvm::MCOperand &dst) { diff --git a/mc-sema/cfgToLLVM/x86Instrs_MULDIV.cpp b/mc-sema/cfgToLLVM/x86Instrs_MULDIV.cpp index 743ad32f9..d480571ac 100644 --- a/mc-sema/cfgToLLVM/x86Instrs_MULDIV.cpp +++ b/mc-sema/cfgToLLVM/x86Instrs_MULDIV.cpp @@ -39,7 +39,7 @@ using namespace llvm; using namespace std; template -static void doMulV(InstPtr ip, BasicBlock *&b, Value *rhs) { +static void doMulV(NativeInstPtr ip, BasicBlock *&b, Value *rhs) { // Handle the different source register depending on the bit width Value *lhs; @@ -101,7 +101,7 @@ static void doMulV(InstPtr ip, BasicBlock *&b, Value *rhs) { } template -static InstTransResult doMulR(InstPtr ip, BasicBlock *&b, +static InstTransResult doMulR(NativeInstPtr ip, BasicBlock *&b, const MCOperand &src) { NASSERT(src.isReg()); @@ -111,7 +111,7 @@ static InstTransResult doMulR(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doMulM(InstPtr ip, BasicBlock *&b, Value *memAddr) { +static InstTransResult doMulM(NativeInstPtr ip, BasicBlock *&b, Value *memAddr) { NASSERT(memAddr != NULL); doMulV(ip, b, M_READ(ip, b, memAddr)); @@ -125,7 +125,7 @@ struct IMulRes { }; template -static IMulRes doIMulVV(InstPtr ip, BasicBlock *&b, Value *lhs, Value *rhs) { +static IMulRes doIMulVV(NativeInstPtr ip, BasicBlock *&b, Value *lhs, Value *rhs) { //model the semantics of the signed multiply Value *a1 = lhs; Value *a2 = rhs; @@ -152,7 +152,7 @@ static IMulRes doIMulVV(InstPtr ip, BasicBlock *&b, Value *lhs, Value *rhs) { } template -static IMulRes doIMulV(InstPtr ip, BasicBlock *&b, Value *rhs) { +static IMulRes doIMulV(NativeInstPtr ip, BasicBlock *&b, Value *rhs) { // Handle the different source register depending on the bit width Value *lhs; @@ -176,7 +176,7 @@ static IMulRes doIMulV(InstPtr ip, BasicBlock *&b, Value *rhs) { } template -static InstTransResult doIMulR(InstPtr ip, BasicBlock *&b, +static InstTransResult doIMulR(NativeInstPtr ip, BasicBlock *&b, const MCOperand &src) { NASSERT(src.isReg()); @@ -215,7 +215,7 @@ static InstTransResult doIMulR(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doIMulM(InstPtr ip, BasicBlock *&b, Value *memAddr) { +static InstTransResult doIMulM(NativeInstPtr ip, BasicBlock *&b, Value *memAddr) { NASSERT(memAddr != NULL); auto imul_res = doIMulV(ip, b, M_READ(ip, b, memAddr)); @@ -250,7 +250,7 @@ static InstTransResult doIMulM(InstPtr ip, BasicBlock *&b, Value *memAddr) { } template -static InstTransResult doIMulRM(InstPtr ip, BasicBlock *&b, +static InstTransResult doIMulRM(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst, const MCOperand &lhs, Value *rhs) { NASSERT(dst.isReg()); @@ -266,7 +266,7 @@ static InstTransResult doIMulRM(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doIMulRR(InstPtr ip, BasicBlock *&b, +static InstTransResult doIMulRR(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst, const MCOperand &lhs, const MCOperand &rhs) { NASSERT(dst.isReg()); @@ -282,13 +282,13 @@ static InstTransResult doIMulRR(InstPtr ip, BasicBlock *&b, } template -static Value *doIMulVVV(InstPtr ip, BasicBlock *&b, Value *lhs, Value *rhs) { +static Value *doIMulVVV(NativeInstPtr ip, BasicBlock *&b, Value *lhs, Value *rhs) { return doIMulVV(ip, b, lhs, rhs).trunc; } template -static InstTransResult doIMulRMI(InstPtr ip, BasicBlock *&b, +static InstTransResult doIMulRMI(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst, Value *lhs, const MCOperand &rhs) { NASSERT(dst.isReg()); @@ -304,7 +304,7 @@ static InstTransResult doIMulRMI(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doIMulRMV(InstPtr ip, BasicBlock *&b, +static InstTransResult doIMulRMV(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst, Value *lhs, Value *rhs) { NASSERT(dst.isReg()); @@ -318,7 +318,7 @@ static InstTransResult doIMulRMV(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doIMulRRI(InstPtr ip, BasicBlock *&b, +static InstTransResult doIMulRRI(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst, const MCOperand &lhs, const MCOperand &rhs) { NASSERT(dst.isReg()); @@ -334,7 +334,7 @@ static InstTransResult doIMulRRI(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doIMulRRV(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doIMulRRV(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &lhs, const MCOperand &dst) { NASSERT(dst.isReg()); NASSERT(lhs.isReg()); @@ -347,7 +347,7 @@ static InstTransResult doIMulRRV(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doIMulRMI8(InstPtr ip, BasicBlock *&b, +static InstTransResult doIMulRMI8(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst, Value *lhs, const MCOperand &rhs) { NASSERT(dst.isReg()); @@ -366,7 +366,7 @@ static InstTransResult doIMulRMI8(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doIMulRRI8(InstPtr ip, BasicBlock *&b, +static InstTransResult doIMulRRI8(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst, const MCOperand &lhs, const MCOperand &rhs) { NASSERT(dst.isReg()); @@ -385,7 +385,7 @@ static InstTransResult doIMulRRI8(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doDivV(InstPtr ip, BasicBlock *&b, Value *divisor, +static InstTransResult doDivV(NativeInstPtr ip, BasicBlock *&b, Value *divisor, llvm::Instruction::BinaryOps whichdiv) { //read in EDX and EAX @@ -482,7 +482,7 @@ static InstTransResult doDivV(InstPtr ip, BasicBlock *&b, Value *divisor, } template -static InstTransResult doIDivR(InstPtr ip, BasicBlock *&b, +static InstTransResult doIDivR(NativeInstPtr ip, BasicBlock *&b, const MCOperand &div) { NASSERT(div.isReg()); @@ -495,7 +495,7 @@ static InstTransResult doIDivR(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doIDivM(InstPtr ip, BasicBlock *&b, Value *memLoc) { +static InstTransResult doIDivM(NativeInstPtr ip, BasicBlock *&b, Value *memLoc) { NASSERT(memLoc != NULL); Value *from_mem = M_READ(ip, b, memLoc); @@ -506,7 +506,7 @@ static InstTransResult doIDivM(InstPtr ip, BasicBlock *&b, Value *memLoc) { } template -static InstTransResult doDivR(InstPtr ip, BasicBlock *&b, +static InstTransResult doDivR(NativeInstPtr ip, BasicBlock *&b, const MCOperand &div) { NASSERT(div.isReg()); @@ -519,7 +519,7 @@ static InstTransResult doDivR(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doDivM(InstPtr ip, BasicBlock *&b, Value *memLoc) { +static InstTransResult doDivM(NativeInstPtr ip, BasicBlock *&b, Value *memLoc) { NASSERT(memLoc != NULL); Value *from_mem = M_READ(ip, b, memLoc); diff --git a/mc-sema/cfgToLLVM/x86Instrs_Misc.cpp b/mc-sema/cfgToLLVM/x86Instrs_Misc.cpp index 374539e41..0bb64dcbf 100644 --- a/mc-sema/cfgToLLVM/x86Instrs_Misc.cpp +++ b/mc-sema/cfgToLLVM/x86Instrs_Misc.cpp @@ -8,7 +8,8 @@ Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or + Redistributions in binary form must reproduce the above copyright notice, this + list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. Neither the name of Trail of Bits nor the names of its @@ -39,46 +40,40 @@ using namespace llvm; -static InstTransResult doNoop(BasicBlock *b) { +static InstTransResult doNoop(llvm::BasicBlock *b) { //isn't this exciting return ContinueBlock; } -static InstTransResult doHlt(BasicBlock *b) { +static InstTransResult doHlt(llvm::BasicBlock *b) { //isn't this exciting - llvm::dbgs() - << "WARNING: Treating HLT as no-op, but HLT is normally privileged\n"; + std::cerr << "WARNING: Treating HLT as no-op, but HLT is normally privileged" + << std::endl; return ContinueBlock; } -static InstTransResult doInt3(BasicBlock *b) { - Module *M = b->getParent()->getParent(); +static InstTransResult doInt3(llvm::BasicBlock *b) { + auto M = b->getParent()->getParent(); //emit an LLVM trap intrinsic //this should be changed to a debugtrap intrinsic eventually - Function *trapIntrin = Intrinsic::getDeclaration(M, Intrinsic::trap); - - CallInst::Create(trapIntrin, "", b); - - Value *unreachable = new UnreachableInst(b->getContext(), b); - + auto trapIntrin = llvm::Intrinsic::getDeclaration(M, llvm::Intrinsic::trap); + llvm::CallInst::Create(trapIntrin, "", b); + (void) new llvm::UnreachableInst(b->getContext(), b); return ContinueBlock; } -static InstTransResult doTrap(BasicBlock *b) { - Module *M = b->getParent()->getParent(); - Function *trapIntrin = Intrinsic::getDeclaration(M, Intrinsic::trap); - CallInst::Create(trapIntrin, "", b); - Value *unreachable = new UnreachableInst(b->getContext(), b); +static InstTransResult doTrap(llvm::BasicBlock *b) { + auto M = b->getParent()->getParent(); + auto trapIntrin = Intrinsic::getDeclaration(M, llvm::Intrinsic::trap); + llvm::CallInst::Create(trapIntrin, "", b); + (void) new llvm::UnreachableInst(b->getContext(), b); return ContinueBlock; } -static InstTransResult doInt(BasicBlock *&b, const MCOperand &o) { +static InstTransResult doInt(llvm::BasicBlock *&b, const llvm::MCOperand &o) { TASSERT(o.isImm(), "Operand not immediate"); - - Module *M = b->getParent()->getParent(); - + auto M = b->getParent()->getParent(); int interrupt_val = o.getImm(); - auto os = SystemOS(M); if (0x2e == interrupt_val && llvm::Triple::Win32 == os) { @@ -89,25 +84,23 @@ static InstTransResult doInt(BasicBlock *&b, const MCOperand &o) { TASSERT(false, "System call via interrupt is not supported!"); } - llvm::dbgs() << "WARNING: Treating INT " << interrupt_val << " as trap!\n"; + std::cerr << "WARNING: Treating INT " << interrupt_val << " as trap!" + << std::endl; return doTrap(b); } -static InstTransResult doCdq(BasicBlock *b) { +static InstTransResult doCdq(llvm::BasicBlock *b) { // EDX <- SEXT(EAX) //read EAX - Value *EAX_v = R_READ<32>(b, llvm::X86::EAX); - - Value *sign_bit = CONST_V<32>(b, 1 << 31); - - Value *test_bit = BinaryOperator::CreateAnd(EAX_v, sign_bit, "", b); - - Value *is_zero = new ICmpInst( *b, CmpInst::ICMP_EQ, test_bit, - CONST_V<32>(b, 0)); - Value *edx_val = SelectInst::Create(is_zero, CONST_V<32>(b, 0), - CONST_V<32>(b, 0xFFFFFFFF), "", b); + auto EAX_v = R_READ<32>(b, llvm::X86::EAX); + auto sign_bit = CONST_V<32>(b, 1ULL << 31U); + auto test_bit = llvm::BinaryOperator::CreateAnd(EAX_v, sign_bit, "", b); + auto is_zero = new llvm::ICmpInst( *b, llvm::CmpInst::ICMP_EQ, test_bit, + CONST_V<32>(b, 0)); + auto edx_val = llvm::SelectInst::Create(is_zero, CONST_V<32>(b, 0), + CONST_V<32>(b, 0xFFFFFFFF), "", b); //write this value to EDX R_WRITE<32>(b, llvm::X86::EDX, edx_val); @@ -116,72 +109,74 @@ static InstTransResult doCdq(BasicBlock *b) { } template -static InstTransResult doBswapR(InstPtr ip, BasicBlock *&b, - const MCOperand ®) { +static InstTransResult doBswapR(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand ®) { TASSERT(reg.isReg(), ""); if (width != 32) { throw TErr(__LINE__, __FILE__, "Width not supported"); } - Value *tmp = R_READ(b, reg.getReg()); + auto tmp = R_READ(b, reg.getReg()); // Create the new bytes from the original value - Value *newByte1 = BinaryOperator::CreateShl(tmp, CONST_V(b, 24), "", - b); - Value *newByte2 = BinaryOperator::CreateShl( - BinaryOperator::CreateAnd(tmp, CONST_V(b, 0x0000FF00), "", b), + auto newByte1 = llvm::BinaryOperator::CreateShl(tmp, CONST_V(b, 24), + "", b); + auto newByte2 = llvm::BinaryOperator::CreateShl( + llvm::BinaryOperator::CreateAnd(tmp, CONST_V(b, 0x0000FF00), "", + b), CONST_V(b, 8), "", b); - Value *newByte3 = BinaryOperator::CreateLShr( - BinaryOperator::CreateAnd(tmp, CONST_V(b, 0x00FF0000), "", b), + auto newByte3 = BinaryOperator::CreateLShr( + llvm::BinaryOperator::CreateAnd(tmp, CONST_V(b, 0x00FF0000), "", + b), CONST_V(b, 8), "", b); - Value *newByte4 = BinaryOperator::CreateLShr(tmp, CONST_V(b, 24), "", - b); + auto newByte4 = llvm::BinaryOperator::CreateLShr(tmp, CONST_V(b, 24), + "", b); // Add the bytes together to make the resulting DWORD - Value *res = BinaryOperator::CreateAdd(newByte1, newByte2, "", b); - res = BinaryOperator::CreateAdd(res, newByte3, "", b); - res = BinaryOperator::CreateAdd(res, newByte4, "", b); + llvm::Value *res = llvm::BinaryOperator::CreateAdd(newByte1, newByte2, "", b); + res = llvm::BinaryOperator::CreateAdd(res, newByte3, "", b); + res = llvm::BinaryOperator::CreateAdd(res, newByte4, "", b); R_WRITE(b, reg.getReg(), res); return ContinueBlock; } -static InstTransResult doLAHF(BasicBlock *b) { +static InstTransResult doLAHF(llvm::BasicBlock *b) { //we need to create an 8-bit value out of the status //flags, shift and OR them, and then write them into AH - Type *t = Type::getInt8Ty(b->getContext()); - Value *cf = new ZExtInst(F_READ(b, CF), t, "", b); - Value *af = new ZExtInst(F_READ(b, AF), t, "", b); - Value *pf = new ZExtInst(F_READ(b, PF), t, "", b); - Value *zf = new ZExtInst(F_READ(b, ZF), t, "", b); - Value *sf = new ZExtInst(F_READ(b, SF), t, "", b); + auto t = llvm::Type::getInt8Ty(b->getContext()); + auto cf = new llvm::ZExtInst(F_READ(b, CF), t, "", b); + auto af = new llvm::ZExtInst(F_READ(b, AF), t, "", b); + auto pf = new llvm::ZExtInst(F_READ(b, PF), t, "", b); + auto zf = new llvm::ZExtInst(F_READ(b, ZF), t, "", b); + auto sf = new llvm::ZExtInst(F_READ(b, SF), t, "", b); //shift everything - Value *p_0 = cf; - Value *p_1 = BinaryOperator::CreateShl(CONST_V<8>(b, 1), CONST_V<8>(b, 1), "", - b); - Value *p_2 = BinaryOperator::CreateShl(pf, CONST_V<8>(b, 2), "", b); - Value *p_3 = BinaryOperator::CreateShl(CONST_V<8>(b, 0), CONST_V<8>(b, 3), "", - b); - Value *p_4 = BinaryOperator::CreateShl(af, CONST_V<8>(b, 4), "", b); - Value *p_5 = BinaryOperator::CreateShl(CONST_V<8>(b, 0), CONST_V<8>(b, 5), "", - b); - Value *p_6 = BinaryOperator::CreateShl(zf, CONST_V<8>(b, 6), "", b); - Value *p_7 = BinaryOperator::CreateShl(sf, CONST_V<8>(b, 7), "", b); + auto p_0 = cf; + auto p_1 = llvm::BinaryOperator::CreateShl(CONST_V<8>(b, 1), CONST_V<8>(b, 1), + "", b); + auto p_2 = llvm::BinaryOperator::CreateShl(pf, CONST_V<8>(b, 2), "", b); + auto p_3 = llvm::BinaryOperator::CreateShl(CONST_V<8>(b, 0), CONST_V<8>(b, 3), + "", b); + auto p_4 = llvm::BinaryOperator::CreateShl(af, CONST_V<8>(b, 4), "", b); + auto p_5 = llvm::BinaryOperator::CreateShl(CONST_V<8>(b, 0), CONST_V<8>(b, 5), + "", b); + auto p_6 = llvm::BinaryOperator::CreateShl(zf, CONST_V<8>(b, 6), "", b); + auto p_7 = llvm::BinaryOperator::CreateShl(sf, CONST_V<8>(b, 7), "", b); //OR everything - Value *res = BinaryOperator::CreateOr( - BinaryOperator::CreateOr( - BinaryOperator::CreateOr(BinaryOperator::CreateOr(p_0, p_1, "", b), - p_2, "", b), + auto res = llvm::BinaryOperator::CreateOr( + llvm::BinaryOperator::CreateOr( + llvm::BinaryOperator::CreateOr( + llvm::BinaryOperator::CreateOr(p_0, p_1, "", b), p_2, "", b), p_3, "", b), - BinaryOperator::CreateOr( - BinaryOperator::CreateOr(BinaryOperator::CreateOr(p_4, p_5, "", b), - p_6, "", b), + llvm::BinaryOperator::CreateOr( + llvm::BinaryOperator::CreateOr( + llvm::BinaryOperator::CreateOr(p_4, p_5, "", b), p_6, "", b), p_7, "", b), "", b); @@ -190,117 +185,116 @@ static InstTransResult doLAHF(BasicBlock *b) { return ContinueBlock; } -static InstTransResult doStd(BasicBlock *b) { - +static InstTransResult doStd(llvm::BasicBlock *b) { F_SET(b, DF); - return ContinueBlock; } -static InstTransResult doCld(BasicBlock *b) { - +static InstTransResult doCld(llvm::BasicBlock *b) { F_CLEAR(b, DF); - return ContinueBlock; } -static InstTransResult doStc(BasicBlock *b) { - +static InstTransResult doStc(llvm::BasicBlock *b) { F_SET(b, CF); - return ContinueBlock; } -static InstTransResult doClc(BasicBlock *b) { - +static InstTransResult doClc(llvm::BasicBlock *b) { F_CLEAR(b, CF); - return ContinueBlock; } template -static InstTransResult doLeaV(BasicBlock *&b, const MCOperand &dst, - Value *addrInt) - - { +static InstTransResult doLeaV(llvm::BasicBlock *&b, const llvm::MCOperand &dst, + llvm::Value *addrInt) { //write the address into the register R_WRITE(b, dst.getReg(), addrInt); - return ContinueBlock; } template -static InstTransResult doLea(InstPtr ip, BasicBlock *&b, Value *addr, - const MCOperand &dst) { +static InstTransResult doLea(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *addr, const llvm::MCOperand &dst) { // LEA , TASSERT(addr != NULL, ""); TASSERT(dst.isReg(), ""); //addr is an address, so, convert it to an integer value to write - Type *ty = Type::getIntNTy(b->getContext(), width); - Value *addrInt = addr; + auto ty = llvm::Type::getIntNTy(b->getContext(), width); + auto addrInt = addr; if (addr->getType()->isPointerTy()) { - addrInt = new PtrToIntInst(addr, ty, "", b); + addrInt = new llvm::PtrToIntInst(addr, ty, "", b); } return doLeaV(b, dst, addrInt); } -static InstTransResult doRdtsc(BasicBlock *b) { +static InstTransResult doRdtsc(llvm::BasicBlock *b) { /* write out a call to the RDTSC intrinsic */ - Module *M = b->getParent()->getParent(); + auto M = b->getParent()->getParent(); + auto &C = M->getContext(); //emit an LLVM trap intrinsic //this should be changed to a debugtrap intrinsic eventually - Function *rcc = Intrinsic::getDeclaration(M, Intrinsic::readcyclecounter); - - CallInst::Create(rcc, "", b); - + auto rcc = llvm::Intrinsic::getDeclaration(M, + llvm::Intrinsic::readcyclecounter); + auto ret = llvm::CallInst::Create(rcc, "", b); + auto Int32Ty = llvm::Type::getInt32Ty(C); + auto low = new llvm::TruncInst(ret, Int32Ty, "", b); + auto high = new llvm::TruncInst( + llvm::BinaryOperator::Create(llvm::Instruction::LShr, ret, + llvm::ConstantInt::get(Int32Ty, 32), "", b), + Int32Ty, "", b); + R_WRITE<32>(b, X86::EDX, high); + R_WRITE<32>(b, X86::EAX, low); return ContinueBlock; } -static InstTransResult doAAA(BasicBlock *b) { +static InstTransResult doAAA(llvm::BasicBlock *b) { - Function *F = b->getParent(); + auto F = b->getParent(); + auto &C = F->getContext(); //trueBlock for when ((AL & 0x0F > 9) || (AF == 1)); falseblock otherwise - BasicBlock *trueBlock = BasicBlock::Create(F->getContext(), "", F); - BasicBlock *falseBlock = BasicBlock::Create(F->getContext(), "", F); - BasicBlock *endBlock = BasicBlock::Create(F->getContext(), "", F); + auto trueBlock = llvm::BasicBlock::Create(C, "", F); + auto falseBlock = llvm::BasicBlock::Create(C, "", F); + auto endBlock = llvm::BasicBlock::Create(C, "", F); - Value *al; - Value *af; + llvm::Value *al = nullptr; + llvm::Value *af = nullptr; al = R_READ<8>(b, llvm::X86::AL); af = F_READ(b, AF); // AL & 0x0F - Value *andRes = BinaryOperator::CreateAnd(al, CONST_V<8>(b, 0x0F), "", b); + auto andRes = llvm::BinaryOperator::CreateAnd(al, CONST_V<8>(b, 0x0F), "", b); // ((AL & 0x0F) > 9)? - Value *testRes = new ICmpInst( *b, CmpInst::ICMP_UGT, andRes, - CONST_V<8>(b, 9)); + auto testRes = new llvm::ICmpInst( *b, llvm::CmpInst::ICMP_UGT, andRes, + CONST_V<8>(b, 9)); - Value *orRes = BinaryOperator::CreateOr(testRes, af, "", b); + auto orRes = llvm::BinaryOperator::CreateOr(testRes, af, "", b); - BranchInst::Create(trueBlock, falseBlock, orRes, b); + llvm::BranchInst::Create(trueBlock, falseBlock, orRes, b); //True Block Statements - Value *alRes = BinaryOperator::CreateAdd(al, CONST_V<8>(trueBlock, 6), "", - trueBlock); + llvm::Value *alRes = llvm::BinaryOperator::CreateAdd(al, + CONST_V<8>(trueBlock, 6), + "", trueBlock); R_WRITE<8>(trueBlock, llvm::X86::AL, alRes); - Value *ahRes = BinaryOperator::CreateAdd(R_READ<8>(trueBlock, llvm::X86::AH), - CONST_V<8>(trueBlock, 1), "", - trueBlock); + auto ahRes = llvm::BinaryOperator::CreateAdd( + R_READ<8>(trueBlock, llvm::X86::AH), CONST_V<8>(trueBlock, 1), "", + trueBlock); R_WRITE<8>(trueBlock, llvm::X86::AH, ahRes); F_SET(trueBlock, AF); F_SET(trueBlock, CF); - alRes = BinaryOperator::CreateAnd(alRes, CONST_V<8>(trueBlock, 0x0F), "", - trueBlock); + alRes = llvm::BinaryOperator::CreateAnd(alRes, CONST_V<8>(trueBlock, 0x0F), + "", trueBlock); R_WRITE<8>(trueBlock, llvm::X86::AL, alRes); - BranchInst::Create(endBlock, trueBlock); + llvm::BranchInst::Create(endBlock, trueBlock); //False Block Statements F_CLEAR(falseBlock, AF); @@ -310,7 +304,7 @@ static InstTransResult doAAA(BasicBlock *b) { falseBlock); R_WRITE<8>(falseBlock, llvm::X86::AL, alRes); - BranchInst::Create(endBlock, falseBlock); + llvm::BranchInst::Create(endBlock, falseBlock); F_ZAP(endBlock, OF); F_ZAP(endBlock, SF); @@ -323,49 +317,53 @@ static InstTransResult doAAA(BasicBlock *b) { return ContinueBlock; } -static InstTransResult doAAS(BasicBlock *b) { +static InstTransResult doAAS(llvm::BasicBlock *b) { + + auto F = b->getParent(); + auto &C = F->getContext(); - Function *F = b->getParent(); //trueBlock for when ((AL & 0x0F > 9) || (AF == 1)); falseblock otherwise - BasicBlock *trueBlock = BasicBlock::Create(F->getContext(), "", F); - BasicBlock *falseBlock = BasicBlock::Create(F->getContext(), "", F); - BasicBlock *endBlock = BasicBlock::Create(F->getContext(), "", F); + auto trueBlock = llvm::BasicBlock::Create(C, "", F); + auto falseBlock = llvm::BasicBlock::Create(C, "", F); + auto endBlock = llvm::BasicBlock::Create(C, "", F); - Value *al; - Value *af; + llvm::Value *al = nullptr; + llvm::Value *af = nullptr; al = R_READ<8>(b, llvm::X86::AL); af = F_READ(b, AF); // AL & 0x0F - Value *andRes = BinaryOperator::CreateAnd(al, CONST_V<8>(b, 0x0F), "", b); + llvm::Value *andRes = llvm::BinaryOperator::CreateAnd(al, CONST_V<8>(b, 0x0F), + "", b); // ((AL & 0x0F) > 9)? - Value *testRes = new ICmpInst( *b, CmpInst::ICMP_UGT, andRes, - CONST_V<8>(b, 9)); + llvm::Value *testRes = new llvm::ICmpInst( *b, llvm::CmpInst::ICMP_UGT, + andRes, CONST_V<8>(b, 9)); - Value *orRes = BinaryOperator::CreateOr(testRes, af, "", b); + llvm::Value *orRes = llvm::BinaryOperator::CreateOr(testRes, af, "", b); - BranchInst::Create(trueBlock, falseBlock, orRes, b); + llvm::BranchInst::Create(trueBlock, falseBlock, orRes, b); //True Block Statements - Value *alRes = BinaryOperator::CreateSub(al, CONST_V<8>(trueBlock, 6), "", - trueBlock); + llvm::Value *alRes = llvm::BinaryOperator::CreateSub(al, + CONST_V<8>(trueBlock, 6), + "", trueBlock); R_WRITE<8>(trueBlock, llvm::X86::AL, alRes); - Value *ahRes = BinaryOperator::CreateSub(R_READ<8>(trueBlock, llvm::X86::AH), - CONST_V<8>(trueBlock, 1), "", - trueBlock); + llvm::Value *ahRes = llvm::BinaryOperator::CreateSub( + R_READ<8>(trueBlock, llvm::X86::AH), CONST_V<8>(trueBlock, 1), "", + trueBlock); R_WRITE<8>(trueBlock, llvm::X86::AH, ahRes); F_SET(trueBlock, AF); F_SET(trueBlock, CF); - alRes = BinaryOperator::CreateAnd(alRes, CONST_V<8>(trueBlock, 0x0F), "", - trueBlock); + alRes = llvm::BinaryOperator::CreateAnd(alRes, CONST_V<8>(trueBlock, 0x0F), + "", trueBlock); R_WRITE<8>(trueBlock, llvm::X86::AL, alRes); - BranchInst::Create(endBlock, trueBlock); + llvm::BranchInst::Create(endBlock, trueBlock); //False Block Statements F_CLEAR(falseBlock, AF); @@ -375,7 +373,7 @@ static InstTransResult doAAS(BasicBlock *b) { falseBlock); R_WRITE<8>(falseBlock, llvm::X86::AL, alRes); - BranchInst::Create(endBlock, falseBlock); + llvm::BranchInst::Create(endBlock, falseBlock); F_ZAP(endBlock, OF); F_ZAP(endBlock, SF); @@ -388,16 +386,16 @@ static InstTransResult doAAS(BasicBlock *b) { return ContinueBlock; } -static InstTransResult doAAM(BasicBlock *b) { +static InstTransResult doAAM(llvm::BasicBlock *b) { - Value *al; + llvm::Value *al = nullptr; al = R_READ<8>(b, llvm::X86::AL); - Value *res = BinaryOperator::Create(Instruction::SDiv, al, - CONST_V<8>(b, 0x0A), "", b); - Value *mod = BinaryOperator::Create(Instruction::SRem, al, - CONST_V<8>(b, 0x0A), "", b); + llvm::Value *res = llvm::BinaryOperator::Create(llvm::Instruction::SDiv, al, + CONST_V<8>(b, 0x0A), "", b); + llvm::Value *mod = llvm::BinaryOperator::Create(llvm::Instruction::SRem, al, + CONST_V<8>(b, 0x0A), "", b); R_WRITE<8>(b, llvm::X86::AL, mod); R_WRITE<8>(b, llvm::X86::AH, res); @@ -412,18 +410,18 @@ static InstTransResult doAAM(BasicBlock *b) { return ContinueBlock; } -static InstTransResult doAAD(BasicBlock *b) { +static InstTransResult doAAD(llvm::BasicBlock *b) { - Value *al; - Value *ah; + llvm::Value *al = nullptr; + llvm::Value *ah = nullptr; al = R_READ<8>(b, llvm::X86::AL); ah = R_READ<8>(b, llvm::X86::AH); - Value *tmp = BinaryOperator::Create(Instruction::Mul, ah, CONST_V<8>(b, 0x0A), - "", b); - tmp = BinaryOperator::CreateAdd(tmp, al, "", b); - tmp = BinaryOperator::CreateAnd(tmp, CONST_V<8>(b, 0xFF), "", b); + llvm::Value *tmp = llvm::BinaryOperator::Create(llvm::Instruction::Mul, ah, + CONST_V<8>(b, 0x0A), "", b); + tmp = llvm::BinaryOperator::CreateAdd(tmp, al, "", b); + tmp = llvm::BinaryOperator::CreateAnd(tmp, CONST_V<8>(b, 0xFF), "", b); R_WRITE<8>(b, llvm::X86::AL, tmp); R_WRITE<8>(b, llvm::X86::AH, CONST_V<8>(b, 0x00)); @@ -439,23 +437,24 @@ static InstTransResult doAAD(BasicBlock *b) { } template -static InstTransResult doCwd(BasicBlock *b) { +static InstTransResult doCwd(llvm::BasicBlock *b) { // read ax or eax - Value *ax_val = R_READ(b, llvm::X86::EAX); + llvm::Value *ax_val = R_READ(b, llvm::X86::EAX); // sign extend to twice width - Type *dt = Type::getIntNTy(b->getContext(), width * 2); - Value *tmp = new SExtInst(ax_val, dt, "", b); + auto dt = llvm::Type::getIntNTy(b->getContext(), width * 2); + auto tmp = new llvm::SExtInst(ax_val, dt, "", b); // rotate leftmost bits into rightmost - Type *t = Type::getIntNTy(b->getContext(), width); - Value *res_sh = BinaryOperator::Create(Instruction::LShr, tmp, - CONST_V(b, width), "", b); + auto t = llvm::Type::getIntNTy(b->getContext(), width); + auto res_sh = llvm::BinaryOperator::Create(llvm::Instruction::LShr, tmp, + CONST_V(b, width), "", + b); // original rightmost - Value *wrAX = new TruncInst(tmp, t, "", b); + auto wrAX = new llvm::TruncInst(tmp, t, "", b); // original leftmost - Value *wrDX = new TruncInst(res_sh, t, "", b); + auto wrDX = new llvm::TruncInst(res_sh, t, "", b); switch (width) { case 16: R_WRITE(b, llvm::X86::DX, wrDX); @@ -477,9 +476,9 @@ static InstTransResult doCwd(BasicBlock *b) { } -static InstTransResult translate_SAHF(NativeModulePtr natM, BasicBlock *&block, - InstPtr ip, MCInst &inst) { - Value *ah_val = R_READ<8>(block, llvm::X86::AH); +static InstTransResult translate_SAHF(TranslationContext &ctx, + llvm::BasicBlock *&block) { + auto ah_val = R_READ<8>(block, llvm::X86::AH); SHR_SET_FLAG<8, 1>(block, ah_val, CF, 0); // bit 1 is reserved @@ -494,8 +493,8 @@ static InstTransResult translate_SAHF(NativeModulePtr natM, BasicBlock *&block, } template -static InstTransResult doBtmi(InstPtr ip, BasicBlock *&b, Value *base, - const MCOperand &index) { +static InstTransResult doBtmi(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *base, const llvm::MCOperand &index) { TASSERT(index.isImm(), "Operand must be an immediate"); int imm = index.getImm(); @@ -506,54 +505,53 @@ static InstTransResult doBtmi(InstPtr ip, BasicBlock *&b, Value *base, whichbit *= -1; } - Value *addrInt = base; + auto addrInt = base; if (base->getType()->isPointerTy()) { - addrInt = new PtrToIntInst(base, - llvm::Type::getIntNTy(b->getContext(), width), - "", b); + addrInt = new llvm::PtrToIntInst( + base, llvm::Type::getIntNTy(b->getContext(), width), "", b); } // pick which byte we need to bit test - Value *new_base = BinaryOperator::Create(Instruction::Add, addrInt, - CONST_V(b, bytes_offt), "", - b); + auto new_base = llvm::BinaryOperator::Create(llvm::Instruction::Add, addrInt, + CONST_V(b, bytes_offt), + "", b); - Value *base_val = M_READ<8>(ip, b, new_base); + auto base_val = M_READ<8>(ip, b, new_base); SHR_SET_FLAG_V<8, 1>(b, base_val, CF, CONST_V<8>(b, whichbit)); return ContinueBlock; } template -static InstTransResult doBtri(BasicBlock *&b, const MCOperand &base, - const MCOperand &index) { +static InstTransResult doBtri(llvm::BasicBlock *&b, const llvm::MCOperand &base, + const llvm::MCOperand &index) { TASSERT(base.isReg(), "Operand must be an immediate"); TASSERT(index.isImm(), "Operand must be an immediate"); unsigned whichbit = index.getImm(); whichbit %= width; - Value *base_val = R_READ(b, base.getReg()); + auto base_val = R_READ(b, base.getReg()); SHR_SET_FLAG_V(b, base_val, CF, CONST_V(b, whichbit)); return ContinueBlock; } template -static InstTransResult doBtrr(BasicBlock *&b, const MCOperand &base, - const MCOperand &index) { +static InstTransResult doBtrr(llvm::BasicBlock *&b, const llvm::MCOperand &base, + const llvm::MCOperand &index) { TASSERT(base.isReg(), "operand must be register"); TASSERT(index.isReg(), "operand must be register"); - Value *base_val = R_READ(b, base.getReg()); - Value *index_val = R_READ(b, index.getReg()); + auto base_val = R_READ(b, base.getReg()); + auto index_val = R_READ(b, index.getReg()); // modulo the index by register size - Value *index_mod = BinaryOperator::CreateURem(index_val, - CONST_V(b, width), "", - b); + auto index_mod = llvm::BinaryOperator::CreateURem(index_val, + CONST_V(b, width), + "", b); SHR_SET_FLAG_V(b, base_val, CF, index_mod); @@ -561,27 +559,30 @@ static InstTransResult doBtrr(BasicBlock *&b, const MCOperand &base, } template -static InstTransResult doBTSri(BasicBlock *&b, const MCOperand &base, - const MCOperand &index) { +static InstTransResult doBTSri(llvm::BasicBlock *&b, + const llvm::MCOperand &base, + const llvm::MCOperand &index) { TASSERT(base.isReg(), "Operand must be an immediate"); TASSERT(index.isImm(), "Operand must be an immediate"); unsigned whichbit = index.getImm(); whichbit %= width; - Value *base_val = R_READ(b, base.getReg()); + auto base_val = R_READ(b, base.getReg()); SHR_SET_FLAG_V(b, base_val, CF, CONST_V(b, whichbit)); - auto new_base_val = BinaryOperator::Create( - Instruction::Or, base_val, CONST_V(b, 1ULL << whichbit), "", b); + auto new_base_val = llvm::BinaryOperator::Create( + llvm::Instruction::Or, base_val, CONST_V(b, 1ULL << whichbit), "", + b); R_WRITE(b, base.getReg(), new_base_val); return ContinueBlock; } template -static InstTransResult doBTSmi(InstPtr ip, BasicBlock *&b, Value *base, - const MCOperand &index) { +static InstTransResult doBTSmi(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *base, + const llvm::MCOperand &index) { TASSERT(index.isImm(), "Operand must be an immediate"); int imm = index.getImm(); @@ -592,33 +593,34 @@ static InstTransResult doBTSmi(InstPtr ip, BasicBlock *&b, Value *base, whichbit *= -1; } - Value *addrInt = base; + auto addrInt = base; if (base->getType()->isPointerTy()) { - addrInt = new PtrToIntInst(base, - llvm::Type::getIntNTy(b->getContext(), width), - "", b); + addrInt = new llvm::PtrToIntInst( + base, llvm::Type::getIntNTy(b->getContext(), width), "", b); } // pick which byte we need to bit test - Value *new_base = BinaryOperator::Create(Instruction::Add, addrInt, - CONST_V(b, bytes_offt), "", - b); + auto new_base = llvm::BinaryOperator::Create(llvm::Instruction::Add, addrInt, + CONST_V(b, bytes_offt), + "", b); - Value *base_val = M_READ<8>(ip, b, new_base); + auto base_val = M_READ<8>(ip, b, new_base); SHR_SET_FLAG_V<8, 1>(b, base_val, CF, CONST_V<8>(b, whichbit)); - auto new_base_val = BinaryOperator::Create(Instruction::Or, base_val, - CONST_V<8>(b, 1 << whichbit), "", - b); + auto new_base_val = llvm::BinaryOperator::Create(llvm::Instruction::Or, + base_val, + CONST_V<8>(b, 1 << whichbit), + "", b); M_WRITE<8>(ip, b, new_base, new_base_val); return ContinueBlock; } template -static InstTransResult doBTRmi(InstPtr ip, BasicBlock *&b, Value *base, - const MCOperand &index) { +static InstTransResult doBTRmi(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *base, + const llvm::MCOperand &index) { TASSERT(index.isImm(), "Operand must be an immediate"); int imm = index.getImm(); @@ -629,25 +631,24 @@ static InstTransResult doBTRmi(InstPtr ip, BasicBlock *&b, Value *base, whichbit *= -1; } - Value *addrInt = base; + auto addrInt = base; if (base->getType()->isPointerTy()) { - addrInt = new PtrToIntInst(base, - llvm::Type::getIntNTy(b->getContext(), width), - "", b); + addrInt = new llvm::PtrToIntInst( + base, llvm::Type::getIntNTy(b->getContext(), width), "", b); } // pick which byte we need to bit test - Value *new_base = BinaryOperator::Create(Instruction::Add, addrInt, - CONST_V(b, bytes_offt), "", - b); + auto new_base = llvm::BinaryOperator::Create(llvm::Instruction::Add, addrInt, + CONST_V(b, bytes_offt), + "", b); - Value *base_val = M_READ<8>(ip, b, new_base); + auto base_val = M_READ<8>(ip, b, new_base); SHR_SET_FLAG_V<8, 1>(b, base_val, CF, CONST_V<8>(b, whichbit)); - auto new_base_val = BinaryOperator::Create(Instruction::And, base_val, - CONST_V<8>(b, ~(1ULL << whichbit)), - "", b); + auto new_base_val = llvm::BinaryOperator::Create( + llvm::Instruction::And, base_val, CONST_V<8>(b, ~(1ULL << whichbit)), "", + b); M_WRITE<8>(ip, b, new_base, new_base_val); @@ -655,38 +656,38 @@ static InstTransResult doBTRmi(InstPtr ip, BasicBlock *&b, Value *base, } template -static InstTransResult doBsrr(BasicBlock *&b, const MCOperand &dst, - const MCOperand &src) { +static InstTransResult doBsrr(llvm::BasicBlock *&b, const llvm::MCOperand &dst, + const llvm::MCOperand &src) { TASSERT(dst.isReg(), "operand must be register"); TASSERT(src.isReg(), "operand must be register"); - Value *src_val = R_READ(b, src.getReg()); + auto src_val = R_READ(b, src.getReg()); - Type *s[1] = {Type::getIntNTy(b->getContext(), width)}; - Function *ctlzFn = Intrinsic::getDeclaration(b->getParent()->getParent(), - Intrinsic::ctlz, s); + llvm::Type *s[] = {llvm::Type::getIntNTy(b->getContext(), width)}; + auto ctlzFn = Intrinsic::getDeclaration(b->getParent()->getParent(), + Intrinsic::ctlz, s); TASSERT(ctlzFn != NULL, "Could not find ctlz intrinsic"); - vector ctlzArgs; + std::vector ctlzArgs; ctlzArgs.push_back(src_val); ctlzArgs.push_back(CONST_V<1>(b, 0)); - Value *ctlz = CallInst::Create(ctlzFn, ctlzArgs, "", b); + auto ctlz = llvm::CallInst::Create(ctlzFn, ctlzArgs, "", b); - Value *index_of_first_1 = BinaryOperator::CreateSub(CONST_V(b, width), - ctlz, "", b); + auto index_of_first_1 = llvm::BinaryOperator::CreateSub( + CONST_V(b, width), ctlz, "", b); - Value *is_zero = new ICmpInst( *b, CmpInst::ICMP_EQ, CONST_V(b, 0), - index_of_first_1); + auto is_zero = new llvm::ICmpInst( *b, llvm::CmpInst::ICMP_EQ, + CONST_V(b, 0), index_of_first_1); F_WRITE(b, ZF, is_zero); - Value *fix_index = BinaryOperator::CreateSub(index_of_first_1, - CONST_V(b, 1), "", b); + auto fix_index = llvm::BinaryOperator::CreateSub(index_of_first_1, + CONST_V(b, 1), "", b); // See if we write to register - Value *save_index = SelectInst::Create(is_zero, // check if the source was zero + auto save_index = llvm::SelectInst::Create(is_zero, // check if the source was zero src_val, // if it was, do not change contents fix_index, // if it was not, set index "", b); @@ -697,31 +698,32 @@ static InstTransResult doBsrr(BasicBlock *&b, const MCOperand &dst, } template -static InstTransResult doBsfrm(InstPtr ip, BasicBlock *&b, const MCOperand &dst, - Value *memAddr) { +static InstTransResult doBsfrm(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + llvm::Value *memAddr) { TASSERT(dst.isReg(), "operand must be register"); - Value *src_val = M_READ(ip, b, memAddr); + auto src_val = M_READ(ip, b, memAddr); - Type *s[1] = {Type::getIntNTy(b->getContext(), width)}; - Function *cttzFn = Intrinsic::getDeclaration(b->getParent()->getParent(), - Intrinsic::cttz, s); + llvm::Type *s[] = {llvm::Type::getIntNTy(b->getContext(), width)}; + auto cttzFn = Intrinsic::getDeclaration(b->getParent()->getParent(), + Intrinsic::cttz, s); TASSERT(cttzFn != NULL, "Could not find cttz intrinsic"); - vector cttzArgs; + std::vector cttzArgs; cttzArgs.push_back(src_val); cttzArgs.push_back(CONST_V<1>(b, 0)); - Value *cttz = CallInst::Create(cttzFn, cttzArgs, "", b); + auto cttz = llvm::CallInst::Create(cttzFn, cttzArgs, "", b); - Value *is_zero = new ICmpInst( *b, CmpInst::ICMP_EQ, CONST_V(b, width), - cttz); + auto is_zero = new llvm::ICmpInst( *b, llvm::CmpInst::ICMP_EQ, + CONST_V(b, width), cttz); F_WRITE(b, ZF, is_zero); // See if we write to register - Value *save_index = SelectInst::Create(is_zero, // check if the source was zero + auto save_index = llvm::SelectInst::Create(is_zero, // check if the source was zero src_val, // if it was, do not change contents cttz, // if it was not, set index "", b); @@ -732,32 +734,32 @@ static InstTransResult doBsfrm(InstPtr ip, BasicBlock *&b, const MCOperand &dst, } template -static InstTransResult doBsfr(BasicBlock *&b, const MCOperand &dst, - const MCOperand &src) { +static InstTransResult doBsfr(llvm::BasicBlock *&b, const llvm::MCOperand &dst, + const llvm::MCOperand &src) { TASSERT(dst.isReg(), "operand must be register"); TASSERT(src.isReg(), "operand must be register"); - Value *src_val = R_READ(b, src.getReg()); + auto src_val = R_READ(b, src.getReg()); - Type *s[1] = {Type::getIntNTy(b->getContext(), width)}; - Function *cttzFn = Intrinsic::getDeclaration(b->getParent()->getParent(), - Intrinsic::cttz, s); + llvm::Type *s[] = {llvm::Type::getIntNTy(b->getContext(), width)}; + auto cttzFn = Intrinsic::getDeclaration(b->getParent()->getParent(), + Intrinsic::cttz, s); TASSERT(cttzFn != NULL, "Could not find cttz intrinsic"); - vector cttzArgs; + std::vector cttzArgs; cttzArgs.push_back(src_val); cttzArgs.push_back(CONST_V<1>(b, 0)); - Value *cttz = CallInst::Create(cttzFn, cttzArgs, "", b); + auto cttz = llvm::CallInst::Create(cttzFn, cttzArgs, "", b); - Value *is_zero = new ICmpInst( *b, CmpInst::ICMP_EQ, CONST_V(b, width), - cttz); + auto is_zero = new llvm::ICmpInst( *b, llvm::CmpInst::ICMP_EQ, + CONST_V(b, width), cttz); F_WRITE(b, ZF, is_zero); // See if we write to register - Value *save_index = SelectInst::Create(is_zero, // check if the source was zero + auto save_index = llvm::SelectInst::Create(is_zero, // check if the source was zero src_val, // if it was, do not change contents cttz, // if it was not, set index "", b); @@ -786,24 +788,27 @@ GENERIC_TRANSLATION_REF(LEA16r, doLea<16>(ip, block, ADDR_NOREF(1), OP(0)), doLea<16>(ip, block, MEM_REFERENCE(1), OP(0))) template -static InstTransResult doLeaRef(NativeModulePtr natM, BasicBlock *&block, - InstPtr ip, MCInst &inst) { +static InstTransResult doLeaRef(TranslationContext &ctx, + llvm::BasicBlock *&block) { InstTransResult ret; - Function *F = block->getParent(); + auto F = block->getParent(); + auto ip = ctx.natI; + auto &inst = ip->get_inst(); + auto natM = ctx.natM; if (ip->has_code_ref()) { - Inst::CFGOpType optype; + NativeInst::CFGOpType optype; if (ip->has_mem_reference) { - optype = Inst::MEMRef; + optype = NativeInst::MEMRef; } else if (ip->has_imm_reference) { - optype = Inst::IMMRef; + optype = NativeInst::IMMRef; } else { throw TErr(__LINE__, __FILE__, "Have code ref but no reference"); } - Value *callback_fn = ArchAddCallbackDriver(block->getParent()->getParent(), - ip->get_reference(optype)); - Value *addrInt = new PtrToIntInst( + auto callback_fn = ArchAddCallbackDriver(block->getParent()->getParent(), + ip->get_reference(optype)); + auto addrInt = new llvm::PtrToIntInst( callback_fn, llvm::Type::getIntNTy(block->getContext(), width), "", block); ret = doLeaV(block, OP(0), addrInt); @@ -817,29 +822,26 @@ static InstTransResult doLeaRef(NativeModulePtr natM, BasicBlock *&block, } return ret; } -static InstTransResult translate_LEA32r(NativeModulePtr natM, - BasicBlock *&block, InstPtr ip, - MCInst &inst) { - return doLeaRef<32>(natM, block, ip, inst); + +static InstTransResult translate_LEA32r(TranslationContext &ctx, + llvm::BasicBlock *&block) { + return doLeaRef<32>(ctx, block); } -static InstTransResult translate_LEA64r(NativeModulePtr natM, - BasicBlock *&block, InstPtr ip, - MCInst &inst) { - return doLeaRef<64>(natM, block, ip, inst); +static InstTransResult translate_LEA64r(TranslationContext &ctx, + llvm::BasicBlock *&block) { + return doLeaRef<64>(ctx, block); } -static InstTransResult translate_LEA64_32r(NativeModulePtr natM, - BasicBlock *&block, InstPtr ip, - MCInst &inst) { - return doLeaRef<32>(natM, block, ip, inst); +static InstTransResult translate_LEA64_32r(TranslationContext &ctx, + llvm::BasicBlock *&block) { + return doLeaRef<32>(ctx, block); } -static InstTransResult translate_CPUID32(NativeModulePtr natM, - BasicBlock *&block, InstPtr ip, - MCInst &inst) { - Value *eax = R_READ<32>(block, llvm::X86::EAX); - Value *ecx = R_READ<32>(block, llvm::X86::ECX); +static InstTransResult translate_CPUID32(TranslationContext &ctx, + llvm::BasicBlock *&block) { + auto eax = R_READ<32>(block, llvm::X86::EAX); + auto ecx = R_READ<32>(block, llvm::X86::ECX); CREATE_BLOCK(b0, block); CREATE_BLOCK(b1, block); @@ -862,8 +864,7 @@ static InstTransResult translate_CPUID32(NativeModulePtr natM, CREATE_BLOCK(eax11_b1, block_b11); CREATE_BLOCK(eax11_bdefault, block_b11); - llvm::SwitchInst *si = llvm::SwitchInst::Create(eax, block_bdefault, 7, - block); + auto si = llvm::SwitchInst::Create(eax, block_bdefault, 7, block); // 32-bit CPUID values taken by sampling from a live CPU diff --git a/mc-sema/cfgToLLVM/x86Instrs_SETcc.cpp b/mc-sema/cfgToLLVM/x86Instrs_SETcc.cpp index 7e5dd4151..db185197f 100644 --- a/mc-sema/cfgToLLVM/x86Instrs_SETcc.cpp +++ b/mc-sema/cfgToLLVM/x86Instrs_SETcc.cpp @@ -1,31 +1,32 @@ /* -Copyright (c) 2014, Trail of Bits -All rights reserved. + Copyright (c) 2014, Trail of Bits + All rights reserved. -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: + Redistribution and use in source and binary forms, with or without modification, + are permitted provided that the following conditions are met: - Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. + Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. - Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. + Redistributions in binary form must reproduce the above copyright notice, this + list of conditions and the following disclaimer in the documentation and/or + other materials provided with the distribution. - Neither the name of Trail of Bits nor the names of its - contributors may be used to endorse or promote products derived from - this software without specific prior written permission. + Neither the name of Trail of Bits nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ #include "InstructionDispatch.h" #include "toLLVM.h" #include "X86.h" @@ -33,261 +34,222 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #include "x86Helpers.h" #include "x86Instrs_SETcc.h" -using namespace llvm; +static llvm::Value *doSetaV(NativeInstPtr ip, llvm::BasicBlock *&b) { -static Value *doSetaV(InstPtr ip, BasicBlock *&b) -{ + // set 1 if CF==0 && ZF==0 + // else, set 0 + auto cf_val = F_READ(b, CF); + auto zf_val = F_READ(b, ZF); - // set 1 if CF==0 && ZF==0 - // else, set 0 - Value *cf_val = F_READ(b, CF); - Value *zf_val = F_READ(b, ZF); + // cf|zf == 0 iff cf == 0 && zf == 0 + auto f_or = llvm::BinaryOperator::CreateOr(cf_val, zf_val, "", b); - // cf|zf == 0 iff cf == 0 && zf == 0 - Value *f_or = - BinaryOperator::CreateOr(cf_val, zf_val, "", b); + // to_set will be 1 iff cf == 0 && zf == 0 + auto to_set = llvm::BinaryOperator::CreateNot(f_or, "", b); - // to_set will be 1 iff cf == 0 && zf == 0 - Value *to_set = BinaryOperator::CreateNot(f_or, "", b); - - // zero extend to desired width - Value *ext_to_set = new ZExtInst(to_set, Type::getIntNTy(b->getContext(), 8), "", b); - - return ext_to_set; + // zero extend to desired width + return new llvm::ZExtInst(to_set, llvm::Type::getIntNTy(b->getContext(), 8), + "", b); } -static Value *doSetbV(InstPtr ip, BasicBlock *&b) -{ - // setb == set if cf == 1 - // essentially, read CF - Value *cf_val = F_READ(b, CF); +static llvm::Value *doSetbV(NativeInstPtr ip, llvm::BasicBlock *&b) { + // setb == set if cf == 1 + // essentially, read CF + auto cf_val = F_READ(b, CF); - // zero extend to desired width - Value *ext_to_set = new ZExtInst(cf_val, Type::getIntNTy(b->getContext(), 8), "", b); - - return ext_to_set; + // zero extend to desired width + return new llvm::ZExtInst(cf_val, llvm::Type::getIntNTy(b->getContext(), 8), + "", b); } -static Value *doSetsV(InstPtr ip, BasicBlock *&b) -{ - // sets == set if sf == 1 - // essentially, read SF - Value *sf_val = F_READ(b, SF); +static llvm::Value *doSetsV(NativeInstPtr ip, llvm::BasicBlock *&b) { + // sets == set if sf == 1 + // essentially, read SF + auto sf_val = F_READ(b, SF); - // zero extend to desired width - Value *ext_to_set = new ZExtInst(sf_val, Type::getIntNTy(b->getContext(), 8), "", b); - - return ext_to_set; + // zero extend to desired width + return new llvm::ZExtInst(sf_val, llvm::Type::getIntNTy(b->getContext(), 8), + "", b); } // set if CF==0 -static Value *doSetaeV(InstPtr ip, BasicBlock *&b) -{ - //read CF - Value *cf_val = F_READ(b, CF); +static llvm::Value *doSetaeV(NativeInstPtr ip, llvm::BasicBlock *&b) { + //read CF + auto cf_val = F_READ(b, CF); - //compare to 0 - Value *cmp_res = - new ICmpInst(*b, CmpInst::ICMP_EQ, cf_val, CONST_V<1>(b,0)); + //compare to 0 + auto cmp_res = new llvm::ICmpInst( *b, llvm::CmpInst::ICMP_EQ, cf_val, + CONST_V<1>(b, 0)); - //extend result to 8 bits - Value *res = new ZExtInst(cmp_res, Type::getInt8Ty(b->getContext()), "", b); - - return res; + //extend result to 8 bits + return new llvm::ZExtInst(cmp_res, llvm::Type::getInt8Ty(b->getContext()), "", + b); } -static Value *doSetneV(InstPtr ip, BasicBlock *&b) -{ - //read ZF - Value *zf_val = F_READ(b, ZF); +static llvm::Value *doSetneV(NativeInstPtr ip, llvm::BasicBlock *&b) { + //read ZF + auto zf_val = F_READ(b, ZF); - //compare to 0 - Value *cmp_res = - new ICmpInst(*b, CmpInst::ICMP_EQ, zf_val, CONST_V<1>(b,0)); + //compare to 0 + auto cmp_res = new llvm::ICmpInst( *b, llvm::CmpInst::ICMP_EQ, zf_val, + CONST_V<1>(b, 0)); - //extend result to 8 bits - Value *res = new ZExtInst(cmp_res, Type::getInt8Ty(b->getContext()), "", b); - - return res; + //extend result to 8 bits + return new llvm::ZExtInst(cmp_res, llvm::Type::getInt8Ty(b->getContext()), "", + b); } -static Value *doSeteV(InstPtr ip, BasicBlock *&b) -{ - //read ZF - Value *zf_val = F_READ(b, ZF); +static llvm::Value *doSeteV(NativeInstPtr ip, llvm::BasicBlock *&b) { + //read ZF + auto zf_val = F_READ(b, ZF); - //compare to not 0 - Value *cmp_res = - new ICmpInst(*b, CmpInst::ICMP_NE, zf_val, CONST_V<1>(b,0)); + //compare to not 0 + auto cmp_res = new llvm::ICmpInst( *b, llvm::CmpInst::ICMP_NE, zf_val, + CONST_V<1>(b, 0)); - //extend result to 8 bits - Value *res = new ZExtInst(cmp_res, Type::getInt8Ty(b->getContext()), "", b); - - return res; + //extend result to 8 bits + return new llvm::ZExtInst(cmp_res, llvm::Type::getInt8Ty(b->getContext()), "", + b); } // setge: of == sf -static Value *doSetgeV(InstPtr ip, BasicBlock *&b) -{ - Value *sf_val = F_READ(b, SF); - Value *of_val = F_READ(b, OF); +static llvm::Value *doSetgeV(NativeInstPtr ip, llvm::BasicBlock *&b) { + auto sf_val = F_READ(b, SF); + auto of_val = F_READ(b, OF); - //compare of == sf - Value *cmp_res = - new ICmpInst(*b, CmpInst::ICMP_EQ, sf_val, of_val); + //compare of == sf + auto cmp_res = new llvm::ICmpInst( *b, llvm::CmpInst::ICMP_EQ, sf_val, + of_val); - //extend result to 8 bits - Value *res = new ZExtInst(cmp_res, Type::getInt8Ty(b->getContext()), "", b); - - return res; + //extend result to 8 bits + return new llvm::ZExtInst(cmp_res, llvm::Type::getInt8Ty(b->getContext()), "", + b); } // setg: of == sf && ZF==0 -static Value *doSetgV(InstPtr ip, BasicBlock *&b) -{ - Value *sf_val = F_READ(b, SF); - Value *of_val = F_READ(b, OF); - Value *zf_val = F_READ(b, ZF); +static llvm::Value *doSetgV(NativeInstPtr ip, llvm::BasicBlock *&b) { + auto sf_val = F_READ(b, SF); + auto of_val = F_READ(b, OF); + auto zf_val = F_READ(b, ZF); - //compare of == sf - Value *cmp0_res = - new ICmpInst(*b, CmpInst::ICMP_EQ, sf_val, of_val); + //compare of == sf + auto cmp0_res = new llvm::ICmpInst( *b, llvm::CmpInst::ICMP_EQ, sf_val, + of_val); - // if ZF == 0, NOT ZF == 1 - Value *not_zf = BinaryOperator::CreateNot(zf_val, "", b); + // if ZF == 0, NOT ZF == 1 + auto not_zf = llvm::BinaryOperator::CreateNot(zf_val, "", b); - // final result: - // (sf==of) & (not zf) - Value *cmp_res = - BinaryOperator::CreateAnd(cmp0_res, not_zf, "", b); + // final result: + // (sf==of) & (not zf) + auto cmp_res = llvm::BinaryOperator::CreateAnd(cmp0_res, not_zf, "", b); - - //extend result to 8 bits - Value *res = new ZExtInst(cmp_res, Type::getInt8Ty(b->getContext()), "", b); - - return res; + //extend result to 8 bits + return new llvm::ZExtInst(cmp_res, llvm::Type::getInt8Ty(b->getContext()), "", + b); } // setle: of != sf || ZF==1 -static Value *doSetleV(InstPtr ip, BasicBlock *&b) -{ - Value *sf_val = F_READ(b, SF); - Value *of_val = F_READ(b, OF); - Value *zf_val = F_READ(b, ZF); +static llvm::Value *doSetleV(NativeInstPtr ip, llvm::BasicBlock *&b) { + auto sf_val = F_READ(b, SF); + auto of_val = F_READ(b, OF); + auto zf_val = F_READ(b, ZF); - //compare of == sf - Value *cmp0_res = - new ICmpInst(*b, CmpInst::ICMP_NE, sf_val, of_val); + //compare of == sf + auto cmp0_res = new llvm::ICmpInst( *b, llvm::CmpInst::ICMP_NE, sf_val, + of_val); - // final result: - // (sf!=of) | (zf) - Value *cmp_res = - BinaryOperator::CreateOr(cmp0_res, zf_val, "", b); + // final result: + // (sf!=of) | (zf) + auto cmp_res = llvm::BinaryOperator::CreateOr(cmp0_res, zf_val, "", b); - - //extend result to 8 bits - Value *res = new ZExtInst(cmp_res, Type::getInt8Ty(b->getContext()), "", b); - - return res; + //extend result to 8 bits + return new llvm::ZExtInst(cmp_res, llvm::Type::getInt8Ty(b->getContext()), "", + b); } // setge: of != sf -static Value *doSetlV(InstPtr ip, BasicBlock *&b) -{ - Value *sf_val = F_READ(b, SF); - Value *of_val = F_READ(b, OF); +static llvm::Value *doSetlV(NativeInstPtr ip, llvm::BasicBlock *&b) { + auto sf_val = F_READ(b, SF); + auto of_val = F_READ(b, OF); - //compare of != sf - Value *cmp_res = - new ICmpInst(*b, CmpInst::ICMP_NE, sf_val, of_val); + //compare of != sf + auto cmp_res = new llvm::ICmpInst( *b, llvm::CmpInst::ICMP_NE, sf_val, + of_val); - //extend result to 8 bits - Value *res = new ZExtInst(cmp_res, Type::getInt8Ty(b->getContext()), "", b); - - return res; + //extend result to 8 bits + return new llvm::ZExtInst(cmp_res, llvm::Type::getInt8Ty(b->getContext()), "", + b); } - //setbe: cf==1 or zf==1 -static Value *doSetbeV(InstPtr ip, BasicBlock *&b) -{ - Value *cf_val = F_READ(b, CF); - Value *zf_val = F_READ(b, ZF); +static llvm::Value *doSetbeV(NativeInstPtr ip, llvm::BasicBlock *&b) { + auto cf_val = F_READ(b, CF); + auto zf_val = F_READ(b, ZF); - // final result: - // result = cf | zf - Value *cmp_res = - BinaryOperator::CreateOr(cf_val, zf_val, "", b); + // final result: + // result = cf | zf + auto cmp_res = llvm::BinaryOperator::CreateOr(cf_val, zf_val, "", b); - - //extend result to 8 bits - Value *res = new ZExtInst(cmp_res, Type::getInt8Ty(b->getContext()), "", b); - - return res; + //extend result to 8 bits + return new llvm::ZExtInst(cmp_res, llvm::Type::getInt8Ty(b->getContext()), "", + b); } // set if pf == 0 -static Value *doSetnpV(InstPtr ip, BasicBlock *&b) -{ - //read PF - Value *pf_val = F_READ(b, PF); +static llvm::Value *doSetnpV(NativeInstPtr ip, llvm::BasicBlock *&b) { + //read PF + auto pf_val = F_READ(b, PF); - //compare to 0 - Value *cmp_res = - new ICmpInst(*b, CmpInst::ICMP_EQ, pf_val, CONST_V<1>(b,0)); + //compare to 0 + auto cmp_res = new llvm::ICmpInst( *b, llvm::CmpInst::ICMP_EQ, pf_val, + CONST_V<1>(b, 0)); - //extend result to 8 bits - Value *res = new ZExtInst(cmp_res, Type::getInt8Ty(b->getContext()), "", b); - - return res; + //extend result to 8 bits + return new llvm::ZExtInst(cmp_res, llvm::Type::getInt8Ty(b->getContext()), "", + b); } // set if pf == 1 -static Value *doSetpV(InstPtr ip, BasicBlock *&b) -{ - //read PF - Value *pf_val = F_READ(b, PF); +static llvm::Value *doSetpV(NativeInstPtr ip, llvm::BasicBlock *&b) { + //read PF + auto pf_val = F_READ(b, PF); - //compare to 0 - Value *cmp_res = - new ICmpInst(*b, CmpInst::ICMP_EQ, pf_val, CONST_V<1>(b,1)); + //compare to 0 + auto cmp_res = new llvm::ICmpInst( *b, llvm::CmpInst::ICMP_EQ, pf_val, + CONST_V<1>(b, 1)); - //extend result to 8 bits - Value *res = new ZExtInst(cmp_res, Type::getInt8Ty(b->getContext()), "", b); - - return res; + //extend result to 8 bits + return new llvm::ZExtInst(cmp_res, llvm::Type::getInt8Ty(b->getContext()), "", + b); } // set if sf == 0 -static Value *doSetnsV(InstPtr ip, BasicBlock *&b) -{ - //read SF - Value *sf_val = F_READ(b, SF); +static llvm::Value *doSetnsV(NativeInstPtr ip, llvm::BasicBlock *&b) { + //read SF + auto sf_val = F_READ(b, SF); - //compare to 0 - Value *cmp_res = - new ICmpInst(*b, CmpInst::ICMP_EQ, sf_val, CONST_V<1>(b,0)); + //compare to 0 + auto cmp_res = new llvm::ICmpInst( *b, llvm::CmpInst::ICMP_EQ, sf_val, + CONST_V<1>(b, 0)); - //extend result to 8 bits - Value *res = new ZExtInst(cmp_res, Type::getInt8Ty(b->getContext()), "", b); - - return res; + //extend result to 8 bits + return new llvm::ZExtInst(cmp_res, llvm::Type::getInt8Ty(b->getContext()), "", + b); } - // SETcc always operate on 8bit quantities -#define DO_SETCC_OP_REG(NAME) static InstTransResult do ## NAME ## R(InstPtr ip, BasicBlock *&b, const MCOperand ®) \ +#define DO_SETCC_OP_REG(NAME) static InstTransResult do ## NAME ## R(NativeInstPtr ip, llvm::BasicBlock *&b, const llvm::MCOperand ®) \ { \ TASSERT(reg.isReg(), "");\ - Value *val_to_set = do ## NAME ## V(ip, b); \ + auto val_to_set = do ## NAME ## V(ip, b); \ R_WRITE<8>(b, reg.getReg(), val_to_set); \ return ContinueBlock; \ } -#define DO_SETCC_OP_MEM(NAME) static InstTransResult do ## NAME ## M(InstPtr ip, BasicBlock *&b, Value *addr) \ +#define DO_SETCC_OP_MEM(NAME) static InstTransResult do ## NAME ## M(NativeInstPtr ip, llvm::BasicBlock *&b, llvm::Value *addr) \ { \ TASSERT(addr != NULL, ""); \ - Value *val_to_set = do ## NAME ## V(ip ,b); \ + auto val_to_set = do ## NAME ## V(ip ,b); \ M_WRITE<8>(ip, b, addr, val_to_set); \ return ContinueBlock; \ } @@ -321,95 +283,81 @@ DO_SETCC_OP_MEM(Setns) DO_SETCC_OP_REG(Setp) DO_SETCC_OP_MEM(Setp) -GENERIC_TRANSLATION_REF(SETAm, - doSetaM(ip, block, ADDR_NOREF(0)), - doSetaM(ip, block, MEM_REFERENCE(0))) +GENERIC_TRANSLATION_REF(SETAm, doSetaM(ip, block, ADDR_NOREF(0)), + doSetaM(ip, block, MEM_REFERENCE(0))) GENERIC_TRANSLATION(SETAr, doSetaR(ip, block, OP(0))) -GENERIC_TRANSLATION_REF(SETBm, - doSetbM(ip, block, ADDR_NOREF(0)), - doSetbM(ip, block, MEM_REFERENCE(0))) +GENERIC_TRANSLATION_REF(SETBm, doSetbM(ip, block, ADDR_NOREF(0)), + doSetbM(ip, block, MEM_REFERENCE(0))) GENERIC_TRANSLATION(SETBr, doSetbR(ip, block, OP(0))) GENERIC_TRANSLATION(SETNEr, doSetneR(ip, block, OP(0))) -GENERIC_TRANSLATION_REF(SETNEm, - doSetneM(ip, block, ADDR_NOREF(0)), - doSetneM(ip, block, MEM_REFERENCE(0))) +GENERIC_TRANSLATION_REF(SETNEm, doSetneM(ip, block, ADDR_NOREF(0)), + doSetneM(ip, block, MEM_REFERENCE(0))) GENERIC_TRANSLATION(SETEr, doSeteR(ip, block, OP(0))) -GENERIC_TRANSLATION_REF(SETEm, - doSeteM(ip, block, ADDR_NOREF(0)), - doSeteM(ip, block, MEM_REFERENCE(0))) +GENERIC_TRANSLATION_REF(SETEm, doSeteM(ip, block, ADDR_NOREF(0)), + doSeteM(ip, block, MEM_REFERENCE(0))) GENERIC_TRANSLATION(SETGEr, doSetgeR(ip, block, OP(0))) -GENERIC_TRANSLATION_REF(SETGEm, - doSetgeM(ip, block, ADDR_NOREF(0)), - doSetgeM(ip, block, MEM_REFERENCE(0))) +GENERIC_TRANSLATION_REF(SETGEm, doSetgeM(ip, block, ADDR_NOREF(0)), + doSetgeM(ip, block, MEM_REFERENCE(0))) GENERIC_TRANSLATION(SETGr, doSetgR(ip, block, OP(0))) -GENERIC_TRANSLATION_REF(SETGm, - doSetgM(ip, block, ADDR_NOREF(0)), - doSetgM(ip, block, MEM_REFERENCE(0))) +GENERIC_TRANSLATION_REF(SETGm, doSetgM(ip, block, ADDR_NOREF(0)), + doSetgM(ip, block, MEM_REFERENCE(0))) GENERIC_TRANSLATION(SETLr, doSetlR(ip, block, OP(0))) -GENERIC_TRANSLATION_REF(SETLm, - doSetlM(ip, block, ADDR_NOREF(0)), - doSetlM(ip, block, MEM_REFERENCE(0))) +GENERIC_TRANSLATION_REF(SETLm, doSetlM(ip, block, ADDR_NOREF(0)), + doSetlM(ip, block, MEM_REFERENCE(0))) GENERIC_TRANSLATION(SETLEr, doSetleR(ip, block, OP(0))) -GENERIC_TRANSLATION_REF(SETLEm, - doSetleM(ip, block, ADDR_NOREF(0)), - doSetleM(ip, block, MEM_REFERENCE(0))) +GENERIC_TRANSLATION_REF(SETLEm, doSetleM(ip, block, ADDR_NOREF(0)), + doSetleM(ip, block, MEM_REFERENCE(0))) GENERIC_TRANSLATION(SETSr, doSetsR(ip, block, OP(0))) -GENERIC_TRANSLATION_REF(SETSm, - doSetsM(ip, block, ADDR_NOREF(0)), - doSetsM(ip, block, MEM_REFERENCE(0))) +GENERIC_TRANSLATION_REF(SETSm, doSetsM(ip, block, ADDR_NOREF(0)), + doSetsM(ip, block, MEM_REFERENCE(0))) GENERIC_TRANSLATION(SETAEr, doSetaeR(ip, block, OP(0))) -GENERIC_TRANSLATION_REF(SETAEm, - doSetaeM(ip, block, ADDR_NOREF(0)), - doSetaeM(ip, block, MEM_REFERENCE(0))) +GENERIC_TRANSLATION_REF(SETAEm, doSetaeM(ip, block, ADDR_NOREF(0)), + doSetaeM(ip, block, MEM_REFERENCE(0))) GENERIC_TRANSLATION(SETBEr, doSetbeR(ip, block, OP(0))) -GENERIC_TRANSLATION_REF(SETBEm, - doSetbeM(ip, block, ADDR_NOREF(0)), - doSetbeM(ip, block, MEM_REFERENCE(0))) +GENERIC_TRANSLATION_REF(SETBEm, doSetbeM(ip, block, ADDR_NOREF(0)), + doSetbeM(ip, block, MEM_REFERENCE(0))) GENERIC_TRANSLATION(SETNPr, doSetnpR(ip, block, OP(0))) -GENERIC_TRANSLATION_REF(SETNPm, - doSetnpM(ip, block, ADDR_NOREF(0)), - doSetnpM(ip, block, MEM_REFERENCE(0))) +GENERIC_TRANSLATION_REF(SETNPm, doSetnpM(ip, block, ADDR_NOREF(0)), + doSetnpM(ip, block, MEM_REFERENCE(0))) GENERIC_TRANSLATION(SETNSr, doSetnsR(ip, block, OP(0))) -GENERIC_TRANSLATION_REF(SETNSm, - doSetnsM(ip, block, ADDR_NOREF(0)), - doSetnsM(ip, block, MEM_REFERENCE(0))) +GENERIC_TRANSLATION_REF(SETNSm, doSetnsM(ip, block, ADDR_NOREF(0)), + doSetnsM(ip, block, MEM_REFERENCE(0))) GENERIC_TRANSLATION(SETPr, doSetpR(ip, block, OP(0))) -GENERIC_TRANSLATION_REF(SETPm, - doSetpM(ip, block, ADDR_NOREF(0)), - doSetpM(ip, block, MEM_REFERENCE(0))) +GENERIC_TRANSLATION_REF(SETPm, doSetpM(ip, block, ADDR_NOREF(0)), + doSetpM(ip, block, MEM_REFERENCE(0))) void SETcc_populateDispatchMap(DispatchMap &m) { - m[X86::SETAm] = translate_SETAm; - m[X86::SETAr] = translate_SETAr; - m[X86::SETBm] = translate_SETBm; - m[X86::SETBr] = translate_SETBr; - m[X86::SETNEr] = translate_SETNEr; - m[X86::SETNEm] = translate_SETNEm; - m[X86::SETEr] = translate_SETEr; - m[X86::SETEm] = translate_SETEm; - m[X86::SETGEr] = translate_SETGEr; - m[X86::SETGEm] = translate_SETGEm; - m[X86::SETLr] = translate_SETLr; - m[X86::SETLm] = translate_SETLm; - m[X86::SETLEr] = translate_SETLEr; - m[X86::SETLEm] = translate_SETLEm; - m[X86::SETGr] = translate_SETGr; - m[X86::SETGm] = translate_SETGm; - m[X86::SETSr] = translate_SETSr; - m[X86::SETSm] = translate_SETSm; + m[X86::SETAm] = translate_SETAm; + m[X86::SETAr] = translate_SETAr; + m[X86::SETBm] = translate_SETBm; + m[X86::SETBr] = translate_SETBr; + m[X86::SETNEr] = translate_SETNEr; + m[X86::SETNEm] = translate_SETNEm; + m[X86::SETEr] = translate_SETEr; + m[X86::SETEm] = translate_SETEm; + m[X86::SETGEr] = translate_SETGEr; + m[X86::SETGEm] = translate_SETGEm; + m[X86::SETLr] = translate_SETLr; + m[X86::SETLm] = translate_SETLm; + m[X86::SETLEr] = translate_SETLEr; + m[X86::SETLEm] = translate_SETLEm; + m[X86::SETGr] = translate_SETGr; + m[X86::SETGm] = translate_SETGm; + m[X86::SETSr] = translate_SETSr; + m[X86::SETSm] = translate_SETSm; - m[X86::SETAEr] = translate_SETAEr; - m[X86::SETAEm] = translate_SETAEm; + m[X86::SETAEr] = translate_SETAEr; + m[X86::SETAEm] = translate_SETAEm; - m[X86::SETBEr] = translate_SETBEr; - m[X86::SETBEm] = translate_SETBEm; + m[X86::SETBEr] = translate_SETBEr; + m[X86::SETBEm] = translate_SETBEm; - m[X86::SETNPr] = translate_SETNPr; - m[X86::SETNPm] = translate_SETNPm; + m[X86::SETNPr] = translate_SETNPr; + m[X86::SETNPm] = translate_SETNPm; - m[X86::SETPr] = translate_SETPr; - m[X86::SETPm] = translate_SETPm; + m[X86::SETPr] = translate_SETPr; + m[X86::SETPm] = translate_SETPm; - m[X86::SETNSr] = translate_SETNSr; - m[X86::SETNSm] = translate_SETNSm; + m[X86::SETNSr] = translate_SETNSr; + m[X86::SETNSm] = translate_SETNSm; } diff --git a/mc-sema/cfgToLLVM/x86Instrs_SSE.cpp b/mc-sema/cfgToLLVM/x86Instrs_SSE.cpp index dffa5b01c..a7e9d4bdd 100644 --- a/mc-sema/cfgToLLVM/x86Instrs_SSE.cpp +++ b/mc-sema/cfgToLLVM/x86Instrs_SSE.cpp @@ -1,31 +1,32 @@ /* -Copyright (c) 2014, Trail of Bits -All rights reserved. + Copyright (c) 2014, Trail of Bits + All rights reserved. -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: + Redistribution and use in source and binary forms, with or without modification, + are permitted provided that the following conditions are met: - Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. + Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. - Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. + Redistributions in binary form must reproduce the above copyright notice, this + list of conditions and the following disclaimer in the documentation and/or + other materials provided with the distribution. - Neither the name of Trail of Bits nor the names of its - contributors may be used to endorse or promote products derived from - this software without specific prior written permission. + Neither the name of Trail of Bits nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ #include "InstructionDispatch.h" #include "toLLVM.h" #include "X86.h" @@ -39,3646 +40,3532 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #define NASSERT(cond) TASSERT(cond, "") -using namespace llvm; +static std::tuple getIntVectorTypes( + llvm::BasicBlock *b, int ewidth, int count) { + auto elem_ty = llvm::Type::getIntNTy(b->getContext(), ewidth); + auto vt = llvm::VectorType::get(elem_ty, count); -static std::tuple getIntVectorTypes(BasicBlock *b, int ewidth, int count) { - Type *elem_ty = Type::getIntNTy(b->getContext(), ewidth); - VectorType *vt = VectorType::get( - elem_ty, - count); - - return std::tuple(vt, elem_ty); + return std::tuple(vt, elem_ty); } -static std::tuple getFPVectorTypes(BasicBlock *b, int ewidth, int count) { - Type *elem_ty = nullptr; - - switch(ewidth) { - case 64: - elem_ty = Type::getDoubleTy(b->getContext()); - break; - case 32: - elem_ty = Type::getFloatTy(b->getContext()); - break; - default: - TASSERT(false, "Invalid width for fp vector"); - } +static std::tuple getFPVectorTypes( + llvm::BasicBlock *b, int ewidth, int count) { + llvm::Type *elem_ty = nullptr; - VectorType *vt = VectorType::get( - elem_ty, - count); + switch (ewidth) { + case 64: + elem_ty = llvm::Type::getDoubleTy(b->getContext()); + break; + case 32: + elem_ty = llvm::Type::getFloatTy(b->getContext()); + break; + default: + TASSERT(false, "Invalid width for fp vector") + ; + } - return std::tuple(vt, elem_ty); + auto vt = llvm::VectorType::get(elem_ty, count); + return std::tuple(vt, elem_ty); } template -static Value *INT_AS_VECTOR(BasicBlock *b, Value *input) { +static llvm::Value *INT_AS_VECTOR(llvm::BasicBlock *b, llvm::Value *input) { - NASSERT(width % elementwidth == 0); + NASSERT(width % elementwidth == 0); - unsigned count = width/elementwidth; + unsigned count = width / elementwidth; - Type *elem_ty; - VectorType *vt; + llvm::Type *elem_ty = nullptr; + llvm::VectorType *vt = nullptr; - std::tie(vt, elem_ty) = getIntVectorTypes(b, elementwidth, count); + std::tie(vt, elem_ty) = getIntVectorTypes(b, elementwidth, count); - // convert our base value to a vector - Value *vecValue = CastInst::Create( - Instruction::BitCast, - input, - vt, - "", - b); - - return vecValue; + // convert our base value to a vector + return llvm::CastInst::Create(llvm::Instruction::BitCast, input, vt, "", b); } template -static Value *INT_AS_FPVECTOR(BasicBlock *b, Value *input) { +static llvm::Value *INT_AS_FPVECTOR(llvm::BasicBlock *b, llvm::Value *input) { - NASSERT(width % elementwidth == 0); + NASSERT(width % elementwidth == 0); - unsigned count = width/elementwidth; + unsigned count = width / elementwidth; - Type *elem_ty; - VectorType *vt; + llvm::Type *elem_ty = nullptr; + llvm::VectorType *vt = nullptr; - std::tie(vt, elem_ty) = getFPVectorTypes(b, elementwidth, count); + std::tie(vt, elem_ty) = getFPVectorTypes(b, elementwidth, count); - // convert our base value to a vector - Value *vecValue = CastInst::Create( - Instruction::BitCast, - input, - vt, - "", - b); - - return vecValue; + // convert our base value to a vector + return llvm::CastInst::Create(llvm::Instruction::BitCast, input, vt, "", b); } +template +static llvm::Value *VECTOR_AS_INT(llvm::BasicBlock *b, llvm::Value *vector) { -template -static Value *VECTOR_AS_INT(BasicBlock *b, Value *vector) { - - // convert our base value to a vector - Value *intValue = CastInst::Create( - Instruction::BitCast, - vector, - Type::getIntNTy(b->getContext(), width), - "", - b); - - return intValue; + // convert our base value to a vector + return llvm::CastInst::Create(llvm::Instruction::BitCast, vector, + llvm::Type::getIntNTy(b->getContext(), width), + "", b); } -static Type *getFpTypeForWidth(const BasicBlock *block, int fpwidth) { - Type *fpType; +static llvm::Type *getFpTypeForWidth(const llvm::BasicBlock *block, + int fpwidth) { + llvm::Type *fpType = nullptr; - switch(fpwidth) - { - case 32: - fpType = Type::getFloatTy(block->getContext()); - break; - case 64: - fpType = Type::getDoubleTy(block->getContext()); - break; - default: - TASSERT(false, "Invalid width for getFpTypeForWidth"); - fpType = nullptr; - } + switch (fpwidth) { + case 32: + fpType = llvm::Type::getFloatTy(block->getContext()); + break; + case 64: + fpType = llvm::Type::getDoubleTy(block->getContext()); + break; + default: + TASSERT(false, "Invalid width for getFpTypeForWidth") + ; + } - return fpType; + return fpType; } -template -static InstTransResult MOVAndZextRV(BasicBlock *& block, const MCOperand &dst, Value *src) -{ +template +static InstTransResult MOVAndZextRV(llvm::BasicBlock *& block, + const llvm::MCOperand &dst, + llvm::Value *src) { - NASSERT(dst.isReg()); + NASSERT(dst.isReg()); - Value *zext = src; + llvm::Value *zext = src; - if(width < 128) { - zext = new llvm::ZExtInst(src, - llvm::Type::getIntNTy(block->getContext(), 128), - "", - block); - } else if (width > 128) { - TASSERT(false, "Invalid width"); - } + if (width < 128) { + zext = new llvm::ZExtInst(src, + llvm::Type::getIntNTy(block->getContext(), 128), + "", block); + } else if (width > 128) { + TASSERT(false, "Invalid width"); + } - R_WRITE<128>(block, dst.getReg(), zext); + R_WRITE<128>(block, dst.getReg(), zext); + return ContinueBlock; +} + +template +static InstTransResult MOVAndZextRR(llvm::BasicBlock *& block, + const llvm::MCOperand &dst, + const llvm::MCOperand &src) { + NASSERT(src.isReg()); + + auto src_val = R_READ(block, src.getReg()); + + return MOVAndZextRV(block, dst, src_val); +} + +template +static InstTransResult MOVAndZextRM(NativeInstPtr ip, llvm::BasicBlock *& block, + const llvm::MCOperand &dst, + llvm::Value *mem_val) { + auto src_val = M_READ(ip, block, mem_val); + + return MOVAndZextRV(block, dst, src_val); +} + +template +static InstTransResult doMOVSrm(TranslationContext &ctx, + llvm::BasicBlock *&block) { + auto natM = ctx.natM; + auto ip = ctx.natI; + auto &inst = ip->get_inst(); + InstTransResult ret; + auto F = block->getParent(); + // MOV from memory to XMM register will set the unused poriton + // of the XMM register to 0s. + // Just set the whole thing to zero, and let the subsequent + // write take care of the rest + R_WRITE<128>(block, OP(0).getReg(), CONST_V<128>(block, 0)); + + if (ip->has_external_ref()) { + auto addrInt = getValueForExternal(F->getParent(), ip, block); + TASSERT(addrInt != NULL, "Could not get address for external"); + ret = doRMMov(ip, block, addrInt, OP(0)); return ContinueBlock; -} - - -template -static InstTransResult MOVAndZextRR(BasicBlock *& block, const MCOperand &dst, const MCOperand &src) { - NASSERT(src.isReg()); - - Value *src_val = R_READ(block, src.getReg()); - - return MOVAndZextRV(block, dst, src_val); -} - -template -static InstTransResult MOVAndZextRM(InstPtr ip, BasicBlock *& block, const MCOperand &dst, Value *mem_val) -{ - Value *src_val = M_READ(ip, block, mem_val); - - return MOVAndZextRV(block, dst, src_val); -} - -template -static InstTransResult doMOVSrm(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) { - InstTransResult ret; - Function *F = block->getParent(); - // MOV from memory to XMM register will set the unused poriton - // of the XMM register to 0s. - // Just set the whole thing to zero, and let the subsequent - // write take care of the rest - R_WRITE<128>(block, OP(0).getReg(), CONST_V<128>(block, 0)); - - if( ip->has_external_ref()) { - Value *addrInt = getValueForExternal(F->getParent(), ip, block); - TASSERT(addrInt != NULL, "Could not get address for external"); - ret = doRMMov(ip, block, - addrInt, - OP(0) ); - return ContinueBlock; - } - else if( ip->has_mem_reference ) { - ret = doRMMov(ip, block, - MEM_AS_DATA_REF( block, natM, inst, ip, 1 ), - OP(0) ); - } else { - ret = doRMMov(ip, block, ADDR_NOREF(1), OP(0)); - } - return ret ; + } else if (ip->has_mem_reference) { + ret = doRMMov(ip, block, MEM_AS_DATA_REF(block, natM, inst, ip, 1), + OP(0)); + } else { + ret = doRMMov(ip, block, ADDR_NOREF(1), OP(0)); + } + return ret; } -template -static InstTransResult doMOVSmr(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) -{ - InstTransResult ret; - Function *F = block->getParent(); - if( ip->has_external_ref()) { - Value *addrInt = getValueForExternal(F->getParent(), ip, block); - TASSERT(addrInt != NULL, "Could not get address for external"); - return doMRMov(ip, block, addrInt, OP(5) ); - } - else if( ip->has_mem_reference ) { - ret = doMRMov(ip, block, MEM_AS_DATA_REF( block, natM, inst, ip, 0), OP(5) ); - } else { - ret = doMRMov(ip, block, ADDR_NOREF(0), OP(5)) ; - } - return ret ; +template +static InstTransResult doMOVSmr(TranslationContext &ctx, + llvm::BasicBlock *&block) { + auto natM = ctx.natM; + auto ip = ctx.natI; + auto &inst = ip->get_inst(); + InstTransResult ret; + auto F = block->getParent(); + if (ip->has_external_ref()) { + auto addrInt = getValueForExternal(F->getParent(), ip, block); + TASSERT(addrInt != NULL, "Could not get address for external"); + return doMRMov(ip, block, addrInt, OP(5)); + } else if (ip->has_mem_reference) { + ret = doMRMov(ip, block, MEM_AS_DATA_REF(block, natM, inst, ip, 0), + OP(5)); + } else { + ret = doMRMov(ip, block, ADDR_NOREF(0), OP(5)); + } + return ret; } -template -static InstTransResult doMOVSrr(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) -{ - return doRRMov(ip, block, OP(op1), OP(op2)); +template +static InstTransResult doMOVSrr(TranslationContext &ctx, + llvm::BasicBlock *&block) { + auto natM = ctx.natM; + auto ip = ctx.natI; + auto &inst = ip->get_inst(); + return doRRMov(ip, block, OP(op1), OP(op2)); } -template -static Value* INT_AS_FP(BasicBlock *& block, Value *in) -{ - Type *fpType = getFpTypeForWidth(block, fpwidth); - - - Value *fp_value = CastInst::Create( - Instruction::BitCast, - in, - fpType, - "", - block); - return fp_value; +template +static llvm::Value *INT_AS_FP(llvm::BasicBlock *&block, llvm::Value *in) { + auto fpType = getFpTypeForWidth(block, fpwidth); + return llvm::CastInst::Create(llvm::Instruction::BitCast, in, fpType, "", + block); } -template -static Value * FP_AS_INT(BasicBlock *& block, Value *in) -{ - Type *intType = Type::getIntNTy(block->getContext(), fpwidth); +template +static llvm::Value *FP_AS_INT(llvm::BasicBlock *&block, llvm::Value *in) { + Type *intType = llvm::Type::getIntNTy(block->getContext(), fpwidth); - Value *to_int = CastInst::Create( - Instruction::BitCast, - in, - intType, - "", - block); - return to_int; + return llvm::CastInst::Create(llvm::Instruction::BitCast, in, intType, "", + block); } -template -static Value* INT_TO_FP_TO_INT(BasicBlock *& block, Value *in) { +template +static llvm::Value *INT_TO_FP_TO_INT(llvm::BasicBlock *&block, + llvm::Value *in) { - Type *fpType = getFpTypeForWidth(block, fpwidth); - Type *intType = Type::getIntNTy(block->getContext(), fpwidth); + auto fpType = getFpTypeForWidth(block, fpwidth); + auto intType = llvm::Type::getIntNTy(block->getContext(), fpwidth); + //TODO: Check rounding modes! + auto fp_value = llvm::CastInst::Create(llvm::Instruction::SIToFP, in, fpType, + "", block); - //TODO: Check rounding modes! - Value *fp_value = CastInst::Create( - Instruction::SIToFP, - in, - fpType, - "", - block); - - Value *to_int = CastInst::Create( - Instruction::BitCast, - fp_value, - intType, - "", - block); - - return to_int; + return llvm::CastInst::Create(llvm::Instruction::BitCast, fp_value, intType, + "", block); } -template -static InstTransResult doCVTSI2SrV(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst, - Value *src, - const MCOperand &dst) -{ +template +static InstTransResult doCVTSI2SrV(NativeModulePtr natM, + llvm::BasicBlock *&block, NativeInstPtr ip, + llvm::MCInst &inst, llvm::Value *src, + const llvm::MCOperand &dst) { - Value *final_v = INT_TO_FP_TO_INT(block, src); - // write them to destination - R_WRITE(block, dst.getReg(), final_v); + auto final_v = INT_TO_FP_TO_INT(block, src); + // write them to destination + R_WRITE(block, dst.getReg(), final_v); - return ContinueBlock; + return ContinueBlock; } // Converts a signed doubleword integer (or signed quadword integer if operand size is 64 bits) // in the second source operand to a double-precision floating-point value in the destination operand. // The result is stored in the low quad- word of the destination operand, and the high quadword left unchanged. -template -static InstTransResult translate_CVTSI2SDrr(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) -{ - const MCOperand &dst = OP(0); - const MCOperand &src = OP(1); +template +static InstTransResult translate_CVTSI2SDrr(TranslationContext &ctx, + llvm::BasicBlock *&block) { + auto natM = ctx.natM; + auto ip = ctx.natI; + auto &inst = ip->get_inst(); + const auto &dst = OP(0); + const auto &src = OP(1); - NASSERT(src.isReg()); - NASSERT(dst.isReg()); + NASSERT(src.isReg()); + NASSERT(dst.isReg()); - // read reg from source - Value *rval = R_READ(block, src.getReg()); + // read reg from source + auto rval = R_READ(block, src.getReg()); - return doCVTSI2SrV<64>(natM, block, ip, inst, rval, dst); + return doCVTSI2SrV<64>(natM, block, ip, inst, rval, dst); } -template -static InstTransResult translate_CVTSI2SDrm(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) -{ - const MCOperand &dst = OP(0); - NASSERT(dst.isReg()); +template +static InstTransResult translate_CVTSI2SDrm(TranslationContext &ctx, + llvm::BasicBlock *&block) { + auto natM = ctx.natM; + auto ip = ctx.natI; + auto &inst = ip->get_inst(); + const auto &dst = OP(0); + NASSERT(dst.isReg()); - Value *src = ADDR_NOREF(1); + auto src = ADDR_NOREF(1); - // read 32 bits from memory - Value *mval = M_READ(ip, block, src); + // read 32 bits from memory + auto mval = M_READ(ip, block, src); - return doCVTSI2SrV<64>(natM, block, ip, inst, mval, dst); + return doCVTSI2SrV<64>(natM, block, ip, inst, mval, dst); } //Converts a double-precision floating-point value in the source operand (second operand) //to a single-precision floating-point value in the destination operand (first operand). -template -static InstTransResult doCVTSD2SSrV(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst, - Value *src, - const MCOperand &dst) -{ +template +static InstTransResult doCVTSD2SSrV(NativeModulePtr natM, + llvm::BasicBlock *&block, NativeInstPtr ip, + llvm::MCInst &inst, llvm::Value *src, + const llvm::MCOperand &dst) { - // convert the 64-bits we are reading into an FPU double - //TODO: Check rounding modes! - Value *to_double = CastInst::Create( - Instruction::BitCast, - src, - Type::getDoubleTy(block->getContext()), - "", - block); - - // Truncate double to a single - Value *fp_single = new FPTruncInst(to_double, - Type::getFloatTy(block->getContext()), - "", - block); + // convert the 64-bits we are reading into an FPU double + //TODO: Check rounding modes! + auto to_double = llvm::CastInst::Create( + llvm::Instruction::BitCast, src, + llvm::Type::getDoubleTy(block->getContext()), "", block); - // treat the bits as a 32-bit int - Value *to_int = CastInst::Create( - Instruction::BitCast, - fp_single, - Type::getIntNTy(block->getContext(), 32), - "", - block); + // Truncate double to a single + auto fp_single = new llvm::FPTruncInst( + to_double, llvm::Type::getFloatTy(block->getContext()), "", block); - // write them to destination - R_WRITE(block, dst.getReg(), to_int); + // treat the bits as a 32-bit int + auto to_int = llvm::CastInst::Create( + llvm::Instruction::BitCast, fp_single, + llvm::Type::getIntNTy(block->getContext(), 32), "", block); - return ContinueBlock; + // write them to destination + R_WRITE(block, dst.getReg(), to_int); + + return ContinueBlock; } // read 64-bits from memory, convert to single precision fpu value, // write the 32-bit value into register dst -static InstTransResult translate_CVTSD2SSrm(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) -{ - const MCOperand &dst = OP(0); - NASSERT(dst.isReg()); +static InstTransResult translate_CVTSD2SSrm(TranslationContext &ctx, + llvm::BasicBlock *&block) { + auto natM = ctx.natM; + auto ip = ctx.natI; + auto &inst = ip->get_inst(); + const llvm::MCOperand &dst = OP(0); + NASSERT(dst.isReg()); - Value *mem = ADDR_NOREF(1); + llvm::Value *mem = ADDR_NOREF(1); - Value *double_val = M_READ<64>(ip, block, mem); + llvm::Value *double_val = M_READ<64>(ip, block, mem); - return doCVTSD2SSrV<32>(natM, block, ip, inst, double_val, dst); + return doCVTSD2SSrV<32>(natM, block, ip, inst, double_val, dst); } // read 64-bits from register src, convert to single precision fpu value, // write the 32-bit value into register dst -static InstTransResult translate_CVTSD2SSrr(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) -{ - const MCOperand &dst = OP(0); - const MCOperand &src = OP(1); - NASSERT(dst.isReg()); - NASSERT(src.isReg()); +static InstTransResult translate_CVTSD2SSrr(TranslationContext &ctx, + llvm::BasicBlock *&block) { + auto natM = ctx.natM; + auto ip = ctx.natI; + auto &inst = ip->get_inst(); + const llvm::MCOperand &dst = OP(0); + const llvm::MCOperand &src = OP(1); + NASSERT(dst.isReg()); + NASSERT(src.isReg()); - // read 64 bits from source - Value *rval = R_READ<64>(block, src.getReg()); + // read 64 bits from source + llvm::Value *rval = R_READ<64>(block, src.getReg()); - return doCVTSD2SSrV<32>(natM, block, ip, inst, rval, dst); + return doCVTSD2SSrV<32>(natM, block, ip, inst, rval, dst); } -template -static InstTransResult doCVTSS2SDrV(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst, - Value *src, - const MCOperand &dst) -{ - - // convert the 32 bits we read into an fpu single - Value *to_single = CastInst::Create( - Instruction::BitCast, - src, - Type::getFloatTy(block->getContext()), - "", - block); +template +static InstTransResult doCVTSS2SDrV(NativeModulePtr natM, + llvm::BasicBlock *& block, NativeInstPtr ip, + llvm::MCInst &inst, llvm::Value *src, + const llvm::MCOperand &dst) { - // extend to a double - Value *fp_double = new FPExtInst(to_single, - Type::getDoubleTy(block->getContext()), - "", - block); + // convert the 32 bits we read into an fpu single + llvm::Value *to_single = CastInst::Create( + Instruction::BitCast, src, Type::getFloatTy(block->getContext()), "", + block); - // treat the bits as a 64-bit int - Value *to_int = CastInst::Create( - Instruction::BitCast, - fp_double, - Type::getIntNTy(block->getContext(), 64), - "", - block); - - // write them to destination - R_WRITE(block, dst.getReg(), to_int); + // extend to a double + llvm::Value *fp_double = new FPExtInst(to_single, + Type::getDoubleTy(block->getContext()), + "", block); - return ContinueBlock; + // treat the bits as a 64-bit int + llvm::Value *to_int = CastInst::Create( + Instruction::BitCast, fp_double, Type::getIntNTy(block->getContext(), 64), + "", block); + + // write them to destination + R_WRITE(block, dst.getReg(), to_int); + + return ContinueBlock; } - -// Convert Scalar Single-Precision FP Value to Scalar Double-Precision FP Value +// Convert Scalar Single-Precision FP llvm::Value to Scalar Double-Precision FP llvm::Value // read 32-bits from memory, convert to double precision fpu value, // write the 64-bit value into register dst -static InstTransResult translate_CVTSS2SDrm(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) -{ - const MCOperand &dst = OP(0); - NASSERT(dst.isReg()); +static InstTransResult translate_CVTSS2SDrm(TranslationContext &ctx, + llvm::BasicBlock *&block) { + auto natM = ctx.natM; + auto ip = ctx.natI; + auto &inst = ip->get_inst(); + const llvm::MCOperand &dst = OP(0); + NASSERT(dst.isReg()); - Value *mem = ADDR_NOREF(1); + llvm::Value *mem = ADDR_NOREF(1); - // read 32 bits from mem - Value *single_val = M_READ<32>(ip, block, mem); - - return doCVTSS2SDrV<64>(natM, block, ip, inst, single_val, dst); + // read 32 bits from mem + llvm::Value *single_val = M_READ<32>(ip, block, mem); + + return doCVTSS2SDrV<64>(natM, block, ip, inst, single_val, dst); } -// Convert Scalar Single-Precision FP Value to Scalar Double-Precision FP Value +// Convert Scalar Single-Precision FP llvm::Value to Scalar Double-Precision FP llvm::Value // read 32-bits from register src, convert to double precision fpu value, // write the 64-bit value into register dst -static InstTransResult translate_CVTSS2SDrr(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) -{ - const MCOperand &dst = OP(0); - const MCOperand &src = OP(1); - NASSERT(dst.isReg()); - NASSERT(src.isReg()); +static InstTransResult translate_CVTSS2SDrr(TranslationContext &ctx, + llvm::BasicBlock *&block) { + auto natM = ctx.natM; + auto ip = ctx.natI; + auto &inst = ip->get_inst(); + const llvm::MCOperand &dst = OP(0); + const llvm::MCOperand &src = OP(1); + NASSERT(dst.isReg()); + NASSERT(src.isReg()); - // read 32 bits from source - Value *rval = R_READ<32>(block, src.getReg()); + // read 32 bits from source + llvm::Value *rval = R_READ<32>(block, src.getReg()); - return doCVTSS2SDrV<64>(natM, block, ip, inst, rval, dst); + return doCVTSS2SDrV<64>(natM, block, ip, inst, rval, dst); } -template -static InstTransResult do_SSE_INT_VV(unsigned reg, BasicBlock *& block, Value *o1, Value *o2) -{ - Value *xoredVal = BinaryOperator::Create(bin_op, o1, o2, "", block); - R_WRITE(block, reg, xoredVal); +template +static InstTransResult do_SSE_INT_VV(unsigned reg, llvm::BasicBlock *& block, + llvm::Value *o1, llvm::Value *o2) { + llvm::Value *xoredVal = BinaryOperator::Create(bin_op, o1, o2, "", block); + R_WRITE(block, reg, xoredVal); - return ContinueBlock; + return ContinueBlock; } -template -static InstTransResult do_SSE_INT_RR(InstPtr ip, BasicBlock *& block, - const MCOperand &o1, - const MCOperand &o2) -{ - NASSERT(o1.isReg()); - NASSERT(o2.isReg()); +template +static InstTransResult do_SSE_INT_RR(NativeInstPtr ip, + llvm::BasicBlock *& block, + const llvm::MCOperand &o1, + const llvm::MCOperand &o2) { + NASSERT(o1.isReg()); + NASSERT(o2.isReg()); - Value *opVal1 = R_READ(block, o1.getReg()); - Value *opVal2 = R_READ(block, o2.getReg()); + llvm::Value *opVal1 = R_READ(block, o1.getReg()); + llvm::Value *opVal2 = R_READ(block, o2.getReg()); - return do_SSE_INT_VV(o1.getReg(), block, opVal1, opVal2); + return do_SSE_INT_VV(o1.getReg(), block, opVal1, opVal2); } -template -static InstTransResult do_SSE_INT_RM(InstPtr ip, BasicBlock *& block, - const MCOperand &o1, - Value *addr) -{ - NASSERT(o1.isReg()); +template +static InstTransResult do_SSE_INT_RM(NativeInstPtr ip, + llvm::BasicBlock *& block, + const llvm::MCOperand &o1, + llvm::Value *addr) { + NASSERT(o1.isReg()); - Value *opVal1 = R_READ(block, o1.getReg()); - Value *opVal2 = M_READ(ip, block, addr); + llvm::Value *opVal1 = R_READ(block, o1.getReg()); + llvm::Value *opVal2 = M_READ(ip, block, addr); - return do_SSE_INT_VV(o1.getReg(), block, opVal1, opVal2); + return do_SSE_INT_VV(o1.getReg(), block, opVal1, opVal2); } // convert signed integer (register) to single precision float (xmm register) -static InstTransResult translate_CVTSI2SSrr(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) { - const MCOperand &dst = OP(0); - const MCOperand &src = OP(1); +static InstTransResult translate_CVTSI2SSrr(TranslationContext &ctx, + llvm::BasicBlock *&block) { + auto natM = ctx.natM; + auto ip = ctx.natI; + auto &inst = ip->get_inst(); + const MCOperand &dst = OP(0); + const llvm::MCOperand &src = OP(1); - NASSERT(dst.isReg()); - NASSERT(src.isReg()); + NASSERT(dst.isReg()); + NASSERT(src.isReg()); - Value *src_val = R_READ<32>(block, src.getReg()); - - return doCVTSI2SrV<32>(natM, block, ip, inst, src_val, dst); + llvm::Value *src_val = R_READ<32>(block, src.getReg()); + + return doCVTSI2SrV<32>(natM, block, ip, inst, src_val, dst); } // convert signed integer (memory) to single precision float (xmm register) -static InstTransResult translate_CVTSI2SSrm(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) { - const MCOperand &dst = OP(0); - Value *mem_addr = ADDR_NOREF(1); +static InstTransResult translate_CVTSI2SSrm(TranslationContext &ctx, + llvm::BasicBlock *&block) { + auto natM = ctx.natM; + auto ip = ctx.natI; + auto &inst = ip->get_inst(); + const llvm::MCOperand &dst = OP(0); + llvm::Value *mem_addr = ADDR_NOREF(1); - NASSERT(dst.isReg()); + NASSERT(dst.isReg()); - Value *src_val = M_READ<32>(ip, block, mem_addr); + llvm::Value *src_val = M_READ<32>(ip, block, mem_addr); - return doCVTSI2SrV<32>(natM, block, ip, inst, src_val, dst); + return doCVTSI2SrV<32>(natM, block, ip, inst, src_val, dst); } // convert signed integer (register) to single precision float (xmm register) -static InstTransResult translate_CVTSI2SS64rr(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) { - const MCOperand &dst = OP(0); - const MCOperand &src = OP(1); +static InstTransResult translate_CVTSI2SS64rr(TranslationContext &ctx, + llvm::BasicBlock *&block) { + auto natM = ctx.natM; + auto ip = ctx.natI; + auto &inst = ip->get_inst(); + const llvm::MCOperand &dst = OP(0); + const llvm::MCOperand &src = OP(1); - NASSERT(dst.isReg()); - NASSERT(src.isReg()); + NASSERT(dst.isReg()); + NASSERT(src.isReg()); - Value *src_val = R_READ<64>(block, src.getReg()); + llvm::Value *src_val = R_READ<64>(block, src.getReg()); - return doCVTSI2SrV<64>(natM, block, ip, inst, src_val, dst); + return doCVTSI2SrV<64>(natM, block, ip, inst, src_val, dst); } // convert signed integer (memory) to single precision float (xmm register) -static InstTransResult translate_CVTSI2SS64rm(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) { - const MCOperand &dst = OP(0); - Value *mem_addr = ADDR_NOREF(1); +static InstTransResult translate_CVTSI2SS64rm(TranslationContext &ctx, + llvm::BasicBlock *&block) { + auto natM = ctx.natM; + auto ip = ctx.natI; + auto &inst = ip->get_inst(); + const llvm::MCOperand &dst = OP(0); + llvm::Value *mem_addr = ADDR_NOREF(1); - NASSERT(dst.isReg()); + NASSERT(dst.isReg()); - Value *src_val = M_READ<64>(ip, block, mem_addr); + llvm::Value *src_val = M_READ<64>(ip, block, mem_addr); - return doCVTSI2SrV<64>(natM, block, ip, inst, src_val, dst); + return doCVTSI2SrV<64>(natM, block, ip, inst, src_val, dst); } +template +static InstTransResult doCVTTS2SIrV(NativeModulePtr natM, + llvm::BasicBlock *& block, NativeInstPtr ip, + llvm::MCInst &inst, llvm::Value *src, + const llvm::MCOperand &dst) { + llvm::Value *final_v = NULL; -template -static InstTransResult doCVTTS2SIrV(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst, Value *src, const MCOperand &dst) -{ - Value *final_v = NULL; + llvm::Value *to_int = CastInst::Create( + Instruction::FPToSI, INT_AS_FP(block, src), + Type::getIntNTy(block->getContext(), regwidth), "", block); - Value *to_int = CastInst::Create( - Instruction::FPToSI, - INT_AS_FP(block, src), - Type::getIntNTy(block->getContext(), regwidth), - "", - block); + R_WRITE(block, dst.getReg(), to_int); - R_WRITE(block, dst.getReg(), to_int); - - return ContinueBlock; + return ContinueBlock; } // convert w/ truncation scalar single-precision fp value to dword integer -template -static InstTransResult doCVTT_to_SI_rm(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) { +template +static InstTransResult doCVTT_to_SI_rm(TranslationContext &ctx, + llvm::BasicBlock *&block) { + auto natM = ctx.natM; + auto ip = ctx.natI; + auto &inst = ip->get_inst(); - const MCOperand &dst = OP(0); - Value *mem_addr = ADDR_NOREF(1); + const llvm::MCOperand &dst = OP(0); + llvm::Value *mem_addr = ADDR_NOREF(1); - NASSERT(dst.isReg()); - - Value *src_val = M_READ(ip, block, mem_addr); - - return doCVTTS2SIrV(natM, block, ip, inst, src_val, dst); + NASSERT(dst.isReg()); + + llvm::Value *src_val = M_READ(ip, block, mem_addr); + + return doCVTTS2SIrV(natM, block, ip, inst, src_val, dst); } // convert w/ truncation scalar single-precision fp value (xmm reg) to dword integer -template -static InstTransResult doCVTT_to_SI_rr(NativeModulePtr natM, BasicBlock *& block, InstPtr ip, MCInst &inst) { +template +static InstTransResult doCVTT_to_SI_rr(TranslationContext &ctx, + llvm::BasicBlock *&block) { + auto natM = ctx.natM; + auto ip = ctx.natI; + auto &inst = ip->get_inst(); - const MCOperand &dst = OP(0); - const MCOperand &src = OP(1); + const llvm::MCOperand &dst = OP(0); + const llvm::MCOperand &src = OP(1); - NASSERT(dst.isReg()); - NASSERT(src.isReg()); - - Value *src_val = R_READ(block, src.getReg()); - - return doCVTTS2SIrV(natM, block, ip, inst, src_val, dst); + NASSERT(dst.isReg()); + NASSERT(src.isReg()); + + llvm::Value *src_val = R_READ(block, src.getReg()); + + return doCVTTS2SIrV(natM, block, ip, inst, src_val, dst); } +template +static InstTransResult do_SSE_VV(unsigned reg, llvm::BasicBlock *& block, + llvm::Value *o1, llvm::Value *o2) { -template -static InstTransResult do_SSE_VV(unsigned reg, BasicBlock *& block, Value *o1, Value *o2) -{ - Value *sumVal = BinaryOperator::Create( - bin_op, - INT_AS_FP(block, o1), - INT_AS_FP(block, o2), - "", - block); - R_WRITE(block, reg, FP_AS_INT(block, sumVal)); + llvm::Value *sumVal = BinaryOperator::Create(bin_op, + INT_AS_FP(block, o1), + INT_AS_FP(block, o2), + "", block); + R_WRITE(block, reg, FP_AS_INT(block, sumVal)); - return ContinueBlock; + return ContinueBlock; } -template -static InstTransResult do_SSE_RR(InstPtr ip, BasicBlock *& block, - const MCOperand &o1, - const MCOperand &o2) -{ - NASSERT(o1.isReg()); - NASSERT(o2.isReg()); +template +static InstTransResult do_SSE_RR(NativeInstPtr ip, llvm::BasicBlock *& block, + const llvm::MCOperand &o1, + const llvm::MCOperand &o2) { + NASSERT(o1.isReg()); + NASSERT(o2.isReg()); - Value *opVal1 = R_READ(block, o1.getReg()); - Value *opVal2 = R_READ(block, o2.getReg()); + llvm::Value *opVal1 = R_READ(block, o1.getReg()); + llvm::Value *opVal2 = R_READ(block, o2.getReg()); - return do_SSE_VV(o1.getReg(), block, opVal1, opVal2); + return do_SSE_VV(o1.getReg(), block, opVal1, opVal2); } -template -static InstTransResult do_SSE_RM(InstPtr ip, BasicBlock *& block, - const MCOperand &o1, - Value *addr) -{ - NASSERT(o1.isReg()); +template +static InstTransResult do_SSE_RM(NativeInstPtr ip, llvm::BasicBlock *& block, + const llvm::MCOperand &o1, llvm::Value *addr) { + NASSERT(o1.isReg()); - Value *opVal1 = R_READ(block, o1.getReg()); - Value *opVal2 = M_READ(ip, block, addr); + llvm::Value *opVal1 = R_READ(block, o1.getReg()); + llvm::Value *opVal2 = M_READ(ip, block, addr); - return do_SSE_VV(o1.getReg(), block, opVal1, opVal2); + return do_SSE_VV(o1.getReg(), block, opVal1, opVal2); } -static InstTransResult doUCOMISvv(BasicBlock *& block, Value *op1, Value *op2) -{ +static InstTransResult doUCOMISvv(llvm::BasicBlock *& block, llvm::Value *op1, + llvm::Value *op2) { - // TODO: Make sure these treat negative zero and positive zero - // as the same value. - Value *is_lt = new FCmpInst(*block, FCmpInst::FCMP_ULT, op1, op2); - Value *is_eq = new FCmpInst(*block, FCmpInst::FCMP_UEQ, op1, op2); + // TODO: Make sure these treat negative zero and positive zero + // as the same value. + llvm::Value *is_lt = new FCmpInst( *block, FCmpInst::FCMP_ULT, op1, op2); + llvm::Value *is_eq = new FCmpInst( *block, FCmpInst::FCMP_UEQ, op1, op2); - // if BOTH the equql AND less than is true - // it means that one of the ops is a QNaN - Value *is_qnan = BinaryOperator::CreateAnd(is_lt, is_eq, "", block); + // if BOTH the equql AND less than is true + // it means that one of the ops is a QNaN + llvm::Value *is_qnan = BinaryOperator::CreateAnd(is_lt, is_eq, "", block); - F_WRITE(block, ZF, is_eq); // ZF is 1 if either is QNaN or op1 == op2 - F_WRITE(block, PF, is_qnan); // PF is 1 if either op is a QNaN - F_WRITE(block, CF, is_lt); // CF is 1 if either is QNaN or op1 < op2 + F_WRITE(block, ZF, is_eq); // ZF is 1 if either is QNaN or op1 == op2 + F_WRITE(block, PF, is_qnan); // PF is 1 if either op is a QNaN + F_WRITE(block, CF, is_lt); // CF is 1 if either is QNaN or op1 < op2 - F_WRITE(block, OF, CONST_V<1>(block, 0)); - F_WRITE(block, SF, CONST_V<1>(block, 0)); - F_WRITE(block, AF, CONST_V<1>(block, 0)); + F_WRITE(block, OF, CONST_V<1>(block, 0)); + F_WRITE(block, SF, CONST_V<1>(block, 0)); + F_WRITE(block, AF, CONST_V<1>(block, 0)); - - return ContinueBlock; + return ContinueBlock; } -template -static InstTransResult doUCOMISrr(BasicBlock *&b, const MCOperand &op1, const MCOperand &op2) -{ - NASSERT(op1.isReg()); - NASSERT(op2.isReg()); +template +static InstTransResult doUCOMISrr(llvm::BasicBlock *&b, + const llvm::MCOperand &op1, + const llvm::MCOperand &op2) { + NASSERT(op1.isReg()); + NASSERT(op2.isReg()); - Value *op1_val = R_READ(b, op1.getReg()); - Value *op2_val = R_READ(b, op2.getReg()); + llvm::Value *op1_val = R_READ(b, op1.getReg()); + llvm::Value *op2_val = R_READ(b, op2.getReg()); - Value *fp1_val = INT_AS_FP(b, op1_val); - Value *fp2_val = INT_AS_FP(b, op2_val); + llvm::Value *fp1_val = INT_AS_FP(b, op1_val); + llvm::Value *fp2_val = INT_AS_FP(b, op2_val); - return doUCOMISvv(b, fp1_val, fp2_val); + return doUCOMISvv(b, fp1_val, fp2_val); } -template -static InstTransResult doUCOMISrm(InstPtr ip, BasicBlock *&b, const MCOperand &op1, Value *memAddr) -{ - NASSERT(op1.isReg()); +template +static InstTransResult doUCOMISrm(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &op1, + llvm::Value *memAddr) { + NASSERT(op1.isReg()); - Value *op1_val = R_READ(b, op1.getReg()); - Value *op2_val = M_READ(ip, b, memAddr); + llvm::Value *op1_val = R_READ(b, op1.getReg()); + llvm::Value *op2_val = M_READ(ip, b, memAddr); - Value *fp1_val = INT_AS_FP(b, op1_val); - Value *fp2_val = INT_AS_FP(b, op2_val); + llvm::Value *fp1_val = INT_AS_FP(b, op1_val); + llvm::Value *fp2_val = INT_AS_FP(b, op2_val); - return doUCOMISvv(b, fp1_val, fp2_val); + return doUCOMISvv(b, fp1_val, fp2_val); } -template -static InstTransResult doNewShift(BasicBlock *&b, - const MCOperand &dst, - Value *shift_count, - Value *fallback = nullptr) -{ - NASSERT(dst.isReg()); - NASSERT(128 % elementwidth == 0); +template +static InstTransResult doNewShift(llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + llvm::Value *shift_count, + llvm::Value *fallback = nullptr) { + NASSERT(dst.isReg()); + NASSERT(128 % elementwidth == 0); - Value *max_count = CONST_V<64>(b, elementwidth-1); + llvm::Value *max_count = CONST_V<64>(b, elementwidth - 1); - IntegerType *int_t = dyn_cast(shift_count->getType()); - if (int_t->getBitWidth() > 64) { - shift_count = new TruncInst( - shift_count, - Type::getIntNTy(b->getContext(), 64), - "", - b); - } - // check if our shift count is over the - // allowable limit - Value *countOverLimit = new ICmpInst( *b, - CmpInst::ICMP_UGT, - shift_count, - max_count); + IntegerType *int_t = dyn_cast(shift_count->getType()); + if (int_t->getBitWidth() > 64) { + shift_count = new TruncInst(shift_count, + Type::getIntNTy(b->getContext(), 64), "", b); + } + // check if our shift count is over the + // allowable limit + llvm::Value *countOverLimit = new ICmpInst( *b, CmpInst::ICMP_UGT, + shift_count, max_count); - // max the shift count at elementwidth - // real_count = over limit ? max count : original count - Value *real_count = SelectInst::Create(countOverLimit, - max_count, - shift_count, - "", - b); + // max the shift count at elementwidth + // real_count = over limit ? max count : original count + llvm::Value *real_count = SelectInst::Create(countOverLimit, max_count, + shift_count, "", b); - Type *elem_ty; - VectorType *vt; + Type *elem_ty; + VectorType *vt; - std::tie(vt, elem_ty) = getIntVectorTypes(b, elementwidth, 128/elementwidth); + std::tie(vt, elem_ty) = getIntVectorTypes(b, elementwidth, + 128 / elementwidth); - // convert our base value to a vector - Value *to_shift = R_READ<128>(b, dst.getReg()); - Value *vecValue = INT_AS_VECTOR<128, elementwidth>(b, to_shift); + // convert our base value to a vector + llvm::Value *to_shift = R_READ<128>(b, dst.getReg()); + llvm::Value *vecValue = INT_AS_VECTOR<128, elementwidth>(b, to_shift); - // truncate shift count to element size since we - // need to shove it in a vector - int_t = dyn_cast(real_count->getType()); - IntegerType *elem_int_t = dyn_cast(elem_ty); - Value *trunc_shift = nullptr; + // truncate shift count to element size since we + // need to shove it in a vector + int_t = dyn_cast(real_count->getType()); + IntegerType *elem_int_t = dyn_cast(elem_ty); + llvm::Value *trunc_shift = nullptr; - // size of shift count has to be the size of the vector elements - if(elem_int_t->getBitWidth() < int_t->getBitWidth()) { - trunc_shift = new TruncInst( - real_count, - elem_ty, - "", - b); - } else if (elem_int_t->getBitWidth() == int_t->getBitWidth()) { - trunc_shift = real_count; - } else { - trunc_shift = new ZExtInst( - real_count, - elem_ty, - "", - b); + // size of shift count has to be the size of the vector elements + if (elem_int_t->getBitWidth() < int_t->getBitWidth()) { + trunc_shift = new TruncInst(real_count, elem_ty, "", b); + } else if (elem_int_t->getBitWidth() == int_t->getBitWidth()) { + trunc_shift = real_count; + } else { + trunc_shift = new ZExtInst(real_count, elem_ty, "", b); + } + + llvm::Value *vecShiftPtr = new AllocaInst(vt, nullptr, "", b); + llvm::Value *shiftVector = noAliasMCSemaScope( + new LoadInst(vecShiftPtr, "", b)); + + int elem_count = 128 / elementwidth; + + // build a shift vector of elem_count + // entries of trunc_shift + for (int i = 0; i < elem_count; i++) { + shiftVector = InsertElementInst::Create(shiftVector, trunc_shift, + CONST_V<32>(b, i), "", b); + } + + // shift each element of the vector + llvm::Value *shifted = BinaryOperator::Create(bin_op, vecValue, shiftVector, + "", b); + + // convert value back to a 128bit int + llvm::Value *back_to_int = CastInst::Create( + Instruction::BitCast, shifted, Type::getIntNTy(b->getContext(), 128), "", + b); + + // write back to register + llvm::Value *final_to_write = back_to_int; + + // if this is an instruction that needs + // a special case for shifts of + // count >= width, then check for the fallback + // option + if (fallback != nullptr) { + // yes,. this means all th work above was not + // necessary. Ideally the optimizer will only + // keep the fallback case. And this way + // we don't need to generate multiple BBs + final_to_write = SelectInst::Create(countOverLimit, fallback, back_to_int, + "", b); + } + + R_WRITE<128>(b, dst.getReg(), final_to_write); + + return ContinueBlock; +} + +template +static InstTransResult doPSRArr(llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + const llvm::MCOperand &src) { + NASSERT(src.isReg()); + + llvm::Value *shift_count = R_READ<128>(b, src.getReg()); + + return doNewShift(b, dst, shift_count, nullptr); +} + +template +static InstTransResult doPSRArm(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + llvm::Value *memAddr) { + llvm::Value *shift_count = M_READ<128>(ip, b, memAddr); + + return doNewShift(b, dst, shift_count, nullptr); +} + +template +static InstTransResult doPSRAri(llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + const llvm::MCOperand &src) { + NASSERT(src.isImm()); + + llvm::Value *shift_count = CONST_V<128>(b, src.getImm()); + + return doNewShift(b, dst, shift_count, nullptr); +} + +template +static InstTransResult doPSLLrr(llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + const llvm::MCOperand &src) { + NASSERT(src.isReg()); + + llvm::Value *shift_count = R_READ<128>(b, src.getReg()); + + return doNewShift(b, dst, shift_count, + CONST_V<128>(b, 0)); +} + +template +static InstTransResult doPSLLrm(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + llvm::Value *memAddr) { + llvm::Value *shift_count = M_READ<128>(ip, b, memAddr); + + return doNewShift(b, dst, shift_count, + CONST_V<128>(b, 0)); +} + +template +static InstTransResult doPSRLrr(llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + const llvm::MCOperand &src) { + NASSERT(src.isReg()); + + llvm::Value *shift_count = R_READ<128>(b, src.getReg()); + + return doNewShift(b, dst, shift_count, + CONST_V<128>(b, 0)); +} + +template +static InstTransResult doPSRLrm(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + llvm::Value *memAddr) { + llvm::Value *shift_count = M_READ<128>(ip, b, memAddr); + + return doNewShift(b, dst, shift_count, + CONST_V<128>(b, 0)); +} + +template +static InstTransResult doPSRLri(llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + const llvm::MCOperand &src) { + NASSERT(src.isImm()); + + llvm::Value *shift_count = CONST_V<128>(b, src.getImm()); + + return doNewShift(b, dst, shift_count, + CONST_V<128>(b, 0)); +} + +template +static InstTransResult doPSLLri(llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + const llvm::MCOperand &src) { + NASSERT(src.isImm()); + + llvm::Value *shift_count = CONST_V<128>(b, src.getImm()); + + return doNewShift(b, dst, shift_count, + CONST_V<128>(b, 0)); +} + +template +static llvm::Value* doDoubleShuffle(llvm::BasicBlock *&b, llvm::Value *input1, + llvm::Value *input2, unsigned order) { + NASSERT(width % elemwidth == 0); + + int elem_count = width / elemwidth; + + Type *elem_ty; + VectorType *vt; + + std::tie(vt, elem_ty) = getIntVectorTypes(b, elemwidth, elem_count); + + llvm::Value *vecInput1 = INT_AS_VECTOR(b, input1); + llvm::Value *vecInput2 = INT_AS_VECTOR(b, input2); + + llvm::Value *vecShuffle; + if (32 == elemwidth) { + // Based on order, take two doublewords from first vector of 4 double words, and + // two next two double words from second vector of 4 double words. + Constant *shuffle_vec[4] = {CONST_V<32>(b, (order >> 0) & 3), CONST_V<32>( + b, (order >> 2) & 3), CONST_V<32>(b, elem_count + ((order >> 4) & 3)), + CONST_V<32>(b, elem_count + ((order >> 6) & 3)), }; + + vecShuffle = ConstantVector::get(shuffle_vec); + } else if (64 == elemwidth) { + // Based on order, take one quadword from first vector of 2 quadwords, + // and next quadword from second vector of 2 quadwords + Constant *shuffle_vec[2] = {CONST_V<32>(b, (order >> 0) & 1), CONST_V<32>( + b, elem_count + ((order >> 1) & 1)), }; + + vecShuffle = ConstantVector::get(shuffle_vec); + } + // do the shuffle + llvm::Value *shuffled = new ShuffleVectorInst(vecInput1, vecInput2, + vecShuffle, "", b); + + // convert the output back to an integer + llvm::Value *intOutput = CastInst::Create( + Instruction::BitCast, shuffled, Type::getIntNTy(b->getContext(), width), + "", b); + + return intOutput; +} + +template +static llvm::Value* doShuffle(llvm::BasicBlock *&b, llvm::Value *input, + unsigned order) { + NASSERT(width % elemwidth == 0); + + int elem_count = width / elemwidth; + + Type *elem_ty; + VectorType *vt; + + std::tie(vt, elem_ty) = getIntVectorTypes(b, elemwidth, elem_count); + + llvm::Value *vecInput = INT_AS_VECTOR(b, input); + + Constant *shuffle_vec[4] = {CONST_V<32>(b, (order >> 0) & 3), CONST_V<32>( + b, (order >> 2) & 3), CONST_V<32>(b, (order >> 4) & 3), CONST_V<32>( + b, (order >> 6) & 3), }; + + llvm::Value *vecShuffle = ConstantVector::get(shuffle_vec); + + // we are only shuffling one vector, so the + // other one is undefined + llvm::Value *vecUndef = UndefValue::get(vt); + + // do the shuffle + llvm::Value *shuffled = new ShuffleVectorInst(vecInput, vecUndef, vecShuffle, + "", b); + + // convert the output back to an integer + llvm::Value *intOutput = CastInst::Create( + Instruction::BitCast, shuffled, Type::getIntNTy(b->getContext(), width), + "", b); + + return intOutput; +} + +template +static llvm::Value* doBlendVV(llvm::BasicBlock *&b, llvm::Value *input1, + llvm::Value *input2, llvm::Value *order) { + NASSERT(width % elemwidth == 0); + + int elem_count = width / elemwidth; + + Type *elem_ty; + VectorType *vt; + + std::tie(vt, elem_ty) = getIntVectorTypes(b, elemwidth, elem_count); + + llvm::Value *vecInput1 = INT_AS_VECTOR(b, input1); + llvm::Value *vecInput2 = INT_AS_VECTOR(b, input2); + + llvm::Value *vecOrder = INT_AS_VECTOR(b, order); + + llvm::Value *resultAlloc = new AllocaInst(vt, nullptr, "", b); + llvm::Value *vecResult = noAliasMCSemaScope(new LoadInst(resultAlloc, "", b)); + + for (int i = 0; i < elem_count; i++) { + // get input value + llvm::Value *toTest = ExtractElementInst::Create(vecOrder, + CONST_V<32>(b, i), "", b); + + // check if high bit is set + llvm::Value *highBitSet = BinaryOperator::CreateAnd( + toTest, CONST_V(b, 1 << (elemwidth - 1)), "", b); + + int mask = 0xF; + switch (width) { + case 128: + mask = 0xF; + break; + case 64: + mask = 0x7; + break; + default: + TASSERT(false, "UNSUPPORTED BIT WIDTH FOR BLEND") + ; } - Value *vecShiftPtr = new AllocaInst(vt, nullptr, "", b); - Value *shiftVector = noAliasMCSemaScope(new LoadInst(vecShiftPtr, "", b)); + llvm::Value *origPiece = ExtractElementInst::Create(vecInput1, + CONST_V<32>(b, i), "", + b); + llvm::Value *newPiece = ExtractElementInst::Create(vecInput2, + CONST_V<32>(b, i), "", + b); - int elem_count = 128/elementwidth; + // check if high bit was not set + llvm::Value *isZero = new ICmpInst( *b, CmpInst::ICMP_EQ, highBitSet, + CONST_V(b, 0)); - // build a shift vector of elem_count - // entries of trunc_shift - for(int i = 0; i < elem_count; i++) { - shiftVector = InsertElementInst::Create( - shiftVector, - trunc_shift, - CONST_V<32>(b, i), - "", - b ); + // pick either other byte position, or zero + llvm::Value *whichValue = SelectInst::Create(isZero, // if highBit is zero (aka not set), we keep old piece + origPiece, // use dst version + newPiece, // use src version (high bit is 1) + "", b); + + vecResult = InsertElementInst::Create(vecResult, whichValue, + CONST_V<32>(b, i), "", b); + } + + // convert the output back to an integer + llvm::Value *intOutput = CastInst::Create( + Instruction::BitCast, vecResult, Type::getIntNTy(b->getContext(), width), + "", b); + + return intOutput; +} + +template +static llvm::Value* doShuffleRR(llvm::BasicBlock *&b, llvm::Value *input, + llvm::Value *order) { + NASSERT(width % elemwidth == 0); + + int elem_count = width / elemwidth; + + Type *elem_ty; + VectorType *vt; + + std::tie(vt, elem_ty) = getIntVectorTypes(b, elemwidth, elem_count); + + llvm::Value *vecInput = INT_AS_VECTOR(b, input); + llvm::Value *vecOrder = INT_AS_VECTOR(b, order); + + llvm::Value *resultAlloc = new AllocaInst(vt, nullptr, "", b); + llvm::Value *vecResult = noAliasMCSemaScope(new LoadInst(resultAlloc, "", b)); + + for (int i = 0; i < elem_count; i++) { + // get input value + llvm::Value *toTest = ExtractElementInst::Create(vecOrder, + CONST_V<32>(b, i), "", b); + + // check if high bit is set + llvm::Value *highBitSet = BinaryOperator::CreateAnd( + toTest, CONST_V(b, 1 << (elemwidth - 1)), "", b); + + int mask = 0xF; + switch (width) { + case 128: + mask = 0xF; + break; + case 64: + mask = 0x7; + break; + default: + TASSERT(false, "UNSUPPORTED BIT WIDTH FOR PSHUFB") + ; } - // shift each element of the vector - Value *shifted = BinaryOperator::Create(bin_op, vecValue, shiftVector, "", b); + // extract the low bits + llvm::Value *lowBits = BinaryOperator::CreateAnd( + toTest, CONST_V(b, mask), "", b); - // convert value back to a 128bit int - Value *back_to_int = CastInst::Create( - Instruction::BitCast, - shifted, - Type::getIntNTy(b->getContext(), 128), - "", - b); + llvm::Value *origPiece = ExtractElementInst::Create(vecInput, lowBits, "", + b); - // write back to register - Value *final_to_write = back_to_int; + // check if high bit was not set + llvm::Value *isZero = new ICmpInst( *b, CmpInst::ICMP_EQ, highBitSet, + CONST_V(b, 0)); - // if this is an instruction that needs - // a special case for shifts of - // count >= width, then check for the fallback - // option - if( fallback != nullptr ) { - // yes,. this means all th work above was not - // necessary. Ideally the optimizer will only - // keep the fallback case. And this way - // we don't need to generate multiple BBs - final_to_write = SelectInst::Create( - countOverLimit, - fallback, - back_to_int, - "", - b); - } - - R_WRITE<128>(b, dst.getReg(), final_to_write); + // pick either other byte position, or zero + llvm::Value *whichValue = SelectInst::Create(isZero, // if highBit is zero (aka not set), we take a piece of the vector + origPiece, // vector piece + CONST_V(b, 0), // if it is set, we take zero + "", b); - return ContinueBlock; + vecResult = InsertElementInst::Create(vecResult, whichValue, + CONST_V<32>(b, i), "", b); + } + + // convert the output back to an integer + llvm::Value *intOutput = CastInst::Create( + Instruction::BitCast, vecResult, Type::getIntNTy(b->getContext(), width), + "", b); + + return intOutput; } -template -static InstTransResult doPSRArr(BasicBlock *&b, const MCOperand &dst, const MCOperand &src) -{ - NASSERT(src.isReg()); +template +static InstTransResult doBLENDVBrr(llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + const llvm::MCOperand &src) { + NASSERT(dst.isReg()); + NASSERT(src.isReg()); - Value *shift_count = R_READ<128>(b, src.getReg()); + llvm::Value *input1 = R_READ(b, dst.getReg()); + llvm::Value *input2 = R_READ(b, src.getReg()); + llvm::Value *order = R_READ(b, X86::XMM0); - return doNewShift(b, dst, shift_count, nullptr); + llvm::Value *blended = doBlendVV(b, input1, input2, order); + + R_WRITE(b, dst.getReg(), blended); + return ContinueBlock; } -template -static InstTransResult doPSRArm(InstPtr ip, BasicBlock *&b, const MCOperand &dst, Value *memAddr) -{ - Value *shift_count = M_READ<128>(ip, b, memAddr); +template +static InstTransResult doBLENDVBrm(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + llvm::Value *memAddr) { + NASSERT(dst.isReg()); + NASSERT(memAddr != nullptr); - return doNewShift(b, dst, shift_count, nullptr); + llvm::Value *input1 = R_READ(b, dst.getReg()); + llvm::Value *input2 = M_READ(ip, b, memAddr); + llvm::Value *order = R_READ(b, X86::XMM0); + + llvm::Value *blended = doBlendVV(b, input1, input2, order); + R_WRITE(b, dst.getReg(), blended); + return ContinueBlock; } -template -static InstTransResult doPSRAri(BasicBlock *&b, const MCOperand &dst, const MCOperand &src) -{ - NASSERT(src.isImm()); +template +static InstTransResult doPSHUFBrr(llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + const llvm::MCOperand &src) { + NASSERT(dst.isReg()); + NASSERT(src.isReg()); - Value *shift_count = CONST_V<128>(b, src.getImm()); + llvm::Value *input = R_READ(b, dst.getReg()); + llvm::Value *order = R_READ(b, src.getReg()); - return doNewShift(b, dst, shift_count, nullptr); + llvm::Value *shuffled = doShuffleRR(b, input, order); + + R_WRITE(b, dst.getReg(), shuffled); + return ContinueBlock; } -template -static InstTransResult doPSLLrr(BasicBlock *&b, const MCOperand &dst, const MCOperand &src) -{ - NASSERT(src.isReg()); +template +static InstTransResult doPSHUFBrm(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + llvm::Value *memAddr) { + NASSERT(dst.isReg()); + NASSERT(memAddr != nullptr); - Value *shift_count = R_READ<128>(b, src.getReg()); + llvm::Value *order = M_READ(ip, b, memAddr); + llvm::Value *input = R_READ(b, dst.getReg()); - return doNewShift(b, dst, shift_count, CONST_V<128>(b, 0)); + llvm::Value *shuffled = doShuffleRR(b, input, order); + R_WRITE(b, dst.getReg(), shuffled); + return ContinueBlock; } -template -static InstTransResult doPSLLrm(InstPtr ip, BasicBlock *&b, const MCOperand &dst, Value *memAddr) -{ - Value *shift_count = M_READ<128>(ip, b, memAddr); +static InstTransResult doPSHUFDri(llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + const llvm::MCOperand &src, + const llvm::MCOperand &order) { + NASSERT(dst.isReg()); + NASSERT(src.isReg()); + NASSERT(order.isImm()); - return doNewShift(b, dst, shift_count, CONST_V<128>(b, 0)); + llvm::Value *input = R_READ<128>(b, src.getReg()); + + llvm::Value *shuffled = doShuffle<128, 32>(b, input, order.getImm()); + + R_WRITE<128>(b, dst.getReg(), shuffled); + return ContinueBlock; } -template -static InstTransResult doPSRLrr(BasicBlock *&b, const MCOperand &dst, const MCOperand &src) -{ - NASSERT(src.isReg()); +static InstTransResult doPSHUFDmi(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + llvm::Value *mem_addr, + const llvm::MCOperand &order) { + NASSERT(dst.isReg()); + NASSERT(order.isImm()); - Value *shift_count = R_READ<128>(b, src.getReg()); + llvm::Value *input = M_READ<128>(ip, b, mem_addr); - return doNewShift(b, dst, shift_count, CONST_V<128>(b, 0)); + llvm::Value *shuffled = doShuffle<128, 32>(b, input, order.getImm()); + + R_WRITE<128>(b, dst.getReg(), shuffled); + return ContinueBlock; } -template -static InstTransResult doPSRLrm(InstPtr ip, BasicBlock *&b, const MCOperand &dst, Value *memAddr) -{ - Value *shift_count = M_READ<128>(ip, b, memAddr); +template +static llvm::Value* doInsertion(llvm::BasicBlock *&b, llvm::Value *input, + llvm::Value *what, unsigned position) { + llvm::Value *vec = INT_AS_VECTOR(b, input); - return doNewShift(b, dst, shift_count, CONST_V<128>(b, 0)); + llvm::Value *newvec = InsertElementInst::Create(vec, what, + CONST_V<32>(b, position), "", + b); + + llvm::Value *newint = VECTOR_AS_INT(b, newvec); + + return newint; } -template -static InstTransResult doPSRLri(BasicBlock *&b, const MCOperand &dst, const MCOperand &src) -{ - NASSERT(src.isImm()); +static InstTransResult doPINSRWrri(llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + const llvm::MCOperand &src, + const llvm::MCOperand &order) { + NASSERT(dst.isReg()); + NASSERT(src.isReg()); + NASSERT(order.isImm()); - Value *shift_count = CONST_V<128>(b, src.getImm()); + llvm::Value *vec = R_READ<128>(b, dst.getReg()); + llvm::Value *elem = R_READ<16>(b, src.getReg()); - return doNewShift(b, dst, shift_count, CONST_V<128>(b, 0)); + llvm::Value *new_vec = doInsertion<128, 16>(b, vec, elem, order.getImm()); + + R_WRITE<128>(b, dst.getReg(), new_vec); + return ContinueBlock; } -template -static InstTransResult doPSLLri(BasicBlock *&b, const MCOperand &dst, const MCOperand &src) -{ - NASSERT(src.isImm()); +static InstTransResult doPINSRWrmi(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + llvm::Value *memAddr, + const llvm::MCOperand &order) { - Value *shift_count = CONST_V<128>(b, src.getImm()); + NASSERT(dst.isReg()); + NASSERT(order.isImm()); - return doNewShift(b, dst, shift_count, CONST_V<128>(b, 0)); + llvm::Value *vec = R_READ<128>(b, dst.getReg()); + llvm::Value *elem = M_READ<16>(ip, b, memAddr); + + llvm::Value *new_vec = doInsertion<128, 16>(b, vec, elem, order.getImm()); + + R_WRITE<128>(b, dst.getReg(), new_vec); + return ContinueBlock; } -template -static Value* doDoubleShuffle(BasicBlock *&b, Value *input1, Value *input2, unsigned order) -{ - NASSERT(width % elemwidth == 0); +template +static llvm::Value* doExtraction(llvm::BasicBlock *&b, llvm::Value *input, + unsigned position) { + llvm::Value *vec = INT_AS_VECTOR(b, input); - int elem_count = width/elemwidth; + llvm::Value *element = ExtractElementInst::Create(vec, + CONST_V<32>(b, position), + "", b); - Type *elem_ty; - VectorType *vt; - - std::tie(vt, elem_ty) = getIntVectorTypes(b, elemwidth, elem_count); - - Value *vecInput1 = INT_AS_VECTOR(b, input1); - Value *vecInput2 = INT_AS_VECTOR(b, input2); - - Value *vecShuffle; - if(32 == elemwidth) { - // Based on order, take two doublewords from first vector of 4 double words, and - // two next two double words from second vector of 4 double words. - Constant *shuffle_vec[4] = { - CONST_V<32>(b, (order >> 0) & 3), - CONST_V<32>(b, (order >> 2) & 3), - CONST_V<32>(b, elem_count + ((order >> 4) & 3)), - CONST_V<32>(b, elem_count + ((order >> 6) & 3)), - }; - - vecShuffle = ConstantVector::get(shuffle_vec); - } else if(64 == elemwidth) { - // Based on order, take one quadword from first vector of 2 quadwords, - // and next quadword from second vector of 2 quadwords - Constant *shuffle_vec[2] = { - CONST_V<32>(b, (order >> 0) & 1), - CONST_V<32>(b, elem_count + ((order >> 1) & 1)), - }; - - vecShuffle = ConstantVector::get(shuffle_vec); - } - // do the shuffle - Value *shuffled = new ShuffleVectorInst( - vecInput1, - vecInput2, - vecShuffle, - "", - b); - - // convert the output back to an integer - Value *intOutput = CastInst::Create( - Instruction::BitCast, - shuffled, - Type::getIntNTy(b->getContext(), width), - "", - b); - - return intOutput; + return element; } -template -static Value* doShuffle(BasicBlock *&b, Value *input, unsigned order) -{ - NASSERT(width % elemwidth == 0); +static InstTransResult doPEXTRWri(llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + const llvm::MCOperand &src, + const llvm::MCOperand &order) { + NASSERT(dst.isReg()); + NASSERT(src.isReg()); + NASSERT(order.isImm()); - int elem_count = width/elemwidth; + llvm::Value *vec = R_READ<128>(b, src.getReg()); - Type *elem_ty; - VectorType *vt; + llvm::Value *item = doExtraction<128, 16>(b, vec, order.getImm()); - std::tie(vt, elem_ty) = getIntVectorTypes(b, elemwidth, elem_count); + // upper bits are set to zero + llvm::Value *extItem = new ZExtInst(item, Type::getInt32Ty(b->getContext()), + "", b); - Value *vecInput = INT_AS_VECTOR(b, input); - - Constant *shuffle_vec[4] = { - CONST_V<32>(b, (order >> 0) & 3), - CONST_V<32>(b, (order >> 2) & 3), - CONST_V<32>(b, (order >> 4) & 3), - CONST_V<32>(b, (order >> 6) & 3), - }; - - - Value *vecShuffle = ConstantVector::get(shuffle_vec); - - - // we are only shuffling one vector, so the - // other one is undefined - Value *vecUndef = UndefValue::get(vt); - - // do the shuffle - Value *shuffled = new ShuffleVectorInst( - vecInput, - vecUndef, - vecShuffle, - "", - b); - - // convert the output back to an integer - Value *intOutput = CastInst::Create( - Instruction::BitCast, - shuffled, - Type::getIntNTy(b->getContext(), width), - "", - b); - - return intOutput; + R_WRITE<32>(b, dst.getReg(), extItem); + return ContinueBlock; } -template -static Value* doBlendVV(BasicBlock *&b, Value *input1, Value *input2, Value *order) -{ - NASSERT(width % elemwidth == 0); +static InstTransResult doPEXTRWmr(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *memAddr, + const llvm::MCOperand &src, + const llvm::MCOperand &order) { + NASSERT(src.isReg()); + NASSERT(order.isImm()); - int elem_count = width/elemwidth; + llvm::Value *vec = R_READ<128>(b, src.getReg()); - Type *elem_ty; - VectorType *vt; + llvm::Value *item = doExtraction<128, 16>(b, vec, order.getImm()); - std::tie(vt, elem_ty) = getIntVectorTypes(b, elemwidth, elem_count); - - Value *vecInput1 = INT_AS_VECTOR(b, input1); - Value *vecInput2 = INT_AS_VECTOR(b, input2); - - Value *vecOrder = INT_AS_VECTOR(b, order); - - Value *resultAlloc = new AllocaInst(vt, nullptr, "", b); - Value *vecResult = noAliasMCSemaScope(new LoadInst(resultAlloc, "", b)); - - for(int i = 0; i < elem_count; i++) { - // get input value - Value *toTest = ExtractElementInst::Create(vecOrder, CONST_V<32>(b, i), "", b); - - // check if high bit is set - Value *highBitSet = BinaryOperator::CreateAnd( - toTest, - CONST_V(b, 1 << (elemwidth-1)), - "", b); - - int mask = 0xF; - switch(width) - { - case 128: - mask = 0xF; - break; - case 64: - mask = 0x7; - break; - default: - TASSERT(false, "UNSUPPORTED BIT WIDTH FOR BLEND"); - } - - - Value *origPiece = ExtractElementInst::Create(vecInput1, CONST_V<32>(b, i), "", b); - Value *newPiece = ExtractElementInst::Create(vecInput2, CONST_V<32>(b, i), "", b); - - // check if high bit was not set - Value *isZero = new ICmpInst(*b, - CmpInst::ICMP_EQ, - highBitSet, - CONST_V(b, 0)); - - // pick either other byte position, or zero - Value *whichValue = SelectInst::Create( - isZero, // if highBit is zero (aka not set), we keep old piece - origPiece, // use dst version - newPiece, // use src version (high bit is 1) - "", b); - - vecResult = InsertElementInst::Create( - vecResult, - whichValue, - CONST_V<32>(b, i), - "", - b ); - } - - // convert the output back to an integer - Value *intOutput = CastInst::Create( - Instruction::BitCast, - vecResult, - Type::getIntNTy(b->getContext(), width), - "", - b); - - return intOutput; + M_WRITE<16>(ip, b, memAddr, item); + return ContinueBlock; } -template -static Value* doShuffleRR(BasicBlock *&b, Value *input, Value *order) -{ - NASSERT(width % elemwidth == 0); +enum UnpackType { + UNPACK_LOW, + UNPACK_HIGH +}; +template +static llvm::Value* doUnpack(llvm::BasicBlock *&b, llvm::Value *v1, + llvm::Value *v2) { + NASSERT(width % elemwidth == 0); - int elem_count = width/elemwidth; + int elem_count = width / elemwidth; - Type *elem_ty; - VectorType *vt; + Type *elem_ty; + VectorType *vt; - std::tie(vt, elem_ty) = getIntVectorTypes(b, elemwidth, elem_count); + std::tie(vt, elem_ty) = getIntVectorTypes(b, elemwidth, elem_count); - Value *vecInput = INT_AS_VECTOR(b, input); - Value *vecOrder = INT_AS_VECTOR(b, order); + llvm::Value *vecInput1 = INT_AS_VECTOR(b, v1); + llvm::Value *vecInput2 = INT_AS_VECTOR(b, v2); - Value *resultAlloc = new AllocaInst(vt, nullptr, "", b); - Value *vecResult = noAliasMCSemaScope(new LoadInst(resultAlloc, "", b)); + std::vector shuffle_vec; - for(int i = 0; i < elem_count; i++) { - // get input value - Value *toTest = ExtractElementInst::Create(vecOrder, CONST_V<32>(b, i), "", b); + int elem_start = 0; + if (upt == UNPACK_HIGH) { + elem_start = elem_count / 2; + } - // check if high bit is set - Value *highBitSet = BinaryOperator::CreateAnd( - toTest, - CONST_V(b, 1 << (elemwidth-1)), - "", b); + for (int i = 0; i < elem_count / 2; i++) { + shuffle_vec.push_back(CONST_V<32>(b, elem_start + i + elem_count)); + shuffle_vec.push_back(CONST_V<32>(b, elem_start + i)); + } + llvm::Value *vecShuffle = ConstantVector::get(shuffle_vec); - int mask = 0xF; - switch(width) - { - case 128: - mask = 0xF; - break; - case 64: - mask = 0x7; - break; - default: - TASSERT(false, "UNSUPPORTED BIT WIDTH FOR PSHUFB"); - } + // do the shuffle + llvm::Value *shuffled = new ShuffleVectorInst(vecInput1, vecInput2, + vecShuffle, "", b); - // extract the low bits - Value *lowBits = BinaryOperator::CreateAnd( - toTest, - CONST_V(b, mask), - "", b); + // convert the output back to an integer + llvm::Value *intOutput = CastInst::Create( + Instruction::BitCast, shuffled, Type::getIntNTy(b->getContext(), width), + "", b); - Value *origPiece = ExtractElementInst::Create(vecInput, lowBits, "", b); - - // check if high bit was not set - Value *isZero = new ICmpInst(*b, - CmpInst::ICMP_EQ, - highBitSet, - CONST_V(b, 0)); - - // pick either other byte position, or zero - Value *whichValue = SelectInst::Create( - isZero, // if highBit is zero (aka not set), we take a piece of the vector - origPiece, // vector piece - CONST_V(b, 0), // if it is set, we take zero - "", b); - - vecResult = InsertElementInst::Create( - vecResult, - whichValue, - CONST_V<32>(b, i), - "", - b ); - } - - // convert the output back to an integer - Value *intOutput = CastInst::Create( - Instruction::BitCast, - vecResult, - Type::getIntNTy(b->getContext(), width), - "", - b); - - return intOutput; + return intOutput; } -template -static InstTransResult doBLENDVBrr(BasicBlock *&b, const MCOperand &dst, const MCOperand &src) -{ - NASSERT(dst.isReg()); - NASSERT(src.isReg()); +template +static InstTransResult doPUNPCKVV(llvm::BasicBlock *&b, + const llvm::MCOperand &dst, llvm::Value *v1, + llvm::Value *v2) { - Value *input1 = R_READ(b, dst.getReg()); - Value *input2 = R_READ(b, src.getReg()); - Value *order = R_READ(b, X86::XMM0); - - Value *blended = doBlendVV(b, input1, input2, order); + NASSERT(dst.isReg()); - R_WRITE(b, dst.getReg(), blended); - return ContinueBlock; + llvm::Value *shuffled = doUnpack(b, v1, v2); + + R_WRITE(b, dst.getReg(), shuffled); + return ContinueBlock; } -template -static InstTransResult doBLENDVBrm( - InstPtr ip, - BasicBlock *&b, - const MCOperand &dst, - Value *memAddr) -{ - NASSERT(dst.isReg()); - NASSERT(memAddr != nullptr); +template +static InstTransResult doPUNPCKrr(llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + const llvm::MCOperand &src) { + NASSERT(dst.isReg()); + NASSERT(src.isReg()); - Value *input1 = R_READ(b, dst.getReg()); - Value *input2 = M_READ(ip, b, memAddr); - Value *order = R_READ(b, X86::XMM0); + llvm::Value *srcVal = R_READ(b, src.getReg()); + llvm::Value *dstVal = R_READ(b, dst.getReg()); - Value *blended = doBlendVV(b, input1, input2, order); - R_WRITE(b, dst.getReg(), blended); - return ContinueBlock; + return doPUNPCKVV(b, dst, srcVal, dstVal); } -template -static InstTransResult doPSHUFBrr(BasicBlock *&b, const MCOperand &dst, const MCOperand &src) -{ - NASSERT(dst.isReg()); - NASSERT(src.isReg()); +template +static InstTransResult doPUNPCKrm(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + llvm::Value *memAddr) { + NASSERT(dst.isReg()); + NASSERT(memAddr != nullptr); - Value *input = R_READ(b, dst.getReg()); - Value *order = R_READ(b, src.getReg()); - - Value *shuffled = doShuffleRR(b, input, order); + llvm::Value *srcVal = M_READ(ip, b, memAddr); + llvm::Value *dstVal = R_READ(b, dst.getReg()); - R_WRITE(b, dst.getReg(), shuffled); - return ContinueBlock; + return doPUNPCKVV(b, dst, srcVal, dstVal); } -template -static InstTransResult doPSHUFBrm( - InstPtr ip, - BasicBlock *&b, - const MCOperand &dst, - Value *memAddr) -{ - NASSERT(dst.isReg()); - NASSERT(memAddr != nullptr); +template +static llvm::Value* do_SATURATED_SUB(llvm::BasicBlock *&b, llvm::Value *v1, + llvm::Value *v2) { + NASSERT(width % elemwidth == 0); + constexpr int elem_count = width / elemwidth; + Type *elem_ty; + VectorType *vt; + Type *int32ty = Type::getIntNTy(b->getContext(), 32); + VectorType *vt_int32ty = VectorType::get(int32ty, elem_count); - Value *order = M_READ(ip, b, memAddr); - Value *input = R_READ(b, dst.getReg()); + std::tie(vt, elem_ty) = getIntVectorTypes(b, elemwidth, elem_count); + llvm::Value *vecInput1 = INT_AS_VECTOR(b, v1); + llvm::Value *vecInput2 = INT_AS_VECTOR(b, v2); - Value *shuffled = doShuffleRR(b, input, order); - R_WRITE(b, dst.getReg(), shuffled); - return ContinueBlock; + // result = v1 - v2 + llvm::Value *op_result = BinaryOperator::Create(Instruction::Sub, vecInput1, + vecInput2, "", b); + + // if v1 is => v2, then we keep the original value (mask with 0xFF...) + // else, if v1 < v2, make it saturate to 0x00 (mask with 0x00...) + // The mask can be made as a sign extend of the (v1 => v2) vector op + + llvm::Value *comparison = CmpInst::Create(Instruction::ICmp, cmp_op, + vecInput1, vecInput2, "", b); + // values we should keep get sign extended to 0b11111... + // values we want to set to zero get sign extended to 0b000000... + llvm::Value *saturate_mask = new SExtInst(comparison, vt, "", b); + + // mask result with the saturation mask + llvm::Value *saturated = BinaryOperator::Create(Instruction::And, op_result, + saturate_mask, "", b); + + llvm::Value *intOutput = CastInst::Create( + Instruction::BitCast, saturated, Type::getIntNTy(b->getContext(), width), + "", b); + return intOutput; } -static InstTransResult doPSHUFDri(BasicBlock *&b, const MCOperand &dst, const MCOperand &src, const MCOperand &order) -{ - NASSERT(dst.isReg()); - NASSERT(src.isReg()); - NASSERT(order.isImm()); +template +static InstTransResult do_SATURATED_SUB_RR(NativeInstPtr ip, + llvm::BasicBlock *& block, + const llvm::MCOperand &o1, + const llvm::MCOperand &o2) { + NASSERT(o1.isReg()); + NASSERT(o2.isReg()); - Value *input = R_READ<128>(b, src.getReg()); - - Value *shuffled = doShuffle<128,32>(b, input, order.getImm()); + llvm::Value *opVal1 = R_READ(block, o1.getReg()); + llvm::Value *opVal2 = R_READ(block, o2.getReg()); - R_WRITE<128>(b, dst.getReg(), shuffled); - return ContinueBlock; + llvm::Value *result = do_SATURATED_SUB(block, + opVal1, + opVal2); + R_WRITE(block, o1.getReg(), result); + return ContinueBlock; } -static InstTransResult doPSHUFDmi(InstPtr ip, BasicBlock *&b, const MCOperand &dst, Value *mem_addr, const MCOperand &order) -{ - NASSERT(dst.isReg()); - NASSERT(order.isImm()); +template +static InstTransResult do_SATURATED_SUB_RM(NativeInstPtr ip, + llvm::BasicBlock *& block, + const llvm::MCOperand &o1, + llvm::Value *addr) { + NASSERT(o1.isReg()); + llvm::Value *opVal1 = R_READ(block, o1.getReg()); + llvm::Value *opVal2 = M_READ(ip, block, addr); - Value *input = M_READ<128>(ip, b, mem_addr); - - Value *shuffled = doShuffle<128,32>(b, input, order.getImm()); - - R_WRITE<128>(b, dst.getReg(), shuffled); - return ContinueBlock; + llvm::Value *result = do_SATURATED_SUB(block, + opVal1, + opVal2); + R_WRITE(block, o1.getReg(), result); + return ContinueBlock; } -template -static Value* doInsertion(BasicBlock *&b, Value *input, Value *what, unsigned position) -{ - Value *vec = INT_AS_VECTOR(b, input); - - Value *newvec = InsertElementInst::Create(vec, what, CONST_V<32>(b, position), "", b); +template +static InstTransResult do_SSE_COMPARE(const llvm::MCOperand &dst, + llvm::BasicBlock *&b, llvm::Value *v1, + llvm::Value *v2) { + NASSERT(width % elemwidth == 0); - Value *newint = VECTOR_AS_INT(b, newvec); - - return newint; + int elem_count = width / elemwidth; + + Type *elem_ty; + VectorType *vt; + + std::tie(vt, elem_ty) = getIntVectorTypes(b, elemwidth, elem_count); + + llvm::Value *vecInput1 = INT_AS_VECTOR(b, v1); + llvm::Value *vecInput2 = INT_AS_VECTOR(b, v2); + + llvm::Value *op_out = CmpInst::Create(Instruction::ICmp, cmp_op, vecInput1, + vecInput2, "", b); + + // SExt to width since CmpInst returns + // a vector of i1 + llvm::Value *sext_out = new SExtInst(op_out, vt, "", b); + + // convert the output back to an integer + llvm::Value *intOutput = CastInst::Create( + Instruction::BitCast, sext_out, Type::getIntNTy(b->getContext(), width), + "", b); + + R_WRITE(b, dst.getReg(), intOutput); + return ContinueBlock; } -static InstTransResult doPINSRWrri(BasicBlock *&b, const MCOperand &dst, const MCOperand &src, const MCOperand &order) -{ - NASSERT(dst.isReg()); - NASSERT(src.isReg()); - NASSERT(order.isImm()); +template +static InstTransResult do_SSE_COMPARE_RM(NativeInstPtr ip, + llvm::BasicBlock *& block, + const llvm::MCOperand &o1, + llvm::Value *addr) { + NASSERT(o1.isReg()); - Value *vec = R_READ<128>(b, dst.getReg()); - Value *elem = R_READ<16>(b, src.getReg()); - - Value *new_vec = doInsertion<128,16>(b, vec, elem, order.getImm()); + llvm::Value *opVal1 = R_READ(block, o1.getReg()); + llvm::Value *opVal2 = M_READ(ip, block, addr); - R_WRITE<128>(b, dst.getReg(), new_vec); - return ContinueBlock; + return do_SSE_COMPARE(o1, block, opVal1, opVal2); } -static InstTransResult doPINSRWrmi(InstPtr ip, BasicBlock *&b, const MCOperand &dst, Value *memAddr, const MCOperand &order) -{ +template +static InstTransResult do_SSE_COMPARE_RR(NativeInstPtr ip, + llvm::BasicBlock *& block, + const llvm::MCOperand &o1, + const llvm::MCOperand &o2) { + NASSERT(o1.isReg()); + NASSERT(o2.isReg()); - NASSERT(dst.isReg()); - NASSERT(order.isImm()); + llvm::Value *opVal1 = R_READ(block, o1.getReg()); + llvm::Value *opVal2 = R_READ(block, o2.getReg()); - Value *vec = R_READ<128>(b, dst.getReg()); - Value *elem = M_READ<16>(ip, b, memAddr); - - Value *new_vec = doInsertion<128,16>(b, vec, elem, order.getImm()); - - R_WRITE<128>(b, dst.getReg(), new_vec); - return ContinueBlock; + return do_SSE_COMPARE(o1, block, opVal1, opVal2); } -template -static Value* doExtraction(BasicBlock *&b, Value *input, unsigned position) -{ - Value *vec = INT_AS_VECTOR(b, input); - - Value *element = ExtractElementInst::Create(vec, CONST_V<32>(b, position), "", b); - - return element; +template +static InstTransResult do_SSE_VECTOR_OP(const llvm::MCOperand &dst, + llvm::BasicBlock *&b, llvm::Value *v1, + llvm::Value *v2) { + NASSERT(width % elemwidth == 0); + llvm::Value *vecInput1 = INT_AS_VECTOR(b, v1); + llvm::Value *vecInput2 = INT_AS_VECTOR(b, v2); + + llvm::Value *op_out = BinaryOperator::Create(bin_op, vecInput1, vecInput2, "", + b); + + // convert the output back to an integer + llvm::Value *intOutput = CastInst::Create( + Instruction::BitCast, op_out, Type::getIntNTy(b->getContext(), width), "", + b); + + R_WRITE(b, dst.getReg(), intOutput); + return ContinueBlock; } -static InstTransResult doPEXTRWri(BasicBlock *&b, const MCOperand &dst, const MCOperand &src, const MCOperand &order) -{ - NASSERT(dst.isReg()); - NASSERT(src.isReg()); - NASSERT(order.isImm()); +template +static InstTransResult do_SSE_FP_VECTOR_OP(const llvm::MCOperand &dst, + llvm::BasicBlock *&b, + llvm::Value *v1, llvm::Value *v2) { + NASSERT(width % elemwidth == 0); + llvm::Value *vecInput1 = INT_AS_FPVECTOR(b, v1); + llvm::Value *vecInput2 = INT_AS_FPVECTOR(b, v2); - Value *vec = R_READ<128>(b, src.getReg()); - - Value *item = doExtraction<128,16>(b, vec, order.getImm()); + llvm::Value *op_out = BinaryOperator::Create(bin_op, vecInput1, vecInput2, "", + b); - // upper bits are set to zero - Value *extItem = new ZExtInst( - item, - Type::getInt32Ty(b->getContext()), - "", - b); + // convert the output back to an integer + llvm::Value *intOutput = CastInst::Create( + Instruction::BitCast, op_out, Type::getIntNTy(b->getContext(), width), "", + b); - R_WRITE<32>(b, dst.getReg(), extItem); - return ContinueBlock; + R_WRITE(b, dst.getReg(), intOutput); + return ContinueBlock; } -static InstTransResult doPEXTRWmr(InstPtr ip, BasicBlock *&b, Value *memAddr, const MCOperand &src, const MCOperand &order) -{ - NASSERT(src.isReg()); - NASSERT(order.isImm()); +template +static InstTransResult do_SSE_VECTOR_RM(NativeInstPtr ip, + llvm::BasicBlock *& block, + const llvm::MCOperand &o1, + llvm::Value *addr) { + NASSERT(o1.isReg()); - Value *vec = R_READ<128>(b, src.getReg()); - - Value *item = doExtraction<128,16>(b, vec, order.getImm()); + llvm::Value *opVal1 = R_READ(block, o1.getReg()); + llvm::Value *opVal2 = M_READ(ip, block, addr); - M_WRITE<16>(ip, b, memAddr, item); - return ContinueBlock; + return do_SSE_VECTOR_OP(o1, block, opVal1, opVal2); } -enum UnpackType {UNPACK_LOW, UNPACK_HIGH}; -template -static Value* doUnpack(BasicBlock *&b, Value *v1, Value *v2) -{ - NASSERT(width % elemwidth == 0); +template +static InstTransResult do_SSE_VECTOR_RR(NativeInstPtr ip, + llvm::BasicBlock *& block, + const llvm::MCOperand &o1, + const llvm::MCOperand &o2) { + NASSERT(o1.isReg()); + NASSERT(o2.isReg()); - int elem_count = width/elemwidth; + llvm::Value *opVal1 = R_READ(block, o1.getReg()); + llvm::Value *opVal2 = R_READ(block, o2.getReg()); - Type *elem_ty; - VectorType *vt; - - std::tie(vt, elem_ty) = getIntVectorTypes(b, elemwidth, elem_count); - - Value *vecInput1 = INT_AS_VECTOR(b, v1); - Value *vecInput2 = INT_AS_VECTOR(b, v2); - - std::vector shuffle_vec; - - int elem_start = 0; - if(upt == UNPACK_HIGH) { - elem_start = elem_count/2; - } - - for(int i = 0; i < elem_count/2; i++) { - shuffle_vec.push_back(CONST_V<32>(b, elem_start + i + elem_count)); - shuffle_vec.push_back(CONST_V<32>(b, elem_start + i)); - } - Value *vecShuffle = ConstantVector::get(shuffle_vec); - - // do the shuffle - Value *shuffled = new ShuffleVectorInst( - vecInput1, - vecInput2, - vecShuffle, - "", - b); - - // convert the output back to an integer - Value *intOutput = CastInst::Create( - Instruction::BitCast, - shuffled, - Type::getIntNTy(b->getContext(), width), - "", - b); - - return intOutput; + return do_SSE_VECTOR_OP(o1, block, opVal1, opVal2); } -template -static InstTransResult doPUNPCKVV( - BasicBlock *&b, - const MCOperand &dst, - Value *v1, Value *v2) -{ - - NASSERT(dst.isReg()); +template +static InstTransResult do_SSE_FP_VECTOR_RM(NativeInstPtr ip, + llvm::BasicBlock *& block, + const llvm::MCOperand &o1, + llvm::Value *addr) { + NASSERT(o1.isReg()); - Value *shuffled = doUnpack(b, v1, v2); + llvm::Value *opVal1 = R_READ(block, o1.getReg()); + llvm::Value *opVal2 = M_READ(ip, block, addr); - R_WRITE(b, dst.getReg(), shuffled); - return ContinueBlock; + return do_SSE_FP_VECTOR_OP(o1, block, opVal1, + opVal2); } -template -static InstTransResult doPUNPCKrr( - BasicBlock *&b, - const MCOperand &dst, - const MCOperand &src) -{ - NASSERT(dst.isReg()); - NASSERT(src.isReg()); +template +static InstTransResult do_SSE_FP_VECTOR_RR(NativeInstPtr ip, + llvm::BasicBlock *& block, + const llvm::MCOperand &o1, + const llvm::MCOperand &o2) { + NASSERT(o1.isReg()); + NASSERT(o2.isReg()); - Value *srcVal = R_READ(b, src.getReg()); - Value *dstVal = R_READ(b, dst.getReg()); + llvm::Value *opVal1 = R_READ(block, o1.getReg()); + llvm::Value *opVal2 = R_READ(block, o2.getReg()); - return doPUNPCKVV(b, dst, srcVal, dstVal); + return do_SSE_FP_VECTOR_OP(o1, block, opVal1, + opVal2); } -template -static InstTransResult doPUNPCKrm( - InstPtr ip, - BasicBlock *&b, - const MCOperand &dst, - Value *memAddr) -{ - NASSERT(dst.isReg()); - NASSERT(memAddr != nullptr); +template +static llvm::Value* doMAXMINvv(llvm::BasicBlock *&block, llvm::Value *op1, + llvm::Value *op2) { - Value *srcVal = M_READ(ip, b, memAddr); - Value *dstVal = R_READ(b, dst.getReg()); + // TODO: handle the zero case + llvm::Value *is_gt = new FCmpInst( *block, binop, op1, op2); - return doPUNPCKVV(b, dst, srcVal, dstVal); + // if op1 > op2, use op1, else op2 + llvm::Value *which_op = SelectInst::Create(is_gt, op1, op2, "", block); + + return which_op; } -template -static llvm::Value* do_SATURATED_SUB(BasicBlock *&b, Value *v1, Value *v2) -{ - NASSERT(width % elemwidth == 0); - constexpr int elem_count = width/elemwidth; - Type *elem_ty; - VectorType *vt; - Type *int32ty = Type::getIntNTy(b->getContext(), 32); - VectorType *vt_int32ty = VectorType::get(int32ty, elem_count); +template +static InstTransResult doMAXMIN_FP_VECTOR_rr(llvm::BasicBlock *&b, + const llvm::MCOperand &op1, + const llvm::MCOperand &op2) { + NASSERT(op1.isReg()); + NASSERT(op2.isReg()); - std::tie(vt, elem_ty) = getIntVectorTypes(b, elemwidth, elem_count); - Value *vecInput1 = INT_AS_VECTOR(b, v1); - Value *vecInput2 = INT_AS_VECTOR(b, v2); + llvm::Value *op1_val = R_READ(b, op1.getReg()); + llvm::Value *op2_val = R_READ(b, op2.getReg()); - // result = v1 - v2 - Value *op_result = BinaryOperator::Create( - Instruction::Sub, - vecInput1, - vecInput2, - "", - b); + NASSERT(width % elemwidth == 0); + llvm::Value *vecInput1 = INT_AS_FPVECTOR(b, op1_val); + llvm::Value *vecInput2 = INT_AS_FPVECTOR(b, op2_val); - // if v1 is => v2, then we keep the original value (mask with 0xFF...) - // else, if v1 < v2, make it saturate to 0x00 (mask with 0x00...) - // The mask can be made as a sign extend of the (v1 => v2) vector op + llvm::Value *max = doMAXMINvv(b, vecInput1, vecInput2); - Value *comparison = CmpInst::Create( - Instruction::ICmp, - cmp_op, - vecInput1, - vecInput2, - "", - b); - // values we should keep get sign extended to 0b11111... - // values we want to set to zero get sign extended to 0b000000... - Value *saturate_mask = new SExtInst(comparison, vt, "", b); + // convert the output back to an integer + llvm::Value *intOutput = CastInst::Create( + Instruction::BitCast, max, Type::getIntNTy(b->getContext(), width), "", + b); - // mask result with the saturation mask - Value *saturated = BinaryOperator::Create( - Instruction::And, - op_result, - saturate_mask, - "", - b); - - Value *intOutput = CastInst::Create( - Instruction::BitCast, - saturated, - Type::getIntNTy(b->getContext(), width), - "", - b); - return intOutput; + R_WRITE(b, op1.getReg(), intOutput); + return ContinueBlock; } -template -static InstTransResult do_SATURATED_SUB_RR(InstPtr ip, BasicBlock *& block, - const MCOperand &o1, - const MCOperand &o2) -{ - NASSERT(o1.isReg()); - NASSERT(o2.isReg()); +template +static InstTransResult doMAXMIN_FP_VECTOR_rm(NativeInstPtr ip, + llvm::BasicBlock *&b, + const llvm::MCOperand &op1, + llvm::Value *memAddr) { + NASSERT(op1.isReg()); - Value *opVal1 = R_READ(block, o1.getReg()); - Value *opVal2 = R_READ(block, o2.getReg()); + llvm::Value *op1_val = R_READ(b, op1.getReg()); + llvm::Value *op2_val = M_READ(ip, b, memAddr); - Value *result = do_SATURATED_SUB(block, opVal1, opVal2); - R_WRITE(block, o1.getReg(), result); - return ContinueBlock; + NASSERT(width % elemwidth == 0); + llvm::Value *vecInput1 = INT_AS_FPVECTOR(b, op1_val); + llvm::Value *vecInput2 = INT_AS_FPVECTOR(b, op2_val); + + llvm::Value *max = doMAXMINvv(b, vecInput1, vecInput2); + + // convert the output back to an integer + llvm::Value *intOutput = CastInst::Create( + Instruction::BitCast, max, Type::getIntNTy(b->getContext(), width), "", + b); + + R_WRITE(b, op1.getReg(), intOutput); + return ContinueBlock; } -template -static InstTransResult do_SATURATED_SUB_RM(InstPtr ip, BasicBlock *& block, - const MCOperand &o1, - Value *addr) -{ - NASSERT(o1.isReg()); +template +static InstTransResult doMAXMINrr(llvm::BasicBlock *&b, + const llvm::MCOperand &op1, + const llvm::MCOperand &op2) { + NASSERT(op1.isReg()); + NASSERT(op2.isReg()); - Value *opVal1 = R_READ(block, o1.getReg()); - Value *opVal2 = M_READ(ip, block, addr); + llvm::Value *op1_val = R_READ(b, op1.getReg()); + llvm::Value *op2_val = R_READ(b, op2.getReg()); - Value *result = do_SATURATED_SUB(block, opVal1, opVal2); - R_WRITE(block, o1.getReg(), result); - return ContinueBlock; + llvm::Value *fp1_val = INT_AS_FP(b, op1_val); + llvm::Value *fp2_val = INT_AS_FP(b, op2_val); + + llvm::Value *max = doMAXMINvv(b, fp1_val, fp2_val); + R_WRITE(b, op1.getReg(), FP_AS_INT(b, max)); + return ContinueBlock; } -template -static InstTransResult do_SSE_COMPARE(const MCOperand &dst, BasicBlock *&b, Value *v1, Value *v2) -{ - NASSERT(width % elemwidth == 0); +template +static InstTransResult doMAXMINrm(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &op1, + llvm::Value *memAddr) { + NASSERT(op1.isReg()); - int elem_count = width/elemwidth; + llvm::Value *op1_val = R_READ(b, op1.getReg()); + llvm::Value *op2_val = M_READ(ip, b, memAddr); - Type *elem_ty; - VectorType *vt; + llvm::Value *fp1_val = INT_AS_FP(b, op1_val); + llvm::Value *fp2_val = INT_AS_FP(b, op2_val); - std::tie(vt, elem_ty) = getIntVectorTypes(b, elemwidth, elem_count); - - Value *vecInput1 = INT_AS_VECTOR(b, v1); - Value *vecInput2 = INT_AS_VECTOR(b, v2); - - Value *op_out = CmpInst::Create( - Instruction::ICmp, - cmp_op, - vecInput1, - vecInput2, - "", - b); - - // SExt to width since CmpInst returns - // a vector of i1 - Value *sext_out = new SExtInst(op_out, vt, "", b); - - // convert the output back to an integer - Value *intOutput = CastInst::Create( - Instruction::BitCast, - sext_out, - Type::getIntNTy(b->getContext(), width), - "", - b); - - R_WRITE(b, dst.getReg(), intOutput); - return ContinueBlock; + llvm::Value *max = doMAXMINvv(b, fp1_val, fp2_val); + R_WRITE(b, op1.getReg(), FP_AS_INT(b, max)); + return ContinueBlock; } -template -static InstTransResult do_SSE_COMPARE_RM(InstPtr ip, BasicBlock *& block, - const MCOperand &o1, - Value *addr) -{ - NASSERT(o1.isReg()); +template +static InstTransResult do_PANDNrr(NativeInstPtr ip, llvm::BasicBlock *& block, + const llvm::MCOperand &o1, + const llvm::MCOperand &o2) { + NASSERT(o1.isReg()); + NASSERT(o2.isReg()); - Value *opVal1 = R_READ(block, o1.getReg()); - Value *opVal2 = M_READ(ip, block, addr); + llvm::Value *opVal1 = R_READ(block, o1.getReg()); + llvm::Value *notVal1 = BinaryOperator::CreateNot(opVal1, "", block); + llvm::Value *opVal2 = R_READ(block, o2.getReg()); - return do_SSE_COMPARE(o1, block, opVal1, opVal2); + return do_SSE_INT_VV(o1.getReg(), block, notVal1, + opVal2); } -template -static InstTransResult do_SSE_COMPARE_RR(InstPtr ip, BasicBlock *& block, - const MCOperand &o1, - const MCOperand &o2) -{ - NASSERT(o1.isReg()); - NASSERT(o2.isReg()); +template +static InstTransResult do_PANDNrm(NativeInstPtr ip, llvm::BasicBlock *& block, + const llvm::MCOperand &o1, + llvm::Value *addr) { + NASSERT(o1.isReg()); - Value *opVal1 = R_READ(block, o1.getReg()); - Value *opVal2 = R_READ(block, o2.getReg()); + llvm::Value *opVal1 = R_READ(block, o1.getReg()); + llvm::Value *notVal1 = BinaryOperator::CreateNot(opVal1, "", block); + llvm::Value *opVal2 = M_READ(ip, block, addr); - return do_SSE_COMPARE(o1, block, opVal1, opVal2); -} - -template -static InstTransResult do_SSE_VECTOR_OP(const MCOperand &dst, BasicBlock *&b, Value *v1, Value *v2) -{ - NASSERT(width % elemwidth == 0); - Value *vecInput1 = INT_AS_VECTOR(b, v1); - Value *vecInput2 = INT_AS_VECTOR(b, v2); - - Value *op_out = BinaryOperator::Create( - bin_op, - vecInput1, - vecInput2, - "", - b); - - // convert the output back to an integer - Value *intOutput = CastInst::Create( - Instruction::BitCast, - op_out, - Type::getIntNTy(b->getContext(), width), - "", - b); - - R_WRITE(b, dst.getReg(), intOutput); - return ContinueBlock; -} - - -template -static InstTransResult do_SSE_FP_VECTOR_OP(const MCOperand &dst, BasicBlock *&b, Value *v1, Value *v2) -{ - NASSERT(width % elemwidth == 0); - Value *vecInput1 = INT_AS_FPVECTOR(b, v1); - Value *vecInput2 = INT_AS_FPVECTOR(b, v2); - - Value *op_out = BinaryOperator::Create( - bin_op, - vecInput1, - vecInput2, - "", - b); - - // convert the output back to an integer - Value *intOutput = CastInst::Create( - Instruction::BitCast, - op_out, - Type::getIntNTy(b->getContext(), width), - "", - b); - - R_WRITE(b, dst.getReg(), intOutput); - return ContinueBlock; -} - -template -static InstTransResult do_SSE_VECTOR_RM(InstPtr ip, BasicBlock *& block, - const MCOperand &o1, - Value *addr) -{ - NASSERT(o1.isReg()); - - Value *opVal1 = R_READ(block, o1.getReg()); - Value *opVal2 = M_READ(ip, block, addr); - - return do_SSE_VECTOR_OP(o1, block, opVal1, opVal2); -} - -template -static InstTransResult do_SSE_VECTOR_RR(InstPtr ip, BasicBlock *& block, - const MCOperand &o1, - const MCOperand &o2) -{ - NASSERT(o1.isReg()); - NASSERT(o2.isReg()); - - Value *opVal1 = R_READ(block, o1.getReg()); - Value *opVal2 = R_READ(block, o2.getReg()); - - return do_SSE_VECTOR_OP(o1, block, opVal1, opVal2); -} - -template -static InstTransResult do_SSE_FP_VECTOR_RM(InstPtr ip, BasicBlock *& block, - const MCOperand &o1, - Value *addr) -{ - NASSERT(o1.isReg()); - - Value *opVal1 = R_READ(block, o1.getReg()); - Value *opVal2 = M_READ(ip, block, addr); - - return do_SSE_FP_VECTOR_OP(o1, block, opVal1, opVal2); -} - -template -static InstTransResult do_SSE_FP_VECTOR_RR(InstPtr ip, BasicBlock *& block, - const MCOperand &o1, - const MCOperand &o2) -{ - NASSERT(o1.isReg()); - NASSERT(o2.isReg()); - - Value *opVal1 = R_READ(block, o1.getReg()); - Value *opVal2 = R_READ(block, o2.getReg()); - - return do_SSE_FP_VECTOR_OP(o1, block, opVal1, opVal2); -} - -template -static Value* doMAXMINvv(BasicBlock *&block, Value *op1, Value *op2) -{ - - // TODO: handle the zero case - Value *is_gt = new FCmpInst(*block, binop, op1, op2); - - // if op1 > op2, use op1, else op2 - Value *which_op = SelectInst::Create(is_gt, op1, op2, "", block); - - return which_op; -} - -template -static InstTransResult doMAXMIN_FP_VECTOR_rr(BasicBlock *&b, const MCOperand &op1, const MCOperand &op2) -{ - NASSERT(op1.isReg()); - NASSERT(op2.isReg()); - - Value *op1_val = R_READ(b, op1.getReg()); - Value *op2_val = R_READ(b, op2.getReg()); - - NASSERT(width % elemwidth == 0); - Value *vecInput1 = INT_AS_FPVECTOR(b, op1_val); - Value *vecInput2 = INT_AS_FPVECTOR(b, op2_val); - - Value *max = doMAXMINvv(b, vecInput1, vecInput2); - - // convert the output back to an integer - Value *intOutput = CastInst::Create( - Instruction::BitCast, - max, - Type::getIntNTy(b->getContext(), width), - "", - b); - - R_WRITE(b, op1.getReg(), intOutput); - return ContinueBlock; -} - -template -static InstTransResult doMAXMIN_FP_VECTOR_rm(InstPtr ip, BasicBlock *&b, const MCOperand &op1, Value *memAddr) -{ - NASSERT(op1.isReg()); - - Value *op1_val = R_READ(b, op1.getReg()); - Value *op2_val = M_READ(ip, b, memAddr); - - NASSERT(width % elemwidth == 0); - Value *vecInput1 = INT_AS_FPVECTOR(b, op1_val); - Value *vecInput2 = INT_AS_FPVECTOR(b, op2_val); - - Value *max = doMAXMINvv(b, vecInput1, vecInput2); - - // convert the output back to an integer - Value *intOutput = CastInst::Create( - Instruction::BitCast, - max, - Type::getIntNTy(b->getContext(), width), - "", - b); - - R_WRITE(b, op1.getReg(), intOutput); - return ContinueBlock; -} - -template -static InstTransResult doMAXMINrr(BasicBlock *&b, const MCOperand &op1, const MCOperand &op2) -{ - NASSERT(op1.isReg()); - NASSERT(op2.isReg()); - - Value *op1_val = R_READ(b, op1.getReg()); - Value *op2_val = R_READ(b, op2.getReg()); - - Value *fp1_val = INT_AS_FP(b, op1_val); - Value *fp2_val = INT_AS_FP(b, op2_val); - - Value *max = doMAXMINvv(b, fp1_val, fp2_val); - R_WRITE(b, op1.getReg(), FP_AS_INT(b, max)); - return ContinueBlock; -} - -template -static InstTransResult doMAXMINrm(InstPtr ip, BasicBlock *&b, const MCOperand &op1, Value *memAddr) -{ - NASSERT(op1.isReg()); - - Value *op1_val = R_READ(b, op1.getReg()); - Value *op2_val = M_READ(ip, b, memAddr); - - Value *fp1_val = INT_AS_FP(b, op1_val); - Value *fp2_val = INT_AS_FP(b, op2_val); - - Value *max = doMAXMINvv(b, fp1_val, fp2_val); - R_WRITE(b, op1.getReg(), FP_AS_INT(b, max)); - return ContinueBlock; -} - -template -static InstTransResult do_PANDNrr(InstPtr ip, BasicBlock *& block, - const MCOperand &o1, - const MCOperand &o2) -{ - NASSERT(o1.isReg()); - NASSERT(o2.isReg()); - - Value *opVal1 = R_READ(block, o1.getReg()); - Value *notVal1 = BinaryOperator::CreateNot(opVal1, "", block); - Value *opVal2 = R_READ(block, o2.getReg()); - - return do_SSE_INT_VV(o1.getReg(), block, notVal1, opVal2); -} - -template -static InstTransResult do_PANDNrm(InstPtr ip, BasicBlock *& block, - const MCOperand &o1, - Value *addr) -{ - NASSERT(o1.isReg()); - - Value *opVal1 = R_READ(block, o1.getReg()); - Value *notVal1 = BinaryOperator::CreateNot(opVal1, "", block); - Value *opVal2 = M_READ(ip, block, addr); - - return do_SSE_INT_VV(o1.getReg(), block, notVal1, opVal2); + return do_SSE_INT_VV(o1.getReg(), block, notVal1, + opVal2); } enum ExtendOp { - SEXT, - ZEXT + SEXT, + ZEXT }; -template -static InstTransResult do_SSE_EXTEND_OP(const MCOperand &dst, BasicBlock *&b, Value *v1) -{ - NASSERT(width % srcelem == 0); - NASSERT(width % dstelem == 0); - TASSERT(dstelem > srcelem, "Must use SSE extend to a bigger element size"); +template +static InstTransResult do_SSE_EXTEND_OP(const llvm::MCOperand &dst, + llvm::BasicBlock *&b, llvm::Value *v1) { + NASSERT(width % srcelem == 0); + NASSERT(width % dstelem == 0); + TASSERT(dstelem > srcelem, "Must use SSE extend to a bigger element size"); - int src_elem_count = width/srcelem; - int dst_elem_count = width/dstelem; + int src_elem_count = width / srcelem; + int dst_elem_count = width / dstelem; - Type *src_elem_ty; - Type *dst_elem_ty; - VectorType *src_vt; - VectorType *dst_vt; + Type *src_elem_ty; + Type *dst_elem_ty; + VectorType *src_vt; + VectorType *dst_vt; - std::tie(src_vt, src_elem_ty) = getIntVectorTypes(b, srcelem, src_elem_count); - std::tie(dst_vt, dst_elem_ty) = getIntVectorTypes(b, dstelem, dst_elem_count); + std::tie(src_vt, src_elem_ty) = getIntVectorTypes(b, srcelem, src_elem_count); + std::tie(dst_vt, dst_elem_ty) = getIntVectorTypes(b, dstelem, dst_elem_count); - // read input vector - Value *vecInput1 = INT_AS_VECTOR(b, v1); + // read input vector + llvm::Value *vecInput1 = INT_AS_VECTOR(b, v1); - Value *resultAlloc = new AllocaInst(dst_vt, nullptr, "", b); - Value *vecResult = noAliasMCSemaScope(new LoadInst(resultAlloc, "", b)); + llvm::Value *resultAlloc = new AllocaInst(dst_vt, nullptr, "", b); + llvm::Value *vecResult = noAliasMCSemaScope(new LoadInst(resultAlloc, "", b)); - - // we take lower dst_elem_count values - for(int i = 0; i < dst_elem_count; i++) - { - // read source element - Value *item = ExtractElementInst::Create(vecInput1, CONST_V<32>(b, i), "", b); - Value *newitem = nullptr; - // op it to dst element type - switch(op) { - case SEXT: - newitem = new SExtInst(item, dst_elem_ty, "", b); - break; - case ZEXT: - newitem = new ZExtInst(item, dst_elem_ty, "", b); - break; - default: - TASSERT(false, "Invalid operation for do_SSE_EXTEND_OP"); - } - - // store dst element - vecResult = InsertElementInst::Create( - vecResult, - newitem, - CONST_V<32>(b, i), - "", - b ); - + // we take lower dst_elem_count values + for (int i = 0; i < dst_elem_count; i++) { + // read source element + llvm::Value *item = ExtractElementInst::Create(vecInput1, CONST_V<32>(b, i), + "", b); + llvm::Value *newitem = nullptr; + // op it to dst element type + switch (op) { + case SEXT: + newitem = new SExtInst(item, dst_elem_ty, "", b); + break; + case ZEXT: + newitem = new ZExtInst(item, dst_elem_ty, "", b); + break; + default: + TASSERT(false, "Invalid operation for do_SSE_EXTEND_OP") + ; } - // convert the output back to an integer - Value *intOutput = CastInst::Create( - Instruction::BitCast, - vecResult, - Type::getIntNTy(b->getContext(), width), - "", - b); + // store dst element + vecResult = InsertElementInst::Create(vecResult, newitem, CONST_V<32>(b, i), + "", b); - R_WRITE(b, dst.getReg(), intOutput); - return ContinueBlock; + } + + // convert the output back to an integer + llvm::Value *intOutput = CastInst::Create( + Instruction::BitCast, vecResult, Type::getIntNTy(b->getContext(), width), + "", b); + + R_WRITE(b, dst.getReg(), intOutput); + return ContinueBlock; } -template -static InstTransResult do_SSE_EXTEND_RM(InstPtr ip, BasicBlock *& block, - const MCOperand &o1, - Value *addr) -{ - NASSERT(o1.isReg()); +template +static InstTransResult do_SSE_EXTEND_RM(NativeInstPtr ip, + llvm::BasicBlock *& block, + const llvm::MCOperand &o1, + llvm::Value *addr) { + NASSERT(o1.isReg()); - // memory operands are weird -- its the minimum - // bytes needed to unpack to width / dstelem - const int count = width / dstelem * srcelem; - TASSERT(count < width, "Must SSE extend to greater size"); - llvm::dbgs() << "Reading: " << count << " bytes\n"; - Value *opVal1 = M_READ(ip, block, addr); - - Value *zext = new ZExtInst( - opVal1, - Type::getIntNTy(block->getContext(), width), - "", block); + // memory operands are weird -- its the minimum + // bytes needed to unpack to width / dstelem + const int count = width / dstelem * srcelem; + TASSERT(count < width, "Must SSE extend to greater size"); + llvm::dbgs() << "Reading: " << count << " bytes\n"; + llvm::Value *opVal1 = M_READ(ip, block, addr); - return do_SSE_EXTEND_OP(o1, block, zext); + llvm::Value *zext = new ZExtInst(opVal1, + Type::getIntNTy(block->getContext(), width), + "", block); + + return do_SSE_EXTEND_OP(o1, block, zext); } -template -static InstTransResult do_SSE_EXTEND_RR(InstPtr ip, BasicBlock *& block, - const MCOperand &o1, - const MCOperand &o2) -{ - NASSERT(o1.isReg()); - NASSERT(o2.isReg()); +template +static InstTransResult do_SSE_EXTEND_RR(NativeInstPtr ip, + llvm::BasicBlock *& block, + const llvm::MCOperand &o1, + const llvm::MCOperand &o2) { + NASSERT(o1.isReg()); + NASSERT(o2.isReg()); - Value *opVal2 = R_READ(block, o2.getReg()); + llvm::Value *opVal2 = R_READ(block, o2.getReg()); - return do_SSE_EXTEND_OP(o1, block, opVal2); + return do_SSE_EXTEND_OP(o1, block, opVal2); } -template -static InstTransResult doMOVHLPSrr(InstPtr ip, BasicBlock *b, const MCOperand &dest, const MCOperand &src) -{ - NASSERT(dest.isReg()); - NASSERT(src.isReg()); +template +static InstTransResult doMOVHLPSrr(NativeInstPtr ip, llvm::BasicBlock *b, + const llvm::MCOperand &dest, + const llvm::MCOperand &src) { + NASSERT(dest.isReg()); + NASSERT(src.isReg()); - Value *r_dest = R_READ(b, dest.getReg()); - Value *r_src = R_READ(b, src.getReg()); + llvm::Value *r_dest = R_READ(b, dest.getReg()); + llvm::Value *r_src = R_READ(b, src.getReg()); - // capture top half of src - Value *dest_keep = BinaryOperator::Create( - Instruction::LShr, - r_dest, - CONST_V(b, width/2), - "", b); - // put it back in top part - dest_keep = BinaryOperator::Create( - Instruction::Shl, - dest_keep, - CONST_V(b, width/2), - "", b); + // capture top half of src + llvm::Value *dest_keep = BinaryOperator::Create(Instruction::LShr, r_dest, + CONST_V(b, width / 2), + "", b); + // put it back in top part + dest_keep = BinaryOperator::Create(Instruction::Shl, dest_keep, + CONST_V(b, width / 2), "", b); - // get top of src - Value *src_keep = BinaryOperator::Create( - Instruction::LShr, - r_src, - CONST_V(b, width/2), - "", b); + // get top of src + llvm::Value *src_keep = BinaryOperator::Create(Instruction::LShr, r_src, + CONST_V(b, width / 2), + "", b); - // or top half of src with the old - // top half of dst, which is now the bottom - Value *res = BinaryOperator::Create( - Instruction::Or, - src_keep, - dest_keep, - "", b); + // or top half of src with the old + // top half of dst, which is now the bottom + llvm::Value *res = BinaryOperator::Create(Instruction::Or, src_keep, + dest_keep, "", b); - R_WRITE(b, dest.getReg(), res); + R_WRITE(b, dest.getReg(), res); } -template -static InstTransResult doMOVLHPSrr(InstPtr ip, BasicBlock *b, const MCOperand &dest, const MCOperand &src) -{ - NASSERT(dest.isReg()); - NASSERT(src.isReg()); +template +static InstTransResult doMOVLHPSrr(NativeInstPtr ip, llvm::BasicBlock *b, + const llvm::MCOperand &dest, + const llvm::MCOperand &src) { + NASSERT(dest.isReg()); + NASSERT(src.isReg()); - Value *r_dest = R_READ(b, dest.getReg()); - Value *r_src = R_READ(b, src.getReg()); + llvm::Value *r_dest = R_READ(b, dest.getReg()); + llvm::Value *r_src = R_READ(b, src.getReg()); - // put low into high - Value* dest_keep = BinaryOperator::Create( - Instruction::Shl, - r_src, - CONST_V(b, width/2), - "", b); + // put low into high + llvm::Value* dest_keep = BinaryOperator::Create(Instruction::Shl, r_src, + CONST_V(b, width / 2), + "", b); - TASSERT( width >= 64 , "Can't truncate from smaller width"); + TASSERT(width >= 64, "Can't truncate from smaller width"); - Value* bottom_part = new TruncInst( - r_dest, - Type::getIntNTy(b->getContext(), 64), - "", - b); - Value *zext = new llvm::ZExtInst(bottom_part, - llvm::Type::getIntNTy(b->getContext(), 128), - "", - b); + llvm::Value* bottom_part = new TruncInst(r_dest, + Type::getIntNTy(b->getContext(), 64), + "", b); + llvm::Value *zext = new llvm::ZExtInst( + bottom_part, llvm::Type::getIntNTy(b->getContext(), 128), "", b); - // or top half of src with the old - // top half of dst, which is now the bottom - Value *res = BinaryOperator::Create( - Instruction::Or, - zext, - dest_keep, - "", b); + // or top half of src with the old + // top half of dst, which is now the bottom + llvm::Value *res = BinaryOperator::Create(Instruction::Or, zext, dest_keep, + "", b); - R_WRITE(b, dest.getReg(), res); + R_WRITE(b, dest.getReg(), res); } -static Value *doPMULUDQVV(BasicBlock *b, Value *dest, Value *src) -{ +static llvm::Value *doPMULUDQVV(llvm::BasicBlock *b, llvm::Value *dest, + llvm::Value *src) { - // get top of src - Value *vecSrc = INT_AS_VECTOR<128,32>(b, src); - Value *vecDst = INT_AS_VECTOR<128,32>(b, dest); + // get top of src + llvm::Value *vecSrc = INT_AS_VECTOR<128, 32>(b, src); + llvm::Value *vecDst = INT_AS_VECTOR<128, 32>(b, dest); - Value *src1 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 0), "", b); - Value *src2 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 2), "", b); + llvm::Value *src1 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 0), "", + b); + llvm::Value *src2 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 2), "", + b); - Value *src1_e = new llvm::ZExtInst(src1, - llvm::Type::getIntNTy(b->getContext(), 128), - "", - b); - Value *src2_e = new llvm::ZExtInst(src2, - llvm::Type::getIntNTy(b->getContext(), 128), - "", - b); + llvm::Value *src1_e = new llvm::ZExtInst( + src1, llvm::Type::getIntNTy(b->getContext(), 128), "", b); + llvm::Value *src2_e = new llvm::ZExtInst( + src2, llvm::Type::getIntNTy(b->getContext(), 128), "", b); - Value *dst1 = ExtractElementInst::Create(vecDst, CONST_V<32>(b, 0), "", b); - Value *dst2 = ExtractElementInst::Create(vecDst, CONST_V<32>(b, 2), "", b); + llvm::Value *dst1 = ExtractElementInst::Create(vecDst, CONST_V<32>(b, 0), "", + b); + llvm::Value *dst2 = ExtractElementInst::Create(vecDst, CONST_V<32>(b, 2), "", + b); - Value *dst1_e = new llvm::ZExtInst(dst1, - llvm::Type::getIntNTy(b->getContext(), 128), - "", - b); - Value *dst2_e = new llvm::ZExtInst(dst2, - llvm::Type::getIntNTy(b->getContext(), 128), - "", - b); + llvm::Value *dst1_e = new llvm::ZExtInst( + dst1, llvm::Type::getIntNTy(b->getContext(), 128), "", b); + llvm::Value *dst2_e = new llvm::ZExtInst( + dst2, llvm::Type::getIntNTy(b->getContext(), 128), "", b); - Value *res1 = BinaryOperator::Create( - Instruction::Mul, - src1_e, - dst1_e, - "", b); + llvm::Value *res1 = BinaryOperator::Create(Instruction::Mul, src1_e, dst1_e, + "", b); - Value *res2 = BinaryOperator::Create( - Instruction::Mul, - src2_e, - dst2_e, - "", b); + llvm::Value *res2 = BinaryOperator::Create(Instruction::Mul, src2_e, dst2_e, + "", b); - Value *res_shift = BinaryOperator::Create( - Instruction::Shl, - res2, - CONST_V<128>(b, 64), - "", b); + llvm::Value *res_shift = BinaryOperator::Create(Instruction::Shl, res2, + CONST_V<128>(b, 64), "", b); - Value *res_or = BinaryOperator::Create( - Instruction::Or, - res_shift, - res1, - "", b); + llvm::Value *res_or = BinaryOperator::Create(Instruction::Or, res_shift, res1, + "", b); - - return res_or; + return res_or; } -static InstTransResult doPMULUDQrr( - BasicBlock *&b, - const MCOperand &dst, - const MCOperand &src) -{ - NASSERT(dst.isReg()); - NASSERT(src.isReg()); +static InstTransResult doPMULUDQrr(llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + const llvm::MCOperand &src) { + NASSERT(dst.isReg()); + NASSERT(src.isReg()); - Value *srcVal = R_READ<128>(b, src.getReg()); - Value *dstVal = R_READ<128>(b, dst.getReg()); + llvm::Value *srcVal = R_READ<128>(b, src.getReg()); + llvm::Value *dstVal = R_READ<128>(b, dst.getReg()); - Value *res = doPMULUDQVV(b, dstVal, srcVal); - R_WRITE<128>(b, dst.getReg(), res); - return ContinueBlock; + llvm::Value *res = doPMULUDQVV(b, dstVal, srcVal); + R_WRITE<128>(b, dst.getReg(), res); + return ContinueBlock; } -static InstTransResult doPMULUDQrm(InstPtr ip, BasicBlock *&b, const MCOperand &dst, Value *memAddr) -{ - NASSERT(dst.isReg()); +static InstTransResult doPMULUDQrm(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + llvm::Value *memAddr) { + NASSERT(dst.isReg()); - Value *dstVal = R_READ<128>(b, dst.getReg()); - Value *srcVal = M_READ<128>(ip, b, memAddr); - Value *res = doPMULUDQVV(b, dstVal, srcVal); - R_WRITE<128>(b, dst.getReg(), res); - return ContinueBlock; + llvm::Value *dstVal = R_READ<128>(b, dst.getReg()); + llvm::Value *srcVal = M_READ<128>(ip, b, memAddr); + llvm::Value *res = doPMULUDQVV(b, dstVal, srcVal); + R_WRITE<128>(b, dst.getReg(), res); + return ContinueBlock; } -static InstTransResult doMOVHPDmr(InstPtr ip, BasicBlock *&b, Value *memAddr, const MCOperand &src) -{ - NASSERT(src.isReg()); +static InstTransResult doMOVHPDmr(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *memAddr, + const llvm::MCOperand &src) { + NASSERT(src.isReg()); - Value *dstVal = R_READ<128>(b, src.getReg()); + llvm::Value *dstVal = R_READ<128>(b, src.getReg()); - Value *sright = BinaryOperator::Create( - Instruction::LShr, - dstVal, - CONST_V<128>(b, 64), - "", b); + llvm::Value *sright = BinaryOperator::Create(Instruction::LShr, dstVal, + CONST_V<128>(b, 64), "", b); - Value *trunc_upper_64 = new TruncInst( - sright, - Type::getIntNTy(b->getContext(), 64), - "", - b); + llvm::Value *trunc_upper_64 = new TruncInst( + sright, Type::getIntNTy(b->getContext(), 64), "", b); - M_WRITE<64>(ip, b, memAddr, trunc_upper_64); - return ContinueBlock; + M_WRITE<64>(ip, b, memAddr, trunc_upper_64); + return ContinueBlock; } -static InstTransResult doMOVHPDrm(InstPtr ip, BasicBlock *&b, const MCOperand &dst, Value *memAddr) -{ - NASSERT(dst.isReg()); +static InstTransResult doMOVHPDrm(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + llvm::Value *memAddr) { + NASSERT(dst.isReg()); - Value *dstVal = R_READ<128>(b, dst.getReg()); - Value *srcVal = M_READ<64>(ip, b, memAddr); + llvm::Value *dstVal = R_READ<128>(b, dst.getReg()); + llvm::Value *srcVal = M_READ<64>(ip, b, memAddr); - // Extend the type of src to 128 bits - Value *srcExt = new ZExtInst(srcVal, - llvm::Type::getIntNTy(b->getContext(), 128), - "", - b); + // Extend the type of src to 128 bits + llvm::Value *srcExt = new ZExtInst( + srcVal, llvm::Type::getIntNTy(b->getContext(), 128), "", b); - //Left sheft 64 LSB to hihger quadword - Value *srcLShift = BinaryOperator::Create( - Instruction::Shl, - srcExt, - CONST_V<128>(b, 64), - "", b); + //Left sheft 64 LSB to hihger quadword + llvm::Value *srcLShift = BinaryOperator::Create(Instruction::Shl, srcExt, + CONST_V<128>(b, 64), "", b); - //Clean up the upper 64 bits of dest reg - Value *sleft = BinaryOperator::Create( - Instruction::Shl, - dstVal, - CONST_V<128>(b, 64), - "", b); - Value *sright = BinaryOperator::Create( - Instruction::LShr, - sleft, - CONST_V<128>(b, 64), - "", b); + //Clean up the upper 64 bits of dest reg + llvm::Value *sleft = BinaryOperator::Create(Instruction::Shl, dstVal, + CONST_V<128>(b, 64), "", b); + llvm::Value *sright = BinaryOperator::Create(Instruction::LShr, sleft, + CONST_V<128>(b, 64), "", b); - Value *ored = BinaryOperator::Create( - Instruction::Or, - sright, - srcLShift, - "", b); - - R_WRITE<128>(b, dst.getReg(), ored); - return ContinueBlock; + llvm::Value *ored = BinaryOperator::Create(Instruction::Or, sright, srcLShift, + "", b); + + R_WRITE<128>(b, dst.getReg(), ored); + return ContinueBlock; } -static InstTransResult doMOVLPDrm(InstPtr ip, BasicBlock *&b, const MCOperand &dst, Value *memAddr) -{ - NASSERT(dst.isReg()); +static InstTransResult doMOVLPDrm(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + llvm::Value *memAddr) { + NASSERT(dst.isReg()); - Value *dstVal = R_READ<128>(b, dst.getReg()); - Value *srcVal = M_READ<64>(ip, b, memAddr); + llvm::Value *dstVal = R_READ<128>(b, dst.getReg()); + llvm::Value *srcVal = M_READ<64>(ip, b, memAddr); - Value *srcExt = new ZExtInst(srcVal, - llvm::Type::getIntNTy(b->getContext(), 128), - "", - b); - - Value *sright = BinaryOperator::Create( - Instruction::LShr, - dstVal, - CONST_V<128>(b, 64), - "", b); - Value *sleft = BinaryOperator::Create( - Instruction::Shl, - sright, - CONST_V<128>(b, 64), - "", b); + llvm::Value *srcExt = new ZExtInst( + srcVal, llvm::Type::getIntNTy(b->getContext(), 128), "", b); - Value *ored = BinaryOperator::Create( - Instruction::Or, - sleft, - srcExt, - "", b); - - R_WRITE<128>(b, dst.getReg(), ored); - return ContinueBlock; + llvm::Value *sright = BinaryOperator::Create(Instruction::LShr, dstVal, + CONST_V<128>(b, 64), "", b); + llvm::Value *sleft = BinaryOperator::Create(Instruction::Shl, sright, + CONST_V<128>(b, 64), "", b); + + llvm::Value *ored = BinaryOperator::Create(Instruction::Or, sleft, srcExt, "", + b); + + R_WRITE<128>(b, dst.getReg(), ored); + return ContinueBlock; } +Value *doCVTTPS2DQvv(llvm::BasicBlock *&b, llvm::Value *in) { + // read in as FP vector + // + llvm::Value *fpv = INT_AS_FPVECTOR<128, 32>(b, in); + // + // truncate + // + // -Value *doCVTTPS2DQvv(BasicBlock *&b, Value *in) { - // read in as FP vector - // - Value *fpv = INT_AS_FPVECTOR<128, 32>(b, in); - // - // truncate - // - // + Type *elem_ty; + VectorType *vt; + std::tie(vt, elem_ty) = getIntVectorTypes(b, 32, 4); - Type *elem_ty; - VectorType *vt; - std::tie(vt, elem_ty) = getIntVectorTypes(b, 32, 4); + llvm::Value *as_ints = CastInst::Create(Instruction::FPToSI, fpv, vt, "", b); - Value *as_ints = CastInst::Create( - Instruction::FPToSI, - fpv, - vt, - "", - b); - - // cast as int - Value *intOutput = CastInst::Create( - Instruction::BitCast, - as_ints, - Type::getIntNTy(b->getContext(), 128), - "", - b); - // return - return intOutput; + // cast as int + llvm::Value *intOutput = CastInst::Create( + Instruction::BitCast, as_ints, Type::getIntNTy(b->getContext(), 128), "", + b); + // return + return intOutput; } -static InstTransResult doCVTTPS2DQrm( - InstPtr ip, - BasicBlock *&b, - const MCOperand &dst, - Value *memAddr) -{ - NASSERT(dst.isReg()); - NASSERT(memAddr != nullptr); +static InstTransResult doCVTTPS2DQrm(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + llvm::Value *memAddr) { + NASSERT(dst.isReg()); + NASSERT(memAddr != nullptr); - Value *memval = M_READ<128>(ip, b, memAddr); - Value *out = doCVTTPS2DQvv(b, memval); - R_WRITE<128>(b, dst.getReg(), out); + llvm::Value *memval = M_READ<128>(ip, b, memAddr); + llvm::Value *out = doCVTTPS2DQvv(b, memval); + R_WRITE<128>(b, dst.getReg(), out); - return ContinueBlock; + return ContinueBlock; } -static InstTransResult doCVTTPS2DQrr( - BasicBlock *&b, - const MCOperand &dst, - const MCOperand &src) - -{ - NASSERT(dst.isReg()); +static InstTransResult doCVTTPS2DQrr(llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + const llvm::MCOperand &src) - Value *inval = R_READ<128>(b, src.getReg()); - Value *out = doCVTTPS2DQvv(b, inval); - R_WRITE<128>(b, dst.getReg(), out); + { + NASSERT(dst.isReg()); - return ContinueBlock; + llvm::Value *inval = R_READ<128>(b, src.getReg()); + llvm::Value *out = doCVTTPS2DQvv(b, inval); + R_WRITE<128>(b, dst.getReg(), out); + + return ContinueBlock; } -static InstTransResult doSHUFPDrri(BasicBlock *&b, const MCOperand &dst, const MCOperand &src, const MCOperand &order) -{ - NASSERT(dst.isReg()); - NASSERT(src.isReg()); - NASSERT(order.isImm()); +static InstTransResult doSHUFPDrri(llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + const llvm::MCOperand &src, + const llvm::MCOperand &order) { + NASSERT(dst.isReg()); + NASSERT(src.isReg()); + NASSERT(order.isImm()); - Value *input1 = R_READ<128>(b, src.getReg()); - Value *input2 = R_READ<128>(b, dst.getReg()); - - Value *shuffled = doDoubleShuffle<128,64>(b, input2, input1, order.getImm()); + llvm::Value *input1 = R_READ<128>(b, src.getReg()); + llvm::Value *input2 = R_READ<128>(b, dst.getReg()); - R_WRITE<128>(b, dst.getReg(), shuffled); - return ContinueBlock; + llvm::Value *shuffled = doDoubleShuffle<128, 64>(b, input2, input1, + order.getImm()); + + R_WRITE<128>(b, dst.getReg(), shuffled); + return ContinueBlock; } -static InstTransResult doSHUFPDrmi(InstPtr ip, BasicBlock *&b, const MCOperand &dst, Value *mem_addr, const MCOperand &order) -{ - NASSERT(dst.isReg()); - NASSERT(order.isImm()); - NASSERT(mem_addr != NULL); +static InstTransResult doSHUFPDrmi(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + llvm::Value *mem_addr, + const llvm::MCOperand &order) { + NASSERT(dst.isReg()); + NASSERT(order.isImm()); + NASSERT(mem_addr != NULL); - Value *input1 = M_READ<128>(ip, b, mem_addr); - Value *input2 = R_READ<128>(b, dst.getReg()); - - Value *shuffled = doDoubleShuffle<128,64>(b, input2, input1, order.getImm()); + llvm::Value *input1 = M_READ<128>(ip, b, mem_addr); + llvm::Value *input2 = R_READ<128>(b, dst.getReg()); - R_WRITE<128>(b, dst.getReg(), shuffled); - return ContinueBlock; + llvm::Value *shuffled = doDoubleShuffle<128, 64>(b, input2, input1, + order.getImm()); + + R_WRITE<128>(b, dst.getReg(), shuffled); + return ContinueBlock; } -static InstTransResult doSHUFPSrri(BasicBlock *&b, const MCOperand &dst, const MCOperand &src, const MCOperand &order) -{ - NASSERT(dst.isReg()); - NASSERT(src.isReg()); - NASSERT(order.isImm()); +static InstTransResult doSHUFPSrri(llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + const llvm::MCOperand &src, + const llvm::MCOperand &order) { + NASSERT(dst.isReg()); + NASSERT(src.isReg()); + NASSERT(order.isImm()); - Value *input1 = R_READ<128>(b, src.getReg()); - Value *input2 = R_READ<128>(b, dst.getReg()); - - Value *shuffled = doDoubleShuffle<128,32>(b, input2, input1, order.getImm()); + llvm::Value *input1 = R_READ<128>(b, src.getReg()); + llvm::Value *input2 = R_READ<128>(b, dst.getReg()); - R_WRITE<128>(b, dst.getReg(), shuffled); - return ContinueBlock; + llvm::Value *shuffled = doDoubleShuffle<128, 32>(b, input2, input1, + order.getImm()); + + R_WRITE<128>(b, dst.getReg(), shuffled); + return ContinueBlock; } -static InstTransResult doSHUFPSrmi(InstPtr ip, BasicBlock *&b, const MCOperand &dst, Value *mem_addr, const MCOperand &order) -{ - NASSERT(dst.isReg()); - NASSERT(order.isImm()); - NASSERT(mem_addr != NULL); +static InstTransResult doSHUFPSrmi(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + llvm::Value *mem_addr, + const llvm::MCOperand &order) { + NASSERT(dst.isReg()); + NASSERT(order.isImm()); + NASSERT(mem_addr != NULL); - Value *input1 = M_READ<128>(ip, b, mem_addr); - Value *input2 = R_READ<128>(b, dst.getReg()); - - Value *shuffled = doDoubleShuffle<128,32>(b, input2, input1, order.getImm()); + llvm::Value *input1 = M_READ<128>(ip, b, mem_addr); + llvm::Value *input2 = R_READ<128>(b, dst.getReg()); - R_WRITE<128>(b, dst.getReg(), shuffled); - return ContinueBlock; + llvm::Value *shuffled = doDoubleShuffle<128, 32>(b, input2, input1, + order.getImm()); + + R_WRITE<128>(b, dst.getReg(), shuffled); + return ContinueBlock; } -static Value* doPSHUFHWvv(BasicBlock *&b, Value *in, Value *dstVal, const MCOperand &order) -{ - Value *shuffled = doShuffle<64,16>(b, in, order.getImm()); +static llvm::Value* doPSHUFHWvv(llvm::BasicBlock *&b, llvm::Value *in, + llvm::Value *dstVal, + const llvm::MCOperand &order) { + llvm::Value *shuffled = doShuffle<64, 16>(b, in, order.getImm()); - Value *shufExt = new ZExtInst(shuffled, - llvm::Type::getIntNTy(b->getContext(), 128), - "", - b); + llvm::Value *shufExt = new ZExtInst( + shuffled, llvm::Type::getIntNTy(b->getContext(), 128), "", b); - Value *shufAdjusted = BinaryOperator::Create( - Instruction::Shl, - shufExt, - CONST_V<128>(b, 64), - "", b); + llvm::Value *shufAdjusted = BinaryOperator::Create(Instruction::Shl, shufExt, + CONST_V<128>(b, 64), "", + b); - // Clear the bits [127:64] of dstVal - Value *sleft = BinaryOperator::Create( - Instruction::Shl, - dstVal, - CONST_V<128>(b, 64), - "", b); - Value *sright = BinaryOperator::Create( - Instruction::LShr, - sleft, - CONST_V<128>(b, 64), - "", b); + // Clear the bits [127:64] of dstVal + llvm::Value *sleft = BinaryOperator::Create(Instruction::Shl, dstVal, + CONST_V<128>(b, 64), "", b); + llvm::Value *sright = BinaryOperator::Create(Instruction::LShr, sleft, + CONST_V<128>(b, 64), "", b); - - Value *ored = BinaryOperator::Create( - Instruction::Or, - sright, - shufAdjusted, - "", b); + llvm::Value *ored = BinaryOperator::Create(Instruction::Or, sright, + shufAdjusted, "", b); - return ored; + return ored; } +static InstTransResult doPSHUFHWri(llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + const llvm::MCOperand &src, + const llvm::MCOperand &order) { + NASSERT(dst.isReg()); + NASSERT(src.isReg()); + NASSERT(order.isImm()); -static InstTransResult doPSHUFHWri(BasicBlock *&b, const MCOperand &dst, const MCOperand &src, const MCOperand &order) -{ - NASSERT(dst.isReg()); - NASSERT(src.isReg()); - NASSERT(order.isImm()); + llvm::Value *input1 = R_READ<128>(b, src.getReg()); - Value *input1 = R_READ<128>(b, src.getReg()); + llvm::Value *rightShiftedHigher = BinaryOperator::Create(Instruction::LShr, + input1, + CONST_V<128>(b, 64), + "", b); - Value *rightShiftedHigher = BinaryOperator::Create( - Instruction::LShr, - input1, - CONST_V<128>(b, 64), - "", b); + llvm::Value *i1_lower = new TruncInst(rightShiftedHigher, + Type::getIntNTy(b->getContext(), 64), + "", b); - Value *i1_lower = new TruncInst( - rightShiftedHigher, - Type::getIntNTy(b->getContext(), 64), - "", - b); + llvm::Value *res = doPSHUFHWvv(b, i1_lower, input1, order); - - Value *res = doPSHUFHWvv(b, i1_lower, input1, order); - - R_WRITE<128>(b, dst.getReg(), res); - return ContinueBlock; + R_WRITE<128>(b, dst.getReg(), res); + return ContinueBlock; } -static InstTransResult doPSHUFHWmi(InstPtr ip, BasicBlock *&b, const MCOperand &dst, Value *mem_addr, const MCOperand &order) -{ - NASSERT(dst.isReg()); - NASSERT(order.isImm()); - NASSERT(mem_addr != NULL); +static InstTransResult doPSHUFHWmi(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + llvm::Value *mem_addr, + const llvm::MCOperand &order) { + NASSERT(dst.isReg()); + NASSERT(order.isImm()); + NASSERT(mem_addr != NULL); - Value *input1 = M_READ<128>(ip, b, mem_addr); + llvm::Value *input1 = M_READ<128>(ip, b, mem_addr); - Value *rightShiftedHigher = BinaryOperator::Create( - Instruction::LShr, - input1, - CONST_V<128>(b, 64), - "", b); + llvm::Value *rightShiftedHigher = BinaryOperator::Create(Instruction::LShr, + input1, + CONST_V<128>(b, 64), + "", b); - Value *i1_lower = new TruncInst( - rightShiftedHigher, - Type::getIntNTy(b->getContext(), 64), - "", - b); + llvm::Value *i1_lower = new TruncInst(rightShiftedHigher, + Type::getIntNTy(b->getContext(), 64), + "", b); + llvm::Value *res = doPSHUFHWvv(b, i1_lower, input1, order); - Value *res = doPSHUFHWvv(b, i1_lower, input1, order); - - R_WRITE<128>(b, dst.getReg(), res); - return ContinueBlock; + R_WRITE<128>(b, dst.getReg(), res); + return ContinueBlock; } -static Value* doPSHUFLWvv(BasicBlock *&b, Value *in, Value *dstVal, const MCOperand &order) -{ - Value *shuffled = doShuffle<64,16>(b, in, order.getImm()); +static llvm::Value* doPSHUFLWvv(llvm::BasicBlock *&b, llvm::Value *in, + llvm::Value *dstVal, + const llvm::MCOperand &order) { + llvm::Value *shuffled = doShuffle<64, 16>(b, in, order.getImm()); - Value *sright = BinaryOperator::Create( - Instruction::LShr, - dstVal, - CONST_V<128>(b, 64), - "", b); - Value *sleft = BinaryOperator::Create( - Instruction::Shl, - sright, - CONST_V<128>(b, 64), - "", b); + llvm::Value *sright = BinaryOperator::Create(Instruction::LShr, dstVal, + CONST_V<128>(b, 64), "", b); + llvm::Value *sleft = BinaryOperator::Create(Instruction::Shl, sright, + CONST_V<128>(b, 64), "", b); - Value *shufExt = new ZExtInst(shuffled, - llvm::Type::getIntNTy(b->getContext(), 128), - "", - b); - Value *ored = BinaryOperator::Create( - Instruction::Or, - sleft, - shufExt, - "", b); + llvm::Value *shufExt = new ZExtInst( + shuffled, llvm::Type::getIntNTy(b->getContext(), 128), "", b); + llvm::Value *ored = BinaryOperator::Create(Instruction::Or, sleft, shufExt, + "", b); - return ored; + return ored; } -static InstTransResult doPSHUFLWri(BasicBlock *&b, const MCOperand &dst, const MCOperand &src, const MCOperand &order) -{ - NASSERT(dst.isReg()); - NASSERT(src.isReg()); - NASSERT(order.isImm()); +static InstTransResult doPSHUFLWri(llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + const llvm::MCOperand &src, + const llvm::MCOperand &order) { + NASSERT(dst.isReg()); + NASSERT(src.isReg()); + NASSERT(order.isImm()); - Value *input1 = R_READ<128>(b, src.getReg()); - Value *i1_lower = new TruncInst( - input1, - Type::getIntNTy(b->getContext(), 64), - "", - b); + llvm::Value *input1 = R_READ<128>(b, src.getReg()); + llvm::Value *i1_lower = new TruncInst(input1, + Type::getIntNTy(b->getContext(), 64), + "", b); - Value *res = doPSHUFLWvv(b, i1_lower, input1, order); - - - R_WRITE<128>(b, dst.getReg(), res); - return ContinueBlock; + llvm::Value *res = doPSHUFLWvv(b, i1_lower, input1, order); + + R_WRITE<128>(b, dst.getReg(), res); + return ContinueBlock; } -static InstTransResult doPSHUFLWmi(InstPtr ip, BasicBlock *&b, const MCOperand &dst, Value *mem_addr, const MCOperand &order) -{ - NASSERT(dst.isReg()); - NASSERT(order.isImm()); - NASSERT(mem_addr != NULL); +static InstTransResult doPSHUFLWmi(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + llvm::Value *mem_addr, + const llvm::MCOperand &order) { + NASSERT(dst.isReg()); + NASSERT(order.isImm()); + NASSERT(mem_addr != NULL); - Value *input1 = M_READ<128>(ip, b, mem_addr); + llvm::Value *input1 = M_READ<128>(ip, b, mem_addr); - Value *i1_lower = new TruncInst( - input1, - Type::getIntNTy(b->getContext(), 64), - "", - b); + llvm::Value *i1_lower = new TruncInst(input1, + Type::getIntNTy(b->getContext(), 64), + "", b); - Value *res = doPSHUFLWvv(b, i1_lower, input1, order); - - - R_WRITE<128>(b, dst.getReg(), res); - return ContinueBlock; + llvm::Value *res = doPSHUFLWvv(b, i1_lower, input1, order); + + R_WRITE<128>(b, dst.getReg(), res); + return ContinueBlock; } -static Value *doUNPCKLPSvv(BasicBlock *b, Value *dest, Value *src) -{ - Value *vecSrc = INT_AS_VECTOR<128,32>(b, src); - Value *vecDst = INT_AS_VECTOR<128,32>(b, dest); +static llvm::Value *doUNPCKLPSvv(llvm::BasicBlock *b, llvm::Value *dest, + llvm::Value *src) { + llvm::Value *vecSrc = INT_AS_VECTOR<128, 32>(b, src); + llvm::Value *vecDst = INT_AS_VECTOR<128, 32>(b, dest); - Value *src1 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 0), "", b); - Value *src2 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 1), "", b); + llvm::Value *src1 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 0), "", + b); + llvm::Value *src2 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 1), "", + b); - Value *dst1 = ExtractElementInst::Create(vecDst, CONST_V<32>(b, 0), "", b); - Value *dst2 = ExtractElementInst::Create(vecDst, CONST_V<32>(b, 1), "", b); + llvm::Value *dst1 = ExtractElementInst::Create(vecDst, CONST_V<32>(b, 0), "", + b); + llvm::Value *dst2 = ExtractElementInst::Create(vecDst, CONST_V<32>(b, 1), "", + b); - Value *res1 = InsertElementInst::Create(vecDst, dst1, CONST_V<32>(b, 0), "", b); - Value *res2 = InsertElementInst::Create(res1, src1, CONST_V<32>(b, 1), "", b); - Value *res3 = InsertElementInst::Create(res2, dst2, CONST_V<32>(b, 2), "", b); - Value *res4 = InsertElementInst::Create(res3, src2, CONST_V<32>(b, 3), "", b); + llvm::Value *res1 = InsertElementInst::Create(vecDst, dst1, CONST_V<32>(b, 0), + "", b); + llvm::Value *res2 = InsertElementInst::Create(res1, src1, CONST_V<32>(b, 1), + "", b); + llvm::Value *res3 = InsertElementInst::Create(res2, dst2, CONST_V<32>(b, 2), + "", b); + llvm::Value *res4 = InsertElementInst::Create(res3, src2, CONST_V<32>(b, 3), + "", b); - // convert the output back to an integer - return VECTOR_AS_INT<128>(b, res4); + // convert the output back to an integer + return VECTOR_AS_INT<128>(b, res4); } -static Value *doUNPCKLPDvv(BasicBlock *b, Value *dest, Value *src) -{ - Value *vecSrc = INT_AS_VECTOR<128,64>(b, src); - Value *vecDst = INT_AS_VECTOR<128,64>(b, dest); +static llvm::Value *doUNPCKLPDvv(llvm::BasicBlock *b, llvm::Value *dest, + llvm::Value *src) { + llvm::Value *vecSrc = INT_AS_VECTOR<128, 64>(b, src); + llvm::Value *vecDst = INT_AS_VECTOR<128, 64>(b, dest); - Value *src1 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 0), "", b); - Value *dst1 = ExtractElementInst::Create(vecDst, CONST_V<32>(b, 0), "", b); + llvm::Value *src1 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 0), "", + b); + llvm::Value *dst1 = ExtractElementInst::Create(vecDst, CONST_V<32>(b, 0), "", + b); - Value *res1 = InsertElementInst::Create(vecDst, dst1, CONST_V<32>(b, 0), "", b); - Value *res2 = InsertElementInst::Create(res1, src1, CONST_V<32>(b, 1), "", b); - - // convert the output back to an integer - return VECTOR_AS_INT<128>(b, res2); -} - -static InstTransResult doUNPCKLPSrr(BasicBlock *b, const MCOperand &dest, const MCOperand &src) -{ - R_WRITE<128>(b, dest.getReg(), - doUNPCKLPSvv(b, R_READ<128>(b, dest.getReg()), - R_READ<128>(b, src.getReg()))); - return ContinueBlock; -} - -static InstTransResult doUNPCKLPSrm(InstPtr ip, BasicBlock *b, const MCOperand &dest, Value *src) -{ - R_WRITE<128>(b, dest.getReg(), - doUNPCKLPSvv(b, R_READ<128>(b, dest.getReg()), - M_READ<128>(ip, b, src))); - return ContinueBlock; -} - -static InstTransResult doUNPCKLPDrr(BasicBlock *b, const MCOperand &dest, const MCOperand &src) -{ - R_WRITE<128>(b, dest.getReg(), - doUNPCKLPDvv(b, R_READ<128>(b, dest.getReg()), - R_READ<128>(b, src.getReg()))); - return ContinueBlock; -} - -static InstTransResult doUNPCKLPDrm(InstPtr ip, BasicBlock *b, const MCOperand &dest, Value *src) -{ - R_WRITE<128>(b, dest.getReg(), - doUNPCKLPDvv(b, R_READ<128>(b, dest.getReg()), - M_READ<128>(ip, b, src))); - return ContinueBlock; -} - -static Value *doUNPCKHPDvv(BasicBlock *b, Value *dest, Value *src) -{ - Value *vecSrc = INT_AS_VECTOR<128,64>(b, src); - Value *vecDst = INT_AS_VECTOR<128,64>(b, dest); - - Value *src1 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 1), "", b); - Value *dst1 = ExtractElementInst::Create(vecDst, CONST_V<32>(b, 1), "", b); - - Value *res1 = InsertElementInst::Create(vecDst, dst1, CONST_V<32>(b, 0), "", b); - Value *res2 = InsertElementInst::Create(res1, src1, CONST_V<32>(b, 1), "", b); - - // convert the output back to an integer - return VECTOR_AS_INT<128>(b, res2); -} - -static InstTransResult doUNPCKHPDrr(BasicBlock *b, const MCOperand &dest, const MCOperand &src) -{ - R_WRITE<128>(b, dest.getReg(), - doUNPCKHPDvv(b, R_READ<128>(b, dest.getReg()), - R_READ<128>(b, src.getReg()))); - return ContinueBlock; -} - -Value *doCVTPS2PDvv(BasicBlock *&b, Value *dest, Value *src) { - Type *DoubleTy = Type::getDoubleTy(b->getContext()); - - Value *vecSrc = INT_AS_FPVECTOR<128,32>(b, src); - Value *vecDst = INT_AS_FPVECTOR<128,64>(b, dest); - - Value *src1 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 0), "", b); - Value *src2 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 1), "", b); - - Value *src1_ext = CastInst::Create(Instruction::FPExt, src1, DoubleTy, "", b); - Value *src2_ext = CastInst::Create(Instruction::FPExt, src2, DoubleTy, "", b); - - Value *res1 = InsertElementInst::Create(vecDst, src1_ext, CONST_V<32>(b, 0), "", b); - Value *res2 = InsertElementInst::Create(res1, src2_ext, CONST_V<32>(b, 1), "", b); + llvm::Value *res1 = InsertElementInst::Create(vecDst, dst1, CONST_V<32>(b, 0), + "", b); + llvm::Value *res2 = InsertElementInst::Create(res1, src1, CONST_V<32>(b, 1), + "", b); // convert the output back to an integer return VECTOR_AS_INT<128>(b, res2); } -Value *doCVTPD2PSvv(BasicBlock *&b, Value *dest, Value *src) { +static InstTransResult doUNPCKLPSrr(llvm::BasicBlock *b, + const llvm::MCOperand &dest, + const llvm::MCOperand &src) { + R_WRITE<128>( + b, + dest.getReg(), + doUNPCKLPSvv(b, R_READ<128>(b, dest.getReg()), + R_READ<128>(b, src.getReg()))); + return ContinueBlock; +} + +static InstTransResult doUNPCKLPSrm(NativeInstPtr ip, llvm::BasicBlock *b, + const llvm::MCOperand &dest, + llvm::Value *src) { + R_WRITE<128>( + b, dest.getReg(), + doUNPCKLPSvv(b, R_READ<128>(b, dest.getReg()), M_READ<128>(ip, b, src))); + return ContinueBlock; +} + +static InstTransResult doUNPCKLPDrr(llvm::BasicBlock *b, + const llvm::MCOperand &dest, + const llvm::MCOperand &src) { + R_WRITE<128>( + b, + dest.getReg(), + doUNPCKLPDvv(b, R_READ<128>(b, dest.getReg()), + R_READ<128>(b, src.getReg()))); + return ContinueBlock; +} + +static InstTransResult doUNPCKLPDrm(NativeInstPtr ip, llvm::BasicBlock *b, + const llvm::MCOperand &dest, + llvm::Value *src) { + R_WRITE<128>( + b, dest.getReg(), + doUNPCKLPDvv(b, R_READ<128>(b, dest.getReg()), M_READ<128>(ip, b, src))); + return ContinueBlock; +} + +static llvm::Value *doUNPCKHPDvv(llvm::BasicBlock *b, llvm::Value *dest, + llvm::Value *src) { + llvm::Value *vecSrc = INT_AS_VECTOR<128, 64>(b, src); + llvm::Value *vecDst = INT_AS_VECTOR<128, 64>(b, dest); + + llvm::Value *src1 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 1), "", + b); + llvm::Value *dst1 = ExtractElementInst::Create(vecDst, CONST_V<32>(b, 1), "", + b); + + llvm::Value *res1 = InsertElementInst::Create(vecDst, dst1, CONST_V<32>(b, 0), + "", b); + llvm::Value *res2 = InsertElementInst::Create(res1, src1, CONST_V<32>(b, 1), + "", b); + + // convert the output back to an integer + return VECTOR_AS_INT<128>(b, res2); +} + +static InstTransResult doUNPCKHPDrr(llvm::BasicBlock *b, + const llvm::MCOperand &dest, + const llvm::MCOperand &src) { + R_WRITE<128>( + b, + dest.getReg(), + doUNPCKHPDvv(b, R_READ<128>(b, dest.getReg()), + R_READ<128>(b, src.getReg()))); + return ContinueBlock; +} + +Value *doCVTPS2PDvv(llvm::BasicBlock *&b, llvm::Value *dest, llvm::Value *src) { + Type *DoubleTy = Type::getDoubleTy(b->getContext()); + + llvm::Value *vecSrc = INT_AS_FPVECTOR<128, 32>(b, src); + llvm::Value *vecDst = INT_AS_FPVECTOR<128, 64>(b, dest); + + llvm::Value *src1 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 0), "", + b); + llvm::Value *src2 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 1), "", + b); + + llvm::Value *src1_ext = CastInst::Create(Instruction::FPExt, src1, DoubleTy, + "", b); + llvm::Value *src2_ext = CastInst::Create(Instruction::FPExt, src2, DoubleTy, + "", b); + + llvm::Value *res1 = InsertElementInst::Create(vecDst, src1_ext, + CONST_V<32>(b, 0), "", b); + llvm::Value *res2 = InsertElementInst::Create(res1, src2_ext, + CONST_V<32>(b, 1), "", b); + + // convert the output back to an integer + return VECTOR_AS_INT<128>(b, res2); +} + +Value *doCVTPD2PSvv(llvm::BasicBlock *&b, llvm::Value *dest, llvm::Value *src) { Type *FloatTy = Type::getFloatTy(b->getContext()); - Value *vecSrc = INT_AS_FPVECTOR<128,64>(b, src); - Value *vecDst = INT_AS_FPVECTOR<128,32>(b, dest); + llvm::Value *vecSrc = INT_AS_FPVECTOR<128, 64>(b, src); + llvm::Value *vecDst = INT_AS_FPVECTOR<128, 32>(b, dest); - Value *src1 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 0), "", b); - Value *src2 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 1), "", b); + llvm::Value *src1 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 0), "", + b); + llvm::Value *src2 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 1), "", + b); - Value *src1_trunc = new FPTruncInst(src1, FloatTy, "", b); - Value *src2_trunc = new FPTruncInst(src2, FloatTy, "", b); + llvm::Value *src1_trunc = new FPTruncInst(src1, FloatTy, "", b); + llvm::Value *src2_trunc = new FPTruncInst(src2, FloatTy, "", b); - Value *zero = CONST_V<32>(b, 0); - - Value *zero_as_fp = CastInst::Create(Instruction::BitCast, zero, FloatTy, "", b); + llvm::Value *zero = CONST_V<32>(b, 0); - Value *res1 = InsertElementInst::Create(vecDst, src1_trunc, CONST_V<32>(b, 0), "", b); - Value *res2 = InsertElementInst::Create(res1, src2_trunc, CONST_V<32>(b, 1), "", b); - Value *res3 = InsertElementInst::Create(res2, zero_as_fp, CONST_V<32>(b, 2), "", b); - Value *res4 = InsertElementInst::Create(res3, zero_as_fp, CONST_V<32>(b, 3), "", b); + llvm::Value *zero_as_fp = CastInst::Create(Instruction::BitCast, zero, + FloatTy, "", b); + + llvm::Value *res1 = InsertElementInst::Create(vecDst, src1_trunc, + CONST_V<32>(b, 0), "", b); + llvm::Value *res2 = InsertElementInst::Create(res1, src2_trunc, + CONST_V<32>(b, 1), "", b); + llvm::Value *res3 = InsertElementInst::Create(res2, zero_as_fp, + CONST_V<32>(b, 2), "", b); + llvm::Value *res4 = InsertElementInst::Create(res3, zero_as_fp, + CONST_V<32>(b, 3), "", b); // convert the output back to an integer return VECTOR_AS_INT<128>(b, res4); } - -static InstTransResult doCVTPS2PDrr(BasicBlock *b, const MCOperand &dest, const MCOperand &src) -{ - R_WRITE<128>(b, dest.getReg(), - doCVTPS2PDvv(b, R_READ<128>(b, dest.getReg()), - R_READ<128>(b, src.getReg()))); - return ContinueBlock; +static InstTransResult doCVTPS2PDrr(llvm::BasicBlock *b, + const llvm::MCOperand &dest, + const llvm::MCOperand &src) { + R_WRITE<128>( + b, + dest.getReg(), + doCVTPS2PDvv(b, R_READ<128>(b, dest.getReg()), + R_READ<128>(b, src.getReg()))); + return ContinueBlock; } -Value *doCVTDQ2PSvv(BasicBlock *&b, Value *dest, Value *src) { +Value *doCVTDQ2PSvv(llvm::BasicBlock *&b, llvm::Value *dest, llvm::Value *src) { Type *FloatTy = Type::getFloatTy(b->getContext()); - Value *vecSrc = INT_AS_VECTOR<128,32>(b, src); - Value *vecDst = INT_AS_FPVECTOR<128,32>(b, dest); + llvm::Value *vecSrc = INT_AS_VECTOR<128, 32>(b, src); + llvm::Value *vecDst = INT_AS_FPVECTOR<128, 32>(b, dest); - Value *src1 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 0), "", b); - Value *src2 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 1), "", b); - Value *src3 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 2), "", b); - Value *src4 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 3), "", b); + llvm::Value *src1 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 0), "", + b); + llvm::Value *src2 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 1), "", + b); + llvm::Value *src3 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 2), "", + b); + llvm::Value *src4 = ExtractElementInst::Create(vecSrc, CONST_V<32>(b, 3), "", + b); Type *fpType = getFpTypeForWidth(b, 32); - //TODO: Check rounding modes! - Value *fp_value1 = CastInst::Create( Instruction::SIToFP, src1, fpType, "", b); - Value *fp_value2 = CastInst::Create( Instruction::SIToFP, src2, fpType, "", b); - Value *fp_value3 = CastInst::Create( Instruction::SIToFP, src3, fpType, "", b); - Value *fp_value4 = CastInst::Create( Instruction::SIToFP, src4, fpType, "", b); + //TODO: Check rounding modes! + llvm::Value *fp_value1 = CastInst::Create(Instruction::SIToFP, src1, fpType, + "", b); + llvm::Value *fp_value2 = CastInst::Create(Instruction::SIToFP, src2, fpType, + "", b); + llvm::Value *fp_value3 = CastInst::Create(Instruction::SIToFP, src3, fpType, + "", b); + llvm::Value *fp_value4 = CastInst::Create(Instruction::SIToFP, src4, fpType, + "", b); - Value *res1 = InsertElementInst::Create(vecDst, fp_value1, CONST_V<32>(b, 0), "", b); - Value *res2 = InsertElementInst::Create(res1, fp_value2, CONST_V<32>(b, 1), "", b); - Value *res3 = InsertElementInst::Create(res2, fp_value3, CONST_V<32>(b, 2), "", b); - Value *res4 = InsertElementInst::Create(res3, fp_value4, CONST_V<32>(b, 3), "", b); + llvm::Value *res1 = InsertElementInst::Create(vecDst, fp_value1, + CONST_V<32>(b, 0), "", b); + llvm::Value *res2 = InsertElementInst::Create(res1, fp_value2, + CONST_V<32>(b, 1), "", b); + llvm::Value *res3 = InsertElementInst::Create(res2, fp_value3, + CONST_V<32>(b, 2), "", b); + llvm::Value *res4 = InsertElementInst::Create(res3, fp_value4, + CONST_V<32>(b, 3), "", b); // convert the output back to an integer return VECTOR_AS_INT<128>(b, res4); } - -static InstTransResult doCVTDQ2PSrr(BasicBlock *b, const MCOperand &dest, const MCOperand &src) -{ - R_WRITE<128>(b, dest.getReg(), - doCVTDQ2PSvv(b, R_READ<128>(b, dest.getReg()), - R_READ<128>(b, src.getReg()))); - return ContinueBlock; +static InstTransResult doCVTDQ2PSrr(llvm::BasicBlock *b, + const llvm::MCOperand &dest, + const llvm::MCOperand &src) { + R_WRITE<128>( + b, + dest.getReg(), + doCVTDQ2PSvv(b, R_READ<128>(b, dest.getReg()), + R_READ<128>(b, src.getReg()))); + return ContinueBlock; } - -static InstTransResult doCVTPS2PDrm(InstPtr ip, BasicBlock *b, const MCOperand &dest, Value *src) -{ - R_WRITE<128>(b, dest.getReg(), - doCVTPS2PDvv(b, R_READ<128>(b, dest.getReg()), - M_READ<128>(ip, b, src))); - return ContinueBlock; +static InstTransResult doCVTPS2PDrm(NativeInstPtr ip, llvm::BasicBlock *b, + const llvm::MCOperand &dest, + llvm::Value *src) { + R_WRITE<128>( + b, dest.getReg(), + doCVTPS2PDvv(b, R_READ<128>(b, dest.getReg()), M_READ<128>(ip, b, src))); + return ContinueBlock; } -static InstTransResult doCVTPD2PSrr(BasicBlock *b, const MCOperand &dest, const MCOperand &src) -{ - R_WRITE<128>(b, dest.getReg(), - doCVTPD2PSvv(b, R_READ<128>(b, dest.getReg()), - R_READ<128>(b, src.getReg()))); - return ContinueBlock; +static InstTransResult doCVTPD2PSrr(llvm::BasicBlock *b, + const llvm::MCOperand &dest, + const llvm::MCOperand &src) { + R_WRITE<128>( + b, + dest.getReg(), + doCVTPD2PSvv(b, R_READ<128>(b, dest.getReg()), + R_READ<128>(b, src.getReg()))); + return ContinueBlock; } -static InstTransResult doCVTPD2PSrm(InstPtr ip, BasicBlock *b, const MCOperand &dest, Value *src) -{ - R_WRITE<128>(b, dest.getReg(), - doCVTPD2PSvv(b, R_READ<128>(b, dest.getReg()), - M_READ<128>(ip, b, src))); - return ContinueBlock; +static InstTransResult doCVTPD2PSrm(NativeInstPtr ip, llvm::BasicBlock *b, + const llvm::MCOperand &dest, + llvm::Value *src) { + R_WRITE<128>( + b, dest.getReg(), + doCVTPD2PSvv(b, R_READ<128>(b, dest.getReg()), M_READ<128>(ip, b, src))); + return ContinueBlock; } -static InstTransResult doMOVDDUPrr(BasicBlock *b, const MCOperand &dest, const MCOperand &src) -{ - Value *s = R_READ<128>(b, src.getReg()); +static InstTransResult doMOVDDUPrr(llvm::BasicBlock *b, + const llvm::MCOperand &dest, + const llvm::MCOperand &src) { + llvm::Value *s = R_READ<128>(b, src.getReg()); - Value* lower = new TruncInst( - s, - Type::getIntNTy(b->getContext(), 64), - "", b); - Value *lower_ext = new llvm::ZExtInst(lower, - llvm::Type::getIntNTy(b->getContext(), 128), - "", b); + llvm::Value* lower = new TruncInst(s, Type::getIntNTy(b->getContext(), 64), + "", b); + llvm::Value *lower_ext = new llvm::ZExtInst( + lower, llvm::Type::getIntNTy(b->getContext(), 128), "", b); - // duplicate it in upper half - Value *top_half = BinaryOperator::Create( - Instruction::Shl, - lower_ext, - CONST_V<128>(b, 64), - "", b); + // duplicate it in upper half + llvm::Value *top_half = BinaryOperator::Create(Instruction::Shl, lower_ext, + CONST_V<128>(b, 64), "", b); - // combine the halves - Value *combined = BinaryOperator::CreateAnd(lower_ext, top_half, "", b); + // combine the halves + llvm::Value *combined = BinaryOperator::CreateAnd(lower_ext, top_half, "", b); - R_WRITE<128>(b, dest.getReg(), combined); + R_WRITE<128>(b, dest.getReg(), combined); - return ContinueBlock; + return ContinueBlock; } -GENERIC_TRANSLATION(MOVHLPSrr, - (doMOVHLPSrr<128>(ip, block, OP(1), OP(2))) ) +GENERIC_TRANSLATION(MOVHLPSrr, (doMOVHLPSrr<128>(ip, block, OP(1), OP(2)))) -GENERIC_TRANSLATION(MOVLHPSrr, - (doMOVLHPSrr<128>(ip, block, OP(1), OP(2))) ) +GENERIC_TRANSLATION(MOVLHPSrr, (doMOVLHPSrr<128>(ip, block, OP(1), OP(2)))) GENERIC_TRANSLATION(PMOVSXBWrr, - (do_SSE_EXTEND_RR<128,8,16,SEXT>(ip, block, OP(0), OP(1))) ) -GENERIC_TRANSLATION_REF(PMOVSXBWrm, - (do_SSE_EXTEND_RM<128,8,16,SEXT>(ip, block, OP(0), ADDR_NOREF(1))), - (do_SSE_EXTEND_RM<128,8,16,SEXT>(ip, block, OP(0), MEM_REFERENCE(1))) ) + (do_SSE_EXTEND_RR<128,8,16,SEXT>(ip, block, OP(0), OP(1)))) +GENERIC_TRANSLATION_REF( + PMOVSXBWrm, + (do_SSE_EXTEND_RM<128,8,16,SEXT>(ip, block, OP(0), ADDR_NOREF(1))), + (do_SSE_EXTEND_RM<128,8,16,SEXT>(ip, block, OP(0), MEM_REFERENCE(1)))) GENERIC_TRANSLATION(PMOVSXBDrr, - (do_SSE_EXTEND_RR<128,8,32,SEXT>(ip, block, OP(0), OP(1))) ) -GENERIC_TRANSLATION_REF(PMOVSXBDrm, - (do_SSE_EXTEND_RM<128,8,32,SEXT>(ip, block, OP(0), ADDR_NOREF(1))), - (do_SSE_EXTEND_RM<128,8,32,SEXT>(ip, block, OP(0), MEM_REFERENCE(1))) ) + (do_SSE_EXTEND_RR<128,8,32,SEXT>(ip, block, OP(0), OP(1)))) +GENERIC_TRANSLATION_REF( + PMOVSXBDrm, + (do_SSE_EXTEND_RM<128,8,32,SEXT>(ip, block, OP(0), ADDR_NOREF(1))), + (do_SSE_EXTEND_RM<128,8,32,SEXT>(ip, block, OP(0), MEM_REFERENCE(1)))) GENERIC_TRANSLATION(PMOVSXBQrr, - (do_SSE_EXTEND_RR<128,8,64,SEXT>(ip, block, OP(0), OP(1))) ) -GENERIC_TRANSLATION_REF(PMOVSXBQrm, - (do_SSE_EXTEND_RM<128,8,64,SEXT>(ip, block, OP(0), ADDR_NOREF(1))), - (do_SSE_EXTEND_RM<128,8,64,SEXT>(ip, block, OP(0), MEM_REFERENCE(1))) ) + (do_SSE_EXTEND_RR<128,8,64,SEXT>(ip, block, OP(0), OP(1)))) +GENERIC_TRANSLATION_REF( + PMOVSXBQrm, + (do_SSE_EXTEND_RM<128,8,64,SEXT>(ip, block, OP(0), ADDR_NOREF(1))), + (do_SSE_EXTEND_RM<128,8,64,SEXT>(ip, block, OP(0), MEM_REFERENCE(1)))) GENERIC_TRANSLATION(PMOVSXWDrr, - (do_SSE_EXTEND_RR<128,16,32,SEXT>(ip, block, OP(0), OP(1))) ) -GENERIC_TRANSLATION_REF(PMOVSXWDrm, - (do_SSE_EXTEND_RM<128,16,32,SEXT>(ip, block, OP(0), ADDR_NOREF(1))), - (do_SSE_EXTEND_RM<128,16,32,SEXT>(ip, block, OP(0), MEM_REFERENCE(1))) ) + (do_SSE_EXTEND_RR<128,16,32,SEXT>(ip, block, OP(0), OP(1)))) +GENERIC_TRANSLATION_REF( + PMOVSXWDrm, + (do_SSE_EXTEND_RM<128,16,32,SEXT>(ip, block, OP(0), ADDR_NOREF(1))), + (do_SSE_EXTEND_RM<128,16,32,SEXT>(ip, block, OP(0), MEM_REFERENCE(1)))) GENERIC_TRANSLATION(PMOVSXWQrr, - (do_SSE_EXTEND_RR<128,16,64,SEXT>(ip, block, OP(0), OP(1))) ) -GENERIC_TRANSLATION_REF(PMOVSXWQrm, - (do_SSE_EXTEND_RM<128,16,64,SEXT>(ip, block, OP(0), ADDR_NOREF(1))), - (do_SSE_EXTEND_RM<128,16,64,SEXT>(ip, block, OP(0), MEM_REFERENCE(1))) ) + (do_SSE_EXTEND_RR<128,16,64,SEXT>(ip, block, OP(0), OP(1)))) +GENERIC_TRANSLATION_REF( + PMOVSXWQrm, + (do_SSE_EXTEND_RM<128,16,64,SEXT>(ip, block, OP(0), ADDR_NOREF(1))), + (do_SSE_EXTEND_RM<128,16,64,SEXT>(ip, block, OP(0), MEM_REFERENCE(1)))) GENERIC_TRANSLATION(PMOVSXDQrr, - (do_SSE_EXTEND_RR<128,32,64,SEXT>(ip, block, OP(0), OP(1))) ) -GENERIC_TRANSLATION_REF(PMOVSXDQrm, - (do_SSE_EXTEND_RM<128,32,64,SEXT>(ip, block, OP(0), ADDR_NOREF(1))), - (do_SSE_EXTEND_RM<128,32,64,SEXT>(ip, block, OP(0), MEM_REFERENCE(1))) ) + (do_SSE_EXTEND_RR<128,32,64,SEXT>(ip, block, OP(0), OP(1)))) +GENERIC_TRANSLATION_REF( + PMOVSXDQrm, + (do_SSE_EXTEND_RM<128,32,64,SEXT>(ip, block, OP(0), ADDR_NOREF(1))), + (do_SSE_EXTEND_RM<128,32,64,SEXT>(ip, block, OP(0), MEM_REFERENCE(1)))) GENERIC_TRANSLATION(PMOVZXBWrr, - (do_SSE_EXTEND_RR<128,8,16,ZEXT>(ip, block, OP(0), OP(1))) ) -GENERIC_TRANSLATION_REF(PMOVZXBWrm, - (do_SSE_EXTEND_RM<128,8,16,ZEXT>(ip, block, OP(0), ADDR_NOREF(1))), - (do_SSE_EXTEND_RM<128,8,16,ZEXT>(ip, block, OP(0), MEM_REFERENCE(1))) ) + (do_SSE_EXTEND_RR<128,8,16,ZEXT>(ip, block, OP(0), OP(1)))) +GENERIC_TRANSLATION_REF( + PMOVZXBWrm, + (do_SSE_EXTEND_RM<128,8,16,ZEXT>(ip, block, OP(0), ADDR_NOREF(1))), + (do_SSE_EXTEND_RM<128,8,16,ZEXT>(ip, block, OP(0), MEM_REFERENCE(1)))) GENERIC_TRANSLATION(PMOVZXBDrr, - (do_SSE_EXTEND_RR<128,8,32,ZEXT>(ip, block, OP(0), OP(1))) ) -GENERIC_TRANSLATION_REF(PMOVZXBDrm, - (do_SSE_EXTEND_RM<128,8,32,ZEXT>(ip, block, OP(0), ADDR_NOREF(1))), - (do_SSE_EXTEND_RM<128,8,32,ZEXT>(ip, block, OP(0), MEM_REFERENCE(1))) ) + (do_SSE_EXTEND_RR<128,8,32,ZEXT>(ip, block, OP(0), OP(1)))) +GENERIC_TRANSLATION_REF( + PMOVZXBDrm, + (do_SSE_EXTEND_RM<128,8,32,ZEXT>(ip, block, OP(0), ADDR_NOREF(1))), + (do_SSE_EXTEND_RM<128,8,32,ZEXT>(ip, block, OP(0), MEM_REFERENCE(1)))) GENERIC_TRANSLATION(PMOVZXBQrr, - (do_SSE_EXTEND_RR<128,8,64,ZEXT>(ip, block, OP(0), OP(1))) ) -GENERIC_TRANSLATION_REF(PMOVZXBQrm, - (do_SSE_EXTEND_RM<128,8,64,ZEXT>(ip, block, OP(0), ADDR_NOREF(1))), - (do_SSE_EXTEND_RM<128,8,64,ZEXT>(ip, block, OP(0), MEM_REFERENCE(1))) ) + (do_SSE_EXTEND_RR<128,8,64,ZEXT>(ip, block, OP(0), OP(1)))) +GENERIC_TRANSLATION_REF( + PMOVZXBQrm, + (do_SSE_EXTEND_RM<128,8,64,ZEXT>(ip, block, OP(0), ADDR_NOREF(1))), + (do_SSE_EXTEND_RM<128,8,64,ZEXT>(ip, block, OP(0), MEM_REFERENCE(1)))) GENERIC_TRANSLATION(PMOVZXWDrr, - (do_SSE_EXTEND_RR<128,16,32,ZEXT>(ip, block, OP(0), OP(1))) ) -GENERIC_TRANSLATION_REF(PMOVZXWDrm, - (do_SSE_EXTEND_RM<128,16,32,ZEXT>(ip, block, OP(0), ADDR_NOREF(1))), - (do_SSE_EXTEND_RM<128,16,32,ZEXT>(ip, block, OP(0), MEM_REFERENCE(1))) ) + (do_SSE_EXTEND_RR<128,16,32,ZEXT>(ip, block, OP(0), OP(1)))) +GENERIC_TRANSLATION_REF( + PMOVZXWDrm, + (do_SSE_EXTEND_RM<128,16,32,ZEXT>(ip, block, OP(0), ADDR_NOREF(1))), + (do_SSE_EXTEND_RM<128,16,32,ZEXT>(ip, block, OP(0), MEM_REFERENCE(1)))) GENERIC_TRANSLATION(PMOVZXWQrr, - (do_SSE_EXTEND_RR<128,16,64,ZEXT>(ip, block, OP(0), OP(1))) ) -GENERIC_TRANSLATION_REF(PMOVZXWQrm, - (do_SSE_EXTEND_RM<128,16,64,ZEXT>(ip, block, OP(0), ADDR_NOREF(1))), - (do_SSE_EXTEND_RM<128,16,64,ZEXT>(ip, block, OP(0), MEM_REFERENCE(1))) ) + (do_SSE_EXTEND_RR<128,16,64,ZEXT>(ip, block, OP(0), OP(1)))) +GENERIC_TRANSLATION_REF( + PMOVZXWQrm, + (do_SSE_EXTEND_RM<128,16,64,ZEXT>(ip, block, OP(0), ADDR_NOREF(1))), + (do_SSE_EXTEND_RM<128,16,64,ZEXT>(ip, block, OP(0), MEM_REFERENCE(1)))) GENERIC_TRANSLATION(PMOVZXDQrr, - (do_SSE_EXTEND_RR<128,32,64,ZEXT>(ip, block, OP(0), OP(1))) ) -GENERIC_TRANSLATION_REF(PMOVZXDQrm, - (do_SSE_EXTEND_RM<128,32,64,ZEXT>(ip, block, OP(0), ADDR_NOREF(1))), - (do_SSE_EXTEND_RM<128,32,64,ZEXT>(ip, block, OP(0), MEM_REFERENCE(1))) ) + (do_SSE_EXTEND_RR<128,32,64,ZEXT>(ip, block, OP(0), OP(1)))) +GENERIC_TRANSLATION_REF( + PMOVZXDQrm, + (do_SSE_EXTEND_RM<128,32,64,ZEXT>(ip, block, OP(0), ADDR_NOREF(1))), + (do_SSE_EXTEND_RM<128,32,64,ZEXT>(ip, block, OP(0), MEM_REFERENCE(1)))) +GENERIC_TRANSLATION(PANDNrr, (do_PANDNrr<128>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF(PANDNrm, + (do_PANDNrm<128>(ip, block, OP(1), ADDR_NOREF(2))), + (do_PANDNrm<128>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PANDNrr, - (do_PANDNrr<128>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PANDNrm, - (do_PANDNrm<128>(ip, block, OP(1), ADDR_NOREF(2))), - (do_PANDNrm<128>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION( + PANDrr, (do_SSE_INT_RR<128,Instruction::And>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PANDrm, + (do_SSE_INT_RM<128,Instruction::And>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_INT_RM<128,Instruction::And>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PANDrr, - (do_SSE_INT_RR<128,Instruction::And>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PANDrm, - (do_SSE_INT_RM<128,Instruction::And>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_INT_RM<128,Instruction::And>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION( + PORrr, (do_SSE_INT_RR<128,Instruction::Or>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PORrm, + (do_SSE_INT_RM<128,Instruction::Or>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_INT_RM<128,Instruction::Or>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PORrr, - (do_SSE_INT_RR<128,Instruction::Or>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PORrm, - (do_SSE_INT_RM<128,Instruction::Or>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_INT_RM<128,Instruction::Or>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION( + MMX_PORirr, (do_SSE_INT_RR<64,Instruction::Or>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + MMX_PORirm, + (do_SSE_INT_RM<64,Instruction::Or>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_INT_RM<64,Instruction::Or>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(MMX_PORirr, - (do_SSE_INT_RR<64,Instruction::Or>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(MMX_PORirm, - (do_SSE_INT_RM<64,Instruction::Or>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_INT_RM<64,Instruction::Or>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION( + XORPSrr, (do_SSE_INT_RR<128,Instruction::Xor>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + XORPSrm, + (do_SSE_INT_RM<128,Instruction::Xor>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_INT_RM<128,Instruction::Xor>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(XORPSrr, - (do_SSE_INT_RR<128,Instruction::Xor>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(XORPSrm, - (do_SSE_INT_RM<128,Instruction::Xor>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_INT_RM<128,Instruction::Xor>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(ADDSDrr, + (do_SSE_RR<64,Instruction::FAdd>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + ADDSDrm, (do_SSE_RM<64,Instruction::FAdd>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_RM<64,Instruction::FAdd>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(ADDSDrr, - (do_SSE_RR<64,Instruction::FAdd>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(ADDSDrm, - (do_SSE_RM<64,Instruction::FAdd>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_RM<64,Instruction::FAdd>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(ADDSSrr, + (do_SSE_RR<32,Instruction::FAdd>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + ADDSSrm, (do_SSE_RM<32,Instruction::FAdd>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_RM<32,Instruction::FAdd>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(ADDSSrr, - (do_SSE_RR<32,Instruction::FAdd>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(ADDSSrm, - (do_SSE_RM<32,Instruction::FAdd>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_RM<32,Instruction::FAdd>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(SUBSDrr, + (do_SSE_RR<64,Instruction::FSub>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + SUBSDrm, (do_SSE_RM<64,Instruction::FSub>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_RM<64,Instruction::FSub>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(SUBSDrr, - (do_SSE_RR<64,Instruction::FSub>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(SUBSDrm, - (do_SSE_RM<64,Instruction::FSub>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_RM<64,Instruction::FSub>(ip, block, OP(1), MEM_REFERENCE(2))) ) - -GENERIC_TRANSLATION(SUBSSrr, - (do_SSE_RR<32,Instruction::FSub>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(SUBSSrm, - (do_SSE_RM<32,Instruction::FSub>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_RM<32,Instruction::FSub>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(SUBSSrr, + (do_SSE_RR<32,Instruction::FSub>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + SUBSSrm, (do_SSE_RM<32,Instruction::FSub>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_RM<32,Instruction::FSub>(ip, block, OP(1), MEM_REFERENCE(2)))) GENERIC_TRANSLATION(DIVSDrr, - (do_SSE_RR<64,Instruction::FDiv>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(DIVSDrm, - (do_SSE_RM<64,Instruction::FDiv>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_RM<64,Instruction::FDiv>(ip, block, OP(1), MEM_REFERENCE(2))) ) + (do_SSE_RR<64,Instruction::FDiv>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + DIVSDrm, (do_SSE_RM<64,Instruction::FDiv>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_RM<64,Instruction::FDiv>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(DIVSSrr, - (do_SSE_RR<32,Instruction::FDiv>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(DIVSSrm, - (do_SSE_RM<32,Instruction::FDiv>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_RM<32,Instruction::FDiv>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(DIVSSrr, + (do_SSE_RR<32,Instruction::FDiv>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + DIVSSrm, (do_SSE_RM<32,Instruction::FDiv>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_RM<32,Instruction::FDiv>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(MULSDrr, - (do_SSE_RR<64,Instruction::FMul>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(MULSDrm, - (do_SSE_RM<64,Instruction::FMul>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_RM<64,Instruction::FMul>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(MULSDrr, + (do_SSE_RR<64,Instruction::FMul>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + MULSDrm, (do_SSE_RM<64,Instruction::FMul>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_RM<64,Instruction::FMul>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(MULSSrr, - (do_SSE_RR<32,Instruction::FMul>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(MULSSrm, - (do_SSE_RM<32,Instruction::FMul>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_RM<32,Instruction::FMul>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(MULSSrr, + (do_SSE_RR<32,Instruction::FMul>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + MULSSrm, (do_SSE_RM<32,Instruction::FMul>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_RM<32,Instruction::FMul>(ip, block, OP(1), MEM_REFERENCE(2)))) +GENERIC_TRANSLATION(MOVDI2PDIrr, (MOVAndZextRR<32>(block, OP(0), OP(1)))) +GENERIC_TRANSLATION_REF(MOVDI2PDIrm, + (MOVAndZextRM<32>(ip, block, OP(0), ADDR_NOREF(1))), + (MOVAndZextRM<32>(ip, block, OP(0), MEM_REFERENCE(1)))) -GENERIC_TRANSLATION(MOVDI2PDIrr, - (MOVAndZextRR<32>(block, OP(0), OP(1))) ) -GENERIC_TRANSLATION_REF(MOVDI2PDIrm, - (MOVAndZextRM<32>(ip, block, OP(0), ADDR_NOREF(1))), - (MOVAndZextRM<32>(ip, block, OP(0), MEM_REFERENCE(1))) ) +GENERIC_TRANSLATION(MOVSS2DIrr, (doRRMov<32>(ip, block, OP(1), OP(2)))) -GENERIC_TRANSLATION(MOVSS2DIrr, - (doRRMov<32>(ip, block, OP(1), OP(2))) ) +GENERIC_TRANSLATION(UCOMISSrr, (doUCOMISrr<32>(block, OP(0), OP(1)))) +GENERIC_TRANSLATION_REF(UCOMISSrm, + (doUCOMISrm<32>(ip, block, OP(0), ADDR_NOREF(1))), + (doUCOMISrm<32>(ip, block, OP(0), MEM_REFERENCE(1)))) -GENERIC_TRANSLATION(UCOMISSrr, - (doUCOMISrr<32>(block, OP(0), OP(1))) ) -GENERIC_TRANSLATION_REF(UCOMISSrm, - (doUCOMISrm<32>(ip, block, OP(0), ADDR_NOREF(1))), - (doUCOMISrm<32>(ip, block, OP(0), MEM_REFERENCE(1))) ) +GENERIC_TRANSLATION(UCOMISDrr, (doUCOMISrr<64>(block, OP(0), OP(1)))) +GENERIC_TRANSLATION_REF(UCOMISDrm, + (doUCOMISrm<64>(ip, block, OP(0), ADDR_NOREF(1))), + (doUCOMISrm<64>(ip, block, OP(0), MEM_REFERENCE(1)))) -GENERIC_TRANSLATION(UCOMISDrr, - (doUCOMISrr<64>(block, OP(0), OP(1))) ) -GENERIC_TRANSLATION_REF(UCOMISDrm, - (doUCOMISrm<64>(ip, block, OP(0), ADDR_NOREF(1))), - (doUCOMISrm<64>(ip, block, OP(0), MEM_REFERENCE(1))) ) +GENERIC_TRANSLATION(PSRAWrr, (doPSRArr<16>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION(PSRAWri, (doPSRAri<16>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF(PSRAWrm, + (doPSRArm<16>(ip, block, OP(1), ADDR_NOREF(2))), + (doPSRArm<16>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PSRAWrr, - (doPSRArr<16>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION(PSRAWri, - (doPSRAri<16>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PSRAWrm, - (doPSRArm<16>(ip, block, OP(1), ADDR_NOREF(2))), - (doPSRArm<16>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(PSRADrr, (doPSRArr<32>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION(PSRADri, (doPSRAri<32>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF(PSRADrm, + (doPSRArm<32>(ip, block, OP(1), ADDR_NOREF(2))), + (doPSRArm<32>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PSRADrr, - (doPSRArr<32>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION(PSRADri, - (doPSRAri<32>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PSRADrm, - (doPSRArm<32>(ip, block, OP(1), ADDR_NOREF(2))), - (doPSRArm<32>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(PSLLDrr, (doPSLLrr<32>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION(PSLLDri, (doPSLLri<32>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF(PSLLDrm, + (doPSLLrm<32>(ip, block, OP(1), ADDR_NOREF(2))), + (doPSLLrm<32>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PSLLDrr, - (doPSLLrr<32>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION(PSLLDri, - (doPSLLri<32>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PSLLDrm, - (doPSLLrm<32>(ip, block, OP(1), ADDR_NOREF(2))), - (doPSLLrm<32>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(PSRLWrr, (doPSRLrr<16>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION(PSRLWri, (doPSRLri<16>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF(PSRLWrm, + (doPSRLrm<16>(ip, block, OP(1), ADDR_NOREF(2))), + (doPSRLrm<16>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PSRLWrr, - (doPSRLrr<16>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION(PSRLWri, - (doPSRLri<16>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PSRLWrm, - (doPSRLrm<16>(ip, block, OP(1), ADDR_NOREF(2))), - (doPSRLrm<16>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(PSRLDrr, (doPSRLrr<32>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION(PSRLDri, (doPSRLri<32>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF(PSRLDrm, + (doPSRLrm<32>(ip, block, OP(1), ADDR_NOREF(2))), + (doPSRLrm<32>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PSRLDrr, - (doPSRLrr<32>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION(PSRLDri, - (doPSRLri<32>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PSRLDrm, - (doPSRLrm<32>(ip, block, OP(1), ADDR_NOREF(2))), - (doPSRLrm<32>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(PSRLQrr, (doPSRLrr<64>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION(PSRLQri, (doPSRLri<64>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF(PSRLQrm, + (doPSRLrm<64>(ip, block, OP(1), ADDR_NOREF(2))), + (doPSRLrm<64>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PSRLQrr, - (doPSRLrr<64>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION(PSRLQri, - (doPSRLri<64>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PSRLQrm, - (doPSRLrm<64>(ip, block, OP(1), ADDR_NOREF(2))), - (doPSRLrm<64>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(PSLLWrr, (doPSLLrr<16>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION(PSLLWri, (doPSLLri<16>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF(PSLLWrm, + (doPSLLrm<16>(ip, block, OP(1), ADDR_NOREF(2))), + (doPSLLrm<16>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PSLLWrr, - (doPSLLrr<16>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION(PSLLWri, - (doPSLLri<16>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PSLLWrm, - (doPSLLrm<16>(ip, block, OP(1), ADDR_NOREF(2))), - (doPSLLrm<16>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(PSLLQrr, (doPSLLrr<64>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION(PSLLQri, (doPSLLri<64>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF(PSLLQrm, + (doPSLLrm<64>(ip, block, OP(1), ADDR_NOREF(2))), + (doPSLLrm<64>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PSLLQrr, - (doPSLLrr<64>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION(PSLLQri, - (doPSLLri<64>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PSLLQrm, - (doPSLLrm<64>(ip, block, OP(1), ADDR_NOREF(2))), - (doPSLLrm<64>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(PSLLDQri, (doPSLLri<128>(block, OP(1), OP(2)))) -GENERIC_TRANSLATION(PSLLDQri, - (doPSLLri<128>(block, OP(1), OP(2))) ) - -GENERIC_TRANSLATION(PSHUFDri, - (doPSHUFDri(block, OP(0), OP(1), OP(2))) ) +GENERIC_TRANSLATION(PSHUFDri, (doPSHUFDri(block, OP(0), OP(1), OP(2)))) GENERIC_TRANSLATION_REF(PSHUFDmi, - (doPSHUFDmi(ip, block, OP(0), ADDR_NOREF(1), OP(6))), - (doPSHUFDmi(ip, block, OP(0), MEM_REFERENCE(1), OP(6))) ) + (doPSHUFDmi(ip, block, OP(0), ADDR_NOREF(1), OP(6))), + (doPSHUFDmi(ip, block, OP(0), MEM_REFERENCE(1), OP(6)))) -GENERIC_TRANSLATION(PSHUFBrr, - (doPSHUFBrr<128>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PSHUFBrm, - (doPSHUFBrm<128>(ip, block, OP(1), ADDR_NOREF(2))), - (doPSHUFBrm<128>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(PSHUFBrr, (doPSHUFBrr<128>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF(PSHUFBrm, + (doPSHUFBrm<128>(ip, block, OP(1), ADDR_NOREF(2))), + (doPSHUFBrm<128>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PSHUFHWri, - (doPSHUFHWri(block, OP(0), OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PSHUFHWmi, - (doPSHUFHWmi(ip, block, OP(0), ADDR_NOREF(1), OP(6))), - (doPSHUFHWmi(ip, block, OP(0), MEM_REFERENCE(1), OP(6))) ) +GENERIC_TRANSLATION(PSHUFHWri, (doPSHUFHWri(block, OP(0), OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PSHUFHWmi, (doPSHUFHWmi(ip, block, OP(0), ADDR_NOREF(1), OP(6))), + (doPSHUFHWmi(ip, block, OP(0), MEM_REFERENCE(1), OP(6)))) -GENERIC_TRANSLATION(PSHUFLWri, - (doPSHUFLWri(block, OP(0), OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PSHUFLWmi, - (doPSHUFLWmi(ip, block, OP(0), ADDR_NOREF(1), OP(6))), - (doPSHUFLWmi(ip, block, OP(0), MEM_REFERENCE(1), OP(6))) ) +GENERIC_TRANSLATION(PSHUFLWri, (doPSHUFLWri(block, OP(0), OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PSHUFLWmi, (doPSHUFLWmi(ip, block, OP(0), ADDR_NOREF(1), OP(6))), + (doPSHUFLWmi(ip, block, OP(0), MEM_REFERENCE(1), OP(6)))) -GENERIC_TRANSLATION(PINSRWrri, - (doPINSRWrri(block, OP(1), OP(2), OP(3))) ) -GENERIC_TRANSLATION_REF(PINSRWrmi, - (doPINSRWrmi(ip, block, OP(1), ADDR_NOREF(2), OP(7))), - (doPINSRWrmi(ip, block, OP(1), MEM_REFERENCE(2), OP(7))) ) - -GENERIC_TRANSLATION(PEXTRWri, - (doPEXTRWri(block, OP(0), OP(1), OP(2))) ) +GENERIC_TRANSLATION(PINSRWrri, (doPINSRWrri(block, OP(1), OP(2), OP(3)))) +GENERIC_TRANSLATION_REF( + PINSRWrmi, (doPINSRWrmi(ip, block, OP(1), ADDR_NOREF(2), OP(7))), + (doPINSRWrmi(ip, block, OP(1), MEM_REFERENCE(2), OP(7)))) + +GENERIC_TRANSLATION(PEXTRWri, (doPEXTRWri(block, OP(0), OP(1), OP(2)))) GENERIC_TRANSLATION_REF(PEXTRWmr, - (doPEXTRWmr(ip, block, ADDR_NOREF(0), OP(5), OP(6))), - (doPEXTRWmr(ip, block, MEM_REFERENCE(0), OP(5), OP(6))) ) + (doPEXTRWmr(ip, block, ADDR_NOREF(0), OP(5), OP(6))), + (doPEXTRWmr(ip, block, MEM_REFERENCE(0), OP(5), OP(6)))) -GENERIC_TRANSLATION(PUNPCKLBWrr, - (doPUNPCKrr<128,8,UNPACK_LOW>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PUNPCKLBWrm, - (doPUNPCKrm<128,8,UNPACK_LOW>(ip, block, OP(1), ADDR_NOREF(2))), - (doPUNPCKrm<128,8,UNPACK_LOW>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(PUNPCKLBWrr, + (doPUNPCKrr<128,8,UNPACK_LOW>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PUNPCKLBWrm, + (doPUNPCKrm<128,8,UNPACK_LOW>(ip, block, OP(1), ADDR_NOREF(2))), + (doPUNPCKrm<128,8,UNPACK_LOW>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PUNPCKLWDrr, - (doPUNPCKrr<128,16,UNPACK_LOW>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PUNPCKLWDrm, - (doPUNPCKrm<128,16,UNPACK_LOW>(ip, block, OP(1), ADDR_NOREF(2))), - (doPUNPCKrm<128,16,UNPACK_LOW>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(PUNPCKLWDrr, + (doPUNPCKrr<128,16,UNPACK_LOW>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PUNPCKLWDrm, + (doPUNPCKrm<128,16,UNPACK_LOW>(ip, block, OP(1), ADDR_NOREF(2))), + (doPUNPCKrm<128,16,UNPACK_LOW>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PUNPCKLDQrr, - (doPUNPCKrr<128,32,UNPACK_LOW>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PUNPCKLDQrm, - (doPUNPCKrm<128,32,UNPACK_LOW>(ip, block, OP(1), ADDR_NOREF(2))), - (doPUNPCKrm<128,32,UNPACK_LOW>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(PUNPCKLDQrr, + (doPUNPCKrr<128,32,UNPACK_LOW>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PUNPCKLDQrm, + (doPUNPCKrm<128,32,UNPACK_LOW>(ip, block, OP(1), ADDR_NOREF(2))), + (doPUNPCKrm<128,32,UNPACK_LOW>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PUNPCKLQDQrr, - (doPUNPCKrr<128,64,UNPACK_LOW>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PUNPCKLQDQrm, - (doPUNPCKrm<128,64,UNPACK_LOW>(ip, block, OP(1), ADDR_NOREF(2))), - (doPUNPCKrm<128,64,UNPACK_LOW>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(PUNPCKLQDQrr, + (doPUNPCKrr<128,64,UNPACK_LOW>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PUNPCKLQDQrm, + (doPUNPCKrm<128,64,UNPACK_LOW>(ip, block, OP(1), ADDR_NOREF(2))), + (doPUNPCKrm<128,64,UNPACK_LOW>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PUNPCKHBWrr, - (doPUNPCKrr<128,8,UNPACK_HIGH>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PUNPCKHBWrm, - (doPUNPCKrm<128,8,UNPACK_HIGH>(ip, block, OP(1), ADDR_NOREF(2))), - (doPUNPCKrm<128,8,UNPACK_HIGH>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(PUNPCKHBWrr, + (doPUNPCKrr<128,8,UNPACK_HIGH>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PUNPCKHBWrm, + (doPUNPCKrm<128,8,UNPACK_HIGH>(ip, block, OP(1), ADDR_NOREF(2))), + (doPUNPCKrm<128,8,UNPACK_HIGH>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PUNPCKHWDrr, - (doPUNPCKrr<128,16,UNPACK_HIGH>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PUNPCKHWDrm, - (doPUNPCKrm<128,16,UNPACK_HIGH>(ip, block, OP(1), ADDR_NOREF(2))), - (doPUNPCKrm<128,16,UNPACK_HIGH>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(PUNPCKHWDrr, + (doPUNPCKrr<128,16,UNPACK_HIGH>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PUNPCKHWDrm, + (doPUNPCKrm<128,16,UNPACK_HIGH>(ip, block, OP(1), ADDR_NOREF(2))), + (doPUNPCKrm<128,16,UNPACK_HIGH>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PUNPCKHDQrr, - (doPUNPCKrr<128,32,UNPACK_HIGH>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PUNPCKHDQrm, - (doPUNPCKrm<128,32,UNPACK_HIGH>(ip, block, OP(1), ADDR_NOREF(2))), - (doPUNPCKrm<128,32,UNPACK_HIGH>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(PUNPCKHDQrr, + (doPUNPCKrr<128,32,UNPACK_HIGH>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PUNPCKHDQrm, + (doPUNPCKrm<128,32,UNPACK_HIGH>(ip, block, OP(1), ADDR_NOREF(2))), + (doPUNPCKrm<128,32,UNPACK_HIGH>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PUNPCKHQDQrr, - (doPUNPCKrr<128,64,UNPACK_HIGH>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PUNPCKHQDQrm, - (doPUNPCKrm<128,64,UNPACK_HIGH>(ip, block, OP(1), ADDR_NOREF(2))), - (doPUNPCKrm<128,64,UNPACK_HIGH>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(PUNPCKHQDQrr, + (doPUNPCKrr<128,64,UNPACK_HIGH>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PUNPCKHQDQrm, + (doPUNPCKrm<128,64,UNPACK_HIGH>(ip, block, OP(1), ADDR_NOREF(2))), + (doPUNPCKrm<128,64,UNPACK_HIGH>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PCMPGTBrr, - (do_SSE_COMPARE_RR<128,8,ICmpInst::ICMP_SGT>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PCMPGTBrm, - (do_SSE_COMPARE_RM<128,8,ICmpInst::ICMP_SGT>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_COMPARE_RM<128,8,ICmpInst::ICMP_SGT>(ip, block, OP(1), MEM_REFERENCE(2))) ) -GENERIC_TRANSLATION(PCMPGTWrr, - (do_SSE_COMPARE_RR<128,16,ICmpInst::ICMP_SGT>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PCMPGTWrm, - (do_SSE_COMPARE_RM<128,16,ICmpInst::ICMP_SGT>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_COMPARE_RM<128,16,ICmpInst::ICMP_SGT>(ip, block, OP(1), MEM_REFERENCE(2))) ) -GENERIC_TRANSLATION(PCMPGTDrr, - (do_SSE_COMPARE_RR<128,32,ICmpInst::ICMP_SGT>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PCMPGTDrm, - (do_SSE_COMPARE_RM<128,32,ICmpInst::ICMP_SGT>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_COMPARE_RM<128,32,ICmpInst::ICMP_SGT>(ip, block, OP(1), MEM_REFERENCE(2))) ) -GENERIC_TRANSLATION(PCMPGTQrr, - (do_SSE_COMPARE_RR<128,64,ICmpInst::ICMP_SGT>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PCMPGTQrm, - (do_SSE_COMPARE_RM<128,64,ICmpInst::ICMP_SGT>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_COMPARE_RM<128,64,ICmpInst::ICMP_SGT>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION( + PCMPGTBrr, + (do_SSE_COMPARE_RR<128,8,ICmpInst::ICMP_SGT>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PCMPGTBrm, + (do_SSE_COMPARE_RM<128,8,ICmpInst::ICMP_SGT>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_COMPARE_RM<128,8,ICmpInst::ICMP_SGT>(ip, block, OP(1), MEM_REFERENCE(2)))) +GENERIC_TRANSLATION( + PCMPGTWrr, + (do_SSE_COMPARE_RR<128,16,ICmpInst::ICMP_SGT>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PCMPGTWrm, + (do_SSE_COMPARE_RM<128,16,ICmpInst::ICMP_SGT>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_COMPARE_RM<128,16,ICmpInst::ICMP_SGT>(ip, block, OP(1), MEM_REFERENCE(2)))) +GENERIC_TRANSLATION( + PCMPGTDrr, + (do_SSE_COMPARE_RR<128,32,ICmpInst::ICMP_SGT>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PCMPGTDrm, + (do_SSE_COMPARE_RM<128,32,ICmpInst::ICMP_SGT>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_COMPARE_RM<128,32,ICmpInst::ICMP_SGT>(ip, block, OP(1), MEM_REFERENCE(2)))) +GENERIC_TRANSLATION( + PCMPGTQrr, + (do_SSE_COMPARE_RR<128,64,ICmpInst::ICMP_SGT>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PCMPGTQrm, + (do_SSE_COMPARE_RM<128,64,ICmpInst::ICMP_SGT>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_COMPARE_RM<128,64,ICmpInst::ICMP_SGT>(ip, block, OP(1), MEM_REFERENCE(2)))) +GENERIC_TRANSLATION( + PCMPEQBrr, + (do_SSE_COMPARE_RR<128,8,ICmpInst::ICMP_EQ>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PCMPEQBrm, + (do_SSE_COMPARE_RM<128,8,ICmpInst::ICMP_EQ>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_COMPARE_RM<128,8,ICmpInst::ICMP_EQ>(ip, block, OP(1), MEM_REFERENCE(2)))) +GENERIC_TRANSLATION( + PCMPEQWrr, + (do_SSE_COMPARE_RR<128,16,ICmpInst::ICMP_EQ>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PCMPEQWrm, + (do_SSE_COMPARE_RM<128,16,ICmpInst::ICMP_EQ>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_COMPARE_RM<128,16,ICmpInst::ICMP_EQ>(ip, block, OP(1), MEM_REFERENCE(2)))) +GENERIC_TRANSLATION( + PCMPEQDrr, + (do_SSE_COMPARE_RR<128,32,ICmpInst::ICMP_EQ>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PCMPEQDrm, + (do_SSE_COMPARE_RM<128,32,ICmpInst::ICMP_EQ>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_COMPARE_RM<128,32,ICmpInst::ICMP_EQ>(ip, block, OP(1), MEM_REFERENCE(2)))) +GENERIC_TRANSLATION( + PCMPEQQrr, + (do_SSE_COMPARE_RR<128,64,ICmpInst::ICMP_EQ>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PCMPEQQrm, + (do_SSE_COMPARE_RM<128,64,ICmpInst::ICMP_EQ>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_COMPARE_RM<128,64,ICmpInst::ICMP_EQ>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PCMPEQBrr, - (do_SSE_COMPARE_RR<128,8,ICmpInst::ICMP_EQ>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PCMPEQBrm, - (do_SSE_COMPARE_RM<128,8,ICmpInst::ICMP_EQ>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_COMPARE_RM<128,8,ICmpInst::ICMP_EQ>(ip, block, OP(1), MEM_REFERENCE(2))) ) -GENERIC_TRANSLATION(PCMPEQWrr, - (do_SSE_COMPARE_RR<128,16,ICmpInst::ICMP_EQ>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PCMPEQWrm, - (do_SSE_COMPARE_RM<128,16,ICmpInst::ICMP_EQ>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_COMPARE_RM<128,16,ICmpInst::ICMP_EQ>(ip, block, OP(1), MEM_REFERENCE(2))) ) -GENERIC_TRANSLATION(PCMPEQDrr, - (do_SSE_COMPARE_RR<128,32,ICmpInst::ICMP_EQ>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PCMPEQDrm, - (do_SSE_COMPARE_RM<128,32,ICmpInst::ICMP_EQ>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_COMPARE_RM<128,32,ICmpInst::ICMP_EQ>(ip, block, OP(1), MEM_REFERENCE(2))) ) -GENERIC_TRANSLATION(PCMPEQQrr, - (do_SSE_COMPARE_RR<128,64,ICmpInst::ICMP_EQ>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PCMPEQQrm, - (do_SSE_COMPARE_RM<128,64,ICmpInst::ICMP_EQ>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_COMPARE_RM<128,64,ICmpInst::ICMP_EQ>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION( + PADDBrr, + (do_SSE_VECTOR_RR<128,8,Instruction::Add>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PADDBrm, + (do_SSE_VECTOR_RM<128,8,Instruction::Add>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_VECTOR_RM<128,8,Instruction::Add>(ip, block, OP(1), MEM_REFERENCE(2)))) +GENERIC_TRANSLATION( + PADDWrr, + (do_SSE_VECTOR_RR<128,16,Instruction::Add>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PADDWrm, + (do_SSE_VECTOR_RM<128,16,Instruction::Add>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_VECTOR_RM<128,16,Instruction::Add>(ip, block, OP(1), MEM_REFERENCE(2)))) +GENERIC_TRANSLATION( + PADDDrr, + (do_SSE_VECTOR_RR<128,32,Instruction::Add>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PADDDrm, + (do_SSE_VECTOR_RM<128,32,Instruction::Add>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_VECTOR_RM<128,32,Instruction::Add>(ip, block, OP(1), MEM_REFERENCE(2)))) +GENERIC_TRANSLATION( + PADDQrr, + (do_SSE_VECTOR_RR<128,64,Instruction::Add>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PADDQrm, + (do_SSE_VECTOR_RM<128,64,Instruction::Add>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_VECTOR_RM<128,64,Instruction::Add>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PADDBrr, - (do_SSE_VECTOR_RR<128,8,Instruction::Add>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PADDBrm, - (do_SSE_VECTOR_RM<128,8,Instruction::Add>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_VECTOR_RM<128,8,Instruction::Add>(ip, block, OP(1), MEM_REFERENCE(2))) ) -GENERIC_TRANSLATION(PADDWrr, - (do_SSE_VECTOR_RR<128,16,Instruction::Add>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PADDWrm, - (do_SSE_VECTOR_RM<128,16,Instruction::Add>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_VECTOR_RM<128,16,Instruction::Add>(ip, block, OP(1), MEM_REFERENCE(2))) ) -GENERIC_TRANSLATION(PADDDrr, - (do_SSE_VECTOR_RR<128,32,Instruction::Add>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PADDDrm, - (do_SSE_VECTOR_RM<128,32,Instruction::Add>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_VECTOR_RM<128,32,Instruction::Add>(ip, block, OP(1), MEM_REFERENCE(2))) ) -GENERIC_TRANSLATION(PADDQrr, - (do_SSE_VECTOR_RR<128,64,Instruction::Add>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PADDQrm, - (do_SSE_VECTOR_RM<128,64,Instruction::Add>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_VECTOR_RM<128,64,Instruction::Add>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION( + SUBPSrr, + (do_SSE_FP_VECTOR_RR<128,32,Instruction::FSub>(ip, block, OP(1), OP(2)))) -GENERIC_TRANSLATION(SUBPSrr, - (do_SSE_FP_VECTOR_RR<128,32,Instruction::FSub>(ip, block, OP(1), OP(2))) ) +GENERIC_TRANSLATION_REF( + SUBPSrm, + (do_SSE_FP_VECTOR_RM<128,32,Instruction::FSub>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_FP_VECTOR_RM<128,32,Instruction::FSub>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION_REF(SUBPSrm, - (do_SSE_FP_VECTOR_RM<128,32,Instruction::FSub>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_FP_VECTOR_RM<128,32,Instruction::FSub>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION( + SUBPDrr, + (do_SSE_FP_VECTOR_RR<128,64,Instruction::FSub>(ip, block, OP(1), OP(2)))) -GENERIC_TRANSLATION(SUBPDrr, - (do_SSE_FP_VECTOR_RR<128,64,Instruction::FSub>(ip, block, OP(1), OP(2))) ) +GENERIC_TRANSLATION_REF( + SUBPDrm, + (do_SSE_FP_VECTOR_RM<128,64,Instruction::FSub>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_FP_VECTOR_RM<128,64,Instruction::FSub>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION_REF(SUBPDrm, - (do_SSE_FP_VECTOR_RM<128,64,Instruction::FSub>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_FP_VECTOR_RM<128,64,Instruction::FSub>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION( + ADDPSrr, + (do_SSE_FP_VECTOR_RR<128,32,Instruction::FAdd>(ip, block, OP(1), OP(2)))) -GENERIC_TRANSLATION(ADDPSrr, - (do_SSE_FP_VECTOR_RR<128,32,Instruction::FAdd>(ip, block, OP(1), OP(2))) ) +GENERIC_TRANSLATION_REF( + ADDPSrm, + (do_SSE_FP_VECTOR_RM<128,32,Instruction::FAdd>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_FP_VECTOR_RM<128,32,Instruction::FAdd>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION_REF(ADDPSrm, - (do_SSE_FP_VECTOR_RM<128,32,Instruction::FAdd>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_FP_VECTOR_RM<128,32,Instruction::FAdd>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION( + ADDPDrr, + (do_SSE_FP_VECTOR_RR<128,64,Instruction::FAdd>(ip, block, OP(1), OP(2)))) -GENERIC_TRANSLATION(ADDPDrr, - (do_SSE_FP_VECTOR_RR<128,64,Instruction::FAdd>(ip, block, OP(1), OP(2))) ) +GENERIC_TRANSLATION_REF( + ADDPDrm, + (do_SSE_FP_VECTOR_RM<128,64,Instruction::FAdd>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_FP_VECTOR_RM<128,64,Instruction::FAdd>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION_REF(ADDPDrm, - (do_SSE_FP_VECTOR_RM<128,64,Instruction::FAdd>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_FP_VECTOR_RM<128,64,Instruction::FAdd>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION( + MULPSrr, + (do_SSE_FP_VECTOR_RR<128,32,Instruction::FMul>(ip, block, OP(1), OP(2)))) -GENERIC_TRANSLATION(MULPSrr, - (do_SSE_FP_VECTOR_RR<128,32,Instruction::FMul>(ip, block, OP(1), OP(2))) ) +GENERIC_TRANSLATION_REF( + MULPSrm, + (do_SSE_FP_VECTOR_RM<128,32,Instruction::FMul>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_FP_VECTOR_RM<128,32,Instruction::FMul>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION_REF(MULPSrm, - (do_SSE_FP_VECTOR_RM<128,32,Instruction::FMul>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_FP_VECTOR_RM<128,32,Instruction::FMul>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION( + MULPDrr, + (do_SSE_FP_VECTOR_RR<128,64,Instruction::FMul>(ip, block, OP(1), OP(2)))) -GENERIC_TRANSLATION(MULPDrr, - (do_SSE_FP_VECTOR_RR<128,64,Instruction::FMul>(ip, block, OP(1), OP(2))) ) +GENERIC_TRANSLATION_REF( + MULPDrm, + (do_SSE_FP_VECTOR_RM<128,64,Instruction::FMul>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_FP_VECTOR_RM<128,64,Instruction::FMul>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION_REF(MULPDrm, - (do_SSE_FP_VECTOR_RM<128,64,Instruction::FMul>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_FP_VECTOR_RM<128,64,Instruction::FMul>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION( + DIVPSrr, + (do_SSE_FP_VECTOR_RR<128,32,Instruction::FDiv>(ip, block, OP(1), OP(2)))) -GENERIC_TRANSLATION(DIVPSrr, - (do_SSE_FP_VECTOR_RR<128,32,Instruction::FDiv>(ip, block, OP(1), OP(2))) ) +GENERIC_TRANSLATION_REF( + DIVPSrm, + (do_SSE_FP_VECTOR_RM<128,32,Instruction::FDiv>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_FP_VECTOR_RM<128,32,Instruction::FDiv>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION_REF(DIVPSrm, - (do_SSE_FP_VECTOR_RM<128,32,Instruction::FDiv>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_FP_VECTOR_RM<128,32,Instruction::FDiv>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION( + DIVPDrr, + (do_SSE_FP_VECTOR_RR<128,64,Instruction::FDiv>(ip, block, OP(1), OP(2)))) -GENERIC_TRANSLATION(DIVPDrr, - (do_SSE_FP_VECTOR_RR<128,64,Instruction::FDiv>(ip, block, OP(1), OP(2))) ) +GENERIC_TRANSLATION_REF( + DIVPDrm, + (do_SSE_FP_VECTOR_RM<128,64,Instruction::FDiv>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_FP_VECTOR_RM<128,64,Instruction::FDiv>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION_REF(DIVPDrm, - (do_SSE_FP_VECTOR_RM<128,64,Instruction::FDiv>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_FP_VECTOR_RM<128,64,Instruction::FDiv>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION( + PSUBUSBrr, + (do_SATURATED_SUB_RR<128,8,ICmpInst::ICMP_UGE>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PSUBUSBrm, + (do_SATURATED_SUB_RM<128,8,ICmpInst::ICMP_UGE>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SATURATED_SUB_RM<128,8,ICmpInst::ICMP_UGE>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PSUBUSBrr, - (do_SATURATED_SUB_RR<128,8,ICmpInst::ICMP_UGE>(ip, block, OP(1), OP(2)))) -GENERIC_TRANSLATION_REF(PSUBUSBrm, - (do_SATURATED_SUB_RM<128,8,ICmpInst::ICMP_UGE>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SATURATED_SUB_RM<128,8,ICmpInst::ICMP_UGE>(ip, block, OP(1), MEM_REFERENCE(2)))) +GENERIC_TRANSLATION( + PSUBUSWrr, + (do_SATURATED_SUB_RR<128,16,ICmpInst::ICMP_UGE>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PSUBUSWrm, + (do_SATURATED_SUB_RM<128,16,ICmpInst::ICMP_UGE>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SATURATED_SUB_RM<128,16,ICmpInst::ICMP_UGE>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PSUBUSWrr, - (do_SATURATED_SUB_RR<128,16,ICmpInst::ICMP_UGE>(ip, block, OP(1), OP(2)))) -GENERIC_TRANSLATION_REF(PSUBUSWrm, - (do_SATURATED_SUB_RM<128,16,ICmpInst::ICMP_UGE>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SATURATED_SUB_RM<128,16,ICmpInst::ICMP_UGE>(ip, block, OP(1), MEM_REFERENCE(2)))) +GENERIC_TRANSLATION( + PSUBBrr, + (do_SSE_VECTOR_RR<128,8,Instruction::Sub>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PSUBBrm, + (do_SSE_VECTOR_RM<128,8,Instruction::Sub>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_VECTOR_RM<128,8,Instruction::Sub>(ip, block, OP(1), MEM_REFERENCE(2)))) +GENERIC_TRANSLATION( + PSUBWrr, + (do_SSE_VECTOR_RR<128,16,Instruction::Sub>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PSUBWrm, + (do_SSE_VECTOR_RM<128,16,Instruction::Sub>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_VECTOR_RM<128,16,Instruction::Sub>(ip, block, OP(1), MEM_REFERENCE(2)))) +GENERIC_TRANSLATION( + PSUBDrr, + (do_SSE_VECTOR_RR<128,32,Instruction::Sub>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PSUBDrm, + (do_SSE_VECTOR_RM<128,32,Instruction::Sub>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_VECTOR_RM<128,32,Instruction::Sub>(ip, block, OP(1), MEM_REFERENCE(2)))) +GENERIC_TRANSLATION( + PSUBQrr, + (do_SSE_VECTOR_RR<128,64,Instruction::Sub>(ip, block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + PSUBQrm, + (do_SSE_VECTOR_RM<128,64,Instruction::Sub>(ip, block, OP(1), ADDR_NOREF(2))), + (do_SSE_VECTOR_RM<128,64,Instruction::Sub>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PSUBBrr, - (do_SSE_VECTOR_RR<128,8,Instruction::Sub>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PSUBBrm, - (do_SSE_VECTOR_RM<128,8,Instruction::Sub>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_VECTOR_RM<128,8,Instruction::Sub>(ip, block, OP(1), MEM_REFERENCE(2))) ) -GENERIC_TRANSLATION(PSUBWrr, - (do_SSE_VECTOR_RR<128,16,Instruction::Sub>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PSUBWrm, - (do_SSE_VECTOR_RM<128,16,Instruction::Sub>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_VECTOR_RM<128,16,Instruction::Sub>(ip, block, OP(1), MEM_REFERENCE(2))) ) -GENERIC_TRANSLATION(PSUBDrr, - (do_SSE_VECTOR_RR<128,32,Instruction::Sub>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PSUBDrm, - (do_SSE_VECTOR_RM<128,32,Instruction::Sub>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_VECTOR_RM<128,32,Instruction::Sub>(ip, block, OP(1), MEM_REFERENCE(2))) ) -GENERIC_TRANSLATION(PSUBQrr, - (do_SSE_VECTOR_RR<128,64,Instruction::Sub>(ip, block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PSUBQrm, - (do_SSE_VECTOR_RM<128,64,Instruction::Sub>(ip, block, OP(1), ADDR_NOREF(2))), - (do_SSE_VECTOR_RM<128,64,Instruction::Sub>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION( + MAXPSrr, + (doMAXMIN_FP_VECTOR_rr<128, 32, FCmpInst::FCMP_UGT>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + MAXPSrm, + (doMAXMIN_FP_VECTOR_rm<128, 32, FCmpInst::FCMP_UGT>(ip, block, OP(1), ADDR_NOREF(2))), + (doMAXMIN_FP_VECTOR_rm<128, 32, FCmpInst::FCMP_UGT>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(MAXPSrr, - (doMAXMIN_FP_VECTOR_rr<128, 32, FCmpInst::FCMP_UGT>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(MAXPSrm, - (doMAXMIN_FP_VECTOR_rm<128, 32, FCmpInst::FCMP_UGT>(ip, block, OP(1), ADDR_NOREF(2))), - (doMAXMIN_FP_VECTOR_rm<128, 32, FCmpInst::FCMP_UGT>(ip, block, OP(1), MEM_REFERENCE(2))) ) - -GENERIC_TRANSLATION(MAXPDrr, - (doMAXMIN_FP_VECTOR_rr<128, 64, FCmpInst::FCMP_UGT>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(MAXPDrm, - (doMAXMIN_FP_VECTOR_rm<128, 64, FCmpInst::FCMP_UGT>(ip, block, OP(1), ADDR_NOREF(2))), - (doMAXMIN_FP_VECTOR_rm<128, 64, FCmpInst::FCMP_UGT>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION( + MAXPDrr, + (doMAXMIN_FP_VECTOR_rr<128, 64, FCmpInst::FCMP_UGT>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + MAXPDrm, + (doMAXMIN_FP_VECTOR_rm<128, 64, FCmpInst::FCMP_UGT>(ip, block, OP(1), ADDR_NOREF(2))), + (doMAXMIN_FP_VECTOR_rm<128, 64, FCmpInst::FCMP_UGT>(ip, block, OP(1), MEM_REFERENCE(2)))) GENERIC_TRANSLATION(MAXSSrr, - (doMAXMINrr<32, FCmpInst::FCMP_UGT>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(MAXSSrm, - (doMAXMINrm<32, FCmpInst::FCMP_UGT>(ip, block, OP(1), ADDR_NOREF(2))), - (doMAXMINrm<32, FCmpInst::FCMP_UGT>(ip, block, OP(1), MEM_REFERENCE(2))) ) + (doMAXMINrr<32, FCmpInst::FCMP_UGT>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + MAXSSrm, + (doMAXMINrm<32, FCmpInst::FCMP_UGT>(ip, block, OP(1), ADDR_NOREF(2))), + (doMAXMINrm<32, FCmpInst::FCMP_UGT>(ip, block, OP(1), MEM_REFERENCE(2)))) GENERIC_TRANSLATION(MAXSDrr, - (doMAXMINrr<64, FCmpInst::FCMP_UGT>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(MAXSDrm, - (doMAXMINrm<64, FCmpInst::FCMP_UGT>(ip, block, OP(1), ADDR_NOREF(2))), - (doMAXMINrm<64, FCmpInst::FCMP_UGT>(ip, block, OP(1), MEM_REFERENCE(2))) ) + (doMAXMINrr<64, FCmpInst::FCMP_UGT>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + MAXSDrm, + (doMAXMINrm<64, FCmpInst::FCMP_UGT>(ip, block, OP(1), ADDR_NOREF(2))), + (doMAXMINrm<64, FCmpInst::FCMP_UGT>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(MINPSrr, - (doMAXMIN_FP_VECTOR_rr<128, 32, FCmpInst::FCMP_ULT>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(MINPSrm, - (doMAXMIN_FP_VECTOR_rm<128, 32, FCmpInst::FCMP_ULT>(ip, block, OP(1), ADDR_NOREF(2))), - (doMAXMIN_FP_VECTOR_rm<128, 32, FCmpInst::FCMP_ULT>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION( + MINPSrr, + (doMAXMIN_FP_VECTOR_rr<128, 32, FCmpInst::FCMP_ULT>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + MINPSrm, + (doMAXMIN_FP_VECTOR_rm<128, 32, FCmpInst::FCMP_ULT>(ip, block, OP(1), ADDR_NOREF(2))), + (doMAXMIN_FP_VECTOR_rm<128, 32, FCmpInst::FCMP_ULT>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(MINPDrr, - (doMAXMIN_FP_VECTOR_rr<128, 64, FCmpInst::FCMP_ULT>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(MINPDrm, - (doMAXMIN_FP_VECTOR_rm<128, 64, FCmpInst::FCMP_ULT>(ip, block, OP(1), ADDR_NOREF(2))), - (doMAXMIN_FP_VECTOR_rm<128, 64, FCmpInst::FCMP_ULT>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION( + MINPDrr, + (doMAXMIN_FP_VECTOR_rr<128, 64, FCmpInst::FCMP_ULT>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + MINPDrm, + (doMAXMIN_FP_VECTOR_rm<128, 64, FCmpInst::FCMP_ULT>(ip, block, OP(1), ADDR_NOREF(2))), + (doMAXMIN_FP_VECTOR_rm<128, 64, FCmpInst::FCMP_ULT>(ip, block, OP(1), MEM_REFERENCE(2)))) GENERIC_TRANSLATION(MINSSrr, - (doMAXMINrr<32, FCmpInst::FCMP_ULT>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(MINSSrm, - (doMAXMINrm<32, FCmpInst::FCMP_ULT>(ip, block, OP(1), ADDR_NOREF(2))), - (doMAXMINrm<32, FCmpInst::FCMP_ULT>(ip, block, OP(1), MEM_REFERENCE(2))) ) + (doMAXMINrr<32, FCmpInst::FCMP_ULT>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + MINSSrm, + (doMAXMINrm<32, FCmpInst::FCMP_ULT>(ip, block, OP(1), ADDR_NOREF(2))), + (doMAXMINrm<32, FCmpInst::FCMP_ULT>(ip, block, OP(1), MEM_REFERENCE(2)))) GENERIC_TRANSLATION(MINSDrr, - (doMAXMINrr<64, FCmpInst::FCMP_ULT>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(MINSDrm, - (doMAXMINrm<64, FCmpInst::FCMP_ULT>(ip, block, OP(1), ADDR_NOREF(2))), - (doMAXMINrm<64, FCmpInst::FCMP_ULT>(ip, block, OP(1), MEM_REFERENCE(2))) ) + (doMAXMINrr<64, FCmpInst::FCMP_ULT>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF( + MINSDrm, + (doMAXMINrm<64, FCmpInst::FCMP_ULT>(ip, block, OP(1), ADDR_NOREF(2))), + (doMAXMINrm<64, FCmpInst::FCMP_ULT>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PBLENDVBrr0, - (doBLENDVBrr<128>(block, OP(1), OP(2))) ) -GENERIC_TRANSLATION_REF(PBLENDVBrm0, - (doBLENDVBrm<128>(ip, block, OP(1), ADDR_NOREF(2))), - (doBLENDVBrm<128>(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(PBLENDVBrr0, (doBLENDVBrr<128>(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF(PBLENDVBrm0, + (doBLENDVBrm<128>(ip, block, OP(1), ADDR_NOREF(2))), + (doBLENDVBrm<128>(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(PMULUDQrr, - (doPMULUDQrr(block, OP(1), OP(2)))) -GENERIC_TRANSLATION_REF(PMULUDQrm, - (doPMULUDQrm(ip, block, OP(1), ADDR_NOREF(2))), - (doPMULUDQrm(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION(PMULUDQrr, (doPMULUDQrr(block, OP(1), OP(2)))) +GENERIC_TRANSLATION_REF(PMULUDQrm, + (doPMULUDQrm(ip, block, OP(1), ADDR_NOREF(2))), + (doPMULUDQrm(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(CVTTPS2DQrr, - (doCVTTPS2DQrr(block, OP(0), OP(1)))) -GENERIC_TRANSLATION_REF(CVTTPS2DQrm, - (doCVTTPS2DQrm(ip, block, OP(0), ADDR_NOREF(1))), - (doCVTTPS2DQrm(ip, block, OP(0), MEM_REFERENCE(1))) ) +GENERIC_TRANSLATION(CVTTPS2DQrr, (doCVTTPS2DQrr(block, OP(0), OP(1)))) +GENERIC_TRANSLATION_REF(CVTTPS2DQrm, + (doCVTTPS2DQrm(ip, block, OP(0), ADDR_NOREF(1))), + (doCVTTPS2DQrm(ip, block, OP(0), MEM_REFERENCE(1)))) -GENERIC_TRANSLATION_REF(MOVHPDrm, - (doMOVHPDrm(ip, block, OP(1), ADDR_NOREF(2))), - (doMOVHPDrm(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION_REF(MOVHPDrm, (doMOVHPDrm(ip, block, OP(1), ADDR_NOREF(2))), + (doMOVHPDrm(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION_REF(MOVHPDmr, - (doMOVHPDmr(ip, block, ADDR_NOREF(0), OP(5))), - (doMOVHPDmr(ip, block, MEM_REFERENCE(0), OP(5))) ) +GENERIC_TRANSLATION_REF(MOVHPDmr, (doMOVHPDmr(ip, block, ADDR_NOREF(0), OP(5))), + (doMOVHPDmr(ip, block, MEM_REFERENCE(0), OP(5)))) -GENERIC_TRANSLATION_REF(MOVLPDrm, - (doMOVLPDrm(ip, block, OP(1), ADDR_NOREF(2))), - (doMOVLPDrm(ip, block, OP(1), MEM_REFERENCE(2))) ) +GENERIC_TRANSLATION_REF(MOVLPDrm, (doMOVLPDrm(ip, block, OP(1), ADDR_NOREF(2))), + (doMOVLPDrm(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(SHUFPDrri, - (doSHUFPDrri(block, OP(1), OP(2), OP(3))) ) -GENERIC_TRANSLATION_REF(SHUFPDrmi, - (doSHUFPDrmi(ip, block, OP(1), ADDR_NOREF(2), OP(7))), - (doSHUFPDrmi(ip, block, OP(1), MEM_REFERENCE(2), OP(7))) ) +GENERIC_TRANSLATION(SHUFPDrri, (doSHUFPDrri(block, OP(1), OP(2), OP(3)))) +GENERIC_TRANSLATION_REF( + SHUFPDrmi, (doSHUFPDrmi(ip, block, OP(1), ADDR_NOREF(2), OP(7))), + (doSHUFPDrmi(ip, block, OP(1), MEM_REFERENCE(2), OP(7)))) -GENERIC_TRANSLATION(SHUFPSrri, - (doSHUFPSrri(block, OP(1), OP(2), OP(3))) ) -GENERIC_TRANSLATION_REF(SHUFPSrmi, - (doSHUFPSrmi(ip, block, OP(1), ADDR_NOREF(2), OP(7))), - (doSHUFPSrmi(ip, block, OP(1), MEM_REFERENCE(2), OP(7))) ) +GENERIC_TRANSLATION(SHUFPSrri, (doSHUFPSrri(block, OP(1), OP(2), OP(3)))) +GENERIC_TRANSLATION_REF( + SHUFPSrmi, (doSHUFPSrmi(ip, block, OP(1), ADDR_NOREF(2), OP(7))), + (doSHUFPSrmi(ip, block, OP(1), MEM_REFERENCE(2), OP(7)))) -GENERIC_TRANSLATION(UNPCKLPSrr, - (doUNPCKLPSrr(block, OP(1), OP(2))) ) +GENERIC_TRANSLATION(UNPCKLPSrr, (doUNPCKLPSrr(block, OP(1), OP(2)))) GENERIC_TRANSLATION_REF(UNPCKLPSrm, - (doUNPCKLPSrm(ip, block, OP(1), ADDR_NOREF(2))), - (doUNPCKLPSrm(ip, block, OP(1), MEM_REFERENCE(2))) ) -GENERIC_TRANSLATION(UNPCKLPDrr, - (doUNPCKLPDrr(block, OP(1), OP(2))) ) + (doUNPCKLPSrm(ip, block, OP(1), ADDR_NOREF(2))), + (doUNPCKLPSrm(ip, block, OP(1), MEM_REFERENCE(2)))) +GENERIC_TRANSLATION(UNPCKLPDrr, (doUNPCKLPDrr(block, OP(1), OP(2)))) GENERIC_TRANSLATION_REF(UNPCKLPDrm, - (doUNPCKLPDrm(ip, block, OP(1), ADDR_NOREF(2))), - (doUNPCKLPDrm(ip, block, OP(1), MEM_REFERENCE(2))) ) + (doUNPCKLPDrm(ip, block, OP(1), ADDR_NOREF(2))), + (doUNPCKLPDrm(ip, block, OP(1), MEM_REFERENCE(2)))) -GENERIC_TRANSLATION(UNPCKHPDrr, - (doUNPCKHPDrr(block, OP(1), OP(2))) ) +GENERIC_TRANSLATION(UNPCKHPDrr, (doUNPCKHPDrr(block, OP(1), OP(2)))) -GENERIC_TRANSLATION(CVTDQ2PSrr, - (doCVTDQ2PSrr(block, OP(0), OP(1))) ) +GENERIC_TRANSLATION(CVTDQ2PSrr, (doCVTDQ2PSrr(block, OP(0), OP(1)))) -GENERIC_TRANSLATION(CVTPS2PDrr, - (doCVTPS2PDrr(block, OP(0), OP(1))) ) +GENERIC_TRANSLATION(CVTPS2PDrr, (doCVTPS2PDrr(block, OP(0), OP(1)))) GENERIC_TRANSLATION_REF(CVTPS2PDrm, - (doCVTPS2PDrm(ip, block, OP(0), ADDR_NOREF(1))), - (doCVTPS2PDrm(ip, block, OP(0), MEM_REFERENCE(1))) ) -GENERIC_TRANSLATION(CVTPD2PSrr, - (doCVTPD2PSrr(block, OP(0), OP(1))) ) + (doCVTPS2PDrm(ip, block, OP(0), ADDR_NOREF(1))), + (doCVTPS2PDrm(ip, block, OP(0), MEM_REFERENCE(1)))) +GENERIC_TRANSLATION(CVTPD2PSrr, (doCVTPD2PSrr(block, OP(0), OP(1)))) GENERIC_TRANSLATION_REF(CVTPD2PSrm, - (doCVTPD2PSrm(ip, block, OP(0), ADDR_NOREF(1))), - (doCVTPD2PSrm(ip, block, OP(0), MEM_REFERENCE(1))) ) + (doCVTPD2PSrm(ip, block, OP(0), ADDR_NOREF(1))), + (doCVTPD2PSrm(ip, block, OP(0), MEM_REFERENCE(1)))) -GENERIC_TRANSLATION(MOV64toPQIrr, - (MOVAndZextRR<64>(block, OP(0), OP(1))) ) -GENERIC_TRANSLATION_REF(MOV64toSDrm, - (MOVAndZextRM<64>(ip, block, OP(0), ADDR_NOREF(1))), - (MOVAndZextRM<64>(ip, block, OP(0), MEM_REFERENCE(1))) ) +GENERIC_TRANSLATION(MOV64toPQIrr, (MOVAndZextRR<64>(block, OP(0), OP(1)))) +GENERIC_TRANSLATION_REF(MOV64toSDrm, + (MOVAndZextRM<64>(ip, block, OP(0), ADDR_NOREF(1))), + (MOVAndZextRM<64>(ip, block, OP(0), MEM_REFERENCE(1)))) GENERIC_TRANSLATION_REF(MOVQI2PQIrm, - (MOVAndZextRM<64>(ip, block, OP(0), ADDR_NOREF(1))), - (MOVAndZextRM<64>(ip, block, OP(0), MEM_REFERENCE(1))) ) -GENERIC_TRANSLATION(MOVDDUPrr, - (doMOVDDUPrr(block, OP(0), OP(1))) ) + (MOVAndZextRM<64>(ip, block, OP(0), ADDR_NOREF(1))), + (MOVAndZextRM<64>(ip, block, OP(0), MEM_REFERENCE(1)))) +GENERIC_TRANSLATION(MOVDDUPrr, (doMOVDDUPrr(block, OP(0), OP(1)))) void SSE_populateDispatchMap(DispatchMap &m) { - m[X86::MOVSDrm] = (doMOVSrm<64>); - m[X86::MOVSDmr] = (doMOVSmr<64>); - - m[X86::CVTSI2SDrr] = (translate_CVTSI2SDrr<32>); - m[X86::CVTSI2SDrm] = (translate_CVTSI2SDrm<32>); - m[X86::CVTSI2SD64rr] = (translate_CVTSI2SDrr<64>); - m[X86::CVTSI2SD64rm] = (translate_CVTSI2SDrm<64>); - - - m[X86::CVTSD2SSrm] = translate_CVTSD2SSrm; - m[X86::CVTSD2SSrr] = translate_CVTSD2SSrr; - m[X86::CVTSS2SDrm] = translate_CVTSS2SDrm; - m[X86::CVTSS2SDrr] = translate_CVTSS2SDrr; - m[X86::MOVSSrm] = (doMOVSrm<32>); - m[X86::MOVSSmr] = (doMOVSmr<32>); - m[X86::XORPSrr] = translate_XORPSrr; - m[X86::XORPSrm] = translate_XORPSrm; - // XORPD = XORPS = PXOR, for the purposes of translation - // it just operates on different bitwidth and changes internal register type - // which is not exposed to outside world but affects performance - m[X86::XORPDrr] = translate_XORPSrr; - m[X86::XORPDrm] = translate_XORPSrm; - m[X86::PXORrr] = translate_XORPSrr; - m[X86::PXORrm] = translate_XORPSrm; - - // these should be identical - m[X86::ORPDrr] = translate_PORrr; - m[X86::ORPDrm] = translate_PORrm; - m[X86::ORPSrr] = translate_PORrr; - m[X86::ORPSrm] = translate_PORrm; - - m[X86::CVTSI2SSrr] = translate_CVTSI2SSrr; - m[X86::CVTSI2SSrm] = translate_CVTSI2SSrm; - - m[X86::CVTSI2SS64rr] = translate_CVTSI2SS64rr; - m[X86::CVTSI2SS64rm] = translate_CVTSI2SS64rm; - - m[X86::CVTTSD2SIrm] = (doCVTT_to_SI_rm<64,32>); - m[X86::CVTTSD2SIrr] = (doCVTT_to_SI_rr<64,32>); - m[X86::CVTTSS2SIrm] = (doCVTT_to_SI_rm<32,32>); - m[X86::CVTTSS2SIrr] = (doCVTT_to_SI_rr<32,32>); - - m[X86::CVTTSD2SI64rm] = (doCVTT_to_SI_rm<64,64>); - m[X86::CVTTSD2SI64rr] = (doCVTT_to_SI_rr<64,64>); - m[X86::CVTTSS2SI64rm] = (doCVTT_to_SI_rm<32,64>); - m[X86::CVTTSS2SI64rr] = (doCVTT_to_SI_rr<32,64>); - - m[X86::ADDSDrr] = translate_ADDSDrr; - m[X86::ADDSDrm] = translate_ADDSDrm; - m[X86::ADDSSrr] = translate_ADDSSrr; - m[X86::ADDSSrm] = translate_ADDSSrm; - m[X86::SUBSDrr] = translate_SUBSDrr; - m[X86::SUBSDrm] = translate_SUBSDrm; - m[X86::SUBSSrr] = translate_SUBSSrr; - m[X86::SUBSSrm] = translate_SUBSSrm; - m[X86::DIVSDrr] = translate_DIVSDrr; - m[X86::DIVSDrm] = translate_DIVSDrm; - m[X86::DIVSSrr] = translate_DIVSSrr; - m[X86::DIVSSrm] = translate_DIVSSrm; - m[X86::MULSDrr] = translate_MULSDrr; - m[X86::MULSDrm] = translate_MULSDrm; - m[X86::MULSSrr] = translate_MULSSrr; - m[X86::MULSSrm] = translate_MULSSrm; - m[X86::PORrr] = translate_PORrr; - m[X86::PORrm] = translate_PORrm; - - m[X86::MOVDQUrm] = (doMOVSrm<128>); - m[X86::MOVDQUmr] = (doMOVSmr<128>); - m[X86::MOVDQUrr] = (doMOVSrr<128,0,1>); - m[X86::MOVDQUrr_REV] = (doMOVSrr<128,0,1>); - - m[X86::MOVDQArm] = (doMOVSrm<128>); - m[X86::MOVDQAmr] = (doMOVSmr<128>); - m[X86::MOVDQArr] = (doMOVSrr<128,0,1>); - m[X86::MOVDQArr_REV] = (doMOVSrr<128,0,1>); - - m[X86::MOVUPDrm] = (doMOVSrm<128>); - m[X86::MOVUPDmr] = (doMOVSmr<128>); - - m[X86::MOVUPSrm] = (doMOVSrm<128>); - m[X86::MOVUPSmr] = (doMOVSmr<128>); - m[X86::MOVUPSrr] = (doMOVSrr<128,0,1>); - m[X86::MOVUPSrr_REV] = (doMOVSrr<128,0,1>); - - m[X86::MOVAPSrm] = (doMOVSrm<128>); - m[X86::MOVAPSmr] = (doMOVSmr<128>); - m[X86::MOVAPSrr] = (doMOVSrr<128,0,1>); - m[X86::MOVAPSrr_REV] = (doMOVSrr<128,0,1>); - - m[X86::MOVAPDrm] = (doMOVSrm<128>); - m[X86::MOVAPDmr] = (doMOVSmr<128>); - m[X86::MOVAPDrr] = (doMOVSrr<128,0,1>); - m[X86::MOVAPDrr_REV] = (doMOVSrr<128,0,1>); - - m[X86::MOVSDrr] = (doMOVSrr<64,1,2>); - m[X86::MOVSSrr] = (doMOVSrr<32,1,2>); - - m[X86::MOVDI2PDIrr] = translate_MOVDI2PDIrr; - m[X86::MOVDI2PDIrm] = translate_MOVDI2PDIrm; - - m[X86::MOVPDI2DIrr] = (doMOVSrr<32,0,1>); - m[X86::MOVPDI2DImr] = (doMOVSmr<32>); - - m[X86::MOVSS2DIrr] = translate_MOVSS2DIrr; - m[X86::MOVSS2DImr] = (doMOVSmr<32>); - - m[X86::UCOMISSrr] = translate_UCOMISSrr; - m[X86::UCOMISSrm] = translate_UCOMISSrm; - m[X86::UCOMISDrr] = translate_UCOMISDrr; - m[X86::UCOMISDrm] = translate_UCOMISDrm; - - m[X86::PSRAWrr] = translate_PSRAWrr; - m[X86::PSRAWrm] = translate_PSRAWrm; - m[X86::PSRAWri] = translate_PSRAWri; - m[X86::PSRADrr] = translate_PSRADrr; - m[X86::PSRADrm] = translate_PSRADrm; - m[X86::PSRADri] = translate_PSRADri; - - m[X86::PSLLWrr] = translate_PSLLWrr; - m[X86::PSLLWrm] = translate_PSLLWrm; - m[X86::PSLLWri] = translate_PSLLWri; - - m[X86::PSLLDrr] = translate_PSLLDrr; - m[X86::PSLLDrm] = translate_PSLLDrm; - m[X86::PSLLDri] = translate_PSLLDri; - - m[X86::PSLLQrr] = translate_PSLLQrr; - m[X86::PSLLQrm] = translate_PSLLQrm; - m[X86::PSLLQri] = translate_PSLLQri; - - m[X86::PSLLDQri] = translate_PSLLDQri; - - m[X86::PSRLWrr] = translate_PSRLWrr; - m[X86::PSRLWrm] = translate_PSRLWrm; - m[X86::PSRLWri] = translate_PSRLWri; - - m[X86::PSRLDrr] = translate_PSRLDrr; - m[X86::PSRLDrm] = translate_PSRLDrm; - m[X86::PSRLDri] = translate_PSRLDri; - - m[X86::PSRLQrr] = translate_PSRLQrr; - m[X86::PSRLQrm] = translate_PSRLQrm; - m[X86::PSRLQri] = translate_PSRLQri; - - m[X86::PSHUFDri] = translate_PSHUFDri; - m[X86::PSHUFDmi] = translate_PSHUFDmi; - - m[X86::PSHUFBrr] = translate_PSHUFBrr; - m[X86::PSHUFBrm] = translate_PSHUFBrm; - - m[X86::PINSRWrri] = translate_PINSRWrri; - m[X86::PINSRWrmi] = translate_PINSRWrmi; - - m[X86::PEXTRWri] = translate_PEXTRWri; - m[X86::PEXTRWmr] = translate_PEXTRWmr; - - m[X86::PUNPCKLBWrr] = translate_PUNPCKLBWrr; - m[X86::PUNPCKLBWrm] = translate_PUNPCKLBWrm; - m[X86::PUNPCKLWDrr] = translate_PUNPCKLWDrr; - m[X86::PUNPCKLWDrm] = translate_PUNPCKLWDrm; - m[X86::PUNPCKLDQrr] = translate_PUNPCKLDQrr; - m[X86::PUNPCKLDQrm] = translate_PUNPCKLDQrm; - m[X86::PUNPCKLQDQrr] = translate_PUNPCKLQDQrr; - m[X86::PUNPCKLQDQrm] = translate_PUNPCKLQDQrm; - - m[X86::PUNPCKHBWrr] = translate_PUNPCKHBWrr; - m[X86::PUNPCKHBWrm] = translate_PUNPCKHBWrm; - m[X86::PUNPCKHWDrr] = translate_PUNPCKHWDrr; - m[X86::PUNPCKHWDrm] = translate_PUNPCKHWDrm; - m[X86::PUNPCKHDQrr] = translate_PUNPCKHDQrr; - m[X86::PUNPCKHDQrm] = translate_PUNPCKHDQrm; - m[X86::PUNPCKHQDQrr] = translate_PUNPCKHQDQrr; - m[X86::PUNPCKHQDQrm] = translate_PUNPCKHQDQrm; - - m[X86::PADDBrr] = translate_PADDBrr; - m[X86::PADDBrm] = translate_PADDBrm; - m[X86::PADDWrr] = translate_PADDWrr; - m[X86::PADDWrm] = translate_PADDWrm; - m[X86::PADDDrr] = translate_PADDDrr; - m[X86::PADDDrm] = translate_PADDDrm; - m[X86::PADDQrr] = translate_PADDQrr; - m[X86::PADDQrm] = translate_PADDQrm; - - m[X86::PSUBUSBrr] = translate_PSUBUSBrr; - m[X86::PSUBUSBrm] = translate_PSUBUSBrm; - - m[X86::PSUBUSWrr] = translate_PSUBUSWrr; - m[X86::PSUBUSWrm] = translate_PSUBUSWrm; - - m[X86::PSUBBrr] = translate_PSUBBrr; - m[X86::PSUBBrm] = translate_PSUBBrm; - m[X86::PSUBWrr] = translate_PSUBWrr; - m[X86::PSUBWrm] = translate_PSUBWrm; - m[X86::PSUBDrr] = translate_PSUBDrr; - m[X86::PSUBDrm] = translate_PSUBDrm; - m[X86::PSUBQrr] = translate_PSUBQrr; - m[X86::PSUBQrm] = translate_PSUBQrm; - - m[X86::MAXPSrr] = translate_MAXPSrr; - m[X86::MAXPSrm] = translate_MAXPSrm; - m[X86::MAXPDrr] = translate_MAXPDrr; - m[X86::MAXPDrm] = translate_MAXPDrm; - m[X86::MAXSSrr] = translate_MAXSSrr; - m[X86::MAXSSrm] = translate_MAXSSrm; - m[X86::MAXSDrr] = translate_MAXSDrr; - m[X86::MAXSDrm] = translate_MAXSDrm; - - m[X86::MINPSrr] = translate_MINPSrr; - m[X86::MINPSrm] = translate_MINPSrm; - m[X86::MINPDrr] = translate_MINPDrr; - m[X86::MINPDrm] = translate_MINPDrm; - m[X86::MINSSrr] = translate_MINSSrr; - m[X86::MINSSrm] = translate_MINSSrm; - m[X86::MINSDrr] = translate_MINSDrr; - m[X86::MINSDrm] = translate_MINSDrm; - - // all the same AND op - m[X86::PANDrr] = translate_PANDrr; - m[X86::PANDrm] = translate_PANDrm; - m[X86::ANDPDrr] = translate_PANDrr; - m[X86::ANDPDrm] = translate_PANDrm; - m[X86::ANDPSrr] = translate_PANDrr; - m[X86::ANDPSrm] = translate_PANDrm; - - // all the same NAND op - m[X86::PANDNrr] = translate_PANDNrr; - m[X86::PANDNrm] = translate_PANDNrm; - m[X86::ANDNPDrr] = translate_PANDNrr; - m[X86::ANDNPDrm] = translate_PANDNrm; - m[X86::ANDNPSrr] = translate_PANDNrr; - m[X86::ANDNPSrm] = translate_PANDNrm; - - // compares - m[X86::PCMPGTBrr] = translate_PCMPGTBrr; - m[X86::PCMPGTBrm] = translate_PCMPGTBrm; - m[X86::PCMPGTWrr] = translate_PCMPGTWrr; - m[X86::PCMPGTWrm] = translate_PCMPGTWrm; - m[X86::PCMPGTDrr] = translate_PCMPGTDrr; - m[X86::PCMPGTDrm] = translate_PCMPGTDrm; - m[X86::PCMPGTQrr] = translate_PCMPGTQrr; - m[X86::PCMPGTQrm] = translate_PCMPGTQrm; - - m[X86::PCMPEQBrr] = translate_PCMPEQBrr; - m[X86::PCMPEQBrm] = translate_PCMPEQBrm; - m[X86::PCMPEQWrr] = translate_PCMPEQWrr; - m[X86::PCMPEQWrm] = translate_PCMPEQWrm; - m[X86::PCMPEQDrr] = translate_PCMPEQDrr; - m[X86::PCMPEQDrm] = translate_PCMPEQDrm; - m[X86::PCMPEQQrr] = translate_PCMPEQQrr; - m[X86::PCMPEQQrm] = translate_PCMPEQQrm; - - m[X86::PMOVSXBWrr] = translate_PMOVSXBWrr; - m[X86::PMOVSXBWrm] = translate_PMOVSXBWrm; - m[X86::PMOVSXBDrr] = translate_PMOVSXBDrr; - m[X86::PMOVSXBDrm] = translate_PMOVSXBDrm; - m[X86::PMOVSXBQrr] = translate_PMOVSXBQrr; - m[X86::PMOVSXBQrm] = translate_PMOVSXBQrm; - m[X86::PMOVSXWDrr] = translate_PMOVSXWDrr; - m[X86::PMOVSXWDrm] = translate_PMOVSXWDrm; - m[X86::PMOVSXWQrr] = translate_PMOVSXWQrr; - m[X86::PMOVSXWQrm] = translate_PMOVSXWQrm; - m[X86::PMOVSXDQrr] = translate_PMOVSXDQrr; - m[X86::PMOVSXDQrm] = translate_PMOVSXDQrm; - - m[X86::PMOVZXBWrr] = translate_PMOVZXBWrr; - m[X86::PMOVZXBWrm] = translate_PMOVZXBWrm; - m[X86::PMOVZXBDrr] = translate_PMOVZXBDrr; - m[X86::PMOVZXBDrm] = translate_PMOVZXBDrm; - m[X86::PMOVZXBQrr] = translate_PMOVZXBQrr; - m[X86::PMOVZXBQrm] = translate_PMOVZXBQrm; - m[X86::PMOVZXWDrr] = translate_PMOVZXWDrr; - m[X86::PMOVZXWDrm] = translate_PMOVZXWDrm; - m[X86::PMOVZXWQrr] = translate_PMOVZXWQrr; - m[X86::PMOVZXWQrm] = translate_PMOVZXWQrm; - m[X86::PMOVZXDQrr] = translate_PMOVZXDQrr; - m[X86::PMOVZXDQrm] = translate_PMOVZXDQrm; - - m[X86::PBLENDVBrr0] = translate_PBLENDVBrr0; - m[X86::PBLENDVBrm0] = translate_PBLENDVBrm0; - - m[X86::MOVHLPSrr] = translate_MOVHLPSrr; - m[X86::MOVLHPSrr] = translate_MOVLHPSrr; - - m[X86::PMULUDQrr] = translate_PMULUDQrr; - m[X86::PMULUDQrm] = translate_PMULUDQrm; - - m[X86::CVTTPS2DQrr] = translate_CVTTPS2DQrr; - m[X86::CVTTPS2DQrm] = translate_CVTTPS2DQrm; - - m[X86::MOVHPDrm] = translate_MOVHPDrm; - m[X86::MOVHPDmr] = translate_MOVHPDmr; - - m[X86::MOVLPDrm] = translate_MOVLPDrm; - m[X86::MOVLPDmr] = (doMOVSmr<64>); - - // we don't care if its moving two single precision floats - // or a double precision float. 64 bits are 64 bits - m[X86::MOVLPSrm] = translate_MOVLPDrm; - m[X86::MOVLPSmr] = (doMOVSmr<64>); - - m[X86::SHUFPSrri] = translate_SHUFPSrri; - m[X86::SHUFPSrmi] = translate_SHUFPSrmi; - m[X86::SHUFPDrri] = translate_SHUFPDrri; - m[X86::SHUFPDrmi] = translate_SHUFPDrmi; - - m[X86::PSHUFHWri] = translate_PSHUFHWri; - m[X86::PSHUFHWmi] = translate_PSHUFHWmi; - m[X86::PSHUFLWri] = translate_PSHUFLWri; - m[X86::PSHUFLWmi] = translate_PSHUFLWmi; - - m[X86::UNPCKLPSrm] = translate_UNPCKLPSrm; - m[X86::UNPCKLPSrr] = translate_UNPCKLPSrr; - m[X86::UNPCKLPDrm] = translate_UNPCKLPDrm; - m[X86::UNPCKLPDrr] = translate_UNPCKLPDrr; - - m[X86::UNPCKHPDrr] = translate_UNPCKHPDrr; - - m[X86::CVTPS2PDrm] = translate_CVTPS2PDrm; - m[X86::CVTPS2PDrr] = translate_CVTPS2PDrr; - - m[X86::CVTDQ2PSrr] = translate_CVTDQ2PSrr; - - m[X86::CVTPD2PSrm] = translate_CVTPD2PSrm; - m[X86::CVTPD2PSrr] = translate_CVTPD2PSrr; - - m[X86::MOV64toPQIrr] = translate_MOV64toPQIrr; - m[X86::MOVPQIto64rr] = (doMOVSrr<64, 0, 1>); - m[X86::MOV64toSDrm] = translate_MOV64toSDrm; - m[X86::MOVQI2PQIrm] = translate_MOVQI2PQIrm; - m[X86::MOVPQI2QImr] = (doMOVSmr<64>); - - m[X86::MOVDDUPrr] = translate_MOVDDUPrr; - - m[X86::SUBPDrr] = translate_SUBPDrr; - m[X86::SUBPDrm] = translate_SUBPDrm; - - m[X86::SUBPSrr] = translate_SUBPSrr; - m[X86::SUBPSrm] = translate_SUBPSrm; - - m[X86::ADDPDrr] = translate_ADDPDrr; - m[X86::ADDPDrm] = translate_ADDPDrm; - - m[X86::ADDPSrr] = translate_ADDPSrr; - m[X86::ADDPSrm] = translate_ADDPSrm; - - m[X86::MULPDrr] = translate_MULPDrr; - m[X86::MULPDrm] = translate_MULPDrm; - - m[X86::MULPSrr] = translate_MULPSrr; - m[X86::MULPSrm] = translate_MULPSrm; - - m[X86::DIVPSrr] = translate_DIVPSrr; - m[X86::DIVPSrm] = translate_DIVPSrm; - - m[X86::DIVPDrr] = translate_DIVPDrr; - m[X86::DIVPDrm] = translate_DIVPDrm; + m[X86::MOVSDrm] = doMOVSrm<64>; + m[X86::MOVSDmr] = doMOVSmr<64>; + + m[X86::CVTSI2SDrr] = translate_CVTSI2SDrr<32>; + m[X86::CVTSI2SDrm] = translate_CVTSI2SDrm<32>; + m[X86::CVTSI2SD64rr] = translate_CVTSI2SDrr<64>; + m[X86::CVTSI2SD64rm] = translate_CVTSI2SDrm<64>; + + m[X86::CVTSD2SSrm] = translate_CVTSD2SSrm; + m[X86::CVTSD2SSrr] = translate_CVTSD2SSrr; + m[X86::CVTSS2SDrm] = translate_CVTSS2SDrm; + m[X86::CVTSS2SDrr] = translate_CVTSS2SDrr; + m[X86::MOVSSrm] = (doMOVSrm<32> ); + m[X86::MOVSSmr] = (doMOVSmr<32> ); + m[X86::XORPSrr] = translate_XORPSrr; + m[X86::XORPSrm] = translate_XORPSrm; + // XORPD = XORPS = PXOR, for the purposes of translation + // it just operates on different bitwidth and changes internal register type + // which is not exposed to outside world but affects performance + m[X86::XORPDrr] = translate_XORPSrr; + m[X86::XORPDrm] = translate_XORPSrm; + m[X86::PXORrr] = translate_XORPSrr; + m[X86::PXORrm] = translate_XORPSrm; + + // these should be identical + m[X86::ORPDrr] = translate_PORrr; + m[X86::ORPDrm] = translate_PORrm; + m[X86::ORPSrr] = translate_PORrr; + m[X86::ORPSrm] = translate_PORrm; + + m[X86::CVTSI2SSrr] = translate_CVTSI2SSrr; + m[X86::CVTSI2SSrm] = translate_CVTSI2SSrm; + + m[X86::CVTSI2SS64rr] = translate_CVTSI2SS64rr; + m[X86::CVTSI2SS64rm] = translate_CVTSI2SS64rm; + + m[X86::CVTTSD2SIrm] = doCVTT_to_SI_rm<64, 32>; + m[X86::CVTTSD2SIrr] = doCVTT_to_SI_rr<64, 32>; + m[X86::CVTTSS2SIrm] = doCVTT_to_SI_rm<32, 32>; + m[X86::CVTTSS2SIrr] = doCVTT_to_SI_rr<32, 32>; + + m[X86::CVTTSD2SI64rm] = doCVTT_to_SI_rm<64, 64>; + m[X86::CVTTSD2SI64rr] = doCVTT_to_SI_rr<64, 64>; + m[X86::CVTTSS2SI64rm] = doCVTT_to_SI_rm<32, 64>; + m[X86::CVTTSS2SI64rr] = doCVTT_to_SI_rr<32, 64>; + + m[X86::ADDSDrr] = translate_ADDSDrr; + m[X86::ADDSDrm] = translate_ADDSDrm; + m[X86::ADDSSrr] = translate_ADDSSrr; + m[X86::ADDSSrm] = translate_ADDSSrm; + m[X86::SUBSDrr] = translate_SUBSDrr; + m[X86::SUBSDrm] = translate_SUBSDrm; + m[X86::SUBSSrr] = translate_SUBSSrr; + m[X86::SUBSSrm] = translate_SUBSSrm; + m[X86::DIVSDrr] = translate_DIVSDrr; + m[X86::DIVSDrm] = translate_DIVSDrm; + m[X86::DIVSSrr] = translate_DIVSSrr; + m[X86::DIVSSrm] = translate_DIVSSrm; + m[X86::MULSDrr] = translate_MULSDrr; + m[X86::MULSDrm] = translate_MULSDrm; + m[X86::MULSSrr] = translate_MULSSrr; + m[X86::MULSSrm] = translate_MULSSrm; + m[X86::PORrr] = translate_PORrr; + m[X86::PORrm] = translate_PORrm; + + m[X86::MOVDQUrm] = doMOVSrm<128>; + m[X86::MOVDQUmr] = doMOVSmr<128>; + m[X86::MOVDQUrr] = doMOVSrr<128, 0, 1>; + m[X86::MOVDQUrr_REV] = doMOVSrr<128, 0, 1>; + + m[X86::MOVDQArm] = doMOVSrm<128>; + m[X86::MOVDQAmr] = doMOVSmr<128>; + m[X86::MOVDQArr] = doMOVSrr<128, 0, 1>; + m[X86::MOVDQArr_REV] = doMOVSrr<128, 0, 1>; + + m[X86::MOVUPDrm] = doMOVSrm<128>; + m[X86::MOVUPDmr] = doMOVSmr<128>; + + m[X86::MOVUPSrm] = doMOVSrm<128>; + m[X86::MOVUPSmr] = doMOVSmr<128>; + m[X86::MOVUPSrr] = doMOVSrr<128, 0, 1>; + m[X86::MOVUPSrr_REV] = doMOVSrr<128, 0, 1>; + + m[X86::MOVAPSrm] = doMOVSrm<128>; + m[X86::MOVAPSmr] = doMOVSmr<128>; + m[X86::MOVAPSrr] = doMOVSrr<128, 0, 1>; + m[X86::MOVAPSrr_REV] = doMOVSrr<128, 0, 1>; + + m[X86::MOVAPDrm] = doMOVSrm<128>; + m[X86::MOVAPDmr] = doMOVSmr<128>; + m[X86::MOVAPDrr] = doMOVSrr<128, 0, 1>; + m[X86::MOVAPDrr_REV] = doMOVSrr<128, 0, 1>; + + m[X86::MOVSDrr] = doMOVSrr<64, 1, 2>; + m[X86::MOVSSrr] = doMOVSrr<32, 1, 2>; + + m[X86::MOVDI2PDIrr] = translate_MOVDI2PDIrr; + m[X86::MOVDI2PDIrm] = translate_MOVDI2PDIrm; + + m[X86::MOVPDI2DIrr] = doMOVSrr<32, 0, 1>; + m[X86::MOVPDI2DImr] = doMOVSmr<32>; + + m[X86::MOVSS2DIrr] = translate_MOVSS2DIrr; + m[X86::MOVSS2DImr] = doMOVSmr<32>; + + m[X86::UCOMISSrr] = translate_UCOMISSrr; + m[X86::UCOMISSrm] = translate_UCOMISSrm; + m[X86::UCOMISDrr] = translate_UCOMISDrr; + m[X86::UCOMISDrm] = translate_UCOMISDrm; + + m[X86::PSRAWrr] = translate_PSRAWrr; + m[X86::PSRAWrm] = translate_PSRAWrm; + m[X86::PSRAWri] = translate_PSRAWri; + m[X86::PSRADrr] = translate_PSRADrr; + m[X86::PSRADrm] = translate_PSRADrm; + m[X86::PSRADri] = translate_PSRADri; + + m[X86::PSLLWrr] = translate_PSLLWrr; + m[X86::PSLLWrm] = translate_PSLLWrm; + m[X86::PSLLWri] = translate_PSLLWri; + + m[X86::PSLLDrr] = translate_PSLLDrr; + m[X86::PSLLDrm] = translate_PSLLDrm; + m[X86::PSLLDri] = translate_PSLLDri; + + m[X86::PSLLQrr] = translate_PSLLQrr; + m[X86::PSLLQrm] = translate_PSLLQrm; + m[X86::PSLLQri] = translate_PSLLQri; + + m[X86::PSLLDQri] = translate_PSLLDQri; + + m[X86::PSRLWrr] = translate_PSRLWrr; + m[X86::PSRLWrm] = translate_PSRLWrm; + m[X86::PSRLWri] = translate_PSRLWri; + + m[X86::PSRLDrr] = translate_PSRLDrr; + m[X86::PSRLDrm] = translate_PSRLDrm; + m[X86::PSRLDri] = translate_PSRLDri; + + m[X86::PSRLQrr] = translate_PSRLQrr; + m[X86::PSRLQrm] = translate_PSRLQrm; + m[X86::PSRLQri] = translate_PSRLQri; + + m[X86::PSHUFDri] = translate_PSHUFDri; + m[X86::PSHUFDmi] = translate_PSHUFDmi; + + m[X86::PSHUFBrr] = translate_PSHUFBrr; + m[X86::PSHUFBrm] = translate_PSHUFBrm; + + m[X86::PINSRWrri] = translate_PINSRWrri; + m[X86::PINSRWrmi] = translate_PINSRWrmi; + + m[X86::PEXTRWri] = translate_PEXTRWri; + m[X86::PEXTRWmr] = translate_PEXTRWmr; + + m[X86::PUNPCKLBWrr] = translate_PUNPCKLBWrr; + m[X86::PUNPCKLBWrm] = translate_PUNPCKLBWrm; + m[X86::PUNPCKLWDrr] = translate_PUNPCKLWDrr; + m[X86::PUNPCKLWDrm] = translate_PUNPCKLWDrm; + m[X86::PUNPCKLDQrr] = translate_PUNPCKLDQrr; + m[X86::PUNPCKLDQrm] = translate_PUNPCKLDQrm; + m[X86::PUNPCKLQDQrr] = translate_PUNPCKLQDQrr; + m[X86::PUNPCKLQDQrm] = translate_PUNPCKLQDQrm; + + m[X86::PUNPCKHBWrr] = translate_PUNPCKHBWrr; + m[X86::PUNPCKHBWrm] = translate_PUNPCKHBWrm; + m[X86::PUNPCKHWDrr] = translate_PUNPCKHWDrr; + m[X86::PUNPCKHWDrm] = translate_PUNPCKHWDrm; + m[X86::PUNPCKHDQrr] = translate_PUNPCKHDQrr; + m[X86::PUNPCKHDQrm] = translate_PUNPCKHDQrm; + m[X86::PUNPCKHQDQrr] = translate_PUNPCKHQDQrr; + m[X86::PUNPCKHQDQrm] = translate_PUNPCKHQDQrm; + + m[X86::PADDBrr] = translate_PADDBrr; + m[X86::PADDBrm] = translate_PADDBrm; + m[X86::PADDWrr] = translate_PADDWrr; + m[X86::PADDWrm] = translate_PADDWrm; + m[X86::PADDDrr] = translate_PADDDrr; + m[X86::PADDDrm] = translate_PADDDrm; + m[X86::PADDQrr] = translate_PADDQrr; + m[X86::PADDQrm] = translate_PADDQrm; + + m[X86::PSUBUSBrr] = translate_PSUBUSBrr; + m[X86::PSUBUSBrm] = translate_PSUBUSBrm; + + m[X86::PSUBUSWrr] = translate_PSUBUSWrr; + m[X86::PSUBUSWrm] = translate_PSUBUSWrm; + + m[X86::PSUBBrr] = translate_PSUBBrr; + m[X86::PSUBBrm] = translate_PSUBBrm; + m[X86::PSUBWrr] = translate_PSUBWrr; + m[X86::PSUBWrm] = translate_PSUBWrm; + m[X86::PSUBDrr] = translate_PSUBDrr; + m[X86::PSUBDrm] = translate_PSUBDrm; + m[X86::PSUBQrr] = translate_PSUBQrr; + m[X86::PSUBQrm] = translate_PSUBQrm; + + m[X86::MAXPSrr] = translate_MAXPSrr; + m[X86::MAXPSrm] = translate_MAXPSrm; + m[X86::MAXPDrr] = translate_MAXPDrr; + m[X86::MAXPDrm] = translate_MAXPDrm; + m[X86::MAXSSrr] = translate_MAXSSrr; + m[X86::MAXSSrm] = translate_MAXSSrm; + m[X86::MAXSDrr] = translate_MAXSDrr; + m[X86::MAXSDrm] = translate_MAXSDrm; + + m[X86::MINPSrr] = translate_MINPSrr; + m[X86::MINPSrm] = translate_MINPSrm; + m[X86::MINPDrr] = translate_MINPDrr; + m[X86::MINPDrm] = translate_MINPDrm; + m[X86::MINSSrr] = translate_MINSSrr; + m[X86::MINSSrm] = translate_MINSSrm; + m[X86::MINSDrr] = translate_MINSDrr; + m[X86::MINSDrm] = translate_MINSDrm; + + // all the same AND op + m[X86::PANDrr] = translate_PANDrr; + m[X86::PANDrm] = translate_PANDrm; + m[X86::ANDPDrr] = translate_PANDrr; + m[X86::ANDPDrm] = translate_PANDrm; + m[X86::ANDPSrr] = translate_PANDrr; + m[X86::ANDPSrm] = translate_PANDrm; + + // all the same NAND op + m[X86::PANDNrr] = translate_PANDNrr; + m[X86::PANDNrm] = translate_PANDNrm; + m[X86::ANDNPDrr] = translate_PANDNrr; + m[X86::ANDNPDrm] = translate_PANDNrm; + m[X86::ANDNPSrr] = translate_PANDNrr; + m[X86::ANDNPSrm] = translate_PANDNrm; + + // compares + m[X86::PCMPGTBrr] = translate_PCMPGTBrr; + m[X86::PCMPGTBrm] = translate_PCMPGTBrm; + m[X86::PCMPGTWrr] = translate_PCMPGTWrr; + m[X86::PCMPGTWrm] = translate_PCMPGTWrm; + m[X86::PCMPGTDrr] = translate_PCMPGTDrr; + m[X86::PCMPGTDrm] = translate_PCMPGTDrm; + m[X86::PCMPGTQrr] = translate_PCMPGTQrr; + m[X86::PCMPGTQrm] = translate_PCMPGTQrm; + + m[X86::PCMPEQBrr] = translate_PCMPEQBrr; + m[X86::PCMPEQBrm] = translate_PCMPEQBrm; + m[X86::PCMPEQWrr] = translate_PCMPEQWrr; + m[X86::PCMPEQWrm] = translate_PCMPEQWrm; + m[X86::PCMPEQDrr] = translate_PCMPEQDrr; + m[X86::PCMPEQDrm] = translate_PCMPEQDrm; + m[X86::PCMPEQQrr] = translate_PCMPEQQrr; + m[X86::PCMPEQQrm] = translate_PCMPEQQrm; + + m[X86::PMOVSXBWrr] = translate_PMOVSXBWrr; + m[X86::PMOVSXBWrm] = translate_PMOVSXBWrm; + m[X86::PMOVSXBDrr] = translate_PMOVSXBDrr; + m[X86::PMOVSXBDrm] = translate_PMOVSXBDrm; + m[X86::PMOVSXBQrr] = translate_PMOVSXBQrr; + m[X86::PMOVSXBQrm] = translate_PMOVSXBQrm; + m[X86::PMOVSXWDrr] = translate_PMOVSXWDrr; + m[X86::PMOVSXWDrm] = translate_PMOVSXWDrm; + m[X86::PMOVSXWQrr] = translate_PMOVSXWQrr; + m[X86::PMOVSXWQrm] = translate_PMOVSXWQrm; + m[X86::PMOVSXDQrr] = translate_PMOVSXDQrr; + m[X86::PMOVSXDQrm] = translate_PMOVSXDQrm; + + m[X86::PMOVZXBWrr] = translate_PMOVZXBWrr; + m[X86::PMOVZXBWrm] = translate_PMOVZXBWrm; + m[X86::PMOVZXBDrr] = translate_PMOVZXBDrr; + m[X86::PMOVZXBDrm] = translate_PMOVZXBDrm; + m[X86::PMOVZXBQrr] = translate_PMOVZXBQrr; + m[X86::PMOVZXBQrm] = translate_PMOVZXBQrm; + m[X86::PMOVZXWDrr] = translate_PMOVZXWDrr; + m[X86::PMOVZXWDrm] = translate_PMOVZXWDrm; + m[X86::PMOVZXWQrr] = translate_PMOVZXWQrr; + m[X86::PMOVZXWQrm] = translate_PMOVZXWQrm; + m[X86::PMOVZXDQrr] = translate_PMOVZXDQrr; + m[X86::PMOVZXDQrm] = translate_PMOVZXDQrm; + + m[X86::PBLENDVBrr0] = translate_PBLENDVBrr0; + m[X86::PBLENDVBrm0] = translate_PBLENDVBrm0; + + m[X86::MOVHLPSrr] = translate_MOVHLPSrr; + m[X86::MOVLHPSrr] = translate_MOVLHPSrr; + + m[X86::PMULUDQrr] = translate_PMULUDQrr; + m[X86::PMULUDQrm] = translate_PMULUDQrm; + + m[X86::CVTTPS2DQrr] = translate_CVTTPS2DQrr; + m[X86::CVTTPS2DQrm] = translate_CVTTPS2DQrm; + + m[X86::MOVHPDrm] = translate_MOVHPDrm; + m[X86::MOVHPDmr] = translate_MOVHPDmr; + + m[X86::MOVLPDrm] = translate_MOVLPDrm; + m[X86::MOVLPDmr] = doMOVSmr<64>; + + // we don't care if its moving two single precision floats + // or a double precision float. 64 bits are 64 bits + m[X86::MOVLPSrm] = translate_MOVLPDrm; + m[X86::MOVLPSmr] = doMOVSmr<64>; + + m[X86::SHUFPSrri] = translate_SHUFPSrri; + m[X86::SHUFPSrmi] = translate_SHUFPSrmi; + m[X86::SHUFPDrri] = translate_SHUFPDrri; + m[X86::SHUFPDrmi] = translate_SHUFPDrmi; + + m[X86::PSHUFHWri] = translate_PSHUFHWri; + m[X86::PSHUFHWmi] = translate_PSHUFHWmi; + m[X86::PSHUFLWri] = translate_PSHUFLWri; + m[X86::PSHUFLWmi] = translate_PSHUFLWmi; + + m[X86::UNPCKLPSrm] = translate_UNPCKLPSrm; + m[X86::UNPCKLPSrr] = translate_UNPCKLPSrr; + m[X86::UNPCKLPDrm] = translate_UNPCKLPDrm; + m[X86::UNPCKLPDrr] = translate_UNPCKLPDrr; + + m[X86::UNPCKHPDrr] = translate_UNPCKHPDrr; + + m[X86::CVTPS2PDrm] = translate_CVTPS2PDrm; + m[X86::CVTPS2PDrr] = translate_CVTPS2PDrr; + + m[X86::CVTDQ2PSrr] = translate_CVTDQ2PSrr; + + m[X86::CVTPD2PSrm] = translate_CVTPD2PSrm; + m[X86::CVTPD2PSrr] = translate_CVTPD2PSrr; + + m[X86::MOV64toPQIrr] = translate_MOV64toPQIrr; + m[X86::MOVPQIto64rr] = doMOVSrr<64, 0, 1>; + m[X86::MOV64toSDrm] = translate_MOV64toSDrm; + m[X86::MOVQI2PQIrm] = translate_MOVQI2PQIrm; + m[X86::MOVPQI2QImr] = doMOVSmr<64>; + + m[X86::MOVDDUPrr] = translate_MOVDDUPrr; + + m[X86::SUBPDrr] = translate_SUBPDrr; + m[X86::SUBPDrm] = translate_SUBPDrm; + + m[X86::SUBPSrr] = translate_SUBPSrr; + m[X86::SUBPSrm] = translate_SUBPSrm; + + m[X86::ADDPDrr] = translate_ADDPDrr; + m[X86::ADDPDrm] = translate_ADDPDrm; + + m[X86::ADDPSrr] = translate_ADDPSrr; + m[X86::ADDPSrm] = translate_ADDPSrm; + + m[X86::MULPDrr] = translate_MULPDrr; + m[X86::MULPDrm] = translate_MULPDrm; + + m[X86::MULPSrr] = translate_MULPSrr; + m[X86::MULPSrm] = translate_MULPSrm; + + m[X86::DIVPSrr] = translate_DIVPSrr; + m[X86::DIVPSrm] = translate_DIVPSrm; + + m[X86::DIVPDrr] = translate_DIVPDrr; + m[X86::DIVPDrm] = translate_DIVPDrm; + + m[X86::MMX_PORirr] = translate_MMX_PORirr; + m[X86::MMX_PORirm] = translate_MMX_PORirm; } diff --git a/mc-sema/cfgToLLVM/x86Instrs_SUB.cpp b/mc-sema/cfgToLLVM/x86Instrs_SUB.cpp index 28c5d37d1..530a31e50 100644 --- a/mc-sema/cfgToLLVM/x86Instrs_SUB.cpp +++ b/mc-sema/cfgToLLVM/x86Instrs_SUB.cpp @@ -1,31 +1,31 @@ /* -Copyright (c) 2014, Trail of Bits -All rights reserved. + Copyright (c) 2014, Trail of Bits + All rights reserved. -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: + Redistribution and use in source and binary forms, with or without modification, + are permitted provided that the following conditions are met: - Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. + Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. - Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. + Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or + other materials provided with the distribution. - Neither the name of Trail of Bits nor the names of its - contributors may be used to endorse or promote products derived from - this software without specific prior written permission. + Neither the name of Trail of Bits nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ #include "InstructionDispatch.h" #include "toLLVM.h" #include "X86.h" @@ -35,586 +35,491 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #include "x86Instrs_SUB.h" #include "llvm/Support/Debug.h" -using namespace llvm; - - #define NASSERT(cond) TASSERT(cond, "") -template -static Value * doSubVV(InstPtr ip, BasicBlock *&b, Value *lhs, Value *rhs) -{ - Value *subRes = BinaryOperator::CreateSub(lhs, rhs, "", b); +template +static llvm::Value *doSubVV(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *lhs, llvm::Value *rhs) { + auto subRes = llvm::BinaryOperator::CreateSub(lhs, rhs, "", b); - // Write the flag updates. - WriteAFAddSub(b, subRes, lhs, rhs); - WritePF(b, subRes); - WriteZF(b, subRes); - WriteSF(b, subRes); - WriteCFSub(b, lhs, rhs); - WriteOFSub(b, subRes, lhs, rhs); + // Write the flag updates. + WriteAFAddSub(b, subRes, lhs, rhs); + WritePF(b, subRes); + WriteZF(b, subRes); + WriteSF(b, subRes); + WriteCFSub(b, lhs, rhs); + WriteOFSub(b, subRes, lhs, rhs); - return subRes; + return subRes; } -template -static InstTransResult doSubMI(InstPtr ip, BasicBlock *&b, - Value *addr, - const MCOperand &imm) -{ - NASSERT(addr != NULL); - NASSERT(imm.isImm()); +template +static InstTransResult doSubMI(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *addr, const llvm::MCOperand &imm) { + NASSERT(addr != NULL); + NASSERT(imm.isImm()); - Value *mem_v = M_READ(ip, b, addr); - Value *c = CONST_V(b, imm.getImm()); - - Value *res = doSubVV(ip, b, mem_v, c); - - M_WRITE(ip, b, addr, res); - - return ContinueBlock; + auto mem_v = M_READ(ip, b, addr); + auto c = CONST_V(b, imm.getImm()); + auto res = doSubVV(ip, b, mem_v, c); + M_WRITE(ip, b, addr, res); + return ContinueBlock; } -template -static InstTransResult doSubMV(InstPtr ip, - BasicBlock *&b, - Value *lhs, - Value *rhs) -{ - NASSERT(lhs != NULL); - NASSERT(rhs != NULL); +template +static InstTransResult doSubMV(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *lhs, llvm::Value *rhs) { + NASSERT(lhs != NULL); + NASSERT(rhs != NULL); - Value *mem_v = M_READ(ip, b, lhs); - - Value *res = doSubVV(ip, b, mem_v, rhs); - - M_WRITE(ip, b, lhs, res); - - return ContinueBlock; + auto mem_v = M_READ(ip, b, lhs); + auto res = doSubVV(ip, b, mem_v, rhs); + M_WRITE(ip, b, lhs, res); + return ContinueBlock; } -template -static InstTransResult doSubMR(InstPtr ip, BasicBlock *&b, - Value *addr, - const MCOperand &o1) -{ - NASSERT(addr != NULL); - NASSERT(o1.isReg()); +template +static InstTransResult doSubMR(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *addr, const llvm::MCOperand &o1) { + NASSERT(addr != NULL); + NASSERT(o1.isReg()); - Value *lhs = M_READ(ip, b, addr); - Value *rhs = R_READ(b, o1.getReg()); - - Value *res = doSubVV(ip, b, lhs, rhs); - - M_WRITE(ip, b, addr, res); - - return ContinueBlock; + auto lhs = M_READ(ip, b, addr); + auto rhs = R_READ(b, o1.getReg()); + auto res = doSubVV(ip, b, lhs, rhs); + M_WRITE(ip, b, addr, res); + return ContinueBlock; } -template -static InstTransResult doSubRI(InstPtr ip, BasicBlock *&b, - const MCOperand &dst, - const MCOperand &src1, - const MCOperand &src2) -{ - NASSERT(src1.isReg()); - NASSERT(src2.isImm()); - NASSERT(dst.isReg()); +template +static InstTransResult doSubRI(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + const llvm::MCOperand &src1, + const llvm::MCOperand &src2) { + NASSERT(src1.isReg()); + NASSERT(src2.isImm()); + NASSERT(dst.isReg()); - // Read from src1. - Value *srcReg = R_READ(b, src1.getReg()); - - // Create the constant value. - Value *c = CONST_V(b, src2.getImm()); - - // Do the operation. - Value *subRes = doSubVV(ip, b, srcReg, c); - - // Store the result in dst. - R_WRITE(b, dst.getReg(), subRes); - - return ContinueBlock; + auto srcReg = R_READ(b, src1.getReg()); + auto c = CONST_V(b, src2.getImm()); + auto subRes = doSubVV(ip, b, srcReg, c); + R_WRITE(b, dst.getReg(), subRes); + return ContinueBlock; } -template -static InstTransResult doSubRV(InstPtr ip, BasicBlock *&b, - Value *addr, - const MCOperand &dst, - const MCOperand &src1) -{ - NASSERT(src1.isReg()); - NASSERT(dst.isReg()); - TASSERT(addr != NULL, ""); +template +static InstTransResult doSubRV(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *addr, const llvm::MCOperand &dst, + const llvm::MCOperand &src1) { + NASSERT(src1.isReg()); + NASSERT(dst.isReg()); + TASSERT(addr != NULL, ""); - // Read from src1. - Value *srcReg = R_READ(b, src1.getReg()); - - // Do the operation. - Value *subRes = doSubVV(ip, b, srcReg, addr); - - // Store the result in dst. - R_WRITE(b, dst.getReg(), subRes); - - return ContinueBlock; + auto srcReg = R_READ(b, src1.getReg()); + auto subRes = doSubVV(ip, b, srcReg, addr); + R_WRITE(b, dst.getReg(), subRes); + return ContinueBlock; } -template -static InstTransResult doSubRI(InstPtr ip, BasicBlock *&b, - const MCOperand &dst, - const MCOperand &src1, - const MCOperand &src2) -{ - NASSERT(src1.isReg()); - NASSERT(src2.isImm()); - NASSERT(dst.isReg()); +template +static InstTransResult doSubRI(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + const llvm::MCOperand &src1, + const llvm::MCOperand &src2) { + NASSERT(src1.isReg()); + NASSERT(src2.isImm()); + NASSERT(dst.isReg()); - // Read from src1. - Value *srcReg = R_READ(b, src1.getReg()); - - // Create the constant value. - Value *c = CONST_V(b, src2.getImm()); - - CastInst *cInst = CastInst::CreateIntegerCast(c, srcReg->getType(), true, "", b); - - // Do the operation. - Value *subRes = doSubVV(ip, b, srcReg, cInst); - - // Store the result in dst. - R_WRITE(b, dst.getReg(), subRes); - - return ContinueBlock; + auto srcReg = R_READ(b, src1.getReg()); + auto c = CONST_V(b, src2.getImm()); + auto cInst = llvm::CastInst::CreateIntegerCast(c, srcReg->getType(), true, "", + b); + auto subRes = doSubVV(ip, b, srcReg, cInst); + R_WRITE(b, dst.getReg(), subRes); + return ContinueBlock; } -template -static InstTransResult doSubRM(InstPtr ip, BasicBlock *&b, - Value *addr, - const MCOperand &o1, - const MCOperand &o2) -{ - NASSERT(addr != NULL); - NASSERT(o1.isReg()); - NASSERT(o2.isReg()); +template +static InstTransResult doSubRM(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *addr, const llvm::MCOperand &o1, + const llvm::MCOperand &o2) { + NASSERT(addr != NULL); + NASSERT(o1.isReg()); + NASSERT(o2.isReg()); - Value *lhs = R_READ(b, o1.getReg()); - Value *rhs = M_READ(ip, b, addr); - - Value *res = doSubVV(ip, b, lhs, rhs); - - R_WRITE(b, o2.getReg(), res); - - return ContinueBlock; + auto lhs = R_READ(b, o1.getReg()); + auto rhs = M_READ(ip, b, addr); + auto res = doSubVV(ip, b, lhs, rhs); + R_WRITE(b, o2.getReg(), res); + return ContinueBlock; } -template -static InstTransResult doSubRR(InstPtr ip, BasicBlock *&b, - const MCOperand &dst, - const MCOperand &src1, - const MCOperand &src2) -{ - NASSERT(dst.isReg()); - NASSERT(src1.isReg()); - NASSERT(src2.isReg()); +template +static InstTransResult doSubRR(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &dst, + const llvm::MCOperand &src1, + const llvm::MCOperand &src2) { + NASSERT(dst.isReg()); + NASSERT(src1.isReg()); + NASSERT(src2.isReg()); - Value *r1 = R_READ(b, src1.getReg()); - Value *r2 = R_READ(b, src2.getReg()); - - Value *res = doSubVV(ip, b, r1, r2); - - R_WRITE(b, dst.getReg(), res); - - return ContinueBlock; + auto r1 = R_READ(b, src1.getReg()); + auto r2 = R_READ(b, src2.getReg()); + auto res = doSubVV(ip, b, r1, r2); + R_WRITE(b, dst.getReg(), res); + return ContinueBlock; } -template -static Value * doSbbVV(InstPtr ip, BasicBlock *&b, Value *o1, Value *o2) -{ - NASSERT(o1 != NULL); - NASSERT(o2 != NULL); +template +static Value * doSbbVV(NativeInstPtr ip, llvm::BasicBlock *&b, llvm::Value *o1, + llvm::Value *o2) { + NASSERT(o1 != NULL); + NASSERT(o2 != NULL); - Value *cf = F_READ(b, CF); - Value *cf_ex = new ZExtInst(cf, Type::getIntNTy( - b->getContext(), width), "", b); + auto cf = F_READ(b, CF); + auto cf_ex = new llvm::ZExtInst(cf, + llvm::Type::getIntNTy(b->getContext(), width), + "", b); + auto t0 = llvm::BinaryOperator::CreateAdd(o2, cf_ex, "", b); + auto res = llvm::BinaryOperator::CreateSub(o1, t0, "", b); - Value *t0 = BinaryOperator::CreateAdd(o2, cf_ex, "", b); - - Value *res = BinaryOperator::CreateSub(o1, t0, "", b); - - WriteAFAddSub(b, res, o1, o2); - WritePF(b, res); - WriteZF(b, res); - WriteSF(b, res); - WriteCFSub(b, o1, o2); - WriteOFSub(b, res, o1, t0); - - return res; + WriteAFAddSub(b, res, o1, o2); + WritePF(b, res); + WriteZF(b, res); + WriteSF(b, res); + WriteCFSub(b, o1, o2); + WriteOFSub(b, res, o1, t0); + return res; } -template -static InstTransResult doSbbMI(InstPtr ip, BasicBlock *&b, - Value *addr, - const MCOperand &imm) -{ - NASSERT(addr != NULL); - NASSERT(imm.isImm()); +template +static InstTransResult doSbbMI(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *addr, const llvm::MCOperand &imm) { + NASSERT(addr != NULL); + NASSERT(imm.isImm()); - Value *mem_v = M_READ(ip, b, addr); - Value *c = CONST_V(b, imm.getImm()); - - Value *res = doSbbVV(ip, b, mem_v, c); - - M_WRITE(ip, b, addr, res); - - return ContinueBlock; + auto mem_v = M_READ(ip, b, addr); + auto c = CONST_V(b, imm.getImm()); + auto res = doSbbVV(ip, b, mem_v, c); + M_WRITE(ip, b, addr, res); + return ContinueBlock; } -template -static InstTransResult doSbbMV(InstPtr ip, BasicBlock *&b, - Value *addr, - Value *rhs) -{ - NASSERT(addr != NULL); - NASSERT(rhs != NULL); +template +static InstTransResult doSbbMV(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *addr, llvm::Value *rhs) { + NASSERT(addr != NULL); + NASSERT(rhs != NULL); - Value *mem_v = M_READ(ip, b, addr); - - Value *res = doSbbVV(ip, b, mem_v, rhs); - - M_WRITE(ip, b, addr, res); - - return ContinueBlock; + auto mem_v = M_READ(ip, b, addr); + auto res = doSbbVV(ip, b, mem_v, rhs); + M_WRITE(ip, b, addr, res); + return ContinueBlock; } -template -static InstTransResult doSbbMR(InstPtr ip, BasicBlock *&b, - Value *addr, - const MCOperand &src) -{ - NASSERT(addr != NULL); - NASSERT(src.isReg()); +template +static InstTransResult doSbbMR(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *addr, const llvm::MCOperand &src) { + NASSERT(addr != NULL); + NASSERT(src.isReg()); - Value *mem_v = M_READ(ip, b, addr); - Value *r1 = R_READ(b, src.getReg()); - - Value *res = doSbbVV(ip, b, mem_v, r1); - - M_WRITE(ip, b, addr, res); - WriteOFSub(b, res, mem_v, r1); - - return ContinueBlock; + auto mem_v = M_READ(ip, b, addr); + auto r1 = R_READ(b, src.getReg()); + auto res = doSbbVV(ip, b, mem_v, r1); + M_WRITE(ip, b, addr, res); + WriteOFSub(b, res, mem_v, r1); + return ContinueBlock; } -template -static InstTransResult doSbbRI(InstPtr ip, BasicBlock *&b, - const MCOperand &o1, - const MCOperand &o2, - const MCOperand &dst) -{ - NASSERT(o1.isReg()); - NASSERT(o2.isImm()); - NASSERT(dst.isReg()); +template +static InstTransResult doSbbRI(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &o1, + const llvm::MCOperand &o2, + const llvm::MCOperand &dst) { + NASSERT(o1.isReg()); + NASSERT(o2.isImm()); + NASSERT(dst.isReg()); - Value *r1 = R_READ(b, o1.getReg()); - Value *c = CONST_V(b, o2.getImm()); - - Value *res = doSbbVV(ip, b, r1, c); - - R_WRITE(b, dst.getReg(), res); - - return ContinueBlock; + auto r1 = R_READ(b, o1.getReg()); + auto c = CONST_V(b, o2.getImm()); + auto res = doSbbVV(ip, b, r1, c); + R_WRITE(b, dst.getReg(), res); + return ContinueBlock; } -template -static InstTransResult doSbbRV(InstPtr ip, BasicBlock *&b, - Value *addr, - const MCOperand &dst, - const MCOperand &src1) -{ - NASSERT(src1.isReg()); - NASSERT(dst.isReg()); - TASSERT(addr != NULL, ""); +template +static InstTransResult doSbbRV(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *addr, const llvm::MCOperand &dst, + const llvm::MCOperand &src1) { + NASSERT(src1.isReg()); + NASSERT(dst.isReg()); + TASSERT(addr != NULL, ""); - // Read from src1. - Value *srcReg = R_READ(b, src1.getReg()); - - // Do the operation. - Value *subRes = doSbbVV(ip, b, srcReg, addr); - - // Store the result in dst. - R_WRITE(b, dst.getReg(), subRes); - - return ContinueBlock; + auto srcReg = R_READ(b, src1.getReg()); + auto subRes = doSbbVV(ip, b, srcReg, addr); + R_WRITE(b, dst.getReg(), subRes); + return ContinueBlock; } -template -static InstTransResult doSbbRM(InstPtr ip, BasicBlock *&b, - const MCOperand &o1, - Value *addr, - const MCOperand &dst) -{ - NASSERT(o1.isReg()); - NASSERT(addr != NULL); - NASSERT(dst.isReg()); +template +static InstTransResult doSbbRM(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &o1, llvm::Value *addr, + const llvm::MCOperand &dst) { + NASSERT(o1.isReg()); + NASSERT(addr != NULL); + NASSERT(dst.isReg()); - Value *r1 = R_READ(b, o1.getReg()); - Value *mem_v = M_READ(ip, b, addr); - - Value *res = doSbbVV(ip, b, r1, mem_v); - - R_WRITE(b, dst.getReg(), res); - - return ContinueBlock; + auto r1 = R_READ(b, o1.getReg()); + auto mem_v = M_READ(ip, b, addr); + auto res = doSbbVV(ip, b, r1, mem_v); + R_WRITE(b, dst.getReg(), res); + return ContinueBlock; } -template -static InstTransResult doSbbRR(InstPtr ip, BasicBlock *&b, - const MCOperand &o1, - const MCOperand &o2, - const MCOperand &dst) -{ - NASSERT(o1.isReg()); - NASSERT(o2.isReg()); - NASSERT(dst.isReg()); +template +static InstTransResult doSbbRR(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &o1, + const llvm::MCOperand &o2, + const llvm::MCOperand &dst) { + NASSERT(o1.isReg()); + NASSERT(o2.isReg()); + NASSERT(dst.isReg()); - Value *r1 = R_READ(b, o1.getReg()); - Value *r2 = R_READ(b, o2.getReg()); - - Value *res = doSbbVV(ip, b, r1, r2); - - R_WRITE(b, dst.getReg(), res); - - return ContinueBlock; + auto r1 = R_READ(b, o1.getReg()); + auto r2 = R_READ(b, o2.getReg()); + auto res = doSbbVV(ip, b, r1, r2); + R_WRITE(b, dst.getReg(), res); + return ContinueBlock; } -GENERIC_TRANSLATION(SUB16i16, doSubRI<16>(ip, block, MCOperand::CreateReg(X86::AX), MCOperand::CreateReg(X86::AX), OP(0))) -GENERIC_TRANSLATION_REF(SUB16mi, - doSubMI<16>(ip, block, ADDR_NOREF(0), OP(5)), - doSubMI<16>(ip, block, MEM_REFERENCE(0), OP(5))) -GENERIC_TRANSLATION_REF(SUB16mi8, - doSubMI<16>(ip, block, ADDR_NOREF(0), OP(5)), - doSubMI<16>(ip, block, MEM_REFERENCE(0), OP(5))) -GENERIC_TRANSLATION_REF(SUB16mr, - doSubMR<16>(ip, block, ADDR_NOREF(0), OP(5)), - doSubMR<16>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION( + SUB16i16, + doSubRI<16>(ip, block, llvm::MCOperand::CreateReg(llvm::X86::AX), llvm::MCOperand::CreateReg(llvm::X86::AX), OP(0))) +GENERIC_TRANSLATION_REF(SUB16mi, doSubMI<16>(ip, block, ADDR_NOREF(0), OP(5)), + doSubMI<16>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION_REF(SUB16mi8, doSubMI<16>(ip, block, ADDR_NOREF(0), OP(5)), + doSubMI<16>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION_REF(SUB16mr, doSubMR<16>(ip, block, ADDR_NOREF(0), OP(5)), + doSubMR<16>(ip, block, MEM_REFERENCE(0), OP(5))) GENERIC_TRANSLATION(SUB16ri, doSubRI<16>(ip, block, OP(0), OP(1), OP(2))) GENERIC_TRANSLATION(SUB16ri8, doSubRI<16>(ip, block, OP(0), OP(1), OP(2))) -GENERIC_TRANSLATION_REF(SUB16rm, - doSubRM<16>(ip, block, ADDR_NOREF(2), OP(0), OP(1)), - doSubRM<16>(ip, block, MEM_REFERENCE(2), OP(0), OP(1))) +GENERIC_TRANSLATION_REF(SUB16rm, + doSubRM<16>(ip, block, ADDR_NOREF(2), OP(0), OP(1)), + doSubRM<16>(ip, block, MEM_REFERENCE(2), OP(0), OP(1))) GENERIC_TRANSLATION(SUB16rr, doSubRR<16>(ip, block, OP(1), OP(2), OP(0))) GENERIC_TRANSLATION(SUB16rr_REV, doSubRR<16>(ip, block, OP(1), OP(2), OP(0))) -GENERIC_TRANSLATION_REF(SUB32i32, - doSubRI<32>(ip, block, MCOperand::CreateReg(X86::EAX), MCOperand::CreateReg(X86::EAX), OP(0)), - doSubRV<32>(ip, block, IMM_AS_DATA_REF<32>(block, natM, ip), MCOperand::CreateReg(X86::EAX), MCOperand::CreateReg(X86::EAX))) +GENERIC_TRANSLATION_REF( + SUB32i32, + doSubRI<32>(ip, block, llvm::MCOperand::CreateReg(llvm::X86::EAX), llvm::MCOperand::CreateReg(llvm::X86::EAX), OP(0)), + doSubRV<32>(ip, block, IMM_AS_DATA_REF<32>(block, natM, ip), + llvm::MCOperand::CreateReg(llvm::X86::EAX), + llvm::MCOperand::CreateReg(llvm::X86::EAX))) -GENERIC_TRANSLATION_MI(SUB32mi, - doSubMI<32>(ip, block, ADDR_NOREF(0), OP(5)), - doSubMI<32>(ip, block, MEM_REFERENCE(0), OP(5)), +GENERIC_TRANSLATION_MI( + SUB32mi, doSubMI<32>(ip, block, ADDR_NOREF(0), OP(5)), + doSubMI<32>(ip, block, MEM_REFERENCE(0), OP(5)), doSubMV<32>(ip, block, ADDR_NOREF(0), IMM_AS_DATA_REF(block, natM, ip)), doSubMV<32>(ip, block, MEM_REFERENCE(0), IMM_AS_DATA_REF(block, natM, ip))) -GENERIC_TRANSLATION_REF(SUB32mi8, - doSubMI<32>(ip, block, ADDR_NOREF(0), OP(5)), - doSubMI<32>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION_REF(SUB32mi8, doSubMI<32>(ip, block, ADDR_NOREF(0), OP(5)), + doSubMI<32>(ip, block, MEM_REFERENCE(0), OP(5))) -GENERIC_TRANSLATION_REF(SUB64mi8, - doSubMI<64>(ip, block, ADDR_NOREF(0), OP(5)), - doSubMI<64>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION_REF(SUB64mi8, doSubMI<64>(ip, block, ADDR_NOREF(0), OP(5)), + doSubMI<64>(ip, block, MEM_REFERENCE(0), OP(5))) -GENERIC_TRANSLATION_REF(SUB32mr, - doSubMR<32>(ip, block, ADDR_NOREF(0), OP(5)), - doSubMR<32>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION_REF(SUB32mr, doSubMR<32>(ip, block, ADDR_NOREF(0), OP(5)), + doSubMR<32>(ip, block, MEM_REFERENCE(0), OP(5))) - -GENERIC_TRANSLATION_REF(SUB64mr, - doSubMR<64>(ip, block, ADDR_NOREF(0), OP(5)), - doSubMR<64>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION_REF(SUB64mr, doSubMR<64>(ip, block, ADDR_NOREF(0), OP(5)), + doSubMR<64>(ip, block, MEM_REFERENCE(0), OP(5))) GENERIC_TRANSLATION(SUB32ri, doSubRI<32>(ip, block, OP(0), OP(1), OP(2))) GENERIC_TRANSLATION(SUB32ri8, doSubRI<32>(ip, block, OP(0), OP(1), OP(2))) //GENERIC_TRANSLATION(SUB64ri32, doSubRI<64>(ip, block, OP(0), OP(1), OP(2))) -GENERIC_TRANSLATION_REF(SUB64ri32, - doSubRI<64>(ip, block, OP(0), OP(1), OP(2)), - doSubRV<64>(ip, block, IMM_AS_DATA_REF(block, natM, ip), OP(0), OP(1))) +GENERIC_TRANSLATION_REF( + SUB64ri32, doSubRI<64>(ip, block, OP(0), OP(1), OP(2)), + doSubRV<64>(ip, block, IMM_AS_DATA_REF(block, natM, ip), OP(0), OP(1))) -GENERIC_TRANSLATION_REF(SUB64i32, - doSubRI<64>(ip, block, MCOperand::CreateReg(X86::RAX), MCOperand::CreateReg(X86::RAX), OP(0)), - doSubRV<64>(ip, block, IMM_AS_DATA_REF(block, natM, ip), MCOperand::CreateReg(X86::RAX), MCOperand::CreateReg(X86::RAX))) +GENERIC_TRANSLATION_REF( + SUB64i32, + doSubRI<64>(ip, block, llvm::MCOperand::CreateReg(llvm::X86::RAX), llvm::MCOperand::CreateReg(llvm::X86::RAX), OP(0)), + doSubRV<64>(ip, block, IMM_AS_DATA_REF(block, natM, ip), + llvm::MCOperand::CreateReg(llvm::X86::RAX), + MCOperand::CreateReg(llvm::X86::RAX))) GENERIC_TRANSLATION_REF(SUB32rm, - doSubRM<32>(ip, block, ADDR_NOREF(2), OP(0), OP(1)), - doSubRM<32>(ip, block, MEM_REFERENCE(2), OP(0), OP(1))) + doSubRM<32>(ip, block, ADDR_NOREF(2), OP(0), OP(1)), + doSubRM<32>(ip, block, MEM_REFERENCE(2), OP(0), OP(1))) GENERIC_TRANSLATION(SUB32rr, doSubRR<32>(ip, block, OP(0), OP(1), OP(2))) GENERIC_TRANSLATION(SUB32rr_REV, doSubRR<32>(ip, block, OP(0), OP(1), OP(2))) GENERIC_TRANSLATION_REF(SUB64rm, - doSubRM<64>(ip, block, ADDR_NOREF(2), OP(0), OP(1)), - doSubRM<64>(ip, block, MEM_REFERENCE(2), OP(0), OP(1))) + doSubRM<64>(ip, block, ADDR_NOREF(2), OP(0), OP(1)), + doSubRM<64>(ip, block, MEM_REFERENCE(2), OP(0), OP(1))) GENERIC_TRANSLATION(SUB64rr, doSubRR<64>(ip, block, OP(0), OP(1), OP(2))) GENERIC_TRANSLATION(SUB64rr_REV, doSubRR<64>(ip, block, OP(0), OP(1), OP(2))) - -GENERIC_TRANSLATION(SUB8i8, doSubRI<8>(ip, block, MCOperand::CreateReg(X86::AL), MCOperand::CreateReg(X86::AL), OP(0))) -GENERIC_TRANSLATION_REF(SUB8mi, - doSubMI<8>(ip, block, ADDR_NOREF(0), OP(5)), - doSubMI<8>(ip, block, MEM_REFERENCE(0), OP(5))) -GENERIC_TRANSLATION_REF(SUB8mr, - doSubMR<8>(ip, block, ADDR_NOREF(0), OP(5)), - doSubMR<8>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION( + SUB8i8, + doSubRI<8>(ip, block, llvm::MCOperand::CreateReg(llvm::X86::AL), llvm::MCOperand::CreateReg(llvm::X86::AL), OP(0))) +GENERIC_TRANSLATION_REF(SUB8mi, doSubMI<8>(ip, block, ADDR_NOREF(0), OP(5)), + doSubMI<8>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION_REF(SUB8mr, doSubMR<8>(ip, block, ADDR_NOREF(0), OP(5)), + doSubMR<8>(ip, block, MEM_REFERENCE(0), OP(5))) GENERIC_TRANSLATION(SUB8ri, doSubRI<8>(ip, block, OP(0), OP(1), OP(2))) -GENERIC_TRANSLATION_REF(SUB8rm, - doSubRM<8>(ip, block, ADDR_NOREF(2), OP(0), OP(1)), - doSubRM<8>(ip, block, MEM_REFERENCE(2), OP(0), OP(1))) +GENERIC_TRANSLATION_REF(SUB8rm, + doSubRM<8>(ip, block, ADDR_NOREF(2), OP(0), OP(1)), + doSubRM<8>(ip, block, MEM_REFERENCE(2), OP(0), OP(1))) GENERIC_TRANSLATION(SUB8rr, doSubRR<8>(ip, block, OP(1), OP(2), OP(0))) GENERIC_TRANSLATION(SUB8rr_REV, doSubRR<8>(ip, block, OP(1), OP(2), OP(0))) -GENERIC_TRANSLATION(SBB16i16, doSbbRI<16>(ip, block, MCOperand::CreateReg(X86::AX), OP(0), MCOperand::CreateReg(X86::AX))) -GENERIC_TRANSLATION_REF(SBB16mi, - doSbbMI<16>(ip, block, ADDR_NOREF(0), OP(5)), - doSbbMI<16>(ip, block, MEM_REFERENCE(0), OP(5))) -GENERIC_TRANSLATION_REF(SBB16mi8, - doSbbMI<16>(ip, block, ADDR_NOREF(0), OP(5)), - doSbbMI<16>(ip, block, MEM_REFERENCE(0), OP(5))) -GENERIC_TRANSLATION_REF(SBB16mr, - doSbbMR<16>(ip, block, ADDR_NOREF(0), OP(5)), - doSbbMR<16>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION( + SBB16i16, + doSbbRI<16>(ip, block, llvm::MCOperand::CreateReg(llvm::X86::AX), OP(0), llvm::MCOperand::CreateReg(llvm::X86::AX))) +GENERIC_TRANSLATION_REF(SBB16mi, doSbbMI<16>(ip, block, ADDR_NOREF(0), OP(5)), + doSbbMI<16>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION_REF(SBB16mi8, doSbbMI<16>(ip, block, ADDR_NOREF(0), OP(5)), + doSbbMI<16>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION_REF(SBB16mr, doSbbMR<16>(ip, block, ADDR_NOREF(0), OP(5)), + doSbbMR<16>(ip, block, MEM_REFERENCE(0), OP(5))) GENERIC_TRANSLATION(SBB16ri, doSbbRI<16>(ip, block, OP(1), OP(2), OP(0))) GENERIC_TRANSLATION(SBB16ri8, doSbbRI<16>(ip, block, OP(1), OP(2), OP(0))) -GENERIC_TRANSLATION_REF(SBB16rm, - doSbbRM<16>(ip, block, OP(1), ADDR_NOREF(2), OP(0)), - doSbbRM<16>(ip, block, OP(1), MEM_REFERENCE(2), OP(0))) +GENERIC_TRANSLATION_REF(SBB16rm, + doSbbRM<16>(ip, block, OP(1), ADDR_NOREF(2), OP(0)), + doSbbRM<16>(ip, block, OP(1), MEM_REFERENCE(2), OP(0))) GENERIC_TRANSLATION(SBB16rr, doSbbRR<16>(ip, block, OP(1), OP(2), OP(0))) GENERIC_TRANSLATION(SBB16rr_REV, doSbbRR<16>(ip, block, OP(1), OP(2), OP(0))) -GENERIC_TRANSLATION_REF(SBB32i32, - doSbbRI<32>(ip, block, MCOperand::CreateReg(X86::EAX), OP(0), MCOperand::CreateReg(X86::EAX)), - doSbbRV<32>(ip, block, IMM_AS_DATA_REF<32>(block, natM, ip), MCOperand::CreateReg(X86::EAX), MCOperand::CreateReg(X86::EAX))) +GENERIC_TRANSLATION_REF( + SBB32i32, + doSbbRI<32>(ip, block, llvm::MCOperand::CreateReg(llvm::X86::EAX), OP(0), llvm::MCOperand::CreateReg(llvm::X86::EAX)), + doSbbRV<32>(ip, block, IMM_AS_DATA_REF<32>(block, natM, ip), + llvm::MCOperand::CreateReg(llvm::X86::EAX), + llvm::MCOperand::CreateReg(llvm::X86::EAX))) GENERIC_TRANSLATION(SBB32ri, doSbbRI<32>(ip, block, OP(1), OP(2), OP(0))) GENERIC_TRANSLATION(SBB32ri8, doSbbRI<32>(ip, block, OP(1), OP(2), OP(0))) GENERIC_TRANSLATION(SBB64ri8, doSbbRI<64>(ip, block, OP(1), OP(2), OP(0))) -GENERIC_TRANSLATION_MI(SBB32mi, - doSbbMI<32>(ip, block, ADDR_NOREF(0), OP(5)), - doSbbMI<32>(ip, block, MEM_REFERENCE(0), OP(5)), - doSbbMV<32>(ip, block, ADDR_NOREF(0), IMM_AS_DATA_REF(block, natM, ip)), - doSbbMV<32>(ip, block, MEM_REFERENCE(0), IMM_AS_DATA_REF(block, natM, ip))) +GENERIC_TRANSLATION_MI( + SBB32mi, doSbbMI<32>(ip, block, ADDR_NOREF(0), OP(5)), + doSbbMI<32>(ip, block, MEM_REFERENCE(0), OP(5)), + doSbbMV<32>(ip, block, ADDR_NOREF(0), IMM_AS_DATA_REF(block, natM, ip)), + doSbbMV<32>(ip, block, MEM_REFERENCE(0), IMM_AS_DATA_REF(block, natM, ip))) -GENERIC_TRANSLATION_REF(SBB32mi8, - doSbbMI<32>(ip, block, ADDR_NOREF(0), OP(5)), - doSbbMI<32>(ip, block, MEM_REFERENCE(0), OP(5))) -GENERIC_TRANSLATION_REF(SBB64mi8, - doSbbMI<64>(ip, block, ADDR_NOREF(0), OP(5)), - doSbbMI<64>(ip, block, MEM_REFERENCE(0), OP(5))) -GENERIC_TRANSLATION_REF(SBB32mr, - doSbbMR<32>(ip, block, ADDR_NOREF(0), OP(5)), - doSbbMR<32>(ip, block, MEM_REFERENCE(0), OP(5))) -GENERIC_TRANSLATION_REF(SBB32rm, - doSbbRM<32>(ip, block, OP(1), ADDR_NOREF(2), OP(0)), - doSbbRM<32>(ip, block, OP(1), MEM_REFERENCE(2), OP(0))) +GENERIC_TRANSLATION_REF(SBB32mi8, doSbbMI<32>(ip, block, ADDR_NOREF(0), OP(5)), + doSbbMI<32>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION_REF(SBB64mi8, doSbbMI<64>(ip, block, ADDR_NOREF(0), OP(5)), + doSbbMI<64>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION_REF(SBB32mr, doSbbMR<32>(ip, block, ADDR_NOREF(0), OP(5)), + doSbbMR<32>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION_REF(SBB32rm, + doSbbRM<32>(ip, block, OP(1), ADDR_NOREF(2), OP(0)), + doSbbRM<32>(ip, block, OP(1), MEM_REFERENCE(2), OP(0))) GENERIC_TRANSLATION(SBB32rr, doSbbRR<32>(ip, block, OP(1), OP(2), OP(0))) GENERIC_TRANSLATION(SBB32rr_REV, doSbbRR<32>(ip, block, OP(1), OP(2), OP(0))) - -GENERIC_TRANSLATION_REF(SBB64mr, - doSbbMR<64>(ip, block, ADDR_NOREF(0), OP(5)), - doSbbMR<64>(ip, block, MEM_REFERENCE(0), OP(5))) -GENERIC_TRANSLATION_REF(SBB64rm, - doSbbRM<64>(ip, block, OP(1), ADDR_NOREF(2), OP(0)), - doSbbRM<64>(ip, block, OP(1), MEM_REFERENCE(2), OP(0))) +GENERIC_TRANSLATION_REF(SBB64mr, doSbbMR<64>(ip, block, ADDR_NOREF(0), OP(5)), + doSbbMR<64>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION_REF(SBB64rm, + doSbbRM<64>(ip, block, OP(1), ADDR_NOREF(2), OP(0)), + doSbbRM<64>(ip, block, OP(1), MEM_REFERENCE(2), OP(0))) GENERIC_TRANSLATION(SBB64rr, doSbbRR<64>(ip, block, OP(1), OP(2), OP(0))) GENERIC_TRANSLATION(SBB64rr_REV, doSbbRR<64>(ip, block, OP(1), OP(2), OP(0))) -GENERIC_TRANSLATION(SBB8i8, doSbbRI<8>(ip, block, MCOperand::CreateReg(X86::AL), OP(0), MCOperand::CreateReg(X86::AL))) +GENERIC_TRANSLATION( + SBB8i8, + doSbbRI<8>(ip, block, llvm::MCOperand::CreateReg(llvm::X86::AL), OP(0), llvm::MCOperand::CreateReg(llvm::X86::AL))) GENERIC_TRANSLATION(SBB8ri, doSbbRI<8>(ip, block, OP(1), OP(2), OP(0))) -GENERIC_TRANSLATION_REF(SBB8mi, - doSbbMI<8>(ip, block, ADDR_NOREF(0), OP(5)), - doSbbMI<8>(ip, block, MEM_REFERENCE(0), OP(5))) -GENERIC_TRANSLATION_REF(SBB8mr, - doSbbMR<8>(ip, block, ADDR_NOREF(0), OP(5)), - doSbbMR<8>(ip, block, MEM_REFERENCE(0), OP(5))) -GENERIC_TRANSLATION_REF(SBB8rm, - doSbbRM<8>(ip, block, OP(1), ADDR_NOREF(2), OP(0)), - doSbbRM<8>(ip, block, OP(1), MEM_REFERENCE(2), OP(0))) +GENERIC_TRANSLATION_REF(SBB8mi, doSbbMI<8>(ip, block, ADDR_NOREF(0), OP(5)), + doSbbMI<8>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION_REF(SBB8mr, doSbbMR<8>(ip, block, ADDR_NOREF(0), OP(5)), + doSbbMR<8>(ip, block, MEM_REFERENCE(0), OP(5))) +GENERIC_TRANSLATION_REF(SBB8rm, + doSbbRM<8>(ip, block, OP(1), ADDR_NOREF(2), OP(0)), + doSbbRM<8>(ip, block, OP(1), MEM_REFERENCE(2), OP(0))) GENERIC_TRANSLATION(SBB8rr, doSbbRR<8>(ip, block, OP(1), OP(2), OP(0))) GENERIC_TRANSLATION(SBB8rr_REV, doSbbRR<8>(ip, block, OP(1), OP(2), OP(0))) -static InstTransResult translate_SUB64ri8(NativeModulePtr natM, BasicBlock *&block, InstPtr ip, MCInst &inst) { - InstTransResult ret; - ret = doSubRI<64, 8>(ip, block, OP(0), OP(1), OP(2)); - return ret; +static InstTransResult translate_SUB64ri8(TranslationContext &ctx, + llvm::BasicBlock *&block) { + InstTransResult ret; + auto ip = ctx.natI; + auto &inst = ip->get_inst(); + ret = doSubRI<64, 8>(ip, block, OP(0), OP(1), OP(2)); + return ret; } -void SUB_populateDispatchMap(DispatchMap &m) -{ - m[X86::SUB16i16] = translate_SUB16i16; - m[X86::SUB16mi] = translate_SUB16mi; - m[X86::SUB16mi8] = translate_SUB16mi8; - m[X86::SUB16mr] = translate_SUB16mr; - m[X86::SUB16ri] = translate_SUB16ri; - m[X86::SUB16ri8] = translate_SUB16ri8; - m[X86::SUB16rm] = translate_SUB16rm; - m[X86::SUB16rr] = translate_SUB16rr; - m[X86::SUB16rr_REV] = translate_SUB16rr_REV; - m[X86::SUB32i32] = translate_SUB32i32; - m[X86::SUB32mi] = translate_SUB32mi; - m[X86::SUB32mi8] = translate_SUB32mi8; - m[X86::SUB32mr] = translate_SUB32mr; +void SUB_populateDispatchMap(DispatchMap &m) { + m[X86::SUB16i16] = translate_SUB16i16; + m[X86::SUB16mi] = translate_SUB16mi; + m[X86::SUB16mi8] = translate_SUB16mi8; + m[X86::SUB16mr] = translate_SUB16mr; + m[X86::SUB16ri] = translate_SUB16ri; + m[X86::SUB16ri8] = translate_SUB16ri8; + m[X86::SUB16rm] = translate_SUB16rm; + m[X86::SUB16rr] = translate_SUB16rr; + m[X86::SUB16rr_REV] = translate_SUB16rr_REV; + m[X86::SUB32i32] = translate_SUB32i32; + m[X86::SUB32mi] = translate_SUB32mi; + m[X86::SUB32mi8] = translate_SUB32mi8; + m[X86::SUB32mr] = translate_SUB32mr; - m[X86::SUB64mi8] = translate_SUB64mi8; - m[X86::SUB64mr] = translate_SUB64mr; + m[X86::SUB64mi8] = translate_SUB64mi8; + m[X86::SUB64mr] = translate_SUB64mr; - m[X86::SUB32ri] = translate_SUB32ri; - m[X86::SUB32ri8] = translate_SUB32ri8; - m[X86::SUB32rm] = translate_SUB32rm; - m[X86::SUB32rr] = translate_SUB32rr; - m[X86::SUB32rr_REV] = translate_SUB32rr_REV; + m[X86::SUB32ri] = translate_SUB32ri; + m[X86::SUB32ri8] = translate_SUB32ri8; + m[X86::SUB32rm] = translate_SUB32rm; + m[X86::SUB32rr] = translate_SUB32rr; + m[X86::SUB32rr_REV] = translate_SUB32rr_REV; - m[X86::SUB64rm] = translate_SUB64rm; - m[X86::SUB64rr] = translate_SUB64rr; - m[X86::SUB64rr_REV] = translate_SUB64rr_REV; + m[X86::SUB64rm] = translate_SUB64rm; + m[X86::SUB64rr] = translate_SUB64rr; + m[X86::SUB64rr_REV] = translate_SUB64rr_REV; + m[X86::SUB8i8] = translate_SUB8i8; + m[X86::SUB8mi] = translate_SUB8mi; + m[X86::SUB8mr] = translate_SUB8mr; + m[X86::SUB8ri] = translate_SUB8ri; + m[X86::SUB8rm] = translate_SUB8rm; + m[X86::SUB8rr] = translate_SUB8rr; + m[X86::SUB8rr_REV] = translate_SUB8rr_REV; + m[X86::SBB16i16] = translate_SBB16i16; + m[X86::SBB16mi] = translate_SBB16mi; + m[X86::SBB16mi8] = translate_SBB16mi8; + m[X86::SBB16mr] = translate_SBB16mr; + m[X86::SBB16ri] = translate_SBB16ri; + m[X86::SBB16ri8] = translate_SBB16ri8; + m[X86::SBB16rm] = translate_SBB16rm; + m[X86::SBB16rr] = translate_SBB16rr; + m[X86::SBB16rr_REV] = translate_SBB16rr_REV; + m[X86::SBB32i32] = translate_SBB32i32; + m[X86::SBB32mi] = translate_SBB32mi; + m[X86::SBB32mi8] = translate_SBB32mi8; + m[X86::SBB64mi8] = translate_SBB64mi8; - m[X86::SUB8i8] = translate_SUB8i8; - m[X86::SUB8mi] = translate_SUB8mi; - m[X86::SUB8mr] = translate_SUB8mr; - m[X86::SUB8ri] = translate_SUB8ri; - m[X86::SUB8rm] = translate_SUB8rm; - m[X86::SUB8rr] = translate_SUB8rr; - m[X86::SUB8rr_REV] = translate_SUB8rr_REV; - m[X86::SBB16i16] = translate_SBB16i16; - m[X86::SBB16mi] = translate_SBB16mi; - m[X86::SBB16mi8] = translate_SBB16mi8; - m[X86::SBB16mr] = translate_SBB16mr; - m[X86::SBB16ri] = translate_SBB16ri; - m[X86::SBB16ri8] = translate_SBB16ri8; - m[X86::SBB16rm] = translate_SBB16rm; - m[X86::SBB16rr] = translate_SBB16rr; - m[X86::SBB16rr_REV] = translate_SBB16rr_REV; - m[X86::SBB32i32] = translate_SBB32i32; - m[X86::SBB32mi] = translate_SBB32mi; - m[X86::SBB32mi8] = translate_SBB32mi8; - m[X86::SBB64mi8] = translate_SBB64mi8; + m[X86::SBB32mr] = translate_SBB32mr; + m[X86::SBB64mr] = translate_SBB64mr; - m[X86::SBB32mr] = translate_SBB32mr; - m[X86::SBB64mr] = translate_SBB64mr; + m[X86::SBB32ri] = translate_SBB32ri; + m[X86::SBB32ri8] = translate_SBB32ri8; - m[X86::SBB32ri] = translate_SBB32ri; - m[X86::SBB32ri8] = translate_SBB32ri8; + m[X86::SBB64ri8] = translate_SBB64ri8; - m[X86::SBB64ri8] = translate_SBB64ri8; + m[X86::SBB32rm] = translate_SBB32rm; + m[X86::SBB32rr] = translate_SBB32rr; + m[X86::SBB32rr_REV] = translate_SBB32rr_REV; - m[X86::SBB32rm] = translate_SBB32rm; - m[X86::SBB32rr] = translate_SBB32rr; - m[X86::SBB32rr_REV] = translate_SBB32rr_REV; + m[X86::SBB64rm] = translate_SBB64rm; + m[X86::SBB64rr] = translate_SBB64rr; + m[X86::SBB64rr_REV] = translate_SBB64rr_REV; - m[X86::SBB64rm] = translate_SBB64rm; - m[X86::SBB64rr] = translate_SBB64rr; - m[X86::SBB64rr_REV] = translate_SBB64rr_REV; + m[X86::SBB8i8] = translate_SBB8i8; + m[X86::SBB8mi] = translate_SBB8mi; + m[X86::SBB8mr] = translate_SBB8mr; + m[X86::SBB8ri] = translate_SBB8ri; + m[X86::SBB8rm] = translate_SBB8rm; + m[X86::SBB8rr] = translate_SBB8rr; + m[X86::SBB8rr_REV] = translate_SBB8rr_REV; - m[X86::SBB8i8] = translate_SBB8i8; - m[X86::SBB8mi] = translate_SBB8mi; - m[X86::SBB8mr] = translate_SBB8mr; - m[X86::SBB8ri] = translate_SBB8ri; - m[X86::SBB8rm] = translate_SBB8rm; - m[X86::SBB8rr] = translate_SBB8rr; - m[X86::SBB8rr_REV] = translate_SBB8rr_REV; - - m[X86::SUB64ri8] = translate_SUB64ri8; - m[X86::SUB64ri32] = translate_SUB64ri32; - m[X86::SUB64i32] = translate_SUB64i32; + m[X86::SUB64ri8] = translate_SUB64ri8; + m[X86::SUB64ri32] = translate_SUB64ri32; + m[X86::SUB64i32] = translate_SUB64i32; } diff --git a/mc-sema/cfgToLLVM/x86Instrs_ShiftRoll.cpp b/mc-sema/cfgToLLVM/x86Instrs_ShiftRoll.cpp index 6efcb92c7..067e4c72a 100644 --- a/mc-sema/cfgToLLVM/x86Instrs_ShiftRoll.cpp +++ b/mc-sema/cfgToLLVM/x86Instrs_ShiftRoll.cpp @@ -49,7 +49,7 @@ static Value *getBit(BasicBlock *b, Value *val, int which) { } template -static Value *doShiftOp(InstPtr ip, BasicBlock *b, Value *src, Value *count) { +static Value *doShiftOp(NativeInstPtr ip, BasicBlock *b, Value *src, Value *count) { // get the masked count variable int count_max = (width == 64) ? 63 : 31; @@ -172,12 +172,12 @@ static Value *doShiftOp(InstPtr ip, BasicBlock *b, Value *src, Value *count) { } Value *doShrVV32(BasicBlock *&b, Value *src, Value *count) { - return doShiftOp<32, Instruction::LShr>(InstPtr((Inst*) (nullptr)), b, src, + return doShiftOp<32, Instruction::LShr>(NativeInstPtr((NativeInst*) (nullptr)), b, src, count); } template -static Value *doShldVV(InstPtr ip, BasicBlock *&b, Value* addr, +static Value *doShldVV(NativeInstPtr ip, BasicBlock *&b, Value* addr, unsigned srcReg1, //unsigned shiftBy) Value* shiftBy) { @@ -217,7 +217,7 @@ static Value *doShldVV(InstPtr ip, BasicBlock *&b, Value* addr, } template -static Value *doShldRV(InstPtr ip, BasicBlock *&b, unsigned dstReg, +static Value *doShldRV(NativeInstPtr ip, BasicBlock *&b, unsigned dstReg, unsigned srcReg1, Value* shiftBy) { Value *from_left = R_READ(b, dstReg); Value *reg_val = doShldVV(ip, b, from_left, srcReg1, shiftBy); @@ -227,7 +227,7 @@ static Value *doShldRV(InstPtr ip, BasicBlock *&b, unsigned dstReg, } template -static Value *doShldMV(InstPtr ip, BasicBlock *&b, Value *addr, +static Value *doShldMV(NativeInstPtr ip, BasicBlock *&b, Value *addr, unsigned srcReg1, Value *shiftBy) { Value *from_left = M_READ(ip, b, addr); Value *mem_val = doShldVV(ip, b, from_left, srcReg1, shiftBy); @@ -237,7 +237,7 @@ static Value *doShldMV(InstPtr ip, BasicBlock *&b, Value *addr, } template -static Value *doShrdVV(InstPtr ip, BasicBlock *&b, unsigned dstReg, +static Value *doShrdVV(NativeInstPtr ip, BasicBlock *&b, unsigned dstReg, unsigned srcReg1, //unsigned shiftBy) Value* shiftBy) { @@ -280,11 +280,11 @@ static Value *doShrdVV(InstPtr ip, BasicBlock *&b, unsigned dstReg, Value *ShrdVV32(BasicBlock *&b, unsigned dstReg, unsigned srcReg1, Value* shiftBy) { - return doShrdVV<32>(InstPtr((Inst*) (NULL)), b, dstReg, srcReg1, shiftBy); + return doShrdVV<32>(NativeInstPtr((NativeInst*) (NULL)), b, dstReg, srcReg1, shiftBy); } template -static InstTransResult doShrdRI(InstPtr ip, BasicBlock *&b, +static InstTransResult doShrdRI(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst, const MCOperand &src1, const MCOperand &src2) { TASSERT(src2.isImm(), ""); @@ -298,7 +298,7 @@ static InstTransResult doShrdRI(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doShldRI(InstPtr ip, BasicBlock *&b, +static InstTransResult doShldRI(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst, const MCOperand &src1, const MCOperand &src2) { TASSERT(src2.isImm(), ""); @@ -322,7 +322,7 @@ static Value *getShifyByValueFromCLRegister(BasicBlock *&b) { } template -static InstTransResult doShldRCL(InstPtr ip, BasicBlock *&b, +static InstTransResult doShldRCL(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst, const MCOperand &src1) { TASSERT(src1.isReg(), ""); TASSERT(dst.isReg(), ""); @@ -334,7 +334,7 @@ static InstTransResult doShldRCL(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doShldMCL(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doShldMCL(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &src1) { TASSERT(src1.isReg(), ""); @@ -345,7 +345,7 @@ static InstTransResult doShldMCL(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doShrdRCL(InstPtr ip, BasicBlock *&b, +static InstTransResult doShrdRCL(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst, const MCOperand &src1) { TASSERT(src1.isReg(), ""); TASSERT(dst.isReg(), ""); @@ -357,7 +357,7 @@ static InstTransResult doShrdRCL(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doShrRI(InstPtr ip, BasicBlock *&b, +static InstTransResult doShrRI(NativeInstPtr ip, BasicBlock *&b, const MCOperand &src1, const MCOperand &src2, const MCOperand &dst) { TASSERT(src1.isReg(), ""); @@ -375,7 +375,7 @@ static InstTransResult doShrRI(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doShrR1(InstPtr ip, BasicBlock *&b, +static InstTransResult doShrR1(NativeInstPtr ip, BasicBlock *&b, const MCOperand ®) { TASSERT(reg.isReg(), ""); @@ -390,7 +390,7 @@ static InstTransResult doShrR1(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doShrRCL(InstPtr ip, BasicBlock *&b, +static InstTransResult doShrRCL(NativeInstPtr ip, BasicBlock *&b, const MCOperand ®) { TASSERT(reg.isReg(), ""); @@ -405,7 +405,7 @@ static InstTransResult doShrRCL(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doShrMI(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doShrMI(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &imm) { TASSERT(addr != NULL, ""); TASSERT(imm.isImm(), ""); @@ -421,7 +421,7 @@ static InstTransResult doShrMI(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doShrMV(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doShrMV(NativeInstPtr ip, BasicBlock *&b, Value *addr, Value *rhs) { TASSERT(addr != NULL, ""); TASSERT(rhs != NULL, ""); @@ -436,7 +436,7 @@ static InstTransResult doShrMV(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doShrM1(InstPtr ip, BasicBlock *&b, Value *addr) { +static InstTransResult doShrM1(NativeInstPtr ip, BasicBlock *&b, Value *addr) { TASSERT(addr != NULL, ""); Value *dst = M_READ(ip, b, addr); @@ -450,7 +450,7 @@ static InstTransResult doShrM1(InstPtr ip, BasicBlock *&b, Value *addr) { } template -static InstTransResult doShrMCL(InstPtr ip, BasicBlock *&b, Value *addr) { +static InstTransResult doShrMCL(NativeInstPtr ip, BasicBlock *&b, Value *addr) { TASSERT(addr != NULL, ""); Value *dst = M_READ(ip, b, addr); @@ -464,7 +464,7 @@ static InstTransResult doShrMCL(InstPtr ip, BasicBlock *&b, Value *addr) { } template -static InstTransResult doShlRI(InstPtr ip, BasicBlock *&b, +static InstTransResult doShlRI(NativeInstPtr ip, BasicBlock *&b, const MCOperand &src1, const MCOperand &src2, const MCOperand &dst) { TASSERT(src1.isReg(), ""); @@ -482,7 +482,7 @@ static InstTransResult doShlRI(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doShlR1(InstPtr ip, BasicBlock *&b, +static InstTransResult doShlR1(NativeInstPtr ip, BasicBlock *&b, const MCOperand ®) { TASSERT(reg.isReg(), ""); @@ -497,7 +497,7 @@ static InstTransResult doShlR1(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doShlRCL(InstPtr ip, BasicBlock *&b, +static InstTransResult doShlRCL(NativeInstPtr ip, BasicBlock *&b, const MCOperand ®) { TASSERT(reg.isReg(), ""); @@ -512,7 +512,7 @@ static InstTransResult doShlRCL(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doShlMI(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doShlMI(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &imm) { TASSERT(addr != NULL, ""); TASSERT(imm.isImm(), ""); @@ -528,7 +528,7 @@ static InstTransResult doShlMI(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doShlMV(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doShlMV(NativeInstPtr ip, BasicBlock *&b, Value *addr, Value *rhs) { TASSERT(addr != NULL, ""); TASSERT(rhs != NULL, ""); @@ -543,7 +543,7 @@ static InstTransResult doShlMV(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doShlM1(InstPtr ip, BasicBlock *&b, Value *addr) { +static InstTransResult doShlM1(NativeInstPtr ip, BasicBlock *&b, Value *addr) { TASSERT(addr != NULL, ""); Value *dst = M_READ(ip, b, addr); @@ -557,7 +557,7 @@ static InstTransResult doShlM1(InstPtr ip, BasicBlock *&b, Value *addr) { } template -static InstTransResult doShlMCL(InstPtr ip, BasicBlock *&b, Value *addr) { +static InstTransResult doShlMCL(NativeInstPtr ip, BasicBlock *&b, Value *addr) { TASSERT(addr != NULL, ""); Value *dst = M_READ(ip, b, addr); @@ -571,7 +571,7 @@ static InstTransResult doShlMCL(InstPtr ip, BasicBlock *&b, Value *addr) { } template -static InstTransResult doSarRI(InstPtr ip, BasicBlock *&b, +static InstTransResult doSarRI(NativeInstPtr ip, BasicBlock *&b, const MCOperand &src1, const MCOperand &src2, const MCOperand &dst) { TASSERT(src1.isReg(), ""); @@ -589,7 +589,7 @@ static InstTransResult doSarRI(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doSarR1(InstPtr ip, BasicBlock *&b, +static InstTransResult doSarR1(NativeInstPtr ip, BasicBlock *&b, const MCOperand ®) { TASSERT(reg.isReg(), ""); @@ -604,7 +604,7 @@ static InstTransResult doSarR1(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doSarRCL(InstPtr ip, BasicBlock *&b, +static InstTransResult doSarRCL(NativeInstPtr ip, BasicBlock *&b, const MCOperand ®) { TASSERT(reg.isReg(), ""); @@ -619,7 +619,7 @@ static InstTransResult doSarRCL(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doSarMI(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doSarMI(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &imm) { TASSERT(addr != NULL, ""); TASSERT(imm.isImm(), ""); @@ -635,7 +635,7 @@ static InstTransResult doSarMI(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doSarMV(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doSarMV(NativeInstPtr ip, BasicBlock *&b, Value *addr, Value *rhs) { TASSERT(addr != NULL, ""); TASSERT(rhs != NULL, ""); @@ -650,7 +650,7 @@ static InstTransResult doSarMV(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doSarM1(InstPtr ip, BasicBlock *&b, Value *addr) { +static InstTransResult doSarM1(NativeInstPtr ip, BasicBlock *&b, Value *addr) { TASSERT(addr != NULL, ""); Value *dst = M_READ(ip, b, addr); @@ -664,7 +664,7 @@ static InstTransResult doSarM1(InstPtr ip, BasicBlock *&b, Value *addr) { } template -static InstTransResult doSarMCL(InstPtr ip, BasicBlock *&b, Value *addr) { +static InstTransResult doSarMCL(NativeInstPtr ip, BasicBlock *&b, Value *addr) { TASSERT(addr != NULL, ""); Value *dst = M_READ(ip, b, addr); @@ -678,7 +678,7 @@ static InstTransResult doSarMCL(InstPtr ip, BasicBlock *&b, Value *addr) { } template -static Value *doRclVV(InstPtr ip, BasicBlock *&b, Value *dst, Value *count) { +static Value *doRclVV(NativeInstPtr ip, BasicBlock *&b, Value *dst, Value *count) { Function *F = b->getParent(); //create basic blocks to define the branching behavior @@ -803,7 +803,7 @@ static Value *doRclVV(InstPtr ip, BasicBlock *&b, Value *dst, Value *count) { } template -static InstTransResult doRclM1(InstPtr ip, BasicBlock *&b, Value *addr) { +static InstTransResult doRclM1(NativeInstPtr ip, BasicBlock *&b, Value *addr) { TASSERT(addr != NULL, ""); @@ -818,7 +818,7 @@ static InstTransResult doRclM1(InstPtr ip, BasicBlock *&b, Value *addr) { } template -static InstTransResult doRclMI(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doRclMI(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &count) { TASSERT(addr != NULL, ""); @@ -835,7 +835,7 @@ static InstTransResult doRclMI(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doRclMV(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doRclMV(NativeInstPtr ip, BasicBlock *&b, Value *addr, Value *rhs) { TASSERT(addr != NULL, ""); @@ -851,7 +851,7 @@ static InstTransResult doRclMV(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doRclMCL(InstPtr ip, BasicBlock *&b, Value *addr) { +static InstTransResult doRclMCL(NativeInstPtr ip, BasicBlock *&b, Value *addr) { TASSERT(addr != NULL, ""); @@ -866,7 +866,7 @@ static InstTransResult doRclMCL(InstPtr ip, BasicBlock *&b, Value *addr) { } template -static InstTransResult doRclR1(InstPtr ip, BasicBlock *&b, +static InstTransResult doRclR1(NativeInstPtr ip, BasicBlock *&b, const MCOperand ®) { TASSERT(reg.isReg(), ""); @@ -882,7 +882,7 @@ static InstTransResult doRclR1(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doRclRI(InstPtr ip, BasicBlock *&b, +static InstTransResult doRclRI(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst1, const MCOperand ®, const MCOperand &count) { @@ -901,7 +901,7 @@ static InstTransResult doRclRI(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doRclRCL(InstPtr ip, BasicBlock *&b, +static InstTransResult doRclRCL(NativeInstPtr ip, BasicBlock *&b, const MCOperand ®) { TASSERT(reg.isReg(), ""); @@ -917,7 +917,7 @@ static InstTransResult doRclRCL(InstPtr ip, BasicBlock *&b, } template -static Value *doRcrVV(InstPtr ip, BasicBlock *&b, Value *dst, Value *count) { +static Value *doRcrVV(NativeInstPtr ip, BasicBlock *&b, Value *dst, Value *count) { Function *F = b->getParent(); //create basic blocks to define the branching behavior @@ -1045,7 +1045,7 @@ static Value *doRcrVV(InstPtr ip, BasicBlock *&b, Value *dst, Value *count) { } template -static InstTransResult doRcrM1(InstPtr ip, BasicBlock *&b, Value *addr) { +static InstTransResult doRcrM1(NativeInstPtr ip, BasicBlock *&b, Value *addr) { TASSERT(addr != NULL, ""); @@ -1060,7 +1060,7 @@ static InstTransResult doRcrM1(InstPtr ip, BasicBlock *&b, Value *addr) { } template -static InstTransResult doRcrMI(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doRcrMI(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &count) { TASSERT(addr != NULL, ""); @@ -1077,7 +1077,7 @@ static InstTransResult doRcrMI(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doRcrMV(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doRcrMV(NativeInstPtr ip, BasicBlock *&b, Value *addr, Value *rhs) { TASSERT(addr != NULL, ""); @@ -1093,7 +1093,7 @@ static InstTransResult doRcrMV(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doRcrMCL(InstPtr ip, BasicBlock *&b, Value *addr) { +static InstTransResult doRcrMCL(NativeInstPtr ip, BasicBlock *&b, Value *addr) { TASSERT(addr != NULL, ""); @@ -1108,7 +1108,7 @@ static InstTransResult doRcrMCL(InstPtr ip, BasicBlock *&b, Value *addr) { } template -static InstTransResult doRcrR1(InstPtr ip, BasicBlock *&b, +static InstTransResult doRcrR1(NativeInstPtr ip, BasicBlock *&b, const MCOperand ®) { TASSERT(reg.isReg(), ""); @@ -1124,7 +1124,7 @@ static InstTransResult doRcrR1(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doRcrRI(InstPtr ip, BasicBlock *&b, +static InstTransResult doRcrRI(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst1, const MCOperand ®, const MCOperand &count) { @@ -1143,7 +1143,7 @@ static InstTransResult doRcrRI(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doRcrRCL(InstPtr ip, BasicBlock *&b, +static InstTransResult doRcrRCL(NativeInstPtr ip, BasicBlock *&b, const MCOperand ®) { TASSERT(reg.isReg(), ""); @@ -1159,7 +1159,7 @@ static InstTransResult doRcrRCL(InstPtr ip, BasicBlock *&b, } template -static Value *doRolVV(InstPtr ip, BasicBlock *&b, Value *dst, Value *count) { +static Value *doRolVV(NativeInstPtr ip, BasicBlock *&b, Value *dst, Value *count) { Function *F = b->getParent(); //create basic blocks to define the branching behavior @@ -1259,7 +1259,7 @@ static Value *doRolVV(InstPtr ip, BasicBlock *&b, Value *dst, Value *count) { } template -static InstTransResult doRolM1(InstPtr ip, BasicBlock *&b, Value *addr) { +static InstTransResult doRolM1(NativeInstPtr ip, BasicBlock *&b, Value *addr) { TASSERT(addr != NULL, ""); @@ -1274,7 +1274,7 @@ static InstTransResult doRolM1(InstPtr ip, BasicBlock *&b, Value *addr) { } template -static InstTransResult doRolMI(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doRolMI(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &count) { TASSERT(addr != NULL, ""); @@ -1291,7 +1291,7 @@ static InstTransResult doRolMI(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doRolMV(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doRolMV(NativeInstPtr ip, BasicBlock *&b, Value *addr, Value *rhs) { TASSERT(addr != NULL, ""); @@ -1307,7 +1307,7 @@ static InstTransResult doRolMV(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doRolMCL(InstPtr ip, BasicBlock *&b, Value *addr) { +static InstTransResult doRolMCL(NativeInstPtr ip, BasicBlock *&b, Value *addr) { TASSERT(addr != NULL, ""); @@ -1322,7 +1322,7 @@ static InstTransResult doRolMCL(InstPtr ip, BasicBlock *&b, Value *addr) { } template -static InstTransResult doRolR1(InstPtr ip, BasicBlock *&b, +static InstTransResult doRolR1(NativeInstPtr ip, BasicBlock *&b, const MCOperand ®) { TASSERT(reg.isReg(), ""); @@ -1338,7 +1338,7 @@ static InstTransResult doRolR1(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doRolRI(InstPtr ip, BasicBlock *&b, +static InstTransResult doRolRI(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst1, const MCOperand ®, const MCOperand &count) { @@ -1357,7 +1357,7 @@ static InstTransResult doRolRI(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doRolRCL(InstPtr ip, BasicBlock *&b, +static InstTransResult doRolRCL(NativeInstPtr ip, BasicBlock *&b, const MCOperand ®) { TASSERT(reg.isReg(), ""); @@ -1373,7 +1373,7 @@ static InstTransResult doRolRCL(InstPtr ip, BasicBlock *&b, } template -static Value *doRorVV(InstPtr ip, BasicBlock *&b, Value *dst, Value *count) { +static Value *doRorVV(NativeInstPtr ip, BasicBlock *&b, Value *dst, Value *count) { Function *F = b->getParent(); //create basic blocks to define the branching behavior @@ -1478,7 +1478,7 @@ static Value *doRorVV(InstPtr ip, BasicBlock *&b, Value *dst, Value *count) { } template -static InstTransResult doRorM1(InstPtr ip, BasicBlock *&b, Value *addr) { +static InstTransResult doRorM1(NativeInstPtr ip, BasicBlock *&b, Value *addr) { TASSERT(addr != NULL, ""); @@ -1493,7 +1493,7 @@ static InstTransResult doRorM1(InstPtr ip, BasicBlock *&b, Value *addr) { } template -static InstTransResult doRorMI(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doRorMI(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &count) { TASSERT(addr != NULL, ""); @@ -1510,7 +1510,7 @@ static InstTransResult doRorMI(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doRorMV(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doRorMV(NativeInstPtr ip, BasicBlock *&b, Value *addr, Value *rhs) { TASSERT(addr != NULL, ""); @@ -1526,7 +1526,7 @@ static InstTransResult doRorMV(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doRorMCL(InstPtr ip, BasicBlock *&b, Value *addr) { +static InstTransResult doRorMCL(NativeInstPtr ip, BasicBlock *&b, Value *addr) { TASSERT(addr != NULL, ""); @@ -1542,7 +1542,7 @@ static InstTransResult doRorMCL(InstPtr ip, BasicBlock *&b, Value *addr) { } template -static InstTransResult doRorR1(InstPtr ip, BasicBlock *&b, +static InstTransResult doRorR1(NativeInstPtr ip, BasicBlock *&b, const MCOperand ®) { TASSERT(reg.isReg(), ""); @@ -1558,7 +1558,7 @@ static InstTransResult doRorR1(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doRorRI(InstPtr ip, BasicBlock *&b, +static InstTransResult doRorRI(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst1, const MCOperand ®, const MCOperand &count) { @@ -1577,7 +1577,7 @@ static InstTransResult doRorRI(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doRorRCL(InstPtr ip, BasicBlock *&b, +static InstTransResult doRorRCL(NativeInstPtr ip, BasicBlock *&b, const MCOperand ®) { TASSERT(reg.isReg(), ""); diff --git a/mc-sema/cfgToLLVM/x86Instrs_Stack.cpp b/mc-sema/cfgToLLVM/x86Instrs_Stack.cpp index 366427e45..99a6f068a 100644 --- a/mc-sema/cfgToLLVM/x86Instrs_Stack.cpp +++ b/mc-sema/cfgToLLVM/x86Instrs_Stack.cpp @@ -41,68 +41,65 @@ #define NASSERT(cond) TASSERT(cond, "") -using namespace llvm; - template -static void doPushVT(InstPtr ip, BasicBlock *&b, Value *v) { +static void doPushVT(NativeInstPtr ip, llvm::BasicBlock *&b, llvm::Value *v) { //ESP <- ESP - 4 //Memory[ESP] = v if (ArchPointerSize(b->getParent()->getParent())) { - Value *oldESP = R_READ<32>(b, X86::ESP); - Value *newESP = BinaryOperator::CreateSub(oldESP, - CONST_V<32>(b, (width / 8)), "", - b); + auto oldESP = R_READ<32>(b, llvm::X86::ESP); + auto newESP = llvm::BinaryOperator::CreateSub(oldESP, + CONST_V<32>(b, (width / 8)), + "", b); - Value *intVal = CastInst::CreatePointerCast( - v, Type::getInt32Ty(b->getContext()), "", b); + auto intVal = llvm::CastInst::CreatePointerCast( + v, llvm::Type::getInt32Ty(b->getContext()), "", b); M_WRITE_0(b, newESP, intVal); - R_WRITE<32>(b, X86::ESP, newESP); + R_WRITE<32>(b, llvm::X86::ESP, newESP); + } else { - - Value *oldESP = R_READ<64>(b, X86::RSP); - Value *newESP = BinaryOperator::CreateSub(oldESP, - CONST_V<64>(b, (width / 8)), "", - b); - - Value *intVal = CastInst::CreatePointerCast( - v, Type::getInt64Ty(b->getContext()), "", b); + auto oldESP = R_READ<64>(b, llvm::X86::RSP); + auto newESP = llvm::BinaryOperator::CreateSub(oldESP, + CONST_V<64>(b, (width / 8)), + "", b); + auto intVal = llvm::CastInst::CreatePointerCast( + v, llvm::Type::getInt64Ty(b->getContext()), "", b); M_WRITE_0(b, newESP, intVal); - R_WRITE<64>(b, X86::RSP, newESP); + R_WRITE<64>(b, llvm::X86::RSP, newESP); } return; } template -static void doPushV(InstPtr ip, BasicBlock *&b, Value *v) { +static void doPushV(NativeInstPtr ip, llvm::BasicBlock *&b, llvm::Value *v) { //ESP <- ESP - 4 //Memory[ESP] = v - llvm::Module *M = b->getParent()->getParent(); + auto M = b->getParent()->getParent(); if (ArchPointerSize(M) == Pointer32) { - Value *oldESP = x86::R_READ<32>(b, X86::ESP); - Value *newESP = BinaryOperator::CreateSub(oldESP, - CONST_V<32>(b, (width / 8)), "", - b); + auto oldESP = x86::R_READ<32>(b, llvm::X86::ESP); + auto newESP = llvm::BinaryOperator::CreateSub(oldESP, + CONST_V<32>(b, (width / 8)), + "", b); M_WRITE_0(b, newESP, v); - x86::R_WRITE<32>(b, X86::ESP, newESP); + x86::R_WRITE<32>(b, llvm::X86::ESP, newESP); } else { - Value *oldRSP = x86_64::R_READ<64>(b, X86::RSP); - Value *newRSP = BinaryOperator::CreateSub(oldRSP, - CONST_V<64>(b, (width / 8)), "", - b); + auto oldRSP = x86_64::R_READ<64>(b, llvm::X86::RSP); + auto newRSP = llvm::BinaryOperator::CreateSub(oldRSP, + CONST_V<64>(b, (width / 8)), + "", b); M_WRITE_0(b, newRSP, v); - x86_64::R_WRITE<64>(b, X86::RSP, newRSP); + x86_64::R_WRITE<64>(b, llvm::X86::RSP, newRSP); } return; } template -static InstTransResult doPushAV(InstPtr ip, BasicBlock *b) { +static InstTransResult doPushAV(NativeInstPtr ip, llvm::BasicBlock *b) { // Temp := (ESP); // Push(EAX); // Push(ECX); @@ -112,94 +109,95 @@ static InstTransResult doPushAV(InstPtr ip, BasicBlock *b) { // Push(EBP); // Push(ESI); // Push(EDI); - Value *Temp = R_READ(b, X86::ESP); + auto Temp = R_READ(b, llvm::X86::ESP); - doPushV(ip, b, R_READ(b, X86::EAX)); - doPushV(ip, b, R_READ(b, X86::ECX)); - doPushV(ip, b, R_READ(b, X86::EDX)); - doPushV(ip, b, R_READ(b, X86::EBX)); + doPushV(ip, b, R_READ(b, llvm::X86::EAX)); + doPushV(ip, b, R_READ(b, llvm::X86::ECX)); + doPushV(ip, b, R_READ(b, llvm::X86::EDX)); + doPushV(ip, b, R_READ(b, llvm::X86::EBX)); doPushV(ip, b, Temp); - doPushV(ip, b, R_READ(b, X86::EBP)); - doPushV(ip, b, R_READ(b, X86::ESI)); - doPushV(ip, b, R_READ(b, X86::EDI)); + doPushV(ip, b, R_READ(b, llvm::X86::EBP)); + doPushV(ip, b, R_READ(b, llvm::X86::ESI)); + doPushV(ip, b, R_READ(b, llvm::X86::EDI)); return ContinueBlock; } namespace x86 { -static InstTransResult doEnter(InstPtr ip, BasicBlock *&b, - const MCOperand &frameSize, - const MCOperand &nestingLevel) { - Function *F = b->getParent(); +static InstTransResult doEnter(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &frameSize, + const llvm::MCOperand &nestingLevel) { + auto F = b->getParent(); NASSERT(frameSize.isImm()); NASSERT(nestingLevel.isImm()); - Value *vFrameSize = CONST_V<32>(b, frameSize.getImm()); - Value *vNestingLevel = CONST_V<32>(b, nestingLevel.getImm()); + auto vFrameSize = CONST_V<32>(b, frameSize.getImm()); + auto vNestingLevel = CONST_V<32>(b, nestingLevel.getImm()); //Push EBP - doPushV<32>(ip, b, x86::R_READ<32>(b, X86::EBP)); + doPushV<32>(ip, b, x86::R_READ<32>(b, llvm::X86::EBP)); //set FrameTemp equal to the current value in ESP - Value *frameTemp = x86::R_READ<32>(b, X86::ESP); + auto frameTemp = x86::R_READ<32>(b, llvm::X86::ESP); //we'll need some blocks for - // * the loop header // * the loop body // * the end of the loop - BasicBlock *loopHeader = BasicBlock::Create(b->getContext(), "loopHeader", F); - BasicBlock *loopBody = BasicBlock::Create(b->getContext(), "loopBody", F); - BasicBlock *loopEnd = BasicBlock::Create(b->getContext(), "loopEnd", F); - BasicBlock *cont = BasicBlock::Create(b->getContext(), "continue", F); - BasicBlock *preLoop = BasicBlock::Create(b->getContext(), "preLoop", F); - BasicBlock *loopSetup = BasicBlock::Create(b->getContext(), "loopSetup", F); + auto &C = b->getContext(); + auto loopHeader = llvm::BasicBlock::Create(C, "loopHeader", F); + auto loopBody = llvm::BasicBlock::Create(C, "loopBody", F); + auto loopEnd = llvm::BasicBlock::Create(C, "loopEnd", F); + auto cont = llvm::BasicBlock::Create(C, "continue", F); + auto preLoop = llvm::BasicBlock::Create(C, "preLoop", F); + auto loopSetup = llvm::BasicBlock::Create(C, "loopSetup", F); //test to see if NestingLevel is 0 - Value *isNestZ = new ICmpInst( *b, CmpInst::ICMP_EQ, vNestingLevel, - CONST_V<32>(b, 0)); - BranchInst::Create(cont, preLoop, isNestZ, b); + auto isNestZ = new llvm::ICmpInst( *b, llvm::CmpInst::ICMP_EQ, vNestingLevel, + CONST_V<32>(b, 0)); + llvm::BranchInst::Create(cont, preLoop, isNestZ, b); //test to see if NestingLevel is greater than 1 - Value *testRes = new ICmpInst( *preLoop, CmpInst::ICMP_UGT, vNestingLevel, - CONST_V<32>(b, 1)); - BranchInst::Create(loopSetup, loopEnd, testRes, preLoop); + auto testRes = new llvm::ICmpInst( *preLoop, llvm::CmpInst::ICMP_UGT, + vNestingLevel, CONST_V<32>(b, 1)); + llvm::BranchInst::Create(loopSetup, loopEnd, testRes, preLoop); //initialize i to 1 - Value *i_init = CONST_V<32>(loopSetup, 1); - BranchInst::Create(loopHeader, loopSetup); + auto i_init = CONST_V<32>(loopSetup, 1); + llvm::BranchInst::Create(loopHeader, loopSetup); //the counter is a PHI instruction - PHINode *i = PHINode::Create(Type::getInt32Ty(F->getContext()), 2, "", - loopHeader); + auto i = llvm::PHINode::Create(llvm::Type::getInt32Ty(F->getContext()), 2, "", + loopHeader); i->addIncoming(i_init, loopSetup); //test and see if we should leave - Value *leaveLoop = new ICmpInst( *loopHeader, CmpInst::ICMP_ULT, i, - vNestingLevel); + auto leaveLoop = new llvm::ICmpInst( *loopHeader, llvm::CmpInst::ICMP_ULT, i, + vNestingLevel); BranchInst::Create(loopBody, loopEnd, leaveLoop, loopHeader); //subtract 4 from EBP - Value *oEBP = x86::R_READ<32>(loopBody, X86::EBP); - Value *nEBP = BinaryOperator::CreateSub(oEBP, CONST_V<32>(loopBody, 4), "", - loopBody); - x86::R_WRITE<32>(loopBody, X86::EBP, nEBP); + auto oEBP = x86::R_READ<32>(loopBody, llvm::X86::EBP); + auto nEBP = llvm::BinaryOperator::CreateSub(oEBP, CONST_V<32>(loopBody, 4), + "", loopBody); + x86::R_WRITE<32>(loopBody, llvm::X86::EBP, nEBP); doPushV<32>(ip, loopBody, nEBP); //add to the counter - Value *i_inc = BinaryOperator::CreateAdd(i, CONST_V<32>(loopBody, 1), "", - loopBody); + auto i_inc = BinaryOperator::CreateAdd(i, CONST_V<32>(loopBody, 1), "", + loopBody); i->addIncoming(i_inc, loopBody); - BranchInst::Create(loopHeader, loopBody); + llvm::BranchInst::Create(loopHeader, loopBody); //now at the end of the loop, push the frame temp doPushV<32>(ip, loopEnd, frameTemp); - BranchInst::Create(cont, loopEnd); + llvm::BranchInst::Create(cont, loopEnd); //write the frame temp into EBP - x86::R_WRITE<32>(cont, X86::EBP, frameTemp); + x86::R_WRITE<32>(cont, llvm::X86::EBP, frameTemp); //Subtract the size from ESP - Value *oESP = x86::R_READ<32>(cont, X86::ESP); - Value *nESP = BinaryOperator::CreateSub(oESP, vFrameSize, "", cont); - x86::R_WRITE<32>(cont, X86::ESP, nESP); + auto oESP = x86::R_READ<32>(cont, llvm::X86::ESP); + auto nESP = llvm::BinaryOperator::CreateSub(oESP, vFrameSize, "", cont); + x86::R_WRITE<32>(cont, llvm::X86::ESP, nESP); //update our caller to use the 'continue' block as the place to continue //sticking instructions @@ -210,80 +208,81 @@ static InstTransResult doEnter(InstPtr ip, BasicBlock *&b, } namespace x86_64 { -static InstTransResult doEnter(InstPtr ip, BasicBlock *&b, - const MCOperand &frameSize, - const MCOperand &nestingLevel) { - Function *F = b->getParent(); +static InstTransResult doEnter(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &frameSize, + const llvm::MCOperand &nestingLevel) { + auto F = b->getParent(); NASSERT(frameSize.isImm()); NASSERT(nestingLevel.isImm()); - Value *vFrameSize = CONST_V<64>(b, frameSize.getImm()); - Value *vNestingLevel = CONST_V<64>(b, nestingLevel.getImm()); + auto vFrameSize = CONST_V<64>(b, frameSize.getImm()); + auto vNestingLevel = CONST_V<64>(b, nestingLevel.getImm()); //Push EBP - doPushV<64>(ip, b, R_READ<64>(b, X86::RBP)); + doPushV<64>(ip, b, R_READ<64>(b, llvm::X86::RBP)); //set FrameTemp equal to the current value in ESP - Value *frameTemp = R_READ<64>(b, X86::RSP); + auto frameTemp = R_READ<64>(b, llvm::X86::RSP); //we'll need some blocks for - // * the loop header // * the loop body // * the end of the loop - BasicBlock *loopHeader = BasicBlock::Create(b->getContext(), "loopHeader", F); - BasicBlock *loopBody = BasicBlock::Create(b->getContext(), "loopBody", F); - BasicBlock *loopEnd = BasicBlock::Create(b->getContext(), "loopEnd", F); - BasicBlock *cont = BasicBlock::Create(b->getContext(), "continue", F); - BasicBlock *preLoop = BasicBlock::Create(b->getContext(), "preLoop", F); - BasicBlock *loopSetup = BasicBlock::Create(b->getContext(), "loopSetup", F); + auto &C = b->getContext(); + auto loopHeader = llvm::BasicBlock::Create(C, "loopHeader", F); + auto loopBody = llvm::BasicBlock::Create(C, "loopBody", F); + auto loopEnd = llvm::BasicBlock::Create(C, "loopEnd", F); + auto cont = llvm::BasicBlock::Create(C, "continue", F); + auto preLoop = llvm::BasicBlock::Create(C, "preLoop", F); + auto loopSetup = llvm::BasicBlock::Create(C, "loopSetup", F); //test to see if NestingLevel is 0 - Value *isNestZ = new ICmpInst( *b, CmpInst::ICMP_EQ, vNestingLevel, - CONST_V<64>(b, 0)); + auto isNestZ = new llvm::ICmpInst( *b, llvm::CmpInst::ICMP_EQ, vNestingLevel, + CONST_V<64>(b, 0)); - BranchInst::Create(cont, preLoop, isNestZ, b); + llvm::BranchInst::Create(cont, preLoop, isNestZ, b); //test to see if NestingLevel is greater than 1 - Value *testRes = new ICmpInst( *preLoop, CmpInst::ICMP_UGT, vNestingLevel, - CONST_V<64>(b, 1)); - BranchInst::Create(loopSetup, loopEnd, testRes, preLoop); + auto testRes = new llvm::ICmpInst( *preLoop, llvm::CmpInst::ICMP_UGT, + vNestingLevel, CONST_V<64>(b, 1)); + llvm::BranchInst::Create(loopSetup, loopEnd, testRes, preLoop); //initialize i to 1 - Value *i_init = CONST_V<64>(loopSetup, 1); - BranchInst::Create(loopHeader, loopSetup); + auto i_init = CONST_V<64>(loopSetup, 1); + llvm::BranchInst::Create(loopHeader, loopSetup); //the counter is a PHI instruction - PHINode *i = PHINode::Create(Type::getInt64Ty(F->getContext()), 2, "", - loopHeader); + auto i = llvm::PHINode::Create(llvm::Type::getInt64Ty(F->getContext()), 2, "", + loopHeader); i->addIncoming(i_init, loopSetup); //test and see if we should leave - Value *leaveLoop = new ICmpInst( *loopHeader, CmpInst::ICMP_ULT, i, - vNestingLevel); - BranchInst::Create(loopBody, loopEnd, leaveLoop, loopHeader); + auto leaveLoop = new llvm::ICmpInst( *loopHeader, llvm::CmpInst::ICMP_ULT, i, + vNestingLevel); + llvm::BranchInst::Create(loopBody, loopEnd, leaveLoop, loopHeader); //subtract 8 from EBP - Value *oEBP = R_READ<64>(loopBody, X86::RBP); - Value *nEBP = BinaryOperator::CreateSub(oEBP, CONST_V<64>(loopBody, 8), "", - loopBody); - R_WRITE<64>(loopBody, X86::RBP, nEBP); + auto oEBP = R_READ<64>(loopBody, llvm::X86::RBP); + auto nEBP = llvm::BinaryOperator::CreateSub(oEBP, CONST_V<64>(loopBody, 8), + "", loopBody); + R_WRITE<64>(loopBody, llvm::X86::RBP, nEBP); doPushV<64>(ip, loopBody, nEBP); //add to the counter - Value *i_inc = BinaryOperator::CreateAdd(i, CONST_V<64>(loopBody, 1), "", - loopBody); + auto i_inc = llvm::BinaryOperator::CreateAdd(i, CONST_V<64>(loopBody, 1), "", + loopBody); i->addIncoming(i_inc, loopBody); - BranchInst::Create(loopHeader, loopBody); + llvm::BranchInst::Create(loopHeader, loopBody); //now at the end of the loop, push the frame temp doPushV<64>(ip, loopEnd, frameTemp); - BranchInst::Create(cont, loopEnd); + llvm::BranchInst::Create(cont, loopEnd); //write the frame temp into EBP - R_WRITE<64>(cont, X86::RBP, frameTemp); + R_WRITE<64>(cont, llvm::X86::RBP, frameTemp); //Subtract the size from ESP - Value *oESP = R_READ<64>(cont, X86::RSP); - Value *nESP = BinaryOperator::CreateSub(oESP, vFrameSize, "", cont); - R_WRITE<64>(cont, X86::RSP, nESP); + auto oESP = R_READ<64>(cont, llvm::X86::RSP); + auto nESP = llvm::BinaryOperator::CreateSub(oESP, vFrameSize, "", cont); + R_WRITE<64>(cont, llvm::X86::RSP, nESP); //update our caller to use the 'continue' block as the place to continue //sticking instructions b = cont; @@ -292,10 +291,10 @@ static InstTransResult doEnter(InstPtr ip, BasicBlock *&b, } } -static InstTransResult doEnter(InstPtr ip, BasicBlock *&b, - const MCOperand &frameSize, - const MCOperand &nestingLevel) { - llvm::Module *M = b->getParent()->getParent(); +static InstTransResult doEnter(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &frameSize, + const llvm::MCOperand &nestingLevel) { + auto M = b->getParent()->getParent(); if (ArchPointerSize(M) == Pointer32) { return x86::doEnter(ip, b, frameSize, nestingLevel); } else { @@ -303,127 +302,128 @@ static InstTransResult doEnter(InstPtr ip, BasicBlock *&b, } } -static InstTransResult doLeave(InstPtr ip, BasicBlock *b) { +static InstTransResult doLeave(NativeInstPtr ip, llvm::BasicBlock *b) { // LEAVE - llvm::Module *M = b->getParent()->getParent(); + auto M = b->getParent()->getParent(); if (ArchPointerSize(M) == Pointer32) { // read EBP - Value *link_pointer = x86::R_READ<32>(b, X86::EBP); - Value *base_pointer = M_READ<32>(ip, b, link_pointer); - R_WRITE<32>(b, X86::EBP, base_pointer); + auto link_pointer = x86::R_READ<32>(b, llvm::X86::EBP); + auto base_pointer = M_READ<32>(ip, b, link_pointer); + R_WRITE<32>(b, llvm::X86::EBP, base_pointer); //write this to ESP R_WRITE<32>( b, - X86::ESP, - llvm::BinaryOperator::Create(Instruction::Add, link_pointer, + llvm::X86::ESP, + llvm::BinaryOperator::Create(llvm::Instruction::Add, link_pointer, CONST_V<32>(b, 4), "", b)); } else { - Value *link_pointer = x86::R_READ<64>(b, X86::RBP); - Value *base_pointer = M_READ<64>(ip, b, link_pointer); - R_WRITE<64>(b, X86::RBP, base_pointer); + auto link_pointer = x86::R_READ<64>(b, llvm::X86::RBP); + auto base_pointer = M_READ<64>(ip, b, link_pointer); + R_WRITE<64>(b, llvm::X86::RBP, base_pointer); //write this to ESP R_WRITE<64>( b, - X86::RSP, - llvm::BinaryOperator::Create(Instruction::Add, link_pointer, + llvm::X86::RSP, + llvm::BinaryOperator::Create(llvm::Instruction::Add, link_pointer, CONST_V<64>(b, 8), "", b)); } return ContinueBlock; } -static InstTransResult doLeave64(InstPtr ip, BasicBlock *b) { +static InstTransResult doLeave64(NativeInstPtr ip, llvm::BasicBlock *b) { // LEAVE // read RBP - Value *vRBP = x86_64::R_READ<64>(b, X86::RBP); + auto vRBP = x86_64::R_READ<64>(b, llvm::X86::RBP); //write this to RSP - x86_64::R_WRITE<64>(b, X86::RSP, vRBP); + x86_64::R_WRITE<64>(b, llvm::X86::RSP, vRBP); //do a pop into EBP //read from memory at the top of the stack - Value *vRSP = x86_64::R_READ<64>(b, X86::RSP); - Value *atTop = M_READ<64>(ip, b, vRSP); + auto vRSP = x86_64::R_READ<64>(b, llvm::X86::RSP); + auto atTop = M_READ<64>(ip, b, vRSP); //write this value into EBP - x86_64::R_WRITE<64>(b, X86::RBP, atTop); + x86_64::R_WRITE<64>(b, llvm::X86::RBP, atTop); //add 8 to the stack pointer - Value *updt = BinaryOperator::CreateAdd(vRSP, CONST_V<64>(b, 8), "", b); - x86_64::R_WRITE<64>(b, X86::RSP, updt); + auto updt = llvm::BinaryOperator::CreateAdd(vRSP, CONST_V<64>(b, 8), "", b); + x86_64::R_WRITE<64>(b, llvm::X86::RSP, updt); return ContinueBlock; } template -static InstTransResult doPopR(InstPtr ip, BasicBlock *&b, - const MCOperand &dst) { +static InstTransResult doPopR(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &dst) { NASSERT(dst.isReg()); - llvm::Module *M = b->getParent()->getParent(); + auto M = b->getParent()->getParent(); //read the stack pointer - Value *oldRSP; + llvm::Value *oldRSP = nullptr; if (ArchPointerSize(M) == Pointer32) { - oldRSP = x86::R_READ<32>(b, X86::ESP); + oldRSP = x86::R_READ<32>(b, llvm::X86::ESP); } else { - oldRSP = x86_64::R_READ<64>(b, X86::RSP); + oldRSP = x86_64::R_READ<64>(b, llvm::X86::RSP); } //read the value from the memory at the stack pointer address - Value *m = M_READ_0(b, oldRSP); + auto m = M_READ_0(b, oldRSP); //write that value into dst R_WRITE(b, dst.getReg(), m); //add to the stack pointer if (ArchPointerSize(M) == Pointer32) { - Value *newESP = BinaryOperator::CreateAdd(oldRSP, - CONST_V<32>(b, (width / 8)), "", - b); + auto newESP = llvm::BinaryOperator::CreateAdd(oldRSP, + CONST_V<32>(b, (width / 8)), + "", b); //update the stack pointer register - x86::R_WRITE<32>(b, X86::ESP, newESP); + x86::R_WRITE<32>(b, llvm::X86::ESP, newESP); } else { - Value *newRSP = BinaryOperator::CreateAdd(oldRSP, - CONST_V<64>(b, (width / 8)), "", - b); + auto newRSP = llvm::BinaryOperator::CreateAdd(oldRSP, + CONST_V<64>(b, (width / 8)), + "", b); //update the stack pointer register - x86_64::R_WRITE<64>(b, X86::RSP, newRSP); + x86_64::R_WRITE<64>(b, llvm::X86::RSP, newRSP); } return ContinueBlock; } template -static InstTransResult doPopD(BasicBlock *b) { +static llvm::Value *doPopV(llvm::BasicBlock *b) { //read the stack pointer - Value *oldESP = R_READ(b, X86::ESP); + auto xsp = 32 == width ? llvm::X86::ESP : llvm::X86::RSP; + auto oldESP = R_READ(b, xsp); //read the value from the memory at the stack pointer address, //and throw it away - Value *m = M_READ_0(b, oldESP); - NASSERT(m != NULL); + auto m = INTERNAL_M_READ(width, 0, b, oldESP); + NASSERT(m != nullptr); //add to the stack pointer - Value *newESP = BinaryOperator::CreateAdd(oldESP, - CONST_V(b, (width / 8)), "", - b); + auto newESP = llvm::BinaryOperator::CreateAdd(oldESP, + CONST_V(b, (width / 8)), + "", b); //update the stack pointer register - R_WRITE(b, X86::ESP, newESP); + R_WRITE(b, xsp, newESP); - return ContinueBlock; + return m; } template -static InstTransResult doPopAV(InstPtr ip, BasicBlock *b) { +static InstTransResult doPopAV(NativeInstPtr ip, llvm::BasicBlock *b) { // EDI := Pop(); // ESI := Pop(); // EBP := Pop(); @@ -433,26 +433,26 @@ static InstTransResult doPopAV(InstPtr ip, BasicBlock *b) { // ECX := Pop(); // EAX := Pop(); - doPopR(ip, b, MCOperand::CreateReg(X86::EDI)); - doPopR(ip, b, MCOperand::CreateReg(X86::ESI)); - doPopR(ip, b, MCOperand::CreateReg(X86::EBP)); - doPopD(b); - doPopR(ip, b, MCOperand::CreateReg(X86::EBX)); - doPopR(ip, b, MCOperand::CreateReg(X86::EDX)); - doPopR(ip, b, MCOperand::CreateReg(X86::ECX)); - doPopR(ip, b, MCOperand::CreateReg(X86::EAX)); + doPopR(ip, b, llvm::MCOperand::CreateReg(llvm::X86::EDI)); + doPopR(ip, b, llvm::MCOperand::CreateReg(llvm::X86::ESI)); + doPopR(ip, b, llvm::MCOperand::CreateReg(llvm::X86::EBP)); + doPopV(b); + doPopR(ip, b, llvm::MCOperand::CreateReg(llvm::X86::EBX)); + doPopR(ip, b, llvm::MCOperand::CreateReg(llvm::X86::EDX)); + doPopR(ip, b, llvm::MCOperand::CreateReg(llvm::X86::ECX)); + doPopR(ip, b, llvm::MCOperand::CreateReg(llvm::X86::EAX)); return ContinueBlock; } template -static InstTransResult doPushR(InstPtr ip, BasicBlock *&b, - const MCOperand &src) { +static InstTransResult doPushR(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &src) { //PUSH NASSERT(src.isReg()); //first, read from into a temp - Value *TMP = R_READ(b, src.getReg()); + auto TMP = R_READ(b, src.getReg()); doPushV(ip, b, TMP); @@ -460,26 +460,28 @@ static InstTransResult doPushR(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doPushI(InstPtr ip, BasicBlock *&b, - const MCOperand &src) { +static InstTransResult doPushI(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &src) { // PUSH NASSERT(src.isImm()); - Value *OrigIMM = CONST_V(b, src.getImm()); + auto OrigIMM = CONST_V(b, src.getImm()); // PUSHi32 and PUSHi16 will never be extended // in IA32 - Value *SExt_Val = OrigIMM; + llvm::Value *SExt_Val = OrigIMM; // PUSHi8 is extended to operand size, which is 32 if (width == 8) { - SExt_Val = new SExtInst(OrigIMM, Type::getInt32Ty(b->getContext()), "", b); + SExt_Val = new llvm::SExtInst(OrigIMM, + llvm::Type::getInt32Ty(b->getContext()), "", + b); doPushV<32>(ip, b, SExt_Val); } else { if (width == 32 && ip->has_ext_call_target()) { std::string target = ip->get_ext_call_target()->getSymbolName(); - Module *M = b->getParent()->getParent(); - Function *externFunction = M->getFunction(target); - NASSERT(externFunction != NULL); + auto M = b->getParent()->getParent(); + auto externFunction = M->getFunction(target); + NASSERT(externFunction != nullptr); doPushVT(ip, b, externFunction); } else { doPushV(ip, b, SExt_Val); @@ -490,46 +492,53 @@ static InstTransResult doPushI(InstPtr ip, BasicBlock *&b, } template -static InstTransResult doPopM(InstPtr ip, BasicBlock *&b, Value *addr) { - NASSERT(addr != NULL); +static InstTransResult doPopM(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *addr) { + NASSERT(addr != nullptr); + auto xsp = 32 == width ? llvm::X86::ESP : llvm::X86::RSP; //read the stack pointer - Value *oldESP = R_READ<32>(b, X86::ESP); + auto oldESP = R_READ(b, xsp); //read the value from the memory at the stack pointer address - Value *m = M_READ_0(b, oldESP); + auto m = M_READ_0(b, oldESP); //write that value into dst M_WRITE(ip, b, addr, m); //add to the stack pointer - Value *newESP = BinaryOperator::CreateAdd(oldESP, CONST_V<32>(b, (width / 8)), - "", b); + auto newESP = llvm::BinaryOperator::CreateAdd(oldESP, + CONST_V(b, (width / 8)), + "", b); //update the stack pointer register - R_WRITE<32>(b, X86::ESP, newESP); + R_WRITE<32>(b, xsp, newESP); return ContinueBlock; } template -static InstTransResult doPushRMM(InstPtr ip, BasicBlock *&b, Value *addr) { - NASSERT(addr != NULL); +static InstTransResult doPushRMM(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *addr) { + NASSERT(addr != nullptr); - Value *fromMem = M_READ(ip, b, addr); + auto fromMem = M_READ(ip, b, addr); doPushV(ip, b, fromMem); return ContinueBlock; } -static InstTransResult translate_PUSH32rmm(NativeModulePtr natM, - BasicBlock *& block, InstPtr ip, - MCInst &inst) { +static InstTransResult translate_PUSH32rmm(TranslationContext &ctx, + llvm::BasicBlock *&block) { InstTransResult ret; - Function *F = block->getParent(); + auto natM = ctx.natM; + auto ip = ctx.natI; + auto &inst = ip->get_inst(); + auto F = block->getParent(); + if (ip->has_external_ref()) { - Value *addrInt = getValueForExternal<32>(F->getParent(), ip, block); - TASSERT(addrInt != NULL, "Could not get address for external"); + auto addrInt = getValueForExternal<32>(F->getParent(), ip, block); + TASSERT(addrInt != nullptr, "Could not get address for external"); doPushV<32>(ip, block, addrInt); return ContinueBlock; } else if (ip->has_mem_reference) { @@ -540,14 +549,17 @@ static InstTransResult translate_PUSH32rmm(NativeModulePtr natM, return ret; } -static InstTransResult translate_PUSH64rmm(NativeModulePtr natM, - BasicBlock *& block, InstPtr ip, - MCInst &inst) { +static InstTransResult translate_PUSH64rmm(TranslationContext &ctx, + llvm::BasicBlock *&block) { InstTransResult ret; - Function *F = block->getParent(); + auto natM = ctx.natM; + auto ip = ctx.natI; + auto &inst = ip->get_inst(); + auto F = block->getParent(); + if (ip->has_external_ref()) { - Value *addrInt = getValueForExternal<64>(F->getParent(), ip, block); - TASSERT(addrInt != NULL, "Could not get address for external"); + auto addrInt = getValueForExternal<64>(F->getParent(), ip, block); + TASSERT(addrInt != nullptr, "Could not get address for external"); doPushV<64>(ip, block, addrInt); return ContinueBlock; } else if (ip->has_mem_reference) { @@ -558,26 +570,31 @@ static InstTransResult translate_PUSH64rmm(NativeModulePtr natM, return ret; } -static InstTransResult translate_PUSHi32(NativeModulePtr natM, - BasicBlock *&block, InstPtr ip, - MCInst &inst) { +static InstTransResult translate_PUSHi32(TranslationContext &ctx, + llvm::BasicBlock *&block) { InstTransResult ret; - Function *F = block->getParent(); + auto natM = ctx.natM; + auto ip = ctx.natI; + auto &inst = ip->get_inst(); + auto F = block->getParent(); if (ip->has_code_ref()) { - Value *callback_fn = ArchAddCallbackDriver( - block->getParent()->getParent(), ip->get_reference(Inst::IMMRef)); - Value *addrInt = new PtrToIntInst( - callback_fn, llvm::Type::getInt32Ty(block->getContext()), "", block); + auto callback_fn = ArchAddCallbackDriver( + block->getParent()->getParent(), ip->get_reference(NativeInst::IMMRef)); + auto addrInt = new PtrToIntInst(callback_fn, + llvm::Type::getInt32Ty(block->getContext()), + "", block); doPushV<32>(ip, block, addrInt); ret = ContinueBlock; } else if (ip->has_imm_reference) { - Module *M = F->getParent(); - Value *ref = IMM_AS_DATA_REF(block, natM, ip); + auto M = F->getParent(); + auto ref = IMM_AS_DATA_REF(block, natM, ip); // this may fail catastrophically, but we can only push those 32-bits // or we break the stack if (Pointer64 == ArchPointerSize(M)) { - ref = new llvm::TruncInst(ref, llvm::Type::getInt32Ty(block->getContext()), "", block); + ref = new llvm::TruncInst(ref, + llvm::Type::getInt32Ty(block->getContext()), "", + block); } doPushV<32>(ip, block, ref); @@ -589,29 +606,28 @@ static InstTransResult translate_PUSHi32(NativeModulePtr natM, } #define EMIT_SHL_OR(destval, inval, shiftcount) do {\ - Value *tmp = BinaryOperator::CreateShl(inval, CONST_V(b, shiftcount), "", b); \ - destval = BinaryOperator::CreateOr(destval, tmp, "", b); \ + auto tmp = llvm::BinaryOperator::CreateShl(inval, CONST_V(b, shiftcount), "", b); \ + destval = llvm::BinaryOperator::CreateOr(destval, tmp, "", b); \ } while (0) #define EMIT_SHR_AND(destval, inval, shiftcount) do {\ - Value *tmp = BinaryOperator::CreateLShr(inval, CONST_V(b, shiftcount), "", b); \ - destval = BinaryOperator::CreateAnd(destval, tmp, "", b); \ + auto tmp = llvm::BinaryOperator::CreateLShr(inval, CONST_V(b, shiftcount), "", b); \ + destval = llvm::BinaryOperator::CreateAnd(destval, tmp, "", b); \ } while (0) template -static Value * checkIfBitSet(Value *field, int bit, BasicBlock *b) { +static llvm::Value *checkIfBitSet(llvm::Value *field, int bit, + llvm::BasicBlock *b) { - Value *tmp = BinaryOperator::CreateAnd(field, CONST_V(b, 1 << bit), "", - b); - Value *res = new ICmpInst( *b, CmpInst::ICMP_NE, tmp, CONST_V(b, 0)); - - return res; + auto tmp = llvm::BinaryOperator::CreateAnd(field, CONST_V(b, 1 << bit), + "", b); + return new llvm::ICmpInst( *b, llvm::CmpInst::ICMP_NE, tmp, + CONST_V(b, 0)); } template -static InstTransResult doPopF(InstPtr ip, BasicBlock *b) { - Value *newFlags = R_READ(b, X86::ESP); - doPopD(b); +static InstTransResult doPopF(NativeInstPtr ip, llvm::BasicBlock *b) { + auto newFlags = doPopV(b); // bit 0: CF F_WRITE(b, CF, checkIfBitSet(newFlags, 0, b)); @@ -638,24 +654,24 @@ static InstTransResult doPopF(InstPtr ip, BasicBlock *b) { } template -static InstTransResult doPushF(InstPtr ip, BasicBlock *b) { +static InstTransResult doPushF(NativeInstPtr ip, llvm::BasicBlock *b) { // put eflags into one value. // - Type *toT = Type::getIntNTy(b->getContext(), width); + Type *toT = llvm::Type::getIntNTy(b->getContext(), width); - Value *cf = new ZExtInst(F_READ(b, CF), toT, "", b); - Value *pf = new ZExtInst(F_READ(b, PF), toT, "", b); - Value *af = new ZExtInst(F_READ(b, AF), toT, "", b); - Value *zf = new ZExtInst(F_READ(b, ZF), toT, "", b); - Value *sf = new ZExtInst(F_READ(b, SF), toT, "", b); - Value *df = new ZExtInst(F_READ(b, DF), toT, "", b); - Value *of = new ZExtInst(F_READ(b, OF), toT, "", b); + Value *cf = new llvm::ZExtInst(F_READ(b, CF), toT, "", b); + Value *pf = new llvm::ZExtInst(F_READ(b, PF), toT, "", b); + Value *af = new llvm::ZExtInst(F_READ(b, AF), toT, "", b); + Value *zf = new llvm::ZExtInst(F_READ(b, ZF), toT, "", b); + Value *sf = new llvm::ZExtInst(F_READ(b, SF), toT, "", b); + Value *df = new llvm::ZExtInst(F_READ(b, DF), toT, "", b); + Value *of = new llvm::ZExtInst(F_READ(b, OF), toT, "", b); Value *eflags_base = CONST_V(b, 0x202); // bit 0: CF - Value *cur_flags = BinaryOperator::CreateOr(eflags_base, cf, "", b); + Value *cur_flags = llvm::BinaryOperator::CreateOr(eflags_base, cf, "", b); // bit 1: 1 (reserved) // bit 2: PF EMIT_SHL_OR(cur_flags, pf, 2); @@ -708,32 +724,35 @@ GENERIC_TRANSLATION_REF(PUSHi16, doPushI<16>(ip, block, OP(0)), doPushV<16>(ip, block, MEM_REFERENCE(0) )) GENERIC_TRANSLATION_REF(POP32rmm, doPopM<32>(ip, block, ADDR_NOREF(0)), doPopM<32>(ip, block, MEM_REFERENCE(0))); +GENERIC_TRANSLATION_REF(POP64rmm, doPopM<64>(ip, block, ADDR_NOREF(0)), + doPopM<32>(ip, block, MEM_REFERENCE(0))); void Stack_populateDispatchMap(DispatchMap &m) { - m[X86::ENTER] = translate_ENTER; - m[X86::LEAVE] = translate_LEAVE; - m[X86::LEAVE64] = translate_LEAVE64; - m[X86::POP16r] = translate_POP16r; - m[X86::POP32r] = translate_POP32r; - m[X86::PUSH16r] = translate_PUSH16r; - m[X86::PUSH32r] = translate_PUSH32r; - m[X86::PUSH32i8] = translate_PUSHi8; - m[X86::PUSHi16] = translate_PUSHi16; - m[X86::PUSHi32] = translate_PUSHi32; - m[X86::PUSH32rmm] = translate_PUSH32rmm; - m[X86::POPA32] = translate_POPA32; - m[X86::PUSHA32] = translate_PUSHA32; - m[X86::PUSHF32] = translate_PUSHF32; - m[X86::PUSHF64] = translate_PUSHF64; - m[X86::POP32rmm] = translate_POP32rmm; + m[llvm::X86::ENTER] = translate_ENTER; + m[llvm::X86::LEAVE] = translate_LEAVE; + m[llvm::X86::LEAVE64] = translate_LEAVE64; + m[llvm::X86::POP16r] = translate_POP16r; + m[llvm::X86::POP32r] = translate_POP32r; + m[llvm::X86::PUSH16r] = translate_PUSH16r; + m[llvm::X86::PUSH32r] = translate_PUSH32r; + m[llvm::X86::PUSH32i8] = translate_PUSHi8; + m[llvm::X86::PUSHi16] = translate_PUSHi16; + m[llvm::X86::PUSHi32] = translate_PUSHi32; + m[llvm::X86::PUSH32rmm] = translate_PUSH32rmm; + m[llvm::X86::POPA32] = translate_POPA32; + m[llvm::X86::PUSHA32] = translate_PUSHA32; + m[llvm::X86::PUSHF32] = translate_PUSHF32; + m[llvm::X86::PUSHF64] = translate_PUSHF64; + m[llvm::X86::POP32rmm] = translate_POP32rmm; - m[X86::PUSH64r] = translate_PUSH64r; - m[X86::PUSH64rmr] = translate_PUSH64r; // TODO(pag): Is this right?? - m[X86::PUSH64rmm] = translate_PUSH64rmm; - m[X86::PUSH64i8] = translate_PUSHi8; - m[X86::PUSH64i32] = translate_PUSHi32; + m[llvm::X86::PUSH64r] = translate_PUSH64r; + m[llvm::X86::PUSH64rmr] = translate_PUSH64r; // TODO(pag): Is this right?? + m[llvm::X86::PUSH64rmm] = translate_PUSH64rmm; + m[llvm::X86::PUSH64i8] = translate_PUSHi8; + m[llvm::X86::PUSH64i32] = translate_PUSHi32; - m[X86::POP64r] = translate_POP64r; - m[X86::POPF64] = translate_POPF64; - m[X86::POPF32] = translate_POPF32; + m[llvm::X86::POP64r] = translate_POP64r; + m[llvm::X86::POP64rmm] = translate_POP64rmm; + m[llvm::X86::POPF64] = translate_POPF64; + m[llvm::X86::POPF32] = translate_POPF32; } diff --git a/mc-sema/cfgToLLVM/x86Instrs_String.cpp b/mc-sema/cfgToLLVM/x86Instrs_String.cpp index 72edac14a..a867815c8 100644 --- a/mc-sema/cfgToLLVM/x86Instrs_String.cpp +++ b/mc-sema/cfgToLLVM/x86Instrs_String.cpp @@ -35,7 +35,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #include "x86Instrs_String.h" template -static BasicBlock *doCmpsV(BasicBlock *pred) { +static llvm::BasicBlock *doCmpsV(llvm::BasicBlock *pred) { auto lhsRegVal = R_READ(pred, llvm::X86::RSI); auto lhsFromMem = M_READ_0(pred, lhsRegVal); @@ -518,13 +518,13 @@ static InstTransResult doRepMovs(llvm::BasicBlock *&b) { } template -static InstTransResult doMovs(llvm::BasicBlock *&b, InstPtr ip) { +static InstTransResult doMovs(llvm::BasicBlock *&b, NativeInstPtr ip) { //we will just kind of paste a new block into the end //here so that we have less duplicated logic llvm::Module *M = b->getParent()->getParent(); int bitWidth = ArchPointerSize(M); - Inst::Prefix pfx = ip->get_prefix(); - if (pfx == Inst::RepPrefix) { + NativeInst::Prefix pfx = ip->get_prefix(); + if (pfx == NativeInst::RepPrefix) { if (bitWidth == Pointer32) { doRepMovs(b); } else { @@ -547,18 +547,18 @@ static InstTransResult doRepStos(llvm::BasicBlock *&b) { } template -static InstTransResult doStos(llvm::BasicBlock *&b, InstPtr ip) { +static InstTransResult doStos(llvm::BasicBlock *&b, NativeInstPtr ip) { auto M = b->getParent()->getParent(); auto bitWidth = ArchPointerSize(M); - Inst::Prefix pfx = ip->get_prefix(); + NativeInst::Prefix pfx = ip->get_prefix(); if (bitWidth == Pointer32) { - if (pfx == Inst::RepPrefix) { + if (pfx == NativeInst::RepPrefix) { doRepStos(b); } else { b = doStosV(b); } } else { - if (pfx == Inst::RepPrefix) { + if (pfx == NativeInst::RepPrefix) { doRepStos(b); } else { b = doStosV(b); @@ -592,18 +592,20 @@ GENERIC_TRANSLATION(REP_STOSQ_64, (doRepStos<64, 64>(block))) #define SCAS_TRANSLATION(NAME, WIDTH) \ static InstTransResult translate_ ## NAME ( \ - NativeModulePtr natM, llvm::BasicBlock *& block, \ - InstPtr ip, llvm::MCInst &inst) {\ + TranslationContext &ctx, llvm::BasicBlock *&block) {\ + auto natM = ctx.natM; \ + auto ip = ctx.natI; \ + auto &inst = ip->get_inst(); \ InstTransResult ret = TranslateError;\ - Inst::Prefix pfx = ip->get_prefix();\ - switch(pfx) { \ - case Inst::NoPrefix: \ + NativeInst::Prefix pfx = ip->get_prefix();\ + switch (pfx) { \ + case NativeInst::NoPrefix: \ throw TErr(__LINE__, __FILE__, "NIY"); \ break; \ - case Inst::RepPrefix: \ + case NativeInst::RepPrefix: \ throw TErr(__LINE__, __FILE__, "NIY"); \ break; \ - case Inst::RepNePrefix: \ + case NativeInst::RepNePrefix: \ ret = doRepNeScas(block); \ break; \ default: \ @@ -614,19 +616,21 @@ GENERIC_TRANSLATION(REP_STOSQ_64, (doRepStos<64, 64>(block))) #define CMPS_TRANSLATION(NAME, WIDTH) \ static InstTransResult translate_ ## NAME ( \ - NativeModulePtr natM, llvm::BasicBlock *&block, \ - InstPtr ip, llvm::MCInst &inst) {\ + TranslationContext &ctx, llvm::BasicBlock *&block) {\ + auto natM = ctx.natM; \ + auto ip = ctx.natI; \ + auto &inst = ip->get_inst(); \ InstTransResult ret;\ - Inst::Prefix pfx = ip->get_prefix();\ + NativeInst::Prefix pfx = ip->get_prefix();\ switch(pfx) { \ - case Inst::NoPrefix: \ + case NativeInst::NoPrefix: \ block = doCmps(block); \ ret = ContinueBlock; \ break; \ - case Inst::RepPrefix: \ + case NativeInst::RepPrefix: \ ret = doRepeCmps(block); \ break; \ - case Inst::RepNePrefix: \ + case NativeInst::RepNePrefix: \ ret = doRepNeCmps(block); \ break; \ default: \ diff --git a/mc-sema/cfgToLLVM/x86Instrs_bitops.cpp b/mc-sema/cfgToLLVM/x86Instrs_bitops.cpp index 49b501fc6..8703eb999 100644 --- a/mc-sema/cfgToLLVM/x86Instrs_bitops.cpp +++ b/mc-sema/cfgToLLVM/x86Instrs_bitops.cpp @@ -58,12 +58,12 @@ Value *doAndVV32(BasicBlock *&b, Value *o1, Value *o2) { } template -static Value * doAndVV(InstPtr ip, BasicBlock *&b, Value *o1, Value *o2) { +static Value * doAndVV(NativeInstPtr ip, BasicBlock *&b, Value *o1, Value *o2) { return doAndVV(b, o1, o2); } template -static InstTransResult doAndMI(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doAndMI(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &imm) { TASSERT(addr != NULL, ""); TASSERT(imm.isImm(), ""); @@ -79,7 +79,7 @@ static InstTransResult doAndMI(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doAndMV(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doAndMV(NativeInstPtr ip, BasicBlock *&b, Value *addr, Value *rhs) { TASSERT(addr != NULL, ""); TASSERT(rhs != NULL, ""); @@ -94,7 +94,7 @@ static InstTransResult doAndMV(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doAndMR(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doAndMR(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &src) { TASSERT(addr != NULL, ""); TASSERT(src.isReg(), ""); @@ -110,7 +110,7 @@ static InstTransResult doAndMR(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doAndRI(InstPtr ip, BasicBlock *&b, const MCOperand &dst, +static InstTransResult doAndRI(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst, const MCOperand &o1, const MCOperand &o2) { TASSERT(dst.isReg(), ""); TASSERT(o1.isReg(), ""); @@ -125,7 +125,7 @@ static InstTransResult doAndRI(InstPtr ip, BasicBlock *&b, const MCOperand &dst, } template -static InstTransResult doAndRV(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doAndRV(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &o1, const MCOperand &o2) { TASSERT(o2.isReg(), ""); TASSERT(o1.isReg(), ""); @@ -138,7 +138,7 @@ static InstTransResult doAndRV(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doAndRM(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doAndRM(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &o1, const MCOperand &dst) { TASSERT(dst.isReg(), ""); TASSERT(addr != NULL, ""); @@ -153,7 +153,7 @@ static InstTransResult doAndRM(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doAndRR(InstPtr ip, BasicBlock *&b, const MCOperand &dst, +static InstTransResult doAndRR(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst, const MCOperand &o1, const MCOperand &o2) { TASSERT(dst.isReg(), ""); TASSERT(o1.isReg(), ""); @@ -168,7 +168,7 @@ static InstTransResult doAndRR(InstPtr ip, BasicBlock *&b, const MCOperand &dst, } template -static Value * doNotV(InstPtr ip, BasicBlock *&b, Value *v) { +static Value * doNotV(NativeInstPtr ip, BasicBlock *&b, Value *v) { TASSERT(v != NULL, ""); Value *highest = NULL; @@ -200,7 +200,7 @@ static Value * doNotV(InstPtr ip, BasicBlock *&b, Value *v) { } template -static InstTransResult doNotM(InstPtr ip, BasicBlock *&b, Value *a) { +static InstTransResult doNotM(NativeInstPtr ip, BasicBlock *&b, Value *a) { TASSERT(a != NULL, ""); Value *m = M_READ(ip, b, a); @@ -213,7 +213,7 @@ static InstTransResult doNotM(InstPtr ip, BasicBlock *&b, Value *a) { } template -static InstTransResult doNotR(InstPtr ip, BasicBlock *&b, const MCOperand &o) { +static InstTransResult doNotR(NativeInstPtr ip, BasicBlock *&b, const MCOperand &o) { TASSERT(o.isReg(), ""); Value *r = R_READ(b, o.getReg()); @@ -226,7 +226,7 @@ static InstTransResult doNotR(InstPtr ip, BasicBlock *&b, const MCOperand &o) { } template -static Value * doOrVV(InstPtr ip, BasicBlock *&b, Value *o1, Value *o2) { +static Value * doOrVV(NativeInstPtr ip, BasicBlock *&b, Value *o1, Value *o2) { // Do the operation. Value *result = BinaryOperator::Create(Instruction::Or, o1, o2, "", b); @@ -242,7 +242,7 @@ static Value * doOrVV(InstPtr ip, BasicBlock *&b, Value *o1, Value *o2) { } template -static InstTransResult doOrMI(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doOrMI(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &imm) { TASSERT(addr != NULL, ""); TASSERT(imm.isImm(), ""); @@ -258,7 +258,7 @@ static InstTransResult doOrMI(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doOrMV(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doOrMV(NativeInstPtr ip, BasicBlock *&b, Value *addr, Value *rhs) { TASSERT(addr != NULL, ""); TASSERT(rhs != NULL, ""); @@ -273,7 +273,7 @@ static InstTransResult doOrMV(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doOrMR(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doOrMR(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &src) { TASSERT(addr != NULL, ""); TASSERT(src.isReg(), ""); @@ -289,7 +289,7 @@ static InstTransResult doOrMR(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doOrRI(InstPtr ip, BasicBlock *&b, const MCOperand &dst, +static InstTransResult doOrRI(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst, const MCOperand &o1, const MCOperand &o2) { TASSERT(dst.isReg(), ""); TASSERT(o1.isReg(), ""); @@ -304,7 +304,7 @@ static InstTransResult doOrRI(InstPtr ip, BasicBlock *&b, const MCOperand &dst, } template -static InstTransResult doOrRV(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doOrRV(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &o1, const MCOperand &o2) { TASSERT(o2.isReg(), ""); TASSERT(o1.isReg(), ""); @@ -317,7 +317,7 @@ static InstTransResult doOrRV(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doOrRM(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doOrRM(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &o1, const MCOperand &dst) { TASSERT(addr != NULL, ""); TASSERT(o1.isReg(), ""); @@ -332,7 +332,7 @@ static InstTransResult doOrRM(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doOrRR(InstPtr ip, BasicBlock *&b, const MCOperand &dst, +static InstTransResult doOrRR(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst, const MCOperand &o1, const MCOperand &o2) { TASSERT(dst.isReg(), ""); TASSERT(o1.isReg(), ""); @@ -347,7 +347,7 @@ static InstTransResult doOrRR(InstPtr ip, BasicBlock *&b, const MCOperand &dst, } template -static Value * doXorVV(InstPtr ip, BasicBlock *&b, Value *o1, Value *o2) { +static Value * doXorVV(NativeInstPtr ip, BasicBlock *&b, Value *o1, Value *o2) { Value *xoredVal = BinaryOperator::Create(Instruction::Xor, o1, o2, "", b); // Clear CF and OF. @@ -366,7 +366,7 @@ static Value * doXorVV(InstPtr ip, BasicBlock *&b, Value *o1, Value *o2) { } template -static InstTransResult doXorMI(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doXorMI(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &imm) { TASSERT(addr != NULL, ""); TASSERT(imm.isImm(), ""); @@ -381,7 +381,7 @@ static InstTransResult doXorMI(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doXorMV(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doXorMV(NativeInstPtr ip, BasicBlock *&b, Value *addr, Value *rhs) { TASSERT(addr != NULL, ""); TASSERT(rhs != NULL, ""); @@ -395,7 +395,7 @@ static InstTransResult doXorMV(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doXorMR(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doXorMR(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand ®) { TASSERT(addr != NULL, ""); TASSERT(reg.isReg(), ""); @@ -409,7 +409,7 @@ static InstTransResult doXorMR(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doXorRI(InstPtr ip, BasicBlock *&b, const MCOperand &dst, +static InstTransResult doXorRI(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst, const MCOperand &o1, const MCOperand &o2) { TASSERT(dst.isReg(), ""); TASSERT(o1.isReg(), ""); @@ -424,7 +424,7 @@ static InstTransResult doXorRI(InstPtr ip, BasicBlock *&b, const MCOperand &dst, } template -static InstTransResult doXorRV(InstPtr ip, BasicBlock *&b, Value *addr, +static InstTransResult doXorRV(NativeInstPtr ip, BasicBlock *&b, Value *addr, const MCOperand &o1, const MCOperand &o2) { TASSERT(o1.isReg(), ""); TASSERT(o2.isReg(), ""); @@ -437,7 +437,7 @@ static InstTransResult doXorRV(InstPtr ip, BasicBlock *&b, Value *addr, } template -static InstTransResult doXorRM(InstPtr ip, BasicBlock *&b, const MCOperand &dst, +static InstTransResult doXorRM(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst, const MCOperand &src1, Value *mem) { TASSERT(mem != NULL, ""); TASSERT(dst.isReg(), ""); @@ -452,7 +452,7 @@ static InstTransResult doXorRM(InstPtr ip, BasicBlock *&b, const MCOperand &dst, } template -static InstTransResult doXorRR(InstPtr ip, BasicBlock *&b, const MCOperand &dst, +static InstTransResult doXorRR(NativeInstPtr ip, BasicBlock *&b, const MCOperand &dst, const MCOperand &o1, const MCOperand &o2) { TASSERT(dst.isReg(), ""); TASSERT(o1.isReg(), ""); diff --git a/mc-sema/cfgToLLVM/x86Instrs_fpu.cpp b/mc-sema/cfgToLLVM/x86Instrs_fpu.cpp index 814244ac4..e85c7d48b 100644 --- a/mc-sema/cfgToLLVM/x86Instrs_fpu.cpp +++ b/mc-sema/cfgToLLVM/x86Instrs_fpu.cpp @@ -8,7 +8,8 @@ Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or + Redistributions in binary form must reproduce the above copyright notice, this + list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. Neither the name of Trail of Bits nor the names of its @@ -55,15 +56,14 @@ #define MAKEWORD(x, y) (((x) << 8) | (y)) #define MAKE_FOPCODE(x, y) (MAKEWORD(x, y) & 0x7FF) -using namespace llvm; - -static Value* ADDR_TO_POINTER_V(BasicBlock *b, Value *memAddr, Type *ptrType) { +static llvm::Value *ADDR_TO_POINTER_V(llvm::BasicBlock *b, llvm::Value *memAddr, + llvm::Type *ptrType) { if (memAddr->getType()->isPointerTy() == false) { // its an integer, make it a pointer return new llvm::IntToPtrInst(memAddr, ptrType, "", b); } else if (memAddr->getType() != ptrType) { // its a pointer, but of the wrong type - return CastInst::CreatePointerCast(memAddr, ptrType, "", b); + return llvm::CastInst::CreatePointerCast(memAddr, ptrType, "", b); } else { // already correct ptr type return memAddr; @@ -71,43 +71,40 @@ static Value* ADDR_TO_POINTER_V(BasicBlock *b, Value *memAddr, Type *ptrType) { } template -static Value* ADDR_TO_POINTER(BasicBlock *b, Value *memAddr) { +static llvm::Value *ADDR_TO_POINTER(llvm::BasicBlock *b, llvm::Value *memAddr) { NASSERT(memAddr != NULL); - llvm::Type *ptrType = Type::getIntNPtrTy(b->getContext(), width); + auto ptrType = llvm::Type::getIntNPtrTy(b->getContext(), width); return ADDR_TO_POINTER_V(b, memAddr, ptrType); } template -static Value *SHL_NOTXOR_V(llvm::BasicBlock *block, Value *val, - Value *val_to_shift, int shlbits) { - Value *fv = val_to_shift; - Value *nfv = llvm::BinaryOperator::CreateNot(fv, "", block); - Value *nzfv = new llvm::ZExtInst( +static llvm::Value *SHL_NOTXOR_V(llvm::BasicBlock *block, llvm::Value *val, + llvm::Value *val_to_shift, int shlbits) { + auto fv = val_to_shift; + auto nfv = llvm::BinaryOperator::CreateNot(fv, "", block); + auto nzfv = new llvm::ZExtInst( nfv, llvm::Type::getIntNTy(block->getContext(), width), "", block); - Value *shl = llvm::BinaryOperator::CreateShl(nzfv, - CONST_V(block, shlbits), - "", block); - Value *anded = llvm::BinaryOperator::CreateXor(shl, val, "", block); - - return anded; + auto shl = llvm::BinaryOperator::CreateShl(nzfv, + CONST_V(block, shlbits), "", + block); + return llvm::BinaryOperator::CreateXor(shl, val, "", block); } template -static Value *SHL_NOTXOR_FLAG(llvm::BasicBlock *block, Value *val, - MCSemaRegs flag, int shlbits) { - Value *fv = F_READ(block, flag); +static llvm::Value *SHL_NOTXOR_FLAG(llvm::BasicBlock *block, llvm::Value *val, + MCSemaRegs flag, int shlbits) { + auto fv = F_READ(block, flag); return SHL_NOTXOR_V(block, val, fv, shlbits); } -static void SET_FPU_FOPCODE(BasicBlock *&b, uint8_t opcode[4]) { +static void SET_FPU_FOPCODE(llvm::BasicBlock *&b, uint8_t opcode[4]) { //assume we will never set fopcode //uint16_t op = MAKE_FOPCODE(opcode[0], opcode[1]); //Value *op_v = CONST_V<11>(b, op); //F_WRITE(b, FPU_FOPCODE, op_v); - return; } -static void setFpuDataPtr(BasicBlock *&b, Value *dataptr) { +static void setFpuDataPtr(llvm::BasicBlock *&b, llvm::Value *dataptr) { // assume no FPU data //Value *addrInt = new PtrToIntInst( // dataptr, llvm::Type::getInt32Ty(b->getContext()), "", b); @@ -131,70 +128,65 @@ static void setFpuInstPtr(llvm::BasicBlock *&b, //Value *addrInt = CONST_V<32>(b, 0); //F_WRITE(b, FPU_LASTIP_OFF, addrInt); // assume no fpu last ip - return; } static void setFpuInstPtr(llvm::BasicBlock *b) { return setFpuInstPtr(b, b); } -static Value* adjustFpuPrecision(BasicBlock *&b, Value *fpuval) { +static llvm::Value *adjustFpuPrecision(llvm::BasicBlock *&b, + llvm::Value *fpuval) { return fpuval; } -static void FPUF_SET(BasicBlock *&b, MCSemaRegs reg) { +static void FPUF_SET(llvm::BasicBlock *&b, MCSemaRegs reg) { F_WRITE(b, reg, CONST_V<1>(b, 1)); - return; } -static void FPUF_CLEAR(BasicBlock *&b, MCSemaRegs reg) { +static void FPUF_CLEAR(llvm::BasicBlock *&b, MCSemaRegs reg) { F_WRITE(b, reg, CONST_V<1>(b, 0)); - return; } -static Value * CONSTFP_V(BasicBlock *&b, long double val) { - llvm::Type *bTy = llvm::Type::getX86_FP80Ty(b->getContext()); - return ConstantFP::get(bTy, val); +static llvm::Value *CONSTFP_V(llvm::BasicBlock *&b, long double val) { + auto bTy = llvm::Type::getX86_FP80Ty(b->getContext()); + return llvm::ConstantFP::get(bTy, val); } -static Value *doGEPV(BasicBlock *&b, Value *gepindex, MCSemaRegs reg) { - llvm::Type *gepindex_type = gepindex->getType(); - - Value *gep_ext = gepindex; +static llvm::Value *doGEPV(llvm::BasicBlock *&b, llvm::Value *gepindex, + MCSemaRegs reg) { + auto gepindex_type = gepindex->getType(); + auto gep_ext = gepindex; if ( !gepindex_type->isIntegerTy()) throw TErr(__LINE__, __FILE__, "gepindex number is not an integer"); if ( !gepindex_type->isIntegerTy(32)) { // Zero extend to 32 bits. - gep_ext = new ZExtInst(gepindex, llvm::Type::getInt32Ty(b->getContext()), - "", b); + gep_ext = new llvm::ZExtInst(gepindex, + llvm::Type::getInt32Ty(b->getContext()), "", + b); } - Value *stGEPV[] = {CONST_V<32>(b, 0), gep_ext}; - - Value* localgepreg = x86::lookupLocal(b->getParent(), reg); + llvm::Value *stGEPV[] = {CONST_V<32>(b, 0), gep_ext}; + auto localgepreg = x86::lookupLocal(b->getParent(), reg); // Get actual register. - Instruction *gepreg = GetElementPtrInst::CreateInBounds(localgepreg, stGEPV, - "", b); - - return gepreg; + return llvm::GetElementPtrInst::CreateInBounds(localgepreg, stGEPV, "", b); } -static Value *GetFPUTagPtrV(BasicBlock *&b, Value *tagval) { +static llvm::Value *GetFPUTagPtrV(llvm::BasicBlock *&b, llvm::Value *tagval) { auto TagTy = llvm::Type::getIntNTy(b->getContext(), 2); auto TagPtrTy = llvm::PointerType::get(TagTy, 0); return new llvm::BitCastInst(doGEPV(b, tagval, FPU_TAG), TagPtrTy, "", b); } -static Value *GetFPUTagV(BasicBlock *&b, Value *tagval) { - Value *tagptr = GetFPUTagPtrV(b, tagval); - Value *load = noAliasMCSemaScope(new LoadInst(tagptr, "", b)); +static Value *GetFPUTagV(llvm::BasicBlock *&b, llvm::Value *tagval) { + auto tagptr = GetFPUTagPtrV(b, tagval); + auto load = noAliasMCSemaScope(new llvm::LoadInst(tagptr, "", b)); return load; } -static Value *GetFPURegV(BasicBlock *&b, Value *fpureg) { +static llvm::Value *GetFPURegV(llvm::BasicBlock *&b, llvm::Value *fpureg) { // Create GEP array to get local value of ST(regslot). return doGEPV(b, fpureg, ST0); } @@ -202,51 +194,35 @@ static Value *GetFPURegV(BasicBlock *&b, Value *fpureg) { // Map fpreg (a value from the enum of X86::ST0 - X86::ST7 to register slot in // the floating point register array. This maps the i in ST(i) to a slot that // can be used with FPUR_READV/FPUR_WRITEV. -static Value *GetSlotForFPUReg(BasicBlock *&b, unsigned fpreg) { +static llvm::Value *GetSlotForFPUReg(llvm::BasicBlock *&b, unsigned fpreg) { // How far away is this register from ST0? // This is needed to find the correct slot in the FPRegs to read from. - unsigned offset_from_st0 = fpreg - X86::ST0; + unsigned offset_from_st0 = fpreg - llvm::X86::ST0; // Sanity check: there are only 8 FPU registers. - if (offset_from_st0 >= NUM_FPU_REGS) + if (offset_from_st0 >= NUM_FPU_REGS) { throw TErr(__LINE__, __FILE__, "Trying to write to non-existant FPU register"); - - Value *topval = F_READ(b, FPU_TOP); - // Add should overflow automatically. - Value *regslot = BinaryOperator::CreateAdd(topval, - CONST_V<3>(b, offset_from_st0), "", - b); - - NASSERT(regslot != NULL); - - return regslot; + } + auto topval = F_READ(b, FPU_TOP); + return llvm::BinaryOperator::CreateAdd(topval, CONST_V<3>(b, offset_from_st0), + "", b); } -static Value* DECREMENT_FPU_TOP(BasicBlock *&b) { - // Read TOP. - Value *topval = F_READ(b, FPU_TOP); - - Value *dectop = BinaryOperator::CreateSub(topval, CONST_V<3>(b, 1), "", b); - - // Checking for range removed due to operations on 3-bit integers and - // automatic overflow. - +static llvm::Value *DECREMENT_FPU_TOP(llvm::BasicBlock *&b) { + auto topval = F_READ(b, FPU_TOP); + auto dectop = llvm::BinaryOperator::CreateSub(topval, CONST_V<3>(b, 1), "", + b); F_WRITE(b, FPU_TOP, dectop); - return dectop; } // Increments TOP and returns the new value of TOP. -static Value* INCREMENT_FPU_TOP(BasicBlock *&b) { - // Read TOP. - Value *topval = F_READ(b, FPU_TOP); - - // Increment TOP. - Value *inctop = BinaryOperator::CreateAdd(topval, CONST_V<3>(b, 1), "", b); - +static llvm::Value *INCREMENT_FPU_TOP(llvm::BasicBlock *&b) { + auto topval = F_READ(b, FPU_TOP); + auto inctop = llvm::BinaryOperator::CreateAdd(topval, CONST_V<3>(b, 1), "", + b); F_WRITE(b, FPU_TOP, inctop); - return inctop; } @@ -255,26 +231,24 @@ static Value* INCREMENT_FPU_TOP(BasicBlock *&b) { // register slot based on the value of the TOP flag. // So if TOP == 5, then ST(0) references register slot 5, and ST(3) references // register slot 0. -static Value *FPUR_READV(BasicBlock *&b, Value *regslot) { +static llvm::Value *FPUR_READV(llvm::BasicBlock *&b, llvm::Value *regslot) { // Check TAG register // If TAG(regslot) != 0, then we have a problem. - Value *tagval = GetFPUTagV(b, regslot); - Function *F = b->getParent(); + auto tagval = GetFPUTagV(b, regslot); + auto F = b->getParent(); + auto &C = F->getContext(); - BasicBlock *read_normal_block = BasicBlock::Create(b->getContext(), - "fpu_read_normal", F); + auto read_normal_block = llvm::BasicBlock::Create(C, "fpu_read_normal", F); //BasicBlock *read_zero_block = // BasicBlock::Create(b->getContext(), "fpu_read_zero", F); //BasicBlock *read_special_block = // BasicBlock::Create(b->getContext(), "fpu_read_special", F); - BasicBlock *read_empty_block = BasicBlock::Create(b->getContext(), - "fpu_read_empty", F); + auto read_empty_block = llvm::BasicBlock::Create(C, "fpu_read_empty", F); - BasicBlock *fpu_read_continue = BasicBlock::Create(b->getContext(), - "fpu_read_continue", F); + auto fpu_read_continue = llvm::BasicBlock::Create(C, "fpu_read_continue", F); // The default case should never be hit. Use LLVM Switch Node. - SwitchInst *tagSwitch = SwitchInst::Create(tagval, read_empty_block, 4, b); + auto tagSwitch = llvm::SwitchInst::Create(tagval, read_empty_block, 4, b); tagSwitch->addCase(CONST_V<2>(b, FPU_TAG_VALID), read_normal_block); tagSwitch->addCase(CONST_V<2>(b, FPU_TAG_ZERO), read_normal_block); tagSwitch->addCase(CONST_V<2>(b, FPU_TAG_SPECIAL), read_normal_block); @@ -282,13 +256,13 @@ static Value *FPUR_READV(BasicBlock *&b, Value *regslot) { //tagSwitch->addCase(CONST_V<2>(b, 2), read_special_block); //tagSwitch->addCase(CONST_V<2>(b, 3), read_empty_block); - Value *streg = GetFPURegV(read_normal_block, regslot); - Instruction *loadVal = noAliasMCSemaScope( - new LoadInst(streg, "", read_normal_block)); + auto streg = GetFPURegV(read_normal_block, regslot); + auto loadVal = noAliasMCSemaScope( + new llvm::LoadInst(streg, "", read_normal_block)); // C1 is set load needs to round up and cleared otherwise. FPUF_CLEAR(read_normal_block, FPU_C1); - BranchInst::Create(fpu_read_continue, read_normal_block); + llvm::BranchInst::Create(fpu_read_continue, read_normal_block); // Populate read zero block. // This is the zero block. Return zero. @@ -318,13 +292,14 @@ static Value *FPUR_READV(BasicBlock *&b, Value *regslot) { // underflow. // TODO: Throw an exception. FPUF_CLEAR(read_empty_block, FPU_C1); - Value *zval = CONSTFP_V(read_empty_block, 0.0); - BranchInst::Create(fpu_read_continue, read_empty_block); + auto zval = CONSTFP_V(read_empty_block, 0.0); + llvm::BranchInst::Create(fpu_read_continue, read_empty_block); // Populate continue block. // Use phi instruction to determine value that was loaded. - PHINode *whichval = PHINode::Create(Type::getX86_FP80Ty(F->getContext()), 2, - "fpu_switch_phinode", fpu_read_continue); + auto whichval = llvm::PHINode::Create(llvm::Type::getX86_FP80Ty(C), 2, + "fpu_switch_phinode", + fpu_read_continue); whichval->addIncoming(loadVal, read_normal_block); //whichval->addIncoming(zval, read_zero_block); @@ -336,13 +311,12 @@ static Value *FPUR_READV(BasicBlock *&b, Value *regslot) { b = fpu_read_continue; // Read PC flag and adjust precision based on its value. - Value *precision_adjusted = adjustFpuPrecision(b, whichval); - return precision_adjusted; + return adjustFpuPrecision(b, whichval); } // Read the value of X86::STi as specified by fpreg. -static Value *FPUR_READ(BasicBlock *&b, unsigned fpreg) { - Value *regslot = GetSlotForFPUReg(b, fpreg); +static llvm::Value *FPUR_READ(llvm::BasicBlock *&b, unsigned fpreg) { + auto regslot = GetSlotForFPUReg(b, fpreg); return FPUR_READV(b, regslot); } @@ -351,7 +325,8 @@ static Value *FPUR_READ(BasicBlock *&b, unsigned fpreg) { // register slot based of the value of the TOP flag. // So if TOP == 5, ST(0) references register slot 5, and ST(3) references // register slot 0. -static void FPUR_WRITEV(BasicBlock *&b, Value *regslot, Value *val) { +static void FPUR_WRITEV(llvm::BasicBlock *&b, llvm::Value *regslot, + llvm::Value *val) { CREATE_BLOCK(fpu_write, b); CREATE_BLOCK(fpu_exception, b); @@ -364,36 +339,36 @@ static void FPUR_WRITEV(BasicBlock *&b, Value *regslot, Value *val) { // if so, then we will overflow. Need to throw exception. // Get ptr to FPU register. - Value *streg = GetFPURegV(b, regslot); - Value *tagReg = GetFPUTagPtrV(b, regslot); - Instruction *tagVal = noAliasMCSemaScope(new LoadInst(tagReg, "", b)); + auto streg = GetFPURegV(b, regslot); + auto tagReg = GetFPUTagPtrV(b, regslot); + auto tagVal = noAliasMCSemaScope(new llvm::LoadInst(tagReg, "", b)); // If tag != empty, then throw exception. - Value *cmp_inst = new ICmpInst( *b, ICmpInst::ICMP_EQ, tagVal, - CONST_V<2>(b, FPU_TAG_EMPTY)); + auto cmp_inst = new llvm::ICmpInst( *b, llvm::ICmpInst::ICMP_EQ, tagVal, + CONST_V<2>(b, FPU_TAG_EMPTY)); - BranchInst::Create(block_fpu_write, block_fpu_exception, cmp_inst, b); + llvm::BranchInst::Create(block_fpu_write, block_fpu_exception, cmp_inst, b); // Set up block_fpu_exception. // TODO: real exception throwing. // For now, just set C1 and branch to write anyway. FPUF_SET(block_fpu_exception, FPU_C1); - BranchInst::Create(block_fpu_write, block_fpu_exception); + llvm::BranchInst::Create(block_fpu_write, block_fpu_exception); // Default block is now block_fpu_write. b = block_fpu_write; // Write 0 to tagReg. FPUF_CLEAR(b, FPU_C1); - Instruction *storeVal_normal = noAliasMCSemaScope( - new StoreInst(CONST_V<2>(b, FPU_TAG_VALID), tagReg, b)); + auto storeVal_normal = noAliasMCSemaScope( + new llvm::StoreInst(CONST_V<2>(b, FPU_TAG_VALID), tagReg, b)); NASSERT(storeVal_normal != NULL); // This is used later, but is needed now so things can branch to it. CREATE_BLOCK(fpu_write_exit, b); - BranchInst::Create(block_fpu_write_exit, b); + llvm::BranchInst::Create(block_fpu_write_exit, b); // Write 1 to tagReg. //CREATE_BLOCK(fpu_write_zero, b); @@ -432,49 +407,51 @@ static void FPUR_WRITEV(BasicBlock *&b, Value *regslot, Value *val) { // block_fpu_write_zero, block_fpu_write_normal, is_poszero, b); b = block_fpu_write_exit; - Value *precision_adjusted = adjustFpuPrecision(b, val); + auto precision_adjusted = adjustFpuPrecision(b, val); // Store value into local ST register array. - Instruction *storeVal = noAliasMCSemaScope( - new StoreInst(precision_adjusted, streg, b)); + auto storeVal = noAliasMCSemaScope( + new llvm::StoreInst(precision_adjusted, streg, b)); NASSERT(storeVal != NULL); } // Write val to X86::STi (specified by fpreg). -static void FPUR_WRITE(BasicBlock *&b, unsigned fpreg, Value *val) { +static void FPUR_WRITE(llvm::BasicBlock *&b, unsigned fpreg, llvm::Value *val) { // Map fpreg to register slot in the register array. Value *regslot = GetSlotForFPUReg(b, fpreg); FPUR_WRITEV(b, regslot, val); } // Decrement Top, set ST(TOP) = fpuval. -static void FPU_PUSHV(BasicBlock *&b, Value *fpuval) { - Value *new_top = DECREMENT_FPU_TOP(b); - Value *ext_top = new ZExtInst(new_top, Type::getInt32Ty(b->getContext()), "", - b); +static void FPU_PUSHV(llvm::BasicBlock *&b, llvm::Value *fpuval) { + auto new_top = DECREMENT_FPU_TOP(b); + auto ext_top = new llvm::ZExtInst(new_top, + llvm::Type::getInt32Ty(b->getContext()), "", + b); // The FPUR_WRITEV will mark the currentTOP as valid in the tag registers. FPUR_WRITEV(b, ext_top, fpuval); } -static void FPU_POP(BasicBlock *&b) { +static void FPU_POP(llvm::BasicBlock *&b) { // Set tag at current top as empty. - Value *topslot = GetSlotForFPUReg(b, X86::ST0); - Value *tagReg = GetFPUTagPtrV(b, topslot); + auto topslot = GetSlotForFPUReg(b, llvm::X86::ST0); + auto tagReg = GetFPUTagPtrV(b, topslot); // Should an exception be thrown if an empty FPU value is popped without // being used? - Value *empty_the_tag = noAliasMCSemaScope( - new StoreInst(CONST_V<2>(b, FPU_TAG_EMPTY), tagReg, b)); + auto empty_the_tag = noAliasMCSemaScope( + new llvm::StoreInst(CONST_V<2>(b, FPU_TAG_EMPTY), tagReg, b)); NASSERT(empty_the_tag != NULL); INCREMENT_FPU_TOP(b); } -static Value *FPUM_READ(InstPtr ip, int memwidth, llvm::BasicBlock *&b, - Value *addr) { - Value *readLoc = addr; - llvm::Type *ptrTy; +static llvm::Value *FPUM_READ(NativeInstPtr ip, int memwidth, + llvm::BasicBlock *&b, llvm::Value *addr) { + auto &C = b->getContext(); + auto readLoc = addr; + llvm::Type *ptrTy = nullptr; unsigned addrspace = ip->get_addr_space(); switch (memwidth) { @@ -482,13 +459,13 @@ static Value *FPUM_READ(InstPtr ip, int memwidth, llvm::BasicBlock *&b, throw TErr(__LINE__, __FILE__, "HALFPTR TYPE NOT YET SUPPORTED!"); break; case 32: - ptrTy = llvm::Type::getFloatPtrTy(b->getContext(), addrspace); + ptrTy = llvm::Type::getFloatPtrTy(C, addrspace); break; case 64: - ptrTy = llvm::Type::getDoublePtrTy(b->getContext(), addrspace); + ptrTy = llvm::Type::getDoublePtrTy(C, addrspace); break; case 80: - ptrTy = llvm::Type::getX86_FP80PtrTy(b->getContext(), addrspace); + ptrTy = llvm::Type::getX86_FP80PtrTy(C, addrspace); break; default: throw TErr(__LINE__, __FILE__, "FPU TYPE NOT IMPLEMENTED!"); @@ -497,15 +474,14 @@ static Value *FPUM_READ(InstPtr ip, int memwidth, llvm::BasicBlock *&b, readLoc = ADDR_TO_POINTER_V(b, addr, ptrTy); - Value *read = noAliasMCSemaScope(new llvm::LoadInst(readLoc, "", b)); + auto read = noAliasMCSemaScope(new llvm::LoadInst(readLoc, "", b)); // Convert precision - this is here for cases like FPU compares where the // compare would fail unless both precisions were adjusted. - Value *extended; + llvm::Value *extended = nullptr; if (memwidth < 80) { - extended = new FPExtInst(read, llvm::Type::getX86_FP80Ty(b->getContext()), - "", b); + extended = new llvm::FPExtInst(read, llvm::Type::getX86_FP80Ty(C), "", b); } else if (memwidth == 80) { extended = read; } else { @@ -513,21 +489,19 @@ static Value *FPUM_READ(InstPtr ip, int memwidth, llvm::BasicBlock *&b, } // Precision adjust works on 80-bit FPU. - Value *precision_adjusted = adjustFpuPrecision(b, extended); + auto precision_adjusted = adjustFpuPrecision(b, extended); // Re-truncate back to requested size. - Value *returnval; + llvm::Value *returnval = nullptr; switch (memwidth) { case 32: - returnval = new FPTruncInst(precision_adjusted, - llvm::Type::getFloatTy(b->getContext()), "", - b); + returnval = new FPTruncInst(precision_adjusted, llvm::Type::getFloatTy(C), + "", b); break; case 64: returnval = new FPTruncInst(precision_adjusted, - llvm::Type::getDoubleTy(b->getContext()), "", - b); + llvm::Type::getDoubleTy(C), "", b); break; case 80: // Do nothing. @@ -543,49 +517,49 @@ static Value *FPUM_READ(InstPtr ip, int memwidth, llvm::BasicBlock *&b, // Create a new basic block and jump to it from the previous block. // This is used to set the last FPU instruction pointer via BlockAddr later. -static BasicBlock *createNewFpuBlock(Function *F, BasicBlock *&b, - std::string instname) { - BasicBlock* newb = BasicBlock::Create(F->getContext(), - ("fpuinst_" + instname), F); - Value *br = BranchInst::Create(newb, b); - - NASSERT(br != NULL); - +static llvm::BasicBlock *createNewFpuBlock(llvm::Function *F, + llvm::BasicBlock *&b, + std::string instname) { + auto newb = llvm::BasicBlock::Create( + F->getContext(), ("fpuinst_" + instname), F); + (void) llvm::BranchInst::Create(newb, b); return newb; } -static BasicBlock * createNewFpuBlock(BasicBlock *&b, std::string instName) { +static llvm::BasicBlock *createNewFpuBlock(llvm::BasicBlock *&b, + std::string instName) { return createNewFpuBlock(b->getParent(), b, instName); } #define SET_STRUCT_MEMBER(st, index, member, b) do {\ - Value *stGEPV[] = {\ + llvm::Value *stGEPV[] = {\ CONST_V<32>(b, 0),\ CONST_V<32>(b, index) };\ - Instruction *gepreg = GetElementPtrInst::CreateInBounds(st, stGEPV, "", b);\ - Value *storeIt = noAliasMCSemaScope(new StoreInst(member, gepreg, b));\ + auto gepreg = llvm::GetElementPtrInst::CreateInBounds(st, stGEPV, "", b);\ + auto storeIt = noAliasMCSemaScope(new llvm::StoreInst(member, gepreg, b));\ NASSERT(storeIt != NULL);\ } while(0); template -static InstTransResult doFiOpMR(InstPtr ip, BasicBlock *&b, unsigned dstReg, - Value *memAddr, unsigned opcode, +static InstTransResult doFiOpMR(NativeInstPtr ip, llvm::BasicBlock *&b, + unsigned dstReg, llvm::Value *memAddr, + unsigned opcode, llvm::Instruction::BinaryOps fpop) { // Read register. - Value *dstVal = FPUR_READ(b, dstReg); + auto dstVal = FPUR_READ(b, dstReg); // Read memory value. - Value *memVal = M_READ(ip, b, memAddr); + auto memVal = M_READ(ip, b, memAddr); - Value *fp_mem_val = llvm::CastInst::Create( + auto fp_mem_val = llvm::CastInst::Create( llvm::Instruction::SIToFP, memVal, llvm::Type::getX86_FP80Ty(b->getContext()), "", b); - Value *result; + llvm::Value *result = nullptr; if (reverse == false) { - result = BinaryOperator::Create(fpop, dstVal, fp_mem_val, "", b); + result = llvm::BinaryOperator::Create(fpop, dstVal, fp_mem_val, "", b); } else { - result = BinaryOperator::Create(fpop, fp_mem_val, dstVal, "", b); + result = llvm::BinaryOperator::Create(fpop, fp_mem_val, dstVal, "", b); } // Store result in dstReg. @@ -597,25 +571,26 @@ static InstTransResult doFiOpMR(InstPtr ip, BasicBlock *&b, unsigned dstReg, } template -static InstTransResult doFOpMR(InstPtr ip, BasicBlock *&b, unsigned dstReg, - Value *memAddr, unsigned opcode, +static InstTransResult doFOpMR(NativeInstPtr ip, llvm::BasicBlock *&b, + unsigned dstReg, llvm::Value *memAddr, + unsigned opcode, llvm::Instruction::BinaryOps fpop) { // Read register. - Value *dstVal = FPUR_READ(b, dstReg); + auto dstVal = FPUR_READ(b, dstReg); // Read memory value. - Value *memVal = FPUM_READ(ip, width, b, memAddr); + auto memVal = FPUM_READ(ip, width, b, memAddr); // Extend memory value to be native FPU type. - Value *extVal = new FPExtInst(memVal, - llvm::Type::getX86_FP80Ty(b->getContext()), "", - b); + auto extVal = new llvm::FPExtInst(memVal, + llvm::Type::getX86_FP80Ty(b->getContext()), + "", b); - Value *result; - if (reverse == false) { - result = BinaryOperator::Create(fpop, dstVal, extVal, "", b); + llvm::Value *result = nullptr; + if ( !reverse) { + result = llvm::BinaryOperator::Create(fpop, dstVal, extVal, "", b); } else { - result = BinaryOperator::Create(fpop, extVal, dstVal, "", b); + result = llvm::BinaryOperator::Create(fpop, extVal, dstVal, "", b); } // Store result in dstReg. @@ -626,20 +601,21 @@ static InstTransResult doFOpMR(InstPtr ip, BasicBlock *&b, unsigned dstReg, } template -static InstTransResult doFOpRR(InstPtr ip, BasicBlock *&b, unsigned srcReg, - unsigned dstReg, unsigned opcode, +static InstTransResult doFOpRR(NativeInstPtr ip, llvm::BasicBlock *&b, + unsigned srcReg, unsigned dstReg, + unsigned opcode, llvm::Instruction::BinaryOps fpop) { // Load source. - Value *srcVal = FPUR_READ(b, srcReg); + auto srcVal = FPUR_READ(b, srcReg); // Load destination. - Value *dstVal = FPUR_READ(b, dstReg); + auto dstVal = FPUR_READ(b, dstReg); - Value *result; - if (reverse == false) { - result = BinaryOperator::Create(fpop, srcVal, dstVal, "", b); + llvm::Value *result = nullptr; + if ( !reverse) { + result = llvm::BinaryOperator::Create(fpop, srcVal, dstVal, "", b); } else { - result = BinaryOperator::Create(fpop, dstVal, srcVal, "", b); + result = llvm::BinaryOperator::Create(fpop, dstVal, srcVal, "", b); } // Store result in dstReg. @@ -653,8 +629,9 @@ static InstTransResult doFOpRR(InstPtr ip, BasicBlock *&b, unsigned srcReg, } template -static InstTransResult doFOpPRR(InstPtr ip, BasicBlock *&b, unsigned srcReg, - unsigned dstReg, unsigned opcode, +static InstTransResult doFOpPRR(NativeInstPtr ip, llvm::BasicBlock *&b, + unsigned srcReg, unsigned dstReg, + unsigned opcode, llvm::Instruction::BinaryOps fpop) { // Do the operation. doFOpRR(ip, b, srcReg, dstReg, opcode, fpop); @@ -666,11 +643,10 @@ static InstTransResult doFOpPRR(InstPtr ip, BasicBlock *&b, unsigned srcReg, return ContinueBlock; } -static InstTransResult doFldcw(InstPtr ip, BasicBlock *&b, Value *memAddr) { - Value *memPtr = ADDR_TO_POINTER<16>(b, memAddr); - - Value *memVal = M_READ<16>(ip, b, memPtr); - +static InstTransResult doFldcw(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *memAddr) { + auto memPtr = ADDR_TO_POINTER<16>(b, memAddr); + auto memVal = M_READ<16>(ip, b, memPtr); SHR_SET_FLAG<16, 1>(b, memVal, FPU_IM, 0); SHR_SET_FLAG<16, 1>(b, memVal, FPU_DM, 1); SHR_SET_FLAG<16, 1>(b, memVal, FPU_ZM, 2); @@ -680,16 +656,15 @@ static InstTransResult doFldcw(InstPtr ip, BasicBlock *&b, Value *memAddr) { SHR_SET_FLAG<16, 2>(b, memVal, FPU_PC, 8); SHR_SET_FLAG<16, 2>(b, memVal, FPU_RC, 10); SHR_SET_FLAG<16, 1>(b, memVal, FPU_X, 12); - return ContinueBlock; } -static InstTransResult doFstcw(InstPtr ip, BasicBlock *&b, Value *memAddr) { - Value *memPtr = ADDR_TO_POINTER<16>(b, memAddr); +static InstTransResult doFstcw(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *memAddr) { + auto memPtr = ADDR_TO_POINTER<16>(b, memAddr); // Pre-clear reserved FPU bits. - Value *cw = CONST_V<16>(b, 0x1F7F); - + llvm::Value *cw = CONST_V<16>(b, 0x1F7F); cw = SHL_NOTXOR_FLAG<16>(b, cw, FPU_IM, 0); cw = SHL_NOTXOR_FLAG<16>(b, cw, FPU_DM, 1); cw = SHL_NOTXOR_FLAG<16>(b, cw, FPU_ZM, 2); @@ -700,20 +675,20 @@ static InstTransResult doFstcw(InstPtr ip, BasicBlock *&b, Value *memAddr) { cw = SHL_NOTXOR_FLAG<16>(b, cw, FPU_RC, 10); cw = SHL_NOTXOR_FLAG<16>(b, cw, FPU_X, 12); - Value *store = noAliasMCSemaScope(new StoreInst(cw, memPtr, b)); + (void) noAliasMCSemaScope(new llvm::StoreInst(cw, memPtr, b)); return ContinueBlock; } -static InstTransResult doFstenv(InstPtr ip, BasicBlock *&b, Value *memAddr) { - llvm::Module *M = b->getParent()->getParent(); +static InstTransResult doFstenv(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *memAddr) { + auto M = b->getParent()->getParent(); unsigned int bitWidth = ArchPointerSize(M); - Value *memPtr = ADDR_TO_POINTER<8>(b, memAddr); + auto memPtr = ADDR_TO_POINTER<8>(b, memAddr); // Pre-clear reserved FPU bits. - Value *cw = CONST_V<32>(b, 0xFFFF1F7F); - + llvm::Value *cw = CONST_V<32>(b, 0xFFFF1F7F); cw = SHL_NOTXOR_FLAG<32>(b, cw, FPU_IM, 0); cw = SHL_NOTXOR_FLAG<32>(b, cw, FPU_DM, 1); cw = SHL_NOTXOR_FLAG<32>(b, cw, FPU_ZM, 2); @@ -724,8 +699,7 @@ static InstTransResult doFstenv(InstPtr ip, BasicBlock *&b, Value *memAddr) { cw = SHL_NOTXOR_FLAG<32>(b, cw, FPU_RC, 10); cw = SHL_NOTXOR_FLAG<32>(b, cw, FPU_X, 12); - Value *sw = CONST_V<32>(b, 0xFFFFFFFF); - + llvm::Value *sw = CONST_V<32>(b, 0xFFFFFFFF); sw = SHL_NOTXOR_FLAG<32>(b, sw, FPU_IE, 0); sw = SHL_NOTXOR_FLAG<32>(b, sw, FPU_DE, 1); sw = SHL_NOTXOR_FLAG<32>(b, sw, FPU_ZE, 2); @@ -741,8 +715,7 @@ static InstTransResult doFstenv(InstPtr ip, BasicBlock *&b, Value *memAddr) { sw = SHL_NOTXOR_FLAG<32>(b, sw, FPU_C3, 14); sw = SHL_NOTXOR_FLAG<32>(b, sw, FPU_B, 15); - Value *tw = CONST_V<32>(b, 0xFFFFFFFF); - + llvm::Value *tw = CONST_V<32>(b, 0xFFFFFFFF); tw = SHL_NOTXOR_V<32>(b, tw, GetFPUTagV(b, CONST_V<32>(b, 0)), 0); tw = SHL_NOTXOR_V<32>(b, tw, GetFPUTagV(b, CONST_V<32>(b, 1)), 2); tw = SHL_NOTXOR_V<32>(b, tw, GetFPUTagV(b, CONST_V<32>(b, 2)), 4); @@ -752,16 +725,16 @@ static InstTransResult doFstenv(InstPtr ip, BasicBlock *&b, Value *memAddr) { tw = SHL_NOTXOR_V<32>(b, tw, GetFPUTagV(b, CONST_V<32>(b, 6)), 12); tw = SHL_NOTXOR_V<32>(b, tw, GetFPUTagV(b, CONST_V<32>(b, 7)), 14); - Value *fpu_ip = F_READ(b, FPU_LASTIP_OFF); - Value *fpu_seg_op = CONST_V<32>(b, 0x0); + auto fpu_ip = F_READ(b, FPU_LASTIP_OFF); + llvm::Value *fpu_seg_op = CONST_V<32>(b, 0x0); fpu_seg_op = SHL_NOTXOR_V<32>(b, fpu_seg_op, F_READ(b, FPU_LASTIP_SEG), 0); fpu_seg_op = SHL_NOTXOR_V<32>(b, fpu_seg_op, F_READ(b, FPU_FOPCODE), 16); - Value *fpu_dp_o = F_READ(b, FPU_LASTDATA_OFF); - Value *fpu_dp_s = CONST_V<32>(b, 0xFFFFFFFF); + auto fpu_dp_o = F_READ(b, FPU_LASTDATA_OFF); + llvm::Value *fpu_dp_s = CONST_V<32>(b, 0xFFFFFFFF); fpu_dp_s = SHL_NOTXOR_V<32>(b, fpu_dp_s, F_READ(b, FPU_LASTDATA_SEG), 0); - StructType *fpuenv_t = StructType::create(b->getContext(), "struct.fpuenv"); - std::vector envfields; + auto fpuenv_t = llvm::StructType::create(b->getContext(), "struct.fpuenv"); + std::vector envfields; envfields.push_back(Type::getInt32Ty(b->getContext())); envfields.push_back(Type::getInt32Ty(b->getContext())); envfields.push_back(Type::getInt32Ty(b->getContext())); @@ -772,9 +745,9 @@ static InstTransResult doFstenv(InstPtr ip, BasicBlock *&b, Value *memAddr) { fpuenv_t->setBody(envfields, true); //make a pointer type for struct.fpuenv - PointerType *ptype = PointerType::get(fpuenv_t, 0); + auto ptype = llvm::PointerType::get(fpuenv_t, 0); //cast memPtr to a pointer to struct.fpuenv * - Value *k = new BitCastInst(memPtr, ptype, "", b); + llvm::Value *k = new llvm::BitCastInst(memPtr, ptype, "", b); //perform field writes SET_STRUCT_MEMBER(k, 0, cw, b); SET_STRUCT_MEMBER(k, 1, sw, b); @@ -788,13 +761,14 @@ static InstTransResult doFstenv(InstPtr ip, BasicBlock *&b, Value *memAddr) { } template -static InstTransResult doFildM(InstPtr ip, BasicBlock *&b, Value *memAddr) { +static InstTransResult doFildM(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *memAddr) { NASSERT(memAddr != NULL); // Read memory value. - Value *memVal = M_READ(ip, b, memAddr); + auto memVal = M_READ(ip, b, memAddr); - Value *fp_mem_val = llvm::CastInst::Create( + auto fp_mem_val = llvm::CastInst::Create( llvm::Instruction::SIToFP, memVal, llvm::Type::getX86_FP80Ty(b->getContext()), "", b); @@ -807,18 +781,19 @@ static InstTransResult doFildM(InstPtr ip, BasicBlock *&b, Value *memAddr) { } template -static InstTransResult doFldM(InstPtr ip, BasicBlock *&b, Value *memAddr) { +static InstTransResult doFldM(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *memAddr) { NASSERT(memAddr != NULL); // Step 1: read value from memory. - Value *memVal = FPUM_READ(ip, width, b, memAddr); + auto memVal = FPUM_READ(ip, width, b, memAddr); // Step 2: Convert value to x87 double precision FP. - llvm::Type *fpuType = llvm::Type::getX86_FP80Ty(b->getContext()); - Value *fpuVal; + auto fpuType = llvm::Type::getX86_FP80Ty(b->getContext()); + llvm::Value *fpuVal = nullptr; if ( !memVal->getType()->isX86_FP80Ty()) { - fpuVal = new FPExtInst(memVal, fpuType, "", b); + fpuVal = new llvm::FPExtInst(memVal, fpuType, "", b); } else { fpuVal = memVal; } @@ -834,21 +809,23 @@ static InstTransResult doFldM(InstPtr ip, BasicBlock *&b, Value *memAddr) { return ContinueBlock; } -static InstTransResult doFldC(InstPtr ip, BasicBlock *&b, long double constv) { +static InstTransResult doFldC(NativeInstPtr ip, llvm::BasicBlock *&b, + long double constv) { // load constant onto FPU stack - Value *fp_const = CONSTFP_V(b, constv); + auto fp_const = CONSTFP_V(b, constv); FPU_PUSHV(b, fp_const); return ContinueBlock; } -static InstTransResult doFldR(InstPtr ip, BasicBlock *&b, const MCOperand &r) { +static InstTransResult doFldR(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &r) { // Make sure that this is a register. NASSERT(r.isReg()); // Read register. - Value *srcVal = FPUR_READ(b, r.getReg()); + auto srcVal = FPUR_READ(b, r.getReg()); // Push value on stack. FPU_PUSHV(b, srcVal); @@ -858,14 +835,14 @@ static InstTransResult doFldR(InstPtr ip, BasicBlock *&b, const MCOperand &r) { } template -static InstTransResult doFistM(InstPtr ip, BasicBlock *&b, Value *memAddr) { +static InstTransResult doFistM(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *memAddr) { NASSERT(memAddr != NULL); - Value *regVal = FPUR_READ(b, X86::ST0); - - Value *ToInt = llvm::CastInst::Create(llvm::Instruction::FPToSI, regVal, - Type::getIntNTy(b->getContext(), width), - "", b); + auto regVal = FPUR_READ(b, llvm::X86::ST0); + auto ToInt = llvm::CastInst::Create( + llvm::Instruction::FPToSI, regVal, + llvm::Type::getIntNTy(b->getContext(), width), "", b); M_WRITE(ip, b, memAddr, ToInt); @@ -874,26 +851,27 @@ static InstTransResult doFistM(InstPtr ip, BasicBlock *&b, Value *memAddr) { } template -static InstTransResult doFstM(InstPtr ip, BasicBlock *&b, Value *memAddr) { +static InstTransResult doFstM(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *memAddr) { NASSERT(memAddr != NULL); - - Value *regVal = FPUR_READ(b, X86::ST0); - llvm::Type *destType; - llvm::Type *ptrType; + auto &C = b->getContext(); + auto regVal = FPUR_READ(b, X86::ST0); + llvm::Type *destType = nullptr; + llvm::Type *ptrType = nullptr; unsigned addrspace = ip->get_addr_space(); switch (width) { case 32: - destType = llvm::Type::getFloatTy(b->getContext()); - ptrType = llvm::Type::getFloatPtrTy(b->getContext(), addrspace); + destType = llvm::Type::getFloatTy(C); + ptrType = llvm::Type::getFloatPtrTy(C, addrspace); break; case 64: - destType = llvm::Type::getDoubleTy(b->getContext()); - ptrType = llvm::Type::getDoublePtrTy(b->getContext(), addrspace); + destType = llvm::Type::getDoubleTy(C); + ptrType = llvm::Type::getDoublePtrTy(C, addrspace); break; case 80: - //destType = llvm::Type::getX86_FP80Ty(b->getContext()); - ptrType = llvm::Type::getX86_FP80PtrTy(b->getContext(), addrspace); + //destType = llvm::Type::getX86_FP80Ty(C); + ptrType = llvm::Type::getX86_FP80PtrTy(C, addrspace); break; default: throw TErr(__LINE__, __FILE__, "Invalid width specified for FST"); @@ -902,7 +880,7 @@ static InstTransResult doFstM(InstPtr ip, BasicBlock *&b, Value *memAddr) { // do not truncate 80-bit to 80-bit, causes a truncation error if (width < 80) { - Value *trunc = new FPTruncInst(regVal, destType, "", b); + auto trunc = new llvm::FPTruncInst(regVal, destType, "", b); M_WRITE_T(ip, b, memAddr, trunc, ptrType); } else if (width == 80) { M_WRITE_T(ip, b, memAddr, regVal, ptrType); @@ -916,7 +894,8 @@ static InstTransResult doFstM(InstPtr ip, BasicBlock *&b, Value *memAddr) { } template -static InstTransResult doFstpM(InstPtr ip, BasicBlock *&b, Value *memAddr) { +static InstTransResult doFstpM(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *memAddr) { // Do the FST. doFstM(ip, b, memAddr); @@ -930,7 +909,8 @@ static InstTransResult doFstpM(InstPtr ip, BasicBlock *&b, Value *memAddr) { // TODO: This is like FISTP, but FISTTP does not check rounding mode and // always rounds to zero. template -static InstTransResult doFistTpM(InstPtr ip, BasicBlock *&b, Value *memAddr) { +static InstTransResult doFistTpM(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *memAddr) { // Do the FST. doFistM(ip, b, memAddr); @@ -942,7 +922,8 @@ static InstTransResult doFistTpM(InstPtr ip, BasicBlock *&b, Value *memAddr) { } template -static InstTransResult doFistpM(InstPtr ip, BasicBlock *&b, Value *memAddr) { +static InstTransResult doFistpM(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *memAddr) { // Do the FST. doFistM(ip, b, memAddr); @@ -953,12 +934,13 @@ static InstTransResult doFistpM(InstPtr ip, BasicBlock *&b, Value *memAddr) { return ContinueBlock; } -static InstTransResult doFstR(InstPtr ip, BasicBlock *&b, const MCOperand &r) { +static InstTransResult doFstR(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &r) { // Make sure that this is a register. NASSERT(r.isReg()); // Read ST0. - Value *srcVal = FPUR_READ(b, X86::ST0); + auto srcVal = FPUR_READ(b, llvm::X86::ST0); // Write register. FPUR_WRITE(b, r.getReg(), srcVal); @@ -967,7 +949,8 @@ static InstTransResult doFstR(InstPtr ip, BasicBlock *&b, const MCOperand &r) { return ContinueBlock; } -static InstTransResult doFstpR(InstPtr ip, BasicBlock *&b, const MCOperand &r) { +static InstTransResult doFstpR(NativeInstPtr ip, llvm::BasicBlock *&b, + const llvm::MCOperand &r) { // Do the FST. doFstR(ip, b, r); @@ -978,22 +961,22 @@ static InstTransResult doFstpR(InstPtr ip, BasicBlock *&b, const MCOperand &r) { return ContinueBlock; } -static InstTransResult doFsin(InstPtr ip, BasicBlock *&b, unsigned reg) { - Module *M = b->getParent()->getParent(); - - Value *regval = FPUR_READ(b, reg); +static InstTransResult doFsin(NativeInstPtr ip, llvm::BasicBlock *&b, + unsigned reg) { + auto M = b->getParent()->getParent(); + auto regval = FPUR_READ(b, reg); // get a declaration for llvm.fsin - Type *t = llvm::Type::getX86_FP80Ty(b->getContext()); - Function *fsin_func = Intrinsic::getDeclaration(M, Intrinsic::sin, t); + auto t = llvm::Type::getX86_FP80Ty(b->getContext()); + auto fsin_func = llvm::Intrinsic::getDeclaration(M, llvm::Intrinsic::sin, t); NASSERT(fsin_func != NULL); // call llvm.fsin(reg) - std::vector args; + std::vector args; args.push_back(regval); - Value *fsin_val = CallInst::Create(fsin_func, args, "", b); + auto fsin_val = llvm::CallInst::Create(fsin_func, args, "", b); // store return in reg FPUR_WRITE(b, reg, fsin_val); @@ -1001,20 +984,22 @@ static InstTransResult doFsin(InstPtr ip, BasicBlock *&b, unsigned reg) { return ContinueBlock; } -static InstTransResult doFucom(InstPtr ip, BasicBlock *&b, unsigned reg, - unsigned int stackPops) { - Value *st0_val = FPUR_READ(b, X86::ST0); - Value *sti_val = FPUR_READ(b, reg); +static InstTransResult doFucom(NativeInstPtr ip, llvm::BasicBlock *&b, + unsigned reg, unsigned int stackPops) { + auto st0_val = FPUR_READ(b, llvm::X86::ST0); + auto sti_val = FPUR_READ(b, reg); // TODO: Make sure these treat negative zero and positive zero // as the same value. - Value *is_lt = new FCmpInst( *b, FCmpInst::FCMP_ULT, st0_val, sti_val); - Value *is_eq = new FCmpInst( *b, FCmpInst::FCMP_UEQ, st0_val, sti_val); + auto is_lt = new llvm::FCmpInst( *b, llvm::FCmpInst::FCMP_ULT, st0_val, + sti_val); + auto is_eq = new llvm::FCmpInst( *b, llvm::FCmpInst::FCMP_UEQ, st0_val, + sti_val); // if BOTH the equql AND less than is true // it means that one of the ops is a QNaN - Value *lt_and_eq = BinaryOperator::CreateAnd(is_lt, is_eq, "", b); + auto lt_and_eq = llvm::BinaryOperator::CreateAnd(is_lt, is_eq, "", b); F_WRITE(b, FPU_C0, is_lt); // C0 is 1 if either is QNaN or op1 < op2 F_WRITE(b, FPU_C3, is_eq); // C3 is 1 if either is QNaN or op1 == op2 @@ -1028,20 +1013,22 @@ static InstTransResult doFucom(InstPtr ip, BasicBlock *&b, unsigned reg, return ContinueBlock; } -static InstTransResult doFucomi(InstPtr ip, BasicBlock *&b, unsigned reg, - unsigned int stackPops) { - Value *st0_val = FPUR_READ(b, X86::ST0); - Value *sti_val = FPUR_READ(b, reg); +static InstTransResult doFucomi(NativeInstPtr ip, llvm::BasicBlock *&b, + unsigned reg, unsigned int stackPops) { + auto st0_val = FPUR_READ(b, llvm::X86::ST0); + auto sti_val = FPUR_READ(b, reg); // TODO: Make sure these treat negative zero and positive zero // as the same value. - Value *is_lt = new FCmpInst( *b, FCmpInst::FCMP_ULT, st0_val, sti_val); - Value *is_eq = new FCmpInst( *b, FCmpInst::FCMP_UEQ, st0_val, sti_val); + auto is_lt = new llvm::FCmpInst( *b, llvm::FCmpInst::FCMP_ULT, st0_val, + sti_val); + auto is_eq = new llvm::FCmpInst( *b, llvm::FCmpInst::FCMP_UEQ, st0_val, + sti_val); // if BOTH the equql AND less than is true // it means that one of the ops is a QNaN - Value *lt_and_eq = BinaryOperator::CreateAnd(is_lt, is_eq, "", b); + auto lt_and_eq = llvm::BinaryOperator::CreateAnd(is_lt, is_eq, "", b); F_WRITE(b, CF, is_lt); // C0 is 1 if either is QNaN or op1 < op2 F_WRITE(b, ZF, is_eq); // C3 is 1 if either is QNaN or op1 == op2 @@ -1055,10 +1042,8 @@ static InstTransResult doFucomi(InstPtr ip, BasicBlock *&b, unsigned reg, return ContinueBlock; } -static Value* doFstsV(BasicBlock *&b) { - - Value *sw = CONST_V<16>(b, 0xFFFF); - +static llvm::Value *doFstsV(llvm::BasicBlock *&b) { + llvm::Value *sw = CONST_V<16>(b, 0xFFFF); sw = SHL_NOTXOR_FLAG<16>(b, sw, FPU_IE, 0); sw = SHL_NOTXOR_FLAG<16>(b, sw, FPU_DE, 1); sw = SHL_NOTXOR_FLAG<16>(b, sw, FPU_ZE, 2); @@ -1073,182 +1058,168 @@ static Value* doFstsV(BasicBlock *&b) { sw = SHL_NOTXOR_FLAG<16>(b, sw, FPU_TOP, 11); sw = SHL_NOTXOR_FLAG<16>(b, sw, FPU_C3, 14); sw = SHL_NOTXOR_FLAG<16>(b, sw, FPU_B, 15); - return sw; } -static InstTransResult doFstswm(InstPtr ip, BasicBlock *&b, Value *memAddr) { - Value *memPtr = ADDR_TO_POINTER<16>(b, memAddr); - - Value *status_word = doFstsV(b); - +static InstTransResult doFstswm(NativeInstPtr ip, llvm::BasicBlock *&b, + llvm::Value *memAddr) { + auto memPtr = ADDR_TO_POINTER<16>(b, memAddr); + auto status_word = doFstsV(b); M_WRITE<16>(ip, b, memPtr, status_word); - return ContinueBlock; } -static InstTransResult doFstswr(InstPtr ip, BasicBlock *&b) { - Value *status_word = doFstsV(b); - - R_WRITE<16>(b, X86::AX, status_word); - +static InstTransResult doFstswr(NativeInstPtr ip, llvm::BasicBlock *&b) { + auto status_word = doFstsV(b); + R_WRITE<16>(b, llvm::X86::AX, status_word); return ContinueBlock; } -static InstTransResult doFxch(MCInst &inst, InstPtr ip, BasicBlock *&b) { +static InstTransResult doFxch(llvm::MCInst &inst, NativeInstPtr ip, + llvm::BasicBlock *&b) { // Check num operands. // No operands implies ST1 - unsigned src_reg = X86::ST1; + unsigned src_reg = llvm::X86::ST1; if (inst.getNumOperands() > 0) { src_reg = inst.getOperand(0).getReg(); } - - Value *src_val = FPUR_READ(b, src_reg); - Value *st0_val = FPUR_READ(b, X86::ST0); - - FPUR_WRITE(b, X86::ST0, src_val); + auto src_val = FPUR_READ(b, src_reg); + auto st0_val = FPUR_READ(b, llvm::X86::ST0); + FPUR_WRITE(b, llvm::X86::ST0, src_val); FPUR_WRITE(b, src_reg, st0_val); return ContinueBlock; } -static InstTransResult doF2XM1(MCInst &inst, InstPtr ip, BasicBlock *&b) { +static InstTransResult doF2XM1(llvm::MCInst &inst, NativeInstPtr ip, + llvm::BasicBlock *&b) { /* * Computes (2**st0)-1 and stores in ST0 */ - Value *st0_val = FPUR_READ(b, X86::ST0); - - Module *M = b->getParent()->getParent(); - - Type *t = llvm::Type::getX86_FP80Ty(b->getContext()); - Function *exp_func = Intrinsic::getDeclaration(M, Intrinsic::exp2, t); + auto st0_val = FPUR_READ(b, llvm::X86::ST0); + auto M = b->getParent()->getParent(); + auto t = llvm::Type::getX86_FP80Ty(b->getContext()); + auto exp_func = llvm::Intrinsic::getDeclaration(M, llvm::Intrinsic::exp2, t); NASSERT(exp_func != nullptr); - std::vector args; + std::vector args; args.push_back(st0_val); - Value *exp2_val = CallInst::Create(exp_func, args, "", b); - - Value *one = CONSTFP_V(b, 1.0); - - Value *exp2_m_1 = BinaryOperator::Create(llvm::Instruction::FSub, exp2_val, - one, "", b); + auto exp2_val = llvm::CallInst::Create(exp_func, args, "", b); + auto one = CONSTFP_V(b, 1.0); + auto exp2_m_1 = llvm::BinaryOperator::Create(llvm::Instruction::FSub, + exp2_val, one, "", b); // store return in reg - FPUR_WRITE(b, X86::ST0, exp2_m_1); + FPUR_WRITE(b, llvm::X86::ST0, exp2_m_1); return ContinueBlock; } -static InstTransResult doFSCALE(MCInst &inst, InstPtr ip, BasicBlock *&b) { +static InstTransResult doFSCALE(llvm::MCInst &inst, NativeInstPtr ip, + llvm::BasicBlock *&b) { /* * st0 = st0 * (2 ** RoundToZero(st1)) */ - Module *M = b->getParent()->getParent(); - - Value *st0_val = FPUR_READ(b, X86::ST0); - Value *st1_val = FPUR_READ(b, X86::ST0); - - Type *t = llvm::Type::getX86_FP80Ty(b->getContext()); - - Function *exp_func = Intrinsic::getDeclaration(M, Intrinsic::exp2, t); - - Function *trunc_func = Intrinsic::getDeclaration(M, Intrinsic::trunc, t); + auto M = b->getParent()->getParent(); + auto st0_val = FPUR_READ(b, X86::ST0); + auto st1_val = FPUR_READ(b, X86::ST0); + auto t = llvm::Type::getX86_FP80Ty(b->getContext()); + auto exp_func = llvm::Intrinsic::getDeclaration(M, llvm::Intrinsic::exp2, t); + auto trunc_func = llvm::Intrinsic::getDeclaration(M, llvm::Intrinsic::trunc, + t); NASSERT(exp_func != nullptr); NASSERT(trunc_func != nullptr); // round st1 to zero - std::vector args; + std::vector args; args.push_back(st1_val); - Value *trunc_st1_val = CallInst::Create(trunc_func, args, "", b); + auto trunc_st1_val = llvm::CallInst::Create(trunc_func, args, "", b); // calculate 2^st1 - std::vector exp_args; + std::vector exp_args; exp_args.push_back(trunc_st1_val); - Value *exp2_val = CallInst::Create(exp_func, exp_args, "", b); + auto exp2_val = llvm::CallInst::Create(exp_func, exp_args, "", b); // st0 * 2*st1 - Value *scaled_val = BinaryOperator::Create(llvm::Instruction::FMul, st0_val, - exp2_val, "", b); + auto scaled_val = llvm::BinaryOperator::Create(llvm::Instruction::FMul, + st0_val, exp2_val, "", b); // store return in reg - FPUR_WRITE(b, X86::ST0, scaled_val); + FPUR_WRITE(b, llvm::X86::ST0, scaled_val); return ContinueBlock; } template -static InstTransResult doFYL2Xx(MCInst &inst, InstPtr ip, BasicBlock *&b) { +static InstTransResult doFYL2Xx(llvm::MCInst &inst, NativeInstPtr ip, + llvm::BasicBlock *&b) { /* * Computes (ST(1) ∗ log2(ST(0))), stores the result in ST(1), and pops the x87 register stack. The value * in ST(0) must be greater than zero. * If the zero-divide-exception mask (ZM) bit in the x87 control word is set to 1 and ST(0) contains ±zero, the instruction returns ∞ with the opposite sign of the value in register ST(1). */ - - Value *st0_val = FPUR_READ(b, X86::ST0); - Value *st1_val = FPUR_READ(b, X86::ST1); - - Module *M = b->getParent()->getParent(); - Type *t = llvm::Type::getX86_FP80Ty(b->getContext()); - Function *flog2_func = Intrinsic::getDeclaration(M, Intrinsic::log2, t); + auto st0_val = FPUR_READ(b, llvm::X86::ST0); + auto st1_val = FPUR_READ(b, llvm::X86::ST1); + auto M = b->getParent()->getParent(); + auto t = llvm::Type::getX86_FP80Ty(b->getContext()); + auto flog2_func = llvm::Intrinsic::getDeclaration(M, llvm::Intrinsic::log2, + t); NASSERT(flog2_func != NULL); - std::vector args; + std::vector args; - if (p) // FYLX2P1 case - { - llvm::Constant *one = llvm::ConstantFP::get( - llvm::Type::getX86_FP80Ty(b->getContext()), 1.0); + if (p) { // FYLX2P1 case + auto one = llvm::ConstantFP::get(llvm::Type::getX86_FP80Ty(b->getContext()), + 1.0); - Value *st0_plus_one = BinaryOperator::Create(llvm::Instruction::FAdd, - st0_val, one, "", b); + auto st0_plus_one = llvm::BinaryOperator::Create(llvm::Instruction::FAdd, + st0_val, one, "", b); args.push_back(st0_plus_one); } else { args.push_back(st0_val); } - Value *flog2_val = CallInst::Create(flog2_func, args, "", b); - - Value *result = BinaryOperator::Create(llvm::Instruction::FMul, flog2_val, - st1_val, "", b); + auto flog2_val = llvm::CallInst::Create(flog2_func, args, "", b); + auto result = llvm::BinaryOperator::Create(llvm::Instruction::FMul, flog2_val, + st1_val, "", b); // store return in reg - FPUR_WRITE(b, X86::ST1, result); - + FPUR_WRITE(b, llvm::X86::ST1, result); FPU_POP(b); - return ContinueBlock; } -static InstTransResult doFRNDINT(MCInst &inst, InstPtr ip, BasicBlock *&b) { - Module *M = b->getParent()->getParent(); - - Value *regVal = FPUR_READ(b, X86::ST0); - Type *fpTy = llvm::Type::getX86_FP80Ty(b->getContext()); +static InstTransResult doFRNDINT(llvm::MCInst &inst, NativeInstPtr ip, + llvm::BasicBlock *&b) { + auto M = b->getParent()->getParent(); + auto regVal = FPUR_READ(b, llvm::X86::ST0); + auto fpTy = llvm::Type::getX86_FP80Ty(b->getContext()); // get our intrinsics /// nearest - Function *round_nearest = Intrinsic::getDeclaration(M, Intrinsic::nearbyint, - fpTy); - NASSERT(round_nearest != NULL); + auto round_nearest = llvm::Intrinsic::getDeclaration( + M, llvm::Intrinsic::nearbyint, fpTy); + // round will round away from zero - Function *round_down = Intrinsic::getDeclaration(M, Intrinsic::round, fpTy); - NASSERT(round_down != NULL); + auto round_down = llvm::Intrinsic::getDeclaration(M, llvm::Intrinsic::round, + fpTy); + // round will round away from zero - Function *round_up = Intrinsic::getDeclaration(M, Intrinsic::round, fpTy); - NASSERT(round_up != NULL); + auto round_up = llvm::Intrinsic::getDeclaration(M, llvm::Intrinsic::round, + fpTy); + // truncate - // - Function *round_zero = Intrinsic::getDeclaration(M, Intrinsic::trunc, fpTy); - NASSERT(round_zero != NULL); + auto round_zero = llvm::Intrinsic::getDeclaration(M, llvm::Intrinsic::trunc, + fpTy); CREATE_BLOCK(nearest, b); CREATE_BLOCK(down, b); @@ -1257,31 +1228,32 @@ static InstTransResult doFRNDINT(MCInst &inst, InstPtr ip, BasicBlock *&b) { CREATE_BLOCK(finished, b); // switch on Rounding control - Value *rc = F_READ(b, FPU_RC); - SwitchInst *rcSwitch = SwitchInst::Create(rc, block_nearest, 4, b); + auto rc = F_READ(b, FPU_RC); + auto rcSwitch = llvm::SwitchInst::Create(rc, block_nearest, 4, b); rcSwitch->addCase(CONST_V<2>(b, 0), block_nearest); rcSwitch->addCase(CONST_V<2>(b, 1), block_down); rcSwitch->addCase(CONST_V<2>(b, 2), block_up); rcSwitch->addCase(CONST_V<2>(b, 3), block_zero); - std::vector args; + std::vector args; args.push_back(regVal); - Value *nearest_val = CallInst::Create(round_nearest, args, "", block_nearest); - BranchInst::Create(block_finished, block_nearest); + auto nearest_val = llvm::CallInst::Create(round_nearest, args, "", + block_nearest); + llvm::BranchInst::Create(block_finished, block_nearest); - Value *down_val = CallInst::Create(round_down, args, "", block_down); - BranchInst::Create(block_finished, block_down); + auto down_val = llvm::CallInst::Create(round_down, args, "", block_down); + llvm::BranchInst::Create(block_finished, block_down); - Value *up_val = CallInst::Create(round_up, args, "", block_up); - BranchInst::Create(block_finished, block_up); + auto up_val = llvm::CallInst::Create(round_up, args, "", block_up); + llvm::BranchInst::Create(block_finished, block_up); - Value *zero_val = CallInst::Create(round_zero, args, "", block_zero); - BranchInst::Create(block_finished, block_zero); + auto zero_val = llvm::CallInst::Create(round_zero, args, "", block_zero); + llvm::BranchInst::Create(block_finished, block_zero); // adjust to whichever branch we did - PHINode *roundedVal = PHINode::Create( - Type::getX86_FP80Ty(block_finished->getContext()), 4, "fpu_round", + auto roundedVal = llvm::PHINode::Create( + llvm::Type::getX86_FP80Ty(block_finished->getContext()), 4, "fpu_round", block_finished); roundedVal->addIncoming(nearest_val, block_nearest); @@ -1292,70 +1264,58 @@ static InstTransResult doFRNDINT(MCInst &inst, InstPtr ip, BasicBlock *&b) { b = block_finished; // write it back - FPUR_WRITE(b, X86::ST0, roundedVal); + FPUR_WRITE(b, llvm::X86::ST0, roundedVal); return ContinueBlock; } -static InstTransResult doFABS(MCInst &inst, InstPtr ip, BasicBlock *&b) { +static InstTransResult doFABS(llvm::MCInst &inst, NativeInstPtr ip, + llvm::BasicBlock *&b) { - Value *st0_val = FPUR_READ(b, X86::ST0); - - Module *M = b->getParent()->getParent(); - Type *t = llvm::Type::getX86_FP80Ty(b->getContext()); - Function *func = Intrinsic::getDeclaration(M, Intrinsic::fabs, t); - - NASSERT(func != NULL); - - std::vector args; + auto st0_val = FPUR_READ(b, llvm::X86::ST0); + auto M = b->getParent()->getParent(); + auto t = llvm::Type::getX86_FP80Ty(b->getContext()); + auto func = llvm::Intrinsic::getDeclaration(M, llvm::Intrinsic::fabs, t); + std::vector args; args.push_back(st0_val); - - Value *result = CallInst::Create(func, args, "", b); + auto result = llvm::CallInst::Create(func, args, "", b); // store return in reg - FPUR_WRITE(b, X86::ST0, result); + FPUR_WRITE(b, llvm::X86::ST0, result); return ContinueBlock; } -static InstTransResult doFSQRT(MCInst &inst, InstPtr ip, BasicBlock *&b) { - - Value *st0_val = FPUR_READ(b, X86::ST0); - - Module *M = b->getParent()->getParent(); - Type *t = llvm::Type::getX86_FP80Ty(b->getContext()); - Function *func = Intrinsic::getDeclaration(M, Intrinsic::sqrt, t); - - NASSERT(func != NULL); - - std::vector args; +static InstTransResult doFSQRT(llvm::MCInst &inst, NativeInstPtr ip, + llvm::BasicBlock *&b) { + auto st0_val = FPUR_READ(b, llvm::X86::ST0); + auto M = b->getParent()->getParent(); + auto t = llvm::Type::getX86_FP80Ty(b->getContext()); + auto func = llvm::Intrinsic::getDeclaration(M, llvm::Intrinsic::sqrt, t); + std::vector args; args.push_back(st0_val); - Value *result = CallInst::Create(func, args, "", b); + auto result = llvm::CallInst::Create(func, args, "", b); // store return in reg - FPUR_WRITE(b, X86::ST0, result); + FPUR_WRITE(b, llvm::X86::ST0, result); return ContinueBlock; } -static InstTransResult doFCOS(MCInst &inst, InstPtr ip, BasicBlock *&b) { - - Value *st0_val = FPUR_READ(b, X86::ST0); - - Module *M = b->getParent()->getParent(); - Type *t = llvm::Type::getX86_FP80Ty(b->getContext()); - Function *func = Intrinsic::getDeclaration(M, Intrinsic::cos, t); - - NASSERT(func != NULL); - - std::vector args; +static InstTransResult doFCOS(llvm::MCInst &inst, NativeInstPtr ip, + llvm::BasicBlock *&b) { + auto st0_val = FPUR_READ(b, llvm::X86::ST0); + auto M = b->getParent()->getParent(); + auto t = llvm::Type::getX86_FP80Ty(b->getContext()); + auto func = llvm::Intrinsic::getDeclaration(M, llvm::Intrinsic::cos, t); + std::vector args; args.push_back(st0_val); - Value *result = CallInst::Create(func, args, "", b); + auto result = llvm::CallInst::Create(func, args, "", b); // store return in reg - FPUR_WRITE(b, X86::ST0, result); + FPUR_WRITE(b, llvm::X86::ST0, result); /* XXX: If the radian value lies outside the valid range of –263 * to +263 radians, the instruction sets the C2 flag in the x87 @@ -1365,7 +1325,8 @@ static InstTransResult doFCOS(MCInst &inst, InstPtr ip, BasicBlock *&b) { return ContinueBlock; } -static InstTransResult doFSINCOS(MCInst &inst, InstPtr ip, BasicBlock *&b) { +static InstTransResult doFSINCOS(llvm::MCInst &inst, NativeInstPtr ip, + llvm::BasicBlock *&b) { /* * Computes the sine and cosine of the value in ST(0), stores the sine in ST(0), @@ -1373,29 +1334,25 @@ static InstTransResult doFSINCOS(MCInst &inst, InstPtr ip, BasicBlock *&b) { * in the range –263 to +263 radians. */ - Value *st0_val = FPUR_READ(b, X86::ST0); + auto st0_val = FPUR_READ(b, llvm::X86::ST0); - Module *M = b->getParent()->getParent(); - Type *t = llvm::Type::getX86_FP80Ty(b->getContext()); - - Function *sin = Intrinsic::getDeclaration(M, Intrinsic::sin, t); - Function *cos = Intrinsic::getDeclaration(M, Intrinsic::cos, t); - - NASSERT(sin != NULL); - NASSERT(cos != NULL); + auto M = b->getParent()->getParent(); + auto t = llvm::Type::getX86_FP80Ty(b->getContext()); + auto sin = llvm::Intrinsic::getDeclaration(M, llvm::Intrinsic::sin, t); + auto cos = llvm::Intrinsic::getDeclaration(M, llvm::Intrinsic::cos, t); // Compute the sin of st(0) - std::vector args; + std::vector args; args.push_back(st0_val); - Value *sin_result = CallInst::Create(sin, args, "", b); + auto sin_result = llvm::CallInst::Create(sin, args, "", b); // store the result of the sin call back into st(0) - FPUR_WRITE(b, X86::ST0, sin_result); + FPUR_WRITE(b, llvm::X86::ST0, sin_result); // Compute the cos of st(0) args.clear(); args.push_back(st0_val); - Value *cos_result = CallInst::Create(cos, args, "", b); + auto cos_result = llvm::CallInst::Create(cos, args, "", b); // Push the result of the cos on the register stack FPU_PUSHV(b, cos_result); @@ -1403,84 +1360,90 @@ static InstTransResult doFSINCOS(MCInst &inst, InstPtr ip, BasicBlock *&b) { return ContinueBlock; } -static InstTransResult doFINCSTP(MCInst &inst, InstPtr ip, BasicBlock *&b) { - +static InstTransResult doFINCSTP(llvm::MCInst &inst, NativeInstPtr ip, + llvm::BasicBlock *&b) { INCREMENT_FPU_TOP(b); - return ContinueBlock; } -static InstTransResult doFDECSTP(MCInst &inst, InstPtr ip, BasicBlock *&b) { - +static InstTransResult doFDECSTP(llvm::MCInst &inst, NativeInstPtr ip, + llvm::BasicBlock *&b) { DECREMENT_FPU_TOP(b); - return ContinueBlock; } -static InstTransResult doFPTAN(MCInst &inst, InstPtr ip, BasicBlock *&b) { - Module *M = b->getParent()->getParent(); - Type *t = llvm::Type::getX86_FP80Ty(b->getContext()); - Function *sin = Intrinsic::getDeclaration(M, Intrinsic::sin, t); - Function *cos = Intrinsic::getDeclaration(M, Intrinsic::cos, t); - - NASSERT(sin != NULL); - NASSERT(cos != NULL); - - Value *st0_val = FPUR_READ(b, X86::ST0); +static InstTransResult doFPTAN(llvm::MCInst &inst, NativeInstPtr ip, + llvm::BasicBlock *&b) { + auto M = b->getParent()->getParent(); + auto t = llvm::Type::getX86_FP80Ty(b->getContext()); + auto sin = llvm::Intrinsic::getDeclaration(M, llvm::Intrinsic::sin, t); + auto cos = llvm::Intrinsic::getDeclaration(M, llvm::Intrinsic::cos, t); + auto st0_val = FPUR_READ(b, llvm::X86::ST0); // Compute the sin of st(0) - std::vector args; + std::vector args; args.push_back(st0_val); - Value *sin_result = CallInst::Create(sin, args, "", b); + auto sin_result = llvm::CallInst::Create(sin, args, "", b); // Compute the cos of st(0) args.clear(); args.push_back(st0_val); - Value *cos_result = CallInst::Create(cos, args, "", b); + auto cos_result = llvm::CallInst::Create(cos, args, "", b); // tan = sin/cos - Value *tan_result = BinaryOperator::Create(llvm::Instruction::FDiv, - sin_result, cos_result, "", b); + auto tan_result = llvm::BinaryOperator::Create(llvm::Instruction::FDiv, + sin_result, cos_result, "", b); - FPUR_WRITE(b, X86::ST0, tan_result); - Value *one = CONSTFP_V(b, 1.0); + FPUR_WRITE(b, llvm::X86::ST0, tan_result); + auto one = CONSTFP_V(b, 1.0); FPU_PUSHV(b, one); return ContinueBlock; } -static InstTransResult doCHS(MCInst &inst, InstPtr ip, BasicBlock *&b) { - Value *st0_val = FPUR_READ(b, X86::ST0); - - Value *negone = CONSTFP_V(b, -1.0); - Value *signchange = BinaryOperator::Create(llvm::Instruction::FMul, st0_val, - negone, "", b); - - FPUR_WRITE(b, X86::ST0, signchange); +static InstTransResult doCHS(llvm::MCInst &inst, NativeInstPtr ip, + llvm::BasicBlock *&b) { + auto st0_val = FPUR_READ(b, llvm::X86::ST0); + auto negone = CONSTFP_V(b, -1.0); + auto signchange = BinaryOperator::Create(llvm::Instruction::FMul, st0_val, + negone, "", b); + FPUR_WRITE(b, llvm::X86::ST0, signchange); return ContinueBlock; } //mem_src = IMM_AS_DATA_REF(block, natM, ip); -#define FPU_TRANSLATION(NAME, SETPTR, SETDATA, SETFOPCODE, ACCESSMEM, THECALL) static InstTransResult translate_ ## NAME (NativeModulePtr natM, BasicBlock *&block, InstPtr ip, MCInst &inst)\ -{\ - InstTransResult ret;\ - block = createNewFpuBlock(block, #NAME);\ - Function *F = block->getParent();\ - Value *mem_src = NULL;\ - if (ACCESSMEM) {\ - if( ip->has_mem_reference ) {\ - mem_src = MEM_REFERENCE(0);\ - if (SETDATA) { setFpuDataPtr(block, mem_src); }\ +#define FPU_TRANSLATION(NAME, SETPTR, SETDATA, SETFOPCODE, ACCESSMEM, THECALL) \ + static InstTransResult translate_ ## NAME (TranslationContext &ctx, \ + llvm::BasicBlock *&block) { \ + auto natM = ctx.natM; \ + auto F = ctx.F; \ + auto ip = ctx.natI; \ + auto &inst = ip->get_inst(); \ + InstTransResult ret;\ + block = createNewFpuBlock(block, #NAME);\ + Value *mem_src = NULL;\ + if (ACCESSMEM) {\ + if(ip->has_mem_reference) {\ + mem_src = MEM_REFERENCE(0);\ + if (SETDATA) { \ + setFpuDataPtr(block, mem_src); \ + }\ } else {\ - mem_src = ADDR_NOREF(0);\ - if (SETDATA) { setFpuDataPtr(block, mem_src); }\ + mem_src = ADDR_NOREF(0);\ + if (SETDATA) { \ + setFpuDataPtr(block, mem_src); \ + }\ }\ - }\ - if (SETPTR) { setFpuInstPtr(block); }\ - ret = THECALL;\ - if (SETFOPCODE) { SET_FPU_FOPCODE(block, inst.native_opcode); }\ - return ret;\ -} + }\ + if (SETPTR) { \ + setFpuInstPtr(block); \ + }\ + ret = THECALL;\ + if (SETFOPCODE) { \ + SET_FPU_FOPCODE(block, inst.native_opcode); \ + }\ + return ret;\ + } /*************************** *************************** @@ -1497,8 +1460,8 @@ static InstTransResult doCHS(MCInst &inst, InstPtr ip, BasicBlock *&b) { *** for *DIV* instructions, reverse is the OPPOSITE of normal, since *DIV* instructions have an operand order opposite of other instructions *** - ** EXCEPT for those that use memory operands. Since there is no write to memory, - the order stays the same. Yes, this is confusing.** + ** EXCEPT for those that use memory operands. Since there is no write to + memory, the order stays the same. Yes, this is confusing.** *************************** @@ -1511,7 +1474,7 @@ FPU_TRANSLATION( true, true, true, - (doFOpMR<32, false>(ip, block, X86::ST0, mem_src, X86::ADD_F32m, + (doFOpMR<32, false>(ip, block, llvm::X86::ST0, mem_src, llvm::X86::ADD_F32m, llvm::Instruction::FAdd))) FPU_TRANSLATION( ADD_F64m, @@ -1519,7 +1482,7 @@ FPU_TRANSLATION( true, true, true, - (doFOpMR<64, false>(ip, block, X86::ST0, mem_src, X86::ADD_F64m, + (doFOpMR<64, false>(ip, block, llvm::X86::ST0, mem_src, llvm::X86::ADD_F64m, llvm::Instruction::FAdd))) FPU_TRANSLATION( ADD_FI16m, @@ -1527,44 +1490,47 @@ FPU_TRANSLATION( true, true, true, - (doFiOpMR<16, false>(ip, block, X86::ST0, mem_src, X86::ADD_FI16m, - llvm::Instruction::FAdd))) + (doFiOpMR<16, false>(ip, block, llvm::X86::ST0, mem_src, + llvm::X86::ADD_FI16m, llvm::Instruction::FAdd))) FPU_TRANSLATION( ADD_FI32m, true, true, true, true, - (doFiOpMR<32, false>(ip, block, X86::ST0, mem_src, X86::ADD_FI32m, - llvm::Instruction::FAdd))) + (doFiOpMR<32, false>(ip, block, llvm::X86::ST0, mem_src, + llvm::X86::ADD_FI32m, llvm::Instruction::FAdd))) FPU_TRANSLATION( ADD_FPrST0, true, false, true, false, - doFOpPRR(ip, block, X86::ST0, OP(0).getReg(), X86::ADD_FPrST0, llvm::Instruction::FAdd)) + doFOpPRR(ip, block, llvm::X86::ST0, OP(0).getReg(), + llvm::X86::ADD_FPrST0, llvm::Instruction::FAdd)) FPU_TRANSLATION( ADD_FST0r, true, false, true, false, - doFOpRR(ip, block, OP(0).getReg(), X86::ST0, X86::ADD_FST0r, llvm::Instruction::FAdd)) + doFOpRR(ip, block, OP(0).getReg(), llvm::X86::ST0, + llvm::X86::ADD_FST0r, llvm::Instruction::FAdd)) FPU_TRANSLATION( ADD_FrST0, true, false, true, false, - doFOpRR(ip, block, X86::ST0, OP(0).getReg(), X86::ADD_FrST0, llvm::Instruction::FAdd)) + doFOpRR(ip, block, llvm::X86::ST0, OP(0).getReg(), + llvm::X86::ADD_FrST0, llvm::Instruction::FAdd)) FPU_TRANSLATION( DIVR_F32m, true, true, true, true, - (doFOpMR<32, true>(ip, block, X86::ST0, mem_src, X86::DIVR_F32m, + (doFOpMR<32, true>(ip, block, llvm::X86::ST0, mem_src, llvm::X86::DIVR_F32m, llvm::Instruction::FDiv))) FPU_TRANSLATION( DIVR_F64m, @@ -1572,7 +1538,7 @@ FPU_TRANSLATION( true, true, true, - (doFOpMR<64, true>(ip, block, X86::ST0, mem_src, X86::DIVR_F64m, + (doFOpMR<64, true>(ip, block, llvm::X86::ST0, mem_src, llvm::X86::DIVR_F64m, llvm::Instruction::FDiv))) FPU_TRANSLATION( DIVR_FI16m, @@ -1580,44 +1546,47 @@ FPU_TRANSLATION( true, true, true, - (doFiOpMR<16, true>(ip, block, X86::ST0, mem_src, X86::DIVR_FI16m, - llvm::Instruction::FDiv))) + (doFiOpMR<16, true>(ip, block, llvm::X86::ST0, mem_src, + llvm::X86::DIVR_FI16m, llvm::Instruction::FDiv))) FPU_TRANSLATION( DIVR_FI32m, true, true, true, true, - (doFiOpMR<32, true>(ip, block, X86::ST0, mem_src, X86::DIVR_FI32m, - llvm::Instruction::FDiv))) + (doFiOpMR<32, true>(ip, block, llvm::X86::ST0, mem_src, + llvm::X86::DIVR_FI32m, llvm::Instruction::FDiv))) FPU_TRANSLATION( DIVR_FPrST0, true, false, true, false, - doFOpPRR(ip, block, X86::ST0, OP(0).getReg(), X86::DIVR_FPrST0, llvm::Instruction::FDiv)) + doFOpPRR(ip, block, llvm::X86::ST0, OP(0).getReg(), + llvm::X86::DIVR_FPrST0, llvm::Instruction::FDiv)) FPU_TRANSLATION( DIVR_FST0r, true, false, true, false, - doFOpRR(ip, block, OP(0).getReg(), X86::ST0, X86::DIVR_FST0r, llvm::Instruction::FDiv)) + doFOpRR(ip, block, OP(0).getReg(), llvm::X86::ST0, + llvm::X86::DIVR_FST0r, llvm::Instruction::FDiv)) FPU_TRANSLATION( DIVR_FrST0, true, false, true, false, - doFOpRR(ip, block, X86::ST0, OP(0).getReg(), X86::DIVR_FrST0, llvm::Instruction::FDiv)) + doFOpRR(ip, block, llvm::X86::ST0, OP(0).getReg(), + llvm::X86::DIVR_FrST0, llvm::Instruction::FDiv)) FPU_TRANSLATION( DIV_F32m, true, true, true, true, - (doFOpMR<32, false>(ip, block, X86::ST0, mem_src, X86::DIV_F32m, + (doFOpMR<32, false>(ip, block, llvm::X86::ST0, mem_src, llvm::X86::DIV_F32m, llvm::Instruction::FDiv))) FPU_TRANSLATION( DIV_F64m, @@ -1625,7 +1594,7 @@ FPU_TRANSLATION( true, true, true, - (doFOpMR<64, false>(ip, block, X86::ST0, mem_src, X86::DIV_F64m, + (doFOpMR<64, false>(ip, block, llvm::X86::ST0, mem_src, llvm::X86::DIV_F64m, llvm::Instruction::FDiv))) FPU_TRANSLATION( DIV_FI16m, @@ -1633,37 +1602,39 @@ FPU_TRANSLATION( true, true, true, - (doFiOpMR<16, false>(ip, block, X86::ST0, mem_src, X86::DIV_FI16m, - llvm::Instruction::FDiv))) + (doFiOpMR<16, false>(ip, block, llvm::X86::ST0, mem_src, + llvm::X86::DIV_FI16m, llvm::Instruction::FDiv))) FPU_TRANSLATION( DIV_FI32m, true, true, true, true, - (doFiOpMR<32, false>(ip, block, X86::ST0, mem_src, X86::DIV_FI32m, - llvm::Instruction::FDiv))) + (doFiOpMR<32, false>(ip, block, llvm::X86::ST0, mem_src, + llvm::X86::DIV_FI32m, llvm::Instruction::FDiv))) FPU_TRANSLATION( DIV_FPrST0, true, false, true, false, - doFOpPRR(ip, block, X86::ST0, OP(0).getReg(), X86::DIV_FPrST0, llvm::Instruction::FDiv)) + doFOpPRR(ip, block, llvm::X86::ST0, OP(0).getReg(), + llvm::X86::DIV_FPrST0, llvm::Instruction::FDiv)) FPU_TRANSLATION( DIV_FST0r, true, false, true, false, - doFOpRR(ip, block, OP(0).getReg(), X86::ST0, X86::DIV_FST0r, llvm::Instruction::FDiv)) + doFOpRR(ip, block, OP(0).getReg(), llvm::X86::ST0, + llvm::X86::DIV_FST0r, llvm::Instruction::FDiv)) FPU_TRANSLATION( DIV_FrST0, true, false, true, false, - doFOpRR(ip, block, X86::ST0, OP(0).getReg(), X86::DIV_FrST0, llvm::Instruction::FDiv)) + doFOpRR(ip, block, llvm::X86::ST0, OP(0).getReg(), llvm::X86::DIV_FrST0, llvm::Instruction::FDiv)) FPU_TRANSLATION(FSTENVm, false, false, true, true, doFstenv(ip, block, mem_src)) FPU_TRANSLATION(LD_F32m, true, true, true, true, doFldM<32>(ip, block, mem_src)) FPU_TRANSLATION(LD_F64m, true, true, true, true, doFldM<64>(ip, block, mem_src)) @@ -1675,7 +1646,7 @@ FPU_TRANSLATION( true, true, true, - (doFOpMR<32, false>(ip, block, X86::ST0, mem_src, X86::MUL_F32m, + (doFOpMR<32, false>(ip, block, llvm::X86::ST0, mem_src, llvm::X86::MUL_F32m, llvm::Instruction::FMul))) FPU_TRANSLATION( MUL_F64m, @@ -1683,7 +1654,7 @@ FPU_TRANSLATION( true, true, true, - (doFOpMR<64, false>(ip, block, X86::ST0, mem_src, X86::MUL_F64m, + (doFOpMR<64, false>(ip, block, llvm::X86::ST0, mem_src, llvm::X86::MUL_F64m, llvm::Instruction::FMul))) FPU_TRANSLATION( MUL_FI16m, @@ -1691,37 +1662,37 @@ FPU_TRANSLATION( true, true, true, - (doFiOpMR<16, false>(ip, block, X86::ST0, mem_src, X86::MUL_FI16m, - llvm::Instruction::FMul))) + (doFiOpMR<16, false>(ip, block, llvm::X86::ST0, mem_src, + llvm::X86::MUL_FI16m, llvm::Instruction::FMul))) FPU_TRANSLATION( MUL_FI32m, true, true, true, true, - (doFiOpMR<32, false>(ip, block, X86::ST0, mem_src, X86::MUL_FI32m, - llvm::Instruction::FMul))) + (doFiOpMR<32, false>(ip, block, llvm::X86::ST0, mem_src, + llvm::X86::MUL_FI32m, llvm::Instruction::FMul))) FPU_TRANSLATION( MUL_FPrST0, true, false, true, false, - doFOpPRR(ip, block, X86::ST0, OP(0).getReg(), X86::MUL_FPrST0, llvm::Instruction::FMul)) + doFOpPRR(ip, block, llvm::X86::ST0, OP(0).getReg(), llvm::X86::MUL_FPrST0, llvm::Instruction::FMul)) FPU_TRANSLATION( MUL_FST0r, true, false, true, false, - doFOpRR(ip, block, OP(0).getReg(), X86::ST0, X86::MUL_FST0r, llvm::Instruction::FMul)) + doFOpRR(ip, block, OP(0).getReg(), llvm::X86::ST0, llvm::X86::MUL_FST0r, llvm::Instruction::FMul)) FPU_TRANSLATION( MUL_FrST0, true, false, true, false, - doFOpRR(ip, block, X86::ST0, OP(0).getReg(), X86::MUL_FrST0, llvm::Instruction::FMul)) + doFOpRR(ip, block, llvm::X86::ST0, OP(0).getReg(), llvm::X86::MUL_FrST0, llvm::Instruction::FMul)) FPU_TRANSLATION(ST_F32m, true, true, true, true, doFstM<32>(ip, block, mem_src)) FPU_TRANSLATION(ST_F64m, true, true, true, true, doFstM<64>(ip, block, mem_src)) FPU_TRANSLATION(ST_FP32m, true, true, true, true, @@ -1738,7 +1709,7 @@ FPU_TRANSLATION( true, true, true, - (doFOpMR<32, true>(ip, block, X86::ST0, mem_src, X86::SUBR_F32m, + (doFOpMR<32, true>(ip, block, llvm::X86::ST0, mem_src, llvm::X86::SUBR_F32m, llvm::Instruction::FSub))) FPU_TRANSLATION( SUBR_F64m, @@ -1746,7 +1717,7 @@ FPU_TRANSLATION( true, true, true, - (doFOpMR<64, true>(ip, block, X86::ST0, mem_src, X86::SUBR_F64m, + (doFOpMR<64, true>(ip, block, llvm::X86::ST0, mem_src, llvm::X86::SUBR_F64m, llvm::Instruction::FSub))) FPU_TRANSLATION( SUBR_FI16m, @@ -1754,44 +1725,44 @@ FPU_TRANSLATION( true, true, true, - (doFiOpMR<16, true>(ip, block, X86::ST0, mem_src, X86::SUBR_FI16m, - llvm::Instruction::FSub))) + (doFiOpMR<16, true>(ip, block, llvm::X86::ST0, mem_src, + llvm::X86::SUBR_FI16m, llvm::Instruction::FSub))) FPU_TRANSLATION( SUBR_FI32m, true, true, true, true, - (doFiOpMR<32, true>(ip, block, X86::ST0, mem_src, X86::SUBR_FI32m, - llvm::Instruction::FSub))) + (doFiOpMR<32, true>(ip, block, llvm::X86::ST0, mem_src, + llvm::X86::SUBR_FI32m, llvm::Instruction::FSub))) FPU_TRANSLATION( SUBR_FPrST0, true, false, true, false, - doFOpPRR(ip, block, X86::ST0, OP(0).getReg(), X86::SUBR_FPrST0, llvm::Instruction::FSub)) + doFOpPRR(ip, block, llvm::X86::ST0, OP(0).getReg(), llvm::X86::SUBR_FPrST0, llvm::Instruction::FSub)) FPU_TRANSLATION( SUBR_FST0r, true, false, true, false, - doFOpRR(ip, block, OP(0).getReg(), X86::ST0, X86::SUBR_FST0r, llvm::Instruction::FSub)) + doFOpRR(ip, block, OP(0).getReg(), llvm::X86::ST0, llvm::X86::SUBR_FST0r, llvm::Instruction::FSub)) FPU_TRANSLATION( SUBR_FrST0, true, false, true, false, - doFOpRR(ip, block, X86::ST0, OP(0).getReg(), X86::SUBR_FrST0, llvm::Instruction::FSub)) + doFOpRR(ip, block, llvm::X86::ST0, OP(0).getReg(), llvm::X86::SUBR_FrST0, llvm::Instruction::FSub)) FPU_TRANSLATION( SUB_F32m, true, true, true, true, - (doFOpMR<32, false>(ip, block, X86::ST0, mem_src, X86::SUB_F32m, + (doFOpMR<32, false>(ip, block, llvm::X86::ST0, mem_src, llvm::X86::SUB_F32m, llvm::Instruction::FSub))) FPU_TRANSLATION( SUB_F64m, @@ -1799,7 +1770,7 @@ FPU_TRANSLATION( true, true, true, - (doFOpMR<64, false>(ip, block, X86::ST0, mem_src, X86::SUB_F64m, + (doFOpMR<64, false>(ip, block, llvm::X86::ST0, mem_src, llvm::X86::SUB_F64m, llvm::Instruction::FSub))) FPU_TRANSLATION( SUB_FI16m, @@ -1807,46 +1778,46 @@ FPU_TRANSLATION( true, true, true, - (doFiOpMR<16, false>(ip, block, X86::ST0, mem_src, X86::SUB_FI16m, - llvm::Instruction::FSub))) + (doFiOpMR<16, false>(ip, block, llvm::X86::ST0, mem_src, + llvm::X86::SUB_FI16m, llvm::Instruction::FSub))) FPU_TRANSLATION( SUB_FI32m, true, true, true, true, - (doFiOpMR<32, false>(ip, block, X86::ST0, mem_src, X86::SUB_FI32m, - llvm::Instruction::FSub))) + (doFiOpMR<32, false>(ip, block, llvm::X86::ST0, mem_src, + llvm::X86::SUB_FI32m, llvm::Instruction::FSub))) FPU_TRANSLATION( SUB_FPrST0, true, false, true, false, - doFOpPRR(ip, block, X86::ST0, OP(0).getReg(), X86::SUB_FPrST0, llvm::Instruction::FSub)) + doFOpPRR(ip, block, llvm::X86::ST0, OP(0).getReg(), llvm::X86::SUB_FPrST0, llvm::Instruction::FSub)) FPU_TRANSLATION( SUB_FST0r, true, false, true, false, - doFOpRR(ip, block, OP(0).getReg(), X86::ST0, X86::SUB_FST0r, llvm::Instruction::FSub)) + doFOpRR(ip, block, OP(0).getReg(), llvm::X86::ST0, llvm::X86::SUB_FST0r, llvm::Instruction::FSub)) FPU_TRANSLATION( SUB_FrST0, true, false, true, false, - doFOpRR(ip, block, X86::ST0, OP(0).getReg(), X86::SUB_FrST0, llvm::Instruction::FSub)) + doFOpRR(ip, block, llvm::X86::ST0, OP(0).getReg(), llvm::X86::SUB_FrST0, llvm::Instruction::FSub)) -// take the remainder of ( DST_VAL[st0] / SRC_VAL[st1]), store in st0 +// take the remainder of (DST_VAL[st0] / SRC_VAL[st1]), store in st0 FPU_TRANSLATION( FPREM, true, false, true, false, - doFOpRR(ip, block, X86::ST1, X86::ST0, X86::FPREM, + doFOpRR(ip, block, llvm::X86::ST1, llvm::X86::ST0, llvm::X86::FPREM, llvm::Instruction::FRem)) FPU_TRANSLATION( FPREM1, @@ -1854,10 +1825,11 @@ FPU_TRANSLATION( false, true, false, - doFOpRR(ip, block, X86::ST1, X86::ST0, X86::FPREM1, + doFOpRR(ip, block, llvm::X86::ST1, llvm::X86::ST0, llvm::X86::FPREM1, llvm::Instruction::FRem)) -FPU_TRANSLATION(SIN_F, true, false, true, false, doFsin(ip, block, X86::ST0)) +FPU_TRANSLATION(SIN_F, true, false, true, false, + doFsin(ip, block, llvm::X86::ST0)) FPU_TRANSLATION(LD_F0, true, false, true, false, doFldC(ip, block, 0.0)) FPU_TRANSLATION(LD_F1, true, false, true, false, doFldC(ip, block, 1.0)) @@ -1939,8 +1911,7 @@ FPU_TRANSLATION(FPTAN, true, false, true, false, doFPTAN(inst, ip, block)) FPU_TRANSLATION(CHS_F, true, false, true, false, doCHS(inst, ip, block)) -static InstTransResult translate_WAIT(NativeModulePtr natM, BasicBlock *&block, - InstPtr ip, MCInst &inst) { +static InstTransResult translate_WAIT(TranslationContext &, BasicBlock *&) { return ContinueBlock; } diff --git a/mc-sema/common/BaseBMO.h b/mc-sema/common/BaseBMO.h index 7284b6bcd..e69de29bb 100644 --- a/mc-sema/common/BaseBMO.h +++ b/mc-sema/common/BaseBMO.h @@ -1,52 +0,0 @@ -//===-- .h ---------------------------------------------------===// -// -// THE PROJECT -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// -//===----------------------------------------------------------------------===// - -#ifndef _BMO_H -#define _BMO_H -#include "llvm/Support/MemoryBuffer.h" -#include - -class BaseBufferMemoryObject : public llvm::MemoryObject { -private: - std::vector Bytes; - uint64_t Base; -public: - BaseBufferMemoryObject( std::vector bytes, - uint64_t baseAddr) : - Bytes(bytes), Base(baseAddr) { - return; - } - - uint64_t getBase() const { return this->Base; } - uint64_t getExtent() const { return this->Bytes.size()+this->Base; } - - int readByte(uint64_t addr, uint8_t *byte) const { - if (addr >= this->getBase() ) - { - if(addr < this->getExtent()) - { - *byte = this->Bytes[addr-this->Base]; - return 0; - } - else - { - return -1; - } - } - else - { - return -1; - } - } -}; - -#endif diff --git a/mc-sema/common/LExcn.h b/mc-sema/common/LExcn.h index 1be5bf4e5..8d1984d5e 100644 --- a/mc-sema/common/LExcn.h +++ b/mc-sema/common/LExcn.h @@ -4,17 +4,16 @@ #include #include #include -#include class LErr : public std::exception { private: std::string message; public: LErr(unsigned int line, const char *file, std::string message) { - this->message = "Generic error: Line: " + - boost::to_string(line) + "\n" + - "File: " + std::string(file) + "\n" + - message; + std::stringstream ss; + ss << "Generic error: Line: " << line << "\n" + << "File: " << file << "\n" << message; + this->message = ss.str(); } virtual ~LErr(void) throw() { } diff --git a/mc-sema/peToCFG/inst_decoder_fe.cpp b/mc-sema/peToCFG/inst_decoder_fe.cpp index e365bedc3..fcd74ca7f 100644 --- a/mc-sema/peToCFG/inst_decoder_fe.cpp +++ b/mc-sema/peToCFG/inst_decoder_fe.cpp @@ -1,31 +1,32 @@ /* -Copyright (c) 2014, Trail of Bits -All rights reserved. + Copyright (c) 2014, Trail of Bits + All rights reserved. -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: + Redistribution and use in source and binary forms, with or without modification, + are permitted provided that the following conditions are met: - Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. + Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. - Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. + Redistributions in binary form must reproduce the above copyright notice, this + list of conditions and the following disclaimer in the documentation and/or + other materials provided with the distribution. - Neither the name of Trail of Bits nor the names of its - contributors may be used to endorse or promote products derived from - this software without specific prior written permission. + Neither the name of Trail of Bits nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ #include "peToCFG.h" #include "X86.h" #include @@ -33,113 +34,107 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #include "llvm/Support/Debug.h" using namespace std; -using namespace boost; using namespace llvm; +LLVMByteDecoder::LLVMByteDecoder(const std::string &triple, + const llvm::Target *target_) + : STI(target_->createMCSubtargetInfo(triple, "", "")), + MRI(target_->createMCRegInfo(triple)), + AsmInfo(target_->createMCAsmInfo(*MRI, triple)), + Ctx(new llvm::MCContext(AsmInfo, MRI, nullptr)), + DisAsm(target_->createMCDisassembler( *this->STI, *Ctx)), + TT(triple), + target(target_) {} -InstPtr LLVMByteDecoder::getInstFromBuff(VA addr, llvm::MemoryObject *bmo) { - InstPtr inst; - llvm::MCInst mcInst; - ::uint64_t insLen; - VA nextVA = addr; - ::uint32_t arch_type; +NativeInstPtr LLVMByteDecoder::getInstFromBuff(VA addr, llvm::MemoryObject *bmo) { + NativeInstPtr inst; + llvm::MCInst mcInst; + uint64_t insLen; + VA nextVA = addr; + uint32_t arch_type; uint8_t prefixes[0x100] = {0}; - llvm::MCDisassembler::DecodeStatus s; - + llvm::MCDisassembler::DecodeStatus s; bool have_prefix = true; size_t bmo_size = bmo->getExtent() - bmo->getBase(); - while(have_prefix) - { - insLen = 0; - s = DisAsm->getInstruction( mcInst, - insLen, - *bmo, - ((::uint64_t)nextVA), - llvm::nulls(), - llvm::nulls()); + while (have_prefix) { + insLen = 0; + s = DisAsm->getInstruction(mcInst, insLen, *bmo, ((uint64_t) nextVA), + llvm::nulls(), llvm::nulls()); - if(s == llvm::MCDisassembler::Success && bmo_size > 1) - { - switch(mcInst.getOpcode()) { - case llvm::X86::REP_PREFIX: - prefixes[0xF3] = 1; - break; - case llvm::X86::REPNE_PREFIX: - prefixes[0xF2] = 1; - break; - case llvm::X86::LOCK_PREFIX: - prefixes[0xF0] = 1; - break; - default: - have_prefix = false; - } - - } else { + if (s == llvm::MCDisassembler::Success && bmo_size > 1) { + switch (mcInst.getOpcode()) { + case llvm::X86::REP_PREFIX: + prefixes[0xF3] = 1; + break; + case llvm::X86::REPNE_PREFIX: + prefixes[0xF2] = 1; + break; + case llvm::X86::LOCK_PREFIX: + prefixes[0xF0] = 1; + break; + default: have_prefix = false; - break; } - if(have_prefix) { - nextVA += 1; - } else { - for(int i = 0; i < 0x100; i++) { - if(prefixes[i] == 1) { - mcInst.prefixPresent[i] = 1; - } - } - break; - // set prefixes + } else { + have_prefix = false; + break; + } + + if (have_prefix) { + nextVA += 1; + } else { + for (int i = 0; i < 0x100; i++) { + if (prefixes[i] == 1) { + mcInst.prefixPresent[i] = 1; + } } + break; + // set prefixes + } } - Inst::Prefix pfx = Inst::NoPrefix; - if(s == llvm::MCDisassembler::Success) { + NativeInst::Prefix pfx = NativeInst::NoPrefix; + if (s == llvm::MCDisassembler::Success) { - if( mcInst.getOpcode() == llvm::X86::MOVSL && mcInst.hasPrefix(0xF3) ) { - mcInst.setOpcode(llvm::X86::REP_MOVSD_32); - } else if( mcInst.hasPrefix(0xF2) ) { - pfx = Inst::RepNePrefix; - } else if( mcInst.hasPrefix(0xF3) ) { - pfx = Inst::RepPrefix; - } else if ( mcInst.hasPrefix(0x64) ) { - pfx = Inst::FSPrefix; - } else if ( mcInst.hasPrefix(0x64) ) { - pfx = Inst::GSPrefix; + if (mcInst.getOpcode() == llvm::X86::MOVSL && mcInst.hasPrefix(0xF3)) { + mcInst.setOpcode(llvm::X86::REP_MOVSD_32); + } else if (mcInst.hasPrefix(0xF2)) { + pfx = NativeInst::RepNePrefix; + } else if (mcInst.hasPrefix(0xF3)) { + pfx = NativeInst::RepPrefix; + } else if (mcInst.hasPrefix(0x64)) { + pfx = NativeInst::FSPrefix; + } else if (mcInst.hasPrefix(0x64)) { + pfx = NativeInst::GSPrefix; } - string outS; - llvm::raw_string_ostream osOut(outS); - MCOperand oper; + MCOperand oper; - this->IP->printInst(&mcInst, osOut, ""); - vector bytes; - //store the bytes from the MO in the inst - for(unsigned int i = 0; i < insLen; i++) { + std::vector bytes; + + //store the bytes from the MO in the inst + for (unsigned int i = 0; i < insLen; i++) { uint8_t b; - int k = bmo->readByte(addr+i, &b); + int k = bmo->readByte(addr + i, &b); LASSERT(k == 0, "Failed to read data when decoder could"); bytes.push_back(b); - } - inst = InstPtr(new Inst( addr, - insLen, - mcInst, - osOut.str(), - pfx, - bytes)); + } + inst = NativeInstPtr(new NativeInst(addr, insLen, mcInst, pfx, bytes)); - for (unsigned i = 0; i < mcInst.getNumOperands(); ++i) { - const MCOperand &Op = mcInst.getOperand(i); + for (auto i = 0U; i < mcInst.getNumOperands(); ++i) { + const MCOperand &Op = mcInst.getOperand(i); - if (Op.isReg() && Op.getReg() == X86::RIP) - inst->set_rip_relative(i); + if (Op.isReg() && Op.getReg() == X86::RIP) { + inst->set_rip_relative(i); + } } - //ask if this is a jmp, and figure out what the true / false follows are - switch(mcInst.getOpcode()) { + switch (mcInst.getOpcode()) { case X86::JMP32m: case X86::JMP32r: case X86::JMP64m: @@ -158,7 +153,7 @@ InstPtr LLVMByteDecoder::getInstFromBuff(VA addr, llvm::MemoryObject *bmo) { case X86::JMP_4: case X86::JMP_1: oper = mcInst.getOperand(0); - if(oper.isImm()) { + if (oper.isImm()) { nextVA += oper.getImm() + insLen; inst->set_tr(nextVA); } else { @@ -211,8 +206,8 @@ InstPtr LLVMByteDecoder::getInstFromBuff(VA addr, llvm::MemoryObject *bmo) { } } else { - string s = to_string(addr, hex); - throw LErr(__LINE__, __FILE__, "Failed to decode address 0x"+s); + string s = to_string(addr, hex); + throw LErr(__LINE__, __FILE__, "Failed to decode address 0x" + s); } return inst; diff --git a/mc-sema/peToCFG/inst_decoder_fe.h b/mc-sema/peToCFG/inst_decoder_fe.h index 0148f5f51..417c01dce 100644 --- a/mc-sema/peToCFG/inst_decoder_fe.h +++ b/mc-sema/peToCFG/inst_decoder_fe.h @@ -1,31 +1,31 @@ /* -Copyright (c) 2013, Trail of Bits -All rights reserved. + Copyright (c) 2013, Trail of Bits + All rights reserved. -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: + Redistribution and use in source and binary forms, with or without modification, + are permitted provided that the following conditions are met: - Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. + Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. - Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. + Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or + other materials provided with the distribution. - Neither the name of the {organization} nor the names of its - contributors may be used to endorse or promote products derived from - this software without specific prior written permission. + Neither the name of the {organization} nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ #ifndef _INST_FE_H #define _INST_FE_H @@ -39,125 +39,19 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #include "X86TargetMachine.h" class LLVMByteDecoder { -private: - const llvm::MCSubtargetInfo *STI; - const llvm::MCAsmInfo *AsmInfo; - llvm::MCInstPrinter *IP; - const llvm::MCDisassembler *DisAsm; - llvm::Triple *TT; - const llvm::Target *target; + private: + const llvm::MCSubtargetInfo * const STI; + llvm::MCRegisterInfo * const MRI; + const llvm::MCAsmInfo * const AsmInfo; + llvm::MCContext * const Ctx; + const llvm::MCDisassembler * const DisAsm; + const llvm::Triple TT; + const llvm::Target * const target; -public: - LLVMByteDecoder(void) - { - this->target = NULL; - llvm::MCRegisterInfo *MRI = NULL; - const llvm::MCInstrInfo *MCII = NULL; + public: + LLVMByteDecoder(const std::string &triple, + const llvm::Target *target_); - for(llvm::TargetRegistry::iterator it = llvm::TargetRegistry::begin(), - e = llvm::TargetRegistry::end(); - it != e; - ++it) - { - const llvm::Target &t = *it; - - if(std::string(t.getName()) == "x86") { - target= &t; - break; - } - } - - LASSERT( target != NULL, "target != NULL" ); - - TT = new llvm::Triple(); - TT->setArch(llvm::Triple::x86); - TT->setVendor(llvm::Triple::UnknownVendor); - TT->setOS(llvm::Triple::UnknownOS); - - this->STI = target->createMCSubtargetInfo( "i386-unknown-unknown", "", ""); - MRI = target->createMCRegInfo("i386-unknown-unknown"); - this->AsmInfo = target->createMCAsmInfo(*MRI, "i386-unknown-unknown"); - LASSERT( this->STI, "this->STI" ); - LASSERT( this->AsmInfo, "this->AsmInfo" ); - - //get an inst printer - int AsmPrinterVariant = AsmInfo->getAssemblerDialect(); - MCII = target->createMCInstrInfo(); - this->IP = target->createMCInstPrinter(AsmPrinterVariant, - *AsmInfo, - *MCII, - *MRI, - *STI); - LASSERT( this->IP, "this->IP" ); - - llvm::MCContext *Ctx = new llvm::MCContext(AsmInfo, MRI, nullptr); - this->DisAsm = target->createMCDisassembler(*this->STI, *Ctx ); - - LASSERT( this->DisAsm, "this->DisAsm" ); - - return; - } - - LLVMByteDecoder(std::string T) - { - this->target = NULL; - - llvm::MCRegisterInfo *MRI = NULL; - const llvm::MCInstrInfo *MCII = NULL; - TT = new llvm::Triple(); - - for(llvm::TargetRegistry::iterator it = llvm::TargetRegistry::begin(), - e = llvm::TargetRegistry::end(); - it != e; - ++it) - { - const llvm::Target &t = *it; - - if(!T.compare(t.getName())) { - target= &t; - break; - } - } - LASSERT( target != NULL, "target != NULL" ); - - - TT->setVendor(llvm::Triple::UnknownVendor); - TT->setOS(llvm::Triple::UnknownOS); - - if(0 == T.compare("x86-64")) { - TT->setArch(llvm::Triple::x86_64); - } else { - TT->setArch(llvm::Triple::x86); - } - - std::cout << " TT " <getName() <<" : " << TT->str() << " \n"; - this->STI = target->createMCSubtargetInfo( TT->getTriple(), "", ""); - MRI = target->createMCRegInfo(TT->getTriple()); - this->AsmInfo = target->createMCAsmInfo(*MRI, TT->getTriple()); - - std::cout.flush(); - LASSERT( this->STI, "this->STI" ); - LASSERT( this->AsmInfo, "this->AsmInfo" ); - - //get an inst printer - int AsmPrinterVariant = AsmInfo->getAssemblerDialect(); - MCII = target->createMCInstrInfo(); - this->IP = target->createMCInstPrinter(AsmPrinterVariant, - *AsmInfo, - *MCII, - *MRI, - *STI); - LASSERT( this->IP, "this->IP" ); - - llvm::MCContext *Ctx = new llvm::MCContext(AsmInfo, MRI, nullptr); - this->DisAsm = target->createMCDisassembler(*this->STI, *Ctx ); - - LASSERT( this->DisAsm, "this->DisAsm" ); - - return; - } - - llvm::MCInstPrinter *getPrinter(void) { return this->IP; } - InstPtr getInstFromBuff(VA, llvm::MemoryObject *); + NativeInstPtr getInstFromBuff(VA, llvm::MemoryObject *); }; #endif diff --git a/mc-sema/peToCFG/peToCFG.cpp b/mc-sema/peToCFG/peToCFG.cpp index 88e5e71e9..dad99b466 100644 --- a/mc-sema/peToCFG/peToCFG.cpp +++ b/mc-sema/peToCFG/peToCFG.cpp @@ -27,214 +27,557 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include +#include +#include + #include "X86.h" #include "peToCFG.h" #include "CFG.pb.h" -#include #include "../cfgToLLVM/Externals.h" #include "../cfgToLLVM/JumpTables.h" #include "../common/to_string.h" #include "LExcn.h" -#include using namespace llvm; using namespace std; -NativeModule::NativeModule(string modName, list f, - llvm::MCInstPrinter *p) - : funcs(f), - callGraph(f.size()), - nextID(0), - nameStr(modName), - MyPrinter(p) { +BufferMemoryObject::BufferMemoryObject(const uint8_t *bytes_, uint64_t length) + : bytes(bytes_, bytes_ + length), + base_addr(0) {} +BufferMemoryObject::BufferMemoryObject(const std::vector &bytes_, + uint64_t base_addr_) + : bytes(bytes_), + base_addr(base_addr_) {} + +BufferMemoryObject::BufferMemoryObject(const std::vector &bytes_) + : BufferMemoryObject(bytes_, 0) {} + +BufferMemoryObject::~BufferMemoryObject(void) {} + +uint64_t BufferMemoryObject::getBase() const { + return base_addr; +} + +uint64_t BufferMemoryObject::getExtent() const { + return bytes.size() + base_addr; +} + +int BufferMemoryObject::readByte(uint64_t addr, uint8_t *byte) const { + if (addr >= this->getBase()) { + if (addr < this->getExtent()) { + *byte = this->bytes[addr - this->base_addr]; + return 0; + } else { + return -1; + } + } else { + return -1; + } +} + +const std::vector &NativeInst::get_bytes(void) const { + return this->instBytes; +} + +bool NativeInst::terminator(void) const { + return this->is_terminator; +} + +void NativeInst::set_terminator(void) { + this->is_terminator = true; +} + +void NativeInst::set_system_call_number(int cn) { + this->system_call_number = cn; +} + +int NativeInst::get_system_call_number(void) const { + return this->system_call_number; +} + +bool NativeInst::has_system_call_number(void) const { + return this->system_call_number != -1; +} + +void NativeInst::set_local_noreturn(void) { + this->local_noreturn = true; +} + +bool NativeInst::has_local_noreturn(void) const { + return this->local_noreturn; +} + +uint8_t NativeInst::get_reloc_offset(CFGOpType op) const { + if (op == MEMRef) { + return this->mem_reloc_offset; + } else if (op == IMMRef) { + return this->imm_reloc_offset; + } else { + return -1; + } +} + +void NativeInst::set_reloc_offset(CFGOpType op, uint8_t ro) { + if (op == MEMRef) { + this->mem_reloc_offset = ro; + } else if (op == IMMRef) { + this->imm_reloc_offset = ro; + } else { + // + } +} + +void NativeInst::set_reference(CFGOpType op, uint64_t ref) { + if (op == MEMRef) { + this->mem_reference = ref; + this->has_mem_reference = true; + } else if (op == IMMRef) { + this->imm_reference = ref; + this->has_imm_reference = true; + } else { + // void + } +} + +void NativeInst::set_ref_type(CFGOpType op, CFGRefType rt) { + if (op == MEMRef) { + this->mem_ref_type = rt; + } else if (op == IMMRef) { + this->imm_ref_type = rt; + } else { + // void + } +} + +void NativeInst::set_ref_reloc_type(CFGOpType op, uint64_t ref, uint64_t ro, + CFGRefType rt) { + const char *ops = op == MEMRef ? "MEM" : "IMM"; + const char *rts = rt == CFGCodeRef ? "CODE" : "DATA"; + + std::cout << __FUNCTION__ << ": Adding ref: " << ops << ", to: " << std::hex + << ref << ", ro: " << ro << ", rt: " << rts << std::endl; + this->set_reference(op, ref); + this->set_reloc_offset(op, ro); + this->set_ref_type(op, rt); +} + +bool NativeInst::has_reference(CFGOpType op) const { + if (op == MEMRef) { + return this->has_mem_reference; + } else if (op == IMMRef) { + return this->has_imm_reference; + } else { + return false; + } +} + +uint64_t NativeInst::get_reference(CFGOpType op) const { + if (op == MEMRef) { + return this->mem_reference; + } else if (op == IMMRef) { + return this->imm_reference; + } else { + return -1; + } +} + +NativeInst::CFGRefType NativeInst::get_ref_type(CFGOpType op) const { + if (op == MEMRef) { + return this->mem_ref_type; + } else if (op == IMMRef) { + return this->imm_ref_type; + } else { + //TODO throw exception? + //return -1; + return this->mem_ref_type; + } +} + +bool NativeInst::has_code_ref(void) const { + if (this->has_mem_reference && this->mem_ref_type == CFGCodeRef) { + return true; + } + + if (this->has_imm_reference && this->imm_ref_type == CFGCodeRef) { + return true; + } + + return false; +} + +bool NativeInst::get_is_call_external(void) const { + return this->is_call_external; +} + +void NativeInst::set_is_call_external(void) { + this->is_call_external = true; +} + +llvm::MCInst &NativeInst::get_inst(void) { + return this->decoded_inst; +} + +void NativeInst::set_inst(const llvm::MCInst &i) { + this->decoded_inst = i; +} + +VA NativeInst::get_loc(void) const { + return this->loc; +} + +void NativeInst::set_tr(VA a) { + this->tgtIfTrue = a; +} + +void NativeInst::set_fa(VA a) { + this->tgtIfFalse = a; +} + +VA NativeInst::get_tr(void) const { + return this->tgtIfTrue; +} + +VA NativeInst::get_fa(void) const { + return this->tgtIfFalse; +} + +uint8_t NativeInst::get_len(void) const { + return this->len; +} + +void NativeInst::set_call_tgt(VA addr) { + this->targets.push_back(addr); return; } -string NativeModule::printModule(void) { - string s = ""; - - return s; +bool NativeInst::has_call_tgt(void) const { + return !this->targets.empty(); } -NativeBlockPtr NativeFunction::block_from_id(uint64_t id) { - NativeBlockPtr b; - map::iterator it; +VA NativeInst::get_call_tgt(int index) const { + return this->targets.at(index); +} - it = this->IDtoBlock.find(id); - if (it != this->IDtoBlock.end()) { - b = ( *it).second; +void NativeInst::set_ext_call_target(ExternalCodeRefPtr t) { + this->extCallTgt = t; + this->ext_call_target = true; + return; +} + +void NativeInst::set_ext_data_ref(ExternalDataRefPtr t) { + this->extDataRef = t; + this->ext_data_ref = true; + return; +} + +bool NativeInst::has_ext_data_ref(void) const { + return this->ext_data_ref; +} + +bool NativeInst::has_ext_call_target(void) const { + return this->ext_call_target; +} + +bool NativeInst::has_external_ref(void) const { + return this->has_ext_call_target() || this->has_ext_data_ref(); +} + +bool NativeInst::has_rip_relative(void) const { + return this->hasRIP; +} + +VA NativeInst::get_rip_relative(void) const { + return this->rip_target; +} + +void NativeInst::set_rip_relative(unsigned i) { + const llvm::MCOperand &base = decoded_inst.getOperand(i + 0); + const llvm::MCOperand &scale = decoded_inst.getOperand(i + 1); + const llvm::MCOperand &index = decoded_inst.getOperand(i + 2); + const llvm::MCOperand &disp = decoded_inst.getOperand(i + 3); + + rip_target = loc + len + disp.getImm(); + //const + this->hasRIP = true; +} + +// accessors for JumpTable +void NativeInst::set_jump_table(MCSJumpTablePtr p) { + this->jump_table = true; + this->jumpTable = p; +} + +MCSJumpTablePtr NativeInst::get_jump_table(void) const { + return this->jumpTable; +} + +bool NativeInst::has_jump_table(void) const { + return this->jump_table; +} + +// accessors for JumpIndexTable +void NativeInst::set_jump_index_table(JumpIndexTablePtr p) { + this->jump_index_table = true; + this->jumpIndexTable = p; +} + +JumpIndexTablePtr NativeInst::get_jump_index_table(void) const { + return this->jumpIndexTable; +} + +bool NativeInst::has_jump_index_table(void) const { + return this->jump_index_table; +} + +NativeInst::Prefix NativeInst::get_prefix(void) const { + return this->pfx; +} + +unsigned int NativeInst::get_addr_space(void) const { + switch (this->pfx) { + case GSPrefix: + return 256; + case FSPrefix: + return 257; + default: + return 0; } - - return b; } -uint64_t NativeFunction::entry_block_id() const { +unsigned int NativeInst::get_opcode(void) const { + return this->decoded_inst.getOpcode(); +} - map::const_iterator it = this->baseToID.find(this->funcEntryVA); - LASSERT(it != this->baseToID.end(), "Block not found"); +ExternalCodeRefPtr NativeInst::get_ext_call_target(void) const { + return this->extCallTgt; +} +ExternalDataRefPtr NativeInst::get_ext_data_ref(void) const { + return this->extDataRef; +} - uint64_t fBID = ( *it).second; +NativeInst::NativeInst(VA v, uint8_t l, const llvm::MCInst &inst, Prefix k, + const std::vector &bytes) + : instBytes(bytes), + tgtIfTrue(0), + tgtIfFalse(0), + loc(v), + decoded_inst(inst), + pfx(k), + ext_call_target(false), + is_call_external(false), + is_terminator(false), + imm_reloc_offset(0), + imm_reference(0), + imm_ref_type(CFGDataRef), + has_imm_reference(false), + mem_reloc_offset(0), + mem_reference(0), + mem_ref_type(CFGDataRef), + has_mem_reference(false), + len(l), + jump_table(false), + jump_index_table(false), + ext_data_ref(false), + arch(0), + system_call_number( -1), + local_noreturn(false), + hasRIP(false), + rip_target(0), + offset_table( -1) {} - return fBID; +DataSectionEntry::DataSectionEntry(uint64_t base, const std::vector &b) + : base(base), + bytes(b), + is_symbol(false) {} + +DataSectionEntry::DataSectionEntry(uint64_t base, const std::string &sname) + : base(base), + sym_name(sname), + is_symbol(true) { + + this->bytes.push_back(0x0); + this->bytes.push_back(0x0); + this->bytes.push_back(0x0); + this->bytes.push_back(0x0); +} + +DataSectionEntry::DataSectionEntry(uint64_t base, const std::string &sname, + uint64_t symbol_size) + : base(base), + bytes(symbol_size), + sym_name(sname), + is_symbol(true) {} + +uint64_t DataSectionEntry::getBase(void) const { + return this->base; +} + +uint64_t DataSectionEntry::getSize(void) const { + return this->bytes.size(); +} + +const std::vector &DataSectionEntry::getBytes(void) const { + return this->bytes; +} + +bool DataSectionEntry::getSymbol(std::string &sname) const { + if (this->is_symbol) { + sname = this->sym_name; + return true; + } else { + return false; + } +} + +DataSectionEntry::~DataSectionEntry(void) {} + +DataSection::DataSection(void) + : base(NO_BASE), + read_only(false) {} + +DataSection::~DataSection(void) {} + +void DataSection::setReadOnly(bool isro) { + this->read_only = isro; +} + +bool DataSection::isReadOnly(void) const { + return this->read_only; +} + +uint64_t DataSection::getBase(void) const { + return this->base; +} + +const std::list &DataSection::getEntries(void) const { + return this->entries; +} + +void DataSection::addEntry(const DataSectionEntry &dse) { + this->entries.push_back(dse); + if (this->base == NO_BASE || this->base > dse.getBase()) { + this->base = dse.getBase(); + } +} + +uint64_t DataSection::getSize(void) const { + uint64_t size_sum = 0; + for (std::list::const_iterator itr = entries.begin(); + itr != entries.end(); itr++) { + size_sum += itr->getSize(); + } + return size_sum; +} + +std::vector DataSection::getBytes(void) const { + std::vector all_bytes; + for (const auto entry : entries) { + const auto &vec = entry.getBytes(); + all_bytes.insert(all_bytes.end(), vec.begin(), vec.end()); + } + return all_bytes; +} + +NativeEntrySymbol::NativeEntrySymbol(const std::string &name_, VA addr_) + : name(name_), + addr(addr_), + has_extra(false), + num_args(0), + does_return(false), + calling_conv(ExternalCodeRef::CallerCleanup) {} + +NativeEntrySymbol::NativeEntrySymbol(VA addr_) + : NativeEntrySymbol("sub_" + to_string(addr_, std::hex), addr_) {} + +const std::string &NativeEntrySymbol::getName(void) const { + return this->name; +} + +VA NativeEntrySymbol::getAddr(void) const { + return this->addr; +} + +bool NativeEntrySymbol::hasExtra(void) const { + return this->has_extra; +} + +int NativeEntrySymbol::getArgc(void) const { + return this->num_args; +} + +bool NativeEntrySymbol::doesReturn(void) const { + return this->does_return; +} + +ExternalCodeRef::CallingConvention NativeEntrySymbol::getConv(void) const { + return this->calling_conv; +} + +void NativeEntrySymbol::setExtra(int argc_, bool does_ret, + ExternalCodeRef::CallingConvention conv) { + this->num_args = argc_; + this->does_return = does_ret; + this->calling_conv = conv; + this->has_extra = true; +} + +NativeModule::NativeModule( + const std::string &module_name_, + const std::unordered_map &funcs_, + const std::string &triple_, const llvm::Target *target_) + : funcs(funcs_), + module_name(module_name_), + target(target_), + triple(triple_) {} + +VA NativeFunction::get_start(void) { + return this->funcEntryVA; +} + +uint64_t NativeFunction::num_blocks(void) { + return this->blocks.size(); +} + +const std::map &NativeFunction::get_blocks(void) const { + return this->blocks; } NativeBlockPtr NativeFunction::block_from_base(VA base) { - NativeBlockPtr b; - - map::iterator it = this->baseToID.find(base); - LASSERT(it != this->baseToID.end(), "Block not found"); - - uint64_t fBID = ( *it).second; - - b = this->block_from_id(fBID); - - LASSERT(b, ""); - - return b; + auto block_it = blocks.find(base); + LASSERT(block_it != blocks.end(), "Block not found"); + return block_it->second; } -void NativeFunction::compute_graph(void) { - //build a CFG in boost BGL from the data structures we have - this->graph = new CFG(this->nextBlockID); +NativeBlock::NativeBlock(VA b) + : baseAddr(b) {} - //iterate over all of the keys in IDtoBlock - for (map::iterator it = this->IDtoBlock.begin(); - it != this->IDtoBlock.end(); ++it) { - uint64_t blockId = ( *it).first; - NativeBlockPtr block = ( *it).second; - list &blockFollows = block->get_follows(); - - for (list::iterator fit = blockFollows.begin(); - fit != blockFollows.end(); ++fit) { - uint64_t fVA = *fit; - uint64_t fBID; - - //find the block ID for this VA - map::iterator mit = this->baseToID.find(fVA); - LASSERT(mit != this->baseToID.end(), ""); - fBID = ( *mit).second; - - //add an edge between the current block ID and the following - //block ID - add_edge(blockId, fBID, *(this->graph)); - } - } - - return; -} - -NativeBlock::NativeBlock(VA b, MCInstPrinter *p) - : baseAddr(b), - MyPrinter(p) { -} - -string NativeBlock::print_block(void) { - string s; - list::iterator it; - - s.append(to_string(this->get_base(), hex) + "\\n "); - for (it = this->instructions.begin(); it != this->instructions.end(); ++it) { - InstPtr ip = *it; - string st = ip->printInst(); - s.append(st + "\\n "); - } - - return s; -} - -void NativeBlock::add_inst(InstPtr p) { +void NativeBlock::add_inst(NativeInstPtr p) { this->instructions.push_back(p); - return; +} + +VA NativeBlock::get_base(void) { + return this->baseAddr; +} +void NativeBlock::add_follow(VA f) { + this->follows.push_back(f); +} +std::list &NativeBlock::get_follows(void) { + return this->follows; +} + +const std::list &NativeBlock::get_insts(void) { + return this->instructions; } void NativeFunction::add_block(NativeBlockPtr b) { - uint64_t blockBase = b->get_base(); - uint64_t curBlockID = this->nextBlockID; - - this->nextBlockID++; - - //check and make sure that we haven't added this block before - map::iterator it = this->baseToID.find(blockBase); - LASSERT(it == this->baseToID.end(), "Added duplicate block!"); - - this->baseToID[blockBase] = curBlockID; - this->IDtoBlock[curBlockID] = b; - - return; -} - -const llvm::Target *findDisTarget(string arch) { - const llvm::Target *tgt = NULL; - - for (llvm::TargetRegistry::iterator it = llvm::TargetRegistry::begin(), ie = - llvm::TargetRegistry::end(); it != ie; ++it) { - if (arch == it->getName()) { - tgt = & *it; - break; - } - } - - return tgt; -} - -class cfg_visitor : public boost::default_bfs_visitor { - private: - NativeFunctionPtr natFun; - NativeModulePtr natMod; - public: - cfg_visitor(NativeFunctionPtr n, NativeModulePtr m) - : natFun(n), - natMod(m) { - } - - template - void discover_vertex(Vertex u, const Graph & g) const; -}; - -template -void cfg_visitor::discover_vertex(Vertex u, const Graph &g) const { - NativeBlockPtr curBlock = this->natFun->block_from_id(u); - - LASSERT(curBlock, ""); - - list stmts = curBlock->get_insts(); - - for (list::iterator it = stmts.begin(); it != stmts.end(); ++it) { - InstPtr inst = *it; - - if (inst->has_ext_call_target()) { - ExternalCodeRefPtr ex = inst->get_ext_call_target(); - - this->natMod->addExtCall(ex); - } - - if (inst->has_ext_data_ref()) { - ExternalDataRefPtr ex = inst->get_ext_data_ref(); - - this->natMod->addExtDataRef(ex); - } - } - - return; -} - -void addExterns(list funcs, NativeModulePtr mod) { - for (list::iterator fit = funcs.begin(); - fit != funcs.end(); ++fit) { - NativeFunctionPtr fun = *fit; - cfg_visitor visitor(fun, mod); - CFG funcGraph = fun->get_cfg(); - - boost::breadth_first_search(funcGraph, boost::vertex(0, funcGraph), - boost::visitor(visitor)); - } - - return; + auto blockBase = b->get_base(); + LASSERT( !this->blocks.count(blockBase), "Added duplicate block!"); + this->blocks[blockBase] = b; } string NativeFunction::get_name(void) { - return string("sub_" + to_string(this->funcEntryVA, hex)); + return string("sub_" + to_string(this->funcEntryVA, std::hex)); } const std::string &NativeFunction::get_symbol_name(void) { @@ -242,7 +585,7 @@ const std::string &NativeFunction::get_symbol_name(void) { } string NativeBlock::get_name(void) { - return string("block_0x" + to_string(this->baseAddr, hex)); + return string("block_0x" + to_string(this->baseAddr, std::hex)); } void NativeModule::addDataSection(VA base, std::vector &bytes) { @@ -251,11 +594,58 @@ void NativeModule::addDataSection(VA base, std::vector &bytes) { DataSectionEntry dse(base, bytes); ds.addEntry(dse); - this->dataSecs.push_back(ds); + this->data_sections.push_back(ds); } void NativeModule::addDataSection(const DataSection &d) { - this->dataSecs.push_back(d); + this->data_sections.push_back(d); +} + +void NativeModule::add_func(NativeFunctionPtr f) { + this->funcs[f->get_start()] = f; +} + +const std::unordered_map &NativeModule::get_funcs( + void) const { + return this->funcs; +} + +const std::string &NativeModule::name(void) const { + return this->module_name; +} + +const std::list &NativeModule::getData(void) const { + return this->data_sections; +} + +//add an external reference +void NativeModule::addExtCall(ExternalCodeRefPtr p) { + this->external_code_refs.push_back(p); +} + +const std::list &NativeModule::getExtCalls(void) const { + return this->external_code_refs; +} + +//external data ref +void NativeModule::addExtDataRef(ExternalDataRefPtr p) { + this->external_data_refs.push_back(p); +} + +const std::list &NativeModule::getExtDataRefs(void) const { + return this->external_data_refs; +} + +const std::vector &NativeModule::getEntryPoints(void) const { + return this->entries; +} + +void NativeModule::addEntryPoint(const NativeEntrySymbol &ep) { + this->entries.push_back(ep); +} + +bool NativeModule::is64Bit(void) const { + return !strcmp(target->getName(), "x86-64"); } void NativeModule::addOffsetTables( @@ -264,56 +654,57 @@ void NativeModule::addOffsetTables( for (const auto &table : tables) { llvm::errs() << "Adding offset table at " << to_string(table->getStartAddr(), std::hex) << "\n"; - this->offsetTables.insert( {table->getStartAddr(), table}); + this->offset_tables.insert( {table->getStartAddr(), table}); } } -Inst::CFGRefType deserRefType(::Instruction::RefType k) { +NativeInst::CFGRefType deserRefType(::Instruction::RefType k) { switch (k) { case ::Instruction::CodeRef: - return Inst::CFGCodeRef; + return NativeInst::CFGCodeRef; case ::Instruction::DataRef: - return Inst::CFGDataRef; + return NativeInst::CFGDataRef; default: throw LErr(__LINE__, __FILE__, "Unsupported Ref Type"); } } -static ExternalCodeRefPtr getExternal(const std::string &s, const list &extcode) { - - for(auto e : extcode) { - if (s == e->getSymbolName()) { - return e; - } +static ExternalCodeRefPtr getExternal(const std::string &s, + const list &extcode) { + for (auto e : extcode) { + if (s == e->getSymbolName()) { + return e; } - - return ExternalCodeRefPtr(); + } + return ExternalCodeRefPtr(); } -InstPtr deserializeInst(const ::Instruction &inst, LLVMByteDecoder &decoder, - const list &extcode) { +static NativeInstPtr DeserializeInst(const ::Instruction &inst, + LLVMByteDecoder &decoder, + const std::list &extcode) { VA addr = inst.inst_addr(); - boost::int64_t tr_tgt = inst.true_target(); - boost::int64_t fa_tgt = inst.false_target(); - //uint32_t len = inst.inst_len(); - string instData = inst.inst_bytes(); - vector bytes(instData.begin(), instData.end()); - BaseBufferMemoryObject bbmo(bytes, addr); + auto tr_tgt = static_cast(inst.true_target()); + auto fa_tgt = static_cast(inst.false_target()); + const auto &bytes_str = inst.inst_bytes(); + std::vector bytes(bytes_str.begin(), bytes_str.end()); + BufferMemoryObject bbmo(bytes, addr); //produce an MCInst from the instruction buffer using the ByteDecoder - InstPtr ip = decoder.getInstFromBuff(addr, &bbmo); + NativeInstPtr ip = decoder.getInstFromBuff(addr, &bbmo); - if (tr_tgt > 0) + if (tr_tgt > 0) { ip->set_tr(tr_tgt); + } - if (fa_tgt > 0) + if (fa_tgt > 0) { ip->set_fa(fa_tgt); + } if (inst.has_ext_call_name()) { - ExternalCodeRefPtr p = getExternal(inst.ext_call_name(), extcode); - if(p == nullptr) { - throw LErr(__LINE__, __FILE__, "Could not find external: " + inst.ext_call_name()); + if (p == nullptr) { + throw LErr(__LINE__, __FILE__, + "Could not find external: " + inst.ext_call_name()); } ip->set_ext_call_target(p); } @@ -324,25 +715,25 @@ InstPtr deserializeInst(const ::Instruction &inst, LLVMByteDecoder &decoder, } if (inst.has_imm_reference()) { - uint64_t ref = inst.imm_reference(); + auto ref = static_cast(inst.imm_reference()); uint64_t ro = 0; - Inst::CFGRefType rt; + NativeInst::CFGRefType rt; if (inst.has_imm_reloc_offset()) { - ro = inst.imm_reloc_offset(); + ro = static_cast(inst.imm_reloc_offset()); } if (inst.has_imm_ref_type()) { rt = deserRefType(inst.imm_ref_type()); } - ip->set_ref_reloc_type(Inst::IMMRef, ref, ro, rt); + ip->set_ref_reloc_type(NativeInst::IMMRef, ref, ro, rt); } if (inst.has_mem_reference()) { uint64_t ref = inst.mem_reference(); uint64_t ro = 0; - Inst::CFGRefType rt; + NativeInst::CFGRefType rt; if (inst.has_mem_reloc_offset()) { ro = inst.mem_reloc_offset(); @@ -352,14 +743,14 @@ InstPtr deserializeInst(const ::Instruction &inst, LLVMByteDecoder &decoder, rt = deserRefType(inst.mem_ref_type()); } - ip->set_ref_reloc_type(Inst::MEMRef, ref, ro, rt); + ip->set_ref_reloc_type(NativeInst::MEMRef, ref, ro, rt); } if (inst.has_jump_table()) { // create new jump table const ::JumpTbl &jmp_tbl = inst.jump_table(); - vector table_entries; + std::vector table_entries; for (int i = 0; i < jmp_tbl.table_entries_size(); i++) { table_entries.push_back(jmp_tbl.table_entries(i)); @@ -369,8 +760,8 @@ InstPtr deserializeInst(const ::Instruction &inst, LLVMByteDecoder &decoder, if (jmp_tbl.has_offset_from_data()) { data_offset = jmp_tbl.offset_from_data(); } - MCSJumpTable *jmp = new MCSJumpTable(table_entries, jmp_tbl.zero_offset(), - data_offset); + auto jmp = new MCSJumpTable(table_entries, jmp_tbl.zero_offset(), + data_offset); ip->set_jump_table(MCSJumpTablePtr(jmp)); } @@ -378,10 +769,11 @@ InstPtr deserializeInst(const ::Instruction &inst, LLVMByteDecoder &decoder, // create new jump table const ::JumpIndexTbl &idx_tbl = inst.jump_index_table(); - const string& serialized_tbl = idx_tbl.table_entries(); - vector tbl_bytes(serialized_tbl.begin(), serialized_tbl.end()); + const auto &serialized_tbl = idx_tbl.table_entries(); + std::vector tbl_bytes(serialized_tbl.begin(), + serialized_tbl.end()); - JumpIndexTable *idx = new JumpIndexTable(tbl_bytes, idx_tbl.zero_offset()); + auto idx = new JumpIndexTable(tbl_bytes, idx_tbl.zero_offset()); ip->set_jump_index_table(JumpIndexTablePtr(idx)); } @@ -400,25 +792,30 @@ InstPtr deserializeInst(const ::Instruction &inst, LLVMByteDecoder &decoder, return ip; } -NativeBlockPtr deserializeBlock(const ::Block &block, - LLVMByteDecoder &decoder, - const list &extcode) { - NativeBlockPtr natB = NativeBlockPtr( - new NativeBlock(block.base_address(), decoder.getPrinter())); +static NativeBlockPtr deserializeBlock( + const ::Block &block, LLVMByteDecoder &decoder, + const std::list &extcode) { + + auto block_va = static_cast(block.base_address()); + NativeBlockPtr natB = NativeBlockPtr(new NativeBlock(block_va)); + /* read all the instructions in */ - for (int i = 0; i < block.insts_size(); i++) - natB->add_inst(deserializeInst(block.insts(i), decoder, extcode)); + for (auto &inst : block.insts()) { + natB->add_inst(DeserializeInst(inst, decoder, extcode)); + } /* add the follows */ - for (int i = 0; i < block.block_follows_size(); i++) - natB->add_follow(block.block_follows(i)); + for (auto &succ : block.block_follows()) { + natB->add_follow(succ); + } return natB; } -NativeFunctionPtr deserializeFunction(const ::Function &func, - LLVMByteDecoder &decoder, - const list &extcode) { +static NativeFunctionPtr DeserializeNativeFunc( + const ::Function &func, LLVMByteDecoder &decoder, + const std::list &extcode) { + NativeFunction *nf = nullptr; if (func.has_symbol_name() && !func.symbol_name().empty()) { nf = new NativeFunction(func.entry_address(), func.symbol_name()); @@ -426,18 +823,15 @@ NativeFunctionPtr deserializeFunction(const ::Function &func, nf = new NativeFunction(func.entry_address()); } - NativeFunctionPtr natF = NativeFunctionPtr(nf); - //read all the blocks from this function - for (int i = 0; i < func.blocks_size(); i++) { - natF->add_block(deserializeBlock(func.blocks(i), decoder, extcode)); + for (auto &block : func.blocks()) { + nf->add_block(deserializeBlock(block, decoder, extcode)); } - natF->compute_graph(); - return natF; + return NativeFunctionPtr(nf); } -ExternalCodeRef::CallingConvention deserCC( +static ExternalCodeRef::CallingConvention DeserializeCallingConvention( ::ExternalFunction::CallingConvention k) { switch (k) { case ::ExternalFunction::CallerCleanup: @@ -461,11 +855,11 @@ ExternalCodeRef::CallingConvention deserCC( } } -ExternalCodeRefPtr deserializeExt(const ::ExternalFunction &f) { - ExternalCodeRef::CallingConvention c = deserCC(f.calling_convention()); - string symName = f.symbol_name(); +static ExternalCodeRefPtr DeserializeExternFunc(const ::ExternalFunction &f) { + auto c = DeserializeCallingConvention(f.calling_convention()); + const auto &symName = f.symbol_name(); ExternalCodeRef::ReturnType retTy; - uint32_t argCount = f.argument_count(); + auto argCount = f.argument_count(); if (f.has_return()) { retTy = ExternalCodeRef::IntTy; @@ -484,56 +878,53 @@ ExternalCodeRefPtr deserializeExt(const ::ExternalFunction &f) { return ext; } -ExternalDataRefPtr deserializeExtData(const ::ExternalData &ed) { - string symName = ed.symbol_name(); - uint32_t data_size = ed.data_size(); - +static ExternalDataRefPtr DeserializeExternData(const ::ExternalData &ed) { ExternalDataRefPtr ext = ExternalDataRefPtr( - new ExternalDataRef(symName, data_size)); + new ExternalDataRef(ed.symbol_name(), + static_cast(ed.data_size()))); ext->setWeak(ed.is_weak()); - return ext; } -static DataSectionEntry deserializeDataSymbol(const ::DataSymbol &ds) { - cout << "Deserializing symbol at: " << to_string(ds.base_address(), hex) - << ", " << ds.symbol_name() << ", " - << to_string(ds.symbol_size(), hex) << endl; +static DataSectionEntry DeserializeDataSymbol(const ::DataSymbol &ds) { + std::cout << "Deserializing symbol at: " + << to_string(ds.base_address(), std::hex) << ", " + << ds.symbol_name() << ", " + << to_string(ds.symbol_size(), std::hex) << endl; return DataSectionEntry(ds.base_address(), ds.symbol_name(), ds.symbol_size()); } -static DataSectionEntry makeDSEBlob(const vector &bytes, +static DataSectionEntry makeDSEBlob(const std::vector &bytes, uint64_t start, // offset in bytes vector uint64_t end, // offset in bytes vector uint64_t base_va) // virtual address these bytes are based at { - vector blob_bytes(bytes.begin() + (start), bytes.begin() + (end)); + std::vector blob_bytes(bytes.begin() + (start), + bytes.begin() + (end)); return DataSectionEntry(base_va, blob_bytes); - } -static -void deserializeData(const ::Data &d, DataSection &ds) { - string dt = d.data(); - vector bytes(dt.begin(), dt.end()); +static void DeserializeData(const ::Data &d, DataSection &ds) { + const auto &dt = d.data(); + std::vector bytes(dt.begin(), dt.end()); uint64_t base_address = d.base_address(); uint64_t cur_pos = base_address; ds.setReadOnly(d.read_only()); //DataSectionEntry dse(d.base_address(), bytes); - vector::iterator bytepos = bytes.begin(); + std::vector::iterator bytepos = bytes.begin(); // assumes symbols are in-order for (int i = 0; i < d.symbols_size(); i++) { - DataSectionEntry dse_sym = deserializeDataSymbol(d.symbols(i)); - string sym_name; - dse_sym.getSymbol(sym_name); - uint64_t dse_base = dse_sym.getBase(); + DataSectionEntry dse_sym = DeserializeDataSymbol(d.symbols(i)); + auto dse_base = dse_sym.getBase(); + + std::cout << "cur_pos: " << to_string(cur_pos, std::hex) << std::endl; + std::cout << "dse_base: " << to_string(dse_base, std::hex) << std::endl; + // symbol next to blob - cout << "cur_pos: " << to_string(cur_pos, hex) << endl; - cout << "dse_base: " << to_string(dse_base, hex) << endl; if (dse_base > cur_pos) { ds.addEntry( makeDSEBlob(bytes, cur_pos - base_address, dse_base - base_address, @@ -541,20 +932,19 @@ void deserializeData(const ::Data &d, DataSection &ds) { ds.addEntry(dse_sym); cur_pos = dse_base + dse_sym.getSize(); - cout << "new_cur_pos: " << to_string(cur_pos, hex) << endl; + std::cout << "new_cur_pos: " << to_string(cur_pos, std::hex) + << std::endl; - } - // symbols next to each other - else if (dse_base == cur_pos) { + // symbols next to each other + } else if (dse_base == cur_pos) { ds.addEntry(dse_sym); - cur_pos = dse_base + dse_sym.getSize(); - cout << "new_cur_pos2: " << to_string(cur_pos, hex) << endl; - string sym_name; - dse_sym.getSymbol(sym_name); + std::cout << "new_cur_pos2: " << to_string(cur_pos, std::hex) + << std::endl; + } else { - cerr << __FILE__ << ":" << __LINE__ << endl; - cerr << "Deserialized an out-of-order symbol!" << endl; + cerr << __FILE__ << ":" << __LINE__ << std::endl; + cerr << "Deserialized an out-of-order symbol!" << std::endl; throw LErr(__LINE__, __FILE__, "Deserialized an out-of-order symbol!"); } } @@ -565,472 +955,109 @@ void deserializeData(const ::Data &d, DataSection &ds) { ds.addEntry( makeDSEBlob(bytes, cur_pos - base_address, bytes.size(), cur_pos)); } - } -NativeModulePtr readProtoBuf(std::string fName, const llvm::Target *T) { - NativeModulePtr m; - ::Module serializedMod; - ifstream inStream(fName.c_str(), ios::binary); - LLVMByteDecoder decode(std::string(T->getName())); - +NativeModulePtr ReadProtoBuf(const std::string &file_name, + const std::string &triple, + const llvm::Target *target) { GOOGLE_PROTOBUF_VERIFY_VERSION; - if ( !inStream.good()) { - cout << "Failed to open file " << fName << endl; + NativeModulePtr m; + ::Module proto; + + std::ifstream fstream(file_name, std::ios::binary); + if (!fstream.good()) { + std::cout << "Failed to open file " << file_name << endl; return m; } //read the protobuf object in - if (serializedMod.ParseFromIstream( &inStream)) { - //now, make everything we need to build a NativeModulePtr - list foundFuncs; - list externFuncs; - list externData; - list dataSecs; - list offsetTables; - - //iterate over every external function definition - for (int i = 0; i < serializedMod.external_funcs_size(); i++) { - const ::ExternalFunction &f = serializedMod.external_funcs(i); - cout << "Deserializing externs..." << endl; - externFuncs.push_back(deserializeExt(f)); - } - - //iterate over every function - for (int i = 0; i < serializedMod.internal_funcs_size(); i++) { - const ::Function &f = serializedMod.internal_funcs(i); - cout << "Deserializing functions..." << endl; - foundFuncs.push_back(deserializeFunction(f, decode, externFuncs)); - } - - //iterate over every data element - for (int i = 0; i < serializedMod.internal_data_size(); i++) { - const ::Data &d = serializedMod.internal_data(i); - DataSection ds; - cout << "Deserializing data..." << endl; - deserializeData(d, ds); - dataSecs.push_back(ds); - } - - //iterate over every external data definition - for (int i = 0; i < serializedMod.external_data_size(); i++) { - const ::ExternalData &ed = serializedMod.external_data(i); - cout << "Deserializing external data..." << endl; - externData.push_back(deserializeExtData(ed)); - } - - for (int i = 0; i < serializedMod.offset_tables_size(); i++) { - const ::OffsetTable &ot = serializedMod.offset_tables(i); - - std::vector > v; - - for (int j = 0; j < ot.table_offsets_size(); j++) { - v.push_back(std::pair(ot.table_offsets(j), ot.destinations(j))); - } - - MCSOffsetTablePtr t(new MCSOffsetTable(v, 0, ot.start_addr())); - offsetTables.push_back(t); - - } - - //create the module - cout << "Creating module..." << endl; - m = NativeModulePtr( - new NativeModule(serializedMod.module_name(), foundFuncs, NULL)); - - cout << "Setting target..." << endl; - m->setTarget(T); - cout << "Done setting target" << endl; - - //populate the module with externals calls - cout << "Adding external funcs..." << endl; - for (list::iterator it = externFuncs.begin(); - it != externFuncs.end(); ++it) { - m->addExtCall( *it); - } - - //populate the module with externals data - cout << "Adding external data..." << endl; - for (list::iterator it = externData.begin(); - it != externData.end(); ++it) { - m->addExtDataRef( *it); - } - - //populate the module with internal data - cout << "Adding internal data..." << endl; - for (list::iterator it = dataSecs.begin(); - it != dataSecs.end(); ++it) { - m->addDataSection( *it); - } - - cout << "Adding Offset Tables..." << endl; - m->addOffsetTables(offsetTables); - - // set entry points for the module - cout << "Adding entry points..." << endl; - for (int i = 0; i < serializedMod.entries_size(); i++) { - const ::EntrySymbol &es = serializedMod.entries(i); - - NativeModule::EntrySymbol native_es(es.entry_name(), es.entry_address()); - if (es.has_entry_extra()) { - const ::EntrySymbolExtra &ese = es.entry_extra(); - ExternalCodeRef::CallingConvention c = deserCC(ese.entry_cconv()); - native_es.setExtra(ese.entry_argc(), ese.does_return(), c); - } - m->addEntryPoint(native_es); - } - - } else { - cout << "Failed to deserialize protobuf module" << endl; + if (!proto.ParseFromIstream(&fstream)) { + std::cout << "Failed to deserialize protobuf module" << std::endl; + return m; } - cout << "Returning modue..." << endl; + std::unordered_map native_funcs; + std::list extern_funcs; + std::list extern_data; + std::list data_sections; + std::list offset_tables; + + std::cout << "Deserializing externs..." << std::endl; + for (const auto &external_func : proto.external_funcs()) { + extern_funcs.push_back(DeserializeExternFunc(external_func)); + } + + LLVMByteDecoder decode(triple, target); + std::cout << "Deserializing functions..." << std::endl; + for (const auto &internal_func : proto.internal_funcs()) { + native_funcs[static_cast(internal_func.entry_address())] = + DeserializeNativeFunc(internal_func, decode, extern_funcs); + } + + std::cout << "Deserializing data..." << std::endl; + for (auto &internal_data_elem : proto.internal_data()) { + DataSection ds; + DeserializeData(internal_data_elem, ds); + data_sections.push_back(ds); + } + + std::cout << "Deserializing external data..." << std::endl; + for (const auto &exteral_data_elem : proto.external_data()) { + extern_data.push_back(DeserializeExternData(exteral_data_elem)); + } + + for (const auto &offset_table : proto.offset_tables()) { + std::vector> v; + for (auto j = 0; j < offset_table.table_offsets_size(); j++) { + v.push_back( + std::make_pair(offset_table.table_offsets(j), + offset_table.destinations(j))); + } + + MCSOffsetTablePtr t(new MCSOffsetTable(v, 0, offset_table.start_addr())); + offset_tables.push_back(t); + } + + std::cout << "Creating module..." << std::endl; + m = NativeModulePtr( + new NativeModule(proto.module_name(), native_funcs, triple, target)); + + //populate the module with externals calls + std::cout << "Adding external funcs..." << std::endl; + for (auto &extern_func_call : extern_funcs) { + m->addExtCall(extern_func_call); + } + + //populate the module with externals data + std::cout << "Adding external data..." << std::endl; + for (auto &extern_data_ref : extern_data) { + m->addExtDataRef(extern_data_ref); + } + + //populate the module with internal data + std::cout << "Adding internal data..." << std::endl; + for (auto &data_section : data_sections) { + m->addDataSection(data_section); + } + + std::cout << "Adding Offset Tables..." << std::endl; + m->addOffsetTables(offset_tables); + + // set entry points for the module + std::cout << "Adding entry points..." << std::endl; + for (const auto &entry_symbol : proto.entries()) { + NativeEntrySymbol native_es(entry_symbol.entry_name(), + entry_symbol.entry_address()); + + if (entry_symbol.has_entry_extra()) { + const auto &ese = entry_symbol.entry_extra(); + auto c = DeserializeCallingConvention(ese.entry_cconv()); + native_es.setExtra(ese.entry_argc(), ese.does_return(), c); + } + m->addEntryPoint(native_es); + } + + std::cout << "Returning modue..." << std::endl; return m; } - -NativeModulePtr readModule(std::string fName, ModuleInputFormat inf, - list entries, const llvm::Target *T) { - NativeModulePtr m; - - switch (inf) { - case PEFile: - case COFFObject: - throw LErr(__LINE__, __FILE__, "Please use bin_descend instead"); - break; - case ProtoBuff: - m = readProtoBuf(fName, T); - break; - default: - LASSERT(false, "NOT IMPLEMENTED"); - } - - return m; -} - -NativeBlockPtr blockFromBuff(VA startVA, BufferMemoryObject &bmo, - const MCDisassembler *D, MCInstPrinter *P) { - NativeBlockPtr curBlock = NativeBlockPtr(new NativeBlock(startVA, P)); - VA curVA = startVA; - VA nextVA; - bool has_follow = true; - while (curVA < bmo.getExtent()) { - uint64_t insLen; - MCInst inst; - llvm::MCDisassembler::DecodeStatus s; - MCOperand oper; - - nextVA = curVA; - - s = D->getInstruction(inst, insLen, bmo, (uint64_t) curVA, llvm::nulls(), - llvm::nulls()); - - LASSERT(llvm::MCDisassembler::Success == s, ""); - - string outS; - llvm::raw_string_ostream osOut(outS); - P->printInst( &inst, osOut, ""); - vector bytes; - InstPtr p = InstPtr( - new Inst(curVA, insLen, inst, osOut.str(), Inst::NoPrefix, bytes)); - //do some amount of checking for true and false branches - switch (inst.getOpcode()) { - case X86::JMP_4: - case X86::JMP_1: - oper = inst.getOperand(0); - if (oper.isImm()) { - nextVA += oper.getImm() + insLen; - curBlock->add_follow(nextVA); - p->set_tr(nextVA); - } else { - throw LErr(__LINE__, __FILE__, "should not happen"); - } - has_follow = false; - break; - case X86::LOOP: - case X86::LOOPE: - case X86::LOOPNE: - case X86::JO_4: - case X86::JO_1: - case X86::JNO_4: - case X86::JNO_1: - case X86::JB_4: - case X86::JB_1: - case X86::JAE_4: - case X86::JAE_1: - case X86::JE_4: - case X86::JE_1: - case X86::JNE_4: - case X86::JNE_1: - case X86::JBE_4: - case X86::JBE_1: - case X86::JA_4: - case X86::JA_1: - case X86::JS_4: - case X86::JS_1: - case X86::JNS_4: - case X86::JNS_1: - case X86::JP_4: - case X86::JP_1: - case X86::JNP_4: - case X86::JNP_1: - case X86::JL_4: - case X86::JL_1: - case X86::JGE_4: - case X86::JGE_1: - case X86::JLE_4: - case X86::JLE_1: - case X86::JG_4: - case X86::JG_1: - case X86::JCXZ: - case X86::JECXZ_32: - case X86::JRCXZ: - oper = inst.getOperand(0); - if (oper.isImm()) { - nextVA += oper.getImm() + insLen; - curBlock->add_follow(nextVA); - curBlock->add_follow(curVA + insLen); - p->set_tr(nextVA); - p->set_fa(curVA + insLen); - } else { - throw LErr(__LINE__, __FILE__, "should not happen"); - } - has_follow = false; - break; - } - - curBlock->add_inst(p); - - curVA += insLen; - - if (has_follow == false) { - - break; - } - } - - return curBlock; -} - -NativeFunctionPtr funcFromBuff(VA startVA, BufferMemoryObject &bmo, - const MCDisassembler *D, MCInstPrinter *P) { - NativeFunctionPtr curF = NativeFunctionPtr(new NativeFunction(startVA)); - VA curVA = 0; - - while (curVA < bmo.getExtent()) { - NativeBlockPtr b = blockFromBuff(curVA, bmo, D, P); - - curF->add_block(b); - curVA += b->get_size(); - } - - curF->compute_graph(); - return curF; -} - -static void instFromNatInst(InstPtr i, ::Instruction *protoInst) { - /* add the raw bytes for an instruction */ - vector bytes = i->get_bytes(); - protoInst->set_inst_bytes(string(bytes.begin(), bytes.end())); - - /* add the instruction address */ - protoInst->set_inst_addr(i->get_loc()); - - /* add targets for true and false */ - if (i->get_tr() != 0) - protoInst->set_true_target(i->get_tr()); - else - protoInst->set_true_target( -1); - - if (i->get_fa() != 0) - protoInst->set_false_target(i->get_fa()); - else - protoInst->set_false_target( -1); - - protoInst->set_inst_len(i->get_len()); - - if (i->has_ext_call_target()) { - string s = i->get_ext_call_target()->getSymbolName(); - protoInst->set_ext_call_name(s); - } - - if (i->has_ext_data_ref()) { - - string s = i->get_ext_data_ref()->getSymbolName(); - protoInst->set_ext_data_name(s); - } - - if (i->has_jump_table()) { - MCSJumpTablePtr native_jmp = i->get_jump_table(); - ::JumpTbl *proto_jmp = protoInst->mutable_jump_table(); - const vector& the_table = native_jmp->getJumpTable(); - - vector::const_iterator it = the_table.begin(); - while (it != the_table.end()) { - proto_jmp->add_table_entries( *it); - ++it; - } - - proto_jmp->set_zero_offset(native_jmp->getInitialEntry()); - } - - if (i->has_jump_index_table()) { - JumpIndexTablePtr native_idx = i->get_jump_index_table(); - ::JumpIndexTbl *proto_idx = protoInst->mutable_jump_index_table(); - const vector& idx_table = native_idx->getJumpIndexTable(); - - proto_idx->set_table_entries(string(idx_table.begin(), idx_table.end())); - proto_idx->set_zero_offset(native_idx->getInitialEntry()); - } - - return; -} - -static void blockFromNatBlock(NativeBlockPtr b, ::Block *protoBlock) { - /* add the base address */ - protoBlock->set_base_address(b->get_base()); - - /* add the block follows */ - for (auto succBlock : b->get_follows()) { - protoBlock->add_block_follows(succBlock); - } - - /* add the instructions */ - for (auto iptr : b->get_insts()) { - instFromNatInst(iptr, protoBlock->add_insts()); - } - - return; -} - -static ExternalFunction::CallingConvention serializeCC( - ExternalCodeRef::CallingConvention c) { - switch (c) { - case ExternalCodeRef::CallerCleanup: - return ExternalFunction::CallerCleanup; - break; - - case ExternalCodeRef::CalleeCleanup: - return ExternalFunction::CalleeCleanup; - break; - - case ExternalCodeRef::FastCall: - return ExternalFunction::FastCall; - break; - - case ExternalCodeRef::McsemaCall: - return ExternalFunction::McsemaCall; - break; - - default: - throw LErr(__LINE__, __FILE__, "Unknown case"); - } -} - -static void extFuncFromNat(ExternalCodeRefPtr e, ::ExternalFunction *protoExt) { - protoExt->set_symbol_name(e->getSymbolName()); - protoExt->set_argument_count(e->getNumArgs()); - - if (e->getReturnType() == ExternalCodeRef::NoReturn) { - protoExt->set_no_return(true); - } else { - protoExt->set_no_return(false); - - } - - if (e->getReturnType() != ExternalCodeRef::VoidTy) { - protoExt->set_has_return(true); - } else { - protoExt->set_has_return(false); - } - - protoExt->set_calling_convention(serializeCC(e->getCallingConvention())); - // protoExt->set_signature(e->getFunctionSignature()); - - //printf("%s : %s\n", (e->getSymbolName()).c_str(), (e->getFunctionSignature()).c_str()), fflush(stdout); - return; -} - -static void extDataRefFromNat(ExternalDataRefPtr dr, ::ExternalData *protoExt) { - std::string sym = dr->getSymbolName(); - protoExt->set_symbol_name(sym); - protoExt->set_data_size(dr->getDataSize()); - - return; -} - -static void funcFromNat(NativeFunctionPtr f, ::Function *fProto) { - fProto->set_entry_address(f->get_start()); - - /* iterate over the blocks and add them */ - const auto &funcCFG = f->get_cfg(); - for (auto vertex_id : funcCFG.m_vertex_set) { - blockFromNatBlock(f->block_from_id(vertex_id), fProto->add_blocks()); - } - - return; -} - -static void dumpData(DataSection &d, ::Data *protoData) { - const auto &bytes = d.getBytes(); - protoData->set_base_address(d.getBase()); - protoData->set_data(std::string(bytes.begin(), bytes.end())); - protoData->set_read_only(d.isReadOnly()); - - const auto &entries = d.getEntries(); - for (auto &entry : entries) { - string sym_name; - if (entry.getSymbol(sym_name)) { - // is a symbol - auto ds = protoData->add_symbols(); - ds->set_base_address(entry.getBase()); - ds->set_symbol_name(sym_name); - ds->set_symbol_size(entry.getSize()); - printf("dumpData : base %lx, size, %ld\n", entry.getBase(), - entry.getSize()); - } - } -} - -std::string dumpProtoBuf(NativeModulePtr m) { - /* first, we want to serialize and dump this module ptr into a proto buf */ - ::Module protoMod; - - GOOGLE_PROTOBUF_VERIFY_VERSION; - - /* write the modules name */ - protoMod.set_module_name(m->name()); - - /* dump all the functions and external functions */ - for (auto &ext_call : m->getExtCalls()) { - extFuncFromNat(ext_call, protoMod.add_external_funcs()); - } - - for (auto &dref : m->getExtDataRefs()) { - extDataRefFromNat(dref, protoMod.add_external_data()); - } - - for (auto f : m->get_funcs()) { - funcFromNat(f, protoMod.add_internal_funcs()); - } - - /* then dump data references */ - for (auto &d : m->getData()) { - dumpData(d, protoMod.add_internal_data()); - } - - for (auto &e : m->getEntryPoints()) { - auto new_es = protoMod.add_entries(); - new_es->set_entry_name(e.getName()); - new_es->set_entry_address(e.getAddr()); - if (e.hasExtra()) { - auto ese = new_es->mutable_entry_extra(); - ese->set_entry_argc(e.getArgc()); - ese->set_entry_cconv(serializeCC(e.getConv())); - ese->set_does_return(e.doesReturn()); - } - } - - /* finally, serialize the module as a string object and return it */ - return protoMod.SerializeAsString(); -} diff --git a/mc-sema/peToCFG/peToCFG.h b/mc-sema/peToCFG/peToCFG.h index 8d29527e5..374288c60 100644 --- a/mc-sema/peToCFG/peToCFG.h +++ b/mc-sema/peToCFG/peToCFG.h @@ -54,31 +54,19 @@ #include #include #include +#include #include #include -#include -#include +#include +#include +#include #include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include - -typedef boost::adjacency_matrix CFG; -typedef uint64_t FuncID; typedef uint64_t VA; -class Inst; -typedef boost::shared_ptr InstPtr; +class NativeInst; +typedef NativeInst *NativeInstPtr; #include @@ -90,36 +78,29 @@ typedef boost::shared_ptr InstPtr; class MCSJumpTable; class JumpIndexTable; class MCSOffsetTable; -typedef boost::shared_ptr ExternalCodeRefPtr; -typedef boost::shared_ptr ExternalDataRefPtr; -typedef boost::shared_ptr MCSJumpTablePtr; -typedef boost::shared_ptr JumpIndexTablePtr; -typedef boost::shared_ptr MCSOffsetTablePtr; + +typedef ExternalCodeRef *ExternalCodeRefPtr; +typedef ExternalDataRef *ExternalDataRefPtr; +typedef MCSJumpTable *MCSJumpTablePtr; +typedef JumpIndexTable *JumpIndexTablePtr; +typedef MCSOffsetTable *MCSOffsetTablePtr; class BufferMemoryObject : public llvm::MemoryObject { private: - std::vector Bytes; + const std::vector bytes; + const uint64_t base_addr; + public: - BufferMemoryObject(const uint8_t *bytes, uint64_t length) { - for (unsigned int i = 0; i < length; i++) { - this->Bytes.push_back(bytes[i]); - } - return; - } + BufferMemoryObject(const uint8_t *bytes_, uint64_t length); + BufferMemoryObject(const std::vector &bytes_, + uint64_t base_addr_); + BufferMemoryObject(const std::vector &bytes_); - uint64_t getBase() const { - return 0; - } - uint64_t getExtent() const { - return this->Bytes.size(); - } + virtual ~BufferMemoryObject(void); - int readByte(uint64_t addr, uint8_t *byte) const { - if (addr > this->getExtent()) - return -1; - *byte = this->Bytes[addr]; - return 0; - } + uint64_t getBase(void) const override; + uint64_t getExtent(void) const override; + int readByte(uint64_t addr, uint8_t *byte) const override; }; /* we're going to make some assumptions about external calls: @@ -130,7 +111,7 @@ class BufferMemoryObject : public llvm::MemoryObject { assign that value to the EAX register */ -class Inst { +class NativeInst { public: enum Prefix { NoPrefix, @@ -156,8 +137,7 @@ class Inst { VA tgtIfTrue; VA tgtIfFalse; VA loc; - llvm::MCInst NativeInst; - std::string instRep; + llvm::MCInst decoded_inst; ExternalCodeRefPtr extCallTgt; ExternalDataRefPtr extDataRef; @@ -201,460 +181,165 @@ class Inst { bool hasRIP; public: VA offset_table; - std::vector get_bytes(void) { - return this->instBytes; - } - std::string printInst(void) { - return this->instRep; - } - bool terminator(void) { - return this->is_terminator; - } - void set_terminator(void) { - this->is_terminator = true; - } + const std::vector &get_bytes(void) const; - void set_system_call_number(int cn) { - this->system_call_number = cn; - } - int get_system_call_number() { - return this->system_call_number; - } - bool has_system_call_number() { - return this->system_call_number != -1; - } + bool terminator(void) const; + void set_terminator(void); - void set_local_noreturn() { - this->local_noreturn = true; - } + void set_system_call_number(int cn); + int get_system_call_number(void) const; + bool has_system_call_number(void) const; - bool has_local_noreturn() { - return this->local_noreturn; - } + void set_local_noreturn(void); + bool has_local_noreturn(void) const; - uint8_t get_reloc_offset(CFGOpType op) { - if (op == MEMRef) { - return this->mem_reloc_offset; - } else if (op == IMMRef) { - return this->imm_reloc_offset; - } else { - return -1; - } - } + uint8_t get_reloc_offset(CFGOpType op) const; + void set_reloc_offset(CFGOpType op, uint8_t ro); - void set_reloc_offset(CFGOpType op, uint8_t ro) { - if (op == MEMRef) { - this->mem_reloc_offset = ro; - } else if (op == IMMRef) { - this->imm_reloc_offset = ro; - } else { - // - } - } - - void set_reference(CFGOpType op, uint64_t ref) { - if (op == MEMRef) { - this->mem_reference = ref; - this->has_mem_reference = true; - } else if (op == IMMRef) { - this->imm_reference = ref; - this->has_imm_reference = true; - } else { - // void - } - } - - void set_ref_type(CFGOpType op, CFGRefType rt) { - if (op == MEMRef) { - this->mem_ref_type = rt; - } else if (op == IMMRef) { - this->imm_ref_type = rt; - } else { - // void - } - } + void set_reference(CFGOpType op, uint64_t ref); + uint64_t get_reference(CFGOpType op) const; + bool has_reference(CFGOpType op) const; + void set_ref_type(CFGOpType op, CFGRefType rt); + CFGRefType get_ref_type(CFGOpType op) const; void set_ref_reloc_type(CFGOpType op, uint64_t ref, uint64_t ro, - CFGRefType rt) { - const char *ops = op == MEMRef ? "MEM" : "IMM"; - const char *rts = rt == CFGCodeRef ? "CODE" : "DATA"; + CFGRefType rt); - std::cout << __FUNCTION__ << ": Adding ref: " << ops << ", to: " - << std::hex << ref << ", ro: " << ro << ", rt: " << rts - << std::endl; - this->set_reference(op, ref); - this->set_reloc_offset(op, ro); - this->set_ref_type(op, rt); - } + bool has_code_ref(void) const; - bool has_reference(CFGOpType op) { - if (op == MEMRef) { - return this->has_mem_reference; - } else if (op == IMMRef) { - return this->has_imm_reference; - } else { - return false; - } - } + bool get_is_call_external(void) const; + void set_is_call_external(void); - uint64_t get_reference(CFGOpType op) { - if (op == MEMRef) { - return this->mem_reference; - } else if (op == IMMRef) { - return this->imm_reference; - } else { - return -1; - } - } + llvm::MCInst &get_inst(void); + void set_inst(const llvm::MCInst &i); - CFGRefType get_ref_type(CFGOpType op) { - if (op == MEMRef) { - return this->mem_ref_type; - } else if (op == IMMRef) { - return this->imm_ref_type; - } else { - //TODO throw exception? - //return -1; - return this->mem_ref_type; - } - } + VA get_loc(void) const; - bool has_code_ref() { - if (this->has_mem_reference && this->mem_ref_type == CFGCodeRef) { - return true; - } + void set_tr(VA a); + void set_fa(VA a); - if (this->has_imm_reference && this->imm_ref_type == CFGCodeRef) { - return true; - } + VA get_tr(void) const; + VA get_fa(void) const; - return false; - } + uint8_t get_len(void) const; - bool get_is_call_external(void) { - return this->is_call_external; - } - void set_is_call_external(void) { - this->is_call_external = true; - } + void set_call_tgt(VA addr); + bool has_call_tgt(void) const; + VA get_call_tgt(int index) const; - llvm::MCInst get_inst(void) { - return this->NativeInst; - } - void set_inst(const llvm::MCInst &i) { - this->NativeInst = i; - } - void set_inst_rep(std::string s) { - this->instRep = s; - } + void set_ext_call_target(ExternalCodeRefPtr t); + ExternalCodeRefPtr get_ext_call_target(void) const; + bool has_ext_call_target(void) const; - VA get_loc(void) { - return this->loc; - } + void set_ext_data_ref(ExternalDataRefPtr t); + ExternalDataRefPtr get_ext_data_ref(void) const; + bool has_ext_data_ref(void) const; - void set_tr(VA a) { - this->tgtIfTrue = a; - } - void set_fa(VA a) { - this->tgtIfFalse = a; - } + bool has_external_ref(void) const; - VA get_tr(void) { - return this->tgtIfTrue; - } - VA get_fa(void) { - return this->tgtIfFalse; - } - - uint8_t get_len(void) { - return this->len; - } - - void set_call_tgt(VA addr) { - this->targets.push_back(addr); - return; - } - bool has_call_tgt() { - return !this->targets.empty(); - } - VA get_call_tgt(int index) { - return this->targets.at(index); - } - - void set_ext_call_target(ExternalCodeRefPtr t) { - this->extCallTgt = t; - this->ext_call_target = true; - return; - } - - void set_ext_data_ref(ExternalDataRefPtr t) { - this->extDataRef = t; - this->ext_data_ref = true; - return; - } - - bool has_ext_data_ref(void) { - return this->ext_data_ref; - } - - bool has_ext_call_target(void) { - return this->ext_call_target; - } - - bool has_external_ref(void) { - return this->has_ext_call_target() || this->has_ext_data_ref(); - } - - bool has_rip_relative(void) { - return this->hasRIP; - } - - VA get_rip_relative(void) { - return this->rip_target; - } - - void set_rip_relative(unsigned i) { - const llvm::MCOperand &base = NativeInst.getOperand(i + 0); - const llvm::MCOperand &scale = NativeInst.getOperand(i + 1); - const llvm::MCOperand &index = NativeInst.getOperand(i + 2); - const llvm::MCOperand &disp = NativeInst.getOperand(i + 3); - - rip_target = loc + len + disp.getImm(); - //const - this->hasRIP = true; - } + bool has_rip_relative(void) const; + VA get_rip_relative(void) const; + void set_rip_relative(unsigned i); // accessors for JumpTable - void set_jump_table(MCSJumpTablePtr p) { - this->jump_table = true; - this->jumpTable = p; - } - MCSJumpTablePtr get_jump_table(void) { - return this->jumpTable; - } - bool has_jump_table(void) { - return this->jump_table; - } + void set_jump_table(MCSJumpTablePtr p); + MCSJumpTablePtr get_jump_table(void) const; + bool has_jump_table(void) const; // accessors for JumpIndexTable - void set_jump_index_table(JumpIndexTablePtr p) { - this->jump_index_table = true; - this->jumpIndexTable = p; - } - JumpIndexTablePtr get_jump_index_table(void) { - return this->jumpIndexTable; - } - bool has_jump_index_table(void) { - return this->jump_index_table; - } + void set_jump_index_table(JumpIndexTablePtr p); + JumpIndexTablePtr get_jump_index_table(void) const; + bool has_jump_index_table(void) const; - Prefix get_prefix(void) { - return this->pfx; - } - unsigned int get_addr_space(void) { + Prefix get_prefix(void) const; + unsigned int get_addr_space(void) const; + unsigned int get_opcode(void) const; - switch (this->pfx) { - case GSPrefix: - return 256; - case FSPrefix: - return 257; - default: - return 0; - } - } - - unsigned int get_opcode(void) { - return this->NativeInst.getOpcode(); - } - - ExternalCodeRefPtr get_ext_call_target(void) { - return this->extCallTgt; - } - ExternalDataRefPtr get_ext_data_ref(void) { - return this->extDataRef; - } - - Inst(VA v, uint8_t l, const llvm::MCInst &inst, std::string instR, Prefix k, - std::vector bytes) - : instBytes(bytes), - tgtIfTrue(0), - tgtIfFalse(0), - loc(v), - NativeInst(inst), - instRep(instR), - pfx(k), - ext_call_target(false), - is_call_external(false), - is_terminator(false), - imm_reloc_offset(0), - imm_reference(0), - imm_ref_type(CFGDataRef), - has_imm_reference(false), - mem_reloc_offset(0), - mem_reference(0), - mem_ref_type(CFGDataRef), - has_mem_reference(false), - len(l), - jump_table(false), - jump_index_table(false), - ext_data_ref(false), - arch(0), - system_call_number( -1), - local_noreturn(false), - hasRIP(false), - rip_target(0), - offset_table( -1) { - } + NativeInst(VA v, uint8_t l, const llvm::MCInst &inst, Prefix k, + const std::vector &bytes); }; class NativeBlock { private: //a list of instructions VA baseAddr; - std::list instructions; + std::list instructions; std::list follows; - llvm::MCInstPrinter *MyPrinter; + public: - NativeBlock(VA, llvm::MCInstPrinter *); - void add_inst(InstPtr); - VA get_base(void) { - return this->baseAddr; - } - void add_follow(VA f) { - this->follows.push_back(f); - } - std::list &get_follows(void) { - return this->follows; - } - std::string print_block(void); + explicit NativeBlock(VA); + void add_inst(NativeInstPtr); + VA get_base(void); + void add_follow(VA f); + std::list &get_follows(void); std::string get_name(void); - const std::list &get_insts(void) { - return this->instructions; - } - llvm::MCInstPrinter *get_printer(void) { - return this->MyPrinter; - } - uint32_t get_size(void) { - uint32_t blockLen = 0; + const std::list &get_insts(void); - for (std::list::iterator i = this->instructions.begin(); - i != this->instructions.end(); ++i) { - InstPtr inst = *i; - blockLen += inst->get_len(); - } - - return blockLen; - } + private: + NativeBlock(void) = delete; }; -typedef boost::shared_ptr NativeBlockPtr; +typedef NativeBlock *NativeBlockPtr; class NativeFunction { public: - NativeFunction(VA b) - : funcEntryVA(b), - nextBlockID(0), - graph(nullptr) { - } + explicit NativeFunction(VA b) + : funcEntryVA(b) {} + NativeFunction(VA b, const std::string &sym) : funcEntryVA(b), - funcSymName(sym), - nextBlockID(0), - graph(nullptr) { - } + funcSymName(sym) {} + void add_block(NativeBlockPtr); - VA get_start(void) { - return this->funcEntryVA; - } - uint64_t num_blocks(void) { - return this->IDtoBlock.size(); - } - NativeBlockPtr block_from_id(uint64_t); + + VA get_start(void); + uint64_t num_blocks(void); NativeBlockPtr block_from_base(VA); - uint64_t entry_block_id() const; - void compute_graph(void); - const CFG &get_cfg(void) { - return *this->graph; - } + const std::map &get_blocks(void) const; std::string get_name(void); const std::string &get_symbol_name(void); + private: - //a graph of blocks - CFG *graph; - //a map of block bases to block IDs - std::map baseToID; - //a map of block IDs to blocks - std::map IDtoBlock; + NativeFunction(void) = delete; + + // Use a `std::map` to keep the blocks in their original order. + std::map blocks; + //addr of function entry point VA funcEntryVA; + std::string funcSymName; - //next available block ID - uint64_t nextBlockID; }; -typedef boost::shared_ptr NativeBlockPtr; -typedef boost::shared_ptr NativeFunctionPtr; +typedef NativeBlock *NativeBlockPtr; +typedef NativeFunction *NativeFunctionPtr; class DataSectionEntry { public: - DataSectionEntry(uint64_t base, const std::vector& b) - : base(base), - bytes(b), - is_symbol(false) { - //empty - } + DataSectionEntry(uint64_t base, const std::vector &b); + DataSectionEntry(uint64_t base, const std::string &sname); + DataSectionEntry(uint64_t base, const std::string &sname, + uint64_t symbol_size); - DataSectionEntry(uint64_t base, const std::string& sname) - : base(base), - sym_name(sname), - is_symbol(true) { + uint64_t getBase(void) const; - this->bytes.push_back(0x0); - this->bytes.push_back(0x0); - this->bytes.push_back(0x0); - this->bytes.push_back(0x0); - } + uint64_t getSize(void) const; - DataSectionEntry(uint64_t base, const std::string& sname, - uint64_t symbol_size) - : base(base), - sym_name(sname), - is_symbol(true) { - // initialize bytes to null - for (unsigned int i = 0; i < symbol_size; i++) { - this->bytes.push_back(0x0); - } - } + const std::vector &getBytes(void) const; - uint64_t getBase() const { - return this->base; - } - uint64_t getSize() const { - return this->bytes.size(); - } - std::vector getBytes() const { - return this->bytes; - } + bool getSymbol(std::string &sname) const; - bool getSymbol(std::string &sname) const { - if (this->is_symbol) { - sname = this->sym_name; - return true; - } else { - return false; - } - } - - virtual ~DataSectionEntry() { - } - ; + virtual ~DataSectionEntry(void); protected: uint64_t base; std::vector bytes; bool is_symbol; std::string sym_name; + + private: + DataSectionEntry(void) = delete; }; class DataSection { @@ -666,205 +351,99 @@ class DataSection { public: static const uint64_t NO_BASE = (uint64_t) ( -1); - DataSection() - : base(NO_BASE), - read_only(false) { - } + DataSection(void); + virtual ~DataSection(void); - virtual ~DataSection() { - } - ; + void setReadOnly(bool isro); + bool isReadOnly(void) const; + uint64_t getBase(void) const; + const std::list &getEntries(void) const; + void addEntry(const DataSectionEntry &dse); + uint64_t getSize(void) const; + std::vector getBytes(void) const; +}; - void setReadOnly(bool isro) { - this->read_only = isro; - } - bool isReadOnly() const { - return this->read_only; - } - uint64_t getBase() const { - return this->base; - } +class NativeEntrySymbol { + private: + const std::string name; + const VA addr; + bool has_extra; + int num_args; + bool does_return; + ExternalCodeRef::CallingConvention calling_conv; - std::list& getEntries() { - return this->entries; - } + public: + NativeEntrySymbol(const std::string &name_, VA addr_); + explicit NativeEntrySymbol(VA addr_); - void addEntry(const DataSectionEntry &dse) { - this->entries.push_back(dse); - if (this->base == NO_BASE || this->base > dse.getBase()) { - this->base = dse.getBase(); - } - } + const std::string &getName(void) const; + VA getAddr(void) const; + bool hasExtra(void) const; + void setExtra(int argc_, bool does_ret, + ExternalCodeRef::CallingConvention conv); + int getArgc(void) const; + bool doesReturn(void) const; + ExternalCodeRef::CallingConvention getConv(void) const; - uint64_t getSize() const { - uint64_t size_sum = 0; - for (std::list::const_iterator itr = entries.begin(); - itr != entries.end(); itr++) { - size_sum += itr->getSize(); - } - - return size_sum; - } - std::vector getBytes() const { - std::vector all_bytes; - for (std::list::const_iterator itr = entries.begin(); - itr != entries.end(); itr++) { - std::vector vec = itr->getBytes(); - all_bytes.insert(all_bytes.end(), vec.begin(), vec.end()); - } - - return all_bytes; - } + private: + NativeEntrySymbol(void) = delete; }; class NativeModule { public: - class EntrySymbol { - private: - std::string name; - VA addr; - bool has_extra; - int argc; - bool does_return; - ExternalCodeRef::CallingConvention cconv; + NativeModule(const std::string &module_name_, + const std::unordered_map &funcs_, + const std::string &triple_, + const llvm::Target *target_); - public: - EntrySymbol(const std::string &name, VA addr) - : name(name), - addr(addr), - has_extra(false), - argc(0), - does_return(false), - cconv(ExternalCodeRef::CallerCleanup) { - } + void add_func(NativeFunctionPtr f); + const std::unordered_map &get_funcs(void) const; - EntrySymbol(VA addr) - : addr(addr), - has_extra(false), - argc(0), - does_return(false), - cconv(ExternalCodeRef::CallerCleanup) { - this->name = "sub_" + to_string(this->addr, std::hex); - } - - const std::string& getName() const { - return this->name; - } - VA getAddr() const { - return this->addr; - } - bool hasExtra() const { - return this->has_extra; - } - int getArgc() const { - return this->argc; - } - bool doesReturn() const { - return this->does_return; - } - ExternalCodeRef::CallingConvention getConv() const { - return this->cconv; - } - - void setExtra(int argc, bool does_ret, - ExternalCodeRef::CallingConvention conv) { - this->argc = argc; - this->does_return = does_ret; - this->cconv = conv; - this->has_extra = true; - } - }; - - NativeModule(std::string, std::list, - llvm::MCInstPrinter *); - void add_func(NativeFunctionPtr f) { - this->funcs.push_back(f); - } - const std::list &get_funcs(void) { - return this->funcs; - } - CFG get_cfg(void) { - return this->callGraph; - } - std::string printModule(void); - std::string name(void) { - return this->nameStr; - } - llvm::MCInstPrinter *get_printer(void) { - return this->MyPrinter; - } + const std::string &name(void) const; //add a data section from a COFF object void addDataSection(VA, std::vector &); void addDataSection(const DataSection &d); - std::list &getData(void) { - return this->dataSecs; - } + + const std::list &getData(void) const; //add an external reference - void addExtCall(ExternalCodeRefPtr p) { - this->extCalls.push_back(p); - return; - } - const std::list &getExtCalls(void) { - return this->extCalls; - } + void addExtCall(ExternalCodeRefPtr p); + + const std::list &getExtCalls(void) const; //external data ref - void addExtDataRef(ExternalDataRefPtr p) { - this->extData.push_back(p); - return; - } - const std::list &getExtDataRefs(void) { - return this->extData; - } + void addExtDataRef(ExternalDataRefPtr p); - std::vector entries; + const std::list &getExtDataRefs(void) const; - const std::vector &getEntryPoints() const { - return this->entries; - } - void addEntryPoint(const EntrySymbol& ep) { - this->entries.push_back(ep); - } + const std::vector &getEntryPoints(void) const; - void setTarget(const llvm::Target *T) { - this->target = T; - } + void addEntryPoint(const NativeEntrySymbol &ep); - void setTargetTriple(const std::string &triple) { - this->triple = llvm::Triple(triple); - } + bool is64Bit(void) const; - bool is64Bit(void) { - if (std::string(target->getName()) == "x86-64") { - return true; - } - return false; - } + void addOffsetTables(const std::list &tables); - void addOffsetTables(const std::list & tables); + std::vector entries; private: - std::list funcs; - std::map IDtoFunc; - CFG callGraph; - FuncID nextID; - std::string nameStr; - llvm::MCInstPrinter *MyPrinter; - const llvm::Target *target; - llvm::Triple triple; + NativeModule(void) = delete; - std::list dataSecs; - std::list extCalls; - std::list extData; + std::unordered_map funcs; + const std::string module_name; + const llvm::Target * const target; + const llvm::Triple triple; + + std::list data_sections; + std::list external_code_refs; + std::list external_data_refs; public: - std::unordered_map offsetTables; - + std::unordered_map offset_tables; }; -typedef boost::shared_ptr NativeModulePtr; +typedef NativeModule *NativeModulePtr; enum ModuleInputFormat { COFFObject, @@ -873,22 +452,8 @@ enum ModuleInputFormat { ProtoBuff }; -const llvm::Target *findDisTarget(std::string); -NativeModulePtr readModule(std::string, ModuleInputFormat, std::list, - const llvm::Target*); - -// used in testSemantics.cpp via funcFromBuff -NativeBlockPtr blockFromBuff(VA, BufferMemoryObject &, - const llvm::MCDisassembler *, - llvm::MCInstPrinter *); - -// used in testSemantics.cpp -NativeFunctionPtr funcFromBuff(VA, BufferMemoryObject &, - const llvm::MCDisassembler *, - llvm::MCInstPrinter *); - -void addExterns(std::list, NativeModulePtr); - -std::string dumpProtoBuf(NativeModulePtr); +NativeModulePtr ReadProtoBuf(const std::string &file_name, + const std::string &triple, + const llvm::Target *target); #endif diff --git a/mc-sema/tests/demo16.sh b/mc-sema/tests/demo16.sh index 730fc68b9..29bf1cf63 100755 --- a/mc-sema/tests/demo16.sh +++ b/mc-sema/tests/demo16.sh @@ -11,8 +11,8 @@ then echo "Using IDA to recover CFG" ${BIN_DESCEND_PATH}/bin_descend_wrapper.py -march=x86 -entry-symbol=shiftit -i=demo_test16.o >> /dev/null else - echo "Using bin_descend to recover CFG" - ${BIN_DESCEND_PATH}/bin_descend -d -march=x86 -entry-symbol=shiftit -i=demo_test16.o + echo "Please install IDA to recover the control flow graph; bin_descend is now deprecated" + exit 1 fi ${CFG_TO_BC_PATH}/cfg_to_bc -mtriple=i686-pc-linux-gnu -i demo_test16.cfg -entrypoint=shiftit -o demo_test16.bc diff --git a/mc-sema/tests/demo17.sh b/mc-sema/tests/demo17.sh index 19a3041c6..d8081f567 100755 --- a/mc-sema/tests/demo17.sh +++ b/mc-sema/tests/demo17.sh @@ -2,25 +2,20 @@ source env.sh -rm -f demo17 demo17.bc demo17.cfg demo17_opt.bc demo17_out.exe +rm -f demo_test17.cfg demo_driver17.o demo_test17.o demo_test17_mine.o demo_driver17.exe -${CC} -ggdb -m32 -o demo17 demo17.c +${CC} -ggdb -m32 -c -o demo_test17.o demo17.c if [ -e "${IDA_PATH}/idaq" ] then echo "Using IDA to recover CFG" - IDALOG=logfile_demo17.txt - ${BIN_DESCEND_PATH}/bin_descend_wrapper.py -d -func-map=${STD_DEFS}/linux.txt -i=demo17 -entry-symbol=main >> /dev/null + ${BIN_DESCEND_PATH}/bin_descend_wrapper.py -march=x86 -entry-symbol=main -i=demo_test17.o >> /dev/null else - echo "Using bin_descend to recover CFG" - ${BIN_DESCEND_PATH}/bin_descend -d -march=x86 -func-map=${STD_DEFS}/linux.txt -i=demo17 -entry-symbol=main + echo "Please install IDA to recover the control flow graph; bin_descend is now deprecated" + exit 1 fi -${CFG_TO_BC_PATH}/cfg_to_bc -mtriple=i686-pc-linux-gnu -i demo17.cfg -driver=mcsema_main,main,2,return,C -o demo17.bc -${LLVM_PATH}/opt -O3 -o demo17_opt.bc demo17.bc -${LLVM_PATH}/llvm-link ${RUNTIME_PATH}/linux_i386_callback.bc demo17_opt.bc > demo17_linked.bc -${LLVM_PATH}/llc -filetype=obj -o demo17.o demo17_linked.bc +${CFG_TO_BC_PATH}/cfg_to_bc -mtriple=i686-pc-linux-gnu -i demo_test17.cfg -entrypoint=main -o demo_test17.bc +clang-3.5 -O3 -m32 -o demo_driver17.exe ../../drivers/ELF_32_linux.S demo_test17.bc -${CC} -m32 -ggdb -o demo17_out.exe driver_demo17.c demo17.o - -./demo17_out.exe +./demo_driver17.exe diff --git a/mc-sema/tests/driver_demo17.c b/mc-sema/tests/driver_demo17.c deleted file mode 100644 index af1f01ab3..000000000 --- a/mc-sema/tests/driver_demo17.c +++ /dev/null @@ -1,12 +0,0 @@ -#include - -extern int mcsema_main(int argc, const char *argv[]); -extern void* __mcsema_create_alt_stack(size_t stack_size); -extern void* __mcsema_free_alt_stack(size_t stack_size); - -int main(int argc, const char *argv[]) { - __mcsema_create_alt_stack(4096*2); - int rv = mcsema_main(argc, argv); - __mcsema_free_alt_stack(4096*2); - return rv; -} diff --git a/mc-sema/tests/env.sh b/mc-sema/tests/env.sh index fdd0b52b7..21ad7d685 100644 --- a/mc-sema/tests/env.sh +++ b/mc-sema/tests/env.sh @@ -5,8 +5,8 @@ IDA_PATH=$(<./IDA_PATH.linux) GET_CFG_PY=${BIN_DESCEND_PATH}/get_cfg.py STD_DEFS=$(<./STD_DEFS.linux) RUNTIME_PATH=$(<./RUNTIME_PATH.linux) -CC=clang -CXX=clang++ +CC=clang-3.5 +CXX=clang++-3.5 export TVHEADLESS=1 export IDALOG=/dev/null export IDA_PATH diff --git a/mc-sema/validator/CMakeLists.txt b/mc-sema/validator/CMakeLists.txt deleted file mode 100644 index bd8f4bfdf..000000000 --- a/mc-sema/validator/CMakeLists.txt +++ /dev/null @@ -1,5 +0,0 @@ -if("${TARGET}" STREQUAL "X86_64") - add_subdirectory(x86_64) -else() - add_subdirectory(x86) -endif("${TARGET}" STREQUAL "X86_64") diff --git a/mc-sema/validator/x86/CMakeLists.txt b/mc-sema/validator/x86/CMakeLists.txt deleted file mode 100644 index 253bc8a1b..000000000 --- a/mc-sema/validator/x86/CMakeLists.txt +++ /dev/null @@ -1,3 +0,0 @@ -add_subdirectory(valTool) -add_subdirectory(valTest) -add_subdirectory(testSemantics) diff --git a/mc-sema/validator/x86/testSemantics/CMakeLists.txt b/mc-sema/validator/x86/testSemantics/CMakeLists.txt deleted file mode 100644 index 8259d8888..000000000 --- a/mc-sema/validator/x86/testSemantics/CMakeLists.txt +++ /dev/null @@ -1,46 +0,0 @@ -find_package(Nasm REQUIRED) -include_directories(${LLVM_MAIN_SRC_DIR}/utils/unittest/googletest/include - ${CMAKE_CURRENT_SOURCE_DIR}/../../../peToCFG - ${CMAKE_CURRENT_SOURCE_DIR}/../../../cfgToLLVM - ${CMAKE_CURRENT_SOURCE_DIR}/../../../../llvm-3.5/utils/unittest/googletest/include - ${CMAKE_CURRENT_SOURCE_DIR}/../../../../llvm-3.5/lib/Target/X86 - ${CMAKE_CURRENT_BINARY_DIR}/../../../../llvm-3.5/lib/Target/X86) - -SET_SOURCE_FILES_PROPERTIES( "${CMAKE_CURRENT_SOURCE_DIR}/testSemantics.auto.cpp" - PROPERTIES - GENERATED true - ) - -add_custom_target(testSemantics.auto.cpp ALL - COMMAND ${PYTHON_EXECUTABLE} "${CMAKE_CURRENT_SOURCE_DIR}/../testgen.py" -tstmpl "${CMAKE_CURRENT_SOURCE_DIR}/testSemantics.template" -tsout "${CMAKE_CURRENT_SOURCE_DIR}/testSemantics.auto.cpp" -testfiles "${CMAKE_CURRENT_SOURCE_DIR}/../tests" -nasm "${NASM_EXECUTABLE}" - COMMENT Generating semantics tests -) -add_executable(testSemantics "${CMAKE_CURRENT_SOURCE_DIR}/testSemantics.auto.cpp" ) -add_dependencies(testSemantics testSemantics.auto.cpp ) - -link_directories(${CMAKE_CURRENT_BINARY_DIR}/../../../../lib) - -target_link_libraries(testSemantics peToCFG cfgToLLVM - LLVMInterpreter LLVMipo LLVMInstrumentation - LLVMX86CodeGen LLVMJIT LLVMBitReader LLVMBitWriter LLVMMCDisassembler gtest - gtest_main LLVMX86Disassembler LLVMX86AsmParser LLVMX86CodeGen - LLVMSelectionDAG LLVMAsmPrinter LLVMX86Desc LLVMX86Info LLVMObjCARCOpts - LLVMX86AsmPrinter LLVMX86Utils ${Boost_LIBRARIES} libprotobuf) - -IF(UNIX) - find_library(DL_LIB dl) - target_link_libraries(testSemantics ${DL_LIB}) -endif(UNIX) - -add_dependencies(testSemantics peToCFG bitreader asmparser bitwriter instrumentation scalaropts ipo pin_validator gtest tests.out) - -IF(APPLE) - SET_TARGET_PROPERTIES(testSemantics PROPERTIES LINK_FLAGS "-pagezero_size 1000") -endif(APPLE) - -if(UNIX) -add_custom_target(run_testSemantics ALL - COMMAND cd ${CMAKE_CURRENT_BINARY_DIR}/../valTest && ../testSemantics/testSemantics || echo # this echo shouldn't be here. It lets the build continue - DEPENDS testSemantics testSemantics.auto.cpp - ) -endif(UNIX) diff --git a/mc-sema/validator/x86/testSemantics/testSemantics.template b/mc-sema/validator/x86/testSemantics/testSemantics.template deleted file mode 100644 index 0cf22a2bd..000000000 --- a/mc-sema/validator/x86/testSemantics/testSemantics.template +++ /dev/null @@ -1,1240 +0,0 @@ -#include "gtest/gtest.h" -#include "toLLVM.h" -#include "raiseX86.h" -//#define DEBUG - -#include "../common/RegisterState.h" -#include "../common/to_string.h" - -#include -#include - -#ifdef _WIN32 -#include -#include -#include -#include -#pragma float_control(precise, on) -#pragma fenv_access(on) -#else -#include -#include -#ifndef __APPLE__ -#ifndef __MACH__ -#include -#endif -#endif -#endif - -#include "llvm/ExecutionEngine/GenericValue.h" -#include "llvm/ExecutionEngine/Interpreter.h" -#include "llvm/ExecutionEngine/JIT.h" -#include - -#include -#include -#include -#include -#include - -using namespace llvm; -using namespace std; - -#ifdef WIN32 - #define TRIPLE "i386-pc-win32" -#elif defined(__linux__) - #define TRIPLE "i686-pc-linux-gnu" -#else - #error Building on an unsupported OS -#endif - - -#define STACK_LEN 40960 - -enum fputag_vals { - FPU_TAG_VALID = 0, - FPU_TAG_ZERO = 1, - FPU_TAG_SPECIAL = 2, - FPU_TAG_EMPTY = 3 -}; - -#define TESTS_GENERAL (1<<0) -#define TESTS_FPU (1<<1) -#define TESTS_TO_RUN (TESTS_FPU|TESTS_GENERAL) -//#define TESTS_TO_RUN (TESTS_FPU) - -const uint64_t FLAG_CF = 1 << 0; -const uint64_t FLAG_PF = 1 << 1; -const uint64_t FLAG_AF = 1 << 2; -const uint64_t FLAG_ZF = 1 << 3; -const uint64_t FLAG_SF = 1 << 4; -const uint64_t FLAG_OF = 1 << 5; -const uint64_t FLAG_DF = 1 << 6; - -const uint64_t FLAG_FPU_BUSY = 1 << 7; -const uint64_t FLAG_FPU_C3 = 1 << 8; -const uint64_t FLAG_FPU_TOP = 1 << 9; -const uint64_t FLAG_FPU_C2 = 1 << 10; -const uint64_t FLAG_FPU_C1 = 1 << 11; -const uint64_t FLAG_FPU_C0 = 1 << 12; -const uint64_t FLAG_FPU_ES = 1 << 13; -const uint64_t FLAG_FPU_SF = 1 << 14; -const uint64_t FLAG_FPU_PE = 1 << 15; -const uint64_t FLAG_FPU_UE = 1 << 16; -const uint64_t FLAG_FPU_OE = 1 << 17; -const uint64_t FLAG_FPU_ZE = 1 << 18; -const uint64_t FLAG_FPU_DE = 1 << 19; -const uint64_t FLAG_FPU_IE = 1 << 20; - - -uint8_t g_stackMem[STACK_LEN]; - -// Some helpers for testing. -// Need functions to create function headers and function footers. - -Function *initTestFunction(string testName, Module *M) { - FunctionType *FT = getBaseFunctionType(M); - Constant *FC = M->getOrInsertFunction((testName +"_func"), FT); - Function *F = dyn_cast(FC); - - assert(F != NULL); - - BasicBlock *entryBlock = BasicBlock::Create(F->getContext(), - "entry", - F); - assert(entryBlock != NULL); - - allocateLocals(F, 32); - writeContextToLocals(entryBlock, 32, AllRegs); - - return F; -} - -void finiTestFunction(BasicBlock *e) { - - // Spill the locals back to the context. - writeLocalsToContext(e, 32, AllRegs); - - // Return from the function. - ReturnInst::Create(e->getContext(), e); - - return; -} - -typedef map testCaseToFlags; -typedef map testCaseToTestIDT; -typedef pair InOutT; -typedef map testIDToInOutT; - -enum ScanningState { - TestCase, - InputCase, - OutputCase -}; - -void* getRegPtr(const string ®Name, mcsema::RegState *regs) { - void *regptr = StringSwitch(regName) - .Case("EAX", &(regs->EAX)) - .Case("EBX", &(regs->EBX)) - .Case("ECX", &(regs->ECX)) - .Case("EDX", &(regs->EDX)) - .Case("ESI", &(regs->ESI)) - .Case("EDI", &(regs->EDI)) - .Case("ESP", &(regs->ESP)) - .Case("EBP", &(regs->EBP)) - .Case("CF", &(regs->CF)) - .Case("PF", &(regs->PF)) - .Case("AF", &(regs->AF)) - .Case("ZF", &(regs->ZF)) - .Case("SF", &(regs->SF)) - .Case("OF", &(regs->OF)) - .Case("DF", &(regs->DF)) - .Case("ST0", &(regs->ST_regs.st[0])) - .Case("ST1", &(regs->ST_regs.st[1])) - .Case("ST2", &(regs->ST_regs.st[2])) - .Case("ST3", &(regs->ST_regs.st[3])) - .Case("ST4", &(regs->ST_regs.st[4])) - .Case("ST5", &(regs->ST_regs.st[5])) - .Case("ST6", &(regs->ST_regs.st[6])) - .Case("ST7", &(regs->ST_regs.st[7])) - .Case("XMM0", &(regs->XMM0)) - .Case("XMM1", &(regs->XMM1)) - .Case("XMM2", &(regs->XMM2)) - .Case("XMM3", &(regs->XMM3)) - .Case("XMM4", &(regs->XMM4)) - .Case("XMM5", &(regs->XMM5)) - .Case("XMM6", &(regs->XMM6)) - .Case("XMM7", &(regs->XMM7)) - .Case("FPU_BUSY", &(regs->FPU_FLAGS.BUSY)) - .Case("FPU_C3", &(regs->FPU_FLAGS.C3)) - .Case("FPU_TOP", &(regs->FPU_FLAGS.TOP)) - .Case("FPU_C2", &(regs->FPU_FLAGS.C2)) - .Case("FPU_C1", &(regs->FPU_FLAGS.C1)) - .Case("FPU_C0", &(regs->FPU_FLAGS.C0)) - .Case("FPU_ES", &(regs->FPU_FLAGS.ES)) - .Case("FPU_SF", &(regs->FPU_FLAGS.SF)) - .Case("FPU_PE", &(regs->FPU_FLAGS.PE)) - .Case("FPU_UE", &(regs->FPU_FLAGS.UE)) - .Case("FPU_OE", &(regs->FPU_FLAGS.OE)) - .Case("FPU_ZE", &(regs->FPU_FLAGS.ZE)) - .Case("FPU_DE", &(regs->FPU_FLAGS.DE)) - .Case("FPU_IE", &(regs->FPU_FLAGS.IE)) - .Case("FPU_X", &(regs->FPU_CONTROL.X)) - .Case("FPU_RC", &(regs->FPU_CONTROL.RC)) - .Case("FPU_PC", &(regs->FPU_CONTROL.PC)) - .Case("FPU_PM", &(regs->FPU_CONTROL.PM)) - .Case("FPU_UM", &(regs->FPU_CONTROL.UM)) - .Case("FPU_OM", &(regs->FPU_CONTROL.OM)) - .Case("FPU_ZM", &(regs->FPU_CONTROL.ZM)) - .Case("FPU_DM", &(regs->FPU_CONTROL.DM)) - .Case("FPU_IM", &(regs->FPU_CONTROL.IM)) - .Case("FPU_FOPCODE", &(regs->FPU_FOPCODE)) - .Default(NULL); - - return regptr; -} - -template -void writeToState(string regName, T regVal, mcsema::RegState *regs) { - - if (regName == "FPUTW") - { - for (int i = 0; i < STREGS_MAX; i++) - { - // this will be uint32_t for FPUTW, hence the - // awfully unsafe cast - uint8_t new_regval = *((uint32_t*)((void*)®Val)); - uint8_t thistag = ((new_regval >> i) & 1); - - // Convert from FXSAVE format to native CPU format. - // In FXSAVE, 0 == tag empty; 1 == tag not empty (assume valid for - // now). - uint8_t expanded_val = thistag == 0 ? FPU_TAG_EMPTY : FPU_TAG_VALID; - //uint8_t expanded_val = FPU_TAG_VALID; - regs->FPU_TAG.tag[i] = expanded_val; - } - } - else - { - T *r = static_cast(getRegPtr(regName, regs)); - assert(r != NULL); - *r = regVal; - } - - return; -} - -void getValueWriteToState(const string &line, mcsema::RegState &state) -{ - int k = line.find(':'); - string regName = line.substr(0, k); - std::string v = line.substr(k+1); - - if (boost::starts_with(regName, "ST")) - { // Only the STi registers are long doubles, for now. - mcsema::nativefpu regVal; - unsigned count=0; - memset(®Val, 0, sizeof(regVal)); - - vector hexchars; - boost::split(hexchars, v, boost::is_any_of(" ")); - std::stringstream ss; - // the text string we are reading has 16 bytes - // since it is output with padding - // only 12 are read in, as we read in without padding. - //printf("reading fpu bytes: "); - for(vector::iterator itr = hexchars.begin(); - itr != hexchars.end() && count < sizeof(((mcsema::nativefpu*)0)->b); - itr++, count++) - { - - std::string bytestr(*itr); - boost::algorithm::trim(bytestr); - - if(bytestr == "") - continue; - - //printf("Reading char: '%s'\n", bytestr.c_str()); - assert(count < 12); - regVal.b[count] = strtoul(bytestr.c_str(), NULL, 16); - //printf("%02x ", regVal.b[count]); - } - //printf("\n"); - - - //printf("Writing back to native value\n"); - //printf("Loaded value: %Lf\n", regVal); - writeToState(regName, regVal, &state); - } - else if (boost::starts_with(regName, "XMM")) - { - mcsema::xmmregstate regVal; - unsigned count=0; - memset(®Val, 0, sizeof(regVal)); - - vector hexchars; - boost::split(hexchars, v, boost::is_any_of(" ")); - std::stringstream ss; - - for(vector::iterator itr = hexchars.begin(); - itr != hexchars.end() && count < sizeof(((mcsema::xmmregstate *)0)->tag); - itr++, count++) - { - - std::string bytestr(*itr); - boost::algorithm::trim(bytestr); - - if(bytestr == "") - continue; - - assert(count < 16); - regVal.tag[count] = strtoul(bytestr.c_str(), NULL, 16); - } - - writeToState(regName, regVal, &state); - } - else if (boost::equals(regName, "FPU_FOPCODE")) - { - uint16_t regVal = 0; - try { - regVal = boost::numeric_cast(boost::lexical_cast(v)); - } catch (bad_cast &e) { - cerr << "could not parse " << v << " as a uint16_t\n"; - throw e; - } - writeToState(regName, regVal, &state); - } - else if (boost::starts_with(regName, "FPU_") || - regName == "CF" || - regName == "PF" || - regName == "AF" || - regName == "ZF" || - regName == "SF" || - regName == "OF" || - regName == "DF") - { - uint8_t regVal = 0; - try { - regVal = boost::numeric_cast(boost::lexical_cast(v)); - } catch (bad_cast &e) { - cerr << "could not parse " << v << " as a uint8_t\n"; - } - - writeToState(regName, regVal, &state); - } - else - { - uint32_t regVal = 0; - try { - regVal = boost::lexical_cast(v); - } catch (bad_cast &e) { - cerr << "could not parse " << v << " as a uint32_t\n"; - throw e; - } - writeToState(regName, regVal, &state); - } -} - -static testIDToInOutT g_stateMap; - -testIDToInOutT getTestCaseMap(string tests) { - - if(g_stateMap.empty() == false) - { - return g_stateMap; - } - - // Open the input file as an input stream. - ifstream inStream(tests.c_str()); - - if (!inStream.is_open()) - { - std::cerr << "Could not open: " << tests << "\n"; - exit(-1); - } - - // Read until the ifstream is over. - string line; - ScanningState ss = TestCase; - int testCaseNumber; - mcsema::RegState inputState; - mcsema::RegState outputState; - memset(&inputState, 0, sizeof(mcsema::RegState)); - memset(&outputState, 0, sizeof(mcsema::RegState)); - -#ifdef DEBUG - cout << "Calling getTestCaseMap\n"; -#endif - - while (inStream.good()) { - getline(inStream, line, '\n'); - size_t rPos = line.find('\r'); - if(rPos != string::npos) { - line.erase(rPos); - } - switch(ss) { - case TestCase: - if ( line.substr(0, 8) == "TESTCASE" ) { - // Read out the test case number. - testCaseNumber = boost::lexical_cast(line.substr(9)); - } - else if ( line == "INPUTSTATE" ) { - ss = InputCase; - } else { - // Parse error. - } - break; - - case InputCase: - if (line == "OUTPUTSTATE") { - ss = OutputCase; - } else { - // Parse the line into a reg/flag assignment. - getValueWriteToState(line, inputState); - } - break; - - case OutputCase: - if (line == "ENDCASE") { - ss = TestCase; - // Take our current map and shove it into the g_stateMap. - InOutT inOut(inputState, outputState); -#ifdef DEBUG - printf("Adding test case: %d\n", testCaseNumber); -#endif - g_stateMap.insert(pair(testCaseNumber, inOut)); - - // Then zero the input and output. - memset(&inputState, 0, sizeof(mcsema::RegState)); - memset(&outputState, 0, sizeof(mcsema::RegState)); - } else { - // Parse the line into a reg/flag assignment. - getValueWriteToState(line, outputState); - } - break; - } - } - -#ifdef DEBUG - cout << "Done with getTestCaseMap" << endl; -#endif - - return g_stateMap; -} - -// This is a class that lets us carry state between tests. -// The state that we carry will be a single LLVM Module. -// It can also carry our instruction decoder and so on. - -class ModuleTest : public ::testing::Test { -protected: - virtual void SetUp(void) { - // Sanity checks on register function. -#ifdef DEBUG - printf("sizeof(mcsema::fpuregs): %ld\n", sizeof(mcsema::fpuregs)); - printf("sizeof(mcsema::RegState): %ld\n", sizeof(mcsema::RegState)); -#endif -#ifdef __x86_64__ - -#ifdef DEBUG - printf("sizeof(RegState) [%ld] - sizeof(((mcsema::nativefpu*)0)->pad)*STREGS_MAX [%ld] = [%ld] (316)\n", - sizeof(mcsema::RegState), - sizeof(((mcsema::nativefpu*)0)->pad)*STREGS_MAX, - sizeof(mcsema::RegState) - sizeof(((mcsema::nativefpu*)0)->pad)*STREGS_MAX); -#endif - - assert(sizeof(mcsema::RegState) - sizeof(((mcsema::nativefpu*)0)->pad)*STREGS_MAX == 316); -#else - assert(sizeof(mcsema::RegState) == 316); - assert(sizeof(mcsema::fpuregs) == 96); -#endif - - llvm::InitializeAllTargetInfos(); - llvm::InitializeAllTargetMCs(); - llvm::InitializeAllAsmParsers(); - llvm::InitializeAllDisassemblers(); - llvm::InitializeNativeTarget(); - - this->M = new Module("testModule", getGlobalContext()); -#ifdef __x86_64__ - this->M->setDataLayout( - "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32"); -#endif - this->M->setDataLayout( - "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32"); - - doGlobalInit(this->M); - // Create the disassembler objects. - const llvm::Target *t = NULL; - const llvm::MCSubtargetInfo *STI = NULL; - const llvm::MCAsmInfo *AsmInfo = NULL; - llvm::MCRegisterInfo *MRI = NULL; - const llvm::MCInstrInfo *MCII = NULL; - - t = findDisTarget("x86"); - assert(t != NULL); - STI = t->createMCSubtargetInfo( TRIPLE, "", ""); - - MRI = t->createMCRegInfo(TRIPLE); - AsmInfo = t->createMCAsmInfo(*MRI, TRIPLE); - - assert(t != NULL); - assert(STI); - assert(AsmInfo); - - // Get an inst printer. - int AsmPrinterVariant = AsmInfo->getAssemblerDialect(); - MCII = t->createMCInstrInfo(); - llvm::MCInstPrinter - *IP = t->createMCInstPrinter( AsmPrinterVariant, - *AsmInfo, - *MCII, - *MRI, - *STI); - - assert(IP); - llvm::MCContext *Ctx = new llvm::MCContext(AsmInfo, MRI, nullptr); - const llvm::MCDisassembler *DisAsm = t->createMCDisassembler(*STI, *Ctx); - - assert(DisAsm); - - this->Dis = DisAsm; - this->InstPrinter = IP; - - this->testCases = getTestCaseMap("tests.out"); - - // Create the native module. - //list funcList; - //this->natM = NativeModulePtr(new NativeModule("testMod", funcList, IP)); - -#define NEW_TEST(x, k) do {\ - this->caseMap.insert(pair(x, k));\ - this->flagMap.insert(pair(x, 0));\ - } while (0); - -#define NEW_TEST_IGNOREFLAGS(x, k, f) do {\ - this->caseMap.insert(pair(x, k));\ - this->flagMap.insert(pair(x, f));\ - } while (0); - - // ADD TESTS HERE. - /*%DECLARATIONS*%/ - -#undef NEW_TEST - } - - virtual void TearDown(void) { - delete this->M; - } - - Function *getFunctionForBuffer(string nm, uint8_t *buf, size_t len); - - void runFunctionOnState(mcsema::RegState *, Function *); - - void getStatesForTest(mcsema::RegState *, mcsema::RegState *, string); - - Module *M; - const MCDisassembler *Dis; - MCInstPrinter *InstPrinter; - testIDToInOutT testCases; - testCaseToTestIDT caseMap; - testCaseToFlags flagMap; -#if 0 - uint32_t stackMem; - void *stackMemPtr; -#endif -}; - -static void* JITFunctionCreator(const std::string &s) { -#ifdef _WIN32 - HMODULE mod; - FARPROC proc; - - printf("WARNING: JITted code references library function: %s\n", s.c_str()); - - mod = GetModuleHandle("MSVCRT"); - assert(mod != NULL); - proc = GetProcAddress(mod, s.c_str()); - if (proc == NULL) { - std::string s2 = s.substr(0, s.size()-1); - proc = GetProcAddress(mod, s2.c_str()); - } - - if(proc == NULL) { - printf("%s: Could not find function: %s\n", __FUNCTION__, s.c_str()); - } - - return proc; - -#else - printf("WARNING: JITted code references library function: %s\n", s.c_str()); - - void *sym_addr = dlsym(RTLD_DEFAULT, s.c_str()); - char *error = dlerror(); - if(sym_addr == NULL && error != NULL) { - printf("ERROR: %s\n", error); - return NULL; - } - - return sym_addr; - -#endif -} - -void ModuleTest::getStatesForTest(mcsema::RegState *inState, mcsema::RegState *outState, string testName) { - int testId = this->caseMap.at(testName); - InOutT states = this->testCases.at(testId); - -#ifdef DEBUG - printf("Mapping testName[%s] to testId[%d]\n", testName.c_str(), testId); -#endif - *inState = states.first; - *outState = states.second; - - return; -} - -void ModuleTest::runFunctionOnState(mcsema::RegState *state, Function *F) { - EngineBuilder builder(this->M); - ExecutionEngine *EE; - - builder.setEngineKind(EngineKind::JIT); - builder.setOptLevel(CodeGenOpt::None); - builder.setUseMCJIT(true); - - TargetOptions to; - to.UnsafeFPMath = true; - - builder.setTargetOptions(to); - - std::string errmsg; - //printf("pre-jit DUMP:\n"); - //F->dump(); - - EE = builder.create(); - EE->runStaticConstructorsDestructors(false); - EE->DisableSymbolSearching(false); - EE->InstallLazyFunctionCreator(JITFunctionCreator); - - // Set up the arguments to the function. - vector args; - args.push_back(PTOGV(state)); - -#ifdef DEBUG - void *ptr = EE->getPointerToFunction(F); - F->print(llvm::outs()); - printf("function ptr is: %p\n\n", ptr); - -#if 0 -#ifdef _WIN32 - __debugbreak(); -#else - asm("int3"); -#endif -#endif - -#endif - - - unsigned int cw = 0; - -#ifdef _WIN32 - cw = _control87(0, 0); - _control87(_PC_64, _MCW_PC); -#endif - - // Run the function to get the sequences effects. - EE->runFunction(F, args); - -#ifdef _WIN32 - _control87((cw & _MCW_PC), _MCW_PC); -#endif - - // Clean up by removing the module and deleting the engine. - EE->removeModule(this->M); - delete EE; - - // We leave. The effects have been written into the register state - // structure. - return; -} - -class counting_cfg_visitor : public boost::default_bfs_visitor { -private: - NativeFunctionPtr natFun; - list &blocks; -public: - counting_cfg_visitor(NativeFunctionPtr n, list &l) : natFun(n), blocks(l) { } - - template < typename Vertex, typename Graph > - void discover_vertex(Vertex u, const Graph &g) const { - NativeBlockPtr curBlock = this->natFun->block_from_id(u); - - this->blocks.push_back(curBlock); - return; - } - - list get_blocks(void) { return this->blocks; } -}; - -list getBlocksFromFunction(NativeFunctionPtr f) { - CFG funcGraph = f->get_cfg(); - list blocks; - counting_cfg_visitor c(f, blocks); - - boost::breadth_first_search(funcGraph, - boost::vertex(0, funcGraph), - boost::visitor(c)); - - return blocks; -} - -Function *ModuleTest::getFunctionForBuffer(string nm, uint8_t *b, size_t l) { - BufferMemoryObject bmo(b, l); - list blocks; - BasicBlock *firstBB = NULL; - BasicBlock *entryBB = NULL; - bool broken = false; - - NativeFunctionPtr testF = - funcFromBuff(0, bmo, this->Dis, this->InstPrinter); - Function *testFn = initTestFunction(nm, this->M); - - entryBB = testFn->begin(); - blocks = getBlocksFromFunction(testF); - - for (list::iterator it = blocks.begin(); - it != blocks.end(); ++it) - { - NativeBlockPtr curBlock = *it; - list insts = curBlock->get_insts(); - BasicBlock *curLLVMBlock; - - curLLVMBlock = bbFromStrName(curBlock->get_name(), testFn); - - if (curLLVMBlock == NULL) { - curLLVMBlock = BasicBlock::Create(testFn->getContext(), - curBlock->get_name(), - testFn); - assert(curLLVMBlock != NULL); - } - - if (firstBB == NULL) { - firstBB = curLLVMBlock; - } - - list &follows = curBlock->get_follows(); - - for (list::iterator i = follows.begin(); i != follows.end(); ++i) { - VA blockBase = *i; - - // Try to look up a block that has this block's name. - string followName = "block_0x" + to_string(blockBase, hex); - - BasicBlock *fBB = bbFromStrName(followName, testFn); - - if (fBB == NULL) { - fBB = BasicBlock::Create(testFn->getContext(), - followName, - testFn); - assert(fBB != NULL); - } - } - - list::iterator instIt = insts.begin(); - - while (instIt != insts.end()) { - InstTransResult t; - InstPtr p = *instIt; - - t = disInstr(p, - curLLVMBlock, - curBlock, - testFn, - testF, - NativeModulePtr(), - false); - - if (t == TranslateError || t == TranslateErrorUnsupported) { - broken = true; - break; - } - - ++instIt; - } - - if (broken) { - break; - } - } - - if (broken) { - return NULL; - } - - BranchInst::Create(firstBB, entryBB); - - BasicBlock *endBlock = NULL; - - // Now we have to find the block that does NOT have a terminator. - for (Function::iterator fit = testFn->begin(); fit != testFn->end(); ++fit ) { - BasicBlock *b = fit; - - if ( b->getTerminator() == NULL ) { - endBlock = b; - break; - } - } - - assert(endBlock != NULL); - finiTestFunction(endBlock); - - return testFn; -} - -void regStatesEq(mcsema::RegState *in, mcsema::RegState *out, uint64_t ignoreflags) { - EXPECT_EQ(out->EAX, in->EAX); - EXPECT_EQ(out->EBX, in->EBX); - EXPECT_EQ(out->ECX, in->ECX); - EXPECT_EQ(out->EDX, in->EDX); - EXPECT_EQ(out->EDI, in->EDI); - EXPECT_EQ(out->ESP, in->ESP); - EXPECT_EQ(out->EBP, in->EBP); - - - //EXPECT_EQ(out->FPU_FOPCODE, in->FPU_FOPCODE); - - if (!(ignoreflags & FLAG_CF)) { - EXPECT_EQ(out->CF, in->CF); - } - - if (!(ignoreflags & FLAG_AF)) { - EXPECT_EQ(out->AF, in->AF); - } - - if (!(ignoreflags & FLAG_PF)) { - EXPECT_EQ(out->PF, in->PF); - } - - if (!(ignoreflags & FLAG_OF)) { - EXPECT_EQ(out->OF, in->OF); - } - - if (!(ignoreflags & FLAG_SF)) { - EXPECT_EQ(out->SF, in->SF); - } - - if (!(ignoreflags & FLAG_DF)) { - EXPECT_EQ(out->DF, in->DF); - } - - if (!(ignoreflags & FLAG_ZF)) { - EXPECT_EQ(out->ZF, in->ZF); - } - -#ifdef DEBUG - printf("Comparing [%d] : OUT[%s] vs. IN[%s]\n", 0, out->ST_regs.st[0].printMe().c_str(), in->ST_regs.st[0].printMe().c_str()); -#endif - EXPECT_EQ(out->ST_regs.st[0], in->ST_regs.st[0]); - -#ifdef DEBUG - printf("Comparing [%d] : OUT[%s] vs. IN[%s]\n", 1, out->ST_regs.st[1].printMe().c_str(), in->ST_regs.st[1].printMe().c_str()); -#endif - EXPECT_EQ(out->ST_regs.st[1], in->ST_regs.st[1]); - -#ifdef DEBUG - printf("Comparing [%d] : OUT[%s] vs. IN[%s]\n", 2, out->ST_regs.st[2].printMe().c_str(), in->ST_regs.st[2].printMe().c_str()); -#endif - EXPECT_EQ(out->ST_regs.st[2], in->ST_regs.st[2]); - -#ifdef DEBUG - printf("Comparing [%d] : OUT[%s] vs. IN[%s]\n", 3, out->ST_regs.st[3].printMe().c_str(), in->ST_regs.st[3].printMe().c_str()); -#endif - EXPECT_EQ(out->ST_regs.st[3], in->ST_regs.st[3]); - -#ifdef DEBUG - printf("Comparing [%d] : OUT[%s] vs. IN[%s]\n", 4, out->ST_regs.st[4].printMe().c_str(), in->ST_regs.st[4].printMe().c_str()); -#endif - EXPECT_EQ(out->ST_regs.st[4], in->ST_regs.st[4]); - -#ifdef DEBUG - printf("Comparing [%d] : OUT[%s] vs. IN[%s]\n", 5, out->ST_regs.st[5].printMe().c_str(), in->ST_regs.st[5].printMe().c_str()); -#endif - EXPECT_EQ(out->ST_regs.st[5], in->ST_regs.st[5]); - -#ifdef DEBUG - printf("Comparing [%d] : OUT[%s] vs. IN[%s]\n", 6, out->ST_regs.st[6].printMe().c_str(), in->ST_regs.st[6].printMe().c_str()); -#endif - EXPECT_EQ(out->ST_regs.st[6], in->ST_regs.st[6]); - -#ifdef DEBUG - printf("Comparing [%d] : OUT[%s] vs. IN[%s]\n", 7, out->ST_regs.st[7].printMe().c_str(), in->ST_regs.st[7].printMe().c_str()); -#endif - EXPECT_EQ(out->ST_regs.st[7], in->ST_regs.st[7]); - -#ifdef DEBUG - printf("XMM%d: OUT[%s] vs IN[%s]\n", 0, out->XMM0.printMe().c_str(), in->XMM0.printMe().c_str()); - printf("XMM%d: OUT[%s] vs IN[%s]\n", 1, out->XMM1.printMe().c_str(), in->XMM1.printMe().c_str()); - printf("XMM%d: OUT[%s] vs IN[%s]\n", 2, out->XMM2.printMe().c_str(), in->XMM2.printMe().c_str()); - printf("XMM%d: OUT[%s] vs IN[%s]\n", 3, out->XMM3.printMe().c_str(), in->XMM3.printMe().c_str()); - printf("XMM%d: OUT[%s] vs IN[%s]\n", 4, out->XMM4.printMe().c_str(), in->XMM4.printMe().c_str()); - printf("XMM%d: OUT[%s] vs IN[%s]\n", 5, out->XMM5.printMe().c_str(), in->XMM5.printMe().c_str()); - printf("XMM%d: OUT[%s] vs IN[%s]\n", 6, out->XMM6.printMe().c_str(), in->XMM6.printMe().c_str()); - printf("XMM%d: OUT[%s] vs IN[%s]\n", 7, out->XMM7.printMe().c_str(), in->XMM7.printMe().c_str()); -#endif - - EXPECT_EQ(out->XMM0, in->XMM0); - EXPECT_EQ(out->XMM1, in->XMM1); - EXPECT_EQ(out->XMM2, in->XMM2); - EXPECT_EQ(out->XMM3, in->XMM3); - EXPECT_EQ(out->XMM4, in->XMM4); - EXPECT_EQ(out->XMM5, in->XMM5); - EXPECT_EQ(out->XMM6, in->XMM6); - EXPECT_EQ(out->XMM7, in->XMM7); - - if (!(ignoreflags & FLAG_FPU_BUSY)) { - EXPECT_EQ(out->FPU_FLAGS.BUSY, in->FPU_FLAGS.BUSY); - } - - if (!(ignoreflags & FLAG_FPU_C3)) { - EXPECT_EQ(out->FPU_FLAGS.C3, in->FPU_FLAGS.C3); - } - - if (!(ignoreflags & FLAG_FPU_TOP)) { - EXPECT_EQ(out->FPU_FLAGS.TOP, in->FPU_FLAGS.TOP); - } - - if (!(ignoreflags & FLAG_FPU_C2)) { - EXPECT_EQ(out->FPU_FLAGS.C2, in->FPU_FLAGS.C2); - } - - if (!(ignoreflags & FLAG_FPU_C1)) { - EXPECT_EQ(out->FPU_FLAGS.C1, in->FPU_FLAGS.C1); - } - - if (!(ignoreflags & FLAG_FPU_C0)) { - EXPECT_EQ(out->FPU_FLAGS.C0, in->FPU_FLAGS.C0); - } - - if (!(ignoreflags & FLAG_FPU_ES)) { - EXPECT_EQ(out->FPU_FLAGS.ES, in->FPU_FLAGS.ES); - } - - if (!(ignoreflags & FLAG_FPU_SF)) { - EXPECT_EQ(out->FPU_FLAGS.SF, in->FPU_FLAGS.SF); - } - - if (!(ignoreflags & FLAG_FPU_PE)) { - EXPECT_EQ(out->FPU_FLAGS.PE, in->FPU_FLAGS.PE); - } - - if (!(ignoreflags & FLAG_FPU_UE)) { - EXPECT_EQ(out->FPU_FLAGS.UE, in->FPU_FLAGS.UE); - } - - if (!(ignoreflags & FLAG_FPU_OE)) { - EXPECT_EQ(out->FPU_FLAGS.OE, in->FPU_FLAGS.OE); - } - - if (!(ignoreflags & FLAG_FPU_ZE)) { - EXPECT_EQ(out->FPU_FLAGS.ZE, in->FPU_FLAGS.ZE); - } - - if (!(ignoreflags & FLAG_FPU_DE)) { - EXPECT_EQ(out->FPU_FLAGS.DE, in->FPU_FLAGS.DE); - } - - if (!(ignoreflags & FLAG_FPU_IE)) { - EXPECT_EQ(out->FPU_FLAGS.IE, in->FPU_FLAGS.IE); - } - - EXPECT_EQ(out->FPU_TAG, in->FPU_TAG); - - return; -} - -void* get_low_addr(uint32_t len) { - void *v = ((void *)0x00001000); - void *k; - - while (1) { -#ifdef _WIN32 - k = VirtualAlloc(v, - len, - MEM_RESERVE|MEM_COMMIT, - PAGE_READWRITE); -#else - k = mmap(v, - len, - PROT_READ|PROT_WRITE, -#ifdef __linux__ - MAP_ANON|MAP_PRIVATE|MAP_32BIT, -#else - MAP_ANON|MAP_PRIVATE, -#endif - -1, - 0); -#endif - -#ifdef _WIN32 - if (k != NULL) { -#else - if (k != MAP_FAILED) { -#endif - break; - } else { - v = (void *)(((ptrdiff_t)v) + len); - } - } - -#ifndef _WIN32 -#ifdef __x86_64__ - assert((((ptrdiff_t)k) >> 32) == 0); -#endif // sizeof(ptrdiff_t) -#endif // _WIN32 - return k; -} - -void release_low_addr(void *v, uint32_t len) { -#ifdef _WIN32 - VirtualFree(v, STACK_LEN, MEM_RELEASE); -#else - munmap(v, STACK_LEN); -#endif - return; -} - -// The new input and output ESP/EBP must differ from each other in the same way -// that they did in the original input. -void fixStatesForStack(mcsema::RegState *inState, mcsema::RegState *outState, void *stack) { - // Compute deltas for EBP and ESP. - int32_t espDelta = ((int32_t)inState->ESP) - ((int32_t)outState->ESP); - int32_t ebpDelta = ((int32_t)inState->EBP) - ((int32_t)outState->EBP); - - inState->ESP = (uint32_t)((ptrdiff_t)stack - 32); - outState->ESP = (uint32_t)((ptrdiff_t)stack - 32); - - inState->EBP = (uint32_t)((ptrdiff_t)stack); - outState->EBP = (uint32_t)((ptrdiff_t)stack); - - outState->ESP -= espDelta; - outState->EBP -= ebpDelta; - - return; -} - -// The PIN based tester outputs FPU registers in their native order: -// that is, ST0 = REGISTERS[FPU CW.TOP]. -// The state.ST_regs[0] structure does not use a TOP-relative -// representation: that is, ST_regs[0] == REGISTERS[0]. -// This function converts the ST_regs representation to a top-relative -// representation for comparison with PIN outputs. - -void toTopRelative(mcsema::RegState &state) { - mcsema::fpuregs tmpregs; - - uint8_t topval = state.FPU_FLAGS.TOP; -#ifdef DEBUG - printf("pre transform top is: %d\n", topval); - for (unsigned i = 0; i < STREGS_MAX; i++) - { - printf("pre transform regs array [%d] = %s\n", i, state.ST_regs.st[i].printMe().c_str()); - } -#endif - - for (unsigned i = topval; i < STREGS_MAX; i++) { - tmpregs.st[i - topval] = state.ST_regs.st[i]; - } - - for (unsigned i = 0; i < topval; i++) { - tmpregs.st[i + STREGS_MAX - topval] = state.ST_regs.st[i]; - } - - memcpy(&state.ST_regs.st[0], &tmpregs.st[0], sizeof(tmpregs.st)); - -#ifdef DEBUG - printf("post transform top is: %d\n", topval); - for (unsigned i = 0; i < STREGS_MAX; i++) - { - printf("post transform regs array [%d] = %s\n", i, state.ST_regs.st[i].printMe().c_str()); - } -#endif -} - -void fromTopRelative(mcsema::RegState &state) { - mcsema::fpuregs tmpregs; - - uint8_t topval = state.FPU_FLAGS.TOP; -#ifdef DEBUG - printf("pre transform top is: %d\n", topval); - for (unsigned i = 0; i < STREGS_MAX; i++) - { - printf("pre transform regs array [%d] = %s\n", i, state.ST_regs.st[i].printMe().c_str()); - } -#endif - - for (unsigned i = topval; i < STREGS_MAX; i++) { - tmpregs.st[i] = state.ST_regs.st[i - topval]; - } - - for (unsigned i = 0; i < topval; i++) { - tmpregs.st[i] = state.ST_regs.st[i + STREGS_MAX - topval]; - } - - memcpy(&state.ST_regs.st[0], &tmpregs.st[0], sizeof(tmpregs.st)); - -#ifdef DEBUG - printf("post transform top is: %d\n", topval); - for (unsigned i = 0; i < STREGS_MAX; i++) - { - printf("post transform regs array [%d] = %s\n", i, state.ST_regs.st[i].printMe().c_str()); - } -#endif -} - -#ifdef DEBUG -void printXMM(mcsema::RegState *in) -{ - printf("XMM%d: %s\n", 0, in->XMM0.printMe().c_str()); - printf("XMM%d: %s\n", 1, in->XMM1.printMe().c_str()); - printf("XMM%d: %s\n", 2, in->XMM2.printMe().c_str()); - printf("XMM%d: %s\n", 3, in->XMM3.printMe().c_str()); - printf("XMM%d: %s\n", 4, in->XMM4.printMe().c_str()); - printf("XMM%d: %s\n", 5, in->XMM5.printMe().c_str()); - printf("XMM%d: %s\n", 6, in->XMM6.printMe().c_str()); - printf("XMM%d: %s\n", 7, in->XMM7.printMe().c_str()); -} -#endif -# -#define IN_OUT_TEST(testName, bytes) {\ - Function *testFn =\ - this->getFunctionForBuffer(testName, byteArr, sizeof(byteArr));\ - EXPECT_TRUE(testFn != NULL);\ - if (testFn != NULL) {\ - mcsema::RegState inputState;\ - mcsema::RegState outputState;\ - this->getStatesForTest(&inputState, &outputState, testName);\ - void *b = get_low_addr(STACK_LEN);\ - assert(b != NULL);\ - fixStatesForStack(&inputState, &outputState, (void*)((ptrdiff_t)b + (STACK_LEN - 4)));\ - fromTopRelative(inputState);\ - inputState.printMe(testName "_PRE_INPUT");\ - outputState.printMe(testName "_PRE_OUTPUT");\ - this->runFunctionOnState(&inputState, testFn);\ - toTopRelative(inputState);\ - inputState.printMe(testName "_POST_INPUT");\ - outputState.printMe(testName "_POST_OUTPUT");\ - regStatesEq(&inputState, &outputState, this->flagMap[testName]);\ - release_low_addr(b, STACK_LEN);\ - }\ -} - -#define NO_MEM_TEST(testName, bytes) {\ - Function *testFn =\ - this->getFunctionForBuffer(testName, byteArr, sizeof(byteArr));\ - EXPECT_TRUE(testFn != NULL);\ - if (testFn != NULL) {\ - mcsema::RegState inputState;\ - mcsema::RegState outputState;\ - this->getStatesForTest(&inputState, &outputState, testName);\ - fromTopRelative(inputState);\ - this->runFunctionOnState(&inputState, testFn);\ - toTopRelative(inputState);\ - regStatesEq(&inputState, &outputState, this->flagMap[testName]);\ - }\ -} - - -/*%DEFINITIONS%*/ - -TEST_F(ModuleTest, StructureLayout) { - //test and make sure that the layout of the RegState matches between - //our EE and our structure definition - FunctionType *FT = getBaseFunctionType(this->M); - Constant *FC = this->M->getOrInsertFunction(("aligntest"), FT); - Function *F = dyn_cast(FC); - Value *arg = F->arg_begin(); - - assert(F != NULL); - - BasicBlock *block = BasicBlock::Create(F->getContext(), "B", F); - - //write patterns we recognize into the structure - -#define PATTERN_TO_OFF(p, b, o) { \ - Value *gepV[] = \ - { ConstantInt::get(Type::getInt32Ty(block->getContext()), 0), \ - ConstantInt::get(Type::getInt32Ty(block->getContext()), o)}; \ - Instruction *vgep = GetElementPtrInst::CreateInBounds(arg, gepV, "", block);\ - Value *c = ConstantInt::get(IntegerType::get(block->getContext(), b), p);\ - Value *st = new StoreInst(c, vgep, block);\ - assert(st != NULL); } - -#define PATTERN_TO_OFF2(p, o1, o2) { \ - Value *gepV[] = \ - { ConstantInt::get(Type::getInt32Ty(block->getContext()), 0), \ - ConstantInt::get(Type::getInt32Ty(block->getContext()), o1), \ - ConstantInt::get(Type::getInt32Ty(block->getContext()), o2)}; \ - Instruction *vgep = GetElementPtrInst::CreateInBounds(arg, gepV, "", block);\ - Value *c = ConstantInt::get(Type::getInt32Ty(block->getContext()), p);\ - Value *st = new StoreInst(c, vgep, block);\ - assert(st != NULL); } - - - PATTERN_TO_OFF(6543, 32, 0); - PATTERN_TO_OFF(6540, 32, 1); - PATTERN_TO_OFF(6530, 32, 2); - PATTERN_TO_OFF(6528, 32, 3); - PATTERN_TO_OFF(6400, 32, 4); - PATTERN_TO_OFF(6129, 32, 5); - PATTERN_TO_OFF(5981, 32, 6); - PATTERN_TO_OFF(4129, 32, 7); - - PATTERN_TO_OFF(1, 1, 8); - PATTERN_TO_OFF(0, 1, 9); - PATTERN_TO_OFF(1, 1, 10); - PATTERN_TO_OFF(0, 1, 11); - PATTERN_TO_OFF(1, 1, 12); - PATTERN_TO_OFF(0, 1, 13); - PATTERN_TO_OFF(1, 1, 14); - - PATTERN_TO_OFF(0, 1, 16); - ReturnInst::Create(block->getContext(), block); - -#undef PATTERN_TO_OFF -#undef PATTERN_TO_OFF2 - - //make a context that is 0-filled - mcsema::RegState inState; - mcsema::RegState outState; - - memset(&inState, 0, sizeof(mcsema::RegState)); - memset(&outState, 0, sizeof(mcsema::RegState)); - - outState.EAX = 6543; - outState.EBX = 6540; - outState.ECX = 6530; - outState.EDX = 6528; - outState.ESI = 6400; - outState.EDI = 6129; - outState.ESP = 5981; - outState.EBP = 4129; - - outState.CF = 1; - outState.PF = 0; - outState.AF = 1; - outState.ZF = 0; - outState.SF = 1; - outState.OF = 0; - outState.DF = 1; - - outState.FPU_FLAGS.BUSY = 0; - - //evaluate the funciton in an EE - this->runFunctionOnState(&inState, F); - - //check and see if the register effects match up - EXPECT_EQ(inState, outState); -} - - diff --git a/mc-sema/validator/x86/testSemantics/test_a.template b/mc-sema/validator/x86/testSemantics/test_a.template deleted file mode 100644 index 40bba248c..000000000 --- a/mc-sema/validator/x86/testSemantics/test_a.template +++ /dev/null @@ -1,2080 +0,0 @@ - ; AAA - mov al, 0x45 - add al, 0x23 - ;enable tracing - mov esi, 0x18230001 - aaa - ;disable tracing - mov esi, 0x18230001 - - ; AAD8i8 - mov ax, 0x70 - mov esi, 0x18230002 - aad 0xa - mov esi, 0x18230002 - mov bl, 0x3 - div bl - - ; AAM8i8 - mov al, 0x22 - mov bl, 0x6 - mov esi, 0x18230003 - aam 0xa - mov esi, 0x18230003 - - ; AAS - mov al, 0x45 - sub al, 0x23 - mov esi, 0x18230004 - aas - mov esi, 0x18230004 - - ; ADC16i16 - mov ax, 0x55 - mov esi, 0x18230005 - adc ax, 0xeee - mov esi, 0x18230005 - - ; ADC16ri - mov bx, 0x66 - mov esi, 0x18230006 - adc bx, 0x444 - mov esi, 0x18230006 - - ; ADC16rr - mov cx, 0xabc - mov dx, 0xdef - mov esi, 0x18230007 - adc cx, dx - mov esi, 0x18230007 - - ; ADC32i32 - mov eax, 0x778 - mov esi, 0x18230008 - adc eax, 0x6fffffff - mov esi, 0x18230008 - - ; ADC32ri - mov ebx, 0x6789 - mov esi, 0x18230009 - adc ebx, 0x44444 - mov esi, 0x18230009 - - ; ADC32rr - mov ecx, 0x1234 - mov edx, 0x5678 - mov esi, 0x1823000a - adc ecx, edx - mov esi, 0x1823000a - - ; ADC8i8 - mov al, 0xbb - mov esi, 0x1823000b - adc al, 0x5 - mov esi, 0x1823000b - - ; ADC8ri - mov ah, 0xaa - mov esi, 0x1823000c - adc ah, 0x3 - mov esi, 0x1823000c - - ; ADC8rr - mov ch, 0xc - mov dh, 0x10 - mov esi, 0x1823000d - adc ch, dh - mov esi, 0x1823000d - - ; ADD16i16 - mov ax, 0x4 - mov esi, 0x1823000e - add ax, 0xeeee - mov esi, 0x1823000e - - ; ADD16ri - mov bx, 0x4 - mov esi, 0x1823000f - add bx, 0x444 - mov esi, 0x1823000f - - ; ADD16rr - mov cx, 0x4 - mov dx, 0x5 - mov esi, 0x18230010 - add cx, dx - mov esi, 0x18230010 - - ; ADD32i32 - mov eax, 0x4 - mov esi, 0x18230011 - add eax, 0x6fffffff - mov esi, 0x18230011 - - ; ADD32ri - mov ebx, 0x2 - mov esi, 0x18230012 - add ebx, 0x44444 - mov esi, 0x18230012 - - ; ADD32rr - mov ecx, 0x1 - mov edx, 0x2 - mov esi, 0x18230013 - add ecx, edx - mov esi, 0x18230013 - - ; ADD8i8 - mov al, 0x4 - mov esi, 0x18230014 - add al, 0x5 - mov esi, 0x18230014 - - ; ADD8ri - mov ah, 0x20 - mov esi, 0x18230015 - add ah, 0x3 - mov esi, 0x18230015 - - ; ADD8rr - mov ch, 0x2 - mov dh, 0x3 - mov esi, 0x18230016 - add ch, dh - mov esi, 0x18230016 - - ; AND16i16 - mov ax, 0x7 - mov esi, 0x18230017 - and ax, 0xeeee - mov esi, 0x18230017 - - ; AND16ri - mov bx, 0x7 - mov esi, 0x18230018 - and bx, 0x444 - mov esi, 0x18230018 - - ; AND16rr - mov cx, 0x0 - mov dx, 0x1 - mov esi, 0x18230019 - and cx, dx - mov esi, 0x18230019 - - ; AND32i32 - mov eax, 0x7 - mov esi, 0x1823001a - and eax, 0x6fffffff - mov esi, 0x1823001a - - ; AND32ri - mov ebx, 0x7 - mov esi, 0x1823001b - and ebx, 0x44444 - mov esi, 0x1823001b - - ; AND32rr - mov ecx, 0x0 - mov edx, 0x1 - mov esi, 0x1823001c - and ecx, edx - mov esi, 0x1823001c - - ; BSWAP32r - mov ebx, 0x56781234 - mov esi, 0x1823001d - bswap ebx - mov esi, 0x1823001d - - ; CDQ - mov esi, 0x1823001e - cdq - mov esi, 0x1823001e - - ; CLC - mov esi, 0x1823001f - clc - mov esi, 0x1823001f - - ; CLD - mov esi, 0x18230020 - cld - mov esi, 0x18230020 - - ; CMOVA16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x18230021 - cmova ax, bx - mov esi, 0x18230021 - - ; CMOVA32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x18230022 - cmova ecx, edx - mov esi, 0x18230022 - - ; CMOVAE16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x18230023 - cmovae ax, bx - mov esi, 0x18230023 - - ; CMOVAE32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x18230024 - cmovae ecx, edx - mov esi, 0x18230024 - - ; CMOVB16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x18230025 - cmovb ax, bx - mov esi, 0x18230025 - - ; CMOVB32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x18230026 - cmovb ecx, edx - mov esi, 0x18230026 - - ; CMOVBE16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x18230027 - cmovbe ax, bx - mov esi, 0x18230027 - - ; CMOVBE32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x18230028 - cmovbe ecx, edx - mov esi, 0x18230028 - - ; CMOVE16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x18230029 - cmove ax, bx - mov esi, 0x18230029 - - ; CMOVE32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x1823002a - cmove ecx, edx - mov esi, 0x1823002a - - ; CMOVG16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x1823002b - cmovg ax, bx - mov esi, 0x1823002b - - ; CMOVG32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x1823002c - cmovg ecx, edx - mov esi, 0x1823002c - - ; CMOVGE16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x1823002d - cmovge ax, bx - mov esi, 0x1823002d - - ; CMOVGE32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x1823002e - cmovge ecx, edx - mov esi, 0x1823002e - - ; CMOVL16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x1823002f - cmovl ax, bx - mov esi, 0x1823002f - - ; CMOVL32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x18230030 - cmovl ecx, edx - mov esi, 0x18230030 - - ; CMOVLE16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x18230031 - cmovle ax, bx - mov esi, 0x18230031 - - ; CMOVLE32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x18230032 - cmovle ecx, edx - mov esi, 0x18230032 - - ; CMOVNE16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x18230033 - cmovne ax, bx - mov esi, 0x18230033 - - ; CMOVNE32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x18230034 - cmovne ecx, edx - mov esi, 0x18230034 - - ; CMOVNO16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x18230035 - cmovno ax, bx - mov esi, 0x18230035 - - ; CMOVNO32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x18230036 - cmovno ecx, edx - mov esi, 0x18230036 - - ; CMOVNP16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x18230037 - cmovnp ax, bx - mov esi, 0x18230037 - - ; CMOVNP32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x18230038 - cmovnp ecx, edx - mov esi, 0x18230038 - - ; CMOVNS16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x18230039 - cmovns ax, bx - mov esi, 0x18230039 - - ; CMOVNS32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x1823003a - cmovns ecx, edx - mov esi, 0x1823003a - - ; CMOVO16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x1823003b - cmovo ax, bx - mov esi, 0x1823003b - - ; CMOVO32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x1823003c - cmovo ecx, edx - mov esi, 0x1823003c - - ; CMOVP16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x1823003d - cmovp ax, bx - mov esi, 0x1823003d - - ; CMOVP32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x1823003e - cmovp ecx, edx - mov esi, 0x1823003e - - ; CMOVS16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x1823003f - cmovs ax, bx - mov esi, 0x1823003f - - ; CMOVS32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x18230040 - cmovs ecx, edx - mov esi, 0x18230040 - - ; CMP16rr - mov cx, 0x4 - mov dx, 0x7 - mov esi, 0x18230041 - cmp cx, dx - mov esi, 0x18230041 - - ; CMP32i32 - mov eax, 0x6ffffffe - mov esi, 0x18230042 - cmp eax, 0x6fffffff - mov esi, 0x18230042 - - ; CMP32ri - mov ebx, 0x44 - mov esi, 0x18230043 - cmp ebx, 0x44444 - mov esi, 0x18230043 - - ; CMP32rr - mov ecx, 0x4 - mov edx, 0x2 - mov esi, 0x18230044 - cmp ecx, edx - mov esi, 0x18230044 - - ; CMP8rr - mov ch, 0x2 - mov dh, 0x3 - mov esi, 0x18230045 - cmp ch, dh - mov esi, 0x18230045 - - ; CMPXCHG16r - mov bx, 0x667 - mov bp, 0x888 - mov esi, 0x18230046 - cmpxchg bx, bp - mov esi, 0x18230046 - - ; CMPXCHG32rr - mov ebx, 0x6674 - mov ebp, 0x8885 - mov esi, 0x18230047 - cmpxchg ebx, ebp - mov esi, 0x18230047 - - ; CMPXCHG8rr - mov bh, 0x66 - mov ch, 0x88 - mov esi, 0x18230048 - cmpxchg bh, ch - mov esi, 0x18230048 - - ; DEC16r - mov dx, 0x30 - mov esi, 0x18230049 - dec dx - mov esi, 0x18230049 - - ; DEC32r - mov eax, 0x31 - mov esi, 0x1823004a - dec eax - mov esi, 0x1823004a - - ; DEC8r - mov cl, 0x32 - mov esi, 0x1823004b - dec cl - mov esi, 0x1823004b - - ; ENTER - mov eax, esp - mov edi, ebp - mov ebx, esp - sub ebx, 0x4 - mov esi, 0x1823004c - enter 0x4, 0x0 - cmp ebp, ebx - mov ebp, 0x0 - mov esi, 0x1823004c - mov esp, eax - mov ebp, edi - - ; IDIV16r - mov ax, 0xaa - mov bx, 0x4 - mov dx, 0x1 - mov esi, 0x1823004d - idiv bx - mov esi, 0x1823004d - - ; IDIV32r - mov eax, 0x4444 - mov ebx, 0x4 - mov edx, 0x1 - mov esi, 0x1823004e - idiv ebx - mov esi, 0x1823004e - - ; IDIV8r - mov ax, 0xa - mov bl, 0x4 - mov esi, 0x1823004f - idiv bl - mov esi, 0x1823004f - - ; IMUL16r - mov ax, 0x32 - mov bx, 0xb - mov esi, 0x18230050 - imul bx - mov esi, 0x18230050 - - ; IMUL16rr - mov bx, 0x34 - mov cx, 0x45 - mov esi, 0x18230051 - imul bx, cx - mov esi, 0x18230051 - - ; IMUL16rri - mov bx, 0x3 - mov cx, 0x4 - mov esi, 0x18230052 - imul bx, cx, 0xbbb - mov esi, 0x18230052 - - ; IMUL32r - mov eax, 0x323 - mov ebx, 0xbbb - mov esi, 0x18230053 - imul ebx - mov esi, 0x18230053 - - ; IMUL32rr - mov ebx, 0x20000 - mov ecx, 0x34 - mov esi, 0x18230054 - imul ebx, ecx - mov esi, 0x18230054 - - ; IMUL32rri - mov ebx, 0x20000 - mov ecx, 0x34 - mov esi, 0x18230055 - imul ebx, ecx, 0xbbbbb - mov esi, 0x18230055 - - ; IMUL8r - mov al, 0x10 - mov cl, 0xe - mov esi, 0x18230056 - imul cl - mov esi, 0x18230056 - - ; INC16r - xor dx, dx - mov dx, 0x30 - mov esi, 0x18230057 - inc dx - mov esi, 0x18230057 - - ; INC32r - mov eax, 0x31 - mov esi, 0x18230058 - inc eax - mov esi, 0x18230058 - - ; INC8r - mov cl, 0x32 - mov esi, 0x18230059 - inc cl - mov esi, 0x18230059 - - ; LAHF - mov esi, 0x1823005a - lahf - mov esi, 0x1823005a - - ; LEA16r - mov cx, 0x15 - mov edx, 0x8 - mov esi, 0x1823005b - lea cx, [edx-0x444] - mov esi, 0x1823005b - - ; LEA32r - mov ecx, 0x15 - mov edx, 0x8 - mov esi, 0x1823005c - lea ecx, [edx-0x444] - mov esi, 0x1823005c - - ; LEAVE - enter 0x8, 0x1 - mov edi, esp - mov ebx, [esp] - mov eax, ebp - mov esi, 0x1823005d - leave - mov esi, 0x1823005d - mov esp, edi - mov [esp], ebx - mov ebp, eax - - ; MOV16ri - mov bx, 0x24 - mov esi, 0x1823005e - mov bx, 0xffcc - mov esi, 0x1823005e - - ; MOV16rr - mov ch, 0x2 - mov dh, 0x3 - mov esi, 0x1823005f - mov ch, dh - mov esi, 0x1823005f - - ; MOV32ri - mov ebx, 0x2 - mov esi, 0x18230060 - mov ebx, 0xffccd - mov esi, 0x18230060 - - ; MOV32rr - mov ecx, 0x8 - mov edx, 0xc - mov esi, 0x18230061 - mov ecx, edx - mov esi, 0x18230061 - - ; MOV8ri - mov ah, 0x2 - mov esi, 0x18230062 - mov ah, 0x3 - mov esi, 0x18230062 - - ; MOV8rr - mov ch, 0x2 - mov dh, 0x3 - mov esi, 0x18230063 - mov ch, dh - mov esi, 0x18230063 - - ; MOVSX16rr8 - mov bx, 0x3000 - mov bl, 0x35 - mov esi, 0x18230064 - movsx bx, bl - mov esi, 0x18230064 - - ; MOVSX32rr16 - mov eax, 0x55555 - mov ax, 0x3333 - mov esi, 0x18230065 - movsx eax, ax - mov esi, 0x18230065 - - ; MOVSX32rr8 - mov eax, 0x55555 - mov ah, 0x3 - mov esi, 0x18230066 - movsx eax, ah - mov esi, 0x18230066 - - ; MOVZX16rr8 - mov bx, 0x2 - mov bl, 0x3 - mov esi, 0x18230067 - movzx bx, bl - mov esi, 0x18230067 - - ; MOVZX32rr16 - mov edx, 0x12 - mov dx, 0x0 - mov esi, 0x18230068 - movzx edx, dx - mov esi, 0x18230068 - - ; MOVZX32rr8 - mov edx, 0x12 - mov dh, 0x3 - mov esi, 0x18230069 - movzx edx, dh - mov esi, 0x18230069 - - ; NEG16r - mov bx, 0x10 - mov esi, 0x1823006a - neg bx - mov esi, 0x1823006a - - ; NEG32r - mov ebx, 0x1a - mov esi, 0x1823006b - neg ebx - mov esi, 0x1823006b - - ; NEG8r - mov dl, 0x1 - mov esi, 0x1823006c - neg dl - mov esi, 0x1823006c - - ; NOT16r - mov cx, 0x8 - mov esi, 0x1823006d - not cx - mov esi, 0x1823006d - - ; NOT32r - mov ecx, 0x999 - mov esi, 0x1823006e - not ecx - mov esi, 0x1823006e - - ; NOT8r - mov dl, 0xaa - mov esi, 0x1823006f - not dl - mov esi, 0x1823006f - - ; OR16i16 - mov ax, 0x3333 - mov esi, 0x18230070 - or ax, 0xeeee - mov esi, 0x18230070 - - ; OR16ri - mov bx, 0x1212 - mov esi, 0x18230071 - or bx, 0x444 - mov esi, 0x18230071 - - ; OR16rr - mov cx, 0x0 - mov dx, 0x1 - mov esi, 0x18230072 - or cx, dx - mov esi, 0x18230072 - - ; OR32i32 - mov eax, 0x7 - mov esi, 0x18230073 - or eax, 0x6fffffff - mov esi, 0x18230073 - - ; OR32ri - mov ebx, 0x7 - mov esi, 0x18230074 - or ebx, 0x44444 - mov esi, 0x18230074 - - ; OR32rr - mov ecx, 0x0 - mov edx, 0x1 - mov esi, 0x18230075 - or ecx, edx - mov esi, 0x18230075 - - ; OR8i8 - mov al, 0x6 - mov esi, 0x18230076 - or al, 0x2 - mov esi, 0x18230076 - - ; OR8ri - mov bh, 0x45 - mov esi, 0x18230077 - or bh, 0x82 - mov esi, 0x18230077 - - ; OR8rr - mov cl, 0x78 - mov dl, 0x12 - mov esi, 0x18230078 - or cl, dl - mov esi, 0x18230078 - - ; POP16r - mov cx, 0x77 - xor di, di - mov esi, 0x18230079 - push cx - pop di - mov esi, 0x18230079 - - ; POP32r - mov ecx, 0x7777 - mov edi, 0x0 - mov esi, 0x1823007a - push ecx - pop edi - mov esi, 0x1823007a - - ; PUSH16r - mov cx, 0x99 - mov esi, 0x1823007b - push cx - mov esi, 0x1823007b - pop cx - - ; PUSH32r - mov ecx, 0x9999 - mov esi, 0x1823007c - push ecx - mov esi, 0x1823007c - pop ecx - - ; PUSHi16 - mov esi, 0x1823007d - push 0xeeee - mov esi, 0x1823007d - pop eax - - ; PUSHi32 - mov esi, 0x1823007e - push 0x7c100052 - mov esi, 0x1823007e - pop eax - - ; PUSHi8 - mov esi, 0x1823007f - push 0xff - mov esi, 0x1823007f - pop eax - - ; RCL16r1 - mov dx, 0x414 - mov esi, 0x18230080 - rcl dx, 0x1 - mov esi, 0x18230080 - - ; RCL16rCL - mov bx, 0x414 - mov cl, 0x3 - mov esi, 0x18230081 - rcl bx, cl - mov esi, 0x18230081 - - ; RCL16ri - mov cx, 0x545 - mov esi, 0x18230082 - rcl cx, 0x8 - mov esi, 0x18230082 - - ; RCL32r1 - mov eax, 0x56789 - mov esi, 0x18230083 - rcl eax, 0x1 - mov esi, 0x18230083 - - ; RCL32rCL - mov ebx, 0x4141 - mov cl, 0x2 - mov esi, 0x18230084 - rcl ebx, cl - mov esi, 0x18230084 - - ; RCL32ri - mov ecx, 0x6789 - mov esi, 0x18230085 - rcl ecx, 0x8 - mov esi, 0x18230085 - - ; RCL8r1 - mov ah, 0xa2 - mov esi, 0x18230086 - rcl ah, 0x1 - mov esi, 0x18230086 - - ; RCL8rCL - mov bh, 0x41 - mov cl, 0x4 - mov esi, 0x18230087 - rcl bh, cl - mov esi, 0x18230087 - - ; RCL8ri - mov ch, 0x56 - mov esi, 0x18230088 - rcl ch, 0x2 - mov esi, 0x18230088 - - ; RCR16r1 - mov dx, 0x414 - mov esi, 0x18230089 - rcr dx, 0x1 - mov esi, 0x18230089 - - ; RCR16rCL - mov bx, 0x414 - mov cl, 0x3 - mov esi, 0x1823008a - rcr bx, cl - mov esi, 0x1823008a - - ; RCR16ri - mov cx, 0x545 - mov esi, 0x1823008b - rcr cx, 0x8 - mov esi, 0x1823008b - - ; RCR32r1 - mov eax, 0x56789 - mov esi, 0x1823008c - rcr eax, 0x1 - mov esi, 0x1823008c - - ; RCR32rCL - mov ebx, 0x4141 - mov cl, 0x2 - mov esi, 0x1823008d - rcr ebx, cl - mov esi, 0x1823008d - - ; RCR32ri - mov ecx, 0x6789 - mov esi, 0x1823008e - rcr ecx, 0x8 - mov esi, 0x1823008e - - ; RCR8r1 - mov ah, 0xa2 - mov esi, 0x1823008f - rcr ah, 0x1 - mov esi, 0x1823008f - - ; RCR8rCL - mov bh, 0x41 - mov cl, 0x4 - mov esi, 0x18230090 - rcr bh, cl - mov esi, 0x18230090 - - ; RCR8ri - mov ch, 0x56 - mov esi, 0x18230091 - rcr ch, 0x2 - mov esi, 0x18230091 - - ; ROL16r1 - mov dx, 0x414 - mov esi, 0x18230092 - rol dx, 0x1 - mov esi, 0x18230092 - - ; ROL16rCL - mov bx, 0x414 - mov cl, 0x3 - mov esi, 0x18230093 - rol bx, cl - mov esi, 0x18230093 - - ; ROL16ri - mov cx, 0x545 - mov esi, 0x18230094 - rol cx, 0x8 - mov esi, 0x18230094 - - ; ROL32r1 - mov eax, 0x56789 - mov esi, 0x18230095 - rol eax, 0x1 - mov esi, 0x18230095 - - ; ROL32rCL - mov ebx, 0x4141 - mov cl, 0x2 - mov esi, 0x18230096 - rol ebx, cl - mov esi, 0x18230096 - - ; ROL32ri - mov ecx, 0x6789 - mov esi, 0x18230097 - rol ecx, 0x8 - mov esi, 0x18230097 - - ; ROL8r1 - mov ah, 0xa2 - mov esi, 0x18230098 - rol ah, 0x1 - mov esi, 0x18230098 - - ; ROL8rCL - mov bh, 0x41 - mov cl, 0x4 - mov esi, 0x18230099 - rol bh, cl - mov esi, 0x18230099 - - ; ROL8ri - mov ch, 0x56 - mov esi, 0x1823009a - rol ch, 0x2 - mov esi, 0x1823009a - - ; ROR16r1 - mov dx, 0x414 - mov esi, 0x1823009b - ror dx, 0x1 - mov esi, 0x1823009b - - ; ROR16rCL - mov bx, 0x414 - mov cl, 0x3 - mov esi, 0x1823009c - ror bx, cl - mov esi, 0x1823009c - - ; ROR16ri - mov cx, 0x545 - mov esi, 0x1823009d - ror cx, 0x8 - mov esi, 0x1823009d - - ; ROR32r1 - mov eax, 0x56789 - mov esi, 0x1823009e - ror eax, 0x1 - mov esi, 0x1823009e - - ; ROR32rCL - mov ebx, 0x4141 - mov cl, 0x2 - mov esi, 0x1823009f - ror ebx, cl - mov esi, 0x1823009f - - ; ROR32ri - mov ecx, 0x6789 - mov esi, 0x182300a0 - ror ecx, 0x8 - mov esi, 0x182300a0 - - ; ROR8r1 - mov ah, 0xa2 - mov esi, 0x182300a1 - ror ah, 0x1 - mov esi, 0x182300a1 - - ; ROR8rCL - mov bh, 0x41 - mov cl, 0x4 - mov esi, 0x182300a2 - ror bh, cl - mov esi, 0x182300a2 - - ; ROR8ri - mov ch, 0x56 - mov esi, 0x182300a3 - ror ch, 0x2 - mov esi, 0x182300a3 - - ; SBB16i16 - mov ax, 0x7 - mov esi, 0x182300a4 - sbb ax, 0xeeee - mov esi, 0x182300a4 - - ; SBB16ri - mov bx, 0x7 - mov esi, 0x182300a5 - sbb bx, 0x444 - mov esi, 0x182300a5 - - ; SBB16rr - mov cx, 0x0 - mov dx, 0x1 - mov esi, 0x182300a6 - sbb cx, dx - mov esi, 0x182300a6 - - ; SBB32i32 - mov eax, 0x7 - mov esi, 0x182300a7 - sbb eax, 0x6fffffff - mov esi, 0x182300a7 - - ; SBB32ri - mov ebx, 0x7 - mov esi, 0x182300a8 - sbb ebx, 0x44444 - mov esi, 0x182300a8 - - ; SBB32rr - mov ecx, 0x0 - mov edx, 0x1 - mov esi, 0x182300a9 - sbb ecx, edx - mov esi, 0x182300a9 - - ; SBB8i8 - mov al, 0x7 - mov esi, 0x182300aa - sbb al, 0x5 - mov esi, 0x182300aa - - ; SBB8ri - mov ah, 0x99 - mov esi, 0x182300ab - sbb ah, 0x3 - mov esi, 0x182300ab - - ; SBB8rr - mov ch, 0x2 - mov dh, 0x3 - mov esi, 0x182300ac - sbb ch, dh - mov esi, 0x182300ac - - ; SHL16r1 - mov ax, 0x7 - mov esi, 0x182300ad - shl ax, 0x1 - mov esi, 0x182300ad - - ; SHL16rCL - mov bx, 0x9 - mov cl, 0x2 - mov esi, 0x182300ae - shl bx, cl - mov esi, 0x182300ae - - ; SHL16ri - mov cx, 0x78 - mov esi, 0x182300af - shl cx, 0x8 - mov esi, 0x182300af - - ; SHL32r1 - mov eax, 0x888 - mov esi, 0x182300b0 - shl eax, 0x1 - mov esi, 0x182300b0 - - ; SHL32rCL - mov ebx, 0xbfe - mov cl, 0x1 - mov esi, 0x182300b1 - shl ebx, cl - mov esi, 0x182300b1 - - ; SHL32ri - mov ecx, 0x15 - mov esi, 0x182300b2 - shl ecx, 0x8 - mov esi, 0x182300b2 - - ; SHL8r1 - mov ah, 0xd - mov esi, 0x182300b3 - shl ah, 0x1 - mov esi, 0x182300b3 - - ; SHL8rCL - mov bh, 0xa - mov cl, 0x3 - mov esi, 0x182300b4 - shl bh, cl - mov esi, 0x182300b4 - - ; SHL8ri - mov ch, 0xa - mov esi, 0x182300b5 - shl ch, 0x2 - mov esi, 0x182300b5 - - ; SHR16r1 - mov ax, 0xe45 - mov esi, 0x182300b6 - shr ax, 0x1 - mov esi, 0x182300b6 - - ; SHR16rCL - mov bx, 0x44 - mov cl, 0x5 - mov esi, 0x182300b7 - shr bx, cl - mov esi, 0x182300b7 - - ; SHR16ri - mov cx, 0x987 - mov esi, 0x182300b8 - shr cx, 0x8 - mov esi, 0x182300b8 - - ; SHR32r1 - mov eax, 0x444444 - mov esi, 0x182300b9 - shr eax, 0x1 - mov esi, 0x182300b9 - - ; SHR32rCL - mov ebx, 0x654 - mov cl, 0x5 - mov esi, 0x182300ba - shr ebx, cl - mov esi, 0x182300ba - - ; SHR32ri - mov ecx, 0x15 - mov esi, 0x182300bb - shr ecx, 0x8 - mov esi, 0x182300bb - - ; SHR8r1 - mov ah, 0xf - mov esi, 0x182300bc - shr ah, 0x1 - mov esi, 0x182300bc - - ; SHR8rCL - mov bh, 0xe - mov cl, 0x2 - mov esi, 0x182300bd - shr bh, cl - mov esi, 0x182300bd - - ; SHR8ri - mov ch, 0x8 - mov esi, 0x182300be - shr ch, 0x2 - mov esi, 0x182300be - - ; STC - mov esi, 0x182300bf - stc - mov esi, 0x182300bf - - ; STD - mov esi, 0x182300c0 - std - mov esi, 0x182300c0 - - ; SUB16ri - mov bx, 0x2 - mov esi, 0x182300c1 - sub bx, 0x444 - mov esi, 0x182300c1 - - ; SUB32i32 - mov eax, 0x8 - mov esi, 0x182300c2 - sub eax, 0x6fffffff - mov esi, 0x182300c2 - - ; SUB32ri - mov ebx, 0xc - mov esi, 0x182300c3 - sub ebx, 0x44444 - mov esi, 0x182300c3 - - ; SUB32rr - mov ecx, 0x1 - mov edx, 0x2 - mov esi, 0x182300c4 - sub ecx, edx - mov esi, 0x182300c4 - - ; SUB8ri - mov ah, 0xdd - mov esi, 0x182300c5 - sub ah, 0x3 - mov esi, 0x182300c5 - - ; TEST16i16 - mov ax, 0x7 - mov esi, 0x182300c6 - test ax, 0xeeee - mov esi, 0x182300c6 - - ; TEST16ri - mov bx, 0x7 - mov esi, 0x182300c7 - test bx, 0x444 - mov esi, 0x182300c7 - - ; TEST16rr - mov cx, 0x0 - mov dx, 0x1 - mov esi, 0x182300c8 - test cx, dx - mov esi, 0x182300c8 - - ; TEST32i32 - mov eax, 0x7 - mov esi, 0x182300c9 - test eax, 0x6fffffff - mov esi, 0x182300c9 - - ; TEST32ri - mov ebx, 0x7 - mov esi, 0x182300ca - test ebx, 0x44444 - mov esi, 0x182300ca - - ; TEST32rr - mov ecx, 0x0 - mov edx, 0x1 - mov esi, 0x182300cb - test ecx, edx - mov esi, 0x182300cb - - ; TEST8i8 - mov al, 0x7 - mov esi, 0x182300cc - test al, 0x5 - mov esi, 0x182300cc - - ; TEST8ri - mov ah, 0x2 - mov esi, 0x182300cd - test ah, 0x3 - mov esi, 0x182300cd - - ; TEST8rr - mov ch, 0x2 - mov dh, 0x3 - mov esi, 0x182300ce - test ch, dh - mov esi, 0x182300ce - - ; XADD16rr - mov bx, 0x846 - mov dx, 0x857 - mov esi, 0x182300cf - xadd bx, dx - mov esi, 0x182300cf - - ; XADD32rr - mov ebx, 0xb46767 - mov ecx, 0xa57877 - mov esi, 0x182300d0 - xadd ebx, ecx - mov esi, 0x182300d0 - - ; XADD8rr - mov al, 0x45 - mov bl, 0x56 - mov esi, 0x182300d1 - xadd al, bl - mov esi, 0x182300d1 - - ; XCHG16ar - mov ax, 0x6 - mov bx, 0x7 - mov esi, 0x182300d2 - xchg ax, bx - mov esi, 0x182300d2 - - ; XCHG16rr - mov bx, 0xc - mov dx, 0xd - mov esi, 0x182300d3 - xchg bx, dx - mov esi, 0x182300d3 - - ; XCHG32ar - mov eax, 0x20 - mov ebx, 0x30 - mov esi, 0x182300d4 - xchg eax, ebx - mov esi, 0x182300d4 - - ; XCHG32rr - mov ebx, 0x120 - mov ecx, 0x122 - mov esi, 0x182300d5 - xchg ebx, ecx - mov esi, 0x182300d5 - - ; XCHG8rr - mov bl, 0x4 - mov cl, 0x6 - mov esi, 0x182300d6 - xchg bl, cl - mov esi, 0x182300d6 - - ; XOR16i16 - mov ax, 0x2 - mov esi, 0x182300d7 - xor ax, 0xeeee - mov esi, 0x182300d7 - - ; XOR16ri - mov bx, 0x2 - mov esi, 0x182300d8 - xor bx, 0x444 - mov esi, 0x182300d8 - - ; XOR16rr - mov cx, 0x2 - mov dx, 0x3 - mov esi, 0x182300d9 - xor cx, dx - mov esi, 0x182300d9 - - ; XOR32i32 - mov eax, 0x12 - mov esi, 0x182300da - xor eax, 0x6fffffff - mov esi, 0x182300da - - ; XOR32ri - mov ebx, 0x12345 - mov esi, 0x182300db - xor ebx, 0x44444 - mov esi, 0x182300db - - ; XOR32rr - mov ecx, 0x2 - mov edx, 0x3 - mov esi, 0x182300dc - xor ecx, edx - mov esi, 0x182300dc - - ; XOR8i8 - mov al, 0x12 - mov esi, 0x182300dd - xor al, 0x5 - mov esi, 0x182300dd - - ; XOR8ri - mov ah, 0x12 - mov esi, 0x182300de - xor ah, 0x3 - mov esi, 0x182300de - - ; XOR8rr - mov ch, 0x2 - mov dh, 0x3 - mov esi, 0x182300df - xor ch, dh - mov esi, 0x182300df - - ; AND8i8 - mov al, 0xa - mov esi, 0x182300e0 - and al, 0x5 - mov esi, 0x182300e0 - - ; AND8ri - mov ah, 0xcd - mov esi, 0x182300e1 - and ah, 0x3 - mov esi, 0x182300e1 - - ; AND8rr - mov ch, 0xa - mov dh, 0xe8 - mov esi, 0x182300e2 - and ch, dh - mov esi, 0x182300e2 - - ; AND16mi - mov esi, 0x182300e3 - lea eax, [esp-0x4] - mov DWORD [eax], 0x44 - and WORD [eax], 0x44 - mov eax, 0x0 - mov esi, 0x182300e3 - - ; AND8mi - mov esi, 0x182300e4 - lea ebx, [esp-0x4] - mov DWORD [ebx], 0x55 - and BYTE [ebx], 0x44 - mov ebx, 0x0 - mov esi, 0x182300e4 - - ; AND32mr - mov esi, 0x182300e5 - lea eax, [esp-0x4] - mov DWORD [eax], 0x55555 - mov ebx, 0x77777 - and DWORD [eax], ebx - mov eax, 0x0 - mov esi, 0x182300e5 - - ; AND16mr - mov esi, 0x182300e6 - lea eax, [esp-0x4] - mov DWORD [eax], 0x5555 - mov ebx, 0x7777 - and WORD [eax], bx - mov eax, 0x0 - mov esi, 0x182300e6 - - ; AND8mr - mov esi, 0x182300e7 - lea eax, [esp-0x4] - mov DWORD [eax], 0x55 - mov ebx, 0x77 - and BYTE [eax], bl - mov eax, 0x0 - mov esi, 0x182300e7 - - ; SUB16i16 - mov ax, 0xa123 - mov esi, 0x182300e8 - sub ax, 0xeeee - mov esi, 0x182300e8 - - ; SUB8i8 - mov al, 0xa1 - mov esi, 0x182300e9 - sub al, 0x5 - mov esi, 0x182300e9 - - ; SUB16mr - mov esi, 0x182300ea - lea ebx, [esp-0x4] - mov DWORD [ebx], 0xc8 - mov ecx, 0x3 - sub WORD [ebx], cx - mov ebx, [ebx] - mov esi, 0x182300ea - - ; SUB16rm - mov esi, 0x182300eb - lea ecx, [esp-0x4] - mov DWORD [ecx], 0xc8 - mov edx, 0x3 - sub dx, WORD [ecx] - mov ecx, [ecx] - mov esi, 0x182300eb - - ; Shr16RCL - mov ax, 0x14FC - mov cl, 0x5 - mov esi, 0x182300ec - shr ax, cl - mov esi, 0x182300ec - - ; Shr8R1 - mov al, 0x4F - mov esi, 0x182300ed - shr al, 0x1 - mov esi, 0x182300ed - - ; Shl16RCL - mov ax, 0x14fc - mov cl, 0x5 - mov esi, 0x182300ee - shl ax, cl - mov esi, 0x182300ee - - ; Cmova16RR - mov ax, 0x33 - mov dx, 0x44 - mov esi, 0x182300ef - cmova ax, dx - mov esi, 0x182300ef - - ; CMOVA32rm - mov esi, 0x182300f0 - lea edi, [esp-0x4] - mov DWORD [edi], 0x3 - cmova eax, [edi] - mov edi, 0x0 - mov esi, 0x182300f0 - - ; Cmova32RR - mov eax, 0x3333 - mov ecx, 0x4444 - mov esi, 0x182300f1 - cmova eax, ecx - mov esi, 0x182300f1 - - ; OR32mr - mov esi, 0x182300f2 - lea edi, [esp-0x4] - mov DWORD [edi], 0x1234abcd - mov eax, 0x5678fedc - or [edi], eax - mov edx, [edi] - mov edi, 0x0 - mov esi, 0x182300f2 - - ; OR32mi - mov esi, 0x182300f3 - lea edi, [esp-0x4] - mov DWORD [edi], 0xabcd1234 - or DWORD [edi], 0x5678fedc - mov edx, [edi] - mov edi, 0x0 - mov esi, 0x182300f3 - - ; Or8RR - mov al, 0x5E - mov ah, 0x13 - mov esi, 0x182300f4 - or al, ah - mov esi, 0x182300f4 - - ; OR16rm - mov esi, 0x182300f5 - lea edi, [esp-0x6] - mov WORD [edi], 0x1234 - mov ax, 0x5678 - or ax, [edi] - mov edi, 0x0 - mov esi, 0x182300f5 - - ; SBB32rm - mov esi, 0x182300f6 - lea edi, [esp-0x4] - mov DWORD [edi], 0x1234abcd - mov eax, 0x56781234 - sbb eax, [edi] - mov edi, 0x0 - mov esi, 0x182300f6 - - ; SBB32mr - mov esi, 0x182300f7 - lea edi, [esp-0x4] - mov DWORD [edi], 0xabcd4321 - mov eax, 0x56781234 - sbb [edi], eax - mov edx, [edi] - mov edi, 0x0 - mov esi, 0x182300f7 - - ; Bswap32R - mov eax, 0x56781234 - mov esi, 0x182300f8 - bswap eax - mov esi, 0x182300f8 - - ; Xadd16RR - mov ax, 0x6824 - mov dx, 0x1479 - mov esi, 0x182300f9 - xadd ax, dx - mov esi, 0x182300f9 - - ; XADD32rm - mov esi, 0x182300fa - lea edi, [esp-0x4] - mov DWORD [edi], 0xabcd4321 - mov eax, 0x56781234 - xadd [edi], eax - mov edx, [edi] - mov edi, 0x0 - mov esi, 0x182300fa - - ; Cmpxch16RR - mov ax, 0x6824 - mov dx, 0x6824 - mov cx, 0x1479 - mov esi, 0x182300fb - cmpxchg dx, cx - mov esi, 0x182300fb - - ; Cmpxchg32RR - mov eax, 0x68244256 - mov edx, 0x54316785 - mov ecx, 0x23423423 - mov esi, 0x182300fc - cmpxchg edx, ecx - mov esi, 0x182300fc - - ; CMPXCHG32rm - mov esi, 0x182300fd - lea edi, [esp-0x10] - mov DWORD [edi], 0xabcd4321 - mov eax, 0xabcd4321 - cmpxchg [edi], ecx - mov edx, [edi] - mov edi, 0x0 - mov esi, 0x182300fd - - ; Adc16RI - mov ax, 0xf012 - mov esi, 0x182300fe - adc ax, 0x1234 - mov esi, 0x182300fe - - ; Adc32RR - mov eax, 0x1234abcd - mov edx, 0x2345bcde - mov esi, 0x182300ff - adc eax, edx - mov esi, 0x182300ff - - ; Composite1 - mov eax, 0x18 - mov esi, 0x18230100 - mov ecx, eax - xor eax, eax - xor ebx, ebx - cmp ebx, ecx - mov esi, 0x18230100 - - ; Composite2 - mov ecx, 0x18 - xor ebx, ebx - xor eax, eax - inc eax - mov esi, 0x18230101 -again: - cmp ebx, ecx - je done - inc ebx - add eax, eax - jmp again -done: - inc eax - mov esi, 0x18230101 - - ; LOOP - mov ecx, 0x18 - xor eax, eax - inc eax - mov esi, 0x18230102 -again_1: - add eax, eax - loop again_1 - inc eax - mov esi, 0x18230102 - - ; LOOPNE - mov eax, 0x4096 - mov ecx, 0x32 - mov esi, 0x18230103 -again_2: - shr eax, 0x1 - loopne again_2 - inc eax - mov esi, 0x18230103 - - ; Add32RR - xor eax, eax - inc eax - mov eax, 0x1 - mov ebx, 0x2 - mov esi, 0x18230104 - add eax, ebx - mov esi, 0x18230104 - - ; Add32RI - mov eax, 0x2 - mov esi, 0x18230105 - add eax, 0x11111 - mov esi, 0x18230105 - - ; Sub32RR - mov eax, 0x1 - mov ebx, 0x2 - mov esi, 0x18230106 - sub ebx, eax - mov esi, 0x18230106 - - ; Xor32RI - mov ebx, 0x12345 - mov esi, 0x18230107 - xor ebx, 0x12345 - mov esi, 0x18230107 - - ; Test32RR1 - mov ebx, 0x0 - mov esi, 0x18230108 - test ebx, ebx - mov esi, 0x18230108 - - ; Test32RR2 - mov edi, 0x8 - mov eax, 0x12 - mov esi, 0x18230109 - test edi, eax - mov esi, 0x18230109 - - ; Cmp32RR1 - mov eax, 0x4 - mov ebx, 0x2 - mov esi, 0x1823010a - cmp eax, ebx - mov esi, 0x1823010a - - ; Cmp32RR2 - mov eax, 0x17 - mov ebx, 0x3 - mov esi, 0x1823010b - cmp eax, ebx - mov esi, 0x1823010b - - ; Neg32R - mov ebx, 0x26 - mov esi, 0x1823010c - neg ebx - mov esi, 0x1823010c - - ; Mov32RR - mov eax, 0x8 - mov ecx, 0x12 - mov esi, 0x1823010d - mov ecx, eax - mov esi, 0x1823010d - - ; Mov32RI - mov esi, 0x1823010e - mov eax, 0x18111 - mov esi, 0x1823010e - - ; Xor32RR - mov esi, 0x1823010f - xor eax, eax - mov esi, 0x1823010f - - ; MovZx32RR16 - mov eax, 0x18 - mov ebx, 0 - mov esi, 0x18230110 - movzx ebx, ax - mov esi, 0x18230110 - - ; Lea32R1 - mov eax, 0x21 - mov edi, 0x8 - mov esi, 0x18230111 - lea eax, [eax+edi+0x1] - mov esi, 0x18230111 - - ; Lea32R2 - mov eax, 0x515 - mov edx, 0x30 - mov esi, 0x18230112 - lea ecx, [eax+edx*0x4] - mov esi, 0x18230112 - - ; PushPopR - mov eax, 0x88 - mov edi, 0x0 - mov esi, 0x18230113 - push eax - pop edi - mov esi, 0x18230113 - - ; Shl32RI - mov eax, 0x1 - mov esi, 0x18230114 - shl eax, 0xa - mov esi, 0x18230114 - - ; Shr32RI - mov eax, 0x4096 - mov esi, 0x18230115 - shr eax, 0x6 - mov esi, 0x18230115 - - ; Sbb32RR1 - mov ecx, 0x1892 - mov edx, 0x4 - mov esi, 0x18230116 - sbb edx, ecx - mov esi, 0x18230116 - - ; Sbb32RR2 - clc - mov ecx, 0xffffff67 - mov edx, 0x19 - mov esi, 0x18230117 - sbb edx, ecx - mov esi, 0x18230117 - - ; Not32R - mov eax, 0x21 - mov esi, 0x18230118 - not eax - mov esi, 0x18230118 - - ; ADD16rm - mov esi, 0x18230119 - lea eax, [esp-0x10] - mov DWORD [eax], 0x1000 - mov bx, 0x2 - add bx, [eax] - mov eax, [eax] - mov esi, 0x18230119 - - ; Std - mov esi, 0x1823011a - std - mov esi, 0x1823011a - - ; Cld - mov esi, 0x1823011b - cld - mov esi, 0x1823011b - - ; Sbb32RI - mov esi, 0x1823011c - sbb eax, 0x44 - sbb ecx, 0x43 - mov esi, 0x1823011c - - ; Stc - mov esi, 0x1823011d - stc - mov esi, 0x1823011d - - ; Clc - mov esi, 0x1823011e - clc - mov esi, 0x1823011e - - ; ADD32mr - mov esi, 0x1823011f - lea edi, [esp-0x4] - mov DWORD [edi], 0x8 - mov eax, 0x36 - add [edi], eax - mov eax, [edi] - mov edi, 0x0 - mov esi, 0x1823011f - - ; Sar32RI1 - mov ebx, 0x56 - mov esi, 0x18230120 - sar ebx, 0x3 - mov esi, 0x18230120 - - ; Sar32RI2 - mov esi, 0x18230121 - sar ebx, 0x0 - mov esi, 0x18230121 - - ; Pushl32m - mov esi, 0x18230122 - lea edi, [esp-0x4] - mov DWORD [edi], 0x8 - push DWORD [edi] - pop ecx - xor edi, edi - mov esi, 0x18230122 - - ; FADDP - lea edi, [esp-0xc] - mov DWORD [edi], 0x2168c000 - mov DWORD [edi+0x4], 0xc90fdaa2 - mov DWORD [edi+0x8], 0x00004000 - fld TWORD [edi] - fld TWORD [edi] - mov esi, 0x18230123 - faddp st1, st0 - mov edi, 0x0 - mov esi, 0x18230123 - - ; FSTENVm - mov esi, 0x18230124 - lea edi, [esp-0x1c] - fstenv [edi] - mov eax, [edi] ;control word - mov ebx, [edi+0x4] ;status word - mov ecx, [edi+0x8] ;tag word - ;mov edx, [edi+0xc] ;EIP - unsupported - ;mov esi, [edi+0x10] ;FOPCODE + FPU EIP Segment - unsupported - ;mov ebp, [edi+0x14] ;data pointer - unsupported - ;mov edi, [edi+0x18] ;data pointer selector - unsupported - mov edi, 0x0 - mov esi, 0x18230124 - - ; LD_F32m - mov esi, 0x18230125 - lea edi, [esp-0x4] - mov DWORD [edi], 0x40490fdb - fld DWORD [edi] - mov edi, 0x0 - mov esi, 0x18230125 - - ; LD_F80m - mov esi, 0x18230126 - lea edi, [esp-0xc] - mov DWORD [edi], 0x2168c000 - mov DWORD [edi+0x4], 0xc90fdaa2 - mov DWORD [edi+0x8], 0x00004000 - fld TWORD [edi] - mov edi, 0x0 - mov esi, 0x18230126 - - ; LD_Frr - mov esi, 0x18230127 - fld st1 - mov esi, 0x18230127 - - ; ST_F32m - mov esi, 0x18230128 - lea edi, [esp-0x4] - fst DWORD [edi] - mov eax, [edi] - mov edi, 0x0 - mov esi, 0x18230128 - - ; ST_Frr - mov esi, 0x18230129 - fst st2 - mov esi, 0x18230129 - - ; SETNEr - mov ecx, 0x5 - mov ebx, 0xa - cmp ecx, ebx - mov esi, 0x1823012a - setne al - mov esi, 0x1823012a - - ; SETNEm - mov ecx, 0x5 - mov ebx, 0xa - cmp ecx, ebx - mov esi, 0x1823012b - lea edi, [esp-0x4] - mov DWORD [edi], 0xc - setne [edi] - mov eax, [edi] - xor edi, edi - mov esi, 0x1823012b - - ; CMP16mi - mov esi, 0x1823012c - lea eax, [esp-0x4] - mov DWORD [eax], 0x200 - cmp WORD [eax], 0x222 - mov eax, 0x0 - mov esi, 0x1823012c - - ; SUB8mr - mov esi, 0x1823012d - lea eax, [esp-0x4] - mov DWORD [eax], 0xc8 - mov ebx, 0x2 - sub BYTE [eax], bl - mov eax, [eax] - mov esi, 0x1823012d - - ; SUB8rm - mov esi, 0x1823012e - lea eax, [esp-0x4] - mov DWORD [eax], 0xc8 - mov ebx, 0x2 - sub bl, BYTE [eax] - mov eax, [eax] - mov esi, 0x1823012e - - ; NOOP - mov esi, 0x1823012f - nop - mov esi, 0x1823012f diff --git a/mc-sema/validator/x86/testgen.py b/mc-sema/validator/x86/testgen.py deleted file mode 100644 index 6175b4f39..000000000 --- a/mc-sema/validator/x86/testgen.py +++ /dev/null @@ -1,339 +0,0 @@ -import sys -import collections -import itertools -import os -import glob -import subprocess -import tempfile -import re -import argparse - -#for debugging, use the pretty-printer -import pprint - - -argparser = argparse.ArgumentParser() -argparser.add_argument('-tstmpl', type=argparse.FileType('rb', 0), help="testSemantics template", required=True) -argparser.add_argument('-taout', type=argparse.FileType('wb', 0), help="assembly output for PIN", required=False) -argparser.add_argument('-tsout', type=argparse.FileType('wb', 0), help="testSemantics.cpp output", required=False) -argparser.add_argument('-testfiles', help="directory containing test files", required=True) -argparser.add_argument('-nasm', help="path to nasm executable", required=True) - -args = argparser.parse_args() - -if not (args.taout or args.tsout): - sys.stderr.write("Either -taout or -tsout is required!\n") - sys.exit(-1) - -#TEST_FILES_PATH = os.path.join("..","validator", "valTest", "tests") -#NASM_PATH = os.path.join("..","validator","valTest", "nasm", "nasm.exe") - -EXPECTED_LINES = ["BITS 32", ";TEST_FILE_META_BEGIN"] -META_END_MARKER = ";TEST_FILE_META_END" - - -TEST_NUMBER = 0x300 - -PREPARED_TESTS = collections.OrderedDict() - -#OUTPUT_TESTSEMANTICS = "testSemantics.auto.cpp" -#OUTPUT_TEST_ASM = "test_a.auto.asm" -BEGIN_RECORDING_TOKEN = ";TEST_BEGIN_RECORDING" -END_RECORDING_TOKEN = ";TEST_END_RECORDING" -RCONST = 0x18230000 -RECORDED_ASM_RE = re.compile(";TEST_(BEGIN|END)_RECORDING") - - -TEST_DECLARATION = """ -NEW_TEST("{test_name}", {test_number:#x}); -""" - -TEST_IGNOREFLAGS_DECLARATION = """ -NEW_TEST_IGNOREFLAGS("{test_name}", {test_number:#x}, {test_ignoreflags}); -""" - -TEST_DEFINITION = """ -{test_type}(ModuleTest, {test_name}) {{ - uint8_t byteArr[] = {{ {test_bytes} }}; - IN_OUT_TEST("{test_name}", byteArr); -}} -""" - -def compile_asm(test_name, test_file): - tmphandle_bin,tmpfile_bin = tempfile.mkstemp(suffix=".bin") - tmphandle_asm,tmpfile_asm = tempfile.mkstemp(suffix=".asm") - os.close(tmphandle_bin) - os.close(tmphandle_asm) - - orig_asm = open(test_file, 'rb').read() - # get only the asm between ;TEST_BEGIN_RECORDING and ;TEST_END_RECORDING - orig_parts = RECORDED_ASM_RE.split(orig_asm) - semantics_asm = orig_parts[2] - - #save it to a separate file for compilation - with open(tmpfile_asm, 'wb') as asmfile: - asmfile.write("BITS 32\n") - asmfile.write(semantics_asm) - - try: - subprocess.check_call([args.nasm, "-f", "bin", "-o", tmpfile_bin, tmpfile_asm]) - except subprocess.CalledProcessError as e: - sys.stderr.write("Could not assemble test {}, original source file: {}\n".format(test_name, test_file)) - sys.stderr.write("Error was: {}\n".format(e)) - os.unlink(tmpfile_bin) - os.unlink(tmpfile_asm) - sys.exit(-1) - - - with open(tmpfile_bin, 'rb') as binfile: - bindata = binfile.read() - - #clean up tmpfiles - os.unlink(tmpfile_bin) - os.unlink(tmpfile_asm) - - # transform to c-style hex (0x##) - bindata = ", ".join([hex(ord(x)) for x in bindata]) - - return bindata - -def parse_metadata(test_name, test_file): - global EXPECTED_LINES - - meta_values = {} - - lines = open(test_file, 'r').readlines() - lines = [l.strip() for l in lines] - - # do a quick sanity check on ASM files in the directory - for i in range(2): - if lines[i].upper() != EXPECTED_LINES[i]: - sys.stderr.write("Failed to parse {}. Looking for {}, got {}\n".format(test_file, EXPECTED_LINES[i], lines[i] )) - sys.exit(-1) - - #parse metadata; it should be in the form of - #;KEY=VALUE - # the keys are lowercased and values are uppercased - for i in xrange(2, len(lines)-2): - if lines[i] == META_END_MARKER: - break - - try: - vname, vval = lines[i].split('=') - vname = vname[1:] - except: - sys.stderr.write("Could not parse {}; line: {}.\nExpected KEY=VALUE\n".format(test_file, lines[i])) - sys.exit(-1) - - meta_values[vname.lower()] = vval.upper() - - #get the asm that will go into the automatically - # generated test_a.auto.asm. That file is by PIN - # to generate ground truth for semantics tests - - all_but_bits_line = "\n".join(lines[1:]) - all_but_bits_line = all_but_bits_line.replace( - BEGIN_RECORDING_TOKEN, "mov esi, {:#x}".format(RCONST+TEST_NUMBER)) - all_but_bits_line = all_but_bits_line.replace( - END_RECORDING_TOKEN, "mov esi, {:#x}".format(RCONST+TEST_NUMBER)) - - meta_values['test_asm'] = all_but_bits_line - - return meta_values - - -def prepare_from_file(test_name, test_file): - - #read metadata - meta_dict = parse_metadata(test_name, test_file) - #get the hex bytes that go into testSemantics.auto.cpp - hexbytes = compile_asm(test_name, test_file) - meta_dict['test_bytes'] = hexbytes - - # see if we are using an ignoreflags or a normal declaration - # this is determined by the value of TEST_IGNOREFLAGS metadata entry - if meta_dict['test_ignoreflags'] == "": - meta_dict['test_declaration'] = TEST_DECLARATION - else: - meta_dict['test_declaration'] = TEST_IGNOREFLAGS_DECLARATION - - return meta_dict - -def prepare_tests(): - global TEST_NUMBER - - # assume every .asm file in the tests directory is a test - asm_files = glob.glob( os.path.join(args.testfiles,"*.asm") ) - - # test names are the file name without .asm - test_names = map(lambda x: os.path.basename(x)[:-4], asm_files) - - sys.stderr.write( "Found {} tests:\n".format(len(test_names)) ) - pprint.pprint(test_names, stream=sys.stderr) - - # fill out the test dictionary with a test name and an increasing - # test number. Should be filled out in alphabetical order, or - # whichever way glob.glob() returns files - for test,testfile in zip(sorted(test_names), sorted(asm_files)): - sys.stderr.write("processing: {}\n".format(test)) - PREPARED_TESTS[test] = {} - td = PREPARED_TESTS[test] - td['test_number'] = TEST_NUMBER - td['test_name'] = test - # fill out: - # test_bytes - # test_declaration - # test_type - td.update(prepare_from_file(test, testfile)) - - TEST_NUMBER += 1 - -def gen_declarations(): - declarations = "" - for test in PREPARED_TESTS.itervalues(): - declarations += test['test_declaration'].format(**test) - - return declarations - -def gen_definitions(): - declarations = "" - for test in PREPARED_TESTS.itervalues(): - declarations += TEST_DEFINITION.format(**test) - - return declarations - -def gen_asm(): - asm = "" - - for tname,test in PREPARED_TESTS.iteritems(): - asm += """\n""" - asm += " ;TEST: " + tname + "\n" - asm += " " + test['test_asm'] + "\n" - - asm += """ - ; pre-test clear to zeros - mov eax, 0 - mov ecx, 0 - mov edx, 0 - mov ebx, 0 - mov esi, 0 - mov edi, 0 - - ; end pre-test clear - ; restore stack - mov esp, dword [internal_saveregs+0x10] - mov ebp, dword [internal_saveregs+0x14] - ; add some stack slack - sub esp, 0x100 - mov eax, dword [internal_saveregs+0x20] - push eax - POPFD - FLDZ ;ST0 - FLDZ ;ST1 - FLDZ ;ST2 - FLDZ ;ST3 - FLDZ ;ST4 - FLDZ ;ST5 - FLDZ ;ST6 - FLDZ ;ST7 - FNINIT - """ - - return asm - -if __name__ == "__main__": - prepare_tests() - decs = "// Begin Declarations\n" - decs += gen_declarations() - decs += "// End Declarations\n" - - defs = "// Begin Definitions\n" - defs += gen_definitions() - defs += "// End Definitions\n" - - data = None - - # create test_a.auto.asm - test_asm = """BITS 32 -section .text - -global doTest -doTest: - -mov dword [internal_saveregs+0x00], eax -mov dword [internal_saveregs+0x04], ecx -mov dword [internal_saveregs+0x08], edx -mov dword [internal_saveregs+0x0c], ebx -mov dword [internal_saveregs+0x10], esp -mov dword [internal_saveregs+0x14], ebp -mov dword [internal_saveregs+0x18], esi -mov dword [internal_saveregs+0x1c], edi -push eax -PUSHFD -pop eax -mov dword [internal_saveregs+0x20], eax -pop eax -FNSAVE [internal_savefpu_precall] - - mov eax, 0 - mov ecx, 0 - mov edx, 0 - mov ebx, 0 - mov esi, 0 - mov edi, 0 - - sub esp, 0x100 - mov eax, dword [internal_saveregs+0x20] - push eax - POPFD - FLDZ ;ST0 - FLDZ ;ST1 - FLDZ ;ST2 - FLDZ ;ST3 - FLDZ ;ST4 - FLDZ ;ST5 - FLDZ ;ST6 - FLDZ ;ST7 - FNINIT -""" - test_asm += gen_asm() - test_asm += """ -mov eax, dword [internal_saveregs+0x00] -mov ecx, dword [internal_saveregs+0x04] -mov edx, dword [internal_saveregs+0x08] -mov ebx, dword [internal_saveregs+0x0c] -mov esp, dword [internal_saveregs+0x10] -mov ebp, dword [internal_saveregs+0x14] -mov esi, dword [internal_saveregs+0x18] -mov edi, dword [internal_saveregs+0x1c] -push dword [internal_saveregs+0x20] -POPFD -FRSTOR [internal_savefpu_precall] -RET - -SECTION .bss -internal_saveregs: RESD 10 -internal_savefpu: RESB 108 -internal_savefpu_precall: RESB 108 -""" - - # populate testSemantics.auto.cpp - data = args.tstmpl.read() - args.tstmpl.close() - data = data.replace(r'/*%DECLARATIONS*%/', decs) - data = data.replace(r'/*%DEFINITIONS%*/', defs) - - if data == None: - sys.stderr.write("Error: Could not open template file: {}\n".format(TEMPLATE_FILE)) - sys.exit(-1) - else: - - if args.tsout: - args.tsout.write(data) - args.tsout.close() - - if args.taout: - args.taout.write(test_asm) - args.taout.close() - - diff --git a/mc-sema/validator/x86/tests/AAA.asm b/mc-sema/validator/x86/tests/AAA.asm deleted file mode 100644 index f80088fdc..000000000 --- a/mc-sema/validator/x86/tests/AAA.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; AAA - mov al, 0x45 - add al, 0x23 - ;enable tracing - ;TEST_BEGIN_RECORDING - aaa - ;disable tracing - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/AAD8i8.asm b/mc-sema/validator/x86/tests/AAD8i8.asm deleted file mode 100644 index 7a20443a8..000000000 --- a/mc-sema/validator/x86/tests/AAD8i8.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF|FLAG_CF -;TEST_FILE_META_END - ; AAD8i8 - mov ax, 0x70 - ;TEST_BEGIN_RECORDING - aad 0xa - ;TEST_END_RECORDING - mov bl, 0x3 - div bl - diff --git a/mc-sema/validator/x86/tests/AAM8i8.asm b/mc-sema/validator/x86/tests/AAM8i8.asm deleted file mode 100644 index 154004aba..000000000 --- a/mc-sema/validator/x86/tests/AAM8i8.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF|FLAG_CF -;TEST_FILE_META_END - ; AAM8i8 - mov al, 0x22 - mov bl, 0x6 - ;TEST_BEGIN_RECORDING - aam 0xa - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/AAS.asm b/mc-sema/validator/x86/tests/AAS.asm deleted file mode 100644 index a049bac06..000000000 --- a/mc-sema/validator/x86/tests/AAS.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_PF -;TEST_FILE_META_END - ; AAS - mov al, 0x45 - sub al, 0x23 - ;TEST_BEGIN_RECORDING - aas - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ABS_F.asm b/mc-sema/validator/x86/tests/ABS_F.asm deleted file mode 100644 index 30dcd6b55..000000000 --- a/mc-sema/validator/x86/tests/ABS_F.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be -1 -lea edi, [esp-04] -mov dword [edi], 0xbf800000 -fld dword [edi] -;TEST_BEGIN_RECORDING -FABS -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ADC16i16.asm b/mc-sema/validator/x86/tests/ADC16i16.asm deleted file mode 100644 index 5fa2982b4..000000000 --- a/mc-sema/validator/x86/tests/ADC16i16.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADC16i16 - mov ax, 0x55 - ;TEST_BEGIN_RECORDING - adc ax, 0xeee - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ADC16ri.asm b/mc-sema/validator/x86/tests/ADC16ri.asm deleted file mode 100644 index 9ef6f2764..000000000 --- a/mc-sema/validator/x86/tests/ADC16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Adc16RI - mov ax, 0xf012 - ;TEST_BEGIN_RECORDING - adc ax, 0x1234 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ADC16rr.asm b/mc-sema/validator/x86/tests/ADC16rr.asm deleted file mode 100644 index f2c486c70..000000000 --- a/mc-sema/validator/x86/tests/ADC16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADC16rr - mov cx, 0xabc - mov dx, 0xdef - ;TEST_BEGIN_RECORDING - adc cx, dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ADC32i32.asm b/mc-sema/validator/x86/tests/ADC32i32.asm deleted file mode 100644 index 1bb46c545..000000000 --- a/mc-sema/validator/x86/tests/ADC32i32.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADC32i32 - mov eax, 0x778 - ;TEST_BEGIN_RECORDING - adc eax, 0x6fffffff - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ADC32ri.asm b/mc-sema/validator/x86/tests/ADC32ri.asm deleted file mode 100644 index 16311f78c..000000000 --- a/mc-sema/validator/x86/tests/ADC32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADC32ri - mov ebx, 0x6789 - ;TEST_BEGIN_RECORDING - adc ebx, 0x44444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ADC32rr.asm b/mc-sema/validator/x86/tests/ADC32rr.asm deleted file mode 100644 index d580b1f20..000000000 --- a/mc-sema/validator/x86/tests/ADC32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Adc32RR - mov eax, 0x1234abcd - mov edx, 0x2345bcde - ;TEST_BEGIN_RECORDING - adc eax, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ADC8i8.asm b/mc-sema/validator/x86/tests/ADC8i8.asm deleted file mode 100644 index 2d02b9f4b..000000000 --- a/mc-sema/validator/x86/tests/ADC8i8.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADC8i8 - mov al, 0xbb - ;TEST_BEGIN_RECORDING - adc al, 0x5 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ADC8ri.asm b/mc-sema/validator/x86/tests/ADC8ri.asm deleted file mode 100644 index e813c3137..000000000 --- a/mc-sema/validator/x86/tests/ADC8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADC8ri - mov ah, 0xaa - ;TEST_BEGIN_RECORDING - adc ah, 0x3 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ADC8rr.asm b/mc-sema/validator/x86/tests/ADC8rr.asm deleted file mode 100644 index 1c481abbe..000000000 --- a/mc-sema/validator/x86/tests/ADC8rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADC8rr - mov ch, 0xc - mov dh, 0x10 - ;TEST_BEGIN_RECORDING - adc ch, dh - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ADD16i16.asm b/mc-sema/validator/x86/tests/ADD16i16.asm deleted file mode 100644 index c48e06551..000000000 --- a/mc-sema/validator/x86/tests/ADD16i16.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADD16i16 - mov ax, 0x4 - ;TEST_BEGIN_RECORDING - add ax, 0xeeee - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ADD16ri.asm b/mc-sema/validator/x86/tests/ADD16ri.asm deleted file mode 100644 index 78061167b..000000000 --- a/mc-sema/validator/x86/tests/ADD16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADD16ri - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - add bx, 0x444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ADD16rm.asm b/mc-sema/validator/x86/tests/ADD16rm.asm deleted file mode 100644 index 2c0b47ade..000000000 --- a/mc-sema/validator/x86/tests/ADD16rm.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADD16rm - ;TEST_BEGIN_RECORDING - lea eax, [esp-0x10] - mov DWORD [eax], 0x1000 - mov bx, 0x2 - add bx, [eax] - mov eax, [eax] - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ADD16rr.asm b/mc-sema/validator/x86/tests/ADD16rr.asm deleted file mode 100644 index d2c79314e..000000000 --- a/mc-sema/validator/x86/tests/ADD16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADD16rr - mov cx, 0x4 - mov dx, 0x5 - ;TEST_BEGIN_RECORDING - add cx, dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ADD32i32.asm b/mc-sema/validator/x86/tests/ADD32i32.asm deleted file mode 100644 index 5d3e2132e..000000000 --- a/mc-sema/validator/x86/tests/ADD32i32.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADD32i32 - mov eax, 0x4 - ;TEST_BEGIN_RECORDING - add eax, 0x6fffffff - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ADD32mr.asm b/mc-sema/validator/x86/tests/ADD32mr.asm deleted file mode 100644 index e30c26677..000000000 --- a/mc-sema/validator/x86/tests/ADD32mr.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADD32mr - ;TEST_BEGIN_RECORDING - lea edi, [esp-0x4] - mov DWORD [edi], 0x8 - mov eax, 0x36 - add [edi], eax - mov eax, [edi] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ADD32ri.asm b/mc-sema/validator/x86/tests/ADD32ri.asm deleted file mode 100644 index d1ebf940f..000000000 --- a/mc-sema/validator/x86/tests/ADD32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Add32RI - mov eax, 0x2 - ;TEST_BEGIN_RECORDING - add eax, 0x11111 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ADD32rr.asm b/mc-sema/validator/x86/tests/ADD32rr.asm deleted file mode 100644 index 4a10cb2f3..000000000 --- a/mc-sema/validator/x86/tests/ADD32rr.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Add32RR - xor eax, eax - inc eax - mov eax, 0x1 - mov ebx, 0x2 - ;TEST_BEGIN_RECORDING - add eax, ebx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ADD8i8.asm b/mc-sema/validator/x86/tests/ADD8i8.asm deleted file mode 100644 index f1318c212..000000000 --- a/mc-sema/validator/x86/tests/ADD8i8.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADD8i8 - mov al, 0x4 - ;TEST_BEGIN_RECORDING - add al, 0x5 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ADD8ri.asm b/mc-sema/validator/x86/tests/ADD8ri.asm deleted file mode 100644 index 865c66429..000000000 --- a/mc-sema/validator/x86/tests/ADD8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADD8ri - mov ah, 0x20 - ;TEST_BEGIN_RECORDING - add ah, 0x3 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ADD8rr.asm b/mc-sema/validator/x86/tests/ADD8rr.asm deleted file mode 100644 index 5d9e232b1..000000000 --- a/mc-sema/validator/x86/tests/ADD8rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADD8rr - mov ch, 0x2 - mov dh, 0x3 - ;TEST_BEGIN_RECORDING - add ch, dh - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ADDSDrm.asm b/mc-sema/validator/x86/tests/ADDSDrm.asm deleted file mode 100644 index 827945bce..000000000 --- a/mc-sema/validator/x86/tests/ADDSDrm.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 1 to a double precision float and store in xmm0 -mov ecx, 1 -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -; load 2.5 (in double precision float form) -lea ecx, [esp-8] -mov DWORD [ecx], 0 -mov DWORD [ecx+4], 0x40040000 - -addsd xmm0, [ecx] -mov ecx, [ecx] -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/ADDSDrr.asm b/mc-sema/validator/x86/tests/ADDSDrr.asm deleted file mode 100644 index b1e07fe0f..000000000 --- a/mc-sema/validator/x86/tests/ADDSDrr.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 1 to a double precision float and store in xmm0 -mov ecx, 1 -cvtsi2sd xmm0, ecx - -; convert 2 to a double precision float and store in xmm1 -mov ecx, 2 -cvtsi2sd xmm1, ecx - -;TEST_BEGIN_RECORDING -addsd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/ADDSSrm.asm b/mc-sema/validator/x86/tests/ADDSSrm.asm deleted file mode 100644 index 495c72ce5..000000000 --- a/mc-sema/validator/x86/tests/ADDSSrm.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 1 to a double precision float and store in xmm0 -mov ecx, 1 -cvtsi2ss xmm0, ecx - -;TEST_BEGIN_RECORDING -; load 1.5 (in double precision float form) -lea ecx, [esp-4] -mov DWORD [ecx], 0x3fc00000 - -addss xmm0, [ecx] -mov ecx, [ecx] -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/ADDSSrr.asm b/mc-sema/validator/x86/tests/ADDSSrr.asm deleted file mode 100644 index 9023553de..000000000 --- a/mc-sema/validator/x86/tests/ADDSSrr.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 3 to a double precision float and store in xmm0 -mov ecx, 3 -cvtsi2ss xmm0, ecx - -; convert 1 to a double precision float and store in xmm1 -mov ecx, 1 -cvtsi2ss xmm1, ecx - -;TEST_BEGIN_RECORDING -addss xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/ADD_F32m.asm b/mc-sema/validator/x86/tests/ADD_F32m.asm deleted file mode 100644 index dd9dc47f2..000000000 --- a/mc-sema/validator/x86/tests/ADD_F32m.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -lea edi, [esp-04] -mov dword [edi], 0x40490fdb -fld dword [edi] -;TEST_BEGIN_RECORDING -lea edi, [esp-04] -mov dword [edi], 0x40490fdb -FADD dword [edi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ADD_F64m.asm b/mc-sema/validator/x86/tests/ADD_F64m.asm deleted file mode 100644 index 50fc18bcc..000000000 --- a/mc-sema/validator/x86/tests/ADD_F64m.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 1.0 -FLD1 -;TEST_BEGIN_RECORDING -lea edi, [esp-08] -; 3.1415926 or there about -mov dword [edi+00], 0x54442d18 -mov dword [edi+04], 0x400921fb -FADD qword [edi] -mov edi, 0 -;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/ADD_FST0r.asm b/mc-sema/validator/x86/tests/ADD_FST0r.asm deleted file mode 100644 index 109d08d89..000000000 --- a/mc-sema/validator/x86/tests/ADD_FST0r.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 and st1 to be pi -FLDPI -FLDPI -;TEST_BEGIN_RECORDING -FADD st0, st1 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ADD_FrST0.asm b/mc-sema/validator/x86/tests/ADD_FrST0.asm deleted file mode 100644 index a2b8e6729..000000000 --- a/mc-sema/validator/x86/tests/ADD_FrST0.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 and st1 to be pi -FLDPI -FLDPI -;TEST_BEGIN_RECORDING -FADD st1, st0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/AND16i16.asm b/mc-sema/validator/x86/tests/AND16i16.asm deleted file mode 100644 index 273305d1d..000000000 --- a/mc-sema/validator/x86/tests/AND16i16.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND16i16 - mov ax, 0x7 - ;TEST_BEGIN_RECORDING - and ax, 0xeeee - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/AND16mi.asm b/mc-sema/validator/x86/tests/AND16mi.asm deleted file mode 100644 index 5ae8269f9..000000000 --- a/mc-sema/validator/x86/tests/AND16mi.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND16mi - ;TEST_BEGIN_RECORDING - lea eax, [esp-0x4] - mov DWORD [eax], 0x44 - and WORD [eax], 0x44 - mov eax, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/AND16mr.asm b/mc-sema/validator/x86/tests/AND16mr.asm deleted file mode 100644 index f0aba0d81..000000000 --- a/mc-sema/validator/x86/tests/AND16mr.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND16mr - ;TEST_BEGIN_RECORDING - lea eax, [esp-0x4] - mov DWORD [eax], 0x5555 - mov ebx, 0x7777 - and WORD [eax], bx - mov eax, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/AND16ri.asm b/mc-sema/validator/x86/tests/AND16ri.asm deleted file mode 100644 index e637d2084..000000000 --- a/mc-sema/validator/x86/tests/AND16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND16ri - mov bx, 0x7 - ;TEST_BEGIN_RECORDING - and bx, 0x444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/AND16rr.asm b/mc-sema/validator/x86/tests/AND16rr.asm deleted file mode 100644 index 20effa9d6..000000000 --- a/mc-sema/validator/x86/tests/AND16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND16rr - mov cx, 0x0 - mov dx, 0x1 - ;TEST_BEGIN_RECORDING - and cx, dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/AND32i32.asm b/mc-sema/validator/x86/tests/AND32i32.asm deleted file mode 100644 index f70f67e4b..000000000 --- a/mc-sema/validator/x86/tests/AND32i32.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND32i32 - mov eax, 0x7 - ;TEST_BEGIN_RECORDING - and eax, 0x6fffffff - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/AND32mr.asm b/mc-sema/validator/x86/tests/AND32mr.asm deleted file mode 100644 index 3151a6890..000000000 --- a/mc-sema/validator/x86/tests/AND32mr.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND32mr - ;TEST_BEGIN_RECORDING - lea eax, [esp-0x4] - mov DWORD [eax], 0x55555 - mov ebx, 0x77777 - and DWORD [eax], ebx - mov eax, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/AND32ri.asm b/mc-sema/validator/x86/tests/AND32ri.asm deleted file mode 100644 index ec5c4049a..000000000 --- a/mc-sema/validator/x86/tests/AND32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND32ri - mov ebx, 0x7 - ;TEST_BEGIN_RECORDING - and ebx, 0x44444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/AND32rr.asm b/mc-sema/validator/x86/tests/AND32rr.asm deleted file mode 100644 index f10eaf8b5..000000000 --- a/mc-sema/validator/x86/tests/AND32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND32rr - mov ecx, 0x0 - mov edx, 0x1 - ;TEST_BEGIN_RECORDING - and ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/AND8i8.asm b/mc-sema/validator/x86/tests/AND8i8.asm deleted file mode 100644 index ef65e1bcc..000000000 --- a/mc-sema/validator/x86/tests/AND8i8.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND8i8 - mov al, 0xa - ;TEST_BEGIN_RECORDING - and al, 0x5 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/AND8mi.asm b/mc-sema/validator/x86/tests/AND8mi.asm deleted file mode 100644 index 76b596f0e..000000000 --- a/mc-sema/validator/x86/tests/AND8mi.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND8mi - ;TEST_BEGIN_RECORDING - lea ebx, [esp-0x4] - mov DWORD [ebx], 0x55 - and BYTE [ebx], 0x44 - mov ebx, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/AND8mr.asm b/mc-sema/validator/x86/tests/AND8mr.asm deleted file mode 100644 index 0ead0b08f..000000000 --- a/mc-sema/validator/x86/tests/AND8mr.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND8mr - ;TEST_BEGIN_RECORDING - lea eax, [esp-0x4] - mov DWORD [eax], 0x55 - mov ebx, 0x77 - and BYTE [eax], bl - mov eax, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/AND8ri.asm b/mc-sema/validator/x86/tests/AND8ri.asm deleted file mode 100644 index 05429a3b9..000000000 --- a/mc-sema/validator/x86/tests/AND8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND8ri - mov ah, 0xcd - ;TEST_BEGIN_RECORDING - and ah, 0x3 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/AND8rr.asm b/mc-sema/validator/x86/tests/AND8rr.asm deleted file mode 100644 index 9aeb309b6..000000000 --- a/mc-sema/validator/x86/tests/AND8rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND8rr - mov ch, 0xa - mov dh, 0xe8 - ;TEST_BEGIN_RECORDING - and ch, dh - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ANDNPDrr.asm b/mc-sema/validator/x86/tests/ANDNPDrr.asm deleted file mode 100644 index 404fde9cb..000000000 --- a/mc-sema/validator/x86/tests/ANDNPDrr.asm +++ /dev/null @@ -1,32 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x55555555 -mov DWORD [ecx+4], 0x14530451 -mov DWORD [ecx+8], 0x1badb002 -mov DWORD [ecx+12], 0xf0f0f0f0 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xaaaaaaaa -mov DWORD [ecx+4], 0xcafebabe -mov DWORD [ecx+8], 0x2badb002 -mov DWORD [ecx+12], 0x0e0e0e0e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -andnpd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/ANDNPSrr.asm b/mc-sema/validator/x86/tests/ANDNPSrr.asm deleted file mode 100644 index 6dfe1f7b8..000000000 --- a/mc-sema/validator/x86/tests/ANDNPSrr.asm +++ /dev/null @@ -1,34 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x55555555 -mov DWORD [ecx+4], 0x14530451 -mov DWORD [ecx+8], 0x1badb002 -mov DWORD [ecx+12], 0xf0f0f0f0 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xaaaaaaaa -mov DWORD [ecx+4], 0xcafebabe -mov DWORD [ecx+8], 0x2badb002 -mov DWORD [ecx+12], 0x0e0e0e0e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -andnps xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - - diff --git a/mc-sema/validator/x86/tests/ANDPDrr.asm b/mc-sema/validator/x86/tests/ANDPDrr.asm deleted file mode 100644 index b2997fb44..000000000 --- a/mc-sema/validator/x86/tests/ANDPDrr.asm +++ /dev/null @@ -1,32 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x55555555 -mov DWORD [ecx+4], 0x14530451 -mov DWORD [ecx+8], 0x1badb002 -mov DWORD [ecx+12], 0xf0f0f0f0 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xaaaaaaaa -mov DWORD [ecx+4], 0xcafebabe -mov DWORD [ecx+8], 0x2badb002 -mov DWORD [ecx+12], 0x0e0e0e0e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -andpd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/ANDPSrr.asm b/mc-sema/validator/x86/tests/ANDPSrr.asm deleted file mode 100644 index 05ed667f1..000000000 --- a/mc-sema/validator/x86/tests/ANDPSrr.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x55555555 -mov DWORD [ecx+4], 0x14530451 -mov DWORD [ecx+8], 0x1badb002 -mov DWORD [ecx+12], 0xf0f0f0f0 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xaaaaaaaa -mov DWORD [ecx+4], 0xcafebabe -mov DWORD [ecx+8], 0x2badb002 -mov DWORD [ecx+12], 0x0e0e0e0e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -andps xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/BSF32rm.asm b/mc-sema/validator/x86/tests/BSF32rm.asm deleted file mode 100644 index f004d0af9..000000000 --- a/mc-sema/validator/x86/tests/BSF32rm.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_CF|FLAG_OF|FLAG_SF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - lea ecx, [esp-0x20] - mov dword [ecx], 0x114400 - bsf eax, [ecx] - mov ecx, 0 - ;TEST_END_RECORDING - - - diff --git a/mc-sema/validator/x86/tests/BSF32rr.asm b/mc-sema/validator/x86/tests/BSF32rr.asm deleted file mode 100644 index 93cbc43fc..000000000 --- a/mc-sema/validator/x86/tests/BSF32rr.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_CF|FLAG_OF|FLAG_SF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - mov edi, 0x114400 - bsf eax, edi - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86/tests/BSR16rr.asm b/mc-sema/validator/x86/tests/BSR16rr.asm deleted file mode 100644 index 253bd8094..000000000 --- a/mc-sema/validator/x86/tests/BSR16rr.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_CF|FLAG_OF|FLAG_PF|FLAG_SF|FLAG_AF -;TEST_FILE_META_END - ; BSR16rr - mov ax, 0x0800 - ;TEST_BEGIN_RECORDING - bsr bx, ax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/BSR32rr.asm b/mc-sema/validator/x86/tests/BSR32rr.asm deleted file mode 100644 index 5d3968785..000000000 --- a/mc-sema/validator/x86/tests/BSR32rr.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_CF|FLAG_OF|FLAG_PF|FLAG_SF|FLAG_AF -;TEST_FILE_META_END - ; BSR32rr - mov eax, 0x08000000 - ;TEST_BEGIN_RECORDING - bsr ebx, eax - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/BSR32rr_2.asm b/mc-sema/validator/x86/tests/BSR32rr_2.asm deleted file mode 100644 index 113918a8f..000000000 --- a/mc-sema/validator/x86/tests/BSR32rr_2.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_CF|FLAG_OF|FLAG_PF|FLAG_SF|FLAG_AF -;TEST_FILE_META_END - ; BSR32rr; test special case zero source op - mov eax, 0x00000000 - ;TEST_BEGIN_RECORDING - bsr ebx, eax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/BSWAP32r.asm b/mc-sema/validator/x86/tests/BSWAP32r.asm deleted file mode 100644 index cedee8549..000000000 --- a/mc-sema/validator/x86/tests/BSWAP32r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Bswap32R - mov eax, 0x56781234 - ;TEST_BEGIN_RECORDING - bswap eax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/BT16rr.asm b/mc-sema/validator/x86/tests/BT16rr.asm deleted file mode 100644 index 37cccfb29..000000000 --- a/mc-sema/validator/x86/tests/BT16rr.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_PF|FLAG_SF|FLAG_AF -;TEST_FILE_META_END - ; BT16rr - mov ax, 0x0800 - mov bx, 11 - clc ; clear carry since we will set it - ;TEST_BEGIN_RECORDING - bt ax, bx - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86/tests/BT32rr.asm b/mc-sema/validator/x86/tests/BT32rr.asm deleted file mode 100644 index a5f2ff4c6..000000000 --- a/mc-sema/validator/x86/tests/BT32rr.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_PF|FLAG_SF|FLAG_AF -;TEST_FILE_META_END - ; BT32rr - mov eax, 0x08000000 - mov ebx, 27 - clc ; clear carry since we will set it - ;TEST_BEGIN_RECORDING - bt eax, ebx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CDQ.asm b/mc-sema/validator/x86/tests/CDQ.asm deleted file mode 100644 index 40cf71498..000000000 --- a/mc-sema/validator/x86/tests/CDQ.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CDQ - ;TEST_BEGIN_RECORDING - MOV eax, 0x819EDB32 - MOV edx, 0 - cdq - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CLC.asm b/mc-sema/validator/x86/tests/CLC.asm deleted file mode 100644 index 521415611..000000000 --- a/mc-sema/validator/x86/tests/CLC.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Clc - ;TEST_BEGIN_RECORDING - clc - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CLD.asm b/mc-sema/validator/x86/tests/CLD.asm deleted file mode 100644 index a21c6fb66..000000000 --- a/mc-sema/validator/x86/tests/CLD.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Cld - ;TEST_BEGIN_RECORDING - cld - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVA16rr.asm b/mc-sema/validator/x86/tests/CMOVA16rr.asm deleted file mode 100644 index 349784568..000000000 --- a/mc-sema/validator/x86/tests/CMOVA16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Cmova16RR - mov ax, 0x33 - mov dx, 0x44 - ;TEST_BEGIN_RECORDING - cmova ax, dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVA32rm.asm b/mc-sema/validator/x86/tests/CMOVA32rm.asm deleted file mode 100644 index 73d76b176..000000000 --- a/mc-sema/validator/x86/tests/CMOVA32rm.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVA32rm - ;TEST_BEGIN_RECORDING - lea edi, [esp-0x4] - mov DWORD [edi], 0x3 - cmova eax, [edi] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVA32rr.asm b/mc-sema/validator/x86/tests/CMOVA32rr.asm deleted file mode 100644 index 3ba0136f1..000000000 --- a/mc-sema/validator/x86/tests/CMOVA32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Cmova32RR - mov eax, 0x3333 - mov ecx, 0x4444 - ;TEST_BEGIN_RECORDING - cmova eax, ecx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVAE16rr.asm b/mc-sema/validator/x86/tests/CMOVAE16rr.asm deleted file mode 100644 index 883519078..000000000 --- a/mc-sema/validator/x86/tests/CMOVAE16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVAE16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovae ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVAE32rr.asm b/mc-sema/validator/x86/tests/CMOVAE32rr.asm deleted file mode 100644 index 85a61d85d..000000000 --- a/mc-sema/validator/x86/tests/CMOVAE32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVAE32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovae ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVB16rr.asm b/mc-sema/validator/x86/tests/CMOVB16rr.asm deleted file mode 100644 index a401f2c39..000000000 --- a/mc-sema/validator/x86/tests/CMOVB16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVB16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovb ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVB32rr.asm b/mc-sema/validator/x86/tests/CMOVB32rr.asm deleted file mode 100644 index 2b99ce939..000000000 --- a/mc-sema/validator/x86/tests/CMOVB32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVB32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovb ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVBE16rr.asm b/mc-sema/validator/x86/tests/CMOVBE16rr.asm deleted file mode 100644 index e4c0592cb..000000000 --- a/mc-sema/validator/x86/tests/CMOVBE16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVBE16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovbe ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVBE32rr.asm b/mc-sema/validator/x86/tests/CMOVBE32rr.asm deleted file mode 100644 index 191cc3fd3..000000000 --- a/mc-sema/validator/x86/tests/CMOVBE32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVBE32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovbe ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVE16rr.asm b/mc-sema/validator/x86/tests/CMOVE16rr.asm deleted file mode 100644 index a3637b14b..000000000 --- a/mc-sema/validator/x86/tests/CMOVE16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVE16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmove ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVE32rr.asm b/mc-sema/validator/x86/tests/CMOVE32rr.asm deleted file mode 100644 index 46e5c8715..000000000 --- a/mc-sema/validator/x86/tests/CMOVE32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVE32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmove ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVG16rr.asm b/mc-sema/validator/x86/tests/CMOVG16rr.asm deleted file mode 100644 index aeca0bfda..000000000 --- a/mc-sema/validator/x86/tests/CMOVG16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVG16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovg ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVG32rr.asm b/mc-sema/validator/x86/tests/CMOVG32rr.asm deleted file mode 100644 index cde0abffd..000000000 --- a/mc-sema/validator/x86/tests/CMOVG32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVG32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovg ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVGE16rr.asm b/mc-sema/validator/x86/tests/CMOVGE16rr.asm deleted file mode 100644 index 523fae009..000000000 --- a/mc-sema/validator/x86/tests/CMOVGE16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVGE16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovge ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVGE32rr.asm b/mc-sema/validator/x86/tests/CMOVGE32rr.asm deleted file mode 100644 index db5e0386e..000000000 --- a/mc-sema/validator/x86/tests/CMOVGE32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVGE32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovge ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVL16rr.asm b/mc-sema/validator/x86/tests/CMOVL16rr.asm deleted file mode 100644 index e118cf6da..000000000 --- a/mc-sema/validator/x86/tests/CMOVL16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVL16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovl ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVL32rr.asm b/mc-sema/validator/x86/tests/CMOVL32rr.asm deleted file mode 100644 index e3cab6ff0..000000000 --- a/mc-sema/validator/x86/tests/CMOVL32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVL32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovl ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVLE16rr.asm b/mc-sema/validator/x86/tests/CMOVLE16rr.asm deleted file mode 100644 index d34dbae4a..000000000 --- a/mc-sema/validator/x86/tests/CMOVLE16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVLE16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovle ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVLE32rr.asm b/mc-sema/validator/x86/tests/CMOVLE32rr.asm deleted file mode 100644 index 898556bb4..000000000 --- a/mc-sema/validator/x86/tests/CMOVLE32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVLE32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovle ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVNE16rr.asm b/mc-sema/validator/x86/tests/CMOVNE16rr.asm deleted file mode 100644 index a54689f8c..000000000 --- a/mc-sema/validator/x86/tests/CMOVNE16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVNE16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovne ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVNE32rr.asm b/mc-sema/validator/x86/tests/CMOVNE32rr.asm deleted file mode 100644 index 730331050..000000000 --- a/mc-sema/validator/x86/tests/CMOVNE32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVNE32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovne ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVNO16rr.asm b/mc-sema/validator/x86/tests/CMOVNO16rr.asm deleted file mode 100644 index ee6d6b260..000000000 --- a/mc-sema/validator/x86/tests/CMOVNO16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVNO16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovno ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVNO32rr.asm b/mc-sema/validator/x86/tests/CMOVNO32rr.asm deleted file mode 100644 index e41ae57d1..000000000 --- a/mc-sema/validator/x86/tests/CMOVNO32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVNO32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovno ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVNP16rr.asm b/mc-sema/validator/x86/tests/CMOVNP16rr.asm deleted file mode 100644 index 486a1e0d6..000000000 --- a/mc-sema/validator/x86/tests/CMOVNP16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVNP16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovnp ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVNP32rr.asm b/mc-sema/validator/x86/tests/CMOVNP32rr.asm deleted file mode 100644 index afe162f67..000000000 --- a/mc-sema/validator/x86/tests/CMOVNP32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVNP32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovnp ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVNS16rr.asm b/mc-sema/validator/x86/tests/CMOVNS16rr.asm deleted file mode 100644 index d205bc228..000000000 --- a/mc-sema/validator/x86/tests/CMOVNS16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVNS16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovns ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVNS32rr.asm b/mc-sema/validator/x86/tests/CMOVNS32rr.asm deleted file mode 100644 index 5cb40c9ae..000000000 --- a/mc-sema/validator/x86/tests/CMOVNS32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVNS32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovns ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVO16rr.asm b/mc-sema/validator/x86/tests/CMOVO16rr.asm deleted file mode 100644 index 47d3993f3..000000000 --- a/mc-sema/validator/x86/tests/CMOVO16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVO16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovo ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVO32rr.asm b/mc-sema/validator/x86/tests/CMOVO32rr.asm deleted file mode 100644 index 229727a2c..000000000 --- a/mc-sema/validator/x86/tests/CMOVO32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVO32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovo ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVP16rr.asm b/mc-sema/validator/x86/tests/CMOVP16rr.asm deleted file mode 100644 index 3c90ad241..000000000 --- a/mc-sema/validator/x86/tests/CMOVP16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVP16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovp ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVP32rr.asm b/mc-sema/validator/x86/tests/CMOVP32rr.asm deleted file mode 100644 index b60b45008..000000000 --- a/mc-sema/validator/x86/tests/CMOVP32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVP32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovp ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVS16rr.asm b/mc-sema/validator/x86/tests/CMOVS16rr.asm deleted file mode 100644 index 0f2d9a78e..000000000 --- a/mc-sema/validator/x86/tests/CMOVS16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVS16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovs ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMOVS32rr.asm b/mc-sema/validator/x86/tests/CMOVS32rr.asm deleted file mode 100644 index 3f02e4808..000000000 --- a/mc-sema/validator/x86/tests/CMOVS32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVS32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovs ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMP16mi.asm b/mc-sema/validator/x86/tests/CMP16mi.asm deleted file mode 100644 index bcd96be08..000000000 --- a/mc-sema/validator/x86/tests/CMP16mi.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMP16mi - ;TEST_BEGIN_RECORDING - lea eax, [esp-0x4] - mov DWORD [eax], 0x200 - cmp WORD [eax], 0x222 - mov eax, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMP16rr.asm b/mc-sema/validator/x86/tests/CMP16rr.asm deleted file mode 100644 index 42cf01f21..000000000 --- a/mc-sema/validator/x86/tests/CMP16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMP16rr - mov cx, 0x4 - mov dx, 0x7 - ;TEST_BEGIN_RECORDING - cmp cx, dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMP32i32.asm b/mc-sema/validator/x86/tests/CMP32i32.asm deleted file mode 100644 index 72094eeff..000000000 --- a/mc-sema/validator/x86/tests/CMP32i32.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMP32i32 - mov eax, 0x6ffffffe - ;TEST_BEGIN_RECORDING - cmp eax, 0x6fffffff - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMP32ri.asm b/mc-sema/validator/x86/tests/CMP32ri.asm deleted file mode 100644 index b4d1a5dd7..000000000 --- a/mc-sema/validator/x86/tests/CMP32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMP32ri - mov ebx, 0x44 - ;TEST_BEGIN_RECORDING - cmp ebx, 0x44444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMP32rr.asm b/mc-sema/validator/x86/tests/CMP32rr.asm deleted file mode 100644 index 69ec9468f..000000000 --- a/mc-sema/validator/x86/tests/CMP32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMP32rr - mov ecx, 0x4 - mov edx, 0x2 - ;TEST_BEGIN_RECORDING - cmp ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMP8rr.asm b/mc-sema/validator/x86/tests/CMP8rr.asm deleted file mode 100644 index 22d94cf96..000000000 --- a/mc-sema/validator/x86/tests/CMP8rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMP8rr - mov ch, 0x2 - mov dh, 0x3 - ;TEST_BEGIN_RECORDING - cmp ch, dh - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMPXCHG16r.asm b/mc-sema/validator/x86/tests/CMPXCHG16r.asm deleted file mode 100644 index f08d6ff91..000000000 --- a/mc-sema/validator/x86/tests/CMPXCHG16r.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMPXCHG16r - mov bx, 0x667 - mov bp, 0x888 - ;TEST_BEGIN_RECORDING - cmpxchg bx, bp - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMPXCHG32rm.asm b/mc-sema/validator/x86/tests/CMPXCHG32rm.asm deleted file mode 100644 index 5ff6dec1b..000000000 --- a/mc-sema/validator/x86/tests/CMPXCHG32rm.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMPXCHG32rm - ;TEST_BEGIN_RECORDING - lea edi, [esp-0x10] - mov DWORD [edi], 0xabcd4321 - mov eax, 0xabcd4321 - cmpxchg [edi], ecx - mov edx, [edi] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMPXCHG32rm2.asm b/mc-sema/validator/x86/tests/CMPXCHG32rm2.asm deleted file mode 100644 index 1d6af348d..000000000 --- a/mc-sema/validator/x86/tests/CMPXCHG32rm2.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMPXCHG32rm - ;TEST_BEGIN_RECORDING - lea edi, [esp-0x10] - mov DWORD [edi], 0xbadf00d - mov ecx, 0 - mov eax, 0xabcd4321 - cmpxchg [edi], ecx - mov edx, [edi] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMPXCHG32rr.asm b/mc-sema/validator/x86/tests/CMPXCHG32rr.asm deleted file mode 100644 index 210f5613e..000000000 --- a/mc-sema/validator/x86/tests/CMPXCHG32rr.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Cmpxchg32RR - mov eax, 0x68244256 - mov edx, 0x54316785 - mov ecx, 0x23423423 - ;TEST_BEGIN_RECORDING - cmpxchg edx, ecx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CMPXCHG8rr.asm b/mc-sema/validator/x86/tests/CMPXCHG8rr.asm deleted file mode 100644 index abba7e745..000000000 --- a/mc-sema/validator/x86/tests/CMPXCHG8rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMPXCHG8rr - mov bh, 0x66 - mov ch, 0x88 - ;TEST_BEGIN_RECORDING - cmpxchg bh, ch - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/CVTSD2SSrm.asm b/mc-sema/validator/x86/tests/CVTSD2SSrm.asm deleted file mode 100644 index 26c040e2b..000000000 --- a/mc-sema/validator/x86/tests/CVTSD2SSrm.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -lea ecx, [esp-8] -movsd [ecx], xmm0 -cvtsd2ss xmm1, [ecx] -mov eax, 0 -mov ecx, 2 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/CVTSD2SSrr.asm b/mc-sema/validator/x86/tests/CVTSD2SSrr.asm deleted file mode 100644 index 9bb36f780..000000000 --- a/mc-sema/validator/x86/tests/CVTSD2SSrr.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -cvtsd2ss xmm1, xmm0 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/CVTSI2SDrm.asm b/mc-sema/validator/x86/tests/CVTSI2SDrm.asm deleted file mode 100644 index 351c7e10b..000000000 --- a/mc-sema/validator/x86/tests/CVTSI2SDrm.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into eax for future load into xmm0 -mov eax, 2 - -;TEST_BEGIN_RECORDING -lea ecx, [esp-4] -mov [ecx], eax -cvtsi2sd xmm0, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/CVTSI2SDrr.asm b/mc-sema/validator/x86/tests/CVTSI2SDrr.asm deleted file mode 100644 index 6c268b544..000000000 --- a/mc-sema/validator/x86/tests/CVTSI2SDrr.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 - -;TEST_BEGIN_RECORDING -cvtsi2sd xmm0, ecx -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/CVTSI2SSrm.asm b/mc-sema/validator/x86/tests/CVTSI2SSrm.asm deleted file mode 100644 index da6d13b0d..000000000 --- a/mc-sema/validator/x86/tests/CVTSI2SSrm.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into eax for future load into xmm0 -mov eax, 2 - -;TEST_BEGIN_RECORDING -lea ecx, [esp-4] -mov [ecx], eax -cvtsi2ss xmm0, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/CVTSI2SSrr.asm b/mc-sema/validator/x86/tests/CVTSI2SSrr.asm deleted file mode 100644 index 27d9af440..000000000 --- a/mc-sema/validator/x86/tests/CVTSI2SSrr.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 - -;TEST_BEGIN_RECORDING -cvtsi2ss xmm0, ecx -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2ss xmm0, ecx diff --git a/mc-sema/validator/x86/tests/CVTSS2SDrm.asm b/mc-sema/validator/x86/tests/CVTSS2SDrm.asm deleted file mode 100644 index 00c734267..000000000 --- a/mc-sema/validator/x86/tests/CVTSS2SDrm.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-4] -mov DWORD [ecx], 0x3fc00000 - -cvtss2sd xmm0, [ecx] - -mov ecx, [ecx] -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/CVTSS2SDrr.asm b/mc-sema/validator/x86/tests/CVTSS2SDrr.asm deleted file mode 100644 index 8adf9b2c2..000000000 --- a/mc-sema/validator/x86/tests/CVTSS2SDrr.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -cvtss2sd xmm1, xmm0 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/CVTTPS2DQrm.asm b/mc-sema/validator/x86/tests/CVTTPS2DQrm.asm deleted file mode 100644 index 6038bde77..000000000 --- a/mc-sema/validator/x86/tests/CVTTPS2DQrm.asm +++ /dev/null @@ -1,20 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -mov ecx, 0 -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x20] -and ecx, 0xFFFFFFF0 -mov dword [ecx+0x0], 0x023490 -mov dword [ecx+0x4], 0x023490 -mov dword [ecx+0x8], 0x033490 -mov dword [ecx+0xc], 0x000010 -cvttps2dq xmm1, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2ss xmm0, ecx diff --git a/mc-sema/validator/x86/tests/CVTTPS2DQrr.asm b/mc-sema/validator/x86/tests/CVTTPS2DQrr.asm deleted file mode 100644 index 4fe717eb3..000000000 --- a/mc-sema/validator/x86/tests/CVTTPS2DQrr.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 0x223e2081 -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -cvttps2dq xmm1, xmm0 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/CVTTSD2SIrm.asm b/mc-sema/validator/x86/tests/CVTTSD2SIrm.asm deleted file mode 100644 index 4d1c0a39f..000000000 --- a/mc-sema/validator/x86/tests/CVTTSD2SIrm.asm +++ /dev/null @@ -1,18 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -lea ecx, [esp-8] -movsd [ecx], xmm0 -cvttsd2si ecx, [ecx] -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/CVTTSD2SIrr.asm b/mc-sema/validator/x86/tests/CVTTSD2SIrr.asm deleted file mode 100644 index e6642180f..000000000 --- a/mc-sema/validator/x86/tests/CVTTSD2SIrr.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -cvttsd2si ecx, xmm0 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/CVTTSS2SIrm.asm b/mc-sema/validator/x86/tests/CVTTSS2SIrm.asm deleted file mode 100644 index caca7ccd0..000000000 --- a/mc-sema/validator/x86/tests/CVTTSS2SIrm.asm +++ /dev/null @@ -1,18 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 -cvtsi2ss xmm0, ecx - -;TEST_BEGIN_RECORDING -lea ecx, [esp-8] -movss [ecx], xmm0 -cvttss2si ecx, [ecx] -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2ss xmm0, ecx diff --git a/mc-sema/validator/x86/tests/CVTTSS2SIrr.asm b/mc-sema/validator/x86/tests/CVTTSS2SIrr.asm deleted file mode 100644 index 080a6d1f9..000000000 --- a/mc-sema/validator/x86/tests/CVTTSS2SIrr.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 -cvtsi2ss xmm0, ecx - -;TEST_BEGIN_RECORDING -cvttss2si ecx, xmm0 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/Cmp32RR1.asm b/mc-sema/validator/x86/tests/Cmp32RR1.asm deleted file mode 100644 index a27d5b705..000000000 --- a/mc-sema/validator/x86/tests/Cmp32RR1.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Cmp32RR1 - mov eax, 0x4 - mov ebx, 0x2 - ;TEST_BEGIN_RECORDING - cmp eax, ebx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/Cmp32RR2.asm b/mc-sema/validator/x86/tests/Cmp32RR2.asm deleted file mode 100644 index 50bd78599..000000000 --- a/mc-sema/validator/x86/tests/Cmp32RR2.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Cmp32RR2 - mov eax, 0x17 - mov ebx, 0x3 - ;TEST_BEGIN_RECORDING - cmp eax, ebx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/Cmpxch16RR.asm b/mc-sema/validator/x86/tests/Cmpxch16RR.asm deleted file mode 100644 index a6efd8c08..000000000 --- a/mc-sema/validator/x86/tests/Cmpxch16RR.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Cmpxch16RR - mov ax, 0x6824 - mov dx, 0x6824 - mov cx, 0x1479 - ;TEST_BEGIN_RECORDING - cmpxchg dx, cx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/Composite1.asm b/mc-sema/validator/x86/tests/Composite1.asm deleted file mode 100644 index d67cdc2ca..000000000 --- a/mc-sema/validator/x86/tests/Composite1.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Composite1 - mov eax, 0x18 - ;TEST_BEGIN_RECORDING - mov ecx, eax - xor eax, eax - xor ebx, ebx - cmp ebx, ecx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/Composite2.asm b/mc-sema/validator/x86/tests/Composite2.asm deleted file mode 100644 index d1401e9ef..000000000 --- a/mc-sema/validator/x86/tests/Composite2.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Composite2 - mov ecx, 0x18 - xor ebx, ebx - xor eax, eax - inc eax - ;TEST_BEGIN_RECORDING -again: - cmp ebx, ecx - je done - inc ebx - add eax, eax - jmp again -done: - inc eax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/DEC16r.asm b/mc-sema/validator/x86/tests/DEC16r.asm deleted file mode 100644 index 163467d26..000000000 --- a/mc-sema/validator/x86/tests/DEC16r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; DEC16r - mov dx, 0x30 - ;TEST_BEGIN_RECORDING - dec dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/DEC32r.asm b/mc-sema/validator/x86/tests/DEC32r.asm deleted file mode 100644 index 9f844a4d4..000000000 --- a/mc-sema/validator/x86/tests/DEC32r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; DEC32r - mov eax, 0x31 - ;TEST_BEGIN_RECORDING - dec eax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/DEC8r.asm b/mc-sema/validator/x86/tests/DEC8r.asm deleted file mode 100644 index 23e884ffe..000000000 --- a/mc-sema/validator/x86/tests/DEC8r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; DEC8r - mov cl, 0x32 - ;TEST_BEGIN_RECORDING - dec cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/DIV32r.asm b/mc-sema/validator/x86/tests/DIV32r.asm deleted file mode 100644 index 2439398e0..000000000 --- a/mc-sema/validator/x86/tests/DIV32r.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_CF|FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; DIV32r - ;TEST_BEGIN_RECORDING - mov edx, 0x0 - mov eax, 0x100 - mov ebx, 10 - div ebx - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/DIV32r2.asm b/mc-sema/validator/x86/tests/DIV32r2.asm deleted file mode 100644 index d478682a1..000000000 --- a/mc-sema/validator/x86/tests/DIV32r2.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_CF|FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; DIV32r - ;TEST_BEGIN_RECORDING - mov edx, 0 - mov eax, 0xaabbccdd - mov ebx, 10 - div ebx - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/DIVSDrm.asm b/mc-sema/validator/x86/tests/DIVSDrm.asm deleted file mode 100644 index bdb5c656a..000000000 --- a/mc-sema/validator/x86/tests/DIVSDrm.asm +++ /dev/null @@ -1,23 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 10 to a double precision float and store in xmm0 -mov ecx, 10 -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -; load 2.5 (in double precision float form) -lea ecx, [esp-8] -mov DWORD [ecx], 0 -mov DWORD [ecx+4], 0x40040000 - -divsd xmm0, [ecx] -mov ecx, [ecx] -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx - diff --git a/mc-sema/validator/x86/tests/DIVSDrr.asm b/mc-sema/validator/x86/tests/DIVSDrr.asm deleted file mode 100644 index 3b94b14b7..000000000 --- a/mc-sema/validator/x86/tests/DIVSDrr.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 3 to a double precision float and store in xmm0 -mov ecx, 3 -cvtsi2sd xmm0, ecx - -; convert 7 to a double precision float and store in xmm1 -mov ecx, 7 -cvtsi2sd xmm1, ecx - -;TEST_BEGIN_RECORDING -divsd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/DIVSSrm.asm b/mc-sema/validator/x86/tests/DIVSSrm.asm deleted file mode 100644 index 822c6685e..000000000 --- a/mc-sema/validator/x86/tests/DIVSSrm.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 7 to a double precision float and store in xmm0 -mov ecx, 7 -cvtsi2ss xmm0, ecx - -;TEST_BEGIN_RECORDING -; load 1.5 (in double precision float form) -lea ecx, [esp-4] -mov DWORD [ecx], 0x3fc00000 - -divss xmm0, [ecx] -mov ecx, [ecx] -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx - diff --git a/mc-sema/validator/x86/tests/DIVSSrr.asm b/mc-sema/validator/x86/tests/DIVSSrr.asm deleted file mode 100644 index bdc97bd45..000000000 --- a/mc-sema/validator/x86/tests/DIVSSrr.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 3 to a double precision float and store in xmm0 -mov ecx, 3 -cvtsi2ss xmm0, ecx - -; convert 2 to a double precision float and store in xmm1 -mov ecx, 2 -cvtsi2ss xmm1, ecx - -;TEST_BEGIN_RECORDING -divss xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/DIV_F32m.asm b/mc-sema/validator/x86/tests/DIV_F32m.asm deleted file mode 100644 index 32401a340..000000000 --- a/mc-sema/validator/x86/tests/DIV_F32m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLD1 -;TEST_BEGIN_RECORDING -lea edi, [esp-08] -FSTP dword [edi] -FDIV dword [edi] -mov edi, 0 -;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/DIV_F64m.asm b/mc-sema/validator/x86/tests/DIV_F64m.asm deleted file mode 100644 index 9f2eb0f7f..000000000 --- a/mc-sema/validator/x86/tests/DIV_F64m.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLD1 -;TEST_BEGIN_RECORDING -lea edi, [esp-08] -FSTP qword [edi] -FDIV qword [edi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/DIV_FrST0.asm b/mc-sema/validator/x86/tests/DIV_FrST0.asm deleted file mode 100644 index f3c8a1af9..000000000 --- a/mc-sema/validator/x86/tests/DIV_FrST0.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLD1 -FLD1 -;TEST_BEGIN_RECORDING -FDIV st2, st0 -mov edi, 0 -;TEST_END_RECORDING - - - diff --git a/mc-sema/validator/x86/tests/DIV_PFrST0.asm b/mc-sema/validator/x86/tests/DIV_PFrST0.asm deleted file mode 100644 index faa7179e2..000000000 --- a/mc-sema/validator/x86/tests/DIV_PFrST0.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLD1 -FLD1 -;TEST_BEGIN_RECORDING -FDIVP st2, st0 -mov edi, 0 -;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/DIV_ST0Fr.asm b/mc-sema/validator/x86/tests/DIV_ST0Fr.asm deleted file mode 100644 index cd2c796e7..000000000 --- a/mc-sema/validator/x86/tests/DIV_ST0Fr.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLD1 -FLDPI -;TEST_BEGIN_RECORDING -FDIV st0, st1 -mov edi, 0 -;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86/tests/ENTER.asm b/mc-sema/validator/x86/tests/ENTER.asm deleted file mode 100644 index e0803cac4..000000000 --- a/mc-sema/validator/x86/tests/ENTER.asm +++ /dev/null @@ -1,18 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ENTER - mov eax, esp - mov edi, ebp - mov ebx, esp - sub ebx, 0x4 - ;TEST_BEGIN_RECORDING - enter 0x4, 0x0 - cmp ebp, ebx - mov ebp, 0x0 - ;TEST_END_RECORDING - mov esp, eax - mov ebp, edi - diff --git a/mc-sema/validator/x86/tests/F2XM1.asm b/mc-sema/validator/x86/tests/F2XM1.asm deleted file mode 100644 index 17a1fc956..000000000 --- a/mc-sema/validator/x86/tests/F2XM1.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 1/2 -lea edi, [esp-04] -mov dword [edi], 0x3f000000 -fld dword [edi] -;TEST_BEGIN_RECORDING -f2xm1 -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FABS.asm b/mc-sema/validator/x86/tests/FABS.asm deleted file mode 100644 index 0da82f29b..000000000 --- a/mc-sema/validator/x86/tests/FABS.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; FADDP - lea edi, [esp-0x8] - ; load -1.25 in st0 - mov DWORD [edi], 0xbfa00000 - fld DWORD [edi] - ;TEST_BEGIN_RECORDING - fabs - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FADDP.asm b/mc-sema/validator/x86/tests/FADDP.asm deleted file mode 100644 index b6466d28a..000000000 --- a/mc-sema/validator/x86/tests/FADDP.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; FADDP - lea edi, [esp-0x10] - mov DWORD [edi], 0x2168c000 - mov DWORD [edi+0x4], 0xc90fdaa2 - mov DWORD [edi+0x8], 0x00004000 - fld TWORD [edi] - fld TWORD [edi] - ;TEST_BEGIN_RECORDING - faddp - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FADDP_rST0.asm b/mc-sema/validator/x86/tests/FADDP_rST0.asm deleted file mode 100644 index f61acd0be..000000000 --- a/mc-sema/validator/x86/tests/FADDP_rST0.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; FADDP - FLDPI - FLDPI - FLDPI - ;TEST_BEGIN_RECORDING - faddp st2, st0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FBLD.asm b/mc-sema/validator/x86/tests/FBLD.asm deleted file mode 100644 index 7a3880fdf..000000000 --- a/mc-sema/validator/x86/tests/FBLD.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea edi, [esp-0x10] -mov dword [edi], 0x12345678 -mov dword [edi+04], 0x12345678 -mov dword [edi+08], 0x00001234 -FBLD tword [edi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FBSTP.asm b/mc-sema/validator/x86/tests/FBSTP.asm deleted file mode 100644 index a68e023ae..000000000 --- a/mc-sema/validator/x86/tests/FBSTP.asm +++ /dev/null @@ -1,20 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -FLDPI -;TEST_BEGIN_RECORDING -lea edi, [esp-0x10] -mov dword [edi+00], 0x0 -mov dword [edi+04], 0x0 -mov dword [edi+08], 0x0 -FBSTP tword [edi] -mov eax, [edi+00] -mov ebx, [edi+04] -mov ecx, [edi+08] -mov edi, 0 - -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FCHS.asm b/mc-sema/validator/x86/tests/FCHS.asm deleted file mode 100644 index d43bd125e..000000000 --- a/mc-sema/validator/x86/tests/FCHS.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -FLDPI -;TEST_BEGIN_RECORDING -FCHS -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FCLEX.asm b/mc-sema/validator/x86/tests/FCLEX.asm deleted file mode 100644 index 548c39485..000000000 --- a/mc-sema/validator/x86/tests/FCLEX.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -FCLEX -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FCMOVB.asm b/mc-sema/validator/x86/tests/FCMOVB.asm deleted file mode 100644 index 545b466b1..000000000 --- a/mc-sema/validator/x86/tests/FCMOVB.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - FLDPI - FLD1 - STC ;ensure the mov - ;TEST_BEGIN_RECORDING - fcmovb st0, st1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FCMOVBE.asm b/mc-sema/validator/x86/tests/FCMOVBE.asm deleted file mode 100644 index accac47ce..000000000 --- a/mc-sema/validator/x86/tests/FCMOVBE.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - FLDPI - FLD1 - CMP EAX, EAX - ;TEST_BEGIN_RECORDING - fcmovbe st0, st1 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86/tests/FCMOVE.asm b/mc-sema/validator/x86/tests/FCMOVE.asm deleted file mode 100644 index 64a23af5a..000000000 --- a/mc-sema/validator/x86/tests/FCMOVE.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - FLDPI - FLD1 - CMP EAX, EAX - ;TEST_BEGIN_RECORDING - fcmove st0, st1 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86/tests/FCMOVNB.asm b/mc-sema/validator/x86/tests/FCMOVNB.asm deleted file mode 100644 index d24ad4220..000000000 --- a/mc-sema/validator/x86/tests/FCMOVNB.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - FLDPI - FLD1 - ; Clear CF - CLC - ;TEST_BEGIN_RECORDING - fcmovnb st0, st1 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86/tests/FCMOVNBE.asm b/mc-sema/validator/x86/tests/FCMOVNBE.asm deleted file mode 100644 index 3ae116683..000000000 --- a/mc-sema/validator/x86/tests/FCMOVNBE.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - FLDPI - FLD1 - MOV EAX, 0 - CMP EAX, 1 - CLC - ;TEST_BEGIN_RECORDING - fcmovnbe st0, st1 - ;TEST_END_RECORDING - - - - diff --git a/mc-sema/validator/x86/tests/FCMOVNE.asm b/mc-sema/validator/x86/tests/FCMOVNE.asm deleted file mode 100644 index ebc1f0a5f..000000000 --- a/mc-sema/validator/x86/tests/FCMOVNE.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - FLDPI - FLD1 - MOV EAX, 0 - CMP EAX, 1 - ;TEST_BEGIN_RECORDING - fcmovne st0, st1 - ;TEST_END_RECORDING - - - diff --git a/mc-sema/validator/x86/tests/FCMOVNU.asm b/mc-sema/validator/x86/tests/FCMOVNU.asm deleted file mode 100644 index 727b9a14a..000000000 --- a/mc-sema/validator/x86/tests/FCMOVNU.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - FLDPI - FLD1 - MOV EAX, 2 - CMP EAX, 0 - ;TEST_BEGIN_RECORDING - fcmovnu st0, st1 - ;TEST_END_RECORDING - - - - diff --git a/mc-sema/validator/x86/tests/FCMOVU.asm b/mc-sema/validator/x86/tests/FCMOVU.asm deleted file mode 100644 index 84b42c870..000000000 --- a/mc-sema/validator/x86/tests/FCMOVU.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - FLDPI - FLD1 - ;SET PF - MOV EAX, 0x3 - CMP EAX, 0 - ;TEST_BEGIN_RECORDING - fcmovu st0, st1 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86/tests/FCOM.asm b/mc-sema/validator/x86/tests/FCOM.asm deleted file mode 100644 index a50ac2cd2..000000000 --- a/mc-sema/validator/x86/tests/FCOM.asm +++ /dev/null @@ -1,18 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLDPI - -;TEST_BEGIN_RECORDING -FCOM -mov edi, 0 -;TEST_END_RECORDING - - - - diff --git a/mc-sema/validator/x86/tests/FCOMIP_STFr.asm b/mc-sema/validator/x86/tests/FCOMIP_STFr.asm deleted file mode 100644 index 8e9884ec4..000000000 --- a/mc-sema/validator/x86/tests/FCOMIP_STFr.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLDPI - -;TEST_BEGIN_RECORDING -FCOMIP st0, st1 -;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86/tests/FCOMI_STFr.asm b/mc-sema/validator/x86/tests/FCOMI_STFr.asm deleted file mode 100644 index b640b7bd9..000000000 --- a/mc-sema/validator/x86/tests/FCOMI_STFr.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLDPI - -;TEST_BEGIN_RECORDING -FCOMI st0, st1 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FCOMP.asm b/mc-sema/validator/x86/tests/FCOMP.asm deleted file mode 100644 index fc2060ef3..000000000 --- a/mc-sema/validator/x86/tests/FCOMP.asm +++ /dev/null @@ -1,18 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLDPI - -;TEST_BEGIN_RECORDING -FCOMP -mov edi, 0 -;TEST_END_RECORDING - - - - diff --git a/mc-sema/validator/x86/tests/FCOMPP.asm b/mc-sema/validator/x86/tests/FCOMPP.asm deleted file mode 100644 index a7b5a282b..000000000 --- a/mc-sema/validator/x86/tests/FCOMPP.asm +++ /dev/null @@ -1,18 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLDPI - -;TEST_BEGIN_RECORDING -FCOMPP -mov edi, 0 -;TEST_END_RECORDING - - - - diff --git a/mc-sema/validator/x86/tests/FCOMP_F32m.asm b/mc-sema/validator/x86/tests/FCOMP_F32m.asm deleted file mode 100644 index ca988b29a..000000000 --- a/mc-sema/validator/x86/tests/FCOMP_F32m.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI - -;TEST_BEGIN_RECORDING -lea edi, [esp-08] -FST dword [edi+00] -FCOMP dword [edi+00] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FCOMP_F64m.asm b/mc-sema/validator/x86/tests/FCOMP_F64m.asm deleted file mode 100644 index 2772385c0..000000000 --- a/mc-sema/validator/x86/tests/FCOMP_F64m.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI - -;TEST_BEGIN_RECORDING -lea edi, [esp-0x0C] -FST qword [edi+00] -FCOMP qword [edi+00] -mov edi, 0 -;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86/tests/FCOMP_STFr.asm b/mc-sema/validator/x86/tests/FCOMP_STFr.asm deleted file mode 100644 index e1e253c62..000000000 --- a/mc-sema/validator/x86/tests/FCOMP_STFr.asm +++ /dev/null @@ -1,18 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLDPI -FLDPI - -;TEST_BEGIN_RECORDING -FCOMP st2 -mov edi, 0 -;TEST_END_RECORDING - - - diff --git a/mc-sema/validator/x86/tests/FCOM_F32m.asm b/mc-sema/validator/x86/tests/FCOM_F32m.asm deleted file mode 100644 index 3768cf501..000000000 --- a/mc-sema/validator/x86/tests/FCOM_F32m.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI - -;TEST_BEGIN_RECORDING -lea edi, [esp-08] -FST dword [edi+00] -FCOM dword [edi+00] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FCOM_F64m.asm b/mc-sema/validator/x86/tests/FCOM_F64m.asm deleted file mode 100644 index b7e16f684..000000000 --- a/mc-sema/validator/x86/tests/FCOM_F64m.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI - -;TEST_BEGIN_RECORDING -lea edi, [esp-0x0C] -FST qword [edi+00] -FCOM qword [edi+00] -mov edi, 0 -;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86/tests/FCOM_STFr.asm b/mc-sema/validator/x86/tests/FCOM_STFr.asm deleted file mode 100644 index 4ce3002a4..000000000 --- a/mc-sema/validator/x86/tests/FCOM_STFr.asm +++ /dev/null @@ -1,18 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLDPI -FLDPI - -;TEST_BEGIN_RECORDING -FCOM st2 -mov edi, 0 -;TEST_END_RECORDING - - - diff --git a/mc-sema/validator/x86/tests/FCOS.asm b/mc-sema/validator/x86/tests/FCOS.asm deleted file mode 100644 index e33b14d6d..000000000 --- a/mc-sema/validator/x86/tests/FCOS.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI - -;TEST_BEGIN_RECORDING -FCOS -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FDECSTP.asm b/mc-sema/validator/x86/tests/FDECSTP.asm deleted file mode 100644 index f899361ea..000000000 --- a/mc-sema/validator/x86/tests/FDECSTP.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLD1 - -;TEST_BEGIN_RECORDING -FDECSTP -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FDIVP.asm b/mc-sema/validator/x86/tests/FDIVP.asm deleted file mode 100644 index f34a4052e..000000000 --- a/mc-sema/validator/x86/tests/FDIVP.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLD1 -;TEST_BEGIN_RECORDING -FDIVP -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FDIVRP.asm b/mc-sema/validator/x86/tests/FDIVRP.asm deleted file mode 100644 index ef5fcea32..000000000 --- a/mc-sema/validator/x86/tests/FDIVRP.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLD1 -;TEST_BEGIN_RECORDING -FDIVRP -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FDIVR_F32m.asm b/mc-sema/validator/x86/tests/FDIVR_F32m.asm deleted file mode 100644 index ea6eafd81..000000000 --- a/mc-sema/validator/x86/tests/FDIVR_F32m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLD1 -;TEST_BEGIN_RECORDING -lea edi, [esp-08] -FSTP dword [edi] -FDIVR dword [edi] -mov edi, 0 -;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/FDIVR_F64m.asm b/mc-sema/validator/x86/tests/FDIVR_F64m.asm deleted file mode 100644 index bb7ba48fb..000000000 --- a/mc-sema/validator/x86/tests/FDIVR_F64m.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLD1 -;TEST_BEGIN_RECORDING -lea edi, [esp-08] -FSTP qword [edi] -FDIVR qword [edi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FDIVR_FrST0.asm b/mc-sema/validator/x86/tests/FDIVR_FrST0.asm deleted file mode 100644 index 352fa32ae..000000000 --- a/mc-sema/validator/x86/tests/FDIVR_FrST0.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLD1 -FLD1 -;TEST_BEGIN_RECORDING -FDIVR st2, st0 -mov edi, 0 -;TEST_END_RECORDING - - - diff --git a/mc-sema/validator/x86/tests/FDIVR_PFrST0.asm b/mc-sema/validator/x86/tests/FDIVR_PFrST0.asm deleted file mode 100644 index 6290305b3..000000000 --- a/mc-sema/validator/x86/tests/FDIVR_PFrST0.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLD1 -FLD1 -;TEST_BEGIN_RECORDING -FDIVRP st2, st0 -mov edi, 0 -;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/FDIVR_ST0Fr.asm b/mc-sema/validator/x86/tests/FDIVR_ST0Fr.asm deleted file mode 100644 index a7c35d543..000000000 --- a/mc-sema/validator/x86/tests/FDIVR_ST0Fr.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLD1 -FLD1 -;TEST_BEGIN_RECORDING -FDIVR st0, st2 -mov edi, 0 -;TEST_END_RECORDING - - - diff --git a/mc-sema/validator/x86/tests/FFREE.asm b/mc-sema/validator/x86/tests/FFREE.asm deleted file mode 100644 index 8fa3b2ef0..000000000 --- a/mc-sema/validator/x86/tests/FFREE.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -FLDPI -;TEST_BEGIN_RECORDING -FFREE st0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FIADDm16.asm b/mc-sema/validator/x86/tests/FIADDm16.asm deleted file mode 100644 index 627ec4f78..000000000 --- a/mc-sema/validator/x86/tests/FIADDm16.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - ; set up st0 to be PI - - FLDPI - ;TEST_BEGIN_RECORDING - lea edi, [esp-08] - mov word [edi], 0x0001 - FIADD word [edi] - mov edi, 0x0 - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/FIADDm32.asm b/mc-sema/validator/x86/tests/FIADDm32.asm deleted file mode 100644 index 9469d0e46..000000000 --- a/mc-sema/validator/x86/tests/FIADDm32.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - ; set up st0 to be PI - FLDPI - ;TEST_BEGIN_RECORDING - lea edi, [esp-08] - mov dword [edi], 0x10000 - - FIADD dword [edi] - mov edi, 0x0 - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/FICOMP_16m.asm b/mc-sema/validator/x86/tests/FICOMP_16m.asm deleted file mode 100644 index 3c3f023d8..000000000 --- a/mc-sema/validator/x86/tests/FICOMP_16m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLD1 - -;TEST_BEGIN_RECORDING -lea edi, [esp-08] -mov word [edi], 0x0001 -FICOMP word [edi] -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FICOMP_32m.asm b/mc-sema/validator/x86/tests/FICOMP_32m.asm deleted file mode 100644 index c8021cf2c..000000000 --- a/mc-sema/validator/x86/tests/FICOMP_32m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLD1 - -;TEST_BEGIN_RECORDING -lea edi, [esp-08] -mov dword [edi], 0x1 -FICOMP dword [edi] -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FICOM_16m.asm b/mc-sema/validator/x86/tests/FICOM_16m.asm deleted file mode 100644 index bb981930c..000000000 --- a/mc-sema/validator/x86/tests/FICOM_16m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLD1 - -;TEST_BEGIN_RECORDING -lea edi, [esp-08] -mov word [edi], 0x0001 -FICOM word [edi] -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FICOM_32m.asm b/mc-sema/validator/x86/tests/FICOM_32m.asm deleted file mode 100644 index 9b3730b48..000000000 --- a/mc-sema/validator/x86/tests/FICOM_32m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLD1 - -;TEST_BEGIN_RECORDING -lea edi, [esp-08] -mov dword [edi], 0x1 -FICOM dword [edi] -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FIDIVR_32m.asm b/mc-sema/validator/x86/tests/FIDIVR_32m.asm deleted file mode 100644 index 461ce50ac..000000000 --- a/mc-sema/validator/x86/tests/FIDIVR_32m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -;TEST_BEGIN_RECORDING -lea edi, [esp-08] -mov dword [edi], 0x00000001 -FIDIVR dword [edi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FIDIVR_64m.asm b/mc-sema/validator/x86/tests/FIDIVR_64m.asm deleted file mode 100644 index 9a2f8f303..000000000 --- a/mc-sema/validator/x86/tests/FIDIVR_64m.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -;TEST_BEGIN_RECORDING -lea edi, [esp-08] -mov word [edi], 0x0001 -FIDIVR word [edi] -mov edi, 0 -;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86/tests/FIDIV_32m.asm b/mc-sema/validator/x86/tests/FIDIV_32m.asm deleted file mode 100644 index 763a437b0..000000000 --- a/mc-sema/validator/x86/tests/FIDIV_32m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -;TEST_BEGIN_RECORDING -lea edi, [esp-08] -mov dword [edi], 0x00000001 -FIDIV dword [edi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FIDIV_64m.asm b/mc-sema/validator/x86/tests/FIDIV_64m.asm deleted file mode 100644 index 26ac4b2d3..000000000 --- a/mc-sema/validator/x86/tests/FIDIV_64m.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -;TEST_BEGIN_RECORDING -lea edi, [esp-08] -mov word [edi], 0x0001 -FIDIV word [edi] -mov edi, 0 -;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86/tests/FILD_16m.asm b/mc-sema/validator/x86/tests/FILD_16m.asm deleted file mode 100644 index 1a0a24088..000000000 --- a/mc-sema/validator/x86/tests/FILD_16m.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea edi, [esp-0x08] -mov word [edi], 0x0001 -FILD word [edi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FILD_32m.asm b/mc-sema/validator/x86/tests/FILD_32m.asm deleted file mode 100644 index 8c637743b..000000000 --- a/mc-sema/validator/x86/tests/FILD_32m.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING - -lea edi, [esp-0x08] -mov dword [edi], 0x1 -FILD dword [edi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FILD_64m.asm b/mc-sema/validator/x86/tests/FILD_64m.asm deleted file mode 100644 index 7c2cdacf8..000000000 --- a/mc-sema/validator/x86/tests/FILD_64m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING - -lea edi, [esp-0x0c] -mov dword [edi+00], 0x0000 -mov dword [edi+04], 0x0001 -FILD qword [edi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FIMUL_m16.asm b/mc-sema/validator/x86/tests/FIMUL_m16.asm deleted file mode 100644 index e108b8050..000000000 --- a/mc-sema/validator/x86/tests/FIMUL_m16.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -;TEST_BEGIN_RECORDING -lea edi, [esp-0xC] -mov word [edi], 0x2 -FIMUL word [edi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FIMUL_m32.asm b/mc-sema/validator/x86/tests/FIMUL_m32.asm deleted file mode 100644 index 06a76b93e..000000000 --- a/mc-sema/validator/x86/tests/FIMUL_m32.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -;TEST_BEGIN_RECORDING -lea edi, [esp-0xC] -mov dword [edi], 0x2 -FIMUL dword [edi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FINCSTP.asm b/mc-sema/validator/x86/tests/FINCSTP.asm deleted file mode 100644 index b104d507b..000000000 --- a/mc-sema/validator/x86/tests/FINCSTP.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -FLDZ -;TEST_BEGIN_RECORDING -FINCSTP -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FINIT.asm b/mc-sema/validator/x86/tests/FINIT.asm deleted file mode 100644 index 6e5afc1ff..000000000 --- a/mc-sema/validator/x86/tests/FINIT.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -FLDZ -;TEST_BEGIN_RECORDING -FINIT -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FISTP_16m.asm b/mc-sema/validator/x86/tests/FISTP_16m.asm deleted file mode 100644 index 6ce566dd9..000000000 --- a/mc-sema/validator/x86/tests/FISTP_16m.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - FLD1 - ;TEST_BEGIN_RECORDING - lea edi, [esp-0xC] - fistp word [edi] - mov ax, word [edi] - mov edi, 0x0 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86/tests/FISTP_32m.asm b/mc-sema/validator/x86/tests/FISTP_32m.asm deleted file mode 100644 index 081724fb2..000000000 --- a/mc-sema/validator/x86/tests/FISTP_32m.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - FLD1 - ;TEST_BEGIN_RECORDING - lea edi, [esp-0xC] - fistp dword [edi] - mov eax, dword [edi] - mov edi, 0x0 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86/tests/FISTP_64m.asm b/mc-sema/validator/x86/tests/FISTP_64m.asm deleted file mode 100644 index 4a9b57693..000000000 --- a/mc-sema/validator/x86/tests/FISTP_64m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - FLD1 - ;TEST_BEGIN_RECORDING - lea edi, [esp-0xC] - fistp qword [edi] - mov eax, dword [edi+00] - mov ebx, dword [edi+04] - mov edi, 0x0 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86/tests/FISTTP_16m.asm b/mc-sema/validator/x86/tests/FISTTP_16m.asm deleted file mode 100644 index 0b951e6da..000000000 --- a/mc-sema/validator/x86/tests/FISTTP_16m.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - FLDPI - ;TEST_BEGIN_RECORDING - lea edi, [esp-0xC] - fisttp word [edi] - mov ax, word [edi] - mov edi, 0x0 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86/tests/FISTTP_32m.asm b/mc-sema/validator/x86/tests/FISTTP_32m.asm deleted file mode 100644 index 3b42d0c8c..000000000 --- a/mc-sema/validator/x86/tests/FISTTP_32m.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - FLDPI - ;TEST_BEGIN_RECORDING - lea edi, [esp-0xC] - fisttp dword [edi] - mov eax, dword [edi] - mov edi, 0x0 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86/tests/FISTTP_64m.asm b/mc-sema/validator/x86/tests/FISTTP_64m.asm deleted file mode 100644 index 1b8357c9f..000000000 --- a/mc-sema/validator/x86/tests/FISTTP_64m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - FLDPI - ;TEST_BEGIN_RECORDING - lea edi, [esp-0xC] - fisttp qword [edi] - mov eax, dword [edi+00] - mov ebx, dword [edi+04] - mov edi, 0x0 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86/tests/FIST_16m.asm b/mc-sema/validator/x86/tests/FIST_16m.asm deleted file mode 100644 index 5412aaddd..000000000 --- a/mc-sema/validator/x86/tests/FIST_16m.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - FLD1 - ;TEST_BEGIN_RECORDING - lea edi, [esp-0xC] - fist word [edi] - mov eax, dword [edi] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FIST_32m.asm b/mc-sema/validator/x86/tests/FIST_32m.asm deleted file mode 100644 index 53f1c7e3d..000000000 --- a/mc-sema/validator/x86/tests/FIST_32m.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - FLD1 - ;TEST_BEGIN_RECORDING - lea edi, [esp-0xC] - fist dword [edi] - mov eax, dword [edi] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FISUBRm16.asm b/mc-sema/validator/x86/tests/FISUBRm16.asm deleted file mode 100644 index aabbbf666..000000000 --- a/mc-sema/validator/x86/tests/FISUBRm16.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - ; set up st0 to be PI - - FLDPI - ;TEST_BEGIN_RECORDING - lea edi, [esp-08] - mov word [edi], 0x0001 - FISUBR word [edi] - mov edi, 0x0 - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/FISUBRm32.asm b/mc-sema/validator/x86/tests/FISUBRm32.asm deleted file mode 100644 index 20a7b64b0..000000000 --- a/mc-sema/validator/x86/tests/FISUBRm32.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - ; set up st0 to be PI - FLDPI - ;TEST_BEGIN_RECORDING - lea edi, [esp-08] - mov dword [edi], 0x1 - - FISUBR dword [edi] - mov edi, 0x0 - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/FISUBm16.asm b/mc-sema/validator/x86/tests/FISUBm16.asm deleted file mode 100644 index b8a4c7316..000000000 --- a/mc-sema/validator/x86/tests/FISUBm16.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - ; set up st0 to be PI - - FLDPI - ;TEST_BEGIN_RECORDING - lea edi, [esp-08] - mov word [edi], 0x0001 - FISUB word [edi] - mov edi, 0x0 - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/FISUBm32.asm b/mc-sema/validator/x86/tests/FISUBm32.asm deleted file mode 100644 index 2008dbb18..000000000 --- a/mc-sema/validator/x86/tests/FISUBm32.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - ; set up st0 to be PI - FLDPI - ;TEST_BEGIN_RECORDING - lea edi, [esp-08] - mov dword [edi], 0x1 - - FISUB dword [edi] - mov edi, 0x0 - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/FLD1.asm b/mc-sema/validator/x86/tests/FLD1.asm deleted file mode 100644 index 0fa1e50af..000000000 --- a/mc-sema/validator/x86/tests/FLD1.asm +++ /dev/null @@ -1,9 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - FLD1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FLDCW.asm b/mc-sema/validator/x86/tests/FLDCW.asm deleted file mode 100644 index 3fdbf2fa7..000000000 --- a/mc-sema/validator/x86/tests/FLDCW.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - lea edi, [esp-08] - mov dword [edi], 0 - FSTCW [edi] - FLDCW [edi] - mov edi, 0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FLDENV.asm b/mc-sema/validator/x86/tests/FLDENV.asm deleted file mode 100644 index 4c9d4e3a5..000000000 --- a/mc-sema/validator/x86/tests/FLDENV.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - lea edi, [esp-0x80] - FSTENV [edi] - FLDENV [edi] - mov edi, 0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FLDL2E.asm b/mc-sema/validator/x86/tests/FLDL2E.asm deleted file mode 100644 index 6ecbad5e9..000000000 --- a/mc-sema/validator/x86/tests/FLDL2E.asm +++ /dev/null @@ -1,9 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - FLDL2E - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FLDL2T.asm b/mc-sema/validator/x86/tests/FLDL2T.asm deleted file mode 100644 index 2270a1918..000000000 --- a/mc-sema/validator/x86/tests/FLDL2T.asm +++ /dev/null @@ -1,9 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - FLDL2T - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FLDLG2.asm b/mc-sema/validator/x86/tests/FLDLG2.asm deleted file mode 100644 index fbf9d2226..000000000 --- a/mc-sema/validator/x86/tests/FLDLG2.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - FLDLG2 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86/tests/FLDLN2.asm b/mc-sema/validator/x86/tests/FLDLN2.asm deleted file mode 100644 index d1fb25b09..000000000 --- a/mc-sema/validator/x86/tests/FLDLN2.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - FLDLN2 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86/tests/FLDPI.asm b/mc-sema/validator/x86/tests/FLDPI.asm deleted file mode 100644 index 173798580..000000000 --- a/mc-sema/validator/x86/tests/FLDPI.asm +++ /dev/null @@ -1,9 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - FLDPI - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FLDZ.asm b/mc-sema/validator/x86/tests/FLDZ.asm deleted file mode 100644 index 84dd03e2b..000000000 --- a/mc-sema/validator/x86/tests/FLDZ.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - FLDZ - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86/tests/FMULP.asm b/mc-sema/validator/x86/tests/FMULP.asm deleted file mode 100644 index 36bb32475..000000000 --- a/mc-sema/validator/x86/tests/FMULP.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - ; FADDP - FLDPI - FLDPI - ;TEST_BEGIN_RECORDING - fmulp st1, st0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FMULP_rST0.asm b/mc-sema/validator/x86/tests/FMULP_rST0.asm deleted file mode 100644 index 26ba9b40b..000000000 --- a/mc-sema/validator/x86/tests/FMULP_rST0.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - ; FADDP - FLDPI - FLDPI - FLDPI - ;TEST_BEGIN_RECORDING - fmulp st2, st0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FNCLEX.asm b/mc-sema/validator/x86/tests/FNCLEX.asm deleted file mode 100644 index d823dba87..000000000 --- a/mc-sema/validator/x86/tests/FNCLEX.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -FNCLEX -;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86/tests/FNINIT.asm b/mc-sema/validator/x86/tests/FNINIT.asm deleted file mode 100644 index e9848462c..000000000 --- a/mc-sema/validator/x86/tests/FNINIT.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -FLDZ -;TEST_BEGIN_RECORDING -FNINIT -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FNOP.asm b/mc-sema/validator/x86/tests/FNOP.asm deleted file mode 100644 index 26f075323..000000000 --- a/mc-sema/validator/x86/tests/FNOP.asm +++ /dev/null @@ -1,9 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - FNOP - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FNSAVE.asm b/mc-sema/validator/x86/tests/FNSAVE.asm deleted file mode 100644 index 710e902f7..000000000 --- a/mc-sema/validator/x86/tests/FNSAVE.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea edi, [esp-0x200] -; save state -FNSAVE [edi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FNSTCW.asm b/mc-sema/validator/x86/tests/FNSTCW.asm deleted file mode 100644 index ed8e2153c..000000000 --- a/mc-sema/validator/x86/tests/FNSTCW.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - lea edi, [esp-08] - mov dword [edi], 0 - FNSTCW [edi] - mov eax, dword [edi] - mov edi, 0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FNSTENVm.asm b/mc-sema/validator/x86/tests/FNSTENVm.asm deleted file mode 100644 index 228302c47..000000000 --- a/mc-sema/validator/x86/tests/FNSTENVm.asm +++ /dev/null @@ -1,19 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; FSTENVm - ;TEST_BEGIN_RECORDING - lea edi, [esp-0x200] - fnstenv [edi] - mov eax, [edi] ;control word - mov ebx, [edi+0x4] ;status word - mov ecx, [edi+0x8] ;tag word - ;mov edx, [edi+0xc] ;EIP - unsupported - ;mov esi, [edi+0x10] ;FOPCODE + FPU EIP Segment - unsupported - ;mov ebp, [edi+0x14] ;data pointer - unsupported - ;mov edi, [edi+0x18] ;data pointer selector - unsupported - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FNSTSWa.asm b/mc-sema/validator/x86/tests/FNSTSWa.asm deleted file mode 100644 index 8ef092701..000000000 --- a/mc-sema/validator/x86/tests/FNSTSWa.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - mov eax, 0 - FNSTSW ax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FNSTSWm.asm b/mc-sema/validator/x86/tests/FNSTSWm.asm deleted file mode 100644 index 21eb944bd..000000000 --- a/mc-sema/validator/x86/tests/FNSTSWm.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - lea edi, [esp-08] - mov dword [edi], 0 - FNSTSW [edi] - mov eax, dword [edi] - mov edi, 0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FPATAN.asm b/mc-sema/validator/x86/tests/FPATAN.asm deleted file mode 100644 index dd87f8fbb..000000000 --- a/mc-sema/validator/x86/tests/FPATAN.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -;TEST_BEGIN_RECORDING -lea edi, [esp-0xc] -mov word [edi], 0x4 -FILD word [edi] -;calc ATAN(pi/4) -FPATAN -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FPREM.asm b/mc-sema/validator/x86/tests/FPREM.asm deleted file mode 100644 index 585a2a4ae..000000000 --- a/mc-sema/validator/x86/tests/FPREM.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea edi, [esp-0xc] -mov word [edi], 0x2 -FILD word [edi] -mov word [edi], 0x5 -FILD word [edi] -; get remainder of 5/2 -FPREM -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FPREM1.asm b/mc-sema/validator/x86/tests/FPREM1.asm deleted file mode 100644 index 9b57bc931..000000000 --- a/mc-sema/validator/x86/tests/FPREM1.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea edi, [esp-0xc] -mov word [edi], 0x2 -FILD word [edi] -mov word [edi], 0x5 -FILD word [edi] -; get the IEEE remainder of 5/2 -FPREM1 -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FRNDINT.asm b/mc-sema/validator/x86/tests/FRNDINT.asm deleted file mode 100644 index 6cd8fa2d9..000000000 --- a/mc-sema/validator/x86/tests/FRNDINT.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE -;TEST_FILE_META_END - -FLDPI -;TEST_BEGIN_RECORDING -FRNDINT -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FRSTOR.asm b/mc-sema/validator/x86/tests/FRSTOR.asm deleted file mode 100644 index 788fcbbfd..000000000 --- a/mc-sema/validator/x86/tests/FRSTOR.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea edi, [esp-0x200] -; save state -FNSAVE [edi] -;reload state -FRSTOR [edi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FSAVE.asm b/mc-sema/validator/x86/tests/FSAVE.asm deleted file mode 100644 index f13de274e..000000000 --- a/mc-sema/validator/x86/tests/FSAVE.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea edi, [esp-0x200] -; save state -FSAVE [edi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FSCALE.asm b/mc-sema/validator/x86/tests/FSCALE.asm deleted file mode 100644 index 95de4e1bc..000000000 --- a/mc-sema/validator/x86/tests/FSCALE.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -lea edi, [esp-0xc] -mov word [edi], 0x2 -fild word [edi]; st1 = 2 -fild word [edi]; st0 = 2 -mov edi, 0 -;TEST_BEGIN_RECORDING -FSCALE ; st0 = 8 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FSIN.asm b/mc-sema/validator/x86/tests/FSIN.asm deleted file mode 100644 index 0f592acaa..000000000 --- a/mc-sema/validator/x86/tests/FSIN.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - -; set up st0 to be PI/2 -FLDPI -LEA ESI, [ESP-08] -MOV word [ESI], 0x2 -FIDIV word [ESI] - -;TEST_BEGIN_RECORDING -FSIN -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FSINCOS.asm b/mc-sema/validator/x86/tests/FSINCOS.asm deleted file mode 100644 index 3e3bea5be..000000000 --- a/mc-sema/validator/x86/tests/FSINCOS.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI - -;TEST_BEGIN_RECORDING -FSINCOS -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FSQRT.asm b/mc-sema/validator/x86/tests/FSQRT.asm deleted file mode 100644 index eb110e65c..000000000 --- a/mc-sema/validator/x86/tests/FSQRT.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea edi, [esp-0xc] -mov word [edi], 0x4 -fild word [edi] -mov edi, 0 -FSQRT -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FSTCW.asm b/mc-sema/validator/x86/tests/FSTCW.asm deleted file mode 100644 index 301b01374..000000000 --- a/mc-sema/validator/x86/tests/FSTCW.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - lea edi, [esp-08] - mov dword [edi], 0 - FSTCW [edi] - mov eax, dword [edi] - mov edi, 0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FSTENVm.asm b/mc-sema/validator/x86/tests/FSTENVm.asm deleted file mode 100644 index 5f85022f8..000000000 --- a/mc-sema/validator/x86/tests/FSTENVm.asm +++ /dev/null @@ -1,19 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; FSTENVm - ;TEST_BEGIN_RECORDING - lea edi, [esp-0x200] - fstenv [edi] - mov eax, [edi] ;control word - mov ebx, [edi+0x4] ;status word - mov ecx, [edi+0x8] ;tag word - ;mov edx, [edi+0xc] ;EIP - unsupported - ;mov esi, [edi+0x10] ;FOPCODE + FPU EIP Segment - unsupported - ;mov ebp, [edi+0x14] ;data pointer - unsupported - ;mov edi, [edi+0x18] ;data pointer selector - unsupported - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FSTSWa.asm b/mc-sema/validator/x86/tests/FSTSWa.asm deleted file mode 100644 index 7892b255c..000000000 --- a/mc-sema/validator/x86/tests/FSTSWa.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - mov eax, 0 - FSTSW ax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FSTSWm.asm b/mc-sema/validator/x86/tests/FSTSWm.asm deleted file mode 100644 index 33b267a7b..000000000 --- a/mc-sema/validator/x86/tests/FSTSWm.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - lea edi, [esp-08] - mov dword [edi], 0 - FSTSW [edi] - mov eax, dword [edi] - mov edi, 0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FSUBP.asm b/mc-sema/validator/x86/tests/FSUBP.asm deleted file mode 100644 index 25c0029fb..000000000 --- a/mc-sema/validator/x86/tests/FSUBP.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; FADDP - lea edi, [esp-0x10] - mov DWORD [edi], 0x2168c000 - mov DWORD [edi+0x4], 0xc90fdaa2 - mov DWORD [edi+0x8], 0x00004000 - fld TWORD [edi] - fld TWORD [edi] - ;TEST_BEGIN_RECORDING - fsubp - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FSUBP_rST0.asm b/mc-sema/validator/x86/tests/FSUBP_rST0.asm deleted file mode 100644 index 1e822a5cc..000000000 --- a/mc-sema/validator/x86/tests/FSUBP_rST0.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; FADDP - FLDPI - FLDPI - FLDPI - ;TEST_BEGIN_RECORDING - fsubp st2, st0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FSUBRP.asm b/mc-sema/validator/x86/tests/FSUBRP.asm deleted file mode 100644 index fafe31196..000000000 --- a/mc-sema/validator/x86/tests/FSUBRP.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; FADDP - lea edi, [esp-0x10] - mov DWORD [edi], 0x2168c000 - mov DWORD [edi+0x4], 0xc90fdaa2 - mov DWORD [edi+0x8], 0x00004000 - fld TWORD [edi] - fld TWORD [edi] - ;TEST_BEGIN_RECORDING - fsubrp - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FSUBRP_rST0.asm b/mc-sema/validator/x86/tests/FSUBRP_rST0.asm deleted file mode 100644 index 6a1255ff6..000000000 --- a/mc-sema/validator/x86/tests/FSUBRP_rST0.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; FADDP - FLDPI - FLDPI - FLDPI - ;TEST_BEGIN_RECORDING - fsubrp st2, st0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FTST.asm b/mc-sema/validator/x86/tests/FTST.asm deleted file mode 100644 index 2361cfeed..000000000 --- a/mc-sema/validator/x86/tests/FTST.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - - FLD1 - ;TEST_BEGIN_RECORDING - FTST - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FUCOM.asm b/mc-sema/validator/x86/tests/FUCOM.asm deleted file mode 100644 index 86b13c093..000000000 --- a/mc-sema/validator/x86/tests/FUCOM.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLD1 -FLD1 - -;TEST_BEGIN_RECORDING -FUCOM -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FUCOMIP_STFr.asm b/mc-sema/validator/x86/tests/FUCOMIP_STFr.asm deleted file mode 100644 index ce3ab2d32..000000000 --- a/mc-sema/validator/x86/tests/FUCOMIP_STFr.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLDPI - -;TEST_BEGIN_RECORDING -FUCOMIP st0, st1 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FUCOMI_STFr.asm b/mc-sema/validator/x86/tests/FUCOMI_STFr.asm deleted file mode 100644 index 37ce48bff..000000000 --- a/mc-sema/validator/x86/tests/FUCOMI_STFr.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLDPI - -;TEST_BEGIN_RECORDING -FUCOMI st0, st1 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FUCOMP.asm b/mc-sema/validator/x86/tests/FUCOMP.asm deleted file mode 100644 index 8bc6c7e18..000000000 --- a/mc-sema/validator/x86/tests/FUCOMP.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLD1 -FLD1 - -;TEST_BEGIN_RECORDING -FUCOMP -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FUCOMPP.asm b/mc-sema/validator/x86/tests/FUCOMPP.asm deleted file mode 100644 index 806005918..000000000 --- a/mc-sema/validator/x86/tests/FUCOMPP.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLD1 -FLD1 -FLD1 - -;TEST_BEGIN_RECORDING -FUCOMPP -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FUCOMP_STFr.asm b/mc-sema/validator/x86/tests/FUCOMP_STFr.asm deleted file mode 100644 index 5a8878391..000000000 --- a/mc-sema/validator/x86/tests/FUCOMP_STFr.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLD1 -FLD1 -FLD1 - -;TEST_BEGIN_RECORDING -FUCOMP st2 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FUCOM_STFr.asm b/mc-sema/validator/x86/tests/FUCOM_STFr.asm deleted file mode 100644 index c49cad60b..000000000 --- a/mc-sema/validator/x86/tests/FUCOM_STFr.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLD1 -FLD1 -FLD1 - -;TEST_BEGIN_RECORDING -FUCOM st2 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FXAM.asm b/mc-sema/validator/x86/tests/FXAM.asm deleted file mode 100644 index 6959c7593..000000000 --- a/mc-sema/validator/x86/tests/FXAM.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -FLDZ - -;TEST_BEGIN_RECORDING -FXAM -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FXCH.asm b/mc-sema/validator/x86/tests/FXCH.asm deleted file mode 100644 index 625d6d55e..000000000 --- a/mc-sema/validator/x86/tests/FXCH.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -FLDZ -FLDPI - -;TEST_BEGIN_RECORDING -FXCH -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FXCH_STFr.asm b/mc-sema/validator/x86/tests/FXCH_STFr.asm deleted file mode 100644 index b34a4f603..000000000 --- a/mc-sema/validator/x86/tests/FXCH_STFr.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -FLDZ -FLDPI -FLD1 - -;TEST_BEGIN_RECORDING -FXCH st2 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FXRSTOR.asm b/mc-sema/validator/x86/tests/FXRSTOR.asm deleted file mode 100644 index d91400c3e..000000000 --- a/mc-sema/validator/x86/tests/FXRSTOR.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea edi, [esp-0x300] -and edi, 0xFFFFFFF0 -FXSAVE [edi] -FXRSTOR [edi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FXSAVE.asm b/mc-sema/validator/x86/tests/FXSAVE.asm deleted file mode 100644 index 184adcf71..000000000 --- a/mc-sema/validator/x86/tests/FXSAVE.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea edi, [esp-0x300] -and edi, 0xFFFFFFF0 -FXSAVE [edi] -; a simple sanity check that something was written -mov eax, [edi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FXTRACT.asm b/mc-sema/validator/x86/tests/FXTRACT.asm deleted file mode 100644 index 650d847c8..000000000 --- a/mc-sema/validator/x86/tests/FXTRACT.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -FLDPI - -;TEST_BEGIN_RECORDING -FXTRACT -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FYL2X.asm b/mc-sema/validator/x86/tests/FYL2X.asm deleted file mode 100644 index 19bff40b3..000000000 --- a/mc-sema/validator/x86/tests/FYL2X.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE -;TEST_FILE_META_END - -lea edi, [esp-0xc] -mov word [edi], 0x10 -FILD word [edi] -FILD word [edi] - -;TEST_BEGIN_RECORDING -FYL2X ;st1 = 16 * log2(16) -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/FYL2XP1.asm b/mc-sema/validator/x86/tests/FYL2XP1.asm deleted file mode 100644 index 30cac1265..000000000 --- a/mc-sema/validator/x86/tests/FYL2XP1.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE -;TEST_FILE_META_END - -FLD1 -FLDZ -;TEST_BEGIN_RECORDING -FYL2XP1 ;st1 = 1.0 * log2(0 + 1.0) -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/IDIV16r.asm b/mc-sema/validator/x86/tests/IDIV16r.asm deleted file mode 100644 index 00a40e134..000000000 --- a/mc-sema/validator/x86/tests/IDIV16r.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_CF|FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IDIV16r - mov ax, 0xaa - mov bx, 0x4 - mov dx, 0x1 - ;TEST_BEGIN_RECORDING - idiv bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/IDIV32m.asm b/mc-sema/validator/x86/tests/IDIV32m.asm deleted file mode 100644 index 717ee4269..000000000 --- a/mc-sema/validator/x86/tests/IDIV32m.asm +++ /dev/null @@ -1,19 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_CF|FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IDIV32r - ;-437706355 % -1674145647 - ;TEST_BEGIN_RECORDING - lea edi, [esp-0x4] - mov DWORD [edi], 0x63c96f6f - mov eax, 0xE5E9218D - mov edx, 0 - cdq - idiv DWORD [edi] - mov edi, 0 - ;TEST_END_RECORDING - - - diff --git a/mc-sema/validator/x86/tests/IDIV32r.asm b/mc-sema/validator/x86/tests/IDIV32r.asm deleted file mode 100644 index bdddf7d77..000000000 --- a/mc-sema/validator/x86/tests/IDIV32r.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_CF|FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IDIV32r - mov eax, 0x819EDB32 - mov ebx, 0xD6C5DA4C - mov edx, 0xFFFFFFFF - ;TEST_BEGIN_RECORDING - idiv ebx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/IDIV32r2.asm b/mc-sema/validator/x86/tests/IDIV32r2.asm deleted file mode 100644 index 0619e248a..000000000 --- a/mc-sema/validator/x86/tests/IDIV32r2.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_CF|FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IDIV32r - ;-437706355 % -1674145647 - ;TEST_BEGIN_RECORDING - mov eax, 0xE5E9218D - mov ebx, 0x9C369091 - mov edx, 0x0 - cdq - idiv ebx - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86/tests/IDIV32r3.asm b/mc-sema/validator/x86/tests/IDIV32r3.asm deleted file mode 100644 index 55334c3bf..000000000 --- a/mc-sema/validator/x86/tests/IDIV32r3.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_CF|FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IDIV32r - ;TEST_BEGIN_RECORDING - mov ebx, 0xE5E9218D - mov eax, 0x9C369091 - mov edx, 0x0 - cdq - idiv ebx - ;TEST_END_RECORDING - - - diff --git a/mc-sema/validator/x86/tests/IDIV8r.asm b/mc-sema/validator/x86/tests/IDIV8r.asm deleted file mode 100644 index ba65d2cb1..000000000 --- a/mc-sema/validator/x86/tests/IDIV8r.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_CF|FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IDIV8r - mov ax, 0xa - mov bl, 0x4 - ;TEST_BEGIN_RECORDING - idiv bl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ILD_F16m.asm b/mc-sema/validator/x86/tests/ILD_F16m.asm deleted file mode 100644 index 8d34135d7..000000000 --- a/mc-sema/validator/x86/tests/ILD_F16m.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ILD_F16m - ;TEST_BEGIN_RECORDING - lea edi, [esp-0x4] - mov WORD [edi], 0x0001 - fild WORD [edi] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ILD_F32m.asm b/mc-sema/validator/x86/tests/ILD_F32m.asm deleted file mode 100644 index b3a94dfc1..000000000 --- a/mc-sema/validator/x86/tests/ILD_F32m.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ILD_F32m - ;TEST_BEGIN_RECORDING - lea edi, [esp-0x4] - mov DWORD [edi], 0x10001 - fild DWORD [edi] - mov edi, 0x0 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86/tests/ILD_F64m.asm b/mc-sema/validator/x86/tests/ILD_F64m.asm deleted file mode 100644 index 7e7614e16..000000000 --- a/mc-sema/validator/x86/tests/ILD_F64m.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ILD_F64m - ;TEST_BEGIN_RECORDING - lea edi, [esp-0x10] - mov DWORD [edi], 0x00001 - mov DWORD [edi+4], 0x10001 - fild QWORD [edi] - mov edi, 0x0 - ;TEST_END_RECORDING - - - diff --git a/mc-sema/validator/x86/tests/IMUL16r.asm b/mc-sema/validator/x86/tests/IMUL16r.asm deleted file mode 100644 index ba0396511..000000000 --- a/mc-sema/validator/x86/tests/IMUL16r.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IMUL16r - mov ax, 0x32 - mov bx, 0xb - ;TEST_BEGIN_RECORDING - imul bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/IMUL16rr.asm b/mc-sema/validator/x86/tests/IMUL16rr.asm deleted file mode 100644 index 8238ffb77..000000000 --- a/mc-sema/validator/x86/tests/IMUL16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IMUL16rr - mov bx, 0x34 - mov cx, 0x45 - ;TEST_BEGIN_RECORDING - imul bx, cx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/IMUL16rri.asm b/mc-sema/validator/x86/tests/IMUL16rri.asm deleted file mode 100644 index 0dde18f0b..000000000 --- a/mc-sema/validator/x86/tests/IMUL16rri.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IMUL16rri - mov bx, 0x3 - mov cx, 0x4 - ;TEST_BEGIN_RECORDING - imul bx, cx, 0xbbb - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/IMUL32r.asm b/mc-sema/validator/x86/tests/IMUL32r.asm deleted file mode 100644 index 7926890be..000000000 --- a/mc-sema/validator/x86/tests/IMUL32r.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IMUL32r - mov eax, 0x323 - mov ebx, 0xbbb - ;TEST_BEGIN_RECORDING - imul ebx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/IMUL32rr.asm b/mc-sema/validator/x86/tests/IMUL32rr.asm deleted file mode 100644 index 65ee3f163..000000000 --- a/mc-sema/validator/x86/tests/IMUL32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IMUL32rr - mov ebx, 0x20000 - mov ecx, 0x34 - ;TEST_BEGIN_RECORDING - imul ebx, ecx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/IMUL32rri.asm b/mc-sema/validator/x86/tests/IMUL32rri.asm deleted file mode 100644 index a9e3d3681..000000000 --- a/mc-sema/validator/x86/tests/IMUL32rri.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IMUL32rri - mov ebx, 0x20000 - mov ecx, 0x34 - ;TEST_BEGIN_RECORDING - imul ebx, ecx, 0xbbbbb - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/IMUL8r.asm b/mc-sema/validator/x86/tests/IMUL8r.asm deleted file mode 100644 index 529a9a661..000000000 --- a/mc-sema/validator/x86/tests/IMUL8r.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IMUL8r - mov al, 0x10 - mov cl, 0xe - ;TEST_BEGIN_RECORDING - imul cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/INC16r.asm b/mc-sema/validator/x86/tests/INC16r.asm deleted file mode 100644 index ec5cc32dd..000000000 --- a/mc-sema/validator/x86/tests/INC16r.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; INC16r - xor dx, dx - mov dx, 0x30 - ;TEST_BEGIN_RECORDING - inc dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/INC32r.asm b/mc-sema/validator/x86/tests/INC32r.asm deleted file mode 100644 index 0412ab8ff..000000000 --- a/mc-sema/validator/x86/tests/INC32r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; INC32r - mov eax, 0x31 - ;TEST_BEGIN_RECORDING - inc eax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/INC8r.asm b/mc-sema/validator/x86/tests/INC8r.asm deleted file mode 100644 index ce3b576c8..000000000 --- a/mc-sema/validator/x86/tests/INC8r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; INC8r - mov cl, 0x32 - ;TEST_BEGIN_RECORDING - inc cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/LAHF.asm b/mc-sema/validator/x86/tests/LAHF.asm deleted file mode 100644 index cf11eb35f..000000000 --- a/mc-sema/validator/x86/tests/LAHF.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; LAHF - ;TEST_BEGIN_RECORDING - lahf - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/LD_F0.asm b/mc-sema/validator/x86/tests/LD_F0.asm deleted file mode 100644 index 069a623ef..000000000 --- a/mc-sema/validator/x86/tests/LD_F0.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; LD_F0 - ;TEST_BEGIN_RECORDING - fldz - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/LD_F1.asm b/mc-sema/validator/x86/tests/LD_F1.asm deleted file mode 100644 index 1d78dfbe1..000000000 --- a/mc-sema/validator/x86/tests/LD_F1.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; LD_F0 - ;TEST_BEGIN_RECORDING - fld1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/LD_F32m.asm b/mc-sema/validator/x86/tests/LD_F32m.asm deleted file mode 100644 index c8e2cc163..000000000 --- a/mc-sema/validator/x86/tests/LD_F32m.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; LD_F32m - ;TEST_BEGIN_RECORDING - lea edi, [esp-0x4] - mov DWORD [edi], 0x40490fdb - fld DWORD [edi] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/LD_F80m.asm b/mc-sema/validator/x86/tests/LD_F80m.asm deleted file mode 100644 index 71d08fdd0..000000000 --- a/mc-sema/validator/x86/tests/LD_F80m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; LD_F80m - ;TEST_BEGIN_RECORDING - lea edi, [esp-0xc] - mov DWORD [edi], 0x2168c000 - mov DWORD [edi+0x4], 0xc90fdaa2 - mov DWORD [edi+0x8], 0x00004000 - fld TWORD [edi] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/LD_Frr.asm b/mc-sema/validator/x86/tests/LD_Frr.asm deleted file mode 100644 index 4801c77fb..000000000 --- a/mc-sema/validator/x86/tests/LD_Frr.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; LD_Frr - FLDPI - FLD1 - FLDL2E - ;TEST_BEGIN_RECORDING - fld st1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/LEA16r.asm b/mc-sema/validator/x86/tests/LEA16r.asm deleted file mode 100644 index 2751fbb26..000000000 --- a/mc-sema/validator/x86/tests/LEA16r.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; LEA16r - mov cx, 0x15 - mov edx, 0x8 - ;TEST_BEGIN_RECORDING - lea cx, [edx-0x444] - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/LEA32r.asm b/mc-sema/validator/x86/tests/LEA32r.asm deleted file mode 100644 index c1d4ade8b..000000000 --- a/mc-sema/validator/x86/tests/LEA32r.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; LEA32r - mov ecx, 0x15 - mov edx, 0x8 - ;TEST_BEGIN_RECORDING - lea ecx, [edx-0x444] - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/LEAVE.asm b/mc-sema/validator/x86/tests/LEAVE.asm deleted file mode 100644 index 1f080ac0e..000000000 --- a/mc-sema/validator/x86/tests/LEAVE.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; LEAVE - push ebp - mov ebp, esp - ;TEST_BEGIN_RECORDING - leave - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/LOOP.asm b/mc-sema/validator/x86/tests/LOOP.asm deleted file mode 100644 index e89f9bb20..000000000 --- a/mc-sema/validator/x86/tests/LOOP.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; LOOP - mov ecx, 0x18 - xor eax, eax - inc eax - ;TEST_BEGIN_RECORDING -again_1: - add eax, eax - loop again_1 - inc eax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/LOOPNE.asm b/mc-sema/validator/x86/tests/LOOPNE.asm deleted file mode 100644 index b4af07607..000000000 --- a/mc-sema/validator/x86/tests/LOOPNE.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; LOOPNE - mov eax, 0x4096 - mov ecx, 0x32 - ;TEST_BEGIN_RECORDING -again_2: - shr eax, 0x1 - loopne again_2 - inc eax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/Lea32R1.asm b/mc-sema/validator/x86/tests/Lea32R1.asm deleted file mode 100644 index 1b965089c..000000000 --- a/mc-sema/validator/x86/tests/Lea32R1.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Lea32R1 - mov eax, 0x21 - mov edi, 0x8 - ;TEST_BEGIN_RECORDING - lea eax, [eax+edi+0x1] - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/Lea32R2.asm b/mc-sema/validator/x86/tests/Lea32R2.asm deleted file mode 100644 index f8de9f9d0..000000000 --- a/mc-sema/validator/x86/tests/Lea32R2.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Lea32R2 - mov eax, 0x515 - mov edx, 0x30 - ;TEST_BEGIN_RECORDING - lea ecx, [eax+edx*0x4] - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/MAXSDrm.asm b/mc-sema/validator/x86/tests/MAXSDrm.asm deleted file mode 100644 index bc5ef5121..000000000 --- a/mc-sema/validator/x86/tests/MAXSDrm.asm +++ /dev/null @@ -1,19 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 0xFFEAD -cvtsi2sd xmm0, ecx -mov ecx, 0xDEADBEEF -cvtsi2sd xmm1, ecx -;TEST_BEGIN_RECORDING -lea ecx, [esp-8] -movsd [ecx], xmm1 -maxsd xmm0, [ecx] -mov ecx, 0 -;TEST_END_RECORDING -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/MAXSDrr.asm b/mc-sema/validator/x86/tests/MAXSDrr.asm deleted file mode 100644 index 9fa306f06..000000000 --- a/mc-sema/validator/x86/tests/MAXSDrr.asm +++ /dev/null @@ -1,18 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -mov ecx, 0x20 -cvtsi2sd xmm0, ecx -mov ecx, 0xFF -cvtsi2sd xmm1, ecx - -;TEST_BEGIN_RECORDING -maxsd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/MAXSSrm.asm b/mc-sema/validator/x86/tests/MAXSSrm.asm deleted file mode 100644 index d31046c06..000000000 --- a/mc-sema/validator/x86/tests/MAXSSrm.asm +++ /dev/null @@ -1,18 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -mov ecx, 0x20 -cvtsi2ss xmm0, ecx -mov ecx, 0x40 -cvtsi2ss xmm1, ecx -;TEST_BEGIN_RECORDING -lea ecx, [esp-4] -movss [ecx], xmm1 -maxss xmm0, [ecx] -mov ecx, 0 -;TEST_END_RECORDING -cvtsi2ss xmm0, ecx -cvtsi2ss xmm1, ecx diff --git a/mc-sema/validator/x86/tests/MAXSSrr.asm b/mc-sema/validator/x86/tests/MAXSSrr.asm deleted file mode 100644 index ad9ad61ff..000000000 --- a/mc-sema/validator/x86/tests/MAXSSrr.asm +++ /dev/null @@ -1,18 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -mov ecx, 40 -cvtsi2ss xmm0, ecx -mov ecx, 10 -cvtsi2ss xmm1, ecx - -;TEST_BEGIN_RECORDING -maxss xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2ss xmm0, ecx -cvtsi2ss xmm1, ecx diff --git a/mc-sema/validator/x86/tests/MINSDrm.asm b/mc-sema/validator/x86/tests/MINSDrm.asm deleted file mode 100644 index 91b8b4e2f..000000000 --- a/mc-sema/validator/x86/tests/MINSDrm.asm +++ /dev/null @@ -1,20 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -mov ecx, 0xABCDEF -cvtsi2sd xmm0, ecx -mov ecx, 0x012349 -cvtsi2sd xmm1, ecx -;TEST_BEGIN_RECORDING -lea ecx, [esp-8] -movsd [ecx], xmm1 -minsd xmm0, [ecx] -mov ecx, 0 -;TEST_END_RECORDING -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - - diff --git a/mc-sema/validator/x86/tests/MINSDrr.asm b/mc-sema/validator/x86/tests/MINSDrr.asm deleted file mode 100644 index 3155c6480..000000000 --- a/mc-sema/validator/x86/tests/MINSDrr.asm +++ /dev/null @@ -1,18 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -mov ecx, 0x20F -cvtsi2sd xmm0, ecx -mov ecx, 0xFFFFFF -cvtsi2sd xmm1, ecx - -;TEST_BEGIN_RECORDING -minsd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/MINSSrm.asm b/mc-sema/validator/x86/tests/MINSSrm.asm deleted file mode 100644 index 052cff8e6..000000000 --- a/mc-sema/validator/x86/tests/MINSSrm.asm +++ /dev/null @@ -1,18 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -mov ecx, 0xFFFF20 -cvtsi2ss xmm0, ecx -mov ecx, 0x40 -cvtsi2ss xmm1, ecx -;TEST_BEGIN_RECORDING -lea ecx, [esp-4] -movss [ecx], xmm1 -minss xmm0, [ecx] -mov ecx, 0 -;TEST_END_RECORDING -cvtsi2ss xmm0, ecx -cvtsi2ss xmm1, ecx diff --git a/mc-sema/validator/x86/tests/MINSSrr.asm b/mc-sema/validator/x86/tests/MINSSrr.asm deleted file mode 100644 index 0a4391e13..000000000 --- a/mc-sema/validator/x86/tests/MINSSrr.asm +++ /dev/null @@ -1,19 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -mov ecx, 0xFFFFFF00 -cvtsi2ss xmm0, ecx -mov ecx, 10 -cvtsi2ss xmm1, ecx - -;TEST_BEGIN_RECORDING -minss xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2ss xmm0, ecx -cvtsi2ss xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/MOV16ri.asm b/mc-sema/validator/x86/tests/MOV16ri.asm deleted file mode 100644 index 7d9d15fe4..000000000 --- a/mc-sema/validator/x86/tests/MOV16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; MOV16ri - mov bx, 0x24 - ;TEST_BEGIN_RECORDING - mov bx, 0xffcc - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/MOV16rr.asm b/mc-sema/validator/x86/tests/MOV16rr.asm deleted file mode 100644 index 03156cdad..000000000 --- a/mc-sema/validator/x86/tests/MOV16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; MOV16rr - mov ch, 0x2 - mov dh, 0x3 - ;TEST_BEGIN_RECORDING - mov ch, dh - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/MOV32ri.asm b/mc-sema/validator/x86/tests/MOV32ri.asm deleted file mode 100644 index fe5ea09ff..000000000 --- a/mc-sema/validator/x86/tests/MOV32ri.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Mov32RI - ;TEST_BEGIN_RECORDING - mov eax, 0x18111 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/MOV32rr.asm b/mc-sema/validator/x86/tests/MOV32rr.asm deleted file mode 100644 index fdd1b1976..000000000 --- a/mc-sema/validator/x86/tests/MOV32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Mov32RR - mov eax, 0x8 - mov ecx, 0x12 - ;TEST_BEGIN_RECORDING - mov ecx, eax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/MOV8ri.asm b/mc-sema/validator/x86/tests/MOV8ri.asm deleted file mode 100644 index 6ae4840f2..000000000 --- a/mc-sema/validator/x86/tests/MOV8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; MOV8ri - mov ah, 0x2 - ;TEST_BEGIN_RECORDING - mov ah, 0x3 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/MOV8rr.asm b/mc-sema/validator/x86/tests/MOV8rr.asm deleted file mode 100644 index b7bc4f19d..000000000 --- a/mc-sema/validator/x86/tests/MOV8rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; MOV8rr - mov ch, 0x2 - mov dh, 0x3 - ;TEST_BEGIN_RECORDING - mov ch, dh - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/MOVAPDrm.asm b/mc-sema/validator/x86/tests/MOVAPDrm.asm deleted file mode 100644 index 8acbe1f3e..000000000 --- a/mc-sema/validator/x86/tests/MOVAPDrm.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x20] -and ecx, 0xFFFFFFF0 -mov dword [ecx+0x00], 0xABCDEF00 -mov dword [ecx+0x04], 0x01234567 -mov dword [ecx+0x08], 0x98765431 -mov dword [ecx+0x0C], 0xcafebabe - -; store 1 in xmm1 -movaps xmm1, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2ss xmm0, ecx -cvtsi2ss xmm1, ecx diff --git a/mc-sema/validator/x86/tests/MOVAPDrr.asm b/mc-sema/validator/x86/tests/MOVAPDrr.asm deleted file mode 100644 index 3441dde3a..000000000 --- a/mc-sema/validator/x86/tests/MOVAPDrr.asm +++ /dev/null @@ -1,27 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 1 to a single precision float and store in xmm0 -mov ecx, 0 -cvtsi2ss xmm0, ecx -mov ecx, 0xFFFFFFFF -cvtsi2ss xmm2, ecx -mov ecx, 0 -cvtsi2ss xmm3, ecx - -; convert 2 to a single precision float and store in xmm1 -mov ecx, 2 -cvtsi2ss xmm1, ecx - -;TEST_BEGIN_RECORDING -movapd xmm0, xmm1 -movapd xmm2, xmm1 -movapd xmm3, xmm1 -;TEST_END_RECORDING -xor ecx, ecx -cvtsi2ss xmm0, ecx -cvtsi2ss xmm1, ecx -cvtsi2ss xmm3, ecx diff --git a/mc-sema/validator/x86/tests/MOVAPSrm.asm b/mc-sema/validator/x86/tests/MOVAPSrm.asm deleted file mode 100644 index 8acbe1f3e..000000000 --- a/mc-sema/validator/x86/tests/MOVAPSrm.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x20] -and ecx, 0xFFFFFFF0 -mov dword [ecx+0x00], 0xABCDEF00 -mov dword [ecx+0x04], 0x01234567 -mov dword [ecx+0x08], 0x98765431 -mov dword [ecx+0x0C], 0xcafebabe - -; store 1 in xmm1 -movaps xmm1, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2ss xmm0, ecx -cvtsi2ss xmm1, ecx diff --git a/mc-sema/validator/x86/tests/MOVAPSrr.asm b/mc-sema/validator/x86/tests/MOVAPSrr.asm deleted file mode 100644 index 191511d25..000000000 --- a/mc-sema/validator/x86/tests/MOVAPSrr.asm +++ /dev/null @@ -1,28 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 1 to a single precision float and store in xmm0 -mov ecx, 0 -cvtsi2ss xmm0, ecx -mov ecx, 0xFFFFFFFF -cvtsi2ss xmm2, ecx -mov ecx, 0 -cvtsi2ss xmm3, ecx - -; convert 2 to a single precision float and store in xmm1 -mov ecx, 2 -cvtsi2ss xmm1, ecx - -;TEST_BEGIN_RECORDING -movaps xmm0, xmm1 -movaps xmm2, xmm1 -movaps xmm3, xmm1 -;TEST_END_RECORDING -xor ecx, ecx -cvtsi2ss xmm0, ecx -cvtsi2ss xmm1, ecx -cvtsi2ss xmm3, ecx - diff --git a/mc-sema/validator/x86/tests/MOVDI2PDIrm.asm b/mc-sema/validator/x86/tests/MOVDI2PDIrm.asm deleted file mode 100644 index 9a687066a..000000000 --- a/mc-sema/validator/x86/tests/MOVDI2PDIrm.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -mov eax, 2 - -;TEST_BEGIN_RECORDING -lea ecx, [esp-4] -mov [ecx], eax -movd xmm0, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/MOVDI2PDIrr.asm b/mc-sema/validator/x86/tests/MOVDI2PDIrr.asm deleted file mode 100644 index 34061df5a..000000000 --- a/mc-sema/validator/x86/tests/MOVDI2PDIrr.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 - -;TEST_BEGIN_RECORDING -MOVD xmm0, ecx -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/MOVHLPSrr.asm b/mc-sema/validator/x86/tests/MOVHLPSrr.asm deleted file mode 100644 index 9bdc93a01..000000000 --- a/mc-sema/validator/x86/tests/MOVHLPSrr.asm +++ /dev/null @@ -1,25 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x20] -and ecx, 0xFFFFFFF0 -mov dword [ecx+0x00], 0xABCDEF00 -mov dword [ecx+0x04], 0x01234567 -mov dword [ecx+0x08], 0x98765431 -mov dword [ecx+0x0C], 0xcabbbab5 -movaps xmm0, [ecx] -mov dword [ecx+0x00], 0xf00dbad0 -mov dword [ecx+0x04], 0xcafebabe -mov dword [ecx+0x08], 0x1badb0b0 -mov dword [ecx+0x0C], 0xfeedbeef -movaps xmm1, [ecx] - -movhlps xmm1, xmm0 -mov ecx, 0 -;TEST_END_RECORDING -cvtsi2ss xmm0, ecx -cvtsi2ss xmm1, ecx diff --git a/mc-sema/validator/x86/tests/MOVLHPSrr.asm b/mc-sema/validator/x86/tests/MOVLHPSrr.asm deleted file mode 100644 index 548e12b59..000000000 --- a/mc-sema/validator/x86/tests/MOVLHPSrr.asm +++ /dev/null @@ -1,26 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x20] -and ecx, 0xFFFFFFF0 -mov dword [ecx+0x00], 0xABCDEF00 -mov dword [ecx+0x04], 0x01234567 -mov dword [ecx+0x08], 0x98765431 -mov dword [ecx+0x0C], 0xcabbbab5 -movaps xmm0, [ecx] -mov dword [ecx+0x00], 0xf00dbad0 -mov dword [ecx+0x04], 0xcafebabe -mov dword [ecx+0x08], 0x1badb0b0 -mov dword [ecx+0x0C], 0xfeedbeef -movaps xmm1, [ecx] - -movlhps xmm1, xmm0 -mov ecx, 0 -;TEST_END_RECORDING -cvtsi2ss xmm0, ecx -cvtsi2ss xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/MOVLPDmr.asm b/mc-sema/validator/x86/tests/MOVLPDmr.asm deleted file mode 100644 index 3a076276c..000000000 --- a/mc-sema/validator/x86/tests/MOVLPDmr.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 0xbadf00d to a double precision float and store in xmm0 -mov ecx, 0xbadf00d -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -; load badf00d (in double precision float form) -lea ecx, [esp-8] -movlpd [ecx], xmm0 - -mov eax, [ecx+0] -mov ebx, [ecx+4] -mov ecx, 0 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/MOVLPDrm.asm b/mc-sema/validator/x86/tests/MOVLPDrm.asm deleted file mode 100644 index 5c97e12d6..000000000 --- a/mc-sema/validator/x86/tests/MOVLPDrm.asm +++ /dev/null @@ -1,23 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 1 to a double precision float and store in xmm0 -mov ecx, 1 -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -; load 2.5 (in double precision float form) -lea ecx, [esp-8] -mov DWORD [ecx], 0 -mov DWORD [ecx+4], 0x40040000 - -movlpd xmm0, [ecx] -mov ecx, [ecx] -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx - diff --git a/mc-sema/validator/x86/tests/MOVPDI2DImr.asm b/mc-sema/validator/x86/tests/MOVPDI2DImr.asm deleted file mode 100644 index f54dc11e4..000000000 --- a/mc-sema/validator/x86/tests/MOVPDI2DImr.asm +++ /dev/null @@ -1,18 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -mov ecx, 2 -MOVD xmm0, ecx -mov ecx, 0 - -;TEST_BEGIN_RECORDING -lea ecx, [esp-4] -movd [ecx], xmm0 -mov eax, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/MOVPDI2DIrr.asm b/mc-sema/validator/x86/tests/MOVPDI2DIrr.asm deleted file mode 100644 index d92bb7f6e..000000000 --- a/mc-sema/validator/x86/tests/MOVPDI2DIrr.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 -MOVD xmm0, ecx -mov ecx, 0 - -;TEST_BEGIN_RECORDING -MOVD eax, xmm0 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/MOVSDmr.asm b/mc-sema/validator/x86/tests/MOVSDmr.asm deleted file mode 100644 index d05ad368a..000000000 --- a/mc-sema/validator/x86/tests/MOVSDmr.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 0xbadf00d to a double precision float and store in xmm0 -mov ecx, 0xbadf00d -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -; load badf00d (in double precision float form) -lea ecx, [esp-8] -movsd [ecx], xmm0 - -mov eax, [ecx+0] -mov ebx, [ecx+4] -mov ecx, 0 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/MOVSDrm.asm b/mc-sema/validator/x86/tests/MOVSDrm.asm deleted file mode 100644 index 0554d7e7c..000000000 --- a/mc-sema/validator/x86/tests/MOVSDrm.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 1 to a double precision float and store in xmm0 -mov ecx, 1 -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -; load 2.5 (in double precision float form) -lea ecx, [esp-8] -mov DWORD [ecx], 0 -mov DWORD [ecx+4], 0x40040000 - -movsd xmm0, [ecx] -mov ecx, [ecx] -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/MOVSDrr.asm b/mc-sema/validator/x86/tests/MOVSDrr.asm deleted file mode 100644 index 93ac19220..000000000 --- a/mc-sema/validator/x86/tests/MOVSDrr.asm +++ /dev/null @@ -1,20 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 1 to a double precision float and store in xmm0 -mov ecx, 0 -cvtsi2sd xmm0, ecx - -; convert 2 to a double precision float and store in xmm1 -mov ecx, 2 -cvtsi2sd xmm1, ecx - -;TEST_BEGIN_RECORDING -movsd xmm0, xmm1 -;TEST_END_RECORDING -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/MOVSSmr.asm b/mc-sema/validator/x86/tests/MOVSSmr.asm deleted file mode 100644 index 59c8e49a3..000000000 --- a/mc-sema/validator/x86/tests/MOVSSmr.asm +++ /dev/null @@ -1,23 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 1 to a single precision float and store in xmm0 -mov ecx, 1 -cvtsi2ss xmm0, ecx - -;TEST_BEGIN_RECORDING -; load 1 in single floating point form -lea ecx, [esp-8] -movss [ecx], xmm0 - -; value should appear in eax for testing -mov eax, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2ss xmm0, ecx -cvtsi2ss xmm1, ecx diff --git a/mc-sema/validator/x86/tests/MOVSSrm.asm b/mc-sema/validator/x86/tests/MOVSSrm.asm deleted file mode 100644 index 8550fa78f..000000000 --- a/mc-sema/validator/x86/tests/MOVSSrm.asm +++ /dev/null @@ -1,26 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 1 to a single precision float and store in xmm0 -mov ecx, 1 -cvtsi2ss xmm0, ecx -; convert 0 to a single precision float and store in xmm1 -mov ecx, 0 -cvtsi2ss xmm1, ecx - -;TEST_BEGIN_RECORDING -; load 1 in single floating point form -lea ecx, [esp-8] -movss [ecx], xmm0 - -; store 1 in xmm1 -movss xmm1, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2ss xmm0, ecx -cvtsi2ss xmm1, ecx diff --git a/mc-sema/validator/x86/tests/MOVSSrr.asm b/mc-sema/validator/x86/tests/MOVSSrr.asm deleted file mode 100644 index 351e6effa..000000000 --- a/mc-sema/validator/x86/tests/MOVSSrr.asm +++ /dev/null @@ -1,27 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 1 to a single precision float and store in xmm0 -mov ecx, 0 -cvtsi2ss xmm0, ecx -mov ecx, 0xFFFFFFFF -cvtsi2ss xmm2, ecx -mov ecx, 0 -cvtsi2ss xmm3, ecx - -; convert 2 to a single precision float and store in xmm1 -mov ecx, 2 -cvtsi2ss xmm1, ecx - -;TEST_BEGIN_RECORDING -movss xmm0, xmm1 -movss xmm2, xmm1 -movss xmm3, xmm1 -;TEST_END_RECORDING -xor ecx, ecx -cvtsi2ss xmm0, ecx -cvtsi2ss xmm1, ecx -cvtsi2ss xmm3, ecx diff --git a/mc-sema/validator/x86/tests/MOVSX16rr8.asm b/mc-sema/validator/x86/tests/MOVSX16rr8.asm deleted file mode 100644 index 5809c072a..000000000 --- a/mc-sema/validator/x86/tests/MOVSX16rr8.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; MOVSX16rr8 - mov bx, 0x3000 - mov bl, 0x35 - ;TEST_BEGIN_RECORDING - movsx bx, bl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/MOVSX32rr16.asm b/mc-sema/validator/x86/tests/MOVSX32rr16.asm deleted file mode 100644 index 0a2dc329d..000000000 --- a/mc-sema/validator/x86/tests/MOVSX32rr16.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; MOVSX32rr16 - mov eax, 0x55555 - mov ax, 0x3333 - ;TEST_BEGIN_RECORDING - movsx eax, ax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/MOVSX32rr8.asm b/mc-sema/validator/x86/tests/MOVSX32rr8.asm deleted file mode 100644 index 996e20b10..000000000 --- a/mc-sema/validator/x86/tests/MOVSX32rr8.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; MOVSX32rr8 - mov eax, 0x55555 - mov ah, 0x3 - ;TEST_BEGIN_RECORDING - movsx eax, ah - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/MOVZX16rr8.asm b/mc-sema/validator/x86/tests/MOVZX16rr8.asm deleted file mode 100644 index 345d0cae1..000000000 --- a/mc-sema/validator/x86/tests/MOVZX16rr8.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; MOVZX16rr8 - mov bx, 0x2 - mov bl, 0x3 - ;TEST_BEGIN_RECORDING - movzx bx, bl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/MOVZX32rr16.asm b/mc-sema/validator/x86/tests/MOVZX32rr16.asm deleted file mode 100644 index f198c0c31..000000000 --- a/mc-sema/validator/x86/tests/MOVZX32rr16.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; MovZx32RR16 - mov eax, 0x18 - mov ebx, 0 - ;TEST_BEGIN_RECORDING - movzx ebx, ax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/MOVZX32rr8.asm b/mc-sema/validator/x86/tests/MOVZX32rr8.asm deleted file mode 100644 index bc74eead8..000000000 --- a/mc-sema/validator/x86/tests/MOVZX32rr8.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; MOVZX32rr8 - mov edx, 0x12 - mov dh, 0x3 - ;TEST_BEGIN_RECORDING - movzx edx, dh - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/MUL16r.asm b/mc-sema/validator/x86/tests/MUL16r.asm deleted file mode 100644 index 365193ab7..000000000 --- a/mc-sema/validator/x86/tests/MUL16r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; MUL16r - mov ax, 0xFFF - mov cx, 0xCCC - ;TEST_BEGIN_RECORDING - mul cx - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/MUL8r.asm b/mc-sema/validator/x86/tests/MUL8r.asm deleted file mode 100644 index 8ef928506..000000000 --- a/mc-sema/validator/x86/tests/MUL8r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; MUL8r - mov al, 0xFF - mov cl, 0xCC - ;TEST_BEGIN_RECORDING - mul cl - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/MULSDrm.asm b/mc-sema/validator/x86/tests/MULSDrm.asm deleted file mode 100644 index b414e861b..000000000 --- a/mc-sema/validator/x86/tests/MULSDrm.asm +++ /dev/null @@ -1,23 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 5 to a double precision float and store in xmm0 -mov ecx, 5 -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -; load 2.5 (in double precision float form) -lea ecx, [esp-8] -mov DWORD [ecx], 0 -mov DWORD [ecx+4], 0x40040000 - -mulsd xmm0, [ecx] -mov ecx, [ecx] -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx - diff --git a/mc-sema/validator/x86/tests/MULSDrr.asm b/mc-sema/validator/x86/tests/MULSDrr.asm deleted file mode 100644 index 5dde818aa..000000000 --- a/mc-sema/validator/x86/tests/MULSDrr.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 3 to a double precision float and store in xmm0 -mov ecx, 3 -cvtsi2sd xmm0, ecx - -; convert 7 to a double precision float and store in xmm1 -mov ecx, 7 -cvtsi2sd xmm1, ecx - -;TEST_BEGIN_RECORDING -mulsd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/MULSSrm.asm b/mc-sema/validator/x86/tests/MULSSrm.asm deleted file mode 100644 index 8382306a9..000000000 --- a/mc-sema/validator/x86/tests/MULSSrm.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 11 to a double precision float and store in xmm0 -mov ecx, 11 -cvtsi2ss xmm0, ecx - -;TEST_BEGIN_RECORDING -; load 1.5 (in double precision float form) -lea ecx, [esp-4] -mov DWORD [ecx], 0x3fc00000 - -mulss xmm0, [ecx] -mov ecx, [ecx] -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/MULSSrr.asm b/mc-sema/validator/x86/tests/MULSSrr.asm deleted file mode 100644 index 8c74e5343..000000000 --- a/mc-sema/validator/x86/tests/MULSSrr.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 5 to a double precision float and store in xmm0 -mov ecx, 5 -cvtsi2ss xmm0, ecx - -; convert 11 to a double precision float and store in xmm1 -mov ecx, 11 -cvtsi2ss xmm1, ecx - -;TEST_BEGIN_RECORDING -mulss xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/MUL_F32m.asm b/mc-sema/validator/x86/tests/MUL_F32m.asm deleted file mode 100644 index 411a4b626..000000000 --- a/mc-sema/validator/x86/tests/MUL_F32m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -;TEST_BEGIN_RECORDING -lea edi, [esp-0xC] -FST dword [edi] -FMUL dword [edi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/MUL_F64m.asm b/mc-sema/validator/x86/tests/MUL_F64m.asm deleted file mode 100644 index 5399e6978..000000000 --- a/mc-sema/validator/x86/tests/MUL_F64m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -;TEST_BEGIN_RECORDING -lea edi, [esp-0xC] -FST qword [edi] -FMUL qword [edi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/MUL_FST0r.asm b/mc-sema/validator/x86/tests/MUL_FST0r.asm deleted file mode 100644 index d20304627..000000000 --- a/mc-sema/validator/x86/tests/MUL_FST0r.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - -; set up st0 and st1 to be pi -FLDPI -FLDPI -;TEST_BEGIN_RECORDING -FMUL st0, st1 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/MUL_FrST0.asm b/mc-sema/validator/x86/tests/MUL_FrST0.asm deleted file mode 100644 index dd15c80f6..000000000 --- a/mc-sema/validator/x86/tests/MUL_FrST0.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - -; set up st0 and st1 to be pi -FLDPI -FLDPI -;TEST_BEGIN_RECORDING -FMUL st1, st0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/NEG16r.asm b/mc-sema/validator/x86/tests/NEG16r.asm deleted file mode 100644 index be0e8ac2e..000000000 --- a/mc-sema/validator/x86/tests/NEG16r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; NEG16r - mov bx, 0x10 - ;TEST_BEGIN_RECORDING - neg bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/NEG32r.asm b/mc-sema/validator/x86/tests/NEG32r.asm deleted file mode 100644 index 23d242e1a..000000000 --- a/mc-sema/validator/x86/tests/NEG32r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Neg32R - mov ebx, 0x26 - ;TEST_BEGIN_RECORDING - neg ebx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/NEG8r.asm b/mc-sema/validator/x86/tests/NEG8r.asm deleted file mode 100644 index fca39095b..000000000 --- a/mc-sema/validator/x86/tests/NEG8r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; NEG8r - mov dl, 0x1 - ;TEST_BEGIN_RECORDING - neg dl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/NOOP.asm b/mc-sema/validator/x86/tests/NOOP.asm deleted file mode 100644 index ae7e46cc9..000000000 --- a/mc-sema/validator/x86/tests/NOOP.asm +++ /dev/null @@ -1,9 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; NOOP - ;TEST_BEGIN_RECORDING - nop - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/NOT16r.asm b/mc-sema/validator/x86/tests/NOT16r.asm deleted file mode 100644 index e19d0982e..000000000 --- a/mc-sema/validator/x86/tests/NOT16r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; NOT16r - mov cx, 0x8 - ;TEST_BEGIN_RECORDING - not cx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/NOT32r.asm b/mc-sema/validator/x86/tests/NOT32r.asm deleted file mode 100644 index c85575515..000000000 --- a/mc-sema/validator/x86/tests/NOT32r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Not32R - mov eax, 0x21 - ;TEST_BEGIN_RECORDING - not eax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/NOT8r.asm b/mc-sema/validator/x86/tests/NOT8r.asm deleted file mode 100644 index 0a69f64bb..000000000 --- a/mc-sema/validator/x86/tests/NOT8r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; NOT8r - mov dl, 0xaa - ;TEST_BEGIN_RECORDING - not dl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/OR16i16.asm b/mc-sema/validator/x86/tests/OR16i16.asm deleted file mode 100644 index de5f1f466..000000000 --- a/mc-sema/validator/x86/tests/OR16i16.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; OR16i16 - mov ax, 0x3333 - ;TEST_BEGIN_RECORDING - or ax, 0xeeee - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/OR16ri.asm b/mc-sema/validator/x86/tests/OR16ri.asm deleted file mode 100644 index 8f52834f5..000000000 --- a/mc-sema/validator/x86/tests/OR16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; OR16ri - mov bx, 0x1212 - ;TEST_BEGIN_RECORDING - or bx, 0x444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/OR16rm.asm b/mc-sema/validator/x86/tests/OR16rm.asm deleted file mode 100644 index 2b5999726..000000000 --- a/mc-sema/validator/x86/tests/OR16rm.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; OR16rm - ;TEST_BEGIN_RECORDING - lea edi, [esp-0x6] - mov WORD [edi], 0x1234 - mov ax, 0x5678 - or ax, [edi] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/OR16rr.asm b/mc-sema/validator/x86/tests/OR16rr.asm deleted file mode 100644 index 1752e55e8..000000000 --- a/mc-sema/validator/x86/tests/OR16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; OR16rr - mov cx, 0x0 - mov dx, 0x1 - ;TEST_BEGIN_RECORDING - or cx, dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/OR32i32.asm b/mc-sema/validator/x86/tests/OR32i32.asm deleted file mode 100644 index 341c824ba..000000000 --- a/mc-sema/validator/x86/tests/OR32i32.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; OR32i32 - mov eax, 0x7 - ;TEST_BEGIN_RECORDING - or eax, 0x6fffffff - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/OR32mi.asm b/mc-sema/validator/x86/tests/OR32mi.asm deleted file mode 100644 index ceb3902dc..000000000 --- a/mc-sema/validator/x86/tests/OR32mi.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; OR32mi - ;TEST_BEGIN_RECORDING - lea edi, [esp-0x4] - mov DWORD [edi], 0xabcd1234 - or DWORD [edi], 0x5678fedc - mov edx, [edi] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/OR32mr.asm b/mc-sema/validator/x86/tests/OR32mr.asm deleted file mode 100644 index 10a62f8e0..000000000 --- a/mc-sema/validator/x86/tests/OR32mr.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; OR32mr - ;TEST_BEGIN_RECORDING - lea edi, [esp-0x4] - mov DWORD [edi], 0x1234abcd - mov eax, 0x5678fedc - or [edi], eax - mov edx, [edi] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/OR32ri.asm b/mc-sema/validator/x86/tests/OR32ri.asm deleted file mode 100644 index 9fa09aa0f..000000000 --- a/mc-sema/validator/x86/tests/OR32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; OR32ri - mov ebx, 0x7 - ;TEST_BEGIN_RECORDING - or ebx, 0x44444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/OR32rr.asm b/mc-sema/validator/x86/tests/OR32rr.asm deleted file mode 100644 index 89a73dd6f..000000000 --- a/mc-sema/validator/x86/tests/OR32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; OR32rr - mov ecx, 0x0 - mov edx, 0x1 - ;TEST_BEGIN_RECORDING - or ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/OR8i8.asm b/mc-sema/validator/x86/tests/OR8i8.asm deleted file mode 100644 index 1519d2abd..000000000 --- a/mc-sema/validator/x86/tests/OR8i8.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; OR8i8 - mov al, 0x6 - ;TEST_BEGIN_RECORDING - or al, 0x2 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/OR8ri.asm b/mc-sema/validator/x86/tests/OR8ri.asm deleted file mode 100644 index 0c6d518ee..000000000 --- a/mc-sema/validator/x86/tests/OR8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; OR8ri - mov bh, 0x45 - ;TEST_BEGIN_RECORDING - or bh, 0x82 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/OR8rr.asm b/mc-sema/validator/x86/tests/OR8rr.asm deleted file mode 100644 index 8bd63d60f..000000000 --- a/mc-sema/validator/x86/tests/OR8rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; Or8RR - mov al, 0x5E - mov ah, 0x13 - ;TEST_BEGIN_RECORDING - or al, ah - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ORPDrm.asm b/mc-sema/validator/x86/tests/ORPDrm.asm deleted file mode 100644 index a7c2113e1..000000000 --- a/mc-sema/validator/x86/tests/ORPDrm.asm +++ /dev/null @@ -1,34 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-17] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x12345678 -mov DWORD [ecx+4], 0x55555555 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -;TEST_BEGIN_RECORDING -lea ecx, [esp-17] -and ecx, 0xfffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [ecx], 0xabcdef12 -mov DWORD [ecx+4], 0xaaaaaaaa -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0xfeeb1e01 - -orpd xmm0, [ecx] -mov ecx, [ecx] -xor ecx, ecx -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/ORPDrr.asm b/mc-sema/validator/x86/tests/ORPDrr.asm deleted file mode 100644 index d98e617c7..000000000 --- a/mc-sema/validator/x86/tests/ORPDrr.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x55555555 -mov DWORD [ecx+4], 0x14530451 -mov DWORD [ecx+8], 0x1badb002 -mov DWORD [ecx+12], 0xf0f0f0f0 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xaaaaaaaa -mov DWORD [ecx+4], 0xcafebabe -mov DWORD [ecx+8], 0x2badb002 -mov DWORD [ecx+12], 0x0e0e0e0e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -orpd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/ORPSrm.asm b/mc-sema/validator/x86/tests/ORPSrm.asm deleted file mode 100644 index 2f067d6ec..000000000 --- a/mc-sema/validator/x86/tests/ORPSrm.asm +++ /dev/null @@ -1,34 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-17] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x12345678 -mov DWORD [ecx+4], 0x55555555 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -;TEST_BEGIN_RECORDING -lea ecx, [esp-17] -and ecx, 0xfffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [ecx], 0xabcdef12 -mov DWORD [ecx+4], 0xaaaaaaaa -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0xfeeb1e01 - -orps xmm0, [ecx] -mov ecx, [ecx] -xor ecx, ecx -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/ORPSrr.asm b/mc-sema/validator/x86/tests/ORPSrr.asm deleted file mode 100644 index 9c5673412..000000000 --- a/mc-sema/validator/x86/tests/ORPSrr.asm +++ /dev/null @@ -1,32 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x55555555 -mov DWORD [ecx+4], 0x14530451 -mov DWORD [ecx+8], 0x1badb002 -mov DWORD [ecx+12], 0xf0f0f0f0 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xaaaaaaaa -mov DWORD [ecx+4], 0xcafebabe -mov DWORD [ecx+8], 0x2badb002 -mov DWORD [ecx+12], 0x0e0e0e0e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -orps xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PADDBrm.asm b/mc-sema/validator/x86/tests/PADDBrm.asm deleted file mode 100644 index 245e941b3..000000000 --- a/mc-sema/validator/x86/tests/PADDBrm.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-17] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x12345678 -mov DWORD [ecx+4], 0x55555555 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -;TEST_BEGIN_RECORDING -lea ecx, [esp-17] -and ecx, 0xfffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [ecx], 0xabcdef12 -mov DWORD [ecx+4], 0xaaaaaaaa -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0xfeeb1e01 - -paddb xmm0, [ecx] -mov ecx, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PADDBrr.asm b/mc-sema/validator/x86/tests/PADDBrr.asm deleted file mode 100644 index 24ffd0124..000000000 --- a/mc-sema/validator/x86/tests/PADDBrr.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x55555555 -mov DWORD [ecx+4], 0x14530451 -mov DWORD [ecx+8], 0x1badb002 -mov DWORD [ecx+12], 0xf0f0f0f0 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xaaaaaaaa -mov DWORD [ecx+4], 0xcafebabe -mov DWORD [ecx+8], 0x2badb002 -mov DWORD [ecx+12], 0x0e0e0e0e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -paddb xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PADDDrm.asm b/mc-sema/validator/x86/tests/PADDDrm.asm deleted file mode 100644 index 253114bda..000000000 --- a/mc-sema/validator/x86/tests/PADDDrm.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-17] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x12345678 -mov DWORD [ecx+4], 0x55555555 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -;TEST_BEGIN_RECORDING -lea ecx, [esp-17] -and ecx, 0xfffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [ecx], 0xabcdef12 -mov DWORD [ecx+4], 0xaaaaaaaa -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0xfeeb1e01 - -paddd xmm0, [ecx] -mov ecx, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PADDDrr.asm b/mc-sema/validator/x86/tests/PADDDrr.asm deleted file mode 100644 index 38ae1cab4..000000000 --- a/mc-sema/validator/x86/tests/PADDDrr.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x55555555 -mov DWORD [ecx+4], 0x14530451 -mov DWORD [ecx+8], 0x1badb002 -mov DWORD [ecx+12], 0xf0f0f0f0 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xaaaaaaaa -mov DWORD [ecx+4], 0xcafebabe -mov DWORD [ecx+8], 0x2badb002 -mov DWORD [ecx+12], 0x0e0e0e0e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -paddd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PADDQrm.asm b/mc-sema/validator/x86/tests/PADDQrm.asm deleted file mode 100644 index 227d32af9..000000000 --- a/mc-sema/validator/x86/tests/PADDQrm.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-17] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x12345678 -mov DWORD [ecx+4], 0x55555555 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -;TEST_BEGIN_RECORDING -lea ecx, [esp-17] -and ecx, 0xfffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [ecx], 0xabcdef12 -mov DWORD [ecx+4], 0xaaaaaaaa -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0xfeeb1e01 - -paddq xmm0, [ecx] -mov ecx, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PADDQrr.asm b/mc-sema/validator/x86/tests/PADDQrr.asm deleted file mode 100644 index 45a8092d1..000000000 --- a/mc-sema/validator/x86/tests/PADDQrr.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x55555555 -mov DWORD [ecx+4], 0x14530451 -mov DWORD [ecx+8], 0x1badb002 -mov DWORD [ecx+12], 0xf0f0f0f0 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xaaaaaaaa -mov DWORD [ecx+4], 0xcafebabe -mov DWORD [ecx+8], 0x2badb002 -mov DWORD [ecx+12], 0x0e0e0e0e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -paddq xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PADDWrm.asm b/mc-sema/validator/x86/tests/PADDWrm.asm deleted file mode 100644 index c60ec5b78..000000000 --- a/mc-sema/validator/x86/tests/PADDWrm.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-17] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x12345678 -mov DWORD [ecx+4], 0x55555555 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -;TEST_BEGIN_RECORDING -lea ecx, [esp-17] -and ecx, 0xfffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [ecx], 0xabcdef12 -mov DWORD [ecx+4], 0xaaaaaaaa -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0xfeeb1e01 - -paddw xmm0, [ecx] -mov ecx, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PADDWrr.asm b/mc-sema/validator/x86/tests/PADDWrr.asm deleted file mode 100644 index 565f58654..000000000 --- a/mc-sema/validator/x86/tests/PADDWrr.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x55555555 -mov DWORD [ecx+4], 0x14530451 -mov DWORD [ecx+8], 0x1badb002 -mov DWORD [ecx+12], 0xf0f0f0f0 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xaaaaaaaa -mov DWORD [ecx+4], 0xcafebabe -mov DWORD [ecx+8], 0x2badb002 -mov DWORD [ecx+12], 0x0e0e0e0e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -paddw xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PANDNrm.asm b/mc-sema/validator/x86/tests/PANDNrm.asm deleted file mode 100644 index 9844af78d..000000000 --- a/mc-sema/validator/x86/tests/PANDNrm.asm +++ /dev/null @@ -1,34 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-17] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x12345678 -mov DWORD [ecx+4], 0x55555555 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -;TEST_BEGIN_RECORDING -lea ecx, [esp-17] -and ecx, 0xfffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [ecx], 0xabcdef12 -mov DWORD [ecx+4], 0xaaaaaaaa -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0xfeeb1e01 - -pandn xmm0, [ecx] -mov ecx, [ecx] -xor ecx, ecx -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PANDNrr.asm b/mc-sema/validator/x86/tests/PANDNrr.asm deleted file mode 100644 index 0d87e4e4c..000000000 --- a/mc-sema/validator/x86/tests/PANDNrr.asm +++ /dev/null @@ -1,32 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x55555555 -mov DWORD [ecx+4], 0x14530451 -mov DWORD [ecx+8], 0x1badb002 -mov DWORD [ecx+12], 0xf0f0f0f0 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xaaaaaaaa -mov DWORD [ecx+4], 0xcafebabe -mov DWORD [ecx+8], 0x2badb002 -mov DWORD [ecx+12], 0x0e0e0e0e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -pandn xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PANDrm.asm b/mc-sema/validator/x86/tests/PANDrm.asm deleted file mode 100644 index 6e3aeb218..000000000 --- a/mc-sema/validator/x86/tests/PANDrm.asm +++ /dev/null @@ -1,34 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-17] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x12345678 -mov DWORD [ecx+4], 0x55555555 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -;TEST_BEGIN_RECORDING -lea ecx, [esp-17] -and ecx, 0xfffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [ecx], 0xabcdef12 -mov DWORD [ecx+4], 0xaaaaaaaa -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0xfeeb1e01 - -pand xmm0, [ecx] -mov ecx, [ecx] -xor ecx, ecx -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PANDrr.asm b/mc-sema/validator/x86/tests/PANDrr.asm deleted file mode 100644 index a1f83d4e1..000000000 --- a/mc-sema/validator/x86/tests/PANDrr.asm +++ /dev/null @@ -1,32 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x55555555 -mov DWORD [ecx+4], 0x14530451 -mov DWORD [ecx+8], 0x1badb002 -mov DWORD [ecx+12], 0xf0f0f0f0 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xaaaaaaaa -mov DWORD [ecx+4], 0xcafebabe -mov DWORD [ecx+8], 0x2badb002 -mov DWORD [ecx+12], 0x0e0e0e0e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -pand xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PBLENDVBrm.asm b/mc-sema/validator/x86/tests/PBLENDVBrm.asm deleted file mode 100644 index a863825db..000000000 --- a/mc-sema/validator/x86/tests/PBLENDVBrm.asm +++ /dev/null @@ -1,39 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x20] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xaaaaaaaa -mov DWORD [ecx+4], 0xcafebabe -mov DWORD [ecx+8], 0x2badb002 -mov DWORD [ecx+12], 0x0e0e0e0e -movaps xmm1, [ecx] - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0xf010803a -mov DWORD [ecx+4], 0x21fe2abe -mov DWORD [ecx+8], 0x3b087072 -mov DWORD [ecx+12], 0x1e0efe0e -movaps xmm0, [ecx] - -; load a 128 bit value into xmm2 -mov DWORD [ecx], 0x55555555 -mov DWORD [ecx+4], 0x14530451 -mov DWORD [ecx+8], 0x1badb002 -mov DWORD [ecx+12], 0xf0f0f0f0 - - -pblendvb xmm1, [ecx], xmm0 -mov ecx, 0 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PBLENDVBrr.asm b/mc-sema/validator/x86/tests/PBLENDVBrr.asm deleted file mode 100644 index 31d01fdd4..000000000 --- a/mc-sema/validator/x86/tests/PBLENDVBrr.asm +++ /dev/null @@ -1,39 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_OF|FLAG_PF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x20] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x55555555 -mov DWORD [ecx+4], 0x14530451 -mov DWORD [ecx+8], 0x1badb002 -mov DWORD [ecx+12], 0xf0f0f0f0 -movaps xmm2, [ecx] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xaaaaaaaa -mov DWORD [ecx+4], 0xcafebabe -mov DWORD [ecx+8], 0x2badb002 -mov DWORD [ecx+12], 0x0e0e0e0e -movaps xmm1, [ecx] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xf010803a -mov DWORD [ecx+4], 0x21fe2abe -mov DWORD [ecx+8], 0x3b087072 -mov DWORD [ecx+12], 0x1e0efe0e -movaps xmm0, [ecx] - -pblendvb xmm1, xmm2, xmm0 -mov ecx, 0 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PCMPEQBrm.asm b/mc-sema/validator/x86/tests/PCMPEQBrm.asm deleted file mode 100644 index 6b61bb83d..000000000 --- a/mc-sema/validator/x86/tests/PCMPEQBrm.asm +++ /dev/null @@ -1,34 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-17] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x00d05602 -mov DWORD [ecx+4], 0x015105a5 -mov DWORD [ecx+8], 0xd1a21111 -mov DWORD [ecx+12], 0xaaaaaaaa -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -;TEST_BEGIN_RECORDING -lea ecx, [esp-17] -and ecx, 0xfffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [ecx], 0xa10de002 -mov DWORD [ecx+4], 0x120150aa -mov DWORD [ecx+8], 0x4ead1111 -mov DWORD [ecx+12], 0xaaaaaaaa - -pcmpeqb xmm0, [ecx] -mov ecx, [ecx] -xor ecx, ecx -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PCMPEQBrr.asm b/mc-sema/validator/x86/tests/PCMPEQBrr.asm deleted file mode 100644 index 4f2316630..000000000 --- a/mc-sema/validator/x86/tests/PCMPEQBrr.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x11231111 -mov DWORD [ecx+4], 0xa0441011 -mov DWORD [ecx+8], 0xaaaaaaaa -mov DWORD [ecx+12], 0x22f83222 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0x11ba1111 -mov DWORD [ecx+4], 0x0a440a0e -mov DWORD [ecx+8], 0xaaaaaaaa -mov DWORD [ecx+12], 0x221e0e22 -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -pcmpgtb xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PCMPEQDrm.asm b/mc-sema/validator/x86/tests/PCMPEQDrm.asm deleted file mode 100644 index f88c18d65..000000000 --- a/mc-sema/validator/x86/tests/PCMPEQDrm.asm +++ /dev/null @@ -1,34 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-17] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x00d05602 -mov DWORD [ecx+4], 0x015105a5 -mov DWORD [ecx+8], 0xd1a21111 -mov DWORD [ecx+12], 0xaaaaaaaa -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -;TEST_BEGIN_RECORDING -lea ecx, [esp-17] -and ecx, 0xfffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [ecx], 0xa10de002 -mov DWORD [ecx+4], 0x120150aa -mov DWORD [ecx+8], 0x4ead1111 -mov DWORD [ecx+12], 0xaaaaaaaa - -pcmpeqd xmm0, [ecx] -mov ecx, [ecx] -xor ecx, ecx -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PCMPEQDrr.asm b/mc-sema/validator/x86/tests/PCMPEQDrr.asm deleted file mode 100644 index 3f660934f..000000000 --- a/mc-sema/validator/x86/tests/PCMPEQDrr.asm +++ /dev/null @@ -1,32 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x11231111 -mov DWORD [ecx+4], 0xa0441011 -mov DWORD [ecx+8], 0xaaaaaaaa -mov DWORD [ecx+12], 0x22f83222 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0x11ba1111 -mov DWORD [ecx+4], 0x0a440a0e -mov DWORD [ecx+8], 0xaaaaaaaa -mov DWORD [ecx+12], 0x221e0e22 -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -pcmpeqd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PCMPEQQrm.asm b/mc-sema/validator/x86/tests/PCMPEQQrm.asm deleted file mode 100644 index b3b20c70d..000000000 --- a/mc-sema/validator/x86/tests/PCMPEQQrm.asm +++ /dev/null @@ -1,34 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-17] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x00d05602 -mov DWORD [ecx+4], 0x015105a5 -mov DWORD [ecx+8], 0xd1a21111 -mov DWORD [ecx+12], 0xaaaaaaaa -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -;TEST_BEGIN_RECORDING -lea ecx, [esp-17] -and ecx, 0xfffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [ecx], 0xa10de002 -mov DWORD [ecx+4], 0x120150aa -mov DWORD [ecx+8], 0x4ead1111 -mov DWORD [ecx+12], 0xaaaaaaaa - -pcmpeqq xmm0, [ecx] -mov ecx, [ecx] -xor ecx, ecx -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PCMPEQQrr.asm b/mc-sema/validator/x86/tests/PCMPEQQrr.asm deleted file mode 100644 index 2d2f210fc..000000000 --- a/mc-sema/validator/x86/tests/PCMPEQQrr.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x11231111 -mov DWORD [ecx+4], 0xa0441011 -mov DWORD [ecx+8], 0xaaaaaaaa -mov DWORD [ecx+12], 0x22f83222 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0x11ba1111 -mov DWORD [ecx+4], 0x0a440a0e -mov DWORD [ecx+8], 0xaaaaaaaa -mov DWORD [ecx+12], 0x221e0e22 -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -pcmpeqq xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PCMPEQWrm.asm b/mc-sema/validator/x86/tests/PCMPEQWrm.asm deleted file mode 100644 index 6ffa70650..000000000 --- a/mc-sema/validator/x86/tests/PCMPEQWrm.asm +++ /dev/null @@ -1,34 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-17] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x00d05602 -mov DWORD [ecx+4], 0x015105a5 -mov DWORD [ecx+8], 0xd1a21111 -mov DWORD [ecx+12], 0xaaaaaaaa -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -;TEST_BEGIN_RECORDING -lea ecx, [esp-17] -and ecx, 0xfffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [ecx], 0xa10de002 -mov DWORD [ecx+4], 0x120150aa -mov DWORD [ecx+8], 0x4ead1111 -mov DWORD [ecx+12], 0xaaaaaaaa - -pcmpeqw xmm0, [ecx] -mov ecx, [ecx] -xor ecx, ecx -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PCMPEQWrr.asm b/mc-sema/validator/x86/tests/PCMPEQWrr.asm deleted file mode 100644 index d7de44d6d..000000000 --- a/mc-sema/validator/x86/tests/PCMPEQWrr.asm +++ /dev/null @@ -1,32 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x11231111 -mov DWORD [ecx+4], 0xa0441011 -mov DWORD [ecx+8], 0xaaaaaaaa -mov DWORD [ecx+12], 0x22f83222 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0x11ba1111 -mov DWORD [ecx+4], 0x0a440a0e -mov DWORD [ecx+8], 0xaaaaaaaa -mov DWORD [ecx+12], 0x221e0e22 -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -pcmpeqb xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PCMPGTBrm.asm b/mc-sema/validator/x86/tests/PCMPGTBrm.asm deleted file mode 100644 index f1197d013..000000000 --- a/mc-sema/validator/x86/tests/PCMPGTBrm.asm +++ /dev/null @@ -1,34 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-17] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x00d05678 -mov DWORD [ecx+4], 0x015105a5 -mov DWORD [ecx+8], 0xd1a2840f -mov DWORD [ecx+12], 0x10341147 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -;TEST_BEGIN_RECORDING -lea ecx, [esp-17] -and ecx, 0xfffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [ecx], 0xa10de002 -mov DWORD [ecx+4], 0x120150aa -mov DWORD [ecx+8], 0x4ead0e1f -mov DWORD [ecx+12], 0x820b1e01 - -pcmpgtb xmm0, [ecx] -mov ecx, [ecx] -xor ecx, ecx -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PCMPGTBrr.asm b/mc-sema/validator/x86/tests/PCMPGTBrr.asm deleted file mode 100644 index f228919a0..000000000 --- a/mc-sema/validator/x86/tests/PCMPGTBrr.asm +++ /dev/null @@ -1,32 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x01230415 -mov DWORD [ecx+4], 0xa0a31011 -mov DWORD [ecx+8], 0x1b11b10a -mov DWORD [ecx+12], 0x24f832f0 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xaabacada -mov DWORD [ecx+4], 0x0afe0a0e -mov DWORD [ecx+8], 0x24adb012 -mov DWORD [ecx+12], 0x0e1e0e0e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -pcmpgtb xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PCMPGTDrm.asm b/mc-sema/validator/x86/tests/PCMPGTDrm.asm deleted file mode 100644 index bef9da349..000000000 --- a/mc-sema/validator/x86/tests/PCMPGTDrm.asm +++ /dev/null @@ -1,35 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-17] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x00d05678 -mov DWORD [ecx+4], 0x015105a5 -mov DWORD [ecx+8], 0xd1a2840f -mov DWORD [ecx+12], 0x10341147 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -;TEST_BEGIN_RECORDING -lea ecx, [esp-17] -and ecx, 0xfffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [ecx], 0xa10de002 -mov DWORD [ecx+4], 0x120150aa -mov DWORD [ecx+8], 0x4ead0e1f -mov DWORD [ecx+12], 0x820b1e01 - -pcmpgtd xmm0, [ecx] -mov ecx, [ecx] -xor ecx, ecx -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx - diff --git a/mc-sema/validator/x86/tests/PCMPGTDrr.asm b/mc-sema/validator/x86/tests/PCMPGTDrr.asm deleted file mode 100644 index 893289be5..000000000 --- a/mc-sema/validator/x86/tests/PCMPGTDrr.asm +++ /dev/null @@ -1,32 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x01230415 -mov DWORD [ecx+4], 0xa0a31011 -mov DWORD [ecx+8], 0x1b11b10a -mov DWORD [ecx+12], 0x24f832f0 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xaabacada -mov DWORD [ecx+4], 0x0afe0a0e -mov DWORD [ecx+8], 0x24adb012 -mov DWORD [ecx+12], 0x0e1e0e0e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -pcmpgtd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PCMPGTQrm.asm b/mc-sema/validator/x86/tests/PCMPGTQrm.asm deleted file mode 100644 index 3572ccc02..000000000 --- a/mc-sema/validator/x86/tests/PCMPGTQrm.asm +++ /dev/null @@ -1,35 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-17] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x00d05678 -mov DWORD [ecx+4], 0x015105a5 -mov DWORD [ecx+8], 0xd1a2840f -mov DWORD [ecx+12], 0x10341147 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -;TEST_BEGIN_RECORDING -lea ecx, [esp-17] -and ecx, 0xfffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [ecx], 0xa10de002 -mov DWORD [ecx+4], 0x120150aa -mov DWORD [ecx+8], 0x4ead0e1f -mov DWORD [ecx+12], 0x820b1e01 - -pcmpgtq xmm0, [ecx] -mov ecx, [ecx] -xor ecx, ecx -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx - diff --git a/mc-sema/validator/x86/tests/PCMPGTQrr.asm b/mc-sema/validator/x86/tests/PCMPGTQrr.asm deleted file mode 100644 index b64a3eab4..000000000 --- a/mc-sema/validator/x86/tests/PCMPGTQrr.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x01230415 -mov DWORD [ecx+4], 0xa0a31011 -mov DWORD [ecx+8], 0x1b11b10a -mov DWORD [ecx+12], 0x24f832f0 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xaabacada -mov DWORD [ecx+4], 0x0afe0a0e -mov DWORD [ecx+8], 0x24adb012 -mov DWORD [ecx+12], 0x0e1e0e0e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -pcmpgtq xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PCMPGTWrm.asm b/mc-sema/validator/x86/tests/PCMPGTWrm.asm deleted file mode 100644 index 8fc0fca44..000000000 --- a/mc-sema/validator/x86/tests/PCMPGTWrm.asm +++ /dev/null @@ -1,35 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-17] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x00d05678 -mov DWORD [ecx+4], 0x015105a5 -mov DWORD [ecx+8], 0xd1a2840f -mov DWORD [ecx+12], 0x10341147 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -;TEST_BEGIN_RECORDING -lea ecx, [esp-17] -and ecx, 0xfffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [ecx], 0xa10de002 -mov DWORD [ecx+4], 0x120150aa -mov DWORD [ecx+8], 0x4ead0e1f -mov DWORD [ecx+12], 0x820b1e01 - -pcmpgtw xmm0, [ecx] -mov ecx, [ecx] -xor ecx, ecx -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx - diff --git a/mc-sema/validator/x86/tests/PCMPGTWrr.asm b/mc-sema/validator/x86/tests/PCMPGTWrr.asm deleted file mode 100644 index fe8f36491..000000000 --- a/mc-sema/validator/x86/tests/PCMPGTWrr.asm +++ /dev/null @@ -1,32 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x01230415 -mov DWORD [ecx+4], 0xa0a31011 -mov DWORD [ecx+8], 0x1b11b10a -mov DWORD [ecx+12], 0x24f832f0 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xaabacada -mov DWORD [ecx+4], 0x0afe0a0e -mov DWORD [ecx+8], 0x24adb012 -mov DWORD [ecx+12], 0x0e1e0e0e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -pcmpgtw xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PEXTRWmr.asm b/mc-sema/validator/x86/tests/PEXTRWmr.asm deleted file mode 100644 index f699a105b..000000000 --- a/mc-sema/validator/x86/tests/PEXTRWmr.asm +++ /dev/null @@ -1,27 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -mov eax, 0 -mov ecx, 0 -;TEST_BEGIN_RECORDING -lea ebx, [esp-4] -mov dword [ebx], 0 - -lea ecx, [esp-0x30] -and ecx, 0xFFFFFFF0 - -mov dword [ecx+0x00], 0xAAAAAAAA -mov dword [ecx+0x04], 0xBBBBBBBB -mov dword [ecx+0x08], 0xCCCCCCCC -mov dword [ecx+0x0C], 0xDDDDDDDD -movdqu xmm1, [ecx] - -pextrw [ebx], xmm1, 7 -mov ebx, [ebx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PEXTRWri.asm b/mc-sema/validator/x86/tests/PEXTRWri.asm deleted file mode 100644 index 24b3ad71f..000000000 --- a/mc-sema/validator/x86/tests/PEXTRWri.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x30] -and ecx, 0xFFFFFFF0 -mov eax, 0xFFFFFFFF - -mov dword [ecx+0x00], 0xAAAAAAAA -mov dword [ecx+0x04], 0xBBBBBBBB -mov dword [ecx+0x08], 0xCCCCCCCC -mov dword [ecx+0x0C], 0xDDDDDDDD -movdqu xmm1, [ecx] - -pextrw eax, xmm1, 5 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PINSRWrmi.asm b/mc-sema/validator/x86/tests/PINSRWrmi.asm deleted file mode 100644 index 7932c8dcc..000000000 --- a/mc-sema/validator/x86/tests/PINSRWrmi.asm +++ /dev/null @@ -1,26 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -mov eax, 0 -mov ecx, 0 -;TEST_BEGIN_RECORDING -lea eax, [esp-4] -mov dword [eax], 0x99999999 -lea ecx, [esp-0x30] -and ecx, 0xFFFFFFF0 - -mov dword [ecx+0x00], 0xAAAAAAAA -mov dword [ecx+0x04], 0xBBBBBBBB -mov dword [ecx+0x08], 0xCCCCCCCC -mov dword [ecx+0x0C], 0xDDDDDDDD -movdqu xmm1, [ecx] - -pinsrw xmm1, [eax], 7 -mov ecx, 0 -mov eax, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PINSRWrri.asm b/mc-sema/validator/x86/tests/PINSRWrri.asm deleted file mode 100644 index 46021de8f..000000000 --- a/mc-sema/validator/x86/tests/PINSRWrri.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -mov eax, 0xEE -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x30] -and ecx, 0xFFFFFFF0 - -mov dword [ecx+0x00], 0xAAAAAAAA -mov dword [ecx+0x04], 0xBBBBBBBB -mov dword [ecx+0x08], 0xCCCCCCCC -mov dword [ecx+0x0C], 0xDDDDDDDD -movdqu xmm1, [ecx] - -pinsrw xmm1, ax, 5 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PMOVSXBDrm.asm b/mc-sema/validator/x86/tests/PMOVSXBDrm.asm deleted file mode 100644 index 74a331b70..000000000 --- a/mc-sema/validator/x86/tests/PMOVSXBDrm.asm +++ /dev/null @@ -1,23 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x20] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x82345678 -mov DWORD [ecx+4], 0x155785f5 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 - -pmovsxbd xmm0, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PMOVSXBDrr.asm b/mc-sema/validator/x86/tests/PMOVSXBDrr.asm deleted file mode 100644 index 58106e777..000000000 --- a/mc-sema/validator/x86/tests/PMOVSXBDrr.asm +++ /dev/null @@ -1,25 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0x8e1efe2e -mov DWORD [ecx+4], 0x00adb002 -mov DWORD [ecx+8], 0xcafebabe -mov DWORD [ecx+12], 0x8e1efe2e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -pmovsxbd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PMOVSXBQrm.asm b/mc-sema/validator/x86/tests/PMOVSXBQrm.asm deleted file mode 100644 index c5eb54c8e..000000000 --- a/mc-sema/validator/x86/tests/PMOVSXBQrm.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x20] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x82345678 -mov DWORD [ecx+4], 0x155785f5 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 - -pmovsxbq xmm0, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PMOVSXBQrr.asm b/mc-sema/validator/x86/tests/PMOVSXBQrr.asm deleted file mode 100644 index 1488eb8d5..000000000 --- a/mc-sema/validator/x86/tests/PMOVSXBQrr.asm +++ /dev/null @@ -1,25 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0x8e1efe2e -mov DWORD [ecx+4], 0x00adb002 -mov DWORD [ecx+8], 0x00adb002 -mov DWORD [ecx+12], 0x8e1efe2e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -pmovsxbq xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PMOVSXBWrm.asm b/mc-sema/validator/x86/tests/PMOVSXBWrm.asm deleted file mode 100644 index e4bdb0fbd..000000000 --- a/mc-sema/validator/x86/tests/PMOVSXBWrm.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x20] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x82345678 -mov DWORD [ecx+4], 0x155785f5 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 - -pmovsxbw xmm0, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PMOVSXBWrr.asm b/mc-sema/validator/x86/tests/PMOVSXBWrr.asm deleted file mode 100644 index 078905694..000000000 --- a/mc-sema/validator/x86/tests/PMOVSXBWrr.asm +++ /dev/null @@ -1,25 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0x8e1efe2e -mov DWORD [ecx+4], 0x00adb002 -mov DWORD [ecx+8], 0x00adb002 -mov DWORD [ecx+12], 0x8e1efe2e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -pmovsxbw xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PMOVSXDQrm.asm b/mc-sema/validator/x86/tests/PMOVSXDQrm.asm deleted file mode 100644 index f17cc3cc0..000000000 --- a/mc-sema/validator/x86/tests/PMOVSXDQrm.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x20] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x82345678 -mov DWORD [ecx+4], 0x155785f5 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 - -pmovsxdq xmm0, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PMOVSXDQrr.asm b/mc-sema/validator/x86/tests/PMOVSXDQrr.asm deleted file mode 100644 index e0ab49ba9..000000000 --- a/mc-sema/validator/x86/tests/PMOVSXDQrr.asm +++ /dev/null @@ -1,25 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0x8e1efe2e -mov DWORD [ecx+4], 0x00adb002 -mov DWORD [ecx+8], 0x00adb002 -mov DWORD [ecx+12], 0x8e1efe2e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -pmovsxdq xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PMOVSXWDrm.asm b/mc-sema/validator/x86/tests/PMOVSXWDrm.asm deleted file mode 100644 index 0dc632246..000000000 --- a/mc-sema/validator/x86/tests/PMOVSXWDrm.asm +++ /dev/null @@ -1,23 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x20] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x82345678 -mov DWORD [ecx+4], 0x155785f5 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 -movaps xmm0, [ecx] - -pmovsxwd xmm0, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PMOVSXWDrr.asm b/mc-sema/validator/x86/tests/PMOVSXWDrr.asm deleted file mode 100644 index 76f9d94ca..000000000 --- a/mc-sema/validator/x86/tests/PMOVSXWDrr.asm +++ /dev/null @@ -1,25 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0x8e1efe2e -mov DWORD [ecx+4], 0x00adb002 -mov DWORD [ecx+8], 0x00adb002 -mov DWORD [ecx+12], 0x8e1efe2e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -pmovsxwd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PMOVSXWQrm.asm b/mc-sema/validator/x86/tests/PMOVSXWQrm.asm deleted file mode 100644 index 22e6e954b..000000000 --- a/mc-sema/validator/x86/tests/PMOVSXWQrm.asm +++ /dev/null @@ -1,23 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x20] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x82345678 -mov DWORD [ecx+4], 0x155785f5 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 -movaps xmm0, [ecx] - -pmovsxwq xmm0, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PMOVSXWQrr.asm b/mc-sema/validator/x86/tests/PMOVSXWQrr.asm deleted file mode 100644 index c9d93ae76..000000000 --- a/mc-sema/validator/x86/tests/PMOVSXWQrr.asm +++ /dev/null @@ -1,25 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0x8e1efe2e -mov DWORD [ecx+4], 0x00adb002 -mov DWORD [ecx+8], 0x00adb002 -mov DWORD [ecx+12], 0x8e1efe2e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -pmovsxwq xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PMOVZXBDrm.asm b/mc-sema/validator/x86/tests/PMOVZXBDrm.asm deleted file mode 100644 index 95f850d03..000000000 --- a/mc-sema/validator/x86/tests/PMOVZXBDrm.asm +++ /dev/null @@ -1,23 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x20] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x82345678 -mov DWORD [ecx+4], 0x155785f5 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 -movaps xmm0, [ecx] - -pmovzxbd xmm0, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PMOVZXBDrr.asm b/mc-sema/validator/x86/tests/PMOVZXBDrr.asm deleted file mode 100644 index 160b4da05..000000000 --- a/mc-sema/validator/x86/tests/PMOVZXBDrr.asm +++ /dev/null @@ -1,25 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0x8e1efe2e -mov DWORD [ecx+4], 0x00adb002 -mov DWORD [ecx+8], 0x00adb002 -mov DWORD [ecx+12], 0x8e1efe2e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -pmovzxbd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PMOVZXBQrm.asm b/mc-sema/validator/x86/tests/PMOVZXBQrm.asm deleted file mode 100644 index bff018156..000000000 --- a/mc-sema/validator/x86/tests/PMOVZXBQrm.asm +++ /dev/null @@ -1,23 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x20] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x82345678 -mov DWORD [ecx+4], 0x155785f5 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 -movaps xmm0, [ecx] - -pmovzxbq xmm0, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PMOVZXBQrr.asm b/mc-sema/validator/x86/tests/PMOVZXBQrr.asm deleted file mode 100644 index 9b14343a4..000000000 --- a/mc-sema/validator/x86/tests/PMOVZXBQrr.asm +++ /dev/null @@ -1,25 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0x8e1efe2e -mov DWORD [ecx+4], 0x00adb002 -mov DWORD [ecx+8], 0x00adb002 -mov DWORD [ecx+12], 0x8e1efe2e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -pmovzxbq xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PMOVZXBWrm.asm b/mc-sema/validator/x86/tests/PMOVZXBWrm.asm deleted file mode 100644 index 983707be4..000000000 --- a/mc-sema/validator/x86/tests/PMOVZXBWrm.asm +++ /dev/null @@ -1,23 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x20] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x82345678 -mov DWORD [ecx+4], 0x155785f5 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 -movaps xmm0, [ecx] - -pmovzxbw xmm0, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PMOVZXBWrr.asm b/mc-sema/validator/x86/tests/PMOVZXBWrr.asm deleted file mode 100644 index 6a709464d..000000000 --- a/mc-sema/validator/x86/tests/PMOVZXBWrr.asm +++ /dev/null @@ -1,25 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0x8e1efe2e -mov DWORD [ecx+4], 0x00adb002 -mov DWORD [ecx+8], 0x00adb002 -mov DWORD [ecx+12], 0x8e1efe2e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -pmovzxbw xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PMOVZXDQrm.asm b/mc-sema/validator/x86/tests/PMOVZXDQrm.asm deleted file mode 100644 index 0b47c3d77..000000000 --- a/mc-sema/validator/x86/tests/PMOVZXDQrm.asm +++ /dev/null @@ -1,23 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x20] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x82345678 -mov DWORD [ecx+4], 0x155785f5 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 -movaps xmm0, [ecx] - -pmovzxdq xmm0, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PMOVZXDQrr.asm b/mc-sema/validator/x86/tests/PMOVZXDQrr.asm deleted file mode 100644 index fce0db5bc..000000000 --- a/mc-sema/validator/x86/tests/PMOVZXDQrr.asm +++ /dev/null @@ -1,25 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0x8e1efe2e -mov DWORD [ecx+4], 0x00adb002 -mov DWORD [ecx+8], 0x00adb002 -mov DWORD [ecx+12], 0x8e1efe2e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -pmovzxdq xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PMOVZXWDrm.asm b/mc-sema/validator/x86/tests/PMOVZXWDrm.asm deleted file mode 100644 index a04294f08..000000000 --- a/mc-sema/validator/x86/tests/PMOVZXWDrm.asm +++ /dev/null @@ -1,23 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x20] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x82345678 -mov DWORD [ecx+4], 0x155785f5 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 -movaps xmm0, [ecx] - -pmovzxwd xmm0, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PMOVZXWDrr.asm b/mc-sema/validator/x86/tests/PMOVZXWDrr.asm deleted file mode 100644 index 53f3ea587..000000000 --- a/mc-sema/validator/x86/tests/PMOVZXWDrr.asm +++ /dev/null @@ -1,25 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0x8e1efe2e -mov DWORD [ecx+4], 0x00adb002 -mov DWORD [ecx+8], 0x00adb002 -mov DWORD [ecx+12], 0x8e1efe2e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -pmovzxwd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PMOVZXWQrm.asm b/mc-sema/validator/x86/tests/PMOVZXWQrm.asm deleted file mode 100644 index 94966be24..000000000 --- a/mc-sema/validator/x86/tests/PMOVZXWQrm.asm +++ /dev/null @@ -1,23 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x20] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x82345678 -mov DWORD [ecx+4], 0x155785f5 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 -movaps xmm0, [ecx] - -pmovzxwq xmm0, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PMOVZXWQrr.asm b/mc-sema/validator/x86/tests/PMOVZXWQrr.asm deleted file mode 100644 index 488f7fe95..000000000 --- a/mc-sema/validator/x86/tests/PMOVZXWQrr.asm +++ /dev/null @@ -1,25 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0x8e1efe2e -mov DWORD [ecx+4], 0x00adb002 -mov DWORD [ecx+8], 0x00adb002 -mov DWORD [ecx+12], 0x8e1efe2e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -pmovzxwq xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PMULUDQrr.asm b/mc-sema/validator/x86/tests/PMULUDQrr.asm deleted file mode 100644 index 883b9f578..000000000 --- a/mc-sema/validator/x86/tests/PMULUDQrr.asm +++ /dev/null @@ -1,32 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x55555555 -mov DWORD [ecx+4], 0x14530451 -mov DWORD [ecx+8], 0x1badb002 -mov DWORD [ecx+12], 0xf0f0f0f0 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xaaaaaaaa -mov DWORD [ecx+4], 0xcafebabe -mov DWORD [ecx+8], 0x2badb002 -mov DWORD [ecx+12], 0x0e0e0e0e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -pmuludq xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/POP16r.asm b/mc-sema/validator/x86/tests/POP16r.asm deleted file mode 100644 index 83d9c5e09..000000000 --- a/mc-sema/validator/x86/tests/POP16r.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; POP16r - mov cx, 0x77 - xor di, di - ;TEST_BEGIN_RECORDING - push cx - pop di - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/POP32r.asm b/mc-sema/validator/x86/tests/POP32r.asm deleted file mode 100644 index 6c716ecdc..000000000 --- a/mc-sema/validator/x86/tests/POP32r.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; POP32r - mov ecx, 0x7777 - mov edi, 0x0 - ;TEST_BEGIN_RECORDING - push ecx - pop edi - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/PORrm.asm b/mc-sema/validator/x86/tests/PORrm.asm deleted file mode 100644 index 82f43fd33..000000000 --- a/mc-sema/validator/x86/tests/PORrm.asm +++ /dev/null @@ -1,34 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-17] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x12345678 -mov DWORD [ecx+4], 0x55555555 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -;TEST_BEGIN_RECORDING -lea ecx, [esp-17] -and ecx, 0xfffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [ecx], 0xabcdef12 -mov DWORD [ecx+4], 0xaaaaaaaa -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0xfeeb1e01 - -por xmm0, [ecx] -mov ecx, [ecx] -xor ecx, ecx -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PORrr.asm b/mc-sema/validator/x86/tests/PORrr.asm deleted file mode 100644 index 4552a5596..000000000 --- a/mc-sema/validator/x86/tests/PORrr.asm +++ /dev/null @@ -1,32 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x55555555 -mov DWORD [ecx+4], 0x14530451 -mov DWORD [ecx+8], 0x1badb002 -mov DWORD [ecx+12], 0xf0f0f0f0 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xaaaaaaaa -mov DWORD [ecx+4], 0xcafebabe -mov DWORD [ecx+8], 0x2badb002 -mov DWORD [ecx+12], 0x0e0e0e0e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -por xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PSHUFBrm.asm b/mc-sema/validator/x86/tests/PSHUFBrm.asm deleted file mode 100644 index f1bca2192..000000000 --- a/mc-sema/validator/x86/tests/PSHUFBrm.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-17] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0xAABBCCDD -mov DWORD [ecx+4], 0xFFEEDDCC -mov DWORD [ecx+8], 0x11223344 -mov DWORD [ecx+12], 0x55667788 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -;TEST_BEGIN_RECORDING -lea ecx, [esp-17] -and ecx, 0xfffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [ecx], 0xBBAA9988 -mov DWORD [ecx+4], 0x77665544 -mov DWORD [ecx+8], 0x33221100 -mov DWORD [ecx+12], 0xABACADAE - -pshufb xmm0, [ecx] -mov ecx, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PSHUFBrr.asm b/mc-sema/validator/x86/tests/PSHUFBrr.asm deleted file mode 100644 index 7e5ce22c3..000000000 --- a/mc-sema/validator/x86/tests/PSHUFBrr.asm +++ /dev/null @@ -1,28 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x30] -and ecx, 0xFFFFFFF0 - -mov dword [ecx+0x00], 0xABCDEF01 -mov dword [ecx+0x04], 0xBBBBBBBB -mov dword [ecx+0x08], 0xCCCCCCCC -mov dword [ecx+0x0C], 0xDDDDDDDD -movdqu xmm0, [ecx] - -mov dword [ecx+0x00], 0x0001FF1A -mov dword [ecx+0x04], 0x0aB485B1 -mov dword [ecx+0x08], 0x12345678 -mov dword [ecx+0x0C], 0x9abcdef0 -movdqu xmm1, [ecx] - -pshufb xmm0, xmm1 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PSHUFDmi.asm b/mc-sema/validator/x86/tests/PSHUFDmi.asm deleted file mode 100644 index 3ecba43a1..000000000 --- a/mc-sema/validator/x86/tests/PSHUFDmi.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x30] -and ecx, 0xFFFFFFF0 - -mov dword [ecx+0x00], 0xAAAAAAAA -mov dword [ecx+0x04], 0xBBBBBBBB -mov dword [ecx+0x08], 0xCCCCCCCC -mov dword [ecx+0x0C], 0xDDDDDDDD - -pshufd xmm0, [ecx], 0x4E -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx - diff --git a/mc-sema/validator/x86/tests/PSHUFDri.asm b/mc-sema/validator/x86/tests/PSHUFDri.asm deleted file mode 100644 index 31b9b7d6a..000000000 --- a/mc-sema/validator/x86/tests/PSHUFDri.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x30] -and ecx, 0xFFFFFFF0 - -mov dword [ecx+0x00], 0xAAAAAAAA -mov dword [ecx+0x04], 0xBBBBBBBB -mov dword [ecx+0x08], 0xCCCCCCCC -mov dword [ecx+0x0C], 0xDDDDDDDD -movdqu xmm1, [ecx] - -pshufd xmm0, xmm1, 0x4E -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PSHUFLWmi.asm b/mc-sema/validator/x86/tests/PSHUFLWmi.asm deleted file mode 100644 index 1f90fc5e7..000000000 --- a/mc-sema/validator/x86/tests/PSHUFLWmi.asm +++ /dev/null @@ -1,34 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-17] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0xAABBCCDD -mov DWORD [ecx+4], 0xFFEEDDCC -mov DWORD [ecx+8], 0x11223344 -mov DWORD [ecx+12], 0x55667788 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -;TEST_BEGIN_RECORDING -lea ecx, [esp-17] -and ecx, 0xfffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [ecx], 0xFFEEDDCC -mov DWORD [ecx+4], 0x77665544 -mov DWORD [ecx+8], 0x99AABBCC -mov DWORD [ecx+12], 0xDDEEFF00 - -pshuflw xmm0, [ecx], 0x1a -mov ecx, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx - diff --git a/mc-sema/validator/x86/tests/PSHUFLWri.asm b/mc-sema/validator/x86/tests/PSHUFLWri.asm deleted file mode 100644 index e5537e2a6..000000000 --- a/mc-sema/validator/x86/tests/PSHUFLWri.asm +++ /dev/null @@ -1,29 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x30] -and ecx, 0xFFFFFFF0 - -mov DWORD [ecx], 0xAABBCCDD -mov DWORD [ecx+4], 0xFFEEDDCC -mov DWORD [ecx+8], 0x11223344 -mov DWORD [ecx+12], 0x55667788 -movdqu xmm0, [ecx] - -mov DWORD [ecx], 0xFFEEDDCC -mov DWORD [ecx+4], 0x77665544 -mov DWORD [ecx+8], 0x99AABBCC -mov DWORD [ecx+12], 0xDDEEFF00 -movdqu xmm1, [ecx] - -pshuflw xmm0, xmm1, 0x1a -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PSLLDri.asm b/mc-sema/validator/x86/tests/PSLLDri.asm deleted file mode 100644 index 59fc1dbea..000000000 --- a/mc-sema/validator/x86/tests/PSLLDri.asm +++ /dev/null @@ -1,19 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x10] -mov dword [ecx+0x00], 0xaabbccdd -mov dword [ecx+0x04], 0x00112233 -mov dword [ecx+0x08], 0x44556677 -mov dword [ecx+0x0C], 0x11223344 -movdqu xmm0, [ecx] - -pslld xmm0, 0x18 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PSLLDrr.asm b/mc-sema/validator/x86/tests/PSLLDrr.asm deleted file mode 100644 index e95e6f58f..000000000 --- a/mc-sema/validator/x86/tests/PSLLDrr.asm +++ /dev/null @@ -1,27 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x10] -mov dword [ecx+0x00], 0x0 -mov dword [ecx+0x04], 0x0 -mov dword [ecx+0x08], 0x0 -mov dword [ecx+0x0C], 0x10 -;set up ecx to be 8 -movdqu xmm1, [ecx] - -mov dword [ecx+0x00], 0x00FFF000 -mov dword [ecx+0x04], 0x00FFF000 -mov dword [ecx+0x08], 0x00FFF000 -mov dword [ecx+0x0C], 0x00FFF000 -movdqu xmm0, [ecx] - -pslld xmm0, xmm1 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PSLLDrr2.asm b/mc-sema/validator/x86/tests/PSLLDrr2.asm deleted file mode 100644 index 9f684105c..000000000 --- a/mc-sema/validator/x86/tests/PSLLDrr2.asm +++ /dev/null @@ -1,28 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x10] -mov dword [ecx+0x00], 0x0 -mov dword [ecx+0x04], 0x0 -mov dword [ecx+0x08], 0x0 -mov dword [ecx+0x0C], 0xFF -;set up ecx to be 8 -movdqu xmm1, [ecx] - -mov dword [ecx+0x00], 0xF0FFF000 -mov dword [ecx+0x04], 0xF0FFF000 -mov dword [ecx+0x08], 0xF0FFF000 -mov dword [ecx+0x0C], 0xF0FFF000 -movdqu xmm0, [ecx] - -pslld xmm0, xmm1 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PSLLWri.asm b/mc-sema/validator/x86/tests/PSLLWri.asm deleted file mode 100644 index 497c0b1f6..000000000 --- a/mc-sema/validator/x86/tests/PSLLWri.asm +++ /dev/null @@ -1,19 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x10] -mov dword [ecx+0x00], 0xaabbccdd -mov dword [ecx+0x04], 0x00112233 -mov dword [ecx+0x08], 0x44556677 -mov dword [ecx+0x0C], 0x11223344 -movdqu xmm0, [ecx] - -psllw xmm0, 0x08 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PSLLWri2.asm b/mc-sema/validator/x86/tests/PSLLWri2.asm deleted file mode 100644 index 264bf0c75..000000000 --- a/mc-sema/validator/x86/tests/PSLLWri2.asm +++ /dev/null @@ -1,19 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x10] -mov dword [ecx+0x00], 0xaabbccdd -mov dword [ecx+0x04], 0x00112233 -mov dword [ecx+0x08], 0x44556677 -mov dword [ecx+0x0C], 0x11223344 -movdqu xmm0, [ecx] - -psllw xmm0, 0x10 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PSLLWrr.asm b/mc-sema/validator/x86/tests/PSLLWrr.asm deleted file mode 100644 index a3007892d..000000000 --- a/mc-sema/validator/x86/tests/PSLLWrr.asm +++ /dev/null @@ -1,27 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x10] -mov dword [ecx+0x00], 0x0 -mov dword [ecx+0x04], 0x0 -mov dword [ecx+0x08], 0x0 -mov dword [ecx+0x0C], 0x4 -;set up ecx to be 8 -movdqu xmm1, [ecx] - -mov dword [ecx+0x00], 0xF0F0F0F0 -mov dword [ecx+0x04], 0xF0F0F0F0 -mov dword [ecx+0x08], 0xF0F0F0F0 -mov dword [ecx+0x0C], 0xF0F0F0F0 -movdqu xmm0, [ecx] - -psllw xmm0, xmm1 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PSRADri.asm b/mc-sema/validator/x86/tests/PSRADri.asm deleted file mode 100644 index 18c3da394..000000000 --- a/mc-sema/validator/x86/tests/PSRADri.asm +++ /dev/null @@ -1,19 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x10] -mov dword [ecx+0x00], 0xaabbccdd -mov dword [ecx+0x04], 0x00112233 -mov dword [ecx+0x08], 0x44556677 -mov dword [ecx+0x0C], 0x11223344 -movdqu xmm0, [ecx] - -psrad xmm0, 0x18 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PSRADrr.asm b/mc-sema/validator/x86/tests/PSRADrr.asm deleted file mode 100644 index 2ea402368..000000000 --- a/mc-sema/validator/x86/tests/PSRADrr.asm +++ /dev/null @@ -1,27 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x10] -mov dword [ecx+0x00], 0x0 -mov dword [ecx+0x04], 0x0 -mov dword [ecx+0x08], 0x0 -mov dword [ecx+0x0C], 0x10 -;set up ecx to be 8 -movdqu xmm1, [ecx] - -mov dword [ecx+0x00], 0x80FFF001 -mov dword [ecx+0x04], 0x10FFF000 -mov dword [ecx+0x08], 0xF0FFF010 -mov dword [ecx+0x0C], 0x10FFF010 -movdqu xmm0, [ecx] - -psrad xmm0, xmm1 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PSRADrr2.asm b/mc-sema/validator/x86/tests/PSRADrr2.asm deleted file mode 100644 index c4a247b92..000000000 --- a/mc-sema/validator/x86/tests/PSRADrr2.asm +++ /dev/null @@ -1,28 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x10] -mov dword [ecx+0x00], 0x0 -mov dword [ecx+0x04], 0x0 -mov dword [ecx+0x08], 0x0 -mov dword [ecx+0x0C], 0xFF -;set up ecx to be 8 -movdqu xmm1, [ecx] - -mov dword [ecx+0x00], 0xF0FFF000 -mov dword [ecx+0x04], 0x00FFF000 -mov dword [ecx+0x08], 0xF0FFF001 -mov dword [ecx+0x0C], 0xF0FFF000 -movdqu xmm0, [ecx] - -psrad xmm0, xmm1 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PSRAWri.asm b/mc-sema/validator/x86/tests/PSRAWri.asm deleted file mode 100644 index 37cdfc006..000000000 --- a/mc-sema/validator/x86/tests/PSRAWri.asm +++ /dev/null @@ -1,19 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x10] -mov dword [ecx+0x00], 0xaabbccdd -mov dword [ecx+0x04], 0x00112233 -mov dword [ecx+0x08], 0x44556677 -mov dword [ecx+0x0C], 0x11223344 -movdqu xmm0, [ecx] - -psraw xmm0, 0x08 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PSRAWrr.asm b/mc-sema/validator/x86/tests/PSRAWrr.asm deleted file mode 100644 index 3080b15be..000000000 --- a/mc-sema/validator/x86/tests/PSRAWrr.asm +++ /dev/null @@ -1,27 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x10] -mov dword [ecx+0x00], 0x0 -mov dword [ecx+0x04], 0x0 -mov dword [ecx+0x08], 0x0 -mov dword [ecx+0x0C], 0x8 -;set up ecx to be 8 -movdqu xmm1, [ecx] - -mov dword [ecx+0x00], 0xF0F0F0F0 -mov dword [ecx+0x04], 0xF0F0F0F0 -mov dword [ecx+0x08], 0xF0F0F0F0 -mov dword [ecx+0x0C], 0xF0F0F0F0 -movdqu xmm0, [ecx] - -psraw xmm0, xmm1 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PSRAWrr2.asm b/mc-sema/validator/x86/tests/PSRAWrr2.asm deleted file mode 100644 index e28c22e4e..000000000 --- a/mc-sema/validator/x86/tests/PSRAWrr2.asm +++ /dev/null @@ -1,27 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x10] -mov dword [ecx+0x00], 0x8 -mov dword [ecx+0x04], 0x0 -mov dword [ecx+0x08], 0x0 -mov dword [ecx+0x0C], 0x0 -;set up ecx to be 8 -movdqu xmm1, [ecx] - -mov dword [ecx+0x00], 0xF0F0F0F0 -mov dword [ecx+0x04], 0xF0F0F0F0 -mov dword [ecx+0x08], 0xF0F0F0F0 -mov dword [ecx+0x0C], 0xF0F0F0F0 -movdqu xmm0, [ecx] - -psraw xmm0, xmm1 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PSRLDri.asm b/mc-sema/validator/x86/tests/PSRLDri.asm deleted file mode 100644 index 9d3177c75..000000000 --- a/mc-sema/validator/x86/tests/PSRLDri.asm +++ /dev/null @@ -1,19 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x10] -mov dword [ecx+0x00], 0xaabbccdd -mov dword [ecx+0x04], 0x00112233 -mov dword [ecx+0x08], 0x44556677 -mov dword [ecx+0x0C], 0x11223344 -movdqu xmm0, [ecx] - -psrld xmm0, 0x18 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PSRLDrr.asm b/mc-sema/validator/x86/tests/PSRLDrr.asm deleted file mode 100644 index ca13b3815..000000000 --- a/mc-sema/validator/x86/tests/PSRLDrr.asm +++ /dev/null @@ -1,27 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x10] -mov dword [ecx+0x00], 0x0 -mov dword [ecx+0x04], 0x0 -mov dword [ecx+0x08], 0x0 -mov dword [ecx+0x0C], 0x10 -;set up ecx to be 8 -movdqu xmm1, [ecx] - -mov dword [ecx+0x00], 0x00FFF000 -mov dword [ecx+0x04], 0x00FFF000 -mov dword [ecx+0x08], 0x00FFF000 -mov dword [ecx+0x0C], 0x00FFF000 -movdqu xmm0, [ecx] - -psrld xmm0, xmm1 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PSRLQri.asm b/mc-sema/validator/x86/tests/PSRLQri.asm deleted file mode 100644 index d34b2b8aa..000000000 --- a/mc-sema/validator/x86/tests/PSRLQri.asm +++ /dev/null @@ -1,19 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x10] -mov dword [ecx+0x00], 0xaabbccdd -mov dword [ecx+0x04], 0x00112233 -mov dword [ecx+0x08], 0x44556677 -mov dword [ecx+0x0C], 0x11223344 -movdqu xmm0, [ecx] - -psrlq xmm0, 0x18 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PSRLQrr.asm b/mc-sema/validator/x86/tests/PSRLQrr.asm deleted file mode 100644 index 0b25d158e..000000000 --- a/mc-sema/validator/x86/tests/PSRLQrr.asm +++ /dev/null @@ -1,27 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x10] -mov dword [ecx+0x00], 0x0 -mov dword [ecx+0x04], 0x0 -mov dword [ecx+0x08], 0x0 -mov dword [ecx+0x0C], 0x10 -;set up ecx to be 8 -movdqu xmm1, [ecx] - -mov dword [ecx+0x00], 0x00FFF000 -mov dword [ecx+0x04], 0x00FFF000 -mov dword [ecx+0x08], 0x00FFF000 -mov dword [ecx+0x0C], 0x00FFF000 -movdqu xmm0, [ecx] - -psrlq xmm0, xmm1 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PSUBBrm.asm b/mc-sema/validator/x86/tests/PSUBBrm.asm deleted file mode 100644 index bf6d9357b..000000000 --- a/mc-sema/validator/x86/tests/PSUBBrm.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-17] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x12345678 -mov DWORD [ecx+4], 0x55555555 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -;TEST_BEGIN_RECORDING -lea ecx, [esp-17] -and ecx, 0xfffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [ecx], 0xabcdef12 -mov DWORD [ecx+4], 0xaaaaaaaa -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0xfeeb1e01 - -psubb xmm0, [ecx] -mov ecx, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PSUBBrr.asm b/mc-sema/validator/x86/tests/PSUBBrr.asm deleted file mode 100644 index f9f8a8582..000000000 --- a/mc-sema/validator/x86/tests/PSUBBrr.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x55555555 -mov DWORD [ecx+4], 0x14530451 -mov DWORD [ecx+8], 0x1badb002 -mov DWORD [ecx+12], 0xf0f0f0f0 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xaaaaaaaa -mov DWORD [ecx+4], 0xcafebabe -mov DWORD [ecx+8], 0x2badb002 -mov DWORD [ecx+12], 0x0e0e0e0e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -psubb xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PSUBDrm.asm b/mc-sema/validator/x86/tests/PSUBDrm.asm deleted file mode 100644 index 389d903ad..000000000 --- a/mc-sema/validator/x86/tests/PSUBDrm.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-17] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x12345678 -mov DWORD [ecx+4], 0x55555555 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -;TEST_BEGIN_RECORDING -lea ecx, [esp-17] -and ecx, 0xfffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [ecx], 0xabcdef12 -mov DWORD [ecx+4], 0xaaaaaaaa -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0xfeeb1e01 - -psubd xmm0, [ecx] -mov ecx, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PSUBDrr.asm b/mc-sema/validator/x86/tests/PSUBDrr.asm deleted file mode 100644 index c11840ede..000000000 --- a/mc-sema/validator/x86/tests/PSUBDrr.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x55555555 -mov DWORD [ecx+4], 0x14530451 -mov DWORD [ecx+8], 0x1badb002 -mov DWORD [ecx+12], 0xf0f0f0f0 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xaaaaaaaa -mov DWORD [ecx+4], 0xcafebabe -mov DWORD [ecx+8], 0x2badb002 -mov DWORD [ecx+12], 0x0e0e0e0e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -psubd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PSUBQrm.asm b/mc-sema/validator/x86/tests/PSUBQrm.asm deleted file mode 100644 index 42473644b..000000000 --- a/mc-sema/validator/x86/tests/PSUBQrm.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-17] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x12345678 -mov DWORD [ecx+4], 0x55555555 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -;TEST_BEGIN_RECORDING -lea ecx, [esp-17] -and ecx, 0xfffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [ecx], 0xabcdef12 -mov DWORD [ecx+4], 0xaaaaaaaa -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0xfeeb1e01 - -psubq xmm0, [ecx] -mov ecx, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PSUBQrr.asm b/mc-sema/validator/x86/tests/PSUBQrr.asm deleted file mode 100644 index 2a229df16..000000000 --- a/mc-sema/validator/x86/tests/PSUBQrr.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x55555555 -mov DWORD [ecx+4], 0x14530451 -mov DWORD [ecx+8], 0x1badb002 -mov DWORD [ecx+12], 0xf0f0f0f0 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xaaaaaaaa -mov DWORD [ecx+4], 0xcafebabe -mov DWORD [ecx+8], 0x2badb002 -mov DWORD [ecx+12], 0x0e0e0e0e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -psubq xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PSUBWrm.asm b/mc-sema/validator/x86/tests/PSUBWrm.asm deleted file mode 100644 index a2f070311..000000000 --- a/mc-sema/validator/x86/tests/PSUBWrm.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-17] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x12345678 -mov DWORD [ecx+4], 0x55555555 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -;TEST_BEGIN_RECORDING -lea ecx, [esp-17] -and ecx, 0xfffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [ecx], 0xabcdef12 -mov DWORD [ecx+4], 0xaaaaaaaa -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0xfeeb1e01 - -psubw xmm0, [ecx] -mov ecx, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PSUBWrr.asm b/mc-sema/validator/x86/tests/PSUBWrr.asm deleted file mode 100644 index 2c504417b..000000000 --- a/mc-sema/validator/x86/tests/PSUBWrr.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x55555555 -mov DWORD [ecx+4], 0x14530451 -mov DWORD [ecx+8], 0x1badb002 -mov DWORD [ecx+12], 0xf0f0f0f0 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xaaaaaaaa -mov DWORD [ecx+4], 0xcafebabe -mov DWORD [ecx+8], 0x2badb002 -mov DWORD [ecx+12], 0x0e0e0e0e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -psubw xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86/tests/PUNPCKLBWrm.asm b/mc-sema/validator/x86/tests/PUNPCKLBWrm.asm deleted file mode 100644 index 60becc941..000000000 --- a/mc-sema/validator/x86/tests/PUNPCKLBWrm.asm +++ /dev/null @@ -1,26 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x30] -and ecx, 0xFFFFFFF0 - -mov dword [ecx+0x00], 0xAABBCCDD -mov dword [ecx+0x04], 0xEEFF1122 -mov dword [ecx+0x08], 0x33445566 -mov dword [ecx+0x0C], 0x77889900 -movdqu xmm0, [ecx] -mov dword [ecx+0x00], 0x00112233 -mov dword [ecx+0x04], 0x44556677 -mov dword [ecx+0x08], 0x8899AABB -mov dword [ecx+0x0C], 0xCCDDEEFF - -punpcklbw xmm0, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PUNPCKLBWrr.asm b/mc-sema/validator/x86/tests/PUNPCKLBWrr.asm deleted file mode 100644 index 12f904ec9..000000000 --- a/mc-sema/validator/x86/tests/PUNPCKLBWrr.asm +++ /dev/null @@ -1,27 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x30] -and ecx, 0xFFFFFFF0 - -mov dword [ecx+0x00], 0xAABBCCDD -mov dword [ecx+0x04], 0xEEFF1122 -mov dword [ecx+0x08], 0x33445566 -mov dword [ecx+0x0C], 0x77889900 -movdqu xmm0, [ecx] -mov dword [ecx+0x00], 0x00112233 -mov dword [ecx+0x04], 0x44556677 -mov dword [ecx+0x08], 0x8899AABB -mov dword [ecx+0x0C], 0xCCDDEEFF -movdqu xmm1, [ecx] - -punpcklbw xmm0, xmm1 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PUNPCKLDQrm.asm b/mc-sema/validator/x86/tests/PUNPCKLDQrm.asm deleted file mode 100644 index dcfaa1ffc..000000000 --- a/mc-sema/validator/x86/tests/PUNPCKLDQrm.asm +++ /dev/null @@ -1,26 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x30] -and ecx, 0xFFFFFFF0 - -mov dword [ecx+0x00], 0xAABBCCDD -mov dword [ecx+0x04], 0xEEFF1122 -mov dword [ecx+0x08], 0x33445566 -mov dword [ecx+0x0C], 0x77889900 -movdqu xmm0, [ecx] -mov dword [ecx+0x00], 0x00112233 -mov dword [ecx+0x04], 0x44556677 -mov dword [ecx+0x08], 0x8899AABB -mov dword [ecx+0x0C], 0xCCDDEEFF - -punpckldq xmm0, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PUNPCKLDQrr.asm b/mc-sema/validator/x86/tests/PUNPCKLDQrr.asm deleted file mode 100644 index 5a4164c50..000000000 --- a/mc-sema/validator/x86/tests/PUNPCKLDQrr.asm +++ /dev/null @@ -1,27 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x30] -and ecx, 0xFFFFFFF0 - -mov dword [ecx+0x00], 0xAABBCCDD -mov dword [ecx+0x04], 0xEEFF1122 -mov dword [ecx+0x08], 0x33445566 -mov dword [ecx+0x0C], 0x77889900 -movdqu xmm0, [ecx] -mov dword [ecx+0x00], 0x00112233 -mov dword [ecx+0x04], 0x44556677 -mov dword [ecx+0x08], 0x8899AABB -mov dword [ecx+0x0C], 0xCCDDEEFF -movdqu xmm1, [ecx] - -punpckldq xmm0, xmm1 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PUNPCKLQDQrm.asm b/mc-sema/validator/x86/tests/PUNPCKLQDQrm.asm deleted file mode 100644 index bde7a6761..000000000 --- a/mc-sema/validator/x86/tests/PUNPCKLQDQrm.asm +++ /dev/null @@ -1,26 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x30] -and ecx, 0xFFFFFFF0 - -mov dword [ecx+0x00], 0xAABBCCDD -mov dword [ecx+0x04], 0xEEFF1122 -mov dword [ecx+0x08], 0x33445566 -mov dword [ecx+0x0C], 0x77889900 -movdqu xmm0, [ecx] -mov dword [ecx+0x00], 0x00112233 -mov dword [ecx+0x04], 0x44556677 -mov dword [ecx+0x08], 0x8899AABB -mov dword [ecx+0x0C], 0xCCDDEEFF - -punpcklqdq xmm0, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PUNPCKLQDQrr.asm b/mc-sema/validator/x86/tests/PUNPCKLQDQrr.asm deleted file mode 100644 index d800d5146..000000000 --- a/mc-sema/validator/x86/tests/PUNPCKLQDQrr.asm +++ /dev/null @@ -1,27 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x30] -and ecx, 0xFFFFFFF0 - -mov dword [ecx+0x00], 0xAABBCCDD -mov dword [ecx+0x04], 0xEEFF1122 -mov dword [ecx+0x08], 0x33445566 -mov dword [ecx+0x0C], 0x77889900 -movdqu xmm0, [ecx] -mov dword [ecx+0x00], 0x00112233 -mov dword [ecx+0x04], 0x44556677 -mov dword [ecx+0x08], 0x8899AABB -mov dword [ecx+0x0C], 0xCCDDEEFF -movdqu xmm1, [ecx] - -punpcklqdq xmm0, xmm1 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PUNPCKLWDrm.asm b/mc-sema/validator/x86/tests/PUNPCKLWDrm.asm deleted file mode 100644 index 4ccc129ca..000000000 --- a/mc-sema/validator/x86/tests/PUNPCKLWDrm.asm +++ /dev/null @@ -1,26 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x30] -and ecx, 0xFFFFFFF0 - -mov dword [ecx+0x00], 0xAABBCCDD -mov dword [ecx+0x04], 0xEEFF1122 -mov dword [ecx+0x08], 0x33445566 -mov dword [ecx+0x0C], 0x77889900 -movdqu xmm0, [ecx] -mov dword [ecx+0x00], 0x00112233 -mov dword [ecx+0x04], 0x44556677 -mov dword [ecx+0x08], 0x8899AABB -mov dword [ecx+0x0C], 0xCCDDEEFF - -punpcklwd xmm0, [ecx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PUNPCKLWDrr.asm b/mc-sema/validator/x86/tests/PUNPCKLWDrr.asm deleted file mode 100644 index 6ff2dcd5f..000000000 --- a/mc-sema/validator/x86/tests/PUNPCKLWDrr.asm +++ /dev/null @@ -1,27 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x30] -and ecx, 0xFFFFFFF0 - -mov dword [ecx+0x00], 0xAABBCCDD -mov dword [ecx+0x04], 0xEEFF1122 -mov dword [ecx+0x08], 0x33445566 -mov dword [ecx+0x0C], 0x77889900 -movdqu xmm0, [ecx] -mov dword [ecx+0x00], 0x00112233 -mov dword [ecx+0x04], 0x44556677 -mov dword [ecx+0x08], 0x8899AABB -mov dword [ecx+0x0C], 0xCCDDEEFF -movdqu xmm1, [ecx] - -punpcklwd xmm0, xmm1 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PUSH16r.asm b/mc-sema/validator/x86/tests/PUSH16r.asm deleted file mode 100644 index be42a1c36..000000000 --- a/mc-sema/validator/x86/tests/PUSH16r.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; PUSH16r - mov cx, 0x99 - ;TEST_BEGIN_RECORDING - push cx - ;TEST_END_RECORDING - pop cx - diff --git a/mc-sema/validator/x86/tests/PUSH32r.asm b/mc-sema/validator/x86/tests/PUSH32r.asm deleted file mode 100644 index 0d81adc0b..000000000 --- a/mc-sema/validator/x86/tests/PUSH32r.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; PUSH32r - mov ecx, 0x9999 - ;TEST_BEGIN_RECORDING - push ecx - ;TEST_END_RECORDING - pop ecx - diff --git a/mc-sema/validator/x86/tests/PUSHi16.asm b/mc-sema/validator/x86/tests/PUSHi16.asm deleted file mode 100644 index 235002229..000000000 --- a/mc-sema/validator/x86/tests/PUSHi16.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; PUSHi16 - ;TEST_BEGIN_RECORDING - push 0xeeee - ;TEST_END_RECORDING - pop eax - diff --git a/mc-sema/validator/x86/tests/PUSHi32.asm b/mc-sema/validator/x86/tests/PUSHi32.asm deleted file mode 100644 index ad89974b4..000000000 --- a/mc-sema/validator/x86/tests/PUSHi32.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; PUSHi32 - ;TEST_BEGIN_RECORDING - push dword 0x7c100052 - ;TEST_END_RECORDING - pop eax - diff --git a/mc-sema/validator/x86/tests/PUSHi8.asm b/mc-sema/validator/x86/tests/PUSHi8.asm deleted file mode 100644 index 7468e4ec2..000000000 --- a/mc-sema/validator/x86/tests/PUSHi8.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; PUSHi8 - ;TEST_BEGIN_RECORDING - push 0xff - ;TEST_END_RECORDING - pop eax - diff --git a/mc-sema/validator/x86/tests/PXORrm.asm b/mc-sema/validator/x86/tests/PXORrm.asm deleted file mode 100644 index 94483540e..000000000 --- a/mc-sema/validator/x86/tests/PXORrm.asm +++ /dev/null @@ -1,34 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-17] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0xae472f78 -mov DWORD [ecx+4], 0x55555555 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -;TEST_BEGIN_RECORDING -lea ecx, [esp-17] -and ecx, 0xfffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [ecx], 0xabcdef12 -mov DWORD [ecx+4], 0xa4982caa -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0xfeeb1e01 - -pxor xmm0, [ecx] -mov ecx, [ecx] -xor ecx, ecx -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/PXORrr.asm b/mc-sema/validator/x86/tests/PXORrr.asm deleted file mode 100644 index 3e2bd4a43..000000000 --- a/mc-sema/validator/x86/tests/PXORrr.asm +++ /dev/null @@ -1,32 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x54225f55 -mov DWORD [ecx+4], 0x145e0451 -mov DWORD [ecx+8], 0x10adb002 -mov DWORD [ecx+12], 0xf0f0f0f0 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xcacacaaa -mov DWORD [ecx+4], 0xc1febabe -mov DWORD [ecx+8], 0x2badb502 -mov DWORD [ecx+12], 0x0e2e0e0e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -pxor xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/PushPopR.asm b/mc-sema/validator/x86/tests/PushPopR.asm deleted file mode 100644 index 565fe177b..000000000 --- a/mc-sema/validator/x86/tests/PushPopR.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; PushPopR - mov eax, 0x88 - mov edi, 0x0 - ;TEST_BEGIN_RECORDING - push eax - pop edi - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/Pushl32m.asm b/mc-sema/validator/x86/tests/Pushl32m.asm deleted file mode 100644 index c4b49352f..000000000 --- a/mc-sema/validator/x86/tests/Pushl32m.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; Pushl32m - ;TEST_BEGIN_RECORDING - lea edi, [esp-0x4] - mov DWORD [edi], 0x8 - push DWORD [edi] - pop ecx - xor edi, edi - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/RCL16r1.asm b/mc-sema/validator/x86/tests/RCL16r1.asm deleted file mode 100644 index 9e3de25c1..000000000 --- a/mc-sema/validator/x86/tests/RCL16r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; RCL16r1 - mov dx, 0x414 - ;TEST_BEGIN_RECORDING - rcl dx, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/RCL16rCL.asm b/mc-sema/validator/x86/tests/RCL16rCL.asm deleted file mode 100644 index 8176ce5e8..000000000 --- a/mc-sema/validator/x86/tests/RCL16rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCL16rCL - mov bx, 0x414 - mov cl, 0x3 - ;TEST_BEGIN_RECORDING - rcl bx, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/RCL16ri.asm b/mc-sema/validator/x86/tests/RCL16ri.asm deleted file mode 100644 index 24bd163f9..000000000 --- a/mc-sema/validator/x86/tests/RCL16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCL16ri - mov cx, 0x545 - ;TEST_BEGIN_RECORDING - rcl cx, 0x8 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/RCL32r1.asm b/mc-sema/validator/x86/tests/RCL32r1.asm deleted file mode 100644 index 04136c6bb..000000000 --- a/mc-sema/validator/x86/tests/RCL32r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; RCL32r1 - mov eax, 0x56789 - ;TEST_BEGIN_RECORDING - rcl eax, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/RCL32rCL.asm b/mc-sema/validator/x86/tests/RCL32rCL.asm deleted file mode 100644 index 98f77d105..000000000 --- a/mc-sema/validator/x86/tests/RCL32rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCL32rCL - mov ebx, 0x4141 - mov cl, 0x2 - ;TEST_BEGIN_RECORDING - rcl ebx, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/RCL32ri.asm b/mc-sema/validator/x86/tests/RCL32ri.asm deleted file mode 100644 index cc5a1ddfd..000000000 --- a/mc-sema/validator/x86/tests/RCL32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCL32ri - mov ecx, 0x6789 - ;TEST_BEGIN_RECORDING - rcl ecx, 0x8 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/RCL8r1.asm b/mc-sema/validator/x86/tests/RCL8r1.asm deleted file mode 100644 index 9fedabd00..000000000 --- a/mc-sema/validator/x86/tests/RCL8r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; RCL8r1 - mov ah, 0xa2 - ;TEST_BEGIN_RECORDING - rcl ah, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/RCL8rCL.asm b/mc-sema/validator/x86/tests/RCL8rCL.asm deleted file mode 100644 index 66c57de46..000000000 --- a/mc-sema/validator/x86/tests/RCL8rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCL8rCL - mov bh, 0x41 - mov cl, 0x4 - ;TEST_BEGIN_RECORDING - rcl bh, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/RCL8ri.asm b/mc-sema/validator/x86/tests/RCL8ri.asm deleted file mode 100644 index 8d8c2dbcf..000000000 --- a/mc-sema/validator/x86/tests/RCL8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCL8ri - mov ch, 0x56 - ;TEST_BEGIN_RECORDING - rcl ch, 0x2 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/RCR16r1.asm b/mc-sema/validator/x86/tests/RCR16r1.asm deleted file mode 100644 index a0564661b..000000000 --- a/mc-sema/validator/x86/tests/RCR16r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; RCR16r1 - mov dx, 0x414 - ;TEST_BEGIN_RECORDING - rcr dx, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/RCR16rCL.asm b/mc-sema/validator/x86/tests/RCR16rCL.asm deleted file mode 100644 index c532ed62f..000000000 --- a/mc-sema/validator/x86/tests/RCR16rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCR16rCL - mov bx, 0x414 - mov cl, 0x3 - ;TEST_BEGIN_RECORDING - rcr bx, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/RCR16ri.asm b/mc-sema/validator/x86/tests/RCR16ri.asm deleted file mode 100644 index b2668389b..000000000 --- a/mc-sema/validator/x86/tests/RCR16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCR16ri - mov cx, 0x545 - ;TEST_BEGIN_RECORDING - rcr cx, 0x8 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/RCR32r1.asm b/mc-sema/validator/x86/tests/RCR32r1.asm deleted file mode 100644 index 6ea2c4a40..000000000 --- a/mc-sema/validator/x86/tests/RCR32r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; RCR32r1 - mov eax, 0x56789 - ;TEST_BEGIN_RECORDING - rcr eax, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/RCR32rCL.asm b/mc-sema/validator/x86/tests/RCR32rCL.asm deleted file mode 100644 index db38f580b..000000000 --- a/mc-sema/validator/x86/tests/RCR32rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCR32rCL - mov ebx, 0x4141 - mov cl, 0x2 - ;TEST_BEGIN_RECORDING - rcr ebx, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/RCR32ri.asm b/mc-sema/validator/x86/tests/RCR32ri.asm deleted file mode 100644 index c80b867d6..000000000 --- a/mc-sema/validator/x86/tests/RCR32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCR32ri - mov ecx, 0x6789 - ;TEST_BEGIN_RECORDING - rcr ecx, 0x8 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/RCR8r1.asm b/mc-sema/validator/x86/tests/RCR8r1.asm deleted file mode 100644 index c7de7fd86..000000000 --- a/mc-sema/validator/x86/tests/RCR8r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCR8r1 - mov ah, 0xa2 - ;TEST_BEGIN_RECORDING - rcr ah, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/RCR8rCL.asm b/mc-sema/validator/x86/tests/RCR8rCL.asm deleted file mode 100644 index a5b85b832..000000000 --- a/mc-sema/validator/x86/tests/RCR8rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCR8rCL - mov bh, 0x41 - mov cl, 0x4 - ;TEST_BEGIN_RECORDING - rcr bh, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/RCR8ri.asm b/mc-sema/validator/x86/tests/RCR8ri.asm deleted file mode 100644 index 9ae772d98..000000000 --- a/mc-sema/validator/x86/tests/RCR8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCR8ri - mov ch, 0x56 - ;TEST_BEGIN_RECORDING - rcr ch, 0x2 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ROL16r1.asm b/mc-sema/validator/x86/tests/ROL16r1.asm deleted file mode 100644 index 440b9603d..000000000 --- a/mc-sema/validator/x86/tests/ROL16r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROL16r1 - mov dx, 0x414 - ;TEST_BEGIN_RECORDING - rol dx, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ROL16rCL.asm b/mc-sema/validator/x86/tests/ROL16rCL.asm deleted file mode 100644 index fc51b1f55..000000000 --- a/mc-sema/validator/x86/tests/ROL16rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROL16rCL - mov bx, 0x414 - mov cl, 0x3 - ;TEST_BEGIN_RECORDING - rol bx, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ROL16ri.asm b/mc-sema/validator/x86/tests/ROL16ri.asm deleted file mode 100644 index 49a59a03b..000000000 --- a/mc-sema/validator/x86/tests/ROL16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROL16ri - mov cx, 0x545 - ;TEST_BEGIN_RECORDING - rol cx, 0x8 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ROL32r1.asm b/mc-sema/validator/x86/tests/ROL32r1.asm deleted file mode 100644 index 0ab51d2aa..000000000 --- a/mc-sema/validator/x86/tests/ROL32r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ROL32r1 - mov eax, 0x56789 - ;TEST_BEGIN_RECORDING - rol eax, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ROL32rCL.asm b/mc-sema/validator/x86/tests/ROL32rCL.asm deleted file mode 100644 index a6de9b7d0..000000000 --- a/mc-sema/validator/x86/tests/ROL32rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROL32rCL - mov ebx, 0x4141 - mov cl, 0x2 - ;TEST_BEGIN_RECORDING - rol ebx, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ROL32ri.asm b/mc-sema/validator/x86/tests/ROL32ri.asm deleted file mode 100644 index e58e8e667..000000000 --- a/mc-sema/validator/x86/tests/ROL32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROL32ri - mov ecx, 0x6789 - ;TEST_BEGIN_RECORDING - rol ecx, 0x8 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ROL8r1.asm b/mc-sema/validator/x86/tests/ROL8r1.asm deleted file mode 100644 index 6f5ffe0e7..000000000 --- a/mc-sema/validator/x86/tests/ROL8r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ROL8r1 - mov ah, 0xa2 - ;TEST_BEGIN_RECORDING - rol ah, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ROL8rCL.asm b/mc-sema/validator/x86/tests/ROL8rCL.asm deleted file mode 100644 index 4daa964bd..000000000 --- a/mc-sema/validator/x86/tests/ROL8rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROL8rCL - mov bh, 0x41 - mov cl, 0x4 - ;TEST_BEGIN_RECORDING - rol bh, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ROL8ri.asm b/mc-sema/validator/x86/tests/ROL8ri.asm deleted file mode 100644 index 319d418e3..000000000 --- a/mc-sema/validator/x86/tests/ROL8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROL8ri - mov ch, 0x56 - ;TEST_BEGIN_RECORDING - rol ch, 0x2 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ROR16r1.asm b/mc-sema/validator/x86/tests/ROR16r1.asm deleted file mode 100644 index e504195a4..000000000 --- a/mc-sema/validator/x86/tests/ROR16r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROR16r1 - mov dx, 0x414 - ;TEST_BEGIN_RECORDING - ror dx, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ROR16rCL.asm b/mc-sema/validator/x86/tests/ROR16rCL.asm deleted file mode 100644 index bd6a14a4a..000000000 --- a/mc-sema/validator/x86/tests/ROR16rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROR16rCL - mov bx, 0x414 - mov cl, 0x3 - ;TEST_BEGIN_RECORDING - ror bx, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ROR16ri.asm b/mc-sema/validator/x86/tests/ROR16ri.asm deleted file mode 100644 index c632c4adb..000000000 --- a/mc-sema/validator/x86/tests/ROR16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROR16ri - mov cx, 0x545 - ;TEST_BEGIN_RECORDING - ror cx, 0x8 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ROR32r1.asm b/mc-sema/validator/x86/tests/ROR32r1.asm deleted file mode 100644 index 8bcffc0b5..000000000 --- a/mc-sema/validator/x86/tests/ROR32r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROR32r1 - mov eax, 0x56789 - ;TEST_BEGIN_RECORDING - ror eax, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ROR32rCL.asm b/mc-sema/validator/x86/tests/ROR32rCL.asm deleted file mode 100644 index 07cf25d1b..000000000 --- a/mc-sema/validator/x86/tests/ROR32rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROR32rCL - mov ebx, 0x4141 - mov cl, 0x2 - ;TEST_BEGIN_RECORDING - ror ebx, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ROR32ri.asm b/mc-sema/validator/x86/tests/ROR32ri.asm deleted file mode 100644 index d45eba5eb..000000000 --- a/mc-sema/validator/x86/tests/ROR32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROR32ri - mov ecx, 0x6789 - ;TEST_BEGIN_RECORDING - ror ecx, 0x8 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ROR8r1.asm b/mc-sema/validator/x86/tests/ROR8r1.asm deleted file mode 100644 index 98cd144cc..000000000 --- a/mc-sema/validator/x86/tests/ROR8r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROR8r1 - mov ah, 0xa2 - ;TEST_BEGIN_RECORDING - ror ah, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ROR8rCL.asm b/mc-sema/validator/x86/tests/ROR8rCL.asm deleted file mode 100644 index a55efa3cf..000000000 --- a/mc-sema/validator/x86/tests/ROR8rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROR8rCL - mov bh, 0x41 - mov cl, 0x4 - ;TEST_BEGIN_RECORDING - ror bh, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ROR8ri.asm b/mc-sema/validator/x86/tests/ROR8ri.asm deleted file mode 100644 index 74609b0d6..000000000 --- a/mc-sema/validator/x86/tests/ROR8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROR8ri - mov ch, 0x56 - ;TEST_BEGIN_RECORDING - ror ch, 0x2 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SAHF.asm b/mc-sema/validator/x86/tests/SAHF.asm deleted file mode 100644 index 458c3d46c..000000000 --- a/mc-sema/validator/x86/tests/SAHF.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SAHF - mov ah, 0xD5 - ;TEST_BEGIN_RECORDING - sahf - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SBB16i16.asm b/mc-sema/validator/x86/tests/SBB16i16.asm deleted file mode 100644 index b403b6752..000000000 --- a/mc-sema/validator/x86/tests/SBB16i16.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SBB16i16 - mov ax, 0x7 - ;TEST_BEGIN_RECORDING - sbb ax, 0xeeee - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SBB16ri.asm b/mc-sema/validator/x86/tests/SBB16ri.asm deleted file mode 100644 index 8020ac501..000000000 --- a/mc-sema/validator/x86/tests/SBB16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SBB16ri - mov bx, 0x7 - ;TEST_BEGIN_RECORDING - sbb bx, 0x444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SBB16rr.asm b/mc-sema/validator/x86/tests/SBB16rr.asm deleted file mode 100644 index 5e502fa0a..000000000 --- a/mc-sema/validator/x86/tests/SBB16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SBB16rr - mov cx, 0x0 - mov dx, 0x1 - ;TEST_BEGIN_RECORDING - sbb cx, dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SBB32i32.asm b/mc-sema/validator/x86/tests/SBB32i32.asm deleted file mode 100644 index 415cef859..000000000 --- a/mc-sema/validator/x86/tests/SBB32i32.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SBB32i32 - mov eax, 0x7 - ;TEST_BEGIN_RECORDING - sbb eax, 0x6fffffff - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SBB32mr.asm b/mc-sema/validator/x86/tests/SBB32mr.asm deleted file mode 100644 index 221284b3c..000000000 --- a/mc-sema/validator/x86/tests/SBB32mr.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SBB32mr - ;TEST_BEGIN_RECORDING - lea edi, [esp-0x4] - mov DWORD [edi], 0xabcd4321 - mov eax, 0x56781234 - sbb [edi], eax - mov edx, [edi] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SBB32ri.asm b/mc-sema/validator/x86/tests/SBB32ri.asm deleted file mode 100644 index 170087d1b..000000000 --- a/mc-sema/validator/x86/tests/SBB32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Sbb32RI - ;TEST_BEGIN_RECORDING - sbb eax, 0x44 - sbb ecx, 0x43 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SBB32rm.asm b/mc-sema/validator/x86/tests/SBB32rm.asm deleted file mode 100644 index 93026f171..000000000 --- a/mc-sema/validator/x86/tests/SBB32rm.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SBB32rm - ;TEST_BEGIN_RECORDING - lea edi, [esp-0x4] - mov DWORD [edi], 0x1234abcd - mov eax, 0x56781234 - sbb eax, [edi] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SBB32rr.asm b/mc-sema/validator/x86/tests/SBB32rr.asm deleted file mode 100644 index 552c9968c..000000000 --- a/mc-sema/validator/x86/tests/SBB32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SBB32rr - mov ecx, 0x0 - mov edx, 0x1 - ;TEST_BEGIN_RECORDING - sbb ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SBB8i8.asm b/mc-sema/validator/x86/tests/SBB8i8.asm deleted file mode 100644 index c736cd16b..000000000 --- a/mc-sema/validator/x86/tests/SBB8i8.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SBB8i8 - mov al, 0x7 - ;TEST_BEGIN_RECORDING - sbb al, 0x5 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SBB8ri.asm b/mc-sema/validator/x86/tests/SBB8ri.asm deleted file mode 100644 index 65606a81d..000000000 --- a/mc-sema/validator/x86/tests/SBB8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SBB8ri - mov ah, 0x99 - ;TEST_BEGIN_RECORDING - sbb ah, 0x3 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SBB8rr.asm b/mc-sema/validator/x86/tests/SBB8rr.asm deleted file mode 100644 index a8ffd441f..000000000 --- a/mc-sema/validator/x86/tests/SBB8rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SBB8rr - mov ch, 0x2 - mov dh, 0x3 - ;TEST_BEGIN_RECORDING - sbb ch, dh - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SETAr.asm b/mc-sema/validator/x86/tests/SETAr.asm deleted file mode 100644 index eabfafbef..000000000 --- a/mc-sema/validator/x86/tests/SETAr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SETA - mov ecx, 0x100 - mov ebx, 0x0F0 - cmp ecx, ebx - ;TEST_BEGIN_RECORDING - seta al - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/SETBr.asm b/mc-sema/validator/x86/tests/SETBr.asm deleted file mode 100644 index 40cbd3642..000000000 --- a/mc-sema/validator/x86/tests/SETBr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SETB - mov ecx, 0x010 - mov ebx, 0x0F0 - cmp ecx, ebx - ;TEST_BEGIN_RECORDING - setb al - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/SETEr.asm b/mc-sema/validator/x86/tests/SETEr.asm deleted file mode 100644 index 4702599b8..000000000 --- a/mc-sema/validator/x86/tests/SETEr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SETE - mov ecx, 0x010 - mov ebx, 0x010 - cmp ecx, ebx - ;TEST_BEGIN_RECORDING - sete al - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/SETGEr.asm b/mc-sema/validator/x86/tests/SETGEr.asm deleted file mode 100644 index c620d3068..000000000 --- a/mc-sema/validator/x86/tests/SETGEr.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SETGE - mov ecx, 0x010 - mov ebx, 0x010 - cmp ecx, ebx - ;TEST_BEGIN_RECORDING - setge al - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SETGr.asm b/mc-sema/validator/x86/tests/SETGr.asm deleted file mode 100644 index 249a38a1a..000000000 --- a/mc-sema/validator/x86/tests/SETGr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - mov ecx, 0x111 - mov ebx, 0x222 - cmp ecx, ebx - ;TEST_BEGIN_RECORDING - setg al - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SETLEr.asm b/mc-sema/validator/x86/tests/SETLEr.asm deleted file mode 100644 index 9cdfc3f85..000000000 --- a/mc-sema/validator/x86/tests/SETLEr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SETLE - mov ecx, 0x111 - mov ebx, 0x111 - cmp ecx, ebx - ;TEST_BEGIN_RECORDING - setle al - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/SETLr.asm b/mc-sema/validator/x86/tests/SETLr.asm deleted file mode 100644 index 4dacf0d5b..000000000 --- a/mc-sema/validator/x86/tests/SETLr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SETL - mov ecx, 0x111 - mov ebx, 0x010 - cmp ecx, ebx - ;TEST_BEGIN_RECORDING - setl al - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/SETNEm.asm b/mc-sema/validator/x86/tests/SETNEm.asm deleted file mode 100644 index 41db3231e..000000000 --- a/mc-sema/validator/x86/tests/SETNEm.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; SETNEm - mov ecx, 0x5 - mov ebx, 0xa - cmp ecx, ebx - ;TEST_BEGIN_RECORDING - lea edi, [esp-0x4] - mov DWORD [edi], 0xc - setne [edi] - mov eax, [edi] - xor edi, edi - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SETNEr.asm b/mc-sema/validator/x86/tests/SETNEr.asm deleted file mode 100644 index 552d3286c..000000000 --- a/mc-sema/validator/x86/tests/SETNEr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SETNEr - mov ecx, 0x5 - mov ebx, 0xa - cmp ecx, ebx - ;TEST_BEGIN_RECORDING - setne al - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/SETPr.asm b/mc-sema/validator/x86/tests/SETPr.asm deleted file mode 100644 index 1ac8424b5..000000000 --- a/mc-sema/validator/x86/tests/SETPr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - mov ecx, 0x0 - mov ebx, 0x222 - cmp ecx, ebx - ;TEST_BEGIN_RECORDING - setp al - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SETSr.asm b/mc-sema/validator/x86/tests/SETSr.asm deleted file mode 100644 index d4baba17f..000000000 --- a/mc-sema/validator/x86/tests/SETSr.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - mov ecx, 0x0 - mov ebx, 0x222 - cmp ecx, ebx - ;TEST_BEGIN_RECORDING - sets al - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/SHL16r1.asm b/mc-sema/validator/x86/tests/SHL16r1.asm deleted file mode 100644 index 345544c35..000000000 --- a/mc-sema/validator/x86/tests/SHL16r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHL16r1 - mov ax, 0x7 - ;TEST_BEGIN_RECORDING - shl ax, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SHL16rCL.asm b/mc-sema/validator/x86/tests/SHL16rCL.asm deleted file mode 100644 index 107a35248..000000000 --- a/mc-sema/validator/x86/tests/SHL16rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; Shl16RCL - mov ax, 0x14fc - mov cl, 0x5 - ;TEST_BEGIN_RECORDING - shl ax, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SHL16ri.asm b/mc-sema/validator/x86/tests/SHL16ri.asm deleted file mode 100644 index 7c171718a..000000000 --- a/mc-sema/validator/x86/tests/SHL16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHL16ri - mov cx, 0x78 - ;TEST_BEGIN_RECORDING - shl cx, 0x8 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SHL32r1.asm b/mc-sema/validator/x86/tests/SHL32r1.asm deleted file mode 100644 index 2166817e0..000000000 --- a/mc-sema/validator/x86/tests/SHL32r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHL32r1 - mov eax, 0x888 - ;TEST_BEGIN_RECORDING - shl eax, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SHL32rCL.asm b/mc-sema/validator/x86/tests/SHL32rCL.asm deleted file mode 100644 index 5c4ded481..000000000 --- a/mc-sema/validator/x86/tests/SHL32rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHL32rCL - mov ebx, 0xbfe - mov cl, 0x1 - ;TEST_BEGIN_RECORDING - shl ebx, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SHL32ri.asm b/mc-sema/validator/x86/tests/SHL32ri.asm deleted file mode 100644 index d195a3801..000000000 --- a/mc-sema/validator/x86/tests/SHL32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; Shl32RI - mov eax, 0x1 - ;TEST_BEGIN_RECORDING - shl eax, 0xa - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SHL8r1.asm b/mc-sema/validator/x86/tests/SHL8r1.asm deleted file mode 100644 index abb2e17db..000000000 --- a/mc-sema/validator/x86/tests/SHL8r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHL8r1 - mov ah, 0xd - ;TEST_BEGIN_RECORDING - shl ah, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SHL8rCL.asm b/mc-sema/validator/x86/tests/SHL8rCL.asm deleted file mode 100644 index 474ac0289..000000000 --- a/mc-sema/validator/x86/tests/SHL8rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHL8rCL - mov bh, 0xa - mov cl, 0x3 - ;TEST_BEGIN_RECORDING - shl bh, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SHL8ri.asm b/mc-sema/validator/x86/tests/SHL8ri.asm deleted file mode 100644 index b11a423f1..000000000 --- a/mc-sema/validator/x86/tests/SHL8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHL8ri - mov ch, 0xa - ;TEST_BEGIN_RECORDING - shl ch, 0x2 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SHLD32mrCL.asm b/mc-sema/validator/x86/tests/SHLD32mrCL.asm deleted file mode 100644 index 60697300e..000000000 --- a/mc-sema/validator/x86/tests/SHLD32mrCL.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHLD32mrCL - mov cl, 0x3 - mov eax, 0x5dc - ;TEST_BEGIN_RECORDING - lea ebx, [esp - 4] - mov dword [ebx], 0xfa7 - shld [ebx], eax, cl - mov edx, [ebx] - mov ebx, 0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SHLD32rrCL.asm b/mc-sema/validator/x86/tests/SHLD32rrCL.asm deleted file mode 100644 index ea437ac0d..000000000 --- a/mc-sema/validator/x86/tests/SHLD32rrCL.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHLD32rrCL - mov cl, 0x1 - mov eax, 0x5dc - mov ebx, 0x3ca - ;TEST_BEGIN_RECORDING - shld ebx, eax, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SHR16r1.asm b/mc-sema/validator/x86/tests/SHR16r1.asm deleted file mode 100644 index 76182223e..000000000 --- a/mc-sema/validator/x86/tests/SHR16r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHR16r1 - mov ax, 0xe45 - ;TEST_BEGIN_RECORDING - shr ax, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SHR16rCL.asm b/mc-sema/validator/x86/tests/SHR16rCL.asm deleted file mode 100644 index 2fd1b65a4..000000000 --- a/mc-sema/validator/x86/tests/SHR16rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; Shr16RCL - mov ax, 0x14FC - mov cl, 0x5 - ;TEST_BEGIN_RECORDING - shr ax, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SHR16ri.asm b/mc-sema/validator/x86/tests/SHR16ri.asm deleted file mode 100644 index 5b57bfc24..000000000 --- a/mc-sema/validator/x86/tests/SHR16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHR16ri - mov cx, 0x987 - ;TEST_BEGIN_RECORDING - shr cx, 0x8 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SHR32r1.asm b/mc-sema/validator/x86/tests/SHR32r1.asm deleted file mode 100644 index ed286de48..000000000 --- a/mc-sema/validator/x86/tests/SHR32r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHR32r1 - mov eax, 0x444444 - ;TEST_BEGIN_RECORDING - shr eax, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SHR32rCL.asm b/mc-sema/validator/x86/tests/SHR32rCL.asm deleted file mode 100644 index 933b7c719..000000000 --- a/mc-sema/validator/x86/tests/SHR32rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHR32rCL - mov ebx, 0x654 - mov cl, 0x5 - ;TEST_BEGIN_RECORDING - shr ebx, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SHR32ri.asm b/mc-sema/validator/x86/tests/SHR32ri.asm deleted file mode 100644 index 688c93ea9..000000000 --- a/mc-sema/validator/x86/tests/SHR32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; Shr32RI - mov eax, 0x4096 - ;TEST_BEGIN_RECORDING - shr eax, 0x6 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SHR8r1.asm b/mc-sema/validator/x86/tests/SHR8r1.asm deleted file mode 100644 index 1f9565540..000000000 --- a/mc-sema/validator/x86/tests/SHR8r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; Shr8R1 - mov al, 0x4F - ;TEST_BEGIN_RECORDING - shr al, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SHR8rCL.asm b/mc-sema/validator/x86/tests/SHR8rCL.asm deleted file mode 100644 index 80f918e85..000000000 --- a/mc-sema/validator/x86/tests/SHR8rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHR8rCL - mov bh, 0xe - mov cl, 0x2 - ;TEST_BEGIN_RECORDING - shr bh, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SHR8ri.asm b/mc-sema/validator/x86/tests/SHR8ri.asm deleted file mode 100644 index 3c4a0910a..000000000 --- a/mc-sema/validator/x86/tests/SHR8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHR8ri - mov ch, 0x8 - ;TEST_BEGIN_RECORDING - shr ch, 0x2 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SHRD32rri8.asm b/mc-sema/validator/x86/tests/SHRD32rri8.asm deleted file mode 100644 index 306d0efa5..000000000 --- a/mc-sema/validator/x86/tests/SHRD32rri8.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; Shr32RI - mov ebx, 0x00000010 - mov eax, 0x00001000 - ;TEST_BEGIN_RECORDING - shrd eax,ebx,16 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SHUFPSrmi.asm b/mc-sema/validator/x86/tests/SHUFPSrmi.asm deleted file mode 100644 index 772d6088f..000000000 --- a/mc-sema/validator/x86/tests/SHUFPSrmi.asm +++ /dev/null @@ -1,26 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x30] -and ecx, 0xFFFFFFF0 - -mov dword [ecx+0x00], 0xEEEEEEEE -mov dword [ecx+0x04], 0xFFFFFFFF -mov dword [ecx+0x08], 0x11111111 -mov dword [ecx+0x0C], 0x22222222 -movdqu xmm0, [ecx] - -mov dword [ecx+0x00], 0xAAAAAAAA -mov dword [ecx+0x04], 0xBBBBBBBB -mov dword [ecx+0x08], 0xCCCCCCCC -mov dword [ecx+0x0C], 0xDDDDDDDD - -shufps xmm0, [ecx], 0x4E -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/SHUFPSrri.asm b/mc-sema/validator/x86/tests/SHUFPSrri.asm deleted file mode 100644 index ea3f98d46..000000000 --- a/mc-sema/validator/x86/tests/SHUFPSrri.asm +++ /dev/null @@ -1,28 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea ecx, [esp-0x30] -and ecx, 0xFFFFFFF0 - -mov dword [ecx+0x00], 0xAAAAAAAA -mov dword [ecx+0x04], 0xBBBBBBBB -mov dword [ecx+0x08], 0xCCCCCCCC -mov dword [ecx+0x0C], 0xDDDDDDDD -movdqu xmm1, [ecx] - -mov dword [ecx+0x00], 0xEEEEEEEE -mov dword [ecx+0x04], 0xFFFFFFFF -mov dword [ecx+0x08], 0x11111111 -mov dword [ecx+0x0C], 0x22222222 -movdqu xmm0, [ecx] - -shufps xmm0, xmm1, 0x4E -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/STC.asm b/mc-sema/validator/x86/tests/STC.asm deleted file mode 100644 index b03fcfeda..000000000 --- a/mc-sema/validator/x86/tests/STC.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Stc - ;TEST_BEGIN_RECORDING - stc - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/STD.asm b/mc-sema/validator/x86/tests/STD.asm deleted file mode 100644 index 2ff9e61ed..000000000 --- a/mc-sema/validator/x86/tests/STD.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Std - ;TEST_BEGIN_RECORDING - std - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ST_F32m.asm b/mc-sema/validator/x86/tests/ST_F32m.asm deleted file mode 100644 index 712d8394d..000000000 --- a/mc-sema/validator/x86/tests/ST_F32m.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - ; ST_F32m - FLD1 - ;TEST_BEGIN_RECORDING - lea edi, [esp-0x4] - fst DWORD [edi] - mov eax, [edi] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ST_F64m.asm b/mc-sema/validator/x86/tests/ST_F64m.asm deleted file mode 100644 index 4d5f136d3..000000000 --- a/mc-sema/validator/x86/tests/ST_F64m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - ; ST_F64m - FLD1 - ;TEST_BEGIN_RECORDING - lea edi, [esp-0x10] - fst QWORD [edi] - mov eax, [edi+0x00] - mov ebx, [edi+0x04] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ST_Frr.asm b/mc-sema/validator/x86/tests/ST_Frr.asm deleted file mode 100644 index 009bb739c..000000000 --- a/mc-sema/validator/x86/tests/ST_Frr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - ; ST_Frr - fldpi - fldpi - ;TEST_BEGIN_RECORDING - fst st2 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ST_PF32m.asm b/mc-sema/validator/x86/tests/ST_PF32m.asm deleted file mode 100644 index 638a38523..000000000 --- a/mc-sema/validator/x86/tests/ST_PF32m.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - FLD1 - ;TEST_BEGIN_RECORDING - lea edi, [esp-0xc] - mov dword [edi], 0 - fstp dword [edi] - mov eax, dword [edi] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ST_PF64m.asm b/mc-sema/validator/x86/tests/ST_PF64m.asm deleted file mode 100644 index dd14c1a29..000000000 --- a/mc-sema/validator/x86/tests/ST_PF64m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - FLD1 - ;TEST_BEGIN_RECORDING - lea edi, [esp-0xc] - mov dword [edi], 0 - fstp qword [edi] - mov eax, dword [edi+00] - mov ebx, dword [edi+04] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ST_PF80m.asm b/mc-sema/validator/x86/tests/ST_PF80m.asm deleted file mode 100644 index b3acfd471..000000000 --- a/mc-sema/validator/x86/tests/ST_PF80m.asm +++ /dev/null @@ -1,18 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - FLD1 - ;TEST_BEGIN_RECORDING - lea edi, [esp-0x10] - mov dword [edi+0x00], 0 - mov dword [edi+0x04], 0 - mov dword [edi+0x08], 0 - fstp tword [edi] - mov eax, dword [edi+00] - mov ebx, dword [edi+04] - mov ecx, dword [edi+08] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/ST_PFr.asm b/mc-sema/validator/x86/tests/ST_PFr.asm deleted file mode 100644 index 744baea8f..000000000 --- a/mc-sema/validator/x86/tests/ST_PFr.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - ; ST_Frr - fldpi - ;TEST_BEGIN_RECORDING - fstp st2 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SUB16i16.asm b/mc-sema/validator/x86/tests/SUB16i16.asm deleted file mode 100644 index 60c050513..000000000 --- a/mc-sema/validator/x86/tests/SUB16i16.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SUB16i16 - mov ax, 0xa123 - ;TEST_BEGIN_RECORDING - sub ax, 0xeeee - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SUB16mr.asm b/mc-sema/validator/x86/tests/SUB16mr.asm deleted file mode 100644 index 262a0265d..000000000 --- a/mc-sema/validator/x86/tests/SUB16mr.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SUB16mr - ;TEST_BEGIN_RECORDING - lea ebx, [esp-0x4] - mov DWORD [ebx], 0xc8 - mov ecx, 0x3 - sub WORD [ebx], cx - mov ebx, [ebx] - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SUB16ri.asm b/mc-sema/validator/x86/tests/SUB16ri.asm deleted file mode 100644 index cd7159909..000000000 --- a/mc-sema/validator/x86/tests/SUB16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SUB16ri - mov bx, 0x2 - ;TEST_BEGIN_RECORDING - sub bx, 0x444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SUB16rm.asm b/mc-sema/validator/x86/tests/SUB16rm.asm deleted file mode 100644 index 6ecd17498..000000000 --- a/mc-sema/validator/x86/tests/SUB16rm.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; SUB16rm - ;TEST_BEGIN_RECORDING - lea ecx, [esp-0x4] - mov DWORD [ecx], 0xc8 - mov edx, 0x3 - sub dx, WORD [ecx] - mov ecx, [ecx] - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SUB32i32.asm b/mc-sema/validator/x86/tests/SUB32i32.asm deleted file mode 100644 index 1b070b6f1..000000000 --- a/mc-sema/validator/x86/tests/SUB32i32.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SUB32i32 - mov eax, 0x8 - ;TEST_BEGIN_RECORDING - sub eax, 0x6fffffff - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SUB32ri.asm b/mc-sema/validator/x86/tests/SUB32ri.asm deleted file mode 100644 index 7f0842a48..000000000 --- a/mc-sema/validator/x86/tests/SUB32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SUB32ri - mov ebx, 0xc - ;TEST_BEGIN_RECORDING - sub ebx, 0x44444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SUB32rr.asm b/mc-sema/validator/x86/tests/SUB32rr.asm deleted file mode 100644 index 9f3e163ed..000000000 --- a/mc-sema/validator/x86/tests/SUB32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Sub32RR - mov eax, 0x1 - mov ebx, 0x2 - ;TEST_BEGIN_RECORDING - sub ebx, eax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SUB8i8.asm b/mc-sema/validator/x86/tests/SUB8i8.asm deleted file mode 100644 index 79b84d274..000000000 --- a/mc-sema/validator/x86/tests/SUB8i8.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SUB8i8 - mov al, 0xa1 - ;TEST_BEGIN_RECORDING - sub al, 0x5 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SUB8mr.asm b/mc-sema/validator/x86/tests/SUB8mr.asm deleted file mode 100644 index c1ed7b890..000000000 --- a/mc-sema/validator/x86/tests/SUB8mr.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SUB8mr - ;TEST_BEGIN_RECORDING - lea eax, [esp-0x4] - mov DWORD [eax], 0xc8 - mov ebx, 0x2 - sub BYTE [eax], bl - mov eax, [eax] - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SUB8ri.asm b/mc-sema/validator/x86/tests/SUB8ri.asm deleted file mode 100644 index 2e51bc947..000000000 --- a/mc-sema/validator/x86/tests/SUB8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SUB8ri - mov ah, 0xdd - ;TEST_BEGIN_RECORDING - sub ah, 0x3 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SUB8rm.asm b/mc-sema/validator/x86/tests/SUB8rm.asm deleted file mode 100644 index f4adb8fb6..000000000 --- a/mc-sema/validator/x86/tests/SUB8rm.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SUB8rm - ;TEST_BEGIN_RECORDING - lea eax, [esp-0x4] - mov DWORD [eax], 0xc8 - mov ebx, 0x2 - sub bl, BYTE [eax] - mov eax, [eax] - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SUBR_F32m.asm b/mc-sema/validator/x86/tests/SUBR_F32m.asm deleted file mode 100644 index 31cad98c0..000000000 --- a/mc-sema/validator/x86/tests/SUBR_F32m.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - -FLDPI -;TEST_BEGIN_RECORDING -lea edi, [esp-0xc] -FST dword [edi] -FSUBR dword [edi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SUBR_F64m.asm b/mc-sema/validator/x86/tests/SUBR_F64m.asm deleted file mode 100644 index 6c157e23b..000000000 --- a/mc-sema/validator/x86/tests/SUBR_F64m.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 1.0 -FLD1 -;TEST_BEGIN_RECORDING -lea edi, [esp-08] -; 3.1415926 or there about -mov dword [edi+00], 0x54442d18 -mov dword [edi+04], 0x400921fb -FSUBR qword [edi] -mov edi, 0 -;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/SUBR_FST0r.asm b/mc-sema/validator/x86/tests/SUBR_FST0r.asm deleted file mode 100644 index d2c8b185a..000000000 --- a/mc-sema/validator/x86/tests/SUBR_FST0r.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 and st1 to be pi -FLDPI -FLDPI -;TEST_BEGIN_RECORDING -FSUBR st0, st1 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SUBR_FrST0.asm b/mc-sema/validator/x86/tests/SUBR_FrST0.asm deleted file mode 100644 index e9a6d4ddc..000000000 --- a/mc-sema/validator/x86/tests/SUBR_FrST0.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 and st1 to be pi -FLDPI -FLDPI -;TEST_BEGIN_RECORDING -FSUBR st1, st0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SUBSDrm.asm b/mc-sema/validator/x86/tests/SUBSDrm.asm deleted file mode 100644 index 7e2606cf3..000000000 --- a/mc-sema/validator/x86/tests/SUBSDrm.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 1 to a double precision float and store in xmm0 -mov ecx, 1 -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -; load 2.5 (in double precision float form) -lea ecx, [esp-8] -mov DWORD [ecx], 0 -mov DWORD [ecx+4], 0x40040000 - -subsd xmm0, [ecx] -mov ecx, [ecx] -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/SUBSDrr.asm b/mc-sema/validator/x86/tests/SUBSDrr.asm deleted file mode 100644 index aced3bb75..000000000 --- a/mc-sema/validator/x86/tests/SUBSDrr.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 3 to a double precision float and store in xmm0 -mov ecx, 3 -cvtsi2sd xmm0, ecx - -; convert 1 to a double precision float and store in xmm1 -mov ecx, 1 -cvtsi2sd xmm1, ecx - -;TEST_BEGIN_RECORDING -subsd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/SUBSSrm.asm b/mc-sema/validator/x86/tests/SUBSSrm.asm deleted file mode 100644 index ee5fbaf42..000000000 --- a/mc-sema/validator/x86/tests/SUBSSrm.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 1 to a double precision float and store in xmm0 -mov ecx, 1 -cvtsi2ss xmm0, ecx - -;TEST_BEGIN_RECORDING -; load 1.5 (in double precision float form) -lea ecx, [esp-4] -mov DWORD [ecx], 0x3fc00000 - -subss xmm0, [ecx] -mov ecx, [ecx] -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/SUBSSrr.asm b/mc-sema/validator/x86/tests/SUBSSrr.asm deleted file mode 100644 index 21a8ff02a..000000000 --- a/mc-sema/validator/x86/tests/SUBSSrr.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 3 to a double precision float and store in xmm0 -mov ecx, 3 -cvtsi2ss xmm0, ecx - -; convert 1 to a double precision float and store in xmm1 -mov ecx, 1 -cvtsi2ss xmm1, ecx - -;TEST_BEGIN_RECORDING -subss xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/SUB_F32m.asm b/mc-sema/validator/x86/tests/SUB_F32m.asm deleted file mode 100644 index fe302ab06..000000000 --- a/mc-sema/validator/x86/tests/SUB_F32m.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - -FLDPI -;TEST_BEGIN_RECORDING -lea edi, [esp-0xc] -FST dword [edi] -FSUB dword [edi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SUB_F64m.asm b/mc-sema/validator/x86/tests/SUB_F64m.asm deleted file mode 100644 index eab0dd010..000000000 --- a/mc-sema/validator/x86/tests/SUB_F64m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - -; set up st0 to be 1.0 -FLD1 -FLDPI -;TEST_BEGIN_RECORDING -lea edi, [esp-0xc] -FSTP qword [edi] -FSUB qword [edi] -mov edi, 0 -;TEST_END_RECORDING diff --git a/mc-sema/validator/x86/tests/SUB_FST0r.asm b/mc-sema/validator/x86/tests/SUB_FST0r.asm deleted file mode 100644 index e14350063..000000000 --- a/mc-sema/validator/x86/tests/SUB_FST0r.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 and st1 to be pi -FLDPI -FLDPI -;TEST_BEGIN_RECORDING -FSUB st0, st1 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/SUB_FrST0.asm b/mc-sema/validator/x86/tests/SUB_FrST0.asm deleted file mode 100644 index 7b16febfe..000000000 --- a/mc-sema/validator/x86/tests/SUB_FrST0.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 and st1 to be pi -FLDPI -FLDPI -;TEST_BEGIN_RECORDING -FSUB st1, st0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/Sar32RI1.asm b/mc-sema/validator/x86/tests/Sar32RI1.asm deleted file mode 100644 index c5ae65300..000000000 --- a/mc-sema/validator/x86/tests/Sar32RI1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; Sar32RI1 - mov ebx, 0x56 - ;TEST_BEGIN_RECORDING - sar ebx, 0x3 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/Sar32RI2.asm b/mc-sema/validator/x86/tests/Sar32RI2.asm deleted file mode 100644 index c484fcdb8..000000000 --- a/mc-sema/validator/x86/tests/Sar32RI2.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; Sar32RI2 - ;TEST_BEGIN_RECORDING - sar ebx, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/Sbb32RR1.asm b/mc-sema/validator/x86/tests/Sbb32RR1.asm deleted file mode 100644 index 223ebd324..000000000 --- a/mc-sema/validator/x86/tests/Sbb32RR1.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Sbb32RR1 - mov ecx, 0x1892 - mov edx, 0x4 - ;TEST_BEGIN_RECORDING - sbb edx, ecx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/Sbb32RR2.asm b/mc-sema/validator/x86/tests/Sbb32RR2.asm deleted file mode 100644 index df6887749..000000000 --- a/mc-sema/validator/x86/tests/Sbb32RR2.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Sbb32RR2 - clc - mov ecx, 0xffffff67 - mov edx, 0x19 - ;TEST_BEGIN_RECORDING - sbb edx, ecx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/TEST16i16.asm b/mc-sema/validator/x86/tests/TEST16i16.asm deleted file mode 100644 index ead0b4163..000000000 --- a/mc-sema/validator/x86/tests/TEST16i16.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; TEST16i16 - mov ax, 0x7 - ;TEST_BEGIN_RECORDING - test ax, 0xeeee - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/TEST16ri.asm b/mc-sema/validator/x86/tests/TEST16ri.asm deleted file mode 100644 index f70a60440..000000000 --- a/mc-sema/validator/x86/tests/TEST16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; TEST16ri - mov bx, 0x7 - ;TEST_BEGIN_RECORDING - test bx, 0x444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/TEST16rr.asm b/mc-sema/validator/x86/tests/TEST16rr.asm deleted file mode 100644 index b95b9d981..000000000 --- a/mc-sema/validator/x86/tests/TEST16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; TEST16rr - mov cx, 0x0 - mov dx, 0x1 - ;TEST_BEGIN_RECORDING - test cx, dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/TEST32i32.asm b/mc-sema/validator/x86/tests/TEST32i32.asm deleted file mode 100644 index 4d2c7b896..000000000 --- a/mc-sema/validator/x86/tests/TEST32i32.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; TEST32i32 - mov eax, 0x7 - ;TEST_BEGIN_RECORDING - test eax, 0x6fffffff - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/TEST32ri.asm b/mc-sema/validator/x86/tests/TEST32ri.asm deleted file mode 100644 index c0c5709f3..000000000 --- a/mc-sema/validator/x86/tests/TEST32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; TEST32ri - mov ebx, 0x7 - ;TEST_BEGIN_RECORDING - test ebx, 0x44444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/TEST32rr.asm b/mc-sema/validator/x86/tests/TEST32rr.asm deleted file mode 100644 index e141ebbcb..000000000 --- a/mc-sema/validator/x86/tests/TEST32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; TEST32rr - mov ecx, 0x0 - mov edx, 0x1 - ;TEST_BEGIN_RECORDING - test ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/TEST8i8.asm b/mc-sema/validator/x86/tests/TEST8i8.asm deleted file mode 100644 index a44b7d95d..000000000 --- a/mc-sema/validator/x86/tests/TEST8i8.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; TEST8i8 - mov al, 0x7 - ;TEST_BEGIN_RECORDING - test al, 0x5 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/TEST8ri.asm b/mc-sema/validator/x86/tests/TEST8ri.asm deleted file mode 100644 index 91ad9a82c..000000000 --- a/mc-sema/validator/x86/tests/TEST8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; TEST8ri - mov ah, 0x2 - ;TEST_BEGIN_RECORDING - test ah, 0x3 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/TEST8rr.asm b/mc-sema/validator/x86/tests/TEST8rr.asm deleted file mode 100644 index 988e0fabb..000000000 --- a/mc-sema/validator/x86/tests/TEST8rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; TEST8rr - mov ch, 0x2 - mov dh, 0x3 - ;TEST_BEGIN_RECORDING - test ch, dh - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/Test32RR1.asm b/mc-sema/validator/x86/tests/Test32RR1.asm deleted file mode 100644 index a6788f9ac..000000000 --- a/mc-sema/validator/x86/tests/Test32RR1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; Test32RR1 - mov ebx, 0x0 - ;TEST_BEGIN_RECORDING - test ebx, ebx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/Test32RR2.asm b/mc-sema/validator/x86/tests/Test32RR2.asm deleted file mode 100644 index e177efb3d..000000000 --- a/mc-sema/validator/x86/tests/Test32RR2.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; Test32RR2 - mov edi, 0x8 - mov eax, 0x12 - ;TEST_BEGIN_RECORDING - test edi, eax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/UCOMISDrm.asm b/mc-sema/validator/x86/tests/UCOMISDrm.asm deleted file mode 100644 index 00900cff6..000000000 --- a/mc-sema/validator/x86/tests/UCOMISDrm.asm +++ /dev/null @@ -1,19 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 -cvtsi2sd xmm0, ecx -mov ecx, 0 -cvtsi2sd xmm1, ecx -;TEST_BEGIN_RECORDING -lea ecx, [esp-8] -movsd [ecx], xmm1 -ucomiss xmm0, [ecx] -mov ecx, 0 -;TEST_END_RECORDING -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/UCOMISDrr.asm b/mc-sema/validator/x86/tests/UCOMISDrr.asm deleted file mode 100644 index 085283126..000000000 --- a/mc-sema/validator/x86/tests/UCOMISDrr.asm +++ /dev/null @@ -1,19 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 -cvtsi2sd xmm0, ecx -mov ecx, 0 -cvtsi2sd xmm1, ecx - -;TEST_BEGIN_RECORDING -ucomisd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/tests/UCOMISSrm.asm b/mc-sema/validator/x86/tests/UCOMISSrm.asm deleted file mode 100644 index 3dad85ad4..000000000 --- a/mc-sema/validator/x86/tests/UCOMISSrm.asm +++ /dev/null @@ -1,19 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 -cvtsi2ss xmm0, ecx -mov ecx, 0 -cvtsi2ss xmm1, ecx -;TEST_BEGIN_RECORDING -lea ecx, [esp-4] -movss [ecx], xmm1 -ucomiss xmm0, [ecx] -mov ecx, 0 -;TEST_END_RECORDING -cvtsi2ss xmm0, ecx -cvtsi2ss xmm1, ecx diff --git a/mc-sema/validator/x86/tests/UCOMISSrr.asm b/mc-sema/validator/x86/tests/UCOMISSrr.asm deleted file mode 100644 index 993a6799b..000000000 --- a/mc-sema/validator/x86/tests/UCOMISSrr.asm +++ /dev/null @@ -1,19 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 -cvtsi2ss xmm0, ecx -mov ecx, 0 -cvtsi2ss xmm1, ecx - -;TEST_BEGIN_RECORDING -ucomiss xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2ss xmm0, ecx -cvtsi2ss xmm1, ecx diff --git a/mc-sema/validator/x86/tests/XADD16rr.asm b/mc-sema/validator/x86/tests/XADD16rr.asm deleted file mode 100644 index 9f32a5872..000000000 --- a/mc-sema/validator/x86/tests/XADD16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Xadd16RR - mov ax, 0x6824 - mov dx, 0x1479 - ;TEST_BEGIN_RECORDING - xadd ax, dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/XADD32rm.asm b/mc-sema/validator/x86/tests/XADD32rm.asm deleted file mode 100644 index dc782aebe..000000000 --- a/mc-sema/validator/x86/tests/XADD32rm.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; XADD32rm - ;TEST_BEGIN_RECORDING - lea edi, [esp-0x4] - mov DWORD [edi], 0xabcd4321 - mov eax, 0x56781234 - xadd [edi], eax - mov edx, [edi] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/XADD32rr.asm b/mc-sema/validator/x86/tests/XADD32rr.asm deleted file mode 100644 index 2a1a00efc..000000000 --- a/mc-sema/validator/x86/tests/XADD32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; XADD32rr - mov ebx, 0xb46767 - mov ecx, 0xa57877 - ;TEST_BEGIN_RECORDING - xadd ebx, ecx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/XADD8rr.asm b/mc-sema/validator/x86/tests/XADD8rr.asm deleted file mode 100644 index c6faf3f06..000000000 --- a/mc-sema/validator/x86/tests/XADD8rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; XADD8rr - mov al, 0x45 - mov bl, 0x56 - ;TEST_BEGIN_RECORDING - xadd al, bl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/XCHG16ar.asm b/mc-sema/validator/x86/tests/XCHG16ar.asm deleted file mode 100644 index 983df6716..000000000 --- a/mc-sema/validator/x86/tests/XCHG16ar.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; XCHG16ar - mov ax, 0x6 - mov bx, 0x7 - ;TEST_BEGIN_RECORDING - xchg ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/XCHG16rr.asm b/mc-sema/validator/x86/tests/XCHG16rr.asm deleted file mode 100644 index 84960203f..000000000 --- a/mc-sema/validator/x86/tests/XCHG16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; XCHG16rr - mov bx, 0xc - mov dx, 0xd - ;TEST_BEGIN_RECORDING - xchg bx, dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/XCHG32ar.asm b/mc-sema/validator/x86/tests/XCHG32ar.asm deleted file mode 100644 index 179280452..000000000 --- a/mc-sema/validator/x86/tests/XCHG32ar.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; XCHG32ar - mov eax, 0x20 - mov ebx, 0x30 - ;TEST_BEGIN_RECORDING - xchg eax, ebx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/XCHG32rr.asm b/mc-sema/validator/x86/tests/XCHG32rr.asm deleted file mode 100644 index 96e5df7ea..000000000 --- a/mc-sema/validator/x86/tests/XCHG32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; XCHG32rr - mov ebx, 0x120 - mov ecx, 0x122 - ;TEST_BEGIN_RECORDING - xchg ebx, ecx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/XCHG8rr.asm b/mc-sema/validator/x86/tests/XCHG8rr.asm deleted file mode 100644 index d55a9ae8f..000000000 --- a/mc-sema/validator/x86/tests/XCHG8rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; XCHG8rr - mov bl, 0x4 - mov cl, 0x6 - ;TEST_BEGIN_RECORDING - xchg bl, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/XOR16i16.asm b/mc-sema/validator/x86/tests/XOR16i16.asm deleted file mode 100644 index 711d91432..000000000 --- a/mc-sema/validator/x86/tests/XOR16i16.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; XOR16i16 - mov ax, 0x2 - ;TEST_BEGIN_RECORDING - xor ax, 0xeeee - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/XOR16ri.asm b/mc-sema/validator/x86/tests/XOR16ri.asm deleted file mode 100644 index 89cbd11ae..000000000 --- a/mc-sema/validator/x86/tests/XOR16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; XOR16ri - mov bx, 0x2 - ;TEST_BEGIN_RECORDING - xor bx, 0x444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/XOR16rr.asm b/mc-sema/validator/x86/tests/XOR16rr.asm deleted file mode 100644 index b5f2113d8..000000000 --- a/mc-sema/validator/x86/tests/XOR16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; XOR16rr - mov cx, 0x2 - mov dx, 0x3 - ;TEST_BEGIN_RECORDING - xor cx, dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/XOR32i32.asm b/mc-sema/validator/x86/tests/XOR32i32.asm deleted file mode 100644 index 6e155ab50..000000000 --- a/mc-sema/validator/x86/tests/XOR32i32.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; XOR32i32 - mov eax, 0x12 - ;TEST_BEGIN_RECORDING - xor eax, 0x6fffffff - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/XOR32ri.asm b/mc-sema/validator/x86/tests/XOR32ri.asm deleted file mode 100644 index 48e37017c..000000000 --- a/mc-sema/validator/x86/tests/XOR32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; Xor32RI - mov ebx, 0x12345 - ;TEST_BEGIN_RECORDING - xor ebx, 0x12345 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/XOR32rr.asm b/mc-sema/validator/x86/tests/XOR32rr.asm deleted file mode 100644 index d0774b947..000000000 --- a/mc-sema/validator/x86/tests/XOR32rr.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; Xor32RR - ;TEST_BEGIN_RECORDING - xor eax, eax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/XOR8i8.asm b/mc-sema/validator/x86/tests/XOR8i8.asm deleted file mode 100644 index 0136c248e..000000000 --- a/mc-sema/validator/x86/tests/XOR8i8.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; XOR8i8 - mov al, 0x12 - ;TEST_BEGIN_RECORDING - xor al, 0x5 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/XOR8ri.asm b/mc-sema/validator/x86/tests/XOR8ri.asm deleted file mode 100644 index 286cc41e8..000000000 --- a/mc-sema/validator/x86/tests/XOR8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; XOR8ri - mov ah, 0x12 - ;TEST_BEGIN_RECORDING - xor ah, 0x3 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/XOR8rr.asm b/mc-sema/validator/x86/tests/XOR8rr.asm deleted file mode 100644 index cd925b774..000000000 --- a/mc-sema/validator/x86/tests/XOR8rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; XOR8rr - mov ch, 0x2 - mov dh, 0x3 - ;TEST_BEGIN_RECORDING - xor ch, dh - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86/tests/XORPSrm.asm b/mc-sema/validator/x86/tests/XORPSrm.asm deleted file mode 100644 index af767dd71..000000000 --- a/mc-sema/validator/x86/tests/XORPSrm.asm +++ /dev/null @@ -1,34 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-17] -and ecx, 0xfffffff0 - -; load 128 bit value into xmm0 -mov DWORD [ecx], 0x12345678 -mov DWORD [ecx+4], 0x55555555 -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0x1f311c47 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -;TEST_BEGIN_RECORDING -lea ecx, [esp-17] -and ecx, 0xfffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [ecx], 0xabcdef12 -mov DWORD [ecx+4], 0xaaaaaaaa -mov DWORD [ecx+8], 0xdeadbeef -mov DWORD [ecx+12], 0xfeeb1e01 - -xorps xmm0, [ecx] -mov ecx, [ecx] -xor ecx, ecx -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86/tests/XORPSrr.asm b/mc-sema/validator/x86/tests/XORPSrr.asm deleted file mode 100644 index 705624a54..000000000 --- a/mc-sema/validator/x86/tests/XORPSrr.asm +++ /dev/null @@ -1,32 +0,0 @@ -BITS 32 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea ecx, [esp-33] -and ecx, 0xfffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [ecx], 0x55555555 -mov DWORD [ecx+4], 0x14530451 -mov DWORD [ecx+8], 0x1badb002 -mov DWORD [ecx+12], 0xf0f0f0f0 -movaps xmm0, [ecx] -lea ecx, [ecx+16] - -; load a 128 bit value into xmm1 -mov DWORD [ecx], 0xaaaaaaaa -mov DWORD [ecx+4], 0xcafebabe -mov DWORD [ecx+8], 0x2badb002 -mov DWORD [ecx+12], 0x0e0e0e0e -movaps xmm1, [ecx] - -;TEST_BEGIN_RECORDING -xorps xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86/valTest/CMakeLists.txt b/mc-sema/validator/x86/valTest/CMakeLists.txt deleted file mode 100644 index ce47a85a0..000000000 --- a/mc-sema/validator/x86/valTest/CMakeLists.txt +++ /dev/null @@ -1,85 +0,0 @@ -find_package(Nasm REQUIRED) -find_package(Pin REQUIRED) - -SET_SOURCE_FILES_PROPERTIES( "${CMAKE_CURRENT_BINARY_DIR}/test_a.auto.obj" - PROPERTIES - EXTERNAL_OBJECT true - GENERATED true - ) - -add_custom_target(test_a.auto.asm ALL - COMMAND ${PYTHON_EXECUTABLE} "${CMAKE_CURRENT_SOURCE_DIR}/../testgen.py" - -tstmpl "${CMAKE_CURRENT_SOURCE_DIR}/../testSemantics/testSemantics.template" - -taout "${CMAKE_CURRENT_SOURCE_DIR}/test_a.auto.asm" - -testfiles "${CMAKE_CURRENT_SOURCE_DIR}/../tests" - -nasm "${NASM_EXECUTABLE}" - COMMENT Generating semantics tests asm file - ) - -if(WIN32) -add_custom_target(test_a.auto.obj ALL - COMMAND ${NASM_EXECUTABLE} - --prefix _ - -f win - -o "${CMAKE_CURRENT_BINARY_DIR}/test_a.auto.obj" - "${CMAKE_CURRENT_SOURCE_DIR}/test_a.auto.asm" - DEPENDS test_a.auto.asm - COMMENT Assembling autogenerated semantics tests - - ) -else(WIN32) - if(APPLE) - add_custom_target(test_a.auto.obj ALL - COMMAND ${NASM_EXECUTABLE} - -f macho32 - -o "${CMAKE_CURRENT_BINARY_DIR}/test_a.auto.obj" - "${CMAKE_CURRENT_SOURCE_DIR}/test_a.auto.asm" - DEPENDS test_a.auto.asm - COMMENT Assembling autogenerated semantics tests - - ) - else(APPLE) - add_custom_target(test_a.auto.obj ALL - COMMAND ${NASM_EXECUTABLE} - -f elf32 - -o "${CMAKE_CURRENT_BINARY_DIR}/test_a.auto.obj" - "${CMAKE_CURRENT_SOURCE_DIR}/test_a.auto.asm" - DEPENDS test_a.auto.asm - COMMENT Assembling autogenerated semantics tests - - ) - endif(APPLE) -endif(WIN32) - -add_dependencies(test_a.auto.obj test_a.auto.asm Pin) - -add_executable(valTest test.c "${CMAKE_CURRENT_BINARY_DIR}/test_a.auto.obj") -if(NOT WIN32) -set_target_properties(valTest PROPERTIES COMPILE_FLAGS "-m32") -set_target_properties(valTest PROPERTIES LINK_FLAGS "-m32") -endif(NOT WIN32) - -add_dependencies(valTest test_a.auto.obj Pin) - -get_target_property(VALTEST_EXECUTABLE valTest LOCATION) -get_filename_component(VALTEST_PATH ${VALTEST_EXECUTABLE} PATH) -if(WIN32) -add_custom_target(tests.out ALL - ${PIN_EXECUTABLE} - -t "${CMAKE_CURRENT_SOURCE_DIR}/../valTool/obj-ia32/val.dll" -- "${VALTEST_EXECUTABLE}" - WORKING_DIRECTORY "${VALTEST_PATH}" - COMMENT Running PIN to generate ground truth for semantics tests - DEPENDS valTest - ) -else(WIN32) -add_custom_target(tests.out ALL - ${PIN_EXECUTABLE} "-injection" "child" -t "${CMAKE_CURRENT_SOURCE_DIR}/../valTool/val.so" -- "${VALTEST_EXECUTABLE}" - WORKING_DIRECTORY "${VALTEST_PATH}" - COMMENT Running PIN to generate ground truth for semantics tests - DEPENDS valTest - ) -endif(WIN32) - -IF(APPLE) - SET_TARGET_PROPERTIES(valTest PROPERTIES LINK_FLAGS "-pagezero_size 1000 -arch x86_64") -endif(APPLE) diff --git a/mc-sema/validator/x86/valTest/Makefile b/mc-sema/validator/x86/valTest/Makefile deleted file mode 100644 index e08fdf321..000000000 --- a/mc-sema/validator/x86/valTest/Makefile +++ /dev/null @@ -1,16 +0,0 @@ -all: tests.out - -tests.out: test - pin -t $$PWD/../valTool/obj-ia32/val.so -- ./test - -test: test_a.o test.o - gcc -m32 -o test test.o test_a.o - -test_a.o: test_a.asm - nasm -f elf32 -o test_a.o test_a.asm - -test.o: test.c - gcc -m32 -c -o test.o test.c - -clean: - rm -f *.o tests.out diff --git a/mc-sema/validator/x86/valTest/Makefile.linux b/mc-sema/validator/x86/valTest/Makefile.linux deleted file mode 100644 index e08fdf321..000000000 --- a/mc-sema/validator/x86/valTest/Makefile.linux +++ /dev/null @@ -1,16 +0,0 @@ -all: tests.out - -tests.out: test - pin -t $$PWD/../valTool/obj-ia32/val.so -- ./test - -test: test_a.o test.o - gcc -m32 -o test test.o test_a.o - -test_a.o: test_a.asm - nasm -f elf32 -o test_a.o test_a.asm - -test.o: test.c - gcc -m32 -c -o test.o test.c - -clean: - rm -f *.o tests.out diff --git a/mc-sema/validator/x86/valTest/Makefile.osx b/mc-sema/validator/x86/valTest/Makefile.osx deleted file mode 100644 index 761b7cf19..000000000 --- a/mc-sema/validator/x86/valTest/Makefile.osx +++ /dev/null @@ -1,13 +0,0 @@ -tests.out: - pin -t $$PWD/../valTool/obj-ia32/val.so -- ./test - -test: test_a.o test.o - gcc -m32 -o test test.o test_a.o - -test_a.o: test_a.asm - nasm -f macho -o test_a.o test_a.asm - -test.o: test.c - gcc -m32 -c -o test.o test.c - -all: test tests.out diff --git a/mc-sema/validator/x86/valTest/Makefile.win32 b/mc-sema/validator/x86/valTest/Makefile.win32 deleted file mode 100644 index 810a1036e..000000000 --- a/mc-sema/validator/x86/valTest/Makefile.win32 +++ /dev/null @@ -1,21 +0,0 @@ -#ensure PIN_HOME is set using Windows-style paths; -#e.g.: C:\pin - -all: tests.out - -.IGNORE: tests.out -tests.out: test - cmd.exe /c "${PIN_HOME}\pin.bat -t ..\valTool\obj-ia32\val.dll -- test.exe" - -test: test_a.obj test.obj - gcc -o test test.obj test_a.obj - -test_a.obj: test_a.asm - nasm --prefix _ -f win -o test_a.obj test_a.asm - -test.obj: test.c - gcc -m32 -c -o test.obj test.c - -.IGNORE: clean -clean: - rm -f *.obj tests.out diff --git a/mc-sema/validator/x86/valTest/test.c b/mc-sema/validator/x86/valTest/test.c deleted file mode 100644 index d4ebc57fe..000000000 --- a/mc-sema/validator/x86/valTest/test.c +++ /dev/null @@ -1,38 +0,0 @@ -/* -Copyright (c) 2014, Trail of Bits -All rights reserved. - -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of Trail of Bits nor the names of its - contributors may be used to endorse or promote products derived from - this software without specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#include - -extern void doTest(void); - -int main(int argc, char *argv[]) { - - doTest(); - - return 0; -} diff --git a/mc-sema/validator/x86/valTool/CMakeLists.txt b/mc-sema/validator/x86/valTool/CMakeLists.txt deleted file mode 100644 index a635447e7..000000000 --- a/mc-sema/validator/x86/valTool/CMakeLists.txt +++ /dev/null @@ -1,11 +0,0 @@ -find_package(Pin REQUIRED) - -get_filename_component(PIN_PATH ${PIN_EXECUTABLE} PATH) - -add_custom_target(pin_validate ALL - COMMAND "${CMAKE_COMMAND}" -DPIN_HOME="${PIN_PATH}" -P "${CMAKE_CURRENT_SOURCE_DIR}/valTool.cmake" - WORKING_DIRECTORY "${CMAKE_CURRENT_SOURCE_DIR}" - COMMENT Building PIN tool for Win32... - ) - -add_dependencies(pin_validate Pin) diff --git a/mc-sema/validator/x86/valTool/Makefile.linux b/mc-sema/validator/x86/valTool/Makefile.linux deleted file mode 100644 index f6fd6a221..000000000 --- a/mc-sema/validator/x86/valTool/Makefile.linux +++ /dev/null @@ -1,25 +0,0 @@ - -CC ?= gcc -CXX ?= g++ - -CXXFLAGS:=-std=c++11 -m32 -DTARGET_IA32 -DHOST_IA32 -DTARGET_LINUX -fPIC -INCLUDE:=-I$(PIN_HOME)/source/include/pin -I$(PIN_HOME)/source/include/pin/gen -I$(PIN_HOME)/extras/components/include -I$(PIN_HOME)/extras/xed2-ia32/include - -LDFLAGS:=-m32 -shared -Wl,--hash-style=sysv -Wl,-Bsymbolic -lpin -lxed -ldwarf -lelf -ldl -LPATHS:=-L$(PIN_HOME)/ia32/lib/ -L$(PIN_HOME)/ia32/lib-ext -L$(PIN_HOME)/extras/xed2-ia32/lib - -SRC=$(wildcard *.cpp) -OBJS=$(patsubst %.cpp,%.o,$(SRC)) - -TARGET=val.so - -all: $(SRC) $(OBJS) $(TARGET) - -$(TARGET): $(OBJS) - $(CXX) -o $(TARGET) $(OBJS) -shared -m32 $(LPATHS) $(LDFLAGS) - -%.o: %.cpp Makefile.linux - $(CXX) $(CXXFLAGS) $(INCLUDE) -c $< -o $@ - -clean: - rm $(TARGET) $(OBJS) diff --git a/mc-sema/validator/x86/valTool/Makefile.osx b/mc-sema/validator/x86/valTool/Makefile.osx deleted file mode 100644 index 90994476d..000000000 --- a/mc-sema/validator/x86/valTool/Makefile.osx +++ /dev/null @@ -1,25 +0,0 @@ - -CC ?= clang -CXX ?= clang++ - -CXXFLAGS:=-std=c++11 -DTARGET_IA32 -DHOST_IA32 -DTARGET_MAC -fPIC -arch i386 -stdlib=libstdc++ -INCLUDE:=-I$(PIN_HOME)/source/include/pin -I$(PIN_HOME)/source/include/pin/gen -I$(PIN_HOME)/extras/components/include -I$(PIN_HOME)/extras/xed2-ia32/include - -LDFLAGS:=-stdlib=libstdc++ -shared -lpin -lxed -ldl -LPATHS:=-L$(PIN_HOME)/ia32/lib/ -L$(PIN_HOME)/ia32/lib-ext -L$(PIN_HOME)/extras/xed2-ia32/lib -L$(PIN_HOME)/ia32/runtime/glibc - -SRC=$(wildcard *.cpp) -OBJS=$(patsubst %.cpp,%.o,$(SRC)) - -TARGET=val.so - -all: $(SRC) $(OBJS) $(TARGET) - -$(TARGET): $(OBJS) - $(CXX) -o $(TARGET) $(OBJS) -shared -m32 $(LPATHS) $(LDFLAGS) - -%.o: %.cpp Makefile.osx - $(CXX) $(CXXFLAGS) $(INCLUDE) -c $< -o $@ - -clean: - rm $(TARGET) $(OBJS) diff --git a/mc-sema/validator/x86/valTool/Nmakefile b/mc-sema/validator/x86/valTool/Nmakefile deleted file mode 100644 index 5a9c13011..000000000 --- a/mc-sema/validator/x86/valTool/Nmakefile +++ /dev/null @@ -1,20 +0,0 @@ -###################################################################################### -# This is the NMAKE file for building and testing PIN toos contained in one of the -# subdirectories of the PinTool project or PIN kit. -# -# For description of targets and options, see Nmakefile in the root directory. -###################################################################################### - -!if "$(PIN_HOME)"=="" -PIN_HOME=.. -!endif - -# Define tools to be buit and tested -###################################################################################### -COMMON_TOOLS= val.dll - - -# Include building and testing rules from the root Nmakefile. -###################################################################################### -INCLUDE_SUB_RULES=1 -!INCLUDE $(PIN_HOME)\..\..\source\tools\Nmakefile diff --git a/mc-sema/validator/x86/valTool/makefile b/mc-sema/validator/x86/valTool/makefile deleted file mode 100644 index c27c2c3cc..000000000 --- a/mc-sema/validator/x86/valTool/makefile +++ /dev/null @@ -1,103 +0,0 @@ -## -## This is a sample makefile for building Pin tools outside -## of the Pin environment. This makefile is suitable for -## building with the Pin kit, not a Pin source development tree. -## -## To build the tool, execute the make command: -## -## make -## or -## make PIN_HOME= -## -## After building your tool, you would invoke Pin like this: -## -## $PIN_HOME/pin -t MyPinTool -- /bin/ls -## -############################################################## -# -# User-specific configuration -# -############################################################## - -# -# 1. Change PIN_HOME to point to the top-level directory where -# Pin was installed. This can also be set on the command line, -# or as an environment variable. -# -#PIN_HOME ?= ../../.. - - -############################################################## -# -# set up and include *.config files -# -############################################################## - -PIN_KIT=$(PIN_HOME) -KIT=1 -TESTAPP=$(OBJDIR)cp-pin.exe -TARGET=ia32 - -TARGET_COMPILER?=gnu -ifdef OS - ifeq (${OS},Windows_NT) - TARGET_COMPILER=ms - endif -endif - -ifeq ($(TARGET_COMPILER),gnu) - include $(PIN_HOME)/source/tools/makefile.gnu.config - CXXFLAGS ?= -std=c++11 -Wall -Werror -Wno-unknown-pragmas $(DBG) $(OPT) - PIN=$(PIN_HOME)/pin -endif - -ifeq ($(TARGET_COMPILER),ms) - include $(PIN_HOME)/source/tools/makefile.ms.config - DBG?= - PIN=$(PIN_HOME)/pin.bat -endif - - -############################################################## -# -# Tools - you may wish to add your tool name to TOOL_ROOTS -# -############################################################## - - -TOOL_ROOTS = val - -TOOLS = $(TOOL_ROOTS:%=$(OBJDIR)%$(PINTOOL_SUFFIX)) - - -############################################################## -# -# build rules -# -############################################################## - -all: tools -tools: $(OBJDIR) $(TOOLS) $(OBJDIR)cp-pin.exe -test: $(OBJDIR) $(TOOL_ROOTS:%=%.test) - -val.test: $(OBJDIR)cp-pin.exe - $(MAKE) -k PIN_HOME=$(PIN_HOME) - -$(OBJDIR)cp-pin.exe: - $(CXX) $(PIN_HOME)/source/tools/Tests/cp-pin.cpp $(APP_CXXFLAGS) -o $(OBJDIR)cp-pin.exe - -$(OBJDIR): - mkdir -p $(OBJDIR) - -$(OBJDIR)%.o : %.cpp - $(CXX) -c $(CXXFLAGS) $(PIN_CXXFLAGS) ${OUTOPT}$@ $< - -$(TOOLS): $(PIN_LIBNAMES) - -$(TOOLS): %$(PINTOOL_SUFFIX) : %.o - ${PIN_LD} $(PIN_LDFLAGS) $(LINK_DEBUG) ${LINK_OUT}$@ $< ${PIN_LPATHS} $(PIN_LIBS) $(DBG) - - -## cleaning -clean: - -rm -rf $(OBJDIR) *.out *.tested *.failed makefile.copy diff --git a/mc-sema/validator/x86/valTool/val.cpp b/mc-sema/validator/x86/valTool/val.cpp deleted file mode 100644 index a9e405caf..000000000 --- a/mc-sema/validator/x86/valTool/val.cpp +++ /dev/null @@ -1,496 +0,0 @@ -/* -Copyright (c) 2014, Trail of Bits -All rights reserved. - -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of Trail of Bits nor the names of its - contributors may be used to endorse or promote products derived from - this software without specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#include "pin.H" -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#if !defined(__APPLE__) - #include -#endif - -using namespace std; - -#define AF ( 1 << 4 ) -#define SF ( 1 << 7 ) -#define ZF ( 1 << 6 ) -#define PF ( 1 << 2 ) -#define OF ( 1 << 11 ) -#define CF ( 1 << 0 ) -#define DF ( 1 << 10 ) - -#define ARRAYSIZE(x) ((sizeof(x)/sizeof(0[x])) / ((size_t)(!(sizeof(x) % sizeof(0[x]))))) - -/* ================================================================== */ -// Types and declarations -/* ================================================================== */ - -//types for tracking register states -typedef vector regWrittenT; -typedef map writtenSetsT; - -typedef vector valVecT; -typedef pair valWidthT; -typedef map writtenMemT; -typedef map memSetsT; - -typedef union { - long double st; - uint8_t pad[16]; -} streg; - -typedef union { - uint8_t pad[16]; -} xmmreg; - -#ifdef _MSC_VER -#pragma pack (1) -#endif - -typedef struct -#ifdef _MSC_VER -__declspec(align(16)) -#endif - _fxsave { - uint16_t FCW; - uint16_t FSW; - uint8_t FTW; - uint8_t res0; - uint16_t FOP; - uint32_t FPUIP; - uint16_t FPUCS; - uint16_t res1; - uint32_t FPUDP; - uint16_t FPUDS; - uint16_t res2; - uint32_t MXCSR; - uint32_t MXCSR_MASK; - // FPU/MMX registers - streg ST[8]; - - // SSE - xmmreg XMM[8]; - - // reserved fields - uint8_t res3[176]; - - // available fields - uint8_t avail[48]; -} -#ifndef _MSC_VER -__attribute__((aligned(16),packed)) -#endif -fxsave; - -#ifdef _MSVC_VER -#pragma pack () -#endif - - -struct flagentry { - std::string name; - uint16_t mask; - uint16_t shift; -}; - -flagentry FPU_FLAGS[] = { - {"FPU_BUSY", 1, 15}, - {"FPU_C3", 1, 14}, - {"FPU_TOP", 7, 11}, - {"FPU_C2", 1, 10}, - {"FPU_C1", 1, 9}, - {"FPU_C0", 1, 8}, - {"FPU_ES", 1, 7}, - {"FPU_SF", 1, 6}, - {"FPU_PE", 1, 5}, - {"FPU_UE", 1, 4}, - {"FPU_OE", 1, 3}, - {"FPU_ZE", 1, 2}, - {"FPU_DE", 1, 1}, - {"FPU_IE", 1, 0} -}; - -flagentry FPU_CONTROL[] = { - {"FPU_X", 1, 12}, - {"FPU_RC", 3, 10}, - {"FPU_PC", 3, 8}, - {"FPU_PM", 1, 5}, - {"FPU_UM", 1, 4}, - {"FPU_OM", 1, 3}, - {"FPU_ZM", 1, 2}, - {"FPU_DM", 1, 1}, - {"FPU_IM", 1, 0}, -}; - -enum fpuflagname { - FPU_BUSY = 0, - FPU_C3, - FPU_TOP, - FPU_C2, - FPU_C1, - FPU_C0, - FPU_ES, - FPU_SF, - FPU_PE, - FPU_UE, - FPU_OE, - FPU_ZE, - FPU_DE, - FPU_IE -}; - -struct PerThreadData { - bool tracing; - UINT32 curTag; -}; - -/* ================================================================== */ -// Global variables -/* ================================================================== */ - -TLS_KEY tlsKey; - -/* ===================================================================== */ -// Command line switches -/* ===================================================================== */ -KNOB KnobOutputFile(KNOB_MODE_WRITEONCE, "pintool", - "o", "tests.out", "specify file name for output"); - -fstream *outFile; - - -PerThreadData *getTls(THREADID id) { - return static_cast(PIN_GetThreadData(tlsKey, id)); -} - -/*! - * Print out help message. - */ -INT32 Usage() -{ - cerr << KNOB_BASE::StringKnobSummary() << endl; - return -1; -} - -UINT32 isSentinelIns(INS instr) { - //sentinel instructions are MOV ESI, 0x18231943 - if( INS_IsMov(instr) ) { - //get the first two operands - if( INS_OperandIsReg(instr, 0) ) { - REG r = INS_OperandReg(instr, 0); - //is r esi? - if( r == REG_ESI ) { - //is the second operand an immediate? - if( INS_OperandIsImmediate(instr, 1) ) { - UINT64 o = INS_OperandImmediate(instr, 1); - //mask off the lower 2 bytes - if( (o>>16) == 0x1823 ) { - //sweet, we matched the magic value - UINT64 j = o << 48; - j = j >> 48; - return j; - } - } - } - } - } - - return 0; -} - -void makeupper(string &upme) -{ - std::transform(upme.begin(), upme.end(), upme.begin(), ::toupper); -} - -string dumpFpuFlags(fxsave &fpu_regs) { - string resstr; - - for(unsigned i = 0; i < sizeof(FPU_FLAGS)/sizeof(FPU_FLAGS[0]); i++) - { - flagentry& fe = FPU_FLAGS[i]; - resstr += fe.name + ":" + - decstr( ((fe.mask << fe.shift) & fpu_regs.FSW) >> fe.shift ) + "\n"; - } - - for(unsigned i = 0; i < sizeof(FPU_CONTROL)/sizeof(FPU_CONTROL[0]); i++) - { - flagentry& fe = FPU_CONTROL[i]; - resstr += fe.name + ":" + - decstr( ((fe.mask << fe.shift) & fpu_regs.FCW) >> fe.shift ) + "\n"; - } - - resstr += "FPUTW:" + decstr(fpu_regs.FTW) + "\n"; - resstr += "FPU_FOPCODE:" + decstr(fpu_regs.FOP) + "\n"; - - return resstr; -} - -string dumpRegisterState(const CONTEXT *ctx) { - //the registers we care about, in an array - string res; - unsigned int i; - REG caredRegs[] = { - REG_EDI, REG_ESI, REG_EBP, REG_ESP, - REG_EAX, REG_EBX, REG_ECX, REG_EDX }; - FPSTATE fpstate; - fxsave fpu_regs; - - for( i = 0; i < sizeof(caredRegs)/sizeof(REG); i++ ) { - REG r = caredRegs[i]; - string rStr = REG_StringShort(r); - makeupper(rStr); - ADDRINT val = PIN_GetContextReg(ctx, r); - - res = res+rStr+":"+decstr(val)+"\n"; - } - - // read FPU state - PIN_GetContextFPState(ctx, &fpstate); - std::memcpy(&fpu_regs, &fpstate.fxsave_legacy, sizeof(fpu_regs)); - - for(unsigned i = 0; - i < ARRAYSIZE(fpu_regs.ST);//sizeof(fpu_regs.ST)/sizeof(fpu_regs.ST[0]); - i++) { - stringstream ss; - for(unsigned j = 0; j < sizeof(fpu_regs.ST[0]); j++) { - ss << std::setw(2) << std::setfill('0') << std::hex << (unsigned)fpu_regs.ST[i].pad[j] << " "; - } - - res += "ST"+decstr(i)+":"+ss.str() + "\n"; - } - - for(unsigned i = 0; - i < ARRAYSIZE(fpu_regs.XMM); - i++) { - stringstream ss; - for(unsigned j = 0; j < sizeof(fpu_regs.XMM[0]); j++) { - ss << std::setw(2) << std::setfill('0') << std::hex << (unsigned)fpu_regs.XMM[i].pad[j] << " "; - } - - res += "XMM"+decstr(i)+":"+ss.str() + "\n"; - } - - //dump EFLAGS seperately - ADDRINT efVal = PIN_GetContextReg(ctx, REG_EFLAGS); - - if( efVal & AF ) { - res = res + "AF:1\n"; - } else { - res = res + "AF:0\n"; - } - - if( efVal & CF ) { - res = res + "CF:1\n"; - } else { - res = res + "CF:0\n"; - } - - if( efVal & PF ) { - res = res + "PF:1\n"; - } else { - res = res + "PF:0\n"; - } - - if( efVal & ZF ) { - res = res + "ZF:1\n"; - } else { - res = res + "ZF:0\n"; - } - - if( efVal & OF ) { - res = res + "OF:1\n"; - } else { - res = res + "OF:0\n"; - } - - if( efVal & SF ) { - res = res + "SF:1\n"; - } else { - res = res + "SF:0\n"; - } - - if( efVal & DF ) { - res = res + "DF:1\n"; - } else { - res = res + "DF:0\n"; - } - - - res += dumpFpuFlags(fpu_regs); - - return res; -} - -/* ===================================================================== */ -// Analysis routines -/* ===================================================================== */ - -VOID toggleTrace(THREADID tid, UINT32 t, const CONTEXT *ctx) { - //get per-thread information - PerThreadData *dt = getTls(tid); - - dt->tracing = !dt->tracing; - if( dt->tracing ) { - dt->curTag = t; - //dump out current register state - string s; - s = "TESTCASE:"+decstr(t)+"\n"; - s = s + "INPUTSTATE\n"; - s = s + dumpRegisterState(ctx); - outFile->write(s.c_str(), s.length()); - outFile->flush(); - } else { - string s; - s = "OUTPUTSTATE\n"; - s = s + dumpRegisterState(ctx); - s = s + "ENDCASE\n"; - s = s + "\n"; - outFile->write(s.c_str(), s.length()); - outFile->flush(); - dt->curTag = 0; - } - - return; -} - -VOID onRegWrite(THREADID tid, REG r, ADDRINT v) { - - return; -} - -VOID onMemWritePre(THREADID tid, ADDRINT addr) { - - return; -} - -VOID onMemWritePost(THREADID tid, UINT32 width) { - - return; -} - -/* ===================================================================== */ -// Instrumentation callbacks -/* ===================================================================== */ - -VOID OnInstr(INS ins, VOID *ctx) { - - //check and see if this is a sentinel instruction - UINT32 v; - if( ( v = isSentinelIns(ins) ) ) { - //if it is, add a 'toggle tracing' analysis routine - //and leave - INS_InsertCall( ins, - IPOINT_BEFORE, - AFUNPTR(toggleTrace), - IARG_THREAD_ID, - IARG_UINT32, v, - IARG_CONTEXT, - IARG_END); - } - - return; -} - -VOID ThreadStart(THREADID tid, CONTEXT *ctx, INT32 flags, VOID *v) { - //allocate a new PerThreadData - PerThreadData *pd = new PerThreadData(); - - pd->tracing = false; - ASSERT(pd != NULL, "ALLOC FAILED"); - - PIN_SetThreadData(tlsKey, pd, tid); - - return; -} - -VOID ThreadFini(THREADID tid, const CONTEXT *ctx, INT32 flags, VOID *v) { - //we can free our PerThreadData - PerThreadData *pd = getTls(tid); - - delete pd; - - return; -} - -VOID Fini(INT32 c, VOID *v) { - outFile->flush(); - delete outFile; - return; -} - -/*! - * The main procedure of the tool. - * This function is called when the application image is loaded but not yet started. - * @param[in] argc total number of elements in the argv array - * @param[in] argv array of command line arguments, - * including pin -t -- ... - */ -int main(int argc, char *argv[]) -{ - // sanity check - ASSERT(sizeof(fxsave) == 512, "fxsave not of correct size on this compiler"); - ASSERT(sizeof(fxsave) == sizeof(FXSAVE), "our definition of FXSAVE and Intel's are not the same size"); - - if( PIN_Init(argc,argv) ) - { - return Usage(); - } - - //register an instruction callback - INS_AddInstrumentFunction(OnInstr, NULL); - - //register a thread create callback - PIN_AddThreadStartFunction(ThreadStart, NULL); - - //register a thread end callback - PIN_AddThreadFiniFunction(ThreadFini, NULL); - - //register a finalizer so we can close our output - PIN_AddFiniFunction(Fini, NULL); - - //open the output file - outFile = new fstream(KnobOutputFile.Value().c_str(),ios::out|ios::trunc); - - //begin instrumentation - PIN_StartProgram(); - - return 0; -} - -/* ===================================================================== */ -/* eof */ -/* ===================================================================== */ diff --git a/mc-sema/validator/x86/valTool/valTool.cmake b/mc-sema/validator/x86/valTool/valTool.cmake deleted file mode 100644 index d3ccc42c7..000000000 --- a/mc-sema/validator/x86/valTool/valTool.cmake +++ /dev/null @@ -1,21 +0,0 @@ - -set(ENV{PIN_HOME} ${PIN_HOME}) - -if(WIN32) -execute_process( - COMMAND nmake -f Nmakefile - WORKING_DIRECTORY "${CMAKE_CURRENT_SOURCE_DIR}" - ) -else(WIN32) - if(APPLE) - execute_process( - COMMAND make -f Makefile.osx - WORKING_DIRECTORY "${CMAKE_CURRENT_SOURCE_DIR}" - ) - else(APPLE) - execute_process( - COMMAND make -f Makefile.linux - WORKING_DIRECTORY "${CMAKE_CURRENT_SOURCE_DIR}" - ) - endif(APPLE) -endif(WIN32) diff --git a/mc-sema/validator/x86_64/CMakeLists.txt b/mc-sema/validator/x86_64/CMakeLists.txt deleted file mode 100644 index 253bc8a1b..000000000 --- a/mc-sema/validator/x86_64/CMakeLists.txt +++ /dev/null @@ -1,3 +0,0 @@ -add_subdirectory(valTool) -add_subdirectory(valTest) -add_subdirectory(testSemantics) diff --git a/mc-sema/validator/x86_64/testSemantics/CMakeLists.txt b/mc-sema/validator/x86_64/testSemantics/CMakeLists.txt deleted file mode 100644 index 8259d8888..000000000 --- a/mc-sema/validator/x86_64/testSemantics/CMakeLists.txt +++ /dev/null @@ -1,46 +0,0 @@ -find_package(Nasm REQUIRED) -include_directories(${LLVM_MAIN_SRC_DIR}/utils/unittest/googletest/include - ${CMAKE_CURRENT_SOURCE_DIR}/../../../peToCFG - ${CMAKE_CURRENT_SOURCE_DIR}/../../../cfgToLLVM - ${CMAKE_CURRENT_SOURCE_DIR}/../../../../llvm-3.5/utils/unittest/googletest/include - ${CMAKE_CURRENT_SOURCE_DIR}/../../../../llvm-3.5/lib/Target/X86 - ${CMAKE_CURRENT_BINARY_DIR}/../../../../llvm-3.5/lib/Target/X86) - -SET_SOURCE_FILES_PROPERTIES( "${CMAKE_CURRENT_SOURCE_DIR}/testSemantics.auto.cpp" - PROPERTIES - GENERATED true - ) - -add_custom_target(testSemantics.auto.cpp ALL - COMMAND ${PYTHON_EXECUTABLE} "${CMAKE_CURRENT_SOURCE_DIR}/../testgen.py" -tstmpl "${CMAKE_CURRENT_SOURCE_DIR}/testSemantics.template" -tsout "${CMAKE_CURRENT_SOURCE_DIR}/testSemantics.auto.cpp" -testfiles "${CMAKE_CURRENT_SOURCE_DIR}/../tests" -nasm "${NASM_EXECUTABLE}" - COMMENT Generating semantics tests -) -add_executable(testSemantics "${CMAKE_CURRENT_SOURCE_DIR}/testSemantics.auto.cpp" ) -add_dependencies(testSemantics testSemantics.auto.cpp ) - -link_directories(${CMAKE_CURRENT_BINARY_DIR}/../../../../lib) - -target_link_libraries(testSemantics peToCFG cfgToLLVM - LLVMInterpreter LLVMipo LLVMInstrumentation - LLVMX86CodeGen LLVMJIT LLVMBitReader LLVMBitWriter LLVMMCDisassembler gtest - gtest_main LLVMX86Disassembler LLVMX86AsmParser LLVMX86CodeGen - LLVMSelectionDAG LLVMAsmPrinter LLVMX86Desc LLVMX86Info LLVMObjCARCOpts - LLVMX86AsmPrinter LLVMX86Utils ${Boost_LIBRARIES} libprotobuf) - -IF(UNIX) - find_library(DL_LIB dl) - target_link_libraries(testSemantics ${DL_LIB}) -endif(UNIX) - -add_dependencies(testSemantics peToCFG bitreader asmparser bitwriter instrumentation scalaropts ipo pin_validator gtest tests.out) - -IF(APPLE) - SET_TARGET_PROPERTIES(testSemantics PROPERTIES LINK_FLAGS "-pagezero_size 1000") -endif(APPLE) - -if(UNIX) -add_custom_target(run_testSemantics ALL - COMMAND cd ${CMAKE_CURRENT_BINARY_DIR}/../valTest && ../testSemantics/testSemantics || echo # this echo shouldn't be here. It lets the build continue - DEPENDS testSemantics testSemantics.auto.cpp - ) -endif(UNIX) diff --git a/mc-sema/validator/x86_64/testSemantics/testSemantics.template b/mc-sema/validator/x86_64/testSemantics/testSemantics.template deleted file mode 100644 index afe094359..000000000 --- a/mc-sema/validator/x86_64/testSemantics/testSemantics.template +++ /dev/null @@ -1,1349 +0,0 @@ -#include "gtest/gtest.h" -#include "toLLVM.h" -#include "raiseX86.h" -//#define DEBUG - -#include "../common/RegisterState.h" -#include "../common/to_string.h" - -#include -#include - -#ifdef _WIN32 -#include -#include -#include -#include -#pragma float_control(precise, on) -#pragma fenv_access(on) -#else -#include -#include -#ifndef __APPLE__ -#ifndef __MACH__ -#include -#endif -#endif -#endif - -#include "llvm/ExecutionEngine/GenericValue.h" -#include "llvm/ExecutionEngine/Interpreter.h" -#include "llvm/ExecutionEngine/JIT.h" -#include - -#include -#include -#include -#include -#include - -using namespace llvm; -using namespace std; - -#ifdef __x86_64__ - #ifdef __linux__ - #define TRIPLE "x86_64-pc-linux-gnu" - #elif defined(_WIN32) - #define TRIPLE "x86_64-pc-win32" - #elif defined(__APPLE__) - #define TRIPLE "x86_64-apple-darwin" - #else - #error Building on an unsupported OS - #endif -#else - #ifdef __linux__ - #define TRIPLE "i386-pc-linux-gnu" - #elif defined(_WIN32) - #define TRIPLE "i386-pc-win32" - #elif defined(__APPLE__) - #define TRIPLE "i386-apple-darwin" - #else - #error Building on an unsupported OS - #endif -#endif - -#define STACK_LEN 40960 - -enum fputag_vals { - FPU_TAG_VALID = 0, - FPU_TAG_ZERO = 1, - FPU_TAG_SPECIAL = 2, - FPU_TAG_EMPTY = 3 -}; - -#define TESTS_GENERAL (1<<0) -#define TESTS_FPU (1<<1) -#define TESTS_TO_RUN (TESTS_FPU|TESTS_GENERAL) -//#define TESTS_TO_RUN (TESTS_FPU) - -const uint64_t FLAG_CF = 1 << 0; -const uint64_t FLAG_PF = 1 << 1; -const uint64_t FLAG_AF = 1 << 2; -const uint64_t FLAG_ZF = 1 << 3; -const uint64_t FLAG_SF = 1 << 4; -const uint64_t FLAG_OF = 1 << 5; -const uint64_t FLAG_DF = 1 << 6; - -const uint64_t FLAG_FPU_BUSY = 1 << 7; -const uint64_t FLAG_FPU_C3 = 1 << 8; -const uint64_t FLAG_FPU_TOP = 1 << 9; -const uint64_t FLAG_FPU_C2 = 1 << 10; -const uint64_t FLAG_FPU_C1 = 1 << 11; -const uint64_t FLAG_FPU_C0 = 1 << 12; -const uint64_t FLAG_FPU_ES = 1 << 13; -const uint64_t FLAG_FPU_SF = 1 << 14; -const uint64_t FLAG_FPU_PE = 1 << 15; -const uint64_t FLAG_FPU_UE = 1 << 16; -const uint64_t FLAG_FPU_OE = 1 << 17; -const uint64_t FLAG_FPU_ZE = 1 << 18; -const uint64_t FLAG_FPU_DE = 1 << 19; -const uint64_t FLAG_FPU_IE = 1 << 20; - - -uint8_t g_stackMem[STACK_LEN]; - -// Some helpers for testing. -// Need functions to create function headers and function footers. - -Function *initTestFunction(string testName, Module *M) { - FunctionType *FT = getBaseFunctionType(M); - Constant *FC = M->getOrInsertFunction((testName +"_func"), FT); - Function *F = dyn_cast(FC); - - assert(F != NULL); - - BasicBlock *entryBlock = BasicBlock::Create(F->getContext(), - "entry", - F); - assert(entryBlock != NULL); - - if(getPointerSize(M) == Pointer32){ - allocateLocals(F, 32); - writeContextToLocals(entryBlock, 32, AllRegs); - } else { - allocateLocals(F, 64); - writeContextToLocals(entryBlock, 64, AllRegs); - } - - return F; -} - -void finiTestFunction(BasicBlock *e) { - - Module *M = e->getParent()->getParent(); - - // Spill the locals back to the context. - if(getPointerSize(M) == Pointer32){ - writeLocalsToContext(e, 32, AllRegs); - } else { - writeLocalsToContext(e, 64, AllRegs); - } - - // Return from the function. - ReturnInst::Create(e->getContext(), e); - - return; -} - -typedef map testCaseToFlags; -typedef map testCaseToTestIDT; -typedef pair InOutT; -typedef map testIDToInOutT; - -enum ScanningState { - TestCase, - InputCase, - OutputCase -}; - -void* getRegPtr(const string ®Name, mcsema::RegState *regs) { - void *regptr = StringSwitch(regName) -#ifndef __x86_64__ - .Case("EAX", &(regs->EAX)) - .Case("EBX", &(regs->EBX)) - .Case("ECX", &(regs->ECX)) - .Case("EDX", &(regs->EDX)) - .Case("ESI", &(regs->ESI)) - .Case("EDI", &(regs->EDI)) - .Case("ESP", &(regs->ESP)) - .Case("EBP", &(regs->EBP)) -#else - .Case("RAX", &(regs->RAX)) - .Case("RBX", &(regs->RBX)) - .Case("RCX", &(regs->RCX)) - .Case("RDX", &(regs->RDX)) - .Case("RSI", &(regs->RSI)) - .Case("RDI", &(regs->RDI)) - .Case("RSP", &(regs->RSP)) - .Case("RBP", &(regs->RBP)) - .Case("R8", &(regs->R8)) - .Case("R9", &(regs->R9)) - .Case("R10", &(regs->R10)) - .Case("R11", &(regs->R11)) - .Case("R12", &(regs->R12)) - .Case("R13", &(regs->R13)) - .Case("R14", &(regs->R14)) - .Case("R15", &(regs->R15)) -#endif - .Case("CF", &(regs->CF)) - .Case("PF", &(regs->PF)) - .Case("AF", &(regs->AF)) - .Case("ZF", &(regs->ZF)) - .Case("SF", &(regs->SF)) - .Case("OF", &(regs->OF)) - .Case("DF", &(regs->DF)) - .Case("ST0", &(regs->ST_regs.st[0])) - .Case("ST1", &(regs->ST_regs.st[1])) - .Case("ST2", &(regs->ST_regs.st[2])) - .Case("ST3", &(regs->ST_regs.st[3])) - .Case("ST4", &(regs->ST_regs.st[4])) - .Case("ST5", &(regs->ST_regs.st[5])) - .Case("ST6", &(regs->ST_regs.st[6])) - .Case("ST7", &(regs->ST_regs.st[7])) - .Case("XMM0", &(regs->XMM0)) - .Case("XMM1", &(regs->XMM1)) - .Case("XMM2", &(regs->XMM2)) - .Case("XMM3", &(regs->XMM3)) - .Case("XMM4", &(regs->XMM4)) - .Case("XMM5", &(regs->XMM5)) - .Case("XMM6", &(regs->XMM6)) - .Case("XMM7", &(regs->XMM7)) -#ifdef __x86_64__ - .Case("XMM8", &(regs->XMM8)) - .Case("XMM9", &(regs->XMM9)) - .Case("XMM10", &(regs->XMM10)) - .Case("XMM11", &(regs->XMM11)) - .Case("XMM12", &(regs->XMM12)) - .Case("XMM13", &(regs->XMM13)) - .Case("XMM14", &(regs->XMM14)) - .Case("XMM15", &(regs->XMM15)) -#endif - .Case("FPU_BUSY", &(regs->FPU_FLAGS.BUSY)) - .Case("FPU_C3", &(regs->FPU_FLAGS.C3)) - .Case("FPU_TOP", &(regs->FPU_FLAGS.TOP)) - .Case("FPU_C2", &(regs->FPU_FLAGS.C2)) - .Case("FPU_C1", &(regs->FPU_FLAGS.C1)) - .Case("FPU_C0", &(regs->FPU_FLAGS.C0)) - .Case("FPU_ES", &(regs->FPU_FLAGS.ES)) - .Case("FPU_SF", &(regs->FPU_FLAGS.SF)) - .Case("FPU_PE", &(regs->FPU_FLAGS.PE)) - .Case("FPU_UE", &(regs->FPU_FLAGS.UE)) - .Case("FPU_OE", &(regs->FPU_FLAGS.OE)) - .Case("FPU_ZE", &(regs->FPU_FLAGS.ZE)) - .Case("FPU_DE", &(regs->FPU_FLAGS.DE)) - .Case("FPU_IE", &(regs->FPU_FLAGS.IE)) - .Case("FPU_X", &(regs->FPU_CONTROL.X)) - .Case("FPU_RC", &(regs->FPU_CONTROL.RC)) - .Case("FPU_PC", &(regs->FPU_CONTROL.PC)) - .Case("FPU_PM", &(regs->FPU_CONTROL.PM)) - .Case("FPU_UM", &(regs->FPU_CONTROL.UM)) - .Case("FPU_OM", &(regs->FPU_CONTROL.OM)) - .Case("FPU_ZM", &(regs->FPU_CONTROL.ZM)) - .Case("FPU_DM", &(regs->FPU_CONTROL.DM)) - .Case("FPU_IM", &(regs->FPU_CONTROL.IM)) - .Case("FPU_FOPCODE", &(regs->FPU_FOPCODE)) - .Default(NULL); - - return regptr; -} - -template -void writeToState(string regName, T regVal, mcsema::RegState *regs) { - - if (regName == "FPUTW") - { - for (int i = 0; i < STREGS_MAX; i++) - { - // this will be uint32_t for FPUTW, hence the - // awfully unsafe cast - uint8_t new_regval = *((uint32_t*)((void*)®Val)); - uint8_t thistag = ((new_regval >> i) & 1); - - // Convert from FXSAVE format to native CPU format. - // In FXSAVE, 0 == tag empty; 1 == tag not empty (assume valid for - // now). - uint8_t expanded_val = thistag == 0 ? FPU_TAG_EMPTY : FPU_TAG_VALID; - //uint8_t expanded_val = FPU_TAG_VALID; - regs->FPU_TAG.tag[i] = expanded_val; - } - } - else - { - T *r = static_cast(getRegPtr(regName, regs)); - assert(r != NULL); - *r = regVal; - } - - return; -} - -void getValueWriteToState(const string &line, mcsema::RegState &state) -{ - int k = line.find(':'); - string regName = line.substr(0, k); - std::string v = line.substr(k+1); - - if (boost::starts_with(regName, "ST")) - { // Only the STi registers are long doubles, for now. - mcsema::nativefpu regVal; - unsigned count=0; - memset(®Val, 0, sizeof(regVal)); - - vector hexchars; - boost::split(hexchars, v, boost::is_any_of(" ")); - std::stringstream ss; - // the text string we are reading has 16 bytes - // since it is output with padding - // only 12 are read in, as we read in without padding. - //printf("reading fpu bytes: "); - for(vector::iterator itr = hexchars.begin(); - itr != hexchars.end() && count < sizeof(((mcsema::nativefpu*)0)->b); - itr++, count++) - { - - std::string bytestr(*itr); - boost::algorithm::trim(bytestr); - - if(bytestr == "") - continue; - - //printf("Reading char: '%s'\n", bytestr.c_str()); - assert(count < 12); - regVal.b[count] = strtoul(bytestr.c_str(), NULL, 16); - //printf("%02x ", regVal.b[count]); - } - //printf("\n"); - - - //printf("Writing back to native value\n"); - //printf("Loaded value: %Lf\n", regVal); - writeToState(regName, regVal, &state); - } - else if (boost::starts_with(regName, "XMM")) - { - mcsema::xmmregstate regVal; - unsigned count=0; - memset(®Val, 0, sizeof(regVal)); - - vector hexchars; - boost::split(hexchars, v, boost::is_any_of(" ")); - std::stringstream ss; - - for(vector::iterator itr = hexchars.begin(); - itr != hexchars.end() && count < sizeof(((mcsema::xmmregstate *)0)->tag); - itr++, count++) - { - - std::string bytestr(*itr); - boost::algorithm::trim(bytestr); - - if(bytestr == "") - continue; - - assert(count < 16); - regVal.tag[count] = strtoul(bytestr.c_str(), NULL, 16); - } - - writeToState(regName, regVal, &state); - } - else if (boost::equals(regName, "FPU_FOPCODE")) - { - uint16_t regVal = 0; - try { - regVal = boost::numeric_cast(boost::lexical_cast(v)); - } catch (bad_cast &e) { - cerr << "could not parse " << v << " as a uint16_t\n"; - throw e; - } - writeToState(regName, regVal, &state); - } - else if (boost::starts_with(regName, "FPU_") || - regName == "CF" || - regName == "PF" || - regName == "AF" || - regName == "ZF" || - regName == "SF" || - regName == "OF" || - regName == "DF") - { - uint8_t regVal = 0; - try { - regVal = boost::numeric_cast(boost::lexical_cast(v)); - } catch (bad_cast &e) { - cerr << "could not parse " << v << " as a uint8_t\n"; - } - - writeToState(regName, regVal, &state); - } - else - { - uint64_t regVal = 0; - try { - regVal = boost::lexical_cast(v); - } catch (bad_cast &e) { - cerr << "could not parse " << v << " as a uint32_t\n"; - throw e; - } - cout << regName << " : " << regVal <<"\n"; - writeToState(regName, regVal, &state); - } -} - -static testIDToInOutT g_stateMap; - -testIDToInOutT getTestCaseMap(string tests) { - - if(g_stateMap.empty() == false) - { - return g_stateMap; - } - - // Open the input file as an input stream. - ifstream inStream(tests.c_str()); - - if (!inStream.is_open()) - { - std::cerr << "Could not open: " << tests << "\n"; - exit(-1); - } - - // Read until the ifstream is over. - string line; - ScanningState ss = TestCase; - int testCaseNumber; - mcsema::RegState inputState; - mcsema::RegState outputState; - memset(&inputState, 0, sizeof(mcsema::RegState)); - memset(&outputState, 0, sizeof(mcsema::RegState)); - -#ifdef DEBUG - cout << "Calling getTestCaseMap\n"; -#endif - - while (inStream.good()) { - getline(inStream, line, '\n'); - size_t rPos = line.find('\r'); - if(rPos != string::npos) { - line.erase(rPos); - } - switch(ss) { - case TestCase: - if ( line.substr(0, 8) == "TESTCASE" ) { - // Read out the test case number. - testCaseNumber = boost::lexical_cast(line.substr(9)); - } - else if ( line == "INPUTSTATE" ) { - ss = InputCase; - } else { - // Parse error. - } - break; - - case InputCase: - if (line == "OUTPUTSTATE") { - ss = OutputCase; - } else { - // Parse the line into a reg/flag assignment. - getValueWriteToState(line, inputState); - } - break; - - case OutputCase: - if (line == "ENDCASE") { - ss = TestCase; - // Take our current map and shove it into the g_stateMap. - InOutT inOut(inputState, outputState); -#ifdef DEBUG - printf("Adding test case: %d\n", testCaseNumber); -#endif - g_stateMap.insert(pair(testCaseNumber, inOut)); - - // Then zero the input and output. - memset(&inputState, 0, sizeof(mcsema::RegState)); - memset(&outputState, 0, sizeof(mcsema::RegState)); - } else { - // Parse the line into a reg/flag assignment. - getValueWriteToState(line, outputState); - } - break; - } - } - -#ifdef DEBUG - cout << "Done with getTestCaseMap" << endl; -#endif - - return g_stateMap; -} - -// This is a class that lets us carry state between tests. -// The state that we carry will be a single LLVM Module. -// It can also carry our instruction decoder and so on. - -class ModuleTest : public ::testing::Test { -protected: - virtual void SetUp(void) { - // Sanity checks on register function. -#ifdef DEBUG - printf("sizeof(mcsema::fpuregs): %ld\n", sizeof(mcsema::fpuregs)); - printf("sizeof(mcsema::RegState): %ld\n", sizeof(mcsema::RegState)); -#endif -#ifdef __x86_64__ - -#ifdef DEBUG - printf("sizeof(RegState) [%ld] - sizeof(((mcsema::nativefpu*)0)->pad)*STREGS_MAX [%ld] = [%ld] (316)\n", - sizeof(mcsema::RegState), - sizeof(((mcsema::nativefpu*)0)->pad)*STREGS_MAX, - sizeof(mcsema::RegState) - sizeof(((mcsema::nativefpu*)0)->pad)*STREGS_MAX); -#endif - - // assert(sizeof(mcsema::RegState) - sizeof(((mcsema::nativefpu*)0)->pad)*STREGS_MAX == 316); -#else - assert(sizeof(mcsema::RegState) == 316); - assert(sizeof(mcsema::fpuregs) == 96); -#endif - - llvm::InitializeAllTargetInfos(); - llvm::InitializeAllTargetMCs(); - llvm::InitializeAllAsmParsers(); - llvm::InitializeAllDisassemblers(); - llvm::InitializeNativeTarget(); - - this->M = new Module("testModule", getGlobalContext()); - this->M->setTargetTriple(TRIPLE); - - // Create the disassembler objects. - const llvm::Target *t = NULL; - const llvm::MCSubtargetInfo *STI = NULL; - const llvm::MCAsmInfo *AsmInfo = NULL; - llvm::MCRegisterInfo *MRI = NULL; - const llvm::MCInstrInfo *MCII = NULL; - -#ifdef __x86_64__ - t = findDisTarget("x86-64"); - this->M->setDataLayout( - "e-m:e-i64:64-f80:128-n8:16:32:64-S128"); - doGlobalInit(this->M); -#else - t = findDisTarget("x86"); - this->M->setDataLayout( - "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32"); - doGlobalInit(this->M); -#endif - - assert(t != NULL); - STI = t->createMCSubtargetInfo( TRIPLE, "", ""); - - MRI = t->createMCRegInfo(TRIPLE); - AsmInfo = t->createMCAsmInfo(*MRI, TRIPLE); - - assert(t != NULL); - assert(STI); - assert(AsmInfo); - - // Get an inst printer. - int AsmPrinterVariant = AsmInfo->getAssemblerDialect(); - MCII = t->createMCInstrInfo(); - llvm::MCInstPrinter - *IP = t->createMCInstPrinter( AsmPrinterVariant, - *AsmInfo, - *MCII, - *MRI, - *STI); - - assert(IP); - llvm::MCContext *Ctx = new llvm::MCContext(AsmInfo, MRI, nullptr); - const llvm::MCDisassembler *DisAsm = t->createMCDisassembler(*STI, *Ctx); - - assert(DisAsm); - - this->Dis = DisAsm; - this->InstPrinter = IP; - - this->testCases = getTestCaseMap("tests.out"); - - // Create the native module. - //list funcList; - //this->natM = NativeModulePtr(new NativeModule("testMod", funcList, IP)); - -#define NEW_TEST(x, k) do {\ - this->caseMap.insert(pair(x, k));\ - this->flagMap.insert(pair(x, 0));\ - } while (0); - -#define NEW_TEST_IGNOREFLAGS(x, k, f) do {\ - this->caseMap.insert(pair(x, k));\ - this->flagMap.insert(pair(x, f));\ - } while (0); - - // ADD TESTS HERE. - /*%DECLARATIONS*%/ - -#undef NEW_TEST - } - - virtual void TearDown(void) { - delete this->M; - } - - Function *getFunctionForBuffer(string nm, uint8_t *buf, size_t len); - - void runFunctionOnState(mcsema::RegState *, Function *); - - void getStatesForTest(mcsema::RegState *, mcsema::RegState *, string); - - Module *M; - const MCDisassembler *Dis; - MCInstPrinter *InstPrinter; - testIDToInOutT testCases; - testCaseToTestIDT caseMap; - testCaseToFlags flagMap; -#if 0 - uint32_t stackMem; - void *stackMemPtr; -#endif -}; - -static void* JITFunctionCreator(const std::string &s) { -#ifdef _WIN32 - HMODULE mod; - FARPROC proc; - - printf("WARNING: JITted code references library function: %s\n", s.c_str()); - - mod = GetModuleHandle("MSVCRT"); - assert(mod != NULL); - proc = GetProcAddress(mod, s.c_str()); - if (proc == NULL) { - std::string s2 = s.substr(0, s.size()-1); - proc = GetProcAddress(mod, s2.c_str()); - } - - if(proc == NULL) { - printf("%s: Could not find function: %s\n", __FUNCTION__, s.c_str()); - } - - return proc; - -#else - printf("WARNING: JITted code references library function: %s\n", s.c_str()); - - void *sym_addr = dlsym(RTLD_DEFAULT, s.c_str()); - char *error = dlerror(); - if(sym_addr == NULL && error != NULL) { - printf("ERROR: %s\n", error); - return NULL; - } - - return sym_addr; - -#endif -} - -void ModuleTest::getStatesForTest(mcsema::RegState *inState, mcsema::RegState *outState, string testName) { - int testId = this->caseMap.at(testName); - InOutT states = this->testCases.at(testId); - -#ifdef DEBUG - printf("Mapping testName[%s] to testId[%d]\n", testName.c_str(), testId); -#endif - *inState = states.first; - *outState = states.second; - return; -} - -void ModuleTest::runFunctionOnState(mcsema::RegState *state, Function *F) { - EngineBuilder builder(this->M); - ExecutionEngine *EE; - - builder.setEngineKind(EngineKind::JIT); - builder.setOptLevel(CodeGenOpt::None); - builder.setUseMCJIT(true); - - TargetOptions to; - to.UnsafeFPMath = true; - - builder.setTargetOptions(to); - - std::string errmsg; - //printf("pre-jit DUMP:\n"); - //F->dump(); - - EE = builder.create(); - EE->runStaticConstructorsDestructors(false); - EE->DisableSymbolSearching(false); - EE->InstallLazyFunctionCreator(JITFunctionCreator); - - // Set up the arguments to the function. - vector args; - args.push_back(PTOGV(state)); - -#ifdef DEBUG - void *ptr = EE->getPointerToFunction(F); - F->print(llvm::outs()); - printf("function ptr is: %p\n\n", ptr); - -#if 0 -#ifdef _WIN32 - __debugbreak(); -#else - asm("int3"); -#endif -#endif - -#endif - - - unsigned int cw = 0; - -#ifdef _WIN32 - cw = _control87(0, 0); - _control87(_PC_64, _MCW_PC); -#endif - - // Run the function to get the sequences effects. - EE->runFunction(F, args); - -#ifdef _WIN32 - _control87((cw & _MCW_PC), _MCW_PC); -#endif - - // Clean up by removing the module and deleting the engine. - EE->removeModule(this->M); - delete EE; - - // We leave. The effects have been written into the register state - // structure. - return; -} - -class counting_cfg_visitor : public boost::default_bfs_visitor { -private: - NativeFunctionPtr natFun; - list &blocks; -public: - counting_cfg_visitor(NativeFunctionPtr n, list &l) : natFun(n), blocks(l) { } - - template < typename Vertex, typename Graph > - void discover_vertex(Vertex u, const Graph &g) const { - NativeBlockPtr curBlock = this->natFun->block_from_id(u); - - this->blocks.push_back(curBlock); - return; - } - - list get_blocks(void) { return this->blocks; } -}; - -list getBlocksFromFunction(NativeFunctionPtr f) { - CFG funcGraph = f->get_cfg(); - list blocks; - counting_cfg_visitor c(f, blocks); - - boost::breadth_first_search(funcGraph, - boost::vertex(0, funcGraph), - boost::visitor(c)); - - return blocks; -} - -Function *ModuleTest::getFunctionForBuffer(string nm, uint8_t *b, size_t l) { - BufferMemoryObject bmo(b, l); - list blocks; - BasicBlock *firstBB = NULL; - BasicBlock *entryBB = NULL; - bool broken = false; - - NativeFunctionPtr testF = - funcFromBuff(0, bmo, this->Dis, this->InstPrinter); - Function *testFn = initTestFunction(nm, this->M); - - entryBB = testFn->begin(); - blocks = getBlocksFromFunction(testF); - - for (list::iterator it = blocks.begin(); - it != blocks.end(); ++it) - { - NativeBlockPtr curBlock = *it; - list insts = curBlock->get_insts(); - BasicBlock *curLLVMBlock; - - curLLVMBlock = bbFromStrName(curBlock->get_name(), testFn); - - if (curLLVMBlock == NULL) { - curLLVMBlock = BasicBlock::Create(testFn->getContext(), - curBlock->get_name(), - testFn); - assert(curLLVMBlock != NULL); - } - - if (firstBB == NULL) { - firstBB = curLLVMBlock; - } - - list &follows = curBlock->get_follows(); - - for (list::iterator i = follows.begin(); i != follows.end(); ++i) { - VA blockBase = *i; - - // Try to look up a block that has this block's name. - string followName = "block_0x" + to_string(blockBase, hex); - - BasicBlock *fBB = bbFromStrName(followName, testFn); - - if (fBB == NULL) { - fBB = BasicBlock::Create(testFn->getContext(), - followName, - testFn); - assert(fBB != NULL); - } - } - - list::iterator instIt = insts.begin(); - - while (instIt != insts.end()) { - InstTransResult t; - InstPtr p = *instIt; - - t = disInstr(p, - curLLVMBlock, - curBlock, - testFn, - testF, - NativeModulePtr(), - false); - - if (t == TranslateError || t == TranslateErrorUnsupported) { - broken = true; - break; - } - - ++instIt; - } - - if (broken) { - break; - } - } - - if (broken) { - return NULL; - } - - BranchInst::Create(firstBB, entryBB); - - BasicBlock *endBlock = NULL; - - // Now we have to find the block that does NOT have a terminator. - for (Function::iterator fit = testFn->begin(); fit != testFn->end(); ++fit ) { - BasicBlock *b = fit; - - if ( b->getTerminator() == NULL ) { - endBlock = b; - break; - } - } - - assert(endBlock != NULL); - finiTestFunction(endBlock); - - return testFn; -} - -void regStatesEq(mcsema::RegState *in, mcsema::RegState *out, uint64_t ignoreflags) { -#ifdef __x86_64__ - EXPECT_EQ(out->RAX, in->RAX); - EXPECT_EQ(out->RBX, in->RBX); - EXPECT_EQ(out->RCX, in->RCX); - EXPECT_EQ(out->RDX, in->RDX); - EXPECT_EQ(out->RDI, in->RDI); - EXPECT_EQ(out->RSP, in->RSP); - EXPECT_EQ(out->RBP, in->RBP); -#else - EXPECT_EQ(out->EAX, in->EAX); - EXPECT_EQ(out->EBX, in->EBX); - EXPECT_EQ(out->ECX, in->ECX); - EXPECT_EQ(out->EDX, in->EDX); - EXPECT_EQ(out->EDI, in->EDI); - EXPECT_EQ(out->ESP, in->ESP); - EXPECT_EQ(out->EBP, in->EBP); -#endif - - //EXPECT_EQ(out->FPU_FOPCODE, in->FPU_FOPCODE); - - if (!(ignoreflags & FLAG_CF)) { - EXPECT_EQ(out->CF, in->CF); - } - - if (!(ignoreflags & FLAG_AF)) { - EXPECT_EQ(out->AF, in->AF); - } - - if (!(ignoreflags & FLAG_PF)) { - EXPECT_EQ(out->PF, in->PF); - } - - if (!(ignoreflags & FLAG_OF)) { - EXPECT_EQ(out->OF, in->OF); - } - - if (!(ignoreflags & FLAG_SF)) { - EXPECT_EQ(out->SF, in->SF); - } - - if (!(ignoreflags & FLAG_DF)) { - EXPECT_EQ(out->DF, in->DF); - } - - if (!(ignoreflags & FLAG_ZF)) { - EXPECT_EQ(out->ZF, in->ZF); - } - -#ifdef DEBUG - printf("Comparing [%d] : OUT[%s] vs. IN[%s]\n", 0, out->ST_regs.st[0].printMe().c_str(), in->ST_regs.st[0].printMe().c_str()); -#endif - EXPECT_EQ(out->ST_regs.st[0], in->ST_regs.st[0]); - -#ifdef DEBUG - printf("Comparing [%d] : OUT[%s] vs. IN[%s]\n", 1, out->ST_regs.st[1].printMe().c_str(), in->ST_regs.st[1].printMe().c_str()); -#endif - EXPECT_EQ(out->ST_regs.st[1], in->ST_regs.st[1]); - -#ifdef DEBUG - printf("Comparing [%d] : OUT[%s] vs. IN[%s]\n", 2, out->ST_regs.st[2].printMe().c_str(), in->ST_regs.st[2].printMe().c_str()); -#endif - EXPECT_EQ(out->ST_regs.st[2], in->ST_regs.st[2]); - -#ifdef DEBUG - printf("Comparing [%d] : OUT[%s] vs. IN[%s]\n", 3, out->ST_regs.st[3].printMe().c_str(), in->ST_regs.st[3].printMe().c_str()); -#endif - EXPECT_EQ(out->ST_regs.st[3], in->ST_regs.st[3]); - -#ifdef DEBUG - printf("Comparing [%d] : OUT[%s] vs. IN[%s]\n", 4, out->ST_regs.st[4].printMe().c_str(), in->ST_regs.st[4].printMe().c_str()); -#endif - EXPECT_EQ(out->ST_regs.st[4], in->ST_regs.st[4]); - -#ifdef DEBUG - printf("Comparing [%d] : OUT[%s] vs. IN[%s]\n", 5, out->ST_regs.st[5].printMe().c_str(), in->ST_regs.st[5].printMe().c_str()); -#endif - EXPECT_EQ(out->ST_regs.st[5], in->ST_regs.st[5]); - -#ifdef DEBUG - printf("Comparing [%d] : OUT[%s] vs. IN[%s]\n", 6, out->ST_regs.st[6].printMe().c_str(), in->ST_regs.st[6].printMe().c_str()); -#endif - EXPECT_EQ(out->ST_regs.st[6], in->ST_regs.st[6]); - -#ifdef DEBUG - printf("Comparing [%d] : OUT[%s] vs. IN[%s]\n", 7, out->ST_regs.st[7].printMe().c_str(), in->ST_regs.st[7].printMe().c_str()); -#endif - EXPECT_EQ(out->ST_regs.st[7], in->ST_regs.st[7]); - -#ifdef DEBUG - printf("XMM%d: OUT[%s] vs IN[%s]\n", 0, out->XMM0.printMe().c_str(), in->XMM0.printMe().c_str()); - printf("XMM%d: OUT[%s] vs IN[%s]\n", 1, out->XMM1.printMe().c_str(), in->XMM1.printMe().c_str()); - printf("XMM%d: OUT[%s] vs IN[%s]\n", 2, out->XMM2.printMe().c_str(), in->XMM2.printMe().c_str()); - printf("XMM%d: OUT[%s] vs IN[%s]\n", 3, out->XMM3.printMe().c_str(), in->XMM3.printMe().c_str()); - printf("XMM%d: OUT[%s] vs IN[%s]\n", 4, out->XMM4.printMe().c_str(), in->XMM4.printMe().c_str()); - printf("XMM%d: OUT[%s] vs IN[%s]\n", 5, out->XMM5.printMe().c_str(), in->XMM5.printMe().c_str()); - printf("XMM%d: OUT[%s] vs IN[%s]\n", 6, out->XMM6.printMe().c_str(), in->XMM6.printMe().c_str()); - printf("XMM%d: OUT[%s] vs IN[%s]\n", 7, out->XMM7.printMe().c_str(), in->XMM7.printMe().c_str()); -#endif - - EXPECT_EQ(out->XMM0, in->XMM0); - EXPECT_EQ(out->XMM1, in->XMM1); - EXPECT_EQ(out->XMM2, in->XMM2); - EXPECT_EQ(out->XMM3, in->XMM3); - EXPECT_EQ(out->XMM4, in->XMM4); - EXPECT_EQ(out->XMM5, in->XMM5); - EXPECT_EQ(out->XMM6, in->XMM6); - EXPECT_EQ(out->XMM7, in->XMM7); - - if (!(ignoreflags & FLAG_FPU_BUSY)) { - EXPECT_EQ(out->FPU_FLAGS.BUSY, in->FPU_FLAGS.BUSY); - } - - if (!(ignoreflags & FLAG_FPU_C3)) { - EXPECT_EQ(out->FPU_FLAGS.C3, in->FPU_FLAGS.C3); - } - - if (!(ignoreflags & FLAG_FPU_TOP)) { - EXPECT_EQ(out->FPU_FLAGS.TOP, in->FPU_FLAGS.TOP); - } - - if (!(ignoreflags & FLAG_FPU_C2)) { - EXPECT_EQ(out->FPU_FLAGS.C2, in->FPU_FLAGS.C2); - } - - if (!(ignoreflags & FLAG_FPU_C1)) { - EXPECT_EQ(out->FPU_FLAGS.C1, in->FPU_FLAGS.C1); - } - - if (!(ignoreflags & FLAG_FPU_C0)) { - EXPECT_EQ(out->FPU_FLAGS.C0, in->FPU_FLAGS.C0); - } - - if (!(ignoreflags & FLAG_FPU_ES)) { - EXPECT_EQ(out->FPU_FLAGS.ES, in->FPU_FLAGS.ES); - } - - if (!(ignoreflags & FLAG_FPU_SF)) { - EXPECT_EQ(out->FPU_FLAGS.SF, in->FPU_FLAGS.SF); - } - - if (!(ignoreflags & FLAG_FPU_PE)) { - EXPECT_EQ(out->FPU_FLAGS.PE, in->FPU_FLAGS.PE); - } - - if (!(ignoreflags & FLAG_FPU_UE)) { - EXPECT_EQ(out->FPU_FLAGS.UE, in->FPU_FLAGS.UE); - } - - if (!(ignoreflags & FLAG_FPU_OE)) { - EXPECT_EQ(out->FPU_FLAGS.OE, in->FPU_FLAGS.OE); - } - - if (!(ignoreflags & FLAG_FPU_ZE)) { - EXPECT_EQ(out->FPU_FLAGS.ZE, in->FPU_FLAGS.ZE); - } - - if (!(ignoreflags & FLAG_FPU_DE)) { - EXPECT_EQ(out->FPU_FLAGS.DE, in->FPU_FLAGS.DE); - } - - if (!(ignoreflags & FLAG_FPU_IE)) { - EXPECT_EQ(out->FPU_FLAGS.IE, in->FPU_FLAGS.IE); - } - - EXPECT_EQ(out->FPU_TAG, in->FPU_TAG); - - return; -} - -void* get_low_addr(uint32_t len) { - void *v = ((void *)0x00001000); - void *k; - - while (1) { -#ifdef _WIN32 - k = VirtualAlloc(v, - len, - MEM_RESERVE|MEM_COMMIT, - PAGE_READWRITE); -#else - k = mmap(v, - len, - PROT_READ|PROT_WRITE, -#ifdef __linux__ - MAP_ANON|MAP_PRIVATE|MAP_32BIT, -#else - MAP_ANON|MAP_PRIVATE, -#endif - -1, - 0); -#endif - -#ifdef _WIN32 - if (k != NULL) { -#else - if (k != MAP_FAILED) { -#endif - break; - } else { - v = (void *)(((ptrdiff_t)v) + len); - } - } - -#ifndef _WIN32 -#ifdef __x86_64__ - assert((((ptrdiff_t)k) >> 32) == 0); -#endif // sizeof(ptrdiff_t) -#endif // _WIN32 - return k; -} - -void release_low_addr(void *v, uint32_t len) { -#ifdef _WIN32 - VirtualFree(v, STACK_LEN, MEM_RELEASE); -#else - munmap(v, STACK_LEN); -#endif - return; -} - -// The new input and output ESP/EBP must differ from each other in the same way -// that they did in the original input. -void fixStatesForStack(mcsema::RegState *inState, mcsema::RegState *outState, void *stack) { - // Compute deltas for EBP and ESP. -#ifdef __x86_64__ - int64_t espebpDelta = ((int64_t)inState->RBP) - ((int64_t)inState->RSP); - int64_t espDelta = ((int64_t)inState->RSP) - ((int64_t)outState->RSP); - int64_t ebpDelta = ((int64_t)inState->RBP) - ((int64_t)outState->RBP); - - if(espebpDelta > 0){ - inState->RBP = (uint64_t)((ptrdiff_t)stack - 32); - outState->RBP = (uint64_t)((ptrdiff_t)stack - 32); - - inState->RSP = (uint64_t)((ptrdiff_t)stack - 32) - espebpDelta; - outState->RSP = (uint64_t)((ptrdiff_t)stack - 32) - espebpDelta; - } else { - inState->RSP = (uint64_t)((ptrdiff_t)stack - 32); - outState->RSP = (uint64_t)((ptrdiff_t)stack - 32); - - inState->RBP = (uint64_t)((ptrdiff_t)stack - 32) + espebpDelta; - outState->RBP = (uint64_t)((ptrdiff_t)stack - 32) + espebpDelta; - } - - - //inState->RSP = (uint64_t)((ptrdiff_t)stack); - //outState->RSP = (uint64_t)((ptrdiff_t)stack); - - //inState->RBP = (uint64_t)((ptrdiff_t)stack) + (espebpDelta); - //outState->RBP = (uint64_t)((ptrdiff_t)stack) + (espebpDelta); - - outState->RSP -= espDelta; - outState->RBP -= ebpDelta; - -#else - int32_t espDelta = ((int32_t)inState->ESP) - ((int32_t)outState->ESP); - int32_t ebpDelta = ((int32_t)inState->EBP) - ((int32_t)outState->EBP); - - inState->ESP = (uint32_t)((ptrdiff_t)stack - 32); - outState->ESP = (uint32_t)((ptrdiff_t)stack - 32); - - inState->EBP = (uint32_t)((ptrdiff_t)stack); - outState->EBP = (uint32_t)((ptrdiff_t)stack); - - outState->ESP -= espDelta; - outState->EBP -= ebpDelta; -#endif - return; -} - -// The PIN based tester outputs FPU registers in their native order: -// that is, ST0 = REGISTERS[FPU CW.TOP]. -// The state.ST_regs[0] structure does not use a TOP-relative -// representation: that is, ST_regs[0] == REGISTERS[0]. -// This function converts the ST_regs representation to a top-relative -// representation for comparison with PIN outputs. - -void toTopRelative(mcsema::RegState &state) { - mcsema::fpuregs tmpregs; - - uint8_t topval = state.FPU_FLAGS.TOP; -#ifdef DEBUG - printf("pre transform top is: %d\n", topval); - for (unsigned i = 0; i < STREGS_MAX; i++) - { - printf("pre transform regs array [%d] = %s\n", i, state.ST_regs.st[i].printMe().c_str()); - } -#endif - - for (unsigned i = topval; i < STREGS_MAX; i++) { - tmpregs.st[i - topval] = state.ST_regs.st[i]; - } - - for (unsigned i = 0; i < topval; i++) { - tmpregs.st[i + STREGS_MAX - topval] = state.ST_regs.st[i]; - } - - memcpy(&state.ST_regs.st[0], &tmpregs.st[0], sizeof(tmpregs.st)); - -#ifdef DEBUG - printf("post transform top is: %d\n", topval); - for (unsigned i = 0; i < STREGS_MAX; i++) - { - printf("post transform regs array [%d] = %s\n", i, state.ST_regs.st[i].printMe().c_str()); - } -#endif -} - -void fromTopRelative(mcsema::RegState &state) { - mcsema::fpuregs tmpregs; - - uint8_t topval = state.FPU_FLAGS.TOP; -#ifdef DEBUG - printf("pre transform top is: %d\n", topval); - for (unsigned i = 0; i < STREGS_MAX; i++) - { - printf("pre transform regs array [%d] = %s\n", i, state.ST_regs.st[i].printMe().c_str()); - } -#endif - - for (unsigned i = topval; i < STREGS_MAX; i++) { - tmpregs.st[i] = state.ST_regs.st[i - topval]; - } - - for (unsigned i = 0; i < topval; i++) { - tmpregs.st[i] = state.ST_regs.st[i + STREGS_MAX - topval]; - } - - memcpy(&state.ST_regs.st[0], &tmpregs.st[0], sizeof(tmpregs.st)); - -#ifdef DEBUG - printf("post transform top is: %d\n", topval); - for (unsigned i = 0; i < STREGS_MAX; i++) - { - printf("post transform regs array [%d] = %s\n", i, state.ST_regs.st[i].printMe().c_str()); - } -#endif -} - -#ifdef DEBUG -void printXMM(mcsema::RegState *in) -{ - printf("XMM%d: %s\n", 0, in->XMM0.printMe().c_str()); - printf("XMM%d: %s\n", 1, in->XMM1.printMe().c_str()); - printf("XMM%d: %s\n", 2, in->XMM2.printMe().c_str()); - printf("XMM%d: %s\n", 3, in->XMM3.printMe().c_str()); - printf("XMM%d: %s\n", 4, in->XMM4.printMe().c_str()); - printf("XMM%d: %s\n", 5, in->XMM5.printMe().c_str()); - printf("XMM%d: %s\n", 6, in->XMM6.printMe().c_str()); - printf("XMM%d: %s\n", 7, in->XMM7.printMe().c_str()); -} -#endif -# -#define IN_OUT_TEST(testName, bytes) {\ - Function *testFn =\ - this->getFunctionForBuffer(testName, byteArr, sizeof(byteArr));\ - EXPECT_TRUE(testFn != NULL);\ - if (testFn != NULL) {\ - mcsema::RegState inputState;\ - mcsema::RegState outputState;\ - this->getStatesForTest(&inputState, &outputState, testName);\ - void *b = get_low_addr(STACK_LEN);\ - assert(b != NULL);\ - fixStatesForStack(&inputState, &outputState, (void*)((ptrdiff_t)b + (STACK_LEN - 8)));\ - fromTopRelative(inputState);\ - inputState.printMe(testName "_PRE_INPUT");\ - outputState.printMe(testName "_PRE_OUTPUT");\ - this->runFunctionOnState(&inputState, testFn);\ - toTopRelative(inputState);\ - inputState.printMe(testName "_POST_INPUT");\ - outputState.printMe(testName "_POST_OUTPUT");\ - regStatesEq(&inputState, &outputState, this->flagMap[testName]);\ - release_low_addr(b, STACK_LEN);\ - }\ -} - -#define NO_MEM_TEST(testName, bytes) {\ - Function *testFn =\ - this->getFunctionForBuffer(testName, byteArr, sizeof(byteArr));\ - EXPECT_TRUE(testFn != NULL);\ - if (testFn != NULL) {\ - mcsema::RegState inputState;\ - mcsema::RegState outputState;\ - this->getStatesForTest(&inputState, &outputState, testName);\ - fromTopRelative(inputState);\ - this->runFunctionOnState(&inputState, testFn);\ - toTopRelative(inputState);\ - regStatesEq(&inputState, &outputState, this->flagMap[testName]);\ - }\ -} - - -/*%DEFINITIONS%*/ - -TEST_F(ModuleTest, StructureLayout) { - //test and make sure that the layout of the RegState matches between - //our EE and our structure definition - FunctionType *FT = getBaseFunctionType(this->M); - Constant *FC = this->M->getOrInsertFunction(("aligntest"), FT); - Function *F = dyn_cast(FC); - Value *arg = F->arg_begin(); - - assert(F != NULL); - - BasicBlock *block = BasicBlock::Create(F->getContext(), "B", F); - - //write patterns we recognize into the structure - -#define PATTERN_TO_OFF(p, b, o) { \ - Value *gepV[] = \ - { ConstantInt::get(Type::getInt64Ty(block->getContext()), 0), \ - ConstantInt::get(Type::getInt32Ty(block->getContext()), o)}; \ - Instruction *vgep = GetElementPtrInst::CreateInBounds(arg, gepV, "", block);\ - Value *c = ConstantInt::get(IntegerType::get(block->getContext(), b), p);\ - Value *st = new StoreInst(c, vgep, block);\ - assert(st != NULL); } - -#define PATTERN_TO_OFF2(p, o1, o2) { \ - Value *gepV[] = \ - { ConstantInt::get(Type::getInt64Ty(block->getContext()), 0), \ - ConstantInt::get(Type::getInt32Ty(block->getContext()), o1), \ - ConstantInt::get(Type::getInt64Ty(block->getContext()), o2)}; \ - Instruction *vgep = GetElementPtrInst::CreateInBounds(arg, gepV, "", block);\ - Value *c = ConstantInt::get(Type::getInt64Ty(block->getContext()), p);\ - Value *st = new StoreInst(c, vgep, block);\ - assert(st != NULL); } - - - PATTERN_TO_OFF(6543, 64, 0); - PATTERN_TO_OFF(6540, 64, 1); - PATTERN_TO_OFF(6530, 64, 2); - PATTERN_TO_OFF(6528, 64, 3); - PATTERN_TO_OFF(6400, 64, 4); - PATTERN_TO_OFF(6129, 64, 5); - PATTERN_TO_OFF(5981, 64, 6); - PATTERN_TO_OFF(4129, 64, 7); - - PATTERN_TO_OFF(1, 1, 17); - PATTERN_TO_OFF(0, 1, 18); - PATTERN_TO_OFF(1, 1, 19); - PATTERN_TO_OFF(0, 1, 20); - PATTERN_TO_OFF(1, 1, 21); - PATTERN_TO_OFF(0, 1, 22); - PATTERN_TO_OFF(1, 1, 23); - - PATTERN_TO_OFF(0, 1, 25); - - ReturnInst::Create(block->getContext(), block); - -#undef PATTERN_TO_OFF -#undef PATTERN_TO_OFF2 - - //make a context that is 0-filled - mcsema::RegState inState; - mcsema::RegState outState; - - memset(&inState, 0, sizeof(mcsema::RegState)); - memset(&outState, 0, sizeof(mcsema::RegState)); -#ifdef __x86_64__ - outState.RAX = 6543; - outState.RBX = 6540; - outState.RCX = 6530; - outState.RDX = 6528; - outState.RSI = 6400; - outState.RDI = 6129; - outState.RSP = 5981; - outState.RBP = 4129; -#else - outState.EAX = 6543; - outState.EBX = 6540; - outState.ECX = 6530; - outState.EDX = 6528; - outState.ESI = 6400; - outState.EDI = 6129; - outState.ESP = 5981; - outState.EBP = 4129; -#endif - - outState.CF = 1; - outState.PF = 0; - outState.AF = 1; - outState.ZF = 0; - outState.SF = 1; - outState.OF = 0; - outState.DF = 1; - - outState.FPU_FLAGS.BUSY = 0; - - //evaluate the funciton in an EE - this->runFunctionOnState(&inState, F); - - //check and see if the register effects match up - EXPECT_EQ(inState, outState); - -} - - diff --git a/mc-sema/validator/x86_64/testSemantics/test_a.template b/mc-sema/validator/x86_64/testSemantics/test_a.template deleted file mode 100644 index 00c5f5d0c..000000000 --- a/mc-sema/validator/x86_64/testSemantics/test_a.template +++ /dev/null @@ -1,2080 +0,0 @@ - ; AAA - ;mov al, 0x45 - ;add al, 0x23 - ;enable tracing - ;mov esi, 0x18230001 - ;aaa - ;disable tracing - ;mov esi, 0x18230001 - - ; AAD8i8 - mov ax, 0x70 - mov esi, 0x18230002 - aad 0xa - mov esi, 0x18230002 - mov bl, 0x3 - div bl - - ; AAM8i8 - mov al, 0x22 - mov bl, 0x6 - mov esi, 0x18230003 - aam 0xa - mov esi, 0x18230003 - - ; AAS - mov al, 0x45 - sub al, 0x23 - mov esi, 0x18230004 - aas - mov esi, 0x18230004 - - ; ADC16i16 - mov ax, 0x55 - mov esi, 0x18230005 - adc ax, 0xeee - mov esi, 0x18230005 - - ; ADC16ri - mov bx, 0x66 - mov esi, 0x18230006 - adc bx, 0x444 - mov esi, 0x18230006 - - ; ADC16rr - mov cx, 0xabc - mov dx, 0xdef - mov esi, 0x18230007 - adc cx, dx - mov esi, 0x18230007 - - ; ADC32i32 - mov eax, 0x778 - mov esi, 0x18230008 - adc eax, 0x6fffffff - mov esi, 0x18230008 - - ; ADC32ri - mov ebx, 0x6789 - mov esi, 0x18230009 - adc ebx, 0x44444 - mov esi, 0x18230009 - - ; ADC32rr - mov ecx, 0x1234 - mov edx, 0x5678 - mov esi, 0x1823000a - adc ecx, edx - mov esi, 0x1823000a - - ; ADC8i8 - mov al, 0xbb - mov esi, 0x1823000b - adc al, 0x5 - mov esi, 0x1823000b - - ; ADC8ri - mov ah, 0xaa - mov esi, 0x1823000c - adc ah, 0x3 - mov esi, 0x1823000c - - ; ADC8rr - mov ch, 0xc - mov dh, 0x10 - mov esi, 0x1823000d - adc ch, dh - mov esi, 0x1823000d - - ; ADD16i16 - mov ax, 0x4 - mov esi, 0x1823000e - add ax, 0xeeee - mov esi, 0x1823000e - - ; ADD16ri - mov bx, 0x4 - mov esi, 0x1823000f - add bx, 0x444 - mov esi, 0x1823000f - - ; ADD16rr - mov cx, 0x4 - mov dx, 0x5 - mov esi, 0x18230010 - add cx, dx - mov esi, 0x18230010 - - ; ADD32i32 - mov eax, 0x4 - mov esi, 0x18230011 - add eax, 0x6fffffff - mov esi, 0x18230011 - - ; ADD32ri - mov ebx, 0x2 - mov esi, 0x18230012 - add ebx, 0x44444 - mov esi, 0x18230012 - - ; ADD32rr - mov ecx, 0x1 - mov edx, 0x2 - mov esi, 0x18230013 - add ecx, edx - mov esi, 0x18230013 - - ; ADD8i8 - mov al, 0x4 - mov esi, 0x18230014 - add al, 0x5 - mov esi, 0x18230014 - - ; ADD8ri - mov ah, 0x20 - mov esi, 0x18230015 - add ah, 0x3 - mov esi, 0x18230015 - - ; ADD8rr - mov ch, 0x2 - mov dh, 0x3 - mov esi, 0x18230016 - add ch, dh - mov esi, 0x18230016 - - ; AND16i16 - mov ax, 0x7 - mov esi, 0x18230017 - and ax, 0xeeee - mov esi, 0x18230017 - - ; AND16ri - mov bx, 0x7 - mov esi, 0x18230018 - and bx, 0x444 - mov esi, 0x18230018 - - ; AND16rr - mov cx, 0x0 - mov dx, 0x1 - mov esi, 0x18230019 - and cx, dx - mov esi, 0x18230019 - - ; AND32i32 - mov eax, 0x7 - mov esi, 0x1823001a - and eax, 0x6fffffff - mov esi, 0x1823001a - - ; AND32ri - mov ebx, 0x7 - mov esi, 0x1823001b - and ebx, 0x44444 - mov esi, 0x1823001b - - ; AND32rr - mov ecx, 0x0 - mov edx, 0x1 - mov esi, 0x1823001c - and ecx, edx - mov esi, 0x1823001c - - ; BSWAP32r - mov ebx, 0x56781234 - mov esi, 0x1823001d - bswap ebx - mov esi, 0x1823001d - - ; CDQ - mov esi, 0x1823001e - cdq - mov esi, 0x1823001e - - ; CLC - mov esi, 0x1823001f - clc - mov esi, 0x1823001f - - ; CLD - mov esi, 0x18230020 - cld - mov esi, 0x18230020 - - ; CMOVA16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x18230021 - cmova ax, bx - mov esi, 0x18230021 - - ; CMOVA32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x18230022 - cmova ecx, edx - mov esi, 0x18230022 - - ; CMOVAE16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x18230023 - cmovae ax, bx - mov esi, 0x18230023 - - ; CMOVAE32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x18230024 - cmovae ecx, edx - mov esi, 0x18230024 - - ; CMOVB16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x18230025 - cmovb ax, bx - mov esi, 0x18230025 - - ; CMOVB32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x18230026 - cmovb ecx, edx - mov esi, 0x18230026 - - ; CMOVBE16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x18230027 - cmovbe ax, bx - mov esi, 0x18230027 - - ; CMOVBE32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x18230028 - cmovbe ecx, edx - mov esi, 0x18230028 - - ; CMOVE16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x18230029 - cmove ax, bx - mov esi, 0x18230029 - - ; CMOVE32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x1823002a - cmove ecx, edx - mov esi, 0x1823002a - - ; CMOVG16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x1823002b - cmovg ax, bx - mov esi, 0x1823002b - - ; CMOVG32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x1823002c - cmovg ecx, edx - mov esi, 0x1823002c - - ; CMOVGE16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x1823002d - cmovge ax, bx - mov esi, 0x1823002d - - ; CMOVGE32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x1823002e - cmovge ecx, edx - mov esi, 0x1823002e - - ; CMOVL16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x1823002f - cmovl ax, bx - mov esi, 0x1823002f - - ; CMOVL32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x18230030 - cmovl ecx, edx - mov esi, 0x18230030 - - ; CMOVLE16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x18230031 - cmovle ax, bx - mov esi, 0x18230031 - - ; CMOVLE32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x18230032 - cmovle ecx, edx - mov esi, 0x18230032 - - ; CMOVNE16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x18230033 - cmovne ax, bx - mov esi, 0x18230033 - - ; CMOVNE32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x18230034 - cmovne ecx, edx - mov esi, 0x18230034 - - ; CMOVNO16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x18230035 - cmovno ax, bx - mov esi, 0x18230035 - - ; CMOVNO32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x18230036 - cmovno ecx, edx - mov esi, 0x18230036 - - ; CMOVNP16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x18230037 - cmovnp ax, bx - mov esi, 0x18230037 - - ; CMOVNP32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x18230038 - cmovnp ecx, edx - mov esi, 0x18230038 - - ; CMOVNS16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x18230039 - cmovns ax, bx - mov esi, 0x18230039 - - ; CMOVNS32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x1823003a - cmovns ecx, edx - mov esi, 0x1823003a - - ; CMOVO16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x1823003b - cmovo ax, bx - mov esi, 0x1823003b - - ; CMOVO32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x1823003c - cmovo ecx, edx - mov esi, 0x1823003c - - ; CMOVP16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x1823003d - cmovp ax, bx - mov esi, 0x1823003d - - ; CMOVP32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x1823003e - cmovp ecx, edx - mov esi, 0x1823003e - - ; CMOVS16rr - mov ax, 0x2 - mov bx, 0x4 - mov esi, 0x1823003f - cmovs ax, bx - mov esi, 0x1823003f - - ; CMOVS32rr - mov ecx, 0x44 - mov edx, 0x88 - mov esi, 0x18230040 - cmovs ecx, edx - mov esi, 0x18230040 - - ; CMP16rr - mov cx, 0x4 - mov dx, 0x7 - mov esi, 0x18230041 - cmp cx, dx - mov esi, 0x18230041 - - ; CMP32i32 - mov eax, 0x6ffffffe - mov esi, 0x18230042 - cmp eax, 0x6fffffff - mov esi, 0x18230042 - - ; CMP32ri - mov ebx, 0x44 - mov esi, 0x18230043 - cmp ebx, 0x44444 - mov esi, 0x18230043 - - ; CMP32rr - mov ecx, 0x4 - mov edx, 0x2 - mov esi, 0x18230044 - cmp ecx, edx - mov esi, 0x18230044 - - ; CMP8rr - mov ch, 0x2 - mov dh, 0x3 - mov esi, 0x18230045 - cmp ch, dh - mov esi, 0x18230045 - - ; CMPXCHG16r - mov bx, 0x667 - mov bp, 0x888 - mov esi, 0x18230046 - cmpxchg bx, bp - mov esi, 0x18230046 - - ; CMPXCHG32rr - mov ebx, 0x6674 - mov ebp, 0x8885 - mov esi, 0x18230047 - cmpxchg ebx, ebp - mov esi, 0x18230047 - - ; CMPXCHG8rr - mov bh, 0x66 - mov ch, 0x88 - mov esi, 0x18230048 - cmpxchg bh, ch - mov esi, 0x18230048 - - ; DEC16r - mov dx, 0x30 - mov esi, 0x18230049 - dec dx - mov esi, 0x18230049 - - ; DEC32r - mov eax, 0x31 - mov esi, 0x1823004a - dec eax - mov esi, 0x1823004a - - ; DEC8r - mov cl, 0x32 - mov esi, 0x1823004b - dec cl - mov esi, 0x1823004b - - ; ENTER - mov eax, esp - mov edi, ebp - mov ebx, esp - sub ebx, 0x4 - mov esi, 0x1823004c - enter 0x4, 0x0 - cmp ebp, ebx - mov ebp, 0x0 - mov esi, 0x1823004c - mov esp, eax - mov ebp, edi - - ; IDIV16r - mov ax, 0xaa - mov bx, 0x4 - mov dx, 0x1 - mov esi, 0x1823004d - idiv bx - mov esi, 0x1823004d - - ; IDIV32r - mov eax, 0x4444 - mov ebx, 0x4 - mov edx, 0x1 - mov esi, 0x1823004e - idiv ebx - mov esi, 0x1823004e - - ; IDIV8r - mov ax, 0xa - mov bl, 0x4 - mov esi, 0x1823004f - idiv bl - mov esi, 0x1823004f - - ; IMUL16r - mov ax, 0x32 - mov bx, 0xb - mov esi, 0x18230050 - imul bx - mov esi, 0x18230050 - - ; IMUL16rr - mov bx, 0x34 - mov cx, 0x45 - mov esi, 0x18230051 - imul bx, cx - mov esi, 0x18230051 - - ; IMUL16rri - mov bx, 0x3 - mov cx, 0x4 - mov esi, 0x18230052 - imul bx, cx, 0xbbb - mov esi, 0x18230052 - - ; IMUL32r - mov eax, 0x323 - mov ebx, 0xbbb - mov esi, 0x18230053 - imul ebx - mov esi, 0x18230053 - - ; IMUL32rr - mov ebx, 0x20000 - mov ecx, 0x34 - mov esi, 0x18230054 - imul ebx, ecx - mov esi, 0x18230054 - - ; IMUL32rri - mov ebx, 0x20000 - mov ecx, 0x34 - mov esi, 0x18230055 - imul ebx, ecx, 0xbbbbb - mov esi, 0x18230055 - - ; IMUL8r - mov al, 0x10 - mov cl, 0xe - mov esi, 0x18230056 - imul cl - mov esi, 0x18230056 - - ; INC16r - xor dx, dx - mov dx, 0x30 - mov esi, 0x18230057 - inc dx - mov esi, 0x18230057 - - ; INC32r - mov eax, 0x31 - mov esi, 0x18230058 - inc eax - mov esi, 0x18230058 - - ; INC8r - mov cl, 0x32 - mov esi, 0x18230059 - inc cl - mov esi, 0x18230059 - - ; LAHF - mov esi, 0x1823005a - lahf - mov esi, 0x1823005a - - ; LEA16r - mov cx, 0x15 - mov edx, 0x8 - mov esi, 0x1823005b - lea cx, [edx-0x444] - mov esi, 0x1823005b - - ; LEA32r - mov ecx, 0x15 - mov edx, 0x8 - mov esi, 0x1823005c - lea ecx, [edx-0x444] - mov esi, 0x1823005c - - ; LEAVE - enter 0x8, 0x1 - mov edi, esp - mov ebx, [esp] - mov eax, ebp - mov esi, 0x1823005d - leave - mov esi, 0x1823005d - mov esp, edi - mov [esp], ebx - mov ebp, eax - - ; MOV16ri - mov bx, 0x24 - mov esi, 0x1823005e - mov bx, 0xffcc - mov esi, 0x1823005e - - ; MOV16rr - mov ch, 0x2 - mov dh, 0x3 - mov esi, 0x1823005f - mov ch, dh - mov esi, 0x1823005f - - ; MOV32ri - mov ebx, 0x2 - mov esi, 0x18230060 - mov ebx, 0xffccd - mov esi, 0x18230060 - - ; MOV32rr - mov ecx, 0x8 - mov edx, 0xc - mov esi, 0x18230061 - mov ecx, edx - mov esi, 0x18230061 - - ; MOV8ri - mov ah, 0x2 - mov esi, 0x18230062 - mov ah, 0x3 - mov esi, 0x18230062 - - ; MOV8rr - mov ch, 0x2 - mov dh, 0x3 - mov esi, 0x18230063 - mov ch, dh - mov esi, 0x18230063 - - ; MOVSX16rr8 - mov bx, 0x3000 - mov bl, 0x35 - mov esi, 0x18230064 - movsx bx, bl - mov esi, 0x18230064 - - ; MOVSX32rr16 - mov eax, 0x55555 - mov ax, 0x3333 - mov esi, 0x18230065 - movsx eax, ax - mov esi, 0x18230065 - - ; MOVSX32rr8 - mov eax, 0x55555 - mov ah, 0x3 - mov esi, 0x18230066 - movsx eax, ah - mov esi, 0x18230066 - - ; MOVZX16rr8 - mov bx, 0x2 - mov bl, 0x3 - mov esi, 0x18230067 - movzx bx, bl - mov esi, 0x18230067 - - ; MOVZX32rr16 - mov edx, 0x12 - mov dx, 0x0 - mov esi, 0x18230068 - movzx edx, dx - mov esi, 0x18230068 - - ; MOVZX32rr8 - mov edx, 0x12 - mov dh, 0x3 - mov esi, 0x18230069 - movzx edx, dh - mov esi, 0x18230069 - - ; NEG16r - mov bx, 0x10 - mov esi, 0x1823006a - neg bx - mov esi, 0x1823006a - - ; NEG32r - mov ebx, 0x1a - mov esi, 0x1823006b - neg ebx - mov esi, 0x1823006b - - ; NEG8r - mov dl, 0x1 - mov esi, 0x1823006c - neg dl - mov esi, 0x1823006c - - ; NOT16r - mov cx, 0x8 - mov esi, 0x1823006d - not cx - mov esi, 0x1823006d - - ; NOT32r - mov ecx, 0x999 - mov esi, 0x1823006e - not ecx - mov esi, 0x1823006e - - ; NOT8r - mov dl, 0xaa - mov esi, 0x1823006f - not dl - mov esi, 0x1823006f - - ; OR16i16 - mov ax, 0x3333 - mov esi, 0x18230070 - or ax, 0xeeee - mov esi, 0x18230070 - - ; OR16ri - mov bx, 0x1212 - mov esi, 0x18230071 - or bx, 0x444 - mov esi, 0x18230071 - - ; OR16rr - mov cx, 0x0 - mov dx, 0x1 - mov esi, 0x18230072 - or cx, dx - mov esi, 0x18230072 - - ; OR32i32 - mov eax, 0x7 - mov esi, 0x18230073 - or eax, 0x6fffffff - mov esi, 0x18230073 - - ; OR32ri - mov ebx, 0x7 - mov esi, 0x18230074 - or ebx, 0x44444 - mov esi, 0x18230074 - - ; OR32rr - mov ecx, 0x0 - mov edx, 0x1 - mov esi, 0x18230075 - or ecx, edx - mov esi, 0x18230075 - - ; OR8i8 - mov al, 0x6 - mov esi, 0x18230076 - or al, 0x2 - mov esi, 0x18230076 - - ; OR8ri - mov bh, 0x45 - mov esi, 0x18230077 - or bh, 0x82 - mov esi, 0x18230077 - - ; OR8rr - mov cl, 0x78 - mov dl, 0x12 - mov esi, 0x18230078 - or cl, dl - mov esi, 0x18230078 - - ; POP16r - mov cx, 0x77 - xor di, di - mov esi, 0x18230079 - push cx - pop di - mov esi, 0x18230079 - - ; POP32r - mov ecx, 0x7777 - mov edi, 0x0 - mov esi, 0x1823007a - push ecx - pop edi - mov esi, 0x1823007a - - ; PUSH16r - mov cx, 0x99 - mov esi, 0x1823007b - push cx - mov esi, 0x1823007b - pop cx - - ; PUSH32r - mov ecx, 0x9999 - mov esi, 0x1823007c - push ecx - mov esi, 0x1823007c - pop ecx - - ; PUSHi16 - mov esi, 0x1823007d - push 0xeeee - mov esi, 0x1823007d - pop eax - - ; PUSHi32 - mov esi, 0x1823007e - push 0x7c100052 - mov esi, 0x1823007e - pop eax - - ; PUSHi8 - mov esi, 0x1823007f - push 0xff - mov esi, 0x1823007f - pop eax - - ; RCL16r1 - mov dx, 0x414 - mov esi, 0x18230080 - rcl dx, 0x1 - mov esi, 0x18230080 - - ; RCL16rCL - mov bx, 0x414 - mov cl, 0x3 - mov esi, 0x18230081 - rcl bx, cl - mov esi, 0x18230081 - - ; RCL16ri - mov cx, 0x545 - mov esi, 0x18230082 - rcl cx, 0x8 - mov esi, 0x18230082 - - ; RCL32r1 - mov eax, 0x56789 - mov esi, 0x18230083 - rcl eax, 0x1 - mov esi, 0x18230083 - - ; RCL32rCL - mov ebx, 0x4141 - mov cl, 0x2 - mov esi, 0x18230084 - rcl ebx, cl - mov esi, 0x18230084 - - ; RCL32ri - mov ecx, 0x6789 - mov esi, 0x18230085 - rcl ecx, 0x8 - mov esi, 0x18230085 - - ; RCL8r1 - mov ah, 0xa2 - mov esi, 0x18230086 - rcl ah, 0x1 - mov esi, 0x18230086 - - ; RCL8rCL - mov bh, 0x41 - mov cl, 0x4 - mov esi, 0x18230087 - rcl bh, cl - mov esi, 0x18230087 - - ; RCL8ri - mov ch, 0x56 - mov esi, 0x18230088 - rcl ch, 0x2 - mov esi, 0x18230088 - - ; RCR16r1 - mov dx, 0x414 - mov esi, 0x18230089 - rcr dx, 0x1 - mov esi, 0x18230089 - - ; RCR16rCL - mov bx, 0x414 - mov cl, 0x3 - mov esi, 0x1823008a - rcr bx, cl - mov esi, 0x1823008a - - ; RCR16ri - mov cx, 0x545 - mov esi, 0x1823008b - rcr cx, 0x8 - mov esi, 0x1823008b - - ; RCR32r1 - mov eax, 0x56789 - mov esi, 0x1823008c - rcr eax, 0x1 - mov esi, 0x1823008c - - ; RCR32rCL - mov ebx, 0x4141 - mov cl, 0x2 - mov esi, 0x1823008d - rcr ebx, cl - mov esi, 0x1823008d - - ; RCR32ri - mov ecx, 0x6789 - mov esi, 0x1823008e - rcr ecx, 0x8 - mov esi, 0x1823008e - - ; RCR8r1 - mov ah, 0xa2 - mov esi, 0x1823008f - rcr ah, 0x1 - mov esi, 0x1823008f - - ; RCR8rCL - mov bh, 0x41 - mov cl, 0x4 - mov esi, 0x18230090 - rcr bh, cl - mov esi, 0x18230090 - - ; RCR8ri - mov ch, 0x56 - mov esi, 0x18230091 - rcr ch, 0x2 - mov esi, 0x18230091 - - ; ROL16r1 - mov dx, 0x414 - mov esi, 0x18230092 - rol dx, 0x1 - mov esi, 0x18230092 - - ; ROL16rCL - mov bx, 0x414 - mov cl, 0x3 - mov esi, 0x18230093 - rol bx, cl - mov esi, 0x18230093 - - ; ROL16ri - mov cx, 0x545 - mov esi, 0x18230094 - rol cx, 0x8 - mov esi, 0x18230094 - - ; ROL32r1 - mov eax, 0x56789 - mov esi, 0x18230095 - rol eax, 0x1 - mov esi, 0x18230095 - - ; ROL32rCL - mov ebx, 0x4141 - mov cl, 0x2 - mov esi, 0x18230096 - rol ebx, cl - mov esi, 0x18230096 - - ; ROL32ri - mov ecx, 0x6789 - mov esi, 0x18230097 - rol ecx, 0x8 - mov esi, 0x18230097 - - ; ROL8r1 - mov ah, 0xa2 - mov esi, 0x18230098 - rol ah, 0x1 - mov esi, 0x18230098 - - ; ROL8rCL - mov bh, 0x41 - mov cl, 0x4 - mov esi, 0x18230099 - rol bh, cl - mov esi, 0x18230099 - - ; ROL8ri - mov ch, 0x56 - mov esi, 0x1823009a - rol ch, 0x2 - mov esi, 0x1823009a - - ; ROR16r1 - mov dx, 0x414 - mov esi, 0x1823009b - ror dx, 0x1 - mov esi, 0x1823009b - - ; ROR16rCL - mov bx, 0x414 - mov cl, 0x3 - mov esi, 0x1823009c - ror bx, cl - mov esi, 0x1823009c - - ; ROR16ri - mov cx, 0x545 - mov esi, 0x1823009d - ror cx, 0x8 - mov esi, 0x1823009d - - ; ROR32r1 - mov eax, 0x56789 - mov esi, 0x1823009e - ror eax, 0x1 - mov esi, 0x1823009e - - ; ROR32rCL - mov ebx, 0x4141 - mov cl, 0x2 - mov esi, 0x1823009f - ror ebx, cl - mov esi, 0x1823009f - - ; ROR32ri - mov ecx, 0x6789 - mov esi, 0x182300a0 - ror ecx, 0x8 - mov esi, 0x182300a0 - - ; ROR8r1 - mov ah, 0xa2 - mov esi, 0x182300a1 - ror ah, 0x1 - mov esi, 0x182300a1 - - ; ROR8rCL - mov bh, 0x41 - mov cl, 0x4 - mov esi, 0x182300a2 - ror bh, cl - mov esi, 0x182300a2 - - ; ROR8ri - mov ch, 0x56 - mov esi, 0x182300a3 - ror ch, 0x2 - mov esi, 0x182300a3 - - ; SBB16i16 - mov ax, 0x7 - mov esi, 0x182300a4 - sbb ax, 0xeeee - mov esi, 0x182300a4 - - ; SBB16ri - mov bx, 0x7 - mov esi, 0x182300a5 - sbb bx, 0x444 - mov esi, 0x182300a5 - - ; SBB16rr - mov cx, 0x0 - mov dx, 0x1 - mov esi, 0x182300a6 - sbb cx, dx - mov esi, 0x182300a6 - - ; SBB32i32 - mov eax, 0x7 - mov esi, 0x182300a7 - sbb eax, 0x6fffffff - mov esi, 0x182300a7 - - ; SBB32ri - mov ebx, 0x7 - mov esi, 0x182300a8 - sbb ebx, 0x44444 - mov esi, 0x182300a8 - - ; SBB32rr - mov ecx, 0x0 - mov edx, 0x1 - mov esi, 0x182300a9 - sbb ecx, edx - mov esi, 0x182300a9 - - ; SBB8i8 - mov al, 0x7 - mov esi, 0x182300aa - sbb al, 0x5 - mov esi, 0x182300aa - - ; SBB8ri - mov ah, 0x99 - mov esi, 0x182300ab - sbb ah, 0x3 - mov esi, 0x182300ab - - ; SBB8rr - mov ch, 0x2 - mov dh, 0x3 - mov esi, 0x182300ac - sbb ch, dh - mov esi, 0x182300ac - - ; SHL16r1 - mov ax, 0x7 - mov esi, 0x182300ad - shl ax, 0x1 - mov esi, 0x182300ad - - ; SHL16rCL - mov bx, 0x9 - mov cl, 0x2 - mov esi, 0x182300ae - shl bx, cl - mov esi, 0x182300ae - - ; SHL16ri - mov cx, 0x78 - mov esi, 0x182300af - shl cx, 0x8 - mov esi, 0x182300af - - ; SHL32r1 - mov eax, 0x888 - mov esi, 0x182300b0 - shl eax, 0x1 - mov esi, 0x182300b0 - - ; SHL32rCL - mov ebx, 0xbfe - mov cl, 0x1 - mov esi, 0x182300b1 - shl ebx, cl - mov esi, 0x182300b1 - - ; SHL32ri - mov ecx, 0x15 - mov esi, 0x182300b2 - shl ecx, 0x8 - mov esi, 0x182300b2 - - ; SHL8r1 - mov ah, 0xd - mov esi, 0x182300b3 - shl ah, 0x1 - mov esi, 0x182300b3 - - ; SHL8rCL - mov bh, 0xa - mov cl, 0x3 - mov esi, 0x182300b4 - shl bh, cl - mov esi, 0x182300b4 - - ; SHL8ri - mov ch, 0xa - mov esi, 0x182300b5 - shl ch, 0x2 - mov esi, 0x182300b5 - - ; SHR16r1 - mov ax, 0xe45 - mov esi, 0x182300b6 - shr ax, 0x1 - mov esi, 0x182300b6 - - ; SHR16rCL - mov bx, 0x44 - mov cl, 0x5 - mov esi, 0x182300b7 - shr bx, cl - mov esi, 0x182300b7 - - ; SHR16ri - mov cx, 0x987 - mov esi, 0x182300b8 - shr cx, 0x8 - mov esi, 0x182300b8 - - ; SHR32r1 - mov eax, 0x444444 - mov esi, 0x182300b9 - shr eax, 0x1 - mov esi, 0x182300b9 - - ; SHR32rCL - mov ebx, 0x654 - mov cl, 0x5 - mov esi, 0x182300ba - shr ebx, cl - mov esi, 0x182300ba - - ; SHR32ri - mov ecx, 0x15 - mov esi, 0x182300bb - shr ecx, 0x8 - mov esi, 0x182300bb - - ; SHR8r1 - mov ah, 0xf - mov esi, 0x182300bc - shr ah, 0x1 - mov esi, 0x182300bc - - ; SHR8rCL - mov bh, 0xe - mov cl, 0x2 - mov esi, 0x182300bd - shr bh, cl - mov esi, 0x182300bd - - ; SHR8ri - mov ch, 0x8 - mov esi, 0x182300be - shr ch, 0x2 - mov esi, 0x182300be - - ; STC - mov esi, 0x182300bf - stc - mov esi, 0x182300bf - - ; STD - mov esi, 0x182300c0 - std - mov esi, 0x182300c0 - - ; SUB16ri - mov bx, 0x2 - mov esi, 0x182300c1 - sub bx, 0x444 - mov esi, 0x182300c1 - - ; SUB32i32 - mov eax, 0x8 - mov esi, 0x182300c2 - sub eax, 0x6fffffff - mov esi, 0x182300c2 - - ; SUB32ri - mov ebx, 0xc - mov esi, 0x182300c3 - sub ebx, 0x44444 - mov esi, 0x182300c3 - - ; SUB32rr - mov ecx, 0x1 - mov edx, 0x2 - mov esi, 0x182300c4 - sub ecx, edx - mov esi, 0x182300c4 - - ; SUB8ri - mov ah, 0xdd - mov esi, 0x182300c5 - sub ah, 0x3 - mov esi, 0x182300c5 - - ; TEST16i16 - mov ax, 0x7 - mov esi, 0x182300c6 - test ax, 0xeeee - mov esi, 0x182300c6 - - ; TEST16ri - mov bx, 0x7 - mov esi, 0x182300c7 - test bx, 0x444 - mov esi, 0x182300c7 - - ; TEST16rr - mov cx, 0x0 - mov dx, 0x1 - mov esi, 0x182300c8 - test cx, dx - mov esi, 0x182300c8 - - ; TEST32i32 - mov eax, 0x7 - mov esi, 0x182300c9 - test eax, 0x6fffffff - mov esi, 0x182300c9 - - ; TEST32ri - mov ebx, 0x7 - mov esi, 0x182300ca - test ebx, 0x44444 - mov esi, 0x182300ca - - ; TEST32rr - mov ecx, 0x0 - mov edx, 0x1 - mov esi, 0x182300cb - test ecx, edx - mov esi, 0x182300cb - - ; TEST8i8 - mov al, 0x7 - mov esi, 0x182300cc - test al, 0x5 - mov esi, 0x182300cc - - ; TEST8ri - mov ah, 0x2 - mov esi, 0x182300cd - test ah, 0x3 - mov esi, 0x182300cd - - ; TEST8rr - mov ch, 0x2 - mov dh, 0x3 - mov esi, 0x182300ce - test ch, dh - mov esi, 0x182300ce - - ; XADD16rr - mov bx, 0x846 - mov dx, 0x857 - mov esi, 0x182300cf - xadd bx, dx - mov esi, 0x182300cf - - ; XADD32rr - mov ebx, 0xb46767 - mov ecx, 0xa57877 - mov esi, 0x182300d0 - xadd ebx, ecx - mov esi, 0x182300d0 - - ; XADD8rr - mov al, 0x45 - mov bl, 0x56 - mov esi, 0x182300d1 - xadd al, bl - mov esi, 0x182300d1 - - ; XCHG16ar - mov ax, 0x6 - mov bx, 0x7 - mov esi, 0x182300d2 - xchg ax, bx - mov esi, 0x182300d2 - - ; XCHG16rr - mov bx, 0xc - mov dx, 0xd - mov esi, 0x182300d3 - xchg bx, dx - mov esi, 0x182300d3 - - ; XCHG32ar - mov eax, 0x20 - mov ebx, 0x30 - mov esi, 0x182300d4 - xchg eax, ebx - mov esi, 0x182300d4 - - ; XCHG32rr - mov ebx, 0x120 - mov ecx, 0x122 - mov esi, 0x182300d5 - xchg ebx, ecx - mov esi, 0x182300d5 - - ; XCHG8rr - mov bl, 0x4 - mov cl, 0x6 - mov esi, 0x182300d6 - xchg bl, cl - mov esi, 0x182300d6 - - ; XOR16i16 - mov ax, 0x2 - mov esi, 0x182300d7 - xor ax, 0xeeee - mov esi, 0x182300d7 - - ; XOR16ri - mov bx, 0x2 - mov esi, 0x182300d8 - xor bx, 0x444 - mov esi, 0x182300d8 - - ; XOR16rr - mov cx, 0x2 - mov dx, 0x3 - mov esi, 0x182300d9 - xor cx, dx - mov esi, 0x182300d9 - - ; XOR32i32 - mov eax, 0x12 - mov esi, 0x182300da - xor eax, 0x6fffffff - mov esi, 0x182300da - - ; XOR32ri - mov ebx, 0x12345 - mov esi, 0x182300db - xor ebx, 0x44444 - mov esi, 0x182300db - - ; XOR32rr - mov ecx, 0x2 - mov edx, 0x3 - mov esi, 0x182300dc - xor ecx, edx - mov esi, 0x182300dc - - ; XOR8i8 - mov al, 0x12 - mov esi, 0x182300dd - xor al, 0x5 - mov esi, 0x182300dd - - ; XOR8ri - mov ah, 0x12 - mov esi, 0x182300de - xor ah, 0x3 - mov esi, 0x182300de - - ; XOR8rr - mov ch, 0x2 - mov dh, 0x3 - mov esi, 0x182300df - xor ch, dh - mov esi, 0x182300df - - ; AND8i8 - mov al, 0xa - mov esi, 0x182300e0 - and al, 0x5 - mov esi, 0x182300e0 - - ; AND8ri - mov ah, 0xcd - mov esi, 0x182300e1 - and ah, 0x3 - mov esi, 0x182300e1 - - ; AND8rr - mov ch, 0xa - mov dh, 0xe8 - mov esi, 0x182300e2 - and ch, dh - mov esi, 0x182300e2 - - ; AND16mi - mov esi, 0x182300e3 - lea eax, [esp-0x4] - mov DWORD [eax], 0x44 - and WORD [eax], 0x44 - mov eax, 0x0 - mov esi, 0x182300e3 - - ; AND8mi - mov esi, 0x182300e4 - lea ebx, [esp-0x4] - mov DWORD [ebx], 0x55 - and BYTE [ebx], 0x44 - mov ebx, 0x0 - mov esi, 0x182300e4 - - ; AND32mr - mov esi, 0x182300e5 - lea eax, [esp-0x4] - mov DWORD [eax], 0x55555 - mov ebx, 0x77777 - and DWORD [eax], ebx - mov eax, 0x0 - mov esi, 0x182300e5 - - ; AND16mr - mov esi, 0x182300e6 - lea eax, [esp-0x4] - mov DWORD [eax], 0x5555 - mov ebx, 0x7777 - and WORD [eax], bx - mov eax, 0x0 - mov esi, 0x182300e6 - - ; AND8mr - mov esi, 0x182300e7 - lea eax, [esp-0x4] - mov DWORD [eax], 0x55 - mov ebx, 0x77 - and BYTE [eax], bl - mov eax, 0x0 - mov esi, 0x182300e7 - - ; SUB16i16 - mov ax, 0xa123 - mov esi, 0x182300e8 - sub ax, 0xeeee - mov esi, 0x182300e8 - - ; SUB8i8 - mov al, 0xa1 - mov esi, 0x182300e9 - sub al, 0x5 - mov esi, 0x182300e9 - - ; SUB16mr - mov esi, 0x182300ea - lea ebx, [esp-0x4] - mov DWORD [ebx], 0xc8 - mov ecx, 0x3 - sub WORD [ebx], cx - mov ebx, [ebx] - mov esi, 0x182300ea - - ; SUB16rm - mov esi, 0x182300eb - lea ecx, [esp-0x4] - mov DWORD [ecx], 0xc8 - mov edx, 0x3 - sub dx, WORD [ecx] - mov ecx, [ecx] - mov esi, 0x182300eb - - ; Shr16RCL - mov ax, 0x14FC - mov cl, 0x5 - mov esi, 0x182300ec - shr ax, cl - mov esi, 0x182300ec - - ; Shr8R1 - mov al, 0x4F - mov esi, 0x182300ed - shr al, 0x1 - mov esi, 0x182300ed - - ; Shl16RCL - mov ax, 0x14fc - mov cl, 0x5 - mov esi, 0x182300ee - shl ax, cl - mov esi, 0x182300ee - - ; Cmova16RR - mov ax, 0x33 - mov dx, 0x44 - mov esi, 0x182300ef - cmova ax, dx - mov esi, 0x182300ef - - ; CMOVA32rm - mov esi, 0x182300f0 - lea edi, [esp-0x4] - mov DWORD [edi], 0x3 - cmova eax, [edi] - mov edi, 0x0 - mov esi, 0x182300f0 - - ; Cmova32RR - mov eax, 0x3333 - mov ecx, 0x4444 - mov esi, 0x182300f1 - cmova eax, ecx - mov esi, 0x182300f1 - - ; OR32mr - mov esi, 0x182300f2 - lea edi, [esp-0x4] - mov DWORD [edi], 0x1234abcd - mov eax, 0x5678fedc - or [edi], eax - mov edx, [edi] - mov edi, 0x0 - mov esi, 0x182300f2 - - ; OR32mi - mov esi, 0x182300f3 - lea edi, [esp-0x4] - mov DWORD [edi], 0xabcd1234 - or DWORD [edi], 0x5678fedc - mov edx, [edi] - mov edi, 0x0 - mov esi, 0x182300f3 - - ; Or8RR - mov al, 0x5E - mov ah, 0x13 - mov esi, 0x182300f4 - or al, ah - mov esi, 0x182300f4 - - ; OR16rm - mov esi, 0x182300f5 - lea edi, [esp-0x6] - mov WORD [edi], 0x1234 - mov ax, 0x5678 - or ax, [edi] - mov edi, 0x0 - mov esi, 0x182300f5 - - ; SBB32rm - mov esi, 0x182300f6 - lea edi, [esp-0x4] - mov DWORD [edi], 0x1234abcd - mov eax, 0x56781234 - sbb eax, [edi] - mov edi, 0x0 - mov esi, 0x182300f6 - - ; SBB32mr - mov esi, 0x182300f7 - lea edi, [esp-0x4] - mov DWORD [edi], 0xabcd4321 - mov eax, 0x56781234 - sbb [edi], eax - mov edx, [edi] - mov edi, 0x0 - mov esi, 0x182300f7 - - ; Bswap32R - mov eax, 0x56781234 - mov esi, 0x182300f8 - bswap eax - mov esi, 0x182300f8 - - ; Xadd16RR - mov ax, 0x6824 - mov dx, 0x1479 - mov esi, 0x182300f9 - xadd ax, dx - mov esi, 0x182300f9 - - ; XADD32rm - mov esi, 0x182300fa - lea edi, [esp-0x4] - mov DWORD [edi], 0xabcd4321 - mov eax, 0x56781234 - xadd [edi], eax - mov edx, [edi] - mov edi, 0x0 - mov esi, 0x182300fa - - ; Cmpxch16RR - mov ax, 0x6824 - mov dx, 0x6824 - mov cx, 0x1479 - mov esi, 0x182300fb - cmpxchg dx, cx - mov esi, 0x182300fb - - ; Cmpxchg32RR - mov eax, 0x68244256 - mov edx, 0x54316785 - mov ecx, 0x23423423 - mov esi, 0x182300fc - cmpxchg edx, ecx - mov esi, 0x182300fc - - ; CMPXCHG32rm - mov esi, 0x182300fd - lea edi, [esp-0x10] - mov DWORD [edi], 0xabcd4321 - mov eax, 0xabcd4321 - cmpxchg [edi], ecx - mov edx, [edi] - mov edi, 0x0 - mov esi, 0x182300fd - - ; Adc16RI - mov ax, 0xf012 - mov esi, 0x182300fe - adc ax, 0x1234 - mov esi, 0x182300fe - - ; Adc32RR - mov eax, 0x1234abcd - mov edx, 0x2345bcde - mov esi, 0x182300ff - adc eax, edx - mov esi, 0x182300ff - - ; Composite1 - mov eax, 0x18 - mov esi, 0x18230100 - mov ecx, eax - xor eax, eax - xor ebx, ebx - cmp ebx, ecx - mov esi, 0x18230100 - - ; Composite2 - mov ecx, 0x18 - xor ebx, ebx - xor eax, eax - inc eax - mov esi, 0x18230101 -again: - cmp ebx, ecx - je done - inc ebx - add eax, eax - jmp again -done: - inc eax - mov esi, 0x18230101 - - ; LOOP - mov ecx, 0x18 - xor eax, eax - inc eax - mov esi, 0x18230102 -again_1: - add eax, eax - loop again_1 - inc eax - mov esi, 0x18230102 - - ; LOOPNE - mov eax, 0x4096 - mov ecx, 0x32 - mov esi, 0x18230103 -again_2: - shr eax, 0x1 - loopne again_2 - inc eax - mov esi, 0x18230103 - - ; Add32RR - xor eax, eax - inc eax - mov eax, 0x1 - mov ebx, 0x2 - mov esi, 0x18230104 - add eax, ebx - mov esi, 0x18230104 - - ; Add32RI - mov eax, 0x2 - mov esi, 0x18230105 - add eax, 0x11111 - mov esi, 0x18230105 - - ; Sub32RR - mov eax, 0x1 - mov ebx, 0x2 - mov esi, 0x18230106 - sub ebx, eax - mov esi, 0x18230106 - - ; Xor32RI - mov ebx, 0x12345 - mov esi, 0x18230107 - xor ebx, 0x12345 - mov esi, 0x18230107 - - ; Test32RR1 - mov ebx, 0x0 - mov esi, 0x18230108 - test ebx, ebx - mov esi, 0x18230108 - - ; Test32RR2 - mov edi, 0x8 - mov eax, 0x12 - mov esi, 0x18230109 - test edi, eax - mov esi, 0x18230109 - - ; Cmp32RR1 - mov eax, 0x4 - mov ebx, 0x2 - mov esi, 0x1823010a - cmp eax, ebx - mov esi, 0x1823010a - - ; Cmp32RR2 - mov eax, 0x17 - mov ebx, 0x3 - mov esi, 0x1823010b - cmp eax, ebx - mov esi, 0x1823010b - - ; Neg32R - mov ebx, 0x26 - mov esi, 0x1823010c - neg ebx - mov esi, 0x1823010c - - ; Mov32RR - mov eax, 0x8 - mov ecx, 0x12 - mov esi, 0x1823010d - mov ecx, eax - mov esi, 0x1823010d - - ; Mov32RI - mov esi, 0x1823010e - mov eax, 0x18111 - mov esi, 0x1823010e - - ; Xor32RR - mov esi, 0x1823010f - xor eax, eax - mov esi, 0x1823010f - - ; MovZx32RR16 - mov eax, 0x18 - mov ebx, 0 - mov esi, 0x18230110 - movzx ebx, ax - mov esi, 0x18230110 - - ; Lea32R1 - mov eax, 0x21 - mov edi, 0x8 - mov esi, 0x18230111 - lea eax, [eax+edi+0x1] - mov esi, 0x18230111 - - ; Lea32R2 - mov eax, 0x515 - mov edx, 0x30 - mov esi, 0x18230112 - lea ecx, [eax+edx*0x4] - mov esi, 0x18230112 - - ; PushPopR - mov eax, 0x88 - mov edi, 0x0 - mov esi, 0x18230113 - push eax - pop edi - mov esi, 0x18230113 - - ; Shl32RI - mov eax, 0x1 - mov esi, 0x18230114 - shl eax, 0xa - mov esi, 0x18230114 - - ; Shr32RI - mov eax, 0x4096 - mov esi, 0x18230115 - shr eax, 0x6 - mov esi, 0x18230115 - - ; Sbb32RR1 - mov ecx, 0x1892 - mov edx, 0x4 - mov esi, 0x18230116 - sbb edx, ecx - mov esi, 0x18230116 - - ; Sbb32RR2 - clc - mov ecx, 0xffffff67 - mov edx, 0x19 - mov esi, 0x18230117 - sbb edx, ecx - mov esi, 0x18230117 - - ; Not32R - mov eax, 0x21 - mov esi, 0x18230118 - not eax - mov esi, 0x18230118 - - ; ADD16rm - mov esi, 0x18230119 - lea eax, [esp-0x10] - mov DWORD [eax], 0x1000 - mov bx, 0x2 - add bx, [eax] - mov eax, [eax] - mov esi, 0x18230119 - - ; Std - mov esi, 0x1823011a - std - mov esi, 0x1823011a - - ; Cld - mov esi, 0x1823011b - cld - mov esi, 0x1823011b - - ; Sbb32RI - mov esi, 0x1823011c - sbb eax, 0x44 - sbb ecx, 0x43 - mov esi, 0x1823011c - - ; Stc - mov esi, 0x1823011d - stc - mov esi, 0x1823011d - - ; Clc - mov esi, 0x1823011e - clc - mov esi, 0x1823011e - - ; ADD32mr - mov esi, 0x1823011f - lea edi, [esp-0x4] - mov DWORD [edi], 0x8 - mov eax, 0x36 - add [edi], eax - mov eax, [edi] - mov edi, 0x0 - mov esi, 0x1823011f - - ; Sar32RI1 - mov ebx, 0x56 - mov esi, 0x18230120 - sar ebx, 0x3 - mov esi, 0x18230120 - - ; Sar32RI2 - mov esi, 0x18230121 - sar ebx, 0x0 - mov esi, 0x18230121 - - ; Pushl32m - mov esi, 0x18230122 - lea edi, [esp-0x4] - mov DWORD [edi], 0x8 - push DWORD [edi] - pop ecx - xor edi, edi - mov esi, 0x18230122 - - ; FADDP - lea edi, [esp-0xc] - mov DWORD [edi], 0x2168c000 - mov DWORD [edi+0x4], 0xc90fdaa2 - mov DWORD [edi+0x8], 0x00004000 - fld TWORD [edi] - fld TWORD [edi] - mov esi, 0x18230123 - faddp st1, st0 - mov edi, 0x0 - mov esi, 0x18230123 - - ; FSTENVm - mov esi, 0x18230124 - lea edi, [esp-0x1c] - fstenv [edi] - mov eax, [edi] ;control word - mov ebx, [edi+0x4] ;status word - mov ecx, [edi+0x8] ;tag word - ;mov edx, [edi+0xc] ;EIP - unsupported - ;mov esi, [edi+0x10] ;FOPCODE + FPU EIP Segment - unsupported - ;mov ebp, [edi+0x14] ;data pointer - unsupported - ;mov edi, [edi+0x18] ;data pointer selector - unsupported - mov edi, 0x0 - mov esi, 0x18230124 - - ; LD_F32m - mov esi, 0x18230125 - lea edi, [esp-0x4] - mov DWORD [edi], 0x40490fdb - fld DWORD [edi] - mov edi, 0x0 - mov esi, 0x18230125 - - ; LD_F80m - mov esi, 0x18230126 - lea edi, [esp-0xc] - mov DWORD [edi], 0x2168c000 - mov DWORD [edi+0x4], 0xc90fdaa2 - mov DWORD [edi+0x8], 0x00004000 - fld TWORD [edi] - mov edi, 0x0 - mov esi, 0x18230126 - - ; LD_Frr - mov esi, 0x18230127 - fld st1 - mov esi, 0x18230127 - - ; ST_F32m - mov esi, 0x18230128 - lea edi, [esp-0x4] - fst DWORD [edi] - mov eax, [edi] - mov edi, 0x0 - mov esi, 0x18230128 - - ; ST_Frr - mov esi, 0x18230129 - fst st2 - mov esi, 0x18230129 - - ; SETNEr - mov ecx, 0x5 - mov ebx, 0xa - cmp ecx, ebx - mov esi, 0x1823012a - setne al - mov esi, 0x1823012a - - ; SETNEm - mov ecx, 0x5 - mov ebx, 0xa - cmp ecx, ebx - mov esi, 0x1823012b - lea edi, [esp-0x4] - mov DWORD [edi], 0xc - setne [edi] - mov eax, [edi] - xor edi, edi - mov esi, 0x1823012b - - ; CMP16mi - mov esi, 0x1823012c - lea eax, [esp-0x4] - mov DWORD [eax], 0x200 - cmp WORD [eax], 0x222 - mov eax, 0x0 - mov esi, 0x1823012c - - ; SUB8mr - mov esi, 0x1823012d - lea eax, [esp-0x4] - mov DWORD [eax], 0xc8 - mov ebx, 0x2 - sub BYTE [eax], bl - mov eax, [eax] - mov esi, 0x1823012d - - ; SUB8rm - mov esi, 0x1823012e - lea eax, [esp-0x4] - mov DWORD [eax], 0xc8 - mov ebx, 0x2 - sub bl, BYTE [eax] - mov eax, [eax] - mov esi, 0x1823012e - - ; NOOP - mov esi, 0x1823012f - nop - mov esi, 0x1823012f diff --git a/mc-sema/validator/x86_64/testgen.py b/mc-sema/validator/x86_64/testgen.py deleted file mode 100644 index 2d641c981..000000000 --- a/mc-sema/validator/x86_64/testgen.py +++ /dev/null @@ -1,353 +0,0 @@ -import sys -import collections -import itertools -import os -import glob -import subprocess -import tempfile -import re -import argparse - -#for debugging, use the pretty-printer -import pprint - - -argparser = argparse.ArgumentParser() -argparser.add_argument('-tstmpl', type=argparse.FileType('rb', 0), help="testSemantics template", required=True) -argparser.add_argument('-taout', type=argparse.FileType('wb', 0), help="assembly output for PIN", required=False) -argparser.add_argument('-tsout', type=argparse.FileType('wb', 0), help="testSemantics.cpp output", required=False) -argparser.add_argument('-testfiles', help="directory containing test files", required=True) -argparser.add_argument('-nasm', help="path to nasm executable", required=True) - -args = argparser.parse_args() - -if not (args.taout or args.tsout): - sys.stderr.write("Either -taout or -tsout is required!\n") - sys.exit(-1) - -#TEST_FILES_PATH = os.path.join("..","validator", "valTest", "tests") -#NASM_PATH = os.path.join("..","validator","valTest", "nasm", "nasm.exe") - -EXPECTED_LINES = ["BITS 64", ";TEST_FILE_META_BEGIN"] -META_END_MARKER = ";TEST_FILE_META_END" - - -TEST_NUMBER = 0x300 - -PREPARED_TESTS = collections.OrderedDict() - -#OUTPUT_TESTSEMANTICS = "testSemantics.auto.cpp" -#OUTPUT_TEST_ASM = "test_a.auto.asm" -BEGIN_RECORDING_TOKEN = ";TEST_BEGIN_RECORDING" -END_RECORDING_TOKEN = ";TEST_END_RECORDING" -RCONST = 0x18230000 -RECORDED_ASM_RE = re.compile(";TEST_(BEGIN|END)_RECORDING") - - -TEST_DECLARATION = """ -NEW_TEST("{test_name}", {test_number:#x}); -""" - -TEST_IGNOREFLAGS_DECLARATION = """ -NEW_TEST_IGNOREFLAGS("{test_name}", {test_number:#x}, {test_ignoreflags}); -""" - -TEST_DEFINITION = """ -{test_type}(ModuleTest, {test_name}) {{ - uint8_t byteArr[] = {{ {test_bytes} }}; - IN_OUT_TEST("{test_name}", byteArr); -}} -""" - -def compile_asm(test_name, test_file): - tmphandle_bin,tmpfile_bin = tempfile.mkstemp(suffix=".bin") - tmphandle_asm,tmpfile_asm = tempfile.mkstemp(suffix=".asm") - os.close(tmphandle_bin) - os.close(tmphandle_asm) - - orig_asm = open(test_file, 'rb').read() - # get only the asm between ;TEST_BEGIN_RECORDING and ;TEST_END_RECORDING - orig_parts = RECORDED_ASM_RE.split(orig_asm) - semantics_asm = orig_parts[2] - - #save it to a separate file for compilation - with open(tmpfile_asm, 'wb') as asmfile: - asmfile.write("BITS 64\n") - asmfile.write(semantics_asm) - - try: - subprocess.check_call([args.nasm, "-f", "bin", "-o", tmpfile_bin, tmpfile_asm]) - except subprocess.CalledProcessError as e: - sys.stderr.write("Could not assemble test {}, original source file: {}\n".format(test_name, test_file)) - sys.stderr.write("Error was: {}\n".format(e)) - os.unlink(tmpfile_bin) - os.unlink(tmpfile_asm) - sys.exit(-1) - - - with open(tmpfile_bin, 'rb') as binfile: - bindata = binfile.read() - - #clean up tmpfiles - os.unlink(tmpfile_bin) - os.unlink(tmpfile_asm) - - # transform to c-style hex (0x##) - bindata = ", ".join([hex(ord(x)) for x in bindata]) - - return bindata - -def parse_metadata(test_name, test_file): - global EXPECTED_LINES - - meta_values = {} - - lines = open(test_file, 'r').readlines() - lines = [l.strip() for l in lines] - - # do a quick sanity check on ASM files in the directory - for i in range(2): - if lines[i].upper() != EXPECTED_LINES[i]: - sys.stderr.write("Failed to parse {}. Looking for {}, got {}\n".format(test_file, EXPECTED_LINES[i], lines[i] )) - sys.exit(-1) - - #parse metadata; it should be in the form of - #;KEY=VALUE - # the keys are lowercased and values are uppercased - for i in xrange(2, len(lines)-2): - if lines[i] == META_END_MARKER: - break - - try: - vname, vval = lines[i].split('=') - vname = vname[1:] - except: - sys.stderr.write("Could not parse {}; line: {}.\nExpected KEY=VALUE\n".format(test_file, lines[i])) - sys.exit(-1) - - meta_values[vname.lower()] = vval.upper() - - #get the asm that will go into the automatically - # generated test_a.auto.asm. That file is by PIN - # to generate ground truth for semantics tests - - all_but_bits_line = "\n".join(lines[1:]) - all_but_bits_line = all_but_bits_line.replace( - BEGIN_RECORDING_TOKEN, "mov rsi, {:#x}".format(RCONST+TEST_NUMBER)) - all_but_bits_line = all_but_bits_line.replace( - END_RECORDING_TOKEN, "mov rsi, {:#x}".format(RCONST+TEST_NUMBER)) - - meta_values['test_asm'] = all_but_bits_line - - return meta_values - - -def prepare_from_file(test_name, test_file): - - #read metadata - meta_dict = parse_metadata(test_name, test_file) - #get the hex bytes that go into testSemantics.auto.cpp - hexbytes = compile_asm(test_name, test_file) - meta_dict['test_bytes'] = hexbytes - - # see if we are using an ignoreflags or a normal declaration - # this is determined by the value of TEST_IGNOREFLAGS metadata entry - if meta_dict['test_ignoreflags'] == "": - meta_dict['test_declaration'] = TEST_DECLARATION - else: - meta_dict['test_declaration'] = TEST_IGNOREFLAGS_DECLARATION - - return meta_dict - -def prepare_tests(): - global TEST_NUMBER - - # assume every .asm file in the tests directory is a test - #asm_files = [os.path.join(args.testfiles, "LEA16r.asm")] - asm_files = glob.glob( os.path.join(args.testfiles,"*.asm") ) - - # test names are the file name without .asm - test_names = map(lambda x: os.path.basename(x)[:-4], asm_files) - - sys.stderr.write( "Found {} tests:\n".format(len(test_names)) ) - pprint.pprint(test_names, stream=sys.stderr) - - # fill out the test dictionary with a test name and an increasing - # test number. Should be filled out in alphabetical order, or - # whichever way glob.glob() returns files - for test,testfile in zip(sorted(test_names), sorted(asm_files)): - sys.stderr.write("processing: {}\n".format(test)) - PREPARED_TESTS[test] = {} - td = PREPARED_TESTS[test] - td['test_number'] = TEST_NUMBER - td['test_name'] = test - # fill out: - # test_bytes - # test_declaration - # test_type - td.update(prepare_from_file(test, testfile)) - - TEST_NUMBER += 1 - -def gen_declarations(): - declarations = "" - for test in PREPARED_TESTS.itervalues(): - declarations += test['test_declaration'].format(**test) - - return declarations - -def gen_definitions(): - declarations = "" - for test in PREPARED_TESTS.itervalues(): - declarations += TEST_DEFINITION.format(**test) - - return declarations - -def gen_asm(): - asm = "" - - for tname,test in PREPARED_TESTS.iteritems(): - asm += """\n""" - asm += " ;TEST: " + tname + "\n" - asm += " " + test['test_asm'] + "\n" - - asm += """ - ; pre-test clear to zeros - mov rax, 0 - mov rcx, 0 - mov rdx, 0 - mov rbx, 0 - mov rsi, 0 - mov rdi, 0 - - ; end pre-test clear - ; restore stack - mov rsp, qword [internal_saveregs+0x20] - mov rbp, qword [internal_saveregs+0x28] - ; add some stack slack - sub rsp, 0x200 - mov rax, qword [internal_saveregs+0x40] - push rax - POPF - FLDZ ;ST0 - FLDZ ;ST1 - FLDZ ;ST2 - FLDZ ;ST3 - FLDZ ;ST4 - FLDZ ;ST5 - FLDZ ;ST6 - FLDZ ;ST7 - FNINIT - """ - - return asm - -if __name__ == "__main__": - prepare_tests() - decs = "// Begin Declarations\n" - decs += gen_declarations() - decs += "// End Declarations\n" - - defs = "// Begin Definitions\n" - defs += gen_definitions() - defs += "// End Definitions\n" - - data = None - - # create test_a.auto.asm - test_asm = "" - - # osx needs a to change relative addressing and an extra _ for the symbol name to keep nasm happy - if sys.platform == 'darwin': - test_asm += """BITS 64 -DEFAULT REL -section .text - -global _doTest -_doTest:""" - - else: - test_asm = """BITS 64 -section .text - -global doTest -doTest:""" - - test_asm += """ -mov qword [internal_saveregs+0x00], rax -mov qword [internal_saveregs+0x08], rcx -mov qword [internal_saveregs+0x10], rdx -mov qword [internal_saveregs+0x18], rbx -mov qword [internal_saveregs+0x20], rsp -mov qword [internal_saveregs+0x28], rbp -mov qword [internal_saveregs+0x30], rsi -mov qword [internal_saveregs+0x38], rdi -push rax -PUSHF -pop rax -mov qword [internal_saveregs+0x40], rax -pop rax -FNSAVE [internal_savefpu_precall] - - mov rax, 0 - mov rcx, 0 - mov rdx, 0 - mov rbx, 0 - mov rsi, 0 - mov rdi, 0 - - sub rsp, 0x200 - mov rax, qword [internal_saveregs+0x40] - push rax - POPF - FLDZ ;ST0 - FLDZ ;ST1 - FLDZ ;ST2 - FLDZ ;ST3 - FLDZ ;ST4 - FLDZ ;ST5 - FLDZ ;ST6 - FLDZ ;ST7 - FNINIT -""" - test_asm += gen_asm() - test_asm += """ -mov rax, qword [internal_saveregs+0x00] -mov rcx, qword [internal_saveregs+0x08] -mov rdx, qword [internal_saveregs+0x10] -mov rbx, qword [internal_saveregs+0x18] -mov rsp, qword [internal_saveregs+0x20] -mov rbp, qword [internal_saveregs+0x28] -mov rsi, qword [internal_saveregs+0x30] -mov rdi, qword [internal_saveregs+0x38] -push qword [internal_saveregs+0x40] -POPF -FRSTOR [internal_savefpu_precall] -RET - -SECTION .bss -internal_saveregs: RESD 10 -internal_savefpu: RESB 108 -internal_savefpu_precall: RESB 108 -""" - - # populate testSemantics.auto.cpp - data = args.tstmpl.read() - args.tstmpl.close() - data = data.replace(r'/*%DECLARATIONS*%/', decs) - data = data.replace(r'/*%DEFINITIONS%*/', defs) - - if data == None: - sys.stderr.write("Error: Could not open template file: {}\n".format(TEMPLATE_FILE)) - sys.exit(-1) - else: - - if args.tsout: - args.tsout.write(data) - args.tsout.close() - - if args.taout: - args.taout.write(test_asm) - args.taout.close() - - diff --git a/mc-sema/validator/x86_64/tests/ADC16i16.asm b/mc-sema/validator/x86_64/tests/ADC16i16.asm deleted file mode 100644 index 71887831f..000000000 --- a/mc-sema/validator/x86_64/tests/ADC16i16.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADC16i16 - mov ax, 0x55 - ;TEST_BEGIN_RECORDING - adc ax, 0xeee - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADC16ri.asm b/mc-sema/validator/x86_64/tests/ADC16ri.asm deleted file mode 100644 index dcd53fb54..000000000 --- a/mc-sema/validator/x86_64/tests/ADC16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Adc16RI - mov ax, 0xf012 - ;TEST_BEGIN_RECORDING - adc ax, 0x1234 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADC16rr.asm b/mc-sema/validator/x86_64/tests/ADC16rr.asm deleted file mode 100644 index b110408be..000000000 --- a/mc-sema/validator/x86_64/tests/ADC16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADC16rr - mov cx, 0xabc - mov dx, 0xdef - ;TEST_BEGIN_RECORDING - adc cx, dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADC32i32.asm b/mc-sema/validator/x86_64/tests/ADC32i32.asm deleted file mode 100644 index d8da28317..000000000 --- a/mc-sema/validator/x86_64/tests/ADC32i32.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADC32i32 - mov eax, 0x778 - ;TEST_BEGIN_RECORDING - adc eax, 0x6fffffff - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADC32ri.asm b/mc-sema/validator/x86_64/tests/ADC32ri.asm deleted file mode 100644 index 51dac25a8..000000000 --- a/mc-sema/validator/x86_64/tests/ADC32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADC32ri - mov ebx, 0x6789 - ;TEST_BEGIN_RECORDING - adc ebx, 0x44444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADC32rr.asm b/mc-sema/validator/x86_64/tests/ADC32rr.asm deleted file mode 100644 index d0e8d3b9f..000000000 --- a/mc-sema/validator/x86_64/tests/ADC32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Adc32RR - mov eax, 0x1234abcd - mov edx, 0x2345bcde - ;TEST_BEGIN_RECORDING - adc eax, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADC64i32.asm b/mc-sema/validator/x86_64/tests/ADC64i32.asm deleted file mode 100644 index 41b038eb1..000000000 --- a/mc-sema/validator/x86_64/tests/ADC64i32.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADC32i32 - mov rax, 0x778 - ;TEST_BEGIN_RECORDING - adc rax, 0x6fffffff - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADC64ri32.asm b/mc-sema/validator/x86_64/tests/ADC64ri32.asm deleted file mode 100644 index 4be368040..000000000 --- a/mc-sema/validator/x86_64/tests/ADC64ri32.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADC64ri32 - mov rbx, 0x6789 - ;TEST_BEGIN_RECORDING - adc rbx, 0x44444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADC64rr.asm b/mc-sema/validator/x86_64/tests/ADC64rr.asm deleted file mode 100644 index 6060abe0f..000000000 --- a/mc-sema/validator/x86_64/tests/ADC64rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Adc64RR - mov rax, 0xdead1234abcd - mov rdx, 0xdead2345bcde - ;TEST_BEGIN_RECORDING - adc rax, rdx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADC8i8.asm b/mc-sema/validator/x86_64/tests/ADC8i8.asm deleted file mode 100644 index be9bcfb00..000000000 --- a/mc-sema/validator/x86_64/tests/ADC8i8.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADC8i8 - mov al, 0xbb - ;TEST_BEGIN_RECORDING - adc al, 0x5 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADC8ri.asm b/mc-sema/validator/x86_64/tests/ADC8ri.asm deleted file mode 100644 index 45d91b59d..000000000 --- a/mc-sema/validator/x86_64/tests/ADC8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADC8ri - mov ah, 0xaa - ;TEST_BEGIN_RECORDING - adc ah, 0x3 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADC8rr.asm b/mc-sema/validator/x86_64/tests/ADC8rr.asm deleted file mode 100644 index e1763acbf..000000000 --- a/mc-sema/validator/x86_64/tests/ADC8rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADC8rr - mov ch, 0xc - mov dh, 0x10 - ;TEST_BEGIN_RECORDING - adc ch, dh - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADD16i16.asm b/mc-sema/validator/x86_64/tests/ADD16i16.asm deleted file mode 100644 index fa253707f..000000000 --- a/mc-sema/validator/x86_64/tests/ADD16i16.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADD16i16 - mov ax, 0x4 - ;TEST_BEGIN_RECORDING - add ax, 0xeeee - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADD16ri.asm b/mc-sema/validator/x86_64/tests/ADD16ri.asm deleted file mode 100644 index e1c2615cd..000000000 --- a/mc-sema/validator/x86_64/tests/ADD16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADD16ri - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - add bx, 0x444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADD16rm.asm b/mc-sema/validator/x86_64/tests/ADD16rm.asm deleted file mode 100644 index 8e9918100..000000000 --- a/mc-sema/validator/x86_64/tests/ADD16rm.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADD16rm - ;TEST_BEGIN_RECORDING - lea rax, [rsp-0x10] - mov DWORD [rax], 0x1000 - mov bx, 0x2 - add bx, [rax] - mov eax, [rax] - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADD16rr.asm b/mc-sema/validator/x86_64/tests/ADD16rr.asm deleted file mode 100644 index 7618d9908..000000000 --- a/mc-sema/validator/x86_64/tests/ADD16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADD16rr - mov cx, 0x4 - mov dx, 0x5 - ;TEST_BEGIN_RECORDING - add cx, dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADD32i32.asm b/mc-sema/validator/x86_64/tests/ADD32i32.asm deleted file mode 100644 index 0361de1e4..000000000 --- a/mc-sema/validator/x86_64/tests/ADD32i32.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADD32i32 - mov eax, 0x4 - ;TEST_BEGIN_RECORDING - add eax, 0x6fffffff - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADD32ri.asm b/mc-sema/validator/x86_64/tests/ADD32ri.asm deleted file mode 100644 index d8ece32b4..000000000 --- a/mc-sema/validator/x86_64/tests/ADD32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Add32RI - mov eax, 0x2 - ;TEST_BEGIN_RECORDING - add eax, 0x11111 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADD32rr.asm b/mc-sema/validator/x86_64/tests/ADD32rr.asm deleted file mode 100644 index b29347a75..000000000 --- a/mc-sema/validator/x86_64/tests/ADD32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADD32rr - mov ecx, 0x7fffffff - mov edx, 0x6ffeeeee - ;TEST_BEGIN_RECORDING - add ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADD64i32.asm b/mc-sema/validator/x86_64/tests/ADD64i32.asm deleted file mode 100644 index b83fda6f1..000000000 --- a/mc-sema/validator/x86_64/tests/ADD64i32.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADD64i32 - mov rax, 0x4 - ;TEST_BEGIN_RECORDING - add rax, 0x6fffffff - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADD64ri32.asm b/mc-sema/validator/x86_64/tests/ADD64ri32.asm deleted file mode 100644 index ad2a6618e..000000000 --- a/mc-sema/validator/x86_64/tests/ADD64ri32.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Add64RI32 - mov rax, 0x2 - ;TEST_BEGIN_RECORDING - add rax, 0x7f1111 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADD64ri8.asm b/mc-sema/validator/x86_64/tests/ADD64ri8.asm deleted file mode 100644 index 38f47dd54..000000000 --- a/mc-sema/validator/x86_64/tests/ADD64ri8.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Add64RI8 - mov rax, 0x2 - ;TEST_BEGIN_RECORDING - add rax, 0x7 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADD64rr.asm b/mc-sema/validator/x86_64/tests/ADD64rr.asm deleted file mode 100644 index f0c365249..000000000 --- a/mc-sema/validator/x86_64/tests/ADD64rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADD64rr - mov rcx, 0x7fffffff - mov rdx, 0x6ffeeeeee - ;TEST_BEGIN_RECORDING - add rcx, rdx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADD64rr_DB.asm b/mc-sema/validator/x86_64/tests/ADD64rr_DB.asm deleted file mode 100644 index 056a0e380..000000000 --- a/mc-sema/validator/x86_64/tests/ADD64rr_DB.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADD64rr_DB - mov rcx, 0x7fffffff - mov rdx, 0x6ffeeeeee - ;TEST_BEGIN_RECORDING - add rcx, rdx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADD8i8.asm b/mc-sema/validator/x86_64/tests/ADD8i8.asm deleted file mode 100644 index 69763ba86..000000000 --- a/mc-sema/validator/x86_64/tests/ADD8i8.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADD8i8 - mov al, 0x4 - ;TEST_BEGIN_RECORDING - add al, 0x5 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADD8ri.asm b/mc-sema/validator/x86_64/tests/ADD8ri.asm deleted file mode 100644 index 8606b8770..000000000 --- a/mc-sema/validator/x86_64/tests/ADD8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADD8ri - mov ah, 0x20 - ;TEST_BEGIN_RECORDING - add ah, 0x3 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADD8rr.asm b/mc-sema/validator/x86_64/tests/ADD8rr.asm deleted file mode 100644 index c4c31564e..000000000 --- a/mc-sema/validator/x86_64/tests/ADD8rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ADD8rr - mov ch, 0x2 - mov dh, 0x3 - ;TEST_BEGIN_RECORDING - add ch, dh - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADDPDrm.asm b/mc-sema/validator/x86_64/tests/ADDPDrm.asm deleted file mode 100644 index d7b95c48e..000000000 --- a/mc-sema/validator/x86_64/tests/ADDPDrm.asm +++ /dev/null @@ -1,23 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_PF -;TEST_FILE_META_END - -; convert 10 to a double precision float and store in xmm0 -mov ecx, 10 -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -movsd [rcx], xmm0 -mov DWORD [rcx+0x08], 0x0 -mov DWORD [rcx+0x0C], 0x0 - -addpd xmm0, [rcx] -mov rcx,0 -;TEST_END_RECORDING - -xorps xmm0, xmm0 diff --git a/mc-sema/validator/x86_64/tests/ADDPDrr.asm b/mc-sema/validator/x86_64/tests/ADDPDrr.asm deleted file mode 100644 index da42e2c3f..000000000 --- a/mc-sema/validator/x86_64/tests/ADDPDrr.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 3 to a double precision float and store in xmm0 -mov ecx, 3 -cvtsi2sd xmm0, ecx - -; convert 7 to a double precision float and store in xmm1 -mov ecx, 7 -cvtsi2sd xmm1, ecx - -;TEST_BEGIN_RECORDING -addpd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/ADDPSrm.asm b/mc-sema/validator/x86_64/tests/ADDPSrm.asm deleted file mode 100644 index cc74701bc..000000000 --- a/mc-sema/validator/x86_64/tests/ADDPSrm.asm +++ /dev/null @@ -1,24 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_PF -;TEST_FILE_META_END - -; convert 10 to a single precision float and store in xmm0 -mov ecx, 10 -cvtsi2ss xmm0, ecx - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -movss [rcx], xmm0 -mov DWORD [rcx+0x04], 0x0 -mov DWORD [rcx+0x08], 0x0 -mov DWORD [rcx+0x0C], 0x0 - -addps xmm0, [rcx] -mov rcx,0 -;TEST_END_RECORDING - -xorps xmm0, xmm0 diff --git a/mc-sema/validator/x86_64/tests/ADDPSrr.asm b/mc-sema/validator/x86_64/tests/ADDPSrr.asm deleted file mode 100644 index d5e9ed575..000000000 --- a/mc-sema/validator/x86_64/tests/ADDPSrr.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 3 to a double precision float and store in xmm0 -mov ecx, 3 -cvtsi2sd xmm0, ecx - -; convert 7 to a double precision float and store in xmm1 -mov ecx, 7 -cvtsi2sd xmm1, ecx - -;TEST_BEGIN_RECORDING -addps xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/ADDSDrm.asm b/mc-sema/validator/x86_64/tests/ADDSDrm.asm deleted file mode 100644 index 05cf4b881..000000000 --- a/mc-sema/validator/x86_64/tests/ADDSDrm.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 1 to a double precision float and store in xmm0 -mov ecx, 1 -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -; load 2.5 (in double precision float form) -lea rcx, [rsp-8] -mov DWORD [rcx], 0 -mov DWORD [rcx+4], 0x40040000 - -addsd xmm0, [rcx] -mov ecx, [rcx] -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/ADDSDrr.asm b/mc-sema/validator/x86_64/tests/ADDSDrr.asm deleted file mode 100644 index 55a9a1681..000000000 --- a/mc-sema/validator/x86_64/tests/ADDSDrr.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 1 to a double precision float and store in xmm0 -mov ecx, 1 -cvtsi2sd xmm0, ecx - -; convert 2 to a double precision float and store in xmm1 -mov ecx, 2 -cvtsi2sd xmm1, ecx - -;TEST_BEGIN_RECORDING -addsd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/ADDSSrm.asm b/mc-sema/validator/x86_64/tests/ADDSSrm.asm deleted file mode 100644 index 78833790a..000000000 --- a/mc-sema/validator/x86_64/tests/ADDSSrm.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 1 to a double precision float and store in xmm0 -mov ecx, 1 -cvtsi2ss xmm0, ecx - -;TEST_BEGIN_RECORDING -; load 1.5 (in double precision float form) -lea rcx, [rsp-4] -mov DWORD [rcx], 0x3fc00000 - -addss xmm0, [rcx] -mov ecx, [rcx] -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/ADDSSrr.asm b/mc-sema/validator/x86_64/tests/ADDSSrr.asm deleted file mode 100644 index a38e82f79..000000000 --- a/mc-sema/validator/x86_64/tests/ADDSSrr.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 3 to a double precision float and store in xmm0 -mov ecx, 3 -cvtsi2ss xmm0, ecx - -; convert 1 to a double precision float and store in xmm1 -mov ecx, 1 -cvtsi2ss xmm1, ecx - -;TEST_BEGIN_RECORDING -addss xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/ADD_F32m.asm b/mc-sema/validator/x86_64/tests/ADD_F32m.asm deleted file mode 100644 index c49b95638..000000000 --- a/mc-sema/validator/x86_64/tests/ADD_F32m.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -lea rdi, [rsp-0x8] -mov qword [rdi], 0x40490fdb -fld qword [rdi] -;TEST_BEGIN_RECORDING -lea rdi, [rsp-0x8] -mov qword [rdi], 0x40490fdb -FADD qword [rdi] -mov rdi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ADD_F64m.asm b/mc-sema/validator/x86_64/tests/ADD_F64m.asm deleted file mode 100644 index d87bc638e..000000000 --- a/mc-sema/validator/x86_64/tests/ADD_F64m.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 1.0 -FLD1 -;TEST_BEGIN_RECORDING -lea rdi, [rsp-08] -; 3.1415926 or there about -mov dword [rdi+00], 0x54442d18 -mov dword [rdi+04], 0x400921fb -FADD qword [rdi] -mov rdi, 0 -;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/AND16i16.asm b/mc-sema/validator/x86_64/tests/AND16i16.asm deleted file mode 100644 index 673106798..000000000 --- a/mc-sema/validator/x86_64/tests/AND16i16.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND16i16 - mov ax, 0x7 - ;TEST_BEGIN_RECORDING - and ax, 0xeeee - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/AND16mi.asm b/mc-sema/validator/x86_64/tests/AND16mi.asm deleted file mode 100644 index 796b4808e..000000000 --- a/mc-sema/validator/x86_64/tests/AND16mi.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND16mi - ;TEST_BEGIN_RECORDING - lea rax, [rsp-0x4] - mov DWORD [rax], 0x44 - and WORD [rax], 0x44 - mov eax, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/AND16mr.asm b/mc-sema/validator/x86_64/tests/AND16mr.asm deleted file mode 100644 index 7679a40ac..000000000 --- a/mc-sema/validator/x86_64/tests/AND16mr.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND16mr - ;TEST_BEGIN_RECORDING - lea rax, [rsp-0x4] - mov DWORD [rax], 0x5555 - mov ebx, 0x7777 - and WORD [rax], bx - mov eax, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/AND16ri.asm b/mc-sema/validator/x86_64/tests/AND16ri.asm deleted file mode 100644 index f49b19bcf..000000000 --- a/mc-sema/validator/x86_64/tests/AND16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND16ri - mov bx, 0x7 - ;TEST_BEGIN_RECORDING - and bx, 0x444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/AND16rr.asm b/mc-sema/validator/x86_64/tests/AND16rr.asm deleted file mode 100644 index 5e8e32871..000000000 --- a/mc-sema/validator/x86_64/tests/AND16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND16rr - mov cx, 0x0 - mov dx, 0x1 - ;TEST_BEGIN_RECORDING - and cx, dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/AND32i32.asm b/mc-sema/validator/x86_64/tests/AND32i32.asm deleted file mode 100644 index 8f0aeaae0..000000000 --- a/mc-sema/validator/x86_64/tests/AND32i32.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND32i32 - mov eax, 0x7 - ;TEST_BEGIN_RECORDING - and eax, 0x6fffffff - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/AND32mr.asm b/mc-sema/validator/x86_64/tests/AND32mr.asm deleted file mode 100644 index f3ff31519..000000000 --- a/mc-sema/validator/x86_64/tests/AND32mr.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND32mr - ;TEST_BEGIN_RECORDING - lea rax, [rsp-0x4] - mov DWORD [rax], 0x55555 - mov ebx, 0x77777 - and DWORD [rax], ebx - mov eax, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/AND32ri.asm b/mc-sema/validator/x86_64/tests/AND32ri.asm deleted file mode 100644 index 5b7f77233..000000000 --- a/mc-sema/validator/x86_64/tests/AND32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND32ri - mov ebx, 0x7 - ;TEST_BEGIN_RECORDING - and ebx, 0x44444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/AND32rr.asm b/mc-sema/validator/x86_64/tests/AND32rr.asm deleted file mode 100644 index 3175c337e..000000000 --- a/mc-sema/validator/x86_64/tests/AND32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND32rr - mov ecx, 0x0 - mov edx, 0x1 - ;TEST_BEGIN_RECORDING - and ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/AND8i8.asm b/mc-sema/validator/x86_64/tests/AND8i8.asm deleted file mode 100644 index 55e8624ba..000000000 --- a/mc-sema/validator/x86_64/tests/AND8i8.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND8i8 - mov al, 0xa - ;TEST_BEGIN_RECORDING - and al, 0x5 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/AND8mi.asm b/mc-sema/validator/x86_64/tests/AND8mi.asm deleted file mode 100644 index bd7348125..000000000 --- a/mc-sema/validator/x86_64/tests/AND8mi.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND8mi - ;TEST_BEGIN_RECORDING - lea rbx, [rsp-0x4] - mov DWORD [rbx], 0x55 - and BYTE [rbx], 0x44 - mov ebx, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/AND8mr.asm b/mc-sema/validator/x86_64/tests/AND8mr.asm deleted file mode 100644 index 1708f7119..000000000 --- a/mc-sema/validator/x86_64/tests/AND8mr.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND8mr - ;TEST_BEGIN_RECORDING - lea rax, [rsp-0x4] - mov DWORD [rax], 0x55 - mov ebx, 0x77 - and BYTE [rax], bl - mov eax, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/AND8ri.asm b/mc-sema/validator/x86_64/tests/AND8ri.asm deleted file mode 100644 index 0582da655..000000000 --- a/mc-sema/validator/x86_64/tests/AND8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND8ri - mov ah, 0xcd - ;TEST_BEGIN_RECORDING - and ah, 0x3 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/AND8rr.asm b/mc-sema/validator/x86_64/tests/AND8rr.asm deleted file mode 100644 index 15c2b80b2..000000000 --- a/mc-sema/validator/x86_64/tests/AND8rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; AND8rr - mov ch, 0xa - mov dh, 0xe8 - ;TEST_BEGIN_RECORDING - and ch, dh - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/BSR16rr.asm b/mc-sema/validator/x86_64/tests/BSR16rr.asm deleted file mode 100644 index f9b2d2653..000000000 --- a/mc-sema/validator/x86_64/tests/BSR16rr.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_CF|FLAG_OF|FLAG_PF|FLAG_SF|FLAG_AF -;TEST_FILE_META_END - ; BSR16rr - mov ax, 0x0800 - ;TEST_BEGIN_RECORDING - bsr bx, ax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/BSR32rr.asm b/mc-sema/validator/x86_64/tests/BSR32rr.asm deleted file mode 100644 index c0db73b36..000000000 --- a/mc-sema/validator/x86_64/tests/BSR32rr.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_CF|FLAG_OF|FLAG_PF|FLAG_SF|FLAG_AF -;TEST_FILE_META_END - ; BSR32rr - mov eax, 0x08000000 - ;TEST_BEGIN_RECORDING - bsr ebx, eax - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/BSR32rr_2.asm b/mc-sema/validator/x86_64/tests/BSR32rr_2.asm deleted file mode 100644 index 2aef99ed9..000000000 --- a/mc-sema/validator/x86_64/tests/BSR32rr_2.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_CF|FLAG_OF|FLAG_PF|FLAG_SF|FLAG_AF -;TEST_FILE_META_END - ; BSR32rr; test special case zero source op - mov eax, 0x00000000 - ;TEST_BEGIN_RECORDING - bsr ebx, eax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/BSR64rr.asm b/mc-sema/validator/x86_64/tests/BSR64rr.asm deleted file mode 100644 index cece96f33..000000000 --- a/mc-sema/validator/x86_64/tests/BSR64rr.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_CF|FLAG_OF|FLAG_PF|FLAG_SF|FLAG_AF -;TEST_FILE_META_END - ; BSR64rr - mov rax, 0x08000000 - ;TEST_BEGIN_RECORDING - bsr rbx, rax - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/BSR64rr_2.asm b/mc-sema/validator/x86_64/tests/BSR64rr_2.asm deleted file mode 100644 index c6d3c0a47..000000000 --- a/mc-sema/validator/x86_64/tests/BSR64rr_2.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_CF|FLAG_OF|FLAG_PF|FLAG_SF|FLAG_AF -;TEST_FILE_META_END - ; BSR64rr; test special case zero source op - mov rax, 0x00000000 - ;TEST_BEGIN_RECORDING - bsr rbx, rax - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/BSWAP32r.asm b/mc-sema/validator/x86_64/tests/BSWAP32r.asm deleted file mode 100644 index 78127113b..000000000 --- a/mc-sema/validator/x86_64/tests/BSWAP32r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Bswap32R - mov eax, 0x56781234 - ;TEST_BEGIN_RECORDING - bswap eax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/BT16rr.asm b/mc-sema/validator/x86_64/tests/BT16rr.asm deleted file mode 100644 index 75f659fe4..000000000 --- a/mc-sema/validator/x86_64/tests/BT16rr.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_PF|FLAG_SF|FLAG_AF -;TEST_FILE_META_END - ; BT16rr - mov ax, 0x0800 - mov bx, 11 - clc ; clear carry since we will set it - ;TEST_BEGIN_RECORDING - bt ax, bx - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86_64/tests/BT32rr.asm b/mc-sema/validator/x86_64/tests/BT32rr.asm deleted file mode 100644 index 7ab0c2524..000000000 --- a/mc-sema/validator/x86_64/tests/BT32rr.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_PF|FLAG_SF|FLAG_AF -;TEST_FILE_META_END - ; BT32rr - mov eax, 0x08000000 - mov ebx, 27 - clc ; clear carry since we will set it - ;TEST_BEGIN_RECORDING - bt eax, ebx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CDQ.asm b/mc-sema/validator/x86_64/tests/CDQ.asm deleted file mode 100644 index 78b0d8b18..000000000 --- a/mc-sema/validator/x86_64/tests/CDQ.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CDQ - ;TEST_BEGIN_RECORDING - cdq - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CLC.asm b/mc-sema/validator/x86_64/tests/CLC.asm deleted file mode 100644 index 179c9d510..000000000 --- a/mc-sema/validator/x86_64/tests/CLC.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Clc - ;TEST_BEGIN_RECORDING - clc - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CLD.asm b/mc-sema/validator/x86_64/tests/CLD.asm deleted file mode 100644 index 794a17309..000000000 --- a/mc-sema/validator/x86_64/tests/CLD.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Cld - ;TEST_BEGIN_RECORDING - cld - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVA16rr.asm b/mc-sema/validator/x86_64/tests/CMOVA16rr.asm deleted file mode 100644 index 251809f87..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVA16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Cmova16RR - mov ax, 0x33 - mov dx, 0x44 - ;TEST_BEGIN_RECORDING - cmova ax, dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVA32rm.asm b/mc-sema/validator/x86_64/tests/CMOVA32rm.asm deleted file mode 100644 index cb4732341..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVA32rm.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVA32rm - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0x4] - mov DWORD [rdi], 0x3 - cmova eax, [rdi] - mov rdi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVA32rr.asm b/mc-sema/validator/x86_64/tests/CMOVA32rr.asm deleted file mode 100644 index 4c37d655d..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVA32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Cmova32RR - mov eax, 0x3333 - mov ecx, 0x4444 - ;TEST_BEGIN_RECORDING - cmova eax, ecx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVAE16rr.asm b/mc-sema/validator/x86_64/tests/CMOVAE16rr.asm deleted file mode 100644 index db064a745..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVAE16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVAE16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovae ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVAE32rr.asm b/mc-sema/validator/x86_64/tests/CMOVAE32rr.asm deleted file mode 100644 index 73c9fc0fb..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVAE32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVAE32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovae ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVB16rr.asm b/mc-sema/validator/x86_64/tests/CMOVB16rr.asm deleted file mode 100644 index 1df9200c1..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVB16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVB16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovb ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVB32rr.asm b/mc-sema/validator/x86_64/tests/CMOVB32rr.asm deleted file mode 100644 index d4af68205..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVB32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVB32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovb ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVBE16rr.asm b/mc-sema/validator/x86_64/tests/CMOVBE16rr.asm deleted file mode 100644 index e40e58e5b..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVBE16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVBE16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovbe ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVBE32rr.asm b/mc-sema/validator/x86_64/tests/CMOVBE32rr.asm deleted file mode 100644 index c547ff860..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVBE32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVBE32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovbe ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVE16rr.asm b/mc-sema/validator/x86_64/tests/CMOVE16rr.asm deleted file mode 100644 index 5cbfeb044..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVE16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVE16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmove ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVE32rr.asm b/mc-sema/validator/x86_64/tests/CMOVE32rr.asm deleted file mode 100644 index fb915d6ec..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVE32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVE32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmove ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVG16rr.asm b/mc-sema/validator/x86_64/tests/CMOVG16rr.asm deleted file mode 100644 index a454b9eec..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVG16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVG16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovg ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVG32rr.asm b/mc-sema/validator/x86_64/tests/CMOVG32rr.asm deleted file mode 100644 index 252e64763..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVG32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVG32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovg ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVGE16rr.asm b/mc-sema/validator/x86_64/tests/CMOVGE16rr.asm deleted file mode 100644 index c1df5fc86..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVGE16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVGE16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovge ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVGE32rr.asm b/mc-sema/validator/x86_64/tests/CMOVGE32rr.asm deleted file mode 100644 index 1898ee160..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVGE32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVGE32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovge ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVL16rr.asm b/mc-sema/validator/x86_64/tests/CMOVL16rr.asm deleted file mode 100644 index 3eb87f8a1..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVL16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVL16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovl ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVL32rr.asm b/mc-sema/validator/x86_64/tests/CMOVL32rr.asm deleted file mode 100644 index fec385511..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVL32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVL32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovl ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVLE16rr.asm b/mc-sema/validator/x86_64/tests/CMOVLE16rr.asm deleted file mode 100644 index f7b65bdc1..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVLE16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVLE16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovle ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVLE32rr.asm b/mc-sema/validator/x86_64/tests/CMOVLE32rr.asm deleted file mode 100644 index 913821d67..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVLE32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVLE32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovle ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVNE16rr.asm b/mc-sema/validator/x86_64/tests/CMOVNE16rr.asm deleted file mode 100644 index 319567a59..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVNE16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVNE16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovne ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVNE32rr.asm b/mc-sema/validator/x86_64/tests/CMOVNE32rr.asm deleted file mode 100644 index df13953e7..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVNE32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVNE32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovne ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVNO16rr.asm b/mc-sema/validator/x86_64/tests/CMOVNO16rr.asm deleted file mode 100644 index 646c03ed8..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVNO16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVNO16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovno ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVNO32rr.asm b/mc-sema/validator/x86_64/tests/CMOVNO32rr.asm deleted file mode 100644 index f42468359..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVNO32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVNO32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovno ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVNP16rr.asm b/mc-sema/validator/x86_64/tests/CMOVNP16rr.asm deleted file mode 100644 index 150e33bff..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVNP16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVNP16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovnp ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVNP32rr.asm b/mc-sema/validator/x86_64/tests/CMOVNP32rr.asm deleted file mode 100644 index 2a9aa15c5..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVNP32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVNP32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovnp ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVNS16rr.asm b/mc-sema/validator/x86_64/tests/CMOVNS16rr.asm deleted file mode 100644 index 5b0e2ee7f..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVNS16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVNS16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovns ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVNS32rr.asm b/mc-sema/validator/x86_64/tests/CMOVNS32rr.asm deleted file mode 100644 index 311f58945..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVNS32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVNS32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovns ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVO16rr.asm b/mc-sema/validator/x86_64/tests/CMOVO16rr.asm deleted file mode 100644 index c7de4cde9..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVO16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVO16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovo ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVO32rr.asm b/mc-sema/validator/x86_64/tests/CMOVO32rr.asm deleted file mode 100644 index 4536e44ff..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVO32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVO32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovo ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVP16rr.asm b/mc-sema/validator/x86_64/tests/CMOVP16rr.asm deleted file mode 100644 index d881edd60..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVP16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVP16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovp ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVP32rr.asm b/mc-sema/validator/x86_64/tests/CMOVP32rr.asm deleted file mode 100644 index 4c26ba188..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVP32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVP32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovp ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVS16rr.asm b/mc-sema/validator/x86_64/tests/CMOVS16rr.asm deleted file mode 100644 index 992328402..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVS16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVS16rr - mov ax, 0x2 - mov bx, 0x4 - ;TEST_BEGIN_RECORDING - cmovs ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMOVS32rr.asm b/mc-sema/validator/x86_64/tests/CMOVS32rr.asm deleted file mode 100644 index 24119f155..000000000 --- a/mc-sema/validator/x86_64/tests/CMOVS32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMOVS32rr - mov ecx, 0x44 - mov edx, 0x88 - ;TEST_BEGIN_RECORDING - cmovs ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMP16mi.asm b/mc-sema/validator/x86_64/tests/CMP16mi.asm deleted file mode 100644 index 4ec2ec836..000000000 --- a/mc-sema/validator/x86_64/tests/CMP16mi.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMP16mi - ;TEST_BEGIN_RECORDING - lea rax, [rsp-0x4] - mov DWORD [rax], 0x200 - cmp WORD [rax], 0x222 - mov eax, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMP16rr.asm b/mc-sema/validator/x86_64/tests/CMP16rr.asm deleted file mode 100644 index a1e2a777e..000000000 --- a/mc-sema/validator/x86_64/tests/CMP16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMP16rr - mov cx, 0x4 - mov dx, 0x7 - ;TEST_BEGIN_RECORDING - cmp cx, dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMP32i32.asm b/mc-sema/validator/x86_64/tests/CMP32i32.asm deleted file mode 100644 index c358383a0..000000000 --- a/mc-sema/validator/x86_64/tests/CMP32i32.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMP32i32 - mov eax, 0x6ffffffe - ;TEST_BEGIN_RECORDING - cmp eax, 0x6fffffff - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMP32ri.asm b/mc-sema/validator/x86_64/tests/CMP32ri.asm deleted file mode 100644 index 7cc3e386f..000000000 --- a/mc-sema/validator/x86_64/tests/CMP32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMP32ri - mov ebx, 0x44 - ;TEST_BEGIN_RECORDING - cmp ebx, 0x44444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMP32rr.asm b/mc-sema/validator/x86_64/tests/CMP32rr.asm deleted file mode 100644 index a4a5ded9c..000000000 --- a/mc-sema/validator/x86_64/tests/CMP32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMP32rr - mov ecx, 0x4 - mov edx, 0x2 - ;TEST_BEGIN_RECORDING - cmp ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMP8rr.asm b/mc-sema/validator/x86_64/tests/CMP8rr.asm deleted file mode 100644 index 2b822d99f..000000000 --- a/mc-sema/validator/x86_64/tests/CMP8rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMP8rr - mov ch, 0x2 - mov dh, 0x3 - ;TEST_BEGIN_RECORDING - cmp ch, dh - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMPXCHG16r.asm b/mc-sema/validator/x86_64/tests/CMPXCHG16r.asm deleted file mode 100644 index c28b40507..000000000 --- a/mc-sema/validator/x86_64/tests/CMPXCHG16r.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMPXCHG16r - mov bx, 0x667 - mov bp, 0x888 - ;TEST_BEGIN_RECORDING - cmpxchg bx, bp - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMPXCHG32rm.asm b/mc-sema/validator/x86_64/tests/CMPXCHG32rm.asm deleted file mode 100644 index 2c120029e..000000000 --- a/mc-sema/validator/x86_64/tests/CMPXCHG32rm.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMPXCHG32rm - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0x10] - mov DWORD [rdi], 0xabcd4321 - mov eax, 0xabcd4321 - cmpxchg [rdi], ecx - mov edx, [rdi] - mov rdi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMPXCHG32rr.asm b/mc-sema/validator/x86_64/tests/CMPXCHG32rr.asm deleted file mode 100644 index 27b72b035..000000000 --- a/mc-sema/validator/x86_64/tests/CMPXCHG32rr.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Cmpxchg32RR - mov eax, 0x68244256 - mov edx, 0x54316785 - mov ecx, 0x23423423 - ;TEST_BEGIN_RECORDING - cmpxchg edx, ecx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CMPXCHG8rr.asm b/mc-sema/validator/x86_64/tests/CMPXCHG8rr.asm deleted file mode 100644 index 396182151..000000000 --- a/mc-sema/validator/x86_64/tests/CMPXCHG8rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; CMPXCHG8rr - mov bh, 0x66 - mov ch, 0x88 - ;TEST_BEGIN_RECORDING - cmpxchg bh, ch - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/CVTDQ2PSrr.asm b/mc-sema/validator/x86_64/tests/CVTDQ2PSrr.asm deleted file mode 100644 index 44640ebf8..000000000 --- a/mc-sema/validator/x86_64/tests/CVTDQ2PSrr.asm +++ /dev/null @@ -1,24 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -; load a 128 bit value into xmm0 -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm1, [rcx] - -;TEST_BEGIN_RECORDING -cvtdq2ps xmm0, xmm1 -;TEST_END_RECORDING - -mov rcx, 0 -xorps xmm0, xmm0 -xorps xmm1, xmm1 diff --git a/mc-sema/validator/x86_64/tests/CVTPS2PDrm.asm b/mc-sema/validator/x86_64/tests/CVTPS2PDrm.asm deleted file mode 100644 index 0d3e13559..000000000 --- a/mc-sema/validator/x86_64/tests/CVTPS2PDrm.asm +++ /dev/null @@ -1,23 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -mov ecx, 2 -cvtsi2ss xmm0, ecx - -mov rax, rsp -sub rax, 16 -and rax, -16 -xchg rax, rsp -movaps [rsp], xmm0 - -;TEST_BEGIN_RECORDING -cvtps2pd xmm0, xmm0 -;TEST_END_RECORDING - -xchg rax, rsp -xor ecx, ecx -xor eax, eax -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/CVTPS2PDrr.asm b/mc-sema/validator/x86_64/tests/CVTPS2PDrr.asm deleted file mode 100644 index eefc94110..000000000 --- a/mc-sema/validator/x86_64/tests/CVTPS2PDrr.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 -cvtsi2ss xmm0, ecx - -;TEST_BEGIN_RECORDING -cvtps2pd xmm0, xmm0 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/CVTSD2SSrm.asm b/mc-sema/validator/x86_64/tests/CVTSD2SSrm.asm deleted file mode 100644 index 361428ad7..000000000 --- a/mc-sema/validator/x86_64/tests/CVTSD2SSrm.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-8] -movsd [rcx], xmm0 -cvtsd2ss xmm1, [rcx] -mov eax, 0 -mov ecx, 2 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86_64/tests/CVTSD2SSrr.asm b/mc-sema/validator/x86_64/tests/CVTSD2SSrr.asm deleted file mode 100644 index 1899b6854..000000000 --- a/mc-sema/validator/x86_64/tests/CVTSD2SSrr.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -cvtsd2ss xmm1, xmm0 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/CVTSI2SDrm.asm b/mc-sema/validator/x86_64/tests/CVTSI2SDrm.asm deleted file mode 100644 index e77a654c7..000000000 --- a/mc-sema/validator/x86_64/tests/CVTSI2SDrm.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into eax for future load into xmm0 -mov eax, 2 - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-4] -mov [rcx], eax -cvtsi2sd xmm0, [rcx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/CVTSI2SDrr.asm b/mc-sema/validator/x86_64/tests/CVTSI2SDrr.asm deleted file mode 100644 index 220ffe607..000000000 --- a/mc-sema/validator/x86_64/tests/CVTSI2SDrr.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 - -;TEST_BEGIN_RECORDING -cvtsi2sd xmm0, ecx -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/CVTSI2SSrm.asm b/mc-sema/validator/x86_64/tests/CVTSI2SSrm.asm deleted file mode 100644 index 03936c975..000000000 --- a/mc-sema/validator/x86_64/tests/CVTSI2SSrm.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into eax for future load into xmm0 -mov eax, 2 - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-4] -mov [rcx], eax -cvtsi2ss xmm0, [rcx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/CVTSI2SSrr.asm b/mc-sema/validator/x86_64/tests/CVTSI2SSrr.asm deleted file mode 100644 index 0606b587a..000000000 --- a/mc-sema/validator/x86_64/tests/CVTSI2SSrr.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 - -;TEST_BEGIN_RECORDING -cvtsi2ss xmm0, ecx -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2ss xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/CVTSS2SDrm.asm b/mc-sema/validator/x86_64/tests/CVTSS2SDrm.asm deleted file mode 100644 index f26cfd158..000000000 --- a/mc-sema/validator/x86_64/tests/CVTSS2SDrm.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-4] -mov DWORD [rcx], 0x3fc00000 - -cvtss2sd xmm0, [rcx] - -mov ecx, [rcx] -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/CVTSS2SDrr.asm b/mc-sema/validator/x86_64/tests/CVTSS2SDrr.asm deleted file mode 100644 index 2b79fc762..000000000 --- a/mc-sema/validator/x86_64/tests/CVTSS2SDrr.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -cvtss2sd xmm1, xmm0 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/CVTTSD2SIrm.asm b/mc-sema/validator/x86_64/tests/CVTTSD2SIrm.asm deleted file mode 100644 index ff147c867..000000000 --- a/mc-sema/validator/x86_64/tests/CVTTSD2SIrm.asm +++ /dev/null @@ -1,18 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-8] -movsd [rcx], xmm0 -cvttsd2si ecx, [rcx] -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/CVTTSD2SIrr.asm b/mc-sema/validator/x86_64/tests/CVTTSD2SIrr.asm deleted file mode 100644 index eb31915b2..000000000 --- a/mc-sema/validator/x86_64/tests/CVTTSD2SIrr.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -cvttsd2si ecx, xmm0 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/CVTTSS2SIrm.asm b/mc-sema/validator/x86_64/tests/CVTTSS2SIrm.asm deleted file mode 100644 index 625a33164..000000000 --- a/mc-sema/validator/x86_64/tests/CVTTSS2SIrm.asm +++ /dev/null @@ -1,18 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 -cvtsi2ss xmm0, ecx - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-8] -movss [rcx], xmm0 -cvttss2si ecx, [rcx] -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2ss xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/CVTTSS2SIrr.asm b/mc-sema/validator/x86_64/tests/CVTTSS2SIrr.asm deleted file mode 100644 index 7e569d799..000000000 --- a/mc-sema/validator/x86_64/tests/CVTTSS2SIrr.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 -cvtsi2ss xmm0, ecx - -;TEST_BEGIN_RECORDING -cvttss2si ecx, xmm0 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/Cmp32RR1.asm b/mc-sema/validator/x86_64/tests/Cmp32RR1.asm deleted file mode 100644 index 1a0bb105b..000000000 --- a/mc-sema/validator/x86_64/tests/Cmp32RR1.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Cmp32RR1 - mov eax, 0x4 - mov ebx, 0x2 - ;TEST_BEGIN_RECORDING - cmp eax, ebx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/Cmp32RR2.asm b/mc-sema/validator/x86_64/tests/Cmp32RR2.asm deleted file mode 100644 index e8a786c90..000000000 --- a/mc-sema/validator/x86_64/tests/Cmp32RR2.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Cmp32RR2 - mov eax, 0x17 - mov ebx, 0x3 - ;TEST_BEGIN_RECORDING - cmp eax, ebx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/Cmpxch16RR.asm b/mc-sema/validator/x86_64/tests/Cmpxch16RR.asm deleted file mode 100644 index 8e7c5dfc4..000000000 --- a/mc-sema/validator/x86_64/tests/Cmpxch16RR.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Cmpxch16RR - mov ax, 0x6824 - mov dx, 0x6824 - mov cx, 0x1479 - ;TEST_BEGIN_RECORDING - cmpxchg dx, cx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/Composite1.asm b/mc-sema/validator/x86_64/tests/Composite1.asm deleted file mode 100644 index 000149efd..000000000 --- a/mc-sema/validator/x86_64/tests/Composite1.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Composite1 - mov eax, 0x18 - ;TEST_BEGIN_RECORDING - mov ecx, eax - xor eax, eax - xor ebx, ebx - cmp ebx, ecx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/Composite2.asm b/mc-sema/validator/x86_64/tests/Composite2.asm deleted file mode 100644 index 2e1c3378d..000000000 --- a/mc-sema/validator/x86_64/tests/Composite2.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Composite2 - mov ecx, 0x18 - xor ebx, ebx - xor eax, eax - inc eax - ;TEST_BEGIN_RECORDING -again: - cmp ebx, ecx - je done - inc ebx - add eax, eax - jmp again -done: - inc eax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/DEC16r.asm b/mc-sema/validator/x86_64/tests/DEC16r.asm deleted file mode 100644 index 32c9adc57..000000000 --- a/mc-sema/validator/x86_64/tests/DEC16r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; DEC16r - mov dx, 0x30 - ;TEST_BEGIN_RECORDING - dec dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/DEC32r.asm b/mc-sema/validator/x86_64/tests/DEC32r.asm deleted file mode 100644 index c0fd0d631..000000000 --- a/mc-sema/validator/x86_64/tests/DEC32r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; DEC32r - mov eax, 0x31 - ;TEST_BEGIN_RECORDING - dec eax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/DEC64r.asm b/mc-sema/validator/x86_64/tests/DEC64r.asm deleted file mode 100644 index f0f9cb1fa..000000000 --- a/mc-sema/validator/x86_64/tests/DEC64r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; DEC64r - mov rax, 0x31 - ;TEST_BEGIN_RECORDING - dec rax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/DEC8r.asm b/mc-sema/validator/x86_64/tests/DEC8r.asm deleted file mode 100644 index 9b457f860..000000000 --- a/mc-sema/validator/x86_64/tests/DEC8r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; DEC8r - mov cl, 0x32 - ;TEST_BEGIN_RECORDING - dec cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/DIV64r.asm b/mc-sema/validator/x86_64/tests/DIV64r.asm deleted file mode 100644 index 897a1aa63..000000000 --- a/mc-sema/validator/x86_64/tests/DIV64r.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_CF|FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; DIV64r - ;TEST_BEGIN_RECORDING - mov rdx, 0x0 - mov rax, 0x100 - mov rbx, 10 - div rbx - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/DIVPDrm.asm b/mc-sema/validator/x86_64/tests/DIVPDrm.asm deleted file mode 100644 index 18bff9e92..000000000 --- a/mc-sema/validator/x86_64/tests/DIVPDrm.asm +++ /dev/null @@ -1,24 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_PF -;TEST_FILE_META_END - -; convert 10 to a double precision float and store in xmm0 -mov ecx, 10 -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -movsd [rcx], xmm0 -mov DWORD [rcx+0x08], 0x0 -mov DWORD [rcx+0x0C], 0x0 - -divpd xmm0, [rcx] -mov rcx,0 -;TEST_END_RECORDING - -xorps xmm0, xmm0 - diff --git a/mc-sema/validator/x86_64/tests/DIVPDrr.asm b/mc-sema/validator/x86_64/tests/DIVPDrr.asm deleted file mode 100644 index 6a312aa8a..000000000 --- a/mc-sema/validator/x86_64/tests/DIVPDrr.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 3 to a double precision float and store in xmm0 -mov ecx, 3 -cvtsi2sd xmm0, ecx - -; convert 7 to a double precision float and store in xmm1 -mov ecx, 7 -cvtsi2sd xmm1, ecx - -;TEST_BEGIN_RECORDING -divpd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/DIVPSrm.asm b/mc-sema/validator/x86_64/tests/DIVPSrm.asm deleted file mode 100644 index 0b109802a..000000000 --- a/mc-sema/validator/x86_64/tests/DIVPSrm.asm +++ /dev/null @@ -1,24 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_PF -;TEST_FILE_META_END - -; convert 10 to a single precision float and store in xmm0 -mov ecx, 10 -cvtsi2ss xmm0, ecx - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -movss [rcx], xmm0 -mov DWORD [rcx+0x04], 0x0 -mov DWORD [rcx+0x08], 0x0 -mov DWORD [rcx+0x0C], 0x0 - -divps xmm0, [rcx] -mov rcx,0 -;TEST_END_RECORDING - -xorps xmm0, xmm0 diff --git a/mc-sema/validator/x86_64/tests/DIVPSrr.asm b/mc-sema/validator/x86_64/tests/DIVPSrr.asm deleted file mode 100644 index 302225c20..000000000 --- a/mc-sema/validator/x86_64/tests/DIVPSrr.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 3 to a double precision float and store in xmm0 -mov ecx, 3 -cvtsi2sd xmm0, ecx - -; convert 7 to a double precision float and store in xmm1 -mov ecx, 7 -cvtsi2sd xmm1, ecx - -;TEST_BEGIN_RECORDING -divps xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/DIVSDrm.asm b/mc-sema/validator/x86_64/tests/DIVSDrm.asm deleted file mode 100644 index 4045a6308..000000000 --- a/mc-sema/validator/x86_64/tests/DIVSDrm.asm +++ /dev/null @@ -1,23 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 10 to a double precision float and store in xmm0 -mov ecx, 10 -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -; load 2.5 (in double precision float form) -lea rcx, [rsp-8] -mov DWORD [rcx], 0 -mov DWORD [rcx+4], 0x40040000 - -divsd xmm0, [rcx] -mov ecx, [rcx] -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx - diff --git a/mc-sema/validator/x86_64/tests/DIVSDrr.asm b/mc-sema/validator/x86_64/tests/DIVSDrr.asm deleted file mode 100644 index ebf44bd38..000000000 --- a/mc-sema/validator/x86_64/tests/DIVSDrr.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 3 to a double precision float and store in xmm0 -mov ecx, 3 -cvtsi2sd xmm0, ecx - -; convert 7 to a double precision float and store in xmm1 -mov ecx, 7 -cvtsi2sd xmm1, ecx - -;TEST_BEGIN_RECORDING -divsd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86_64/tests/DIVSSrm.asm b/mc-sema/validator/x86_64/tests/DIVSSrm.asm deleted file mode 100644 index a4520ec24..000000000 --- a/mc-sema/validator/x86_64/tests/DIVSSrm.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 7 to a double precision float and store in xmm0 -mov ecx, 7 -cvtsi2ss xmm0, ecx - -;TEST_BEGIN_RECORDING -; load 1.5 (in double precision float form) -lea rcx, [rsp-4] -mov DWORD [rcx], 0x3fc00000 - -divss xmm0, [rcx] -mov ecx, [rcx] -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx - diff --git a/mc-sema/validator/x86_64/tests/DIVSSrr.asm b/mc-sema/validator/x86_64/tests/DIVSSrr.asm deleted file mode 100644 index 8579ffc41..000000000 --- a/mc-sema/validator/x86_64/tests/DIVSSrr.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 3 to a double precision float and store in xmm0 -mov ecx, 3 -cvtsi2ss xmm0, ecx - -; convert 2 to a double precision float and store in xmm1 -mov ecx, 2 -cvtsi2ss xmm1, ecx - -;TEST_BEGIN_RECORDING -divss xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/DIV_F32m.asm b/mc-sema/validator/x86_64/tests/DIV_F32m.asm deleted file mode 100644 index a464683b2..000000000 --- a/mc-sema/validator/x86_64/tests/DIV_F32m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLD1 -;TEST_BEGIN_RECORDING -lea rdi, [rsp-08] -FSTP dword [rdi] -FDIV dword [rdi] -mov edi, 0 -;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/DIV_F64m.asm b/mc-sema/validator/x86_64/tests/DIV_F64m.asm deleted file mode 100644 index e74f77ed6..000000000 --- a/mc-sema/validator/x86_64/tests/DIV_F64m.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLD1 -;TEST_BEGIN_RECORDING -lea rdi, [rsp-08] -FSTP qword [rdi] -FDIV qword [rdi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/DIV_PFrST0.asm b/mc-sema/validator/x86_64/tests/DIV_PFrST0.asm deleted file mode 100644 index 5b0d05ef0..000000000 --- a/mc-sema/validator/x86_64/tests/DIV_PFrST0.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLD1 -FLD1 -;TEST_BEGIN_RECORDING -FDIVP st2, st0 -mov edi, 0 -;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/DIV_ST0Fr.asm b/mc-sema/validator/x86_64/tests/DIV_ST0Fr.asm deleted file mode 100644 index d508f3be5..000000000 --- a/mc-sema/validator/x86_64/tests/DIV_ST0Fr.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLD1 -FLDPI -;TEST_BEGIN_RECORDING -FDIV st0, st1 -mov edi, 0 -;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86_64/tests/ENTER.asm b/mc-sema/validator/x86_64/tests/ENTER.asm deleted file mode 100644 index f980ab0e1..000000000 --- a/mc-sema/validator/x86_64/tests/ENTER.asm +++ /dev/null @@ -1,18 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ENTER - mov rax, rsp - mov rdi, rbp - mov rbx, rsp - sub rbx, 0x8 - ;TEST_BEGIN_RECORDING - enter 0x8, 0x0 - cmp rbp, rbx - mov rbp, 0x0 - ;TEST_END_RECORDING - mov rsp, rax - mov rbp, rdi - diff --git a/mc-sema/validator/x86_64/tests/FABS.asm b/mc-sema/validator/x86_64/tests/FABS.asm deleted file mode 100644 index 7d775b0ca..000000000 --- a/mc-sema/validator/x86_64/tests/FABS.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; FADDP - lea rdi, [rsp-0x8] - ; load -1.25 in st0 - mov DWORD [rdi], 0xbfa00000 - fld DWORD [rdi] - ;TEST_BEGIN_RECORDING - fabs - mov rdi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FADDP.asm b/mc-sema/validator/x86_64/tests/FADDP.asm deleted file mode 100644 index 4f5794d21..000000000 --- a/mc-sema/validator/x86_64/tests/FADDP.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; FADDP - lea rdi, [rsp-0x10] - mov DWORD [rdi], 0x2168c000 - mov DWORD [rdi+0x4], 0xc90fdaa2 - mov DWORD [rdi+0x8], 0x00004000 - fld TWORD [rdi] - fld TWORD [rdi] - ;TEST_BEGIN_RECORDING - faddp - mov rdi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FADDP_rST0.asm b/mc-sema/validator/x86_64/tests/FADDP_rST0.asm deleted file mode 100644 index 2695bbd96..000000000 --- a/mc-sema/validator/x86_64/tests/FADDP_rST0.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; FADDP - FLDPI - FLDPI - FLDPI - ;TEST_BEGIN_RECORDING - faddp st2, st0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FBLD.asm b/mc-sema/validator/x86_64/tests/FBLD.asm deleted file mode 100644 index bfebca80a..000000000 --- a/mc-sema/validator/x86_64/tests/FBLD.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rdi, [rsp-0x10] -mov dword [rdi], 0x12345678 -mov dword [rdi+04], 0x12345678 -mov dword [rdi+08], 0x00001234 -FBLD tword [rdi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FBSTP.asm b/mc-sema/validator/x86_64/tests/FBSTP.asm deleted file mode 100644 index 88b58376a..000000000 --- a/mc-sema/validator/x86_64/tests/FBSTP.asm +++ /dev/null @@ -1,20 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -FLDPI -;TEST_BEGIN_RECORDING -lea rdi, [rsp-0x10] -mov dword [rdi+00], 0x0 -mov dword [rdi+04], 0x0 -mov dword [rdi+08], 0x0 -FBSTP tword [rdi] -mov eax, [rdi+00] -mov ebx, [rdi+04] -mov ecx, [rdi+08] -mov edi, 0 - -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FCHS.asm b/mc-sema/validator/x86_64/tests/FCHS.asm deleted file mode 100644 index 22bdcbc34..000000000 --- a/mc-sema/validator/x86_64/tests/FCHS.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -FLDPI -;TEST_BEGIN_RECORDING -FCHS -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FCLEX.asm b/mc-sema/validator/x86_64/tests/FCLEX.asm deleted file mode 100644 index 04ae9a14a..000000000 --- a/mc-sema/validator/x86_64/tests/FCLEX.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -FCLEX -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FCMOVB.asm b/mc-sema/validator/x86_64/tests/FCMOVB.asm deleted file mode 100644 index 621860a5d..000000000 --- a/mc-sema/validator/x86_64/tests/FCMOVB.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - FLDPI - FLD1 - STC ;ensure the mov - ;TEST_BEGIN_RECORDING - fcmovb st0, st1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FCMOVBE.asm b/mc-sema/validator/x86_64/tests/FCMOVBE.asm deleted file mode 100644 index b38ce6594..000000000 --- a/mc-sema/validator/x86_64/tests/FCMOVBE.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - FLDPI - FLD1 - CMP EAX, EAX - ;TEST_BEGIN_RECORDING - fcmovbe st0, st1 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86_64/tests/FCMOVE.asm b/mc-sema/validator/x86_64/tests/FCMOVE.asm deleted file mode 100644 index 22f59fe6f..000000000 --- a/mc-sema/validator/x86_64/tests/FCMOVE.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - FLDPI - FLD1 - CMP EAX, EAX - ;TEST_BEGIN_RECORDING - fcmove st0, st1 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86_64/tests/FCMOVNB.asm b/mc-sema/validator/x86_64/tests/FCMOVNB.asm deleted file mode 100644 index 665018e50..000000000 --- a/mc-sema/validator/x86_64/tests/FCMOVNB.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - FLDPI - FLD1 - ; Clear CF - CLC - ;TEST_BEGIN_RECORDING - fcmovnb st0, st1 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86_64/tests/FCMOVNBE.asm b/mc-sema/validator/x86_64/tests/FCMOVNBE.asm deleted file mode 100644 index e2ee4c88f..000000000 --- a/mc-sema/validator/x86_64/tests/FCMOVNBE.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - FLDPI - FLD1 - MOV EAX, 0 - CMP EAX, 1 - CLC - ;TEST_BEGIN_RECORDING - fcmovnbe st0, st1 - ;TEST_END_RECORDING - - - - diff --git a/mc-sema/validator/x86_64/tests/FCMOVNE.asm b/mc-sema/validator/x86_64/tests/FCMOVNE.asm deleted file mode 100644 index 1be87da51..000000000 --- a/mc-sema/validator/x86_64/tests/FCMOVNE.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - FLDPI - FLD1 - MOV EAX, 0 - CMP EAX, 1 - ;TEST_BEGIN_RECORDING - fcmovne st0, st1 - ;TEST_END_RECORDING - - - diff --git a/mc-sema/validator/x86_64/tests/FCMOVNU.asm b/mc-sema/validator/x86_64/tests/FCMOVNU.asm deleted file mode 100644 index b65fa8e0e..000000000 --- a/mc-sema/validator/x86_64/tests/FCMOVNU.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - FLDPI - FLD1 - MOV EAX, 2 - CMP EAX, 0 - ;TEST_BEGIN_RECORDING - fcmovnu st0, st1 - ;TEST_END_RECORDING - - - - diff --git a/mc-sema/validator/x86_64/tests/FCMOVU.asm b/mc-sema/validator/x86_64/tests/FCMOVU.asm deleted file mode 100644 index 91348bffb..000000000 --- a/mc-sema/validator/x86_64/tests/FCMOVU.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - FLDPI - FLD1 - ;SET PF - MOV EAX, 0x3 - CMP EAX, 0 - ;TEST_BEGIN_RECORDING - fcmovu st0, st1 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86_64/tests/FCOM.asm b/mc-sema/validator/x86_64/tests/FCOM.asm deleted file mode 100644 index a3fdcb497..000000000 --- a/mc-sema/validator/x86_64/tests/FCOM.asm +++ /dev/null @@ -1,18 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLDPI - -;TEST_BEGIN_RECORDING -FCOM -mov edi, 0 -;TEST_END_RECORDING - - - - diff --git a/mc-sema/validator/x86_64/tests/FCOMIP_STFr.asm b/mc-sema/validator/x86_64/tests/FCOMIP_STFr.asm deleted file mode 100644 index 2274a9789..000000000 --- a/mc-sema/validator/x86_64/tests/FCOMIP_STFr.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLDPI - -;TEST_BEGIN_RECORDING -FCOMIP st0, st1 -;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86_64/tests/FCOMI_STFr.asm b/mc-sema/validator/x86_64/tests/FCOMI_STFr.asm deleted file mode 100644 index b2f7be342..000000000 --- a/mc-sema/validator/x86_64/tests/FCOMI_STFr.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLDPI - -;TEST_BEGIN_RECORDING -FCOMI st0, st1 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FCOMP.asm b/mc-sema/validator/x86_64/tests/FCOMP.asm deleted file mode 100644 index 2b3722cf8..000000000 --- a/mc-sema/validator/x86_64/tests/FCOMP.asm +++ /dev/null @@ -1,18 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLDPI - -;TEST_BEGIN_RECORDING -FCOMP -mov edi, 0 -;TEST_END_RECORDING - - - - diff --git a/mc-sema/validator/x86_64/tests/FCOMPP.asm b/mc-sema/validator/x86_64/tests/FCOMPP.asm deleted file mode 100644 index b45b91ced..000000000 --- a/mc-sema/validator/x86_64/tests/FCOMPP.asm +++ /dev/null @@ -1,18 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLDPI - -;TEST_BEGIN_RECORDING -FCOMPP -mov edi, 0 -;TEST_END_RECORDING - - - - diff --git a/mc-sema/validator/x86_64/tests/FCOMP_F32m.asm b/mc-sema/validator/x86_64/tests/FCOMP_F32m.asm deleted file mode 100644 index deac0f530..000000000 --- a/mc-sema/validator/x86_64/tests/FCOMP_F32m.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI - -;TEST_BEGIN_RECORDING -lea rdi, [rsp-08] -FST dword [rdi+00] -FCOMP dword [rdi+00] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FCOMP_F64m.asm b/mc-sema/validator/x86_64/tests/FCOMP_F64m.asm deleted file mode 100644 index de6705097..000000000 --- a/mc-sema/validator/x86_64/tests/FCOMP_F64m.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI - -;TEST_BEGIN_RECORDING -lea rdi, [rsp-0x0C] -FST qword [rdi+00] -FCOMP qword [rdi+00] -mov edi, 0 -;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86_64/tests/FCOMP_STFr.asm b/mc-sema/validator/x86_64/tests/FCOMP_STFr.asm deleted file mode 100644 index 24734cda9..000000000 --- a/mc-sema/validator/x86_64/tests/FCOMP_STFr.asm +++ /dev/null @@ -1,18 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLDPI -FLDPI - -;TEST_BEGIN_RECORDING -FCOMP st2 -mov edi, 0 -;TEST_END_RECORDING - - - diff --git a/mc-sema/validator/x86_64/tests/FCOM_F32m.asm b/mc-sema/validator/x86_64/tests/FCOM_F32m.asm deleted file mode 100644 index b97527b13..000000000 --- a/mc-sema/validator/x86_64/tests/FCOM_F32m.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI - -;TEST_BEGIN_RECORDING -lea rdi, [rsp-08] -FST dword [rdi+00] -FCOM dword [rdi+00] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FCOM_F64m.asm b/mc-sema/validator/x86_64/tests/FCOM_F64m.asm deleted file mode 100644 index 02e7f29b9..000000000 --- a/mc-sema/validator/x86_64/tests/FCOM_F64m.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI - -;TEST_BEGIN_RECORDING -lea rdi, [rsp-0x0C] -FST qword [rdi+00] -FCOM qword [rdi+00] -mov edi, 0 -;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86_64/tests/FCOM_STFr.asm b/mc-sema/validator/x86_64/tests/FCOM_STFr.asm deleted file mode 100644 index 4390e3090..000000000 --- a/mc-sema/validator/x86_64/tests/FCOM_STFr.asm +++ /dev/null @@ -1,18 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLDPI -FLDPI - -;TEST_BEGIN_RECORDING -FCOM st2 -mov edi, 0 -;TEST_END_RECORDING - - - diff --git a/mc-sema/validator/x86_64/tests/FDECSTP.asm b/mc-sema/validator/x86_64/tests/FDECSTP.asm deleted file mode 100644 index c04ccc23f..000000000 --- a/mc-sema/validator/x86_64/tests/FDECSTP.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLD1 - -;TEST_BEGIN_RECORDING -FDECSTP -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FDIVP.asm b/mc-sema/validator/x86_64/tests/FDIVP.asm deleted file mode 100644 index 79625fcf2..000000000 --- a/mc-sema/validator/x86_64/tests/FDIVP.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLD1 -;TEST_BEGIN_RECORDING -FDIVP -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FDIVRP.asm b/mc-sema/validator/x86_64/tests/FDIVRP.asm deleted file mode 100644 index 95eaea2e7..000000000 --- a/mc-sema/validator/x86_64/tests/FDIVRP.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLD1 -;TEST_BEGIN_RECORDING -FDIVRP -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FDIVR_F32m.asm b/mc-sema/validator/x86_64/tests/FDIVR_F32m.asm deleted file mode 100644 index 111a019df..000000000 --- a/mc-sema/validator/x86_64/tests/FDIVR_F32m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLD1 -;TEST_BEGIN_RECORDING -lea rdi, [rsp-08] -FSTP dword [rdi] -FDIVR dword [rdi] -mov edi, 0 -;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/FDIVR_F64m.asm b/mc-sema/validator/x86_64/tests/FDIVR_F64m.asm deleted file mode 100644 index 3d94fadc3..000000000 --- a/mc-sema/validator/x86_64/tests/FDIVR_F64m.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLD1 -;TEST_BEGIN_RECORDING -lea rdi, [rsp-08] -FSTP qword [rdi] -FDIVR qword [rdi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FDIVR_FrST0.asm b/mc-sema/validator/x86_64/tests/FDIVR_FrST0.asm deleted file mode 100644 index 331378e14..000000000 --- a/mc-sema/validator/x86_64/tests/FDIVR_FrST0.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLD1 -FLD1 -;TEST_BEGIN_RECORDING -FDIVR st2, st0 -mov edi, 0 -;TEST_END_RECORDING - - - diff --git a/mc-sema/validator/x86_64/tests/FDIVR_PFrST0.asm b/mc-sema/validator/x86_64/tests/FDIVR_PFrST0.asm deleted file mode 100644 index 92b603292..000000000 --- a/mc-sema/validator/x86_64/tests/FDIVR_PFrST0.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLD1 -FLD1 -;TEST_BEGIN_RECORDING -FDIVRP st2, st0 -mov edi, 0 -;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/FDIVR_ST0Fr.asm b/mc-sema/validator/x86_64/tests/FDIVR_ST0Fr.asm deleted file mode 100644 index 23bd48a85..000000000 --- a/mc-sema/validator/x86_64/tests/FDIVR_ST0Fr.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLD1 -FLD1 -;TEST_BEGIN_RECORDING -FDIVR st0, st2 -mov edi, 0 -;TEST_END_RECORDING - - - diff --git a/mc-sema/validator/x86_64/tests/FFREE.asm b/mc-sema/validator/x86_64/tests/FFREE.asm deleted file mode 100644 index f02a970f0..000000000 --- a/mc-sema/validator/x86_64/tests/FFREE.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -FLDPI -;TEST_BEGIN_RECORDING -FFREE st0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FIADDm16.asm b/mc-sema/validator/x86_64/tests/FIADDm16.asm deleted file mode 100644 index 620e6f04d..000000000 --- a/mc-sema/validator/x86_64/tests/FIADDm16.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - ; set up st0 to be PI - - FLDPI - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-08] - mov word [rdi], 0x0001 - FIADD word [rdi] - mov edi, 0x0 - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/FIADDm32.asm b/mc-sema/validator/x86_64/tests/FIADDm32.asm deleted file mode 100644 index aac02cfe2..000000000 --- a/mc-sema/validator/x86_64/tests/FIADDm32.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - ; set up st0 to be PI - FLDPI - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-08] - mov dword [rdi], 0x10000 - - FIADD dword [rdi] - mov edi, 0x0 - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/FICOMP_16m.asm b/mc-sema/validator/x86_64/tests/FICOMP_16m.asm deleted file mode 100644 index eec5587ed..000000000 --- a/mc-sema/validator/x86_64/tests/FICOMP_16m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLD1 - -;TEST_BEGIN_RECORDING -lea rdi, [rsp-08] -mov word [rdi], 0x0001 -FICOMP word [rdi] -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FICOMP_32m.asm b/mc-sema/validator/x86_64/tests/FICOMP_32m.asm deleted file mode 100644 index f89a3ee49..000000000 --- a/mc-sema/validator/x86_64/tests/FICOMP_32m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLD1 - -;TEST_BEGIN_RECORDING -lea rdi, [rsp-08] -mov dword [rdi], 0x1 -FICOMP dword [rdi] -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FICOM_16m.asm b/mc-sema/validator/x86_64/tests/FICOM_16m.asm deleted file mode 100644 index 29a894997..000000000 --- a/mc-sema/validator/x86_64/tests/FICOM_16m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLD1 - -;TEST_BEGIN_RECORDING -lea rdi, [rsp-08] -mov word [rdi], 0x0001 -FICOM word [rdi] -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FICOM_32m.asm b/mc-sema/validator/x86_64/tests/FICOM_32m.asm deleted file mode 100644 index 17bd7686f..000000000 --- a/mc-sema/validator/x86_64/tests/FICOM_32m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLD1 - -;TEST_BEGIN_RECORDING -lea rdi, [rsp-08] -mov dword [rdi], 0x1 -FICOM dword [rdi] -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FIDIVR_32m.asm b/mc-sema/validator/x86_64/tests/FIDIVR_32m.asm deleted file mode 100644 index 8c40a657d..000000000 --- a/mc-sema/validator/x86_64/tests/FIDIVR_32m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -;TEST_BEGIN_RECORDING -lea rdi, [rsp-08] -mov dword [rdi], 0x00000001 -FIDIVR dword [rdi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FIDIVR_64m.asm b/mc-sema/validator/x86_64/tests/FIDIVR_64m.asm deleted file mode 100644 index 37d851cca..000000000 --- a/mc-sema/validator/x86_64/tests/FIDIVR_64m.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -;TEST_BEGIN_RECORDING -lea rdi, [rsp-08] -mov word [rdi], 0x0001 -FIDIVR word [rdi] -mov edi, 0 -;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86_64/tests/FIDIV_32m.asm b/mc-sema/validator/x86_64/tests/FIDIV_32m.asm deleted file mode 100644 index 36ccdd18f..000000000 --- a/mc-sema/validator/x86_64/tests/FIDIV_32m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -;TEST_BEGIN_RECORDING -lea rdi, [rsp-08] -mov dword [rdi], 0x00000001 -FIDIV dword [rdi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FIDIV_64m.asm b/mc-sema/validator/x86_64/tests/FIDIV_64m.asm deleted file mode 100644 index 6e6088d6a..000000000 --- a/mc-sema/validator/x86_64/tests/FIDIV_64m.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -;TEST_BEGIN_RECORDING -lea rdi, [rsp-08] -mov word [rdi], 0x0001 -FIDIV word [rdi] -mov edi, 0 -;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86_64/tests/FILD_16m.asm b/mc-sema/validator/x86_64/tests/FILD_16m.asm deleted file mode 100644 index e64721697..000000000 --- a/mc-sema/validator/x86_64/tests/FILD_16m.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rdi, [rsp-0x08] -mov word [rdi], 0x0001 -FILD word [rdi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FILD_32m.asm b/mc-sema/validator/x86_64/tests/FILD_32m.asm deleted file mode 100644 index 677c3c77d..000000000 --- a/mc-sema/validator/x86_64/tests/FILD_32m.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING - -lea rdi, [rsp-0x08] -mov dword [rdi], 0x1 -FILD dword [rdi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FILD_64m.asm b/mc-sema/validator/x86_64/tests/FILD_64m.asm deleted file mode 100644 index fd76b1e15..000000000 --- a/mc-sema/validator/x86_64/tests/FILD_64m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING - -lea rdi, [rsp-0x0c] -mov dword [rdi+00], 0x0000 -mov dword [rdi+04], 0x0001 -FILD qword [rdi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FIMUL_m16.asm b/mc-sema/validator/x86_64/tests/FIMUL_m16.asm deleted file mode 100644 index 5d6ee1d44..000000000 --- a/mc-sema/validator/x86_64/tests/FIMUL_m16.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -;TEST_BEGIN_RECORDING -lea rdi, [rsp-0xC] -mov word [rdi], 0x2 -FIMUL word [rdi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FIMUL_m32.asm b/mc-sema/validator/x86_64/tests/FIMUL_m32.asm deleted file mode 100644 index 1e989aecf..000000000 --- a/mc-sema/validator/x86_64/tests/FIMUL_m32.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -;TEST_BEGIN_RECORDING -lea rdi, [rsp-0xC] -mov dword [rdi], 0x2 -FIMUL dword [rdi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FINCSTP.asm b/mc-sema/validator/x86_64/tests/FINCSTP.asm deleted file mode 100644 index 1b4439979..000000000 --- a/mc-sema/validator/x86_64/tests/FINCSTP.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -FLDZ -;TEST_BEGIN_RECORDING -FINCSTP -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FINIT.asm b/mc-sema/validator/x86_64/tests/FINIT.asm deleted file mode 100644 index e8fac4135..000000000 --- a/mc-sema/validator/x86_64/tests/FINIT.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -FLDZ -;TEST_BEGIN_RECORDING -FINIT -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FISTP_16m.asm b/mc-sema/validator/x86_64/tests/FISTP_16m.asm deleted file mode 100644 index ab35bc1b6..000000000 --- a/mc-sema/validator/x86_64/tests/FISTP_16m.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - FLD1 - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0xC] - fistp word [rdi] - mov ax, word [rdi] - mov edi, 0x0 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86_64/tests/FISTP_32m.asm b/mc-sema/validator/x86_64/tests/FISTP_32m.asm deleted file mode 100644 index a541c513d..000000000 --- a/mc-sema/validator/x86_64/tests/FISTP_32m.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - FLD1 - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0xC] - fistp dword [rdi] - mov eax, dword [rdi] - mov edi, 0x0 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86_64/tests/FISTP_64m.asm b/mc-sema/validator/x86_64/tests/FISTP_64m.asm deleted file mode 100644 index cc6be9771..000000000 --- a/mc-sema/validator/x86_64/tests/FISTP_64m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - FLD1 - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0xC] - fistp qword [rdi] - mov eax, dword [rdi+00] - mov ebx, dword [rdi+04] - mov edi, 0x0 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86_64/tests/FISTTP_16m.asm b/mc-sema/validator/x86_64/tests/FISTTP_16m.asm deleted file mode 100644 index c7e81968b..000000000 --- a/mc-sema/validator/x86_64/tests/FISTTP_16m.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - FLDPI - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0xC] - fisttp word [rdi] - mov ax, word [rdi] - mov edi, 0x0 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86_64/tests/FISTTP_32m.asm b/mc-sema/validator/x86_64/tests/FISTTP_32m.asm deleted file mode 100644 index c9b78143e..000000000 --- a/mc-sema/validator/x86_64/tests/FISTTP_32m.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - FLDPI - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0xC] - fisttp dword [rdi] - mov eax, dword [rdi] - mov edi, 0x0 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86_64/tests/FISTTP_64m.asm b/mc-sema/validator/x86_64/tests/FISTTP_64m.asm deleted file mode 100644 index 948825fae..000000000 --- a/mc-sema/validator/x86_64/tests/FISTTP_64m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - FLDPI - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0xC] - fisttp qword [rdi] - mov eax, dword [rdi+00] - mov ebx, dword [rdi+04] - mov edi, 0x0 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86_64/tests/FIST_16m.asm b/mc-sema/validator/x86_64/tests/FIST_16m.asm deleted file mode 100644 index 27857fe35..000000000 --- a/mc-sema/validator/x86_64/tests/FIST_16m.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - FLD1 - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0xC] - fist word [rdi] - mov eax, dword [rdi] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FIST_32m.asm b/mc-sema/validator/x86_64/tests/FIST_32m.asm deleted file mode 100644 index 1fe0acd21..000000000 --- a/mc-sema/validator/x86_64/tests/FIST_32m.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - FLD1 - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0xC] - fist dword [rdi] - mov eax, dword [rdi] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FISUBRm16.asm b/mc-sema/validator/x86_64/tests/FISUBRm16.asm deleted file mode 100644 index 4de1f4b69..000000000 --- a/mc-sema/validator/x86_64/tests/FISUBRm16.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - ; set up st0 to be PI - - FLDPI - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-08] - mov word [rdi], 0x0001 - FISUBR word [rdi] - mov edi, 0x0 - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/FISUBRm32.asm b/mc-sema/validator/x86_64/tests/FISUBRm32.asm deleted file mode 100644 index 9dbe22917..000000000 --- a/mc-sema/validator/x86_64/tests/FISUBRm32.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - ; set up st0 to be PI - FLDPI - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-08] - mov dword [rdi], 0x1 - - FISUBR dword [rdi] - mov edi, 0x0 - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/FISUBm16.asm b/mc-sema/validator/x86_64/tests/FISUBm16.asm deleted file mode 100644 index 6b140444e..000000000 --- a/mc-sema/validator/x86_64/tests/FISUBm16.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - ; set up st0 to be PI - - FLDPI - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-08] - mov word [rdi], 0x0001 - FISUB word [rdi] - mov edi, 0x0 - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/FISUBm32.asm b/mc-sema/validator/x86_64/tests/FISUBm32.asm deleted file mode 100644 index 0185dd0ec..000000000 --- a/mc-sema/validator/x86_64/tests/FISUBm32.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - ; set up st0 to be PI - FLDPI - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-08] - mov dword [rdi], 0x1 - - FISUB dword [rdi] - mov edi, 0x0 - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/FLD1.asm b/mc-sema/validator/x86_64/tests/FLD1.asm deleted file mode 100644 index ac1cf1f8e..000000000 --- a/mc-sema/validator/x86_64/tests/FLD1.asm +++ /dev/null @@ -1,9 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - FLD1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FLDCW.asm b/mc-sema/validator/x86_64/tests/FLDCW.asm deleted file mode 100644 index 3b87410c7..000000000 --- a/mc-sema/validator/x86_64/tests/FLDCW.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-08] - mov dword [rdi], 0 - FSTCW [rdi] - FLDCW [rdi] - mov edi, 0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FLDENV.asm b/mc-sema/validator/x86_64/tests/FLDENV.asm deleted file mode 100644 index 45913deda..000000000 --- a/mc-sema/validator/x86_64/tests/FLDENV.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0x80] - FSTENV [rdi] - FLDENV [rdi] - mov edi, 0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FLDL2E.asm b/mc-sema/validator/x86_64/tests/FLDL2E.asm deleted file mode 100644 index ffbfa0ef2..000000000 --- a/mc-sema/validator/x86_64/tests/FLDL2E.asm +++ /dev/null @@ -1,9 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - FLDL2E - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FLDL2T.asm b/mc-sema/validator/x86_64/tests/FLDL2T.asm deleted file mode 100644 index 6bccd053a..000000000 --- a/mc-sema/validator/x86_64/tests/FLDL2T.asm +++ /dev/null @@ -1,9 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - FLDL2T - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FLDLG2.asm b/mc-sema/validator/x86_64/tests/FLDLG2.asm deleted file mode 100644 index b3ce21a4d..000000000 --- a/mc-sema/validator/x86_64/tests/FLDLG2.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - FLDLG2 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86_64/tests/FLDLN2.asm b/mc-sema/validator/x86_64/tests/FLDLN2.asm deleted file mode 100644 index 3980d21c1..000000000 --- a/mc-sema/validator/x86_64/tests/FLDLN2.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - FLDLN2 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86_64/tests/FLDPI.asm b/mc-sema/validator/x86_64/tests/FLDPI.asm deleted file mode 100644 index 96ab2ccdf..000000000 --- a/mc-sema/validator/x86_64/tests/FLDPI.asm +++ /dev/null @@ -1,9 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - FLDPI - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FLDZ.asm b/mc-sema/validator/x86_64/tests/FLDZ.asm deleted file mode 100644 index 6d2e69ae2..000000000 --- a/mc-sema/validator/x86_64/tests/FLDZ.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - FLDZ - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86_64/tests/FMULP.asm b/mc-sema/validator/x86_64/tests/FMULP.asm deleted file mode 100644 index 7dd3b23fc..000000000 --- a/mc-sema/validator/x86_64/tests/FMULP.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - ; FADDP - FLDPI - FLDPI - ;TEST_BEGIN_RECORDING - fmulp st1, st0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FMULP_rST0.asm b/mc-sema/validator/x86_64/tests/FMULP_rST0.asm deleted file mode 100644 index cc33e5e1c..000000000 --- a/mc-sema/validator/x86_64/tests/FMULP_rST0.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - ; FADDP - FLDPI - FLDPI - FLDPI - ;TEST_BEGIN_RECORDING - fmulp st2, st0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FNCLEX.asm b/mc-sema/validator/x86_64/tests/FNCLEX.asm deleted file mode 100644 index 56b56b413..000000000 --- a/mc-sema/validator/x86_64/tests/FNCLEX.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -FNCLEX -;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86_64/tests/FNINIT.asm b/mc-sema/validator/x86_64/tests/FNINIT.asm deleted file mode 100644 index 6277e8bc3..000000000 --- a/mc-sema/validator/x86_64/tests/FNINIT.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -FLDZ -;TEST_BEGIN_RECORDING -FNINIT -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FNOP.asm b/mc-sema/validator/x86_64/tests/FNOP.asm deleted file mode 100644 index 44e412307..000000000 --- a/mc-sema/validator/x86_64/tests/FNOP.asm +++ /dev/null @@ -1,9 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - FNOP - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FNSAVE.asm b/mc-sema/validator/x86_64/tests/FNSAVE.asm deleted file mode 100644 index 1b58cc22f..000000000 --- a/mc-sema/validator/x86_64/tests/FNSAVE.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rdi, [rsp-0x200] -; save state -FNSAVE [rdi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FNSTCW.asm b/mc-sema/validator/x86_64/tests/FNSTCW.asm deleted file mode 100644 index b699e5a5b..000000000 --- a/mc-sema/validator/x86_64/tests/FNSTCW.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-08] - mov dword [rdi], 0 - FNSTCW [rdi] - mov eax, dword [rdi] - mov edi, 0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FNSTENVm.asm b/mc-sema/validator/x86_64/tests/FNSTENVm.asm deleted file mode 100644 index dd33c8052..000000000 --- a/mc-sema/validator/x86_64/tests/FNSTENVm.asm +++ /dev/null @@ -1,19 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; FSTENVm - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0x200] - fnstenv [rdi] - mov eax, [rdi] ;control word - mov ebx, [rdi+0x4] ;status word - mov ecx, [rdi+0x8] ;tag word - ;mov edx, [edi+0xc] ;EIP - unsupported - ;mov esi, [edi+0x10] ;FOPCODE + FPU EIP Segment - unsupported - ;mov ebp, [edi+0x14] ;data pointer - unsupported - ;mov edi, [edi+0x18] ;data pointer selector - unsupported - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FNSTSWa.asm b/mc-sema/validator/x86_64/tests/FNSTSWa.asm deleted file mode 100644 index f57124b68..000000000 --- a/mc-sema/validator/x86_64/tests/FNSTSWa.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - mov eax, 0 - FNSTSW ax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FNSTSWm.asm b/mc-sema/validator/x86_64/tests/FNSTSWm.asm deleted file mode 100644 index 05b945750..000000000 --- a/mc-sema/validator/x86_64/tests/FNSTSWm.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-08] - mov dword [rdi], 0 - FNSTSW [rdi] - mov eax, dword [rdi] - mov edi, 0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FPATAN.asm b/mc-sema/validator/x86_64/tests/FPATAN.asm deleted file mode 100644 index a76626670..000000000 --- a/mc-sema/validator/x86_64/tests/FPATAN.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -;TEST_BEGIN_RECORDING -lea rdi, [rsp-0xc] -mov word [rdi], 0x4 -FILD word [rdi] -;calc ATAN(pi/4) -FPATAN -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FPREM.asm b/mc-sema/validator/x86_64/tests/FPREM.asm deleted file mode 100644 index c50b948c2..000000000 --- a/mc-sema/validator/x86_64/tests/FPREM.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rdi, [rsp-0xc] -mov word [rdi], 0x2 -FILD word [rdi] -mov word [rdi], 0x5 -FILD word [rdi] -; get remainder of 5/2 -FPREM -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FPREM1.asm b/mc-sema/validator/x86_64/tests/FPREM1.asm deleted file mode 100644 index c7e83dbe7..000000000 --- a/mc-sema/validator/x86_64/tests/FPREM1.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rdi, [rsp-0xc] -mov word [rdi], 0x2 -FILD word [rdi] -mov word [rdi], 0x5 -FILD word [rdi] -; get the IEEE remainder of 5/2 -FPREM1 -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FRSTOR.asm b/mc-sema/validator/x86_64/tests/FRSTOR.asm deleted file mode 100644 index 29ef5c5d6..000000000 --- a/mc-sema/validator/x86_64/tests/FRSTOR.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rdi, [rsp-0x200] -; save state -FNSAVE [rdi] -;reload state -FRSTOR [rdi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FSAVE.asm b/mc-sema/validator/x86_64/tests/FSAVE.asm deleted file mode 100644 index 6c331f833..000000000 --- a/mc-sema/validator/x86_64/tests/FSAVE.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rdi, [rsp-0x800] -; save state -FSAVE [rdi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FSQRT.asm b/mc-sema/validator/x86_64/tests/FSQRT.asm deleted file mode 100644 index d6ac51f8e..000000000 --- a/mc-sema/validator/x86_64/tests/FSQRT.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rdi, [rsp-0xc] -mov word [rdi], 0x4 -fild word [rdi] -mov edi, 0 -FSQRT -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FSTCW.asm b/mc-sema/validator/x86_64/tests/FSTCW.asm deleted file mode 100644 index bc6e06a63..000000000 --- a/mc-sema/validator/x86_64/tests/FSTCW.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-08] - mov dword [rdi], 0 - FSTCW [rdi] - mov eax, dword [rdi] - mov edi, 0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FSTENVm.asm b/mc-sema/validator/x86_64/tests/FSTENVm.asm deleted file mode 100644 index c5041740d..000000000 --- a/mc-sema/validator/x86_64/tests/FSTENVm.asm +++ /dev/null @@ -1,19 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; FSTENVm - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0x200] - fstenv [rdi] - mov eax, [rdi] ;control word - mov ebx, [rdi+0x4] ;status word - mov ecx, [rdi+0x8] ;tag word - ;mov edx, [edi+0xc] ;EIP - unsupported - ;mov esi, [edi+0x10] ;FOPCODE + FPU EIP Segment - unsupported - ;mov ebp, [edi+0x14] ;data pointer - unsupported - ;mov edi, [edi+0x18] ;data pointer selector - unsupported - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FSTSWa.asm b/mc-sema/validator/x86_64/tests/FSTSWa.asm deleted file mode 100644 index c3f6946cb..000000000 --- a/mc-sema/validator/x86_64/tests/FSTSWa.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - mov eax, 0 - FSTSW ax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FSTSWm.asm b/mc-sema/validator/x86_64/tests/FSTSWm.asm deleted file mode 100644 index 5400e47a4..000000000 --- a/mc-sema/validator/x86_64/tests/FSTSWm.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-08] - mov dword [rdi], 0 - FSTSW [rdi] - mov eax, dword [rdi] - mov edi, 0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FSUBP.asm b/mc-sema/validator/x86_64/tests/FSUBP.asm deleted file mode 100644 index c859a122a..000000000 --- a/mc-sema/validator/x86_64/tests/FSUBP.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; FADDP - lea rdi, [rsp-0x10] - mov DWORD [rdi], 0x2168c000 - mov DWORD [rdi+0x4], 0xc90fdaa2 - mov DWORD [rdi+0x8], 0x00004000 - fld TWORD [rdi] - fld TWORD [rdi] - ;TEST_BEGIN_RECORDING - fsubp - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FSUBP_rST0.asm b/mc-sema/validator/x86_64/tests/FSUBP_rST0.asm deleted file mode 100644 index c568cf529..000000000 --- a/mc-sema/validator/x86_64/tests/FSUBP_rST0.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; FADDP - FLDPI - FLDPI - FLDPI - ;TEST_BEGIN_RECORDING - fsubp st2, st0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FSUBRP.asm b/mc-sema/validator/x86_64/tests/FSUBRP.asm deleted file mode 100644 index 502d4832e..000000000 --- a/mc-sema/validator/x86_64/tests/FSUBRP.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; FADDP - lea rdi, [rsp-0x10] - mov DWORD [rdi], 0x2168c000 - mov DWORD [rdi+0x4], 0xc90fdaa2 - mov DWORD [rdi+0x8], 0x00004000 - fld TWORD [rdi] - fld TWORD [rdi] - ;TEST_BEGIN_RECORDING - fsubrp - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FSUBRP_rST0.asm b/mc-sema/validator/x86_64/tests/FSUBRP_rST0.asm deleted file mode 100644 index a91a21b44..000000000 --- a/mc-sema/validator/x86_64/tests/FSUBRP_rST0.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; FADDP - FLDPI - FLDPI - FLDPI - ;TEST_BEGIN_RECORDING - fsubrp st2, st0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FTST.asm b/mc-sema/validator/x86_64/tests/FTST.asm deleted file mode 100644 index 12c8b04bb..000000000 --- a/mc-sema/validator/x86_64/tests/FTST.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - - FLD1 - ;TEST_BEGIN_RECORDING - FTST - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FUCOM.asm b/mc-sema/validator/x86_64/tests/FUCOM.asm deleted file mode 100644 index c2c93a8d9..000000000 --- a/mc-sema/validator/x86_64/tests/FUCOM.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLD1 -FLD1 - -;TEST_BEGIN_RECORDING -FUCOM -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FUCOMIP_STFr.asm b/mc-sema/validator/x86_64/tests/FUCOMIP_STFr.asm deleted file mode 100644 index 6e6e4330a..000000000 --- a/mc-sema/validator/x86_64/tests/FUCOMIP_STFr.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLDPI - -;TEST_BEGIN_RECORDING -FUCOMIP st0, st1 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FUCOMI_STFr.asm b/mc-sema/validator/x86_64/tests/FUCOMI_STFr.asm deleted file mode 100644 index da2dce0f5..000000000 --- a/mc-sema/validator/x86_64/tests/FUCOMI_STFr.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -FLDPI - -;TEST_BEGIN_RECORDING -FUCOMI st0, st1 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FUCOMP.asm b/mc-sema/validator/x86_64/tests/FUCOMP.asm deleted file mode 100644 index 3dac73d08..000000000 --- a/mc-sema/validator/x86_64/tests/FUCOMP.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLD1 -FLD1 - -;TEST_BEGIN_RECORDING -FUCOMP -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FUCOMPP.asm b/mc-sema/validator/x86_64/tests/FUCOMPP.asm deleted file mode 100644 index 16c91b3eb..000000000 --- a/mc-sema/validator/x86_64/tests/FUCOMPP.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLD1 -FLD1 -FLD1 - -;TEST_BEGIN_RECORDING -FUCOMPP -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FUCOMP_STFr.asm b/mc-sema/validator/x86_64/tests/FUCOMP_STFr.asm deleted file mode 100644 index 8e700839d..000000000 --- a/mc-sema/validator/x86_64/tests/FUCOMP_STFr.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLD1 -FLD1 -FLD1 - -;TEST_BEGIN_RECORDING -FUCOMP st2 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FUCOM_STFr.asm b/mc-sema/validator/x86_64/tests/FUCOM_STFr.asm deleted file mode 100644 index ec01f5516..000000000 --- a/mc-sema/validator/x86_64/tests/FUCOM_STFr.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLD1 -FLD1 -FLD1 - -;TEST_BEGIN_RECORDING -FUCOM st2 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FXAM.asm b/mc-sema/validator/x86_64/tests/FXAM.asm deleted file mode 100644 index df0e6a499..000000000 --- a/mc-sema/validator/x86_64/tests/FXAM.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -FLDZ - -;TEST_BEGIN_RECORDING -FXAM -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FXRSTOR.asm b/mc-sema/validator/x86_64/tests/FXRSTOR.asm deleted file mode 100644 index b8967cdd3..000000000 --- a/mc-sema/validator/x86_64/tests/FXRSTOR.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rdi, [rsp-0x300] -and rdi, 0xFFFFFFFFFFFFFFF0 -FXSAVE [rdi] -FXRSTOR [rdi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FXSAVE.asm b/mc-sema/validator/x86_64/tests/FXSAVE.asm deleted file mode 100644 index 9ea62befb..000000000 --- a/mc-sema/validator/x86_64/tests/FXSAVE.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rdi, [rsp-0x300] -and rdi, 0xFFFFFFFFFFFFFFF0 -FXSAVE [rdi] -; a simple sanity check that something was written -mov eax, [rdi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FXTRACT.asm b/mc-sema/validator/x86_64/tests/FXTRACT.asm deleted file mode 100644 index 6a422f2ef..000000000 --- a/mc-sema/validator/x86_64/tests/FXTRACT.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -FLDPI - -;TEST_BEGIN_RECORDING -FXTRACT -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FYL2X.asm b/mc-sema/validator/x86_64/tests/FYL2X.asm deleted file mode 100644 index 973077c73..000000000 --- a/mc-sema/validator/x86_64/tests/FYL2X.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE -;TEST_FILE_META_END - -lea rdi, [rsp-0xc] -mov word [rdi], 0x10 -FILD word [rdi] -FILD word [rdi] - -;TEST_BEGIN_RECORDING -FYL2X ;st1 = 16 * log2(16) -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/FYL2XP1.asm b/mc-sema/validator/x86_64/tests/FYL2XP1.asm deleted file mode 100644 index eebf694ad..000000000 --- a/mc-sema/validator/x86_64/tests/FYL2XP1.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE -;TEST_FILE_META_END - -FLD1 -FLDZ -;TEST_BEGIN_RECORDING -FYL2XP1 ;st1 = 1.0 * log2(0 + 1.0) -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/IDIV16r.asm b/mc-sema/validator/x86_64/tests/IDIV16r.asm deleted file mode 100644 index a6717e5e5..000000000 --- a/mc-sema/validator/x86_64/tests/IDIV16r.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_CF|FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IDIV16r - mov ax, 0xaa - mov bx, 0x4 - mov dx, 0x1 - ;TEST_BEGIN_RECORDING - idiv bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/IDIV32r.asm b/mc-sema/validator/x86_64/tests/IDIV32r.asm deleted file mode 100644 index c3803e448..000000000 --- a/mc-sema/validator/x86_64/tests/IDIV32r.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_CF|FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IDIV32r - mov eax, 0x4444 - mov ebx, 0x4 - mov edx, 0x1 - ;TEST_BEGIN_RECORDING - idiv ebx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/IDIV64r.asm b/mc-sema/validator/x86_64/tests/IDIV64r.asm deleted file mode 100644 index 3d15dad2d..000000000 --- a/mc-sema/validator/x86_64/tests/IDIV64r.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_CF|FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IDIV32r - mov rax, 0x4444 - mov rbx, 0x4 - mov rdx, 0x1 - ;TEST_BEGIN_RECORDING - idiv rbx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/IDIV8r.asm b/mc-sema/validator/x86_64/tests/IDIV8r.asm deleted file mode 100644 index 46d24ddfd..000000000 --- a/mc-sema/validator/x86_64/tests/IDIV8r.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_CF|FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IDIV8r - mov ax, 0xa - mov bl, 0x4 - ;TEST_BEGIN_RECORDING - idiv bl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ILD_F16m.asm b/mc-sema/validator/x86_64/tests/ILD_F16m.asm deleted file mode 100644 index acd1e3bc0..000000000 --- a/mc-sema/validator/x86_64/tests/ILD_F16m.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ILD_F16m - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0x4] - mov WORD [rdi], 0x0001 - fild WORD [rdi] - mov rdi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ILD_F32m.asm b/mc-sema/validator/x86_64/tests/ILD_F32m.asm deleted file mode 100644 index 76c44fec0..000000000 --- a/mc-sema/validator/x86_64/tests/ILD_F32m.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ILD_F32m - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0x4] - mov DWORD [rdi], 0x10001 - fild DWORD [rdi] - mov rdi, 0x0 - ;TEST_END_RECORDING - - diff --git a/mc-sema/validator/x86_64/tests/ILD_F64m.asm b/mc-sema/validator/x86_64/tests/ILD_F64m.asm deleted file mode 100644 index 5d9c6c9b4..000000000 --- a/mc-sema/validator/x86_64/tests/ILD_F64m.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ILD_F64m - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0x10] - mov DWORD [rdi], 0x00001 - mov DWORD [rdi+4], 0x10001 - fild QWORD [rdi] - mov rdi, 0x0 - ;TEST_END_RECORDING - - - diff --git a/mc-sema/validator/x86_64/tests/IMUL16r.asm b/mc-sema/validator/x86_64/tests/IMUL16r.asm deleted file mode 100644 index 3295ad072..000000000 --- a/mc-sema/validator/x86_64/tests/IMUL16r.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IMUL16r - mov ax, 0x32 - mov bx, 0xb - ;TEST_BEGIN_RECORDING - imul bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/IMUL16rr.asm b/mc-sema/validator/x86_64/tests/IMUL16rr.asm deleted file mode 100644 index c53f35861..000000000 --- a/mc-sema/validator/x86_64/tests/IMUL16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IMUL16rr - mov bx, 0x34 - mov cx, 0x45 - ;TEST_BEGIN_RECORDING - imul bx, cx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/IMUL16rri.asm b/mc-sema/validator/x86_64/tests/IMUL16rri.asm deleted file mode 100644 index fe7d1b672..000000000 --- a/mc-sema/validator/x86_64/tests/IMUL16rri.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IMUL16rri - mov bx, 0x3 - mov cx, 0x4 - ;TEST_BEGIN_RECORDING - imul bx, cx, 0xbbb - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/IMUL32r.asm b/mc-sema/validator/x86_64/tests/IMUL32r.asm deleted file mode 100644 index 998007835..000000000 --- a/mc-sema/validator/x86_64/tests/IMUL32r.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IMUL32r - mov eax, 0x323 - mov ebx, 0xbbb - ;TEST_BEGIN_RECORDING - imul ebx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/IMUL32rr.asm b/mc-sema/validator/x86_64/tests/IMUL32rr.asm deleted file mode 100644 index 4b2763899..000000000 --- a/mc-sema/validator/x86_64/tests/IMUL32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IMUL32rr - mov ebx, 0x20000 - mov ecx, 0x34 - ;TEST_BEGIN_RECORDING - imul ebx, ecx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/IMUL32rri.asm b/mc-sema/validator/x86_64/tests/IMUL32rri.asm deleted file mode 100644 index 2f739b67b..000000000 --- a/mc-sema/validator/x86_64/tests/IMUL32rri.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IMUL32rri - mov ebx, 0x20000 - mov ecx, 0x34 - ;TEST_BEGIN_RECORDING - imul ebx, ecx, 0xbbbbb - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/IMUL64m.asm b/mc-sema/validator/x86_64/tests/IMUL64m.asm deleted file mode 100644 index c1309a7bc..000000000 --- a/mc-sema/validator/x86_64/tests/IMUL64m.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IMUL64m - mov rax, 0x323 - mov rbx, 0xbbbbbbbb - push rbx - ;TEST_BEGIN_RECORDING - imul rax, [rsp] - ;TEST_END_RECORDING - pop rbx - diff --git a/mc-sema/validator/x86_64/tests/IMUL64r.asm b/mc-sema/validator/x86_64/tests/IMUL64r.asm deleted file mode 100644 index 95eb694d9..000000000 --- a/mc-sema/validator/x86_64/tests/IMUL64r.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IMUL64r - mov rax, 0x323 - mov rbx, 0xbbbbbbbb - ;TEST_BEGIN_RECORDING - imul ebx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/IMUL64rr.asm b/mc-sema/validator/x86_64/tests/IMUL64rr.asm deleted file mode 100644 index 49f377717..000000000 --- a/mc-sema/validator/x86_64/tests/IMUL64rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IMUL64rr - mov ebx, 0x20000 - mov ecx, 0x34 - ;TEST_BEGIN_RECORDING - imul ebx, ecx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/IMUL64rri32.asm b/mc-sema/validator/x86_64/tests/IMUL64rri32.asm deleted file mode 100644 index 400239c22..000000000 --- a/mc-sema/validator/x86_64/tests/IMUL64rri32.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IMUL64rri32 - mov ebx, 0x20000 - mov ecx, 0x34343434 - ;TEST_BEGIN_RECORDING - imul ebx, ecx, 0xbbbbb - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/IMUL64rri8.asm b/mc-sema/validator/x86_64/tests/IMUL64rri8.asm deleted file mode 100644 index 4c759292a..000000000 --- a/mc-sema/validator/x86_64/tests/IMUL64rri8.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IMUL64rri8 - mov ebx, 0x20000 - mov ecx, 0x34343434 - ;TEST_BEGIN_RECORDING - imul ebx, ecx, 0xb - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/IMUL8r.asm b/mc-sema/validator/x86_64/tests/IMUL8r.asm deleted file mode 100644 index 77b57d187..000000000 --- a/mc-sema/validator/x86_64/tests/IMUL8r.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF -;TEST_FILE_META_END - ; IMUL8r - mov al, 0x10 - mov cl, 0xe - ;TEST_BEGIN_RECORDING - imul cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/INC16r.asm b/mc-sema/validator/x86_64/tests/INC16r.asm deleted file mode 100644 index e06e70101..000000000 --- a/mc-sema/validator/x86_64/tests/INC16r.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; INC16r - xor dx, dx - mov dx, 0x30 - ;TEST_BEGIN_RECORDING - inc dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/INC32r.asm b/mc-sema/validator/x86_64/tests/INC32r.asm deleted file mode 100644 index eab32dd06..000000000 --- a/mc-sema/validator/x86_64/tests/INC32r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; INC32r - mov eax, 0x31 - ;TEST_BEGIN_RECORDING - inc eax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/INC64r.asm b/mc-sema/validator/x86_64/tests/INC64r.asm deleted file mode 100644 index b7a89f60d..000000000 --- a/mc-sema/validator/x86_64/tests/INC64r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; INC64r - mov rax, 0x31 - ;TEST_BEGIN_RECORDING - inc rax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/INC8r.asm b/mc-sema/validator/x86_64/tests/INC8r.asm deleted file mode 100644 index 5c19a5700..000000000 --- a/mc-sema/validator/x86_64/tests/INC8r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; INC8r - mov cl, 0x32 - ;TEST_BEGIN_RECORDING - inc cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/LAHF.asm b/mc-sema/validator/x86_64/tests/LAHF.asm deleted file mode 100644 index 83ae229cf..000000000 --- a/mc-sema/validator/x86_64/tests/LAHF.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; LAHF - ;TEST_BEGIN_RECORDING - lahf - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/LD_F0.asm b/mc-sema/validator/x86_64/tests/LD_F0.asm deleted file mode 100644 index a7f0dc13e..000000000 --- a/mc-sema/validator/x86_64/tests/LD_F0.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; LD_F0 - ;TEST_BEGIN_RECORDING - fldz - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/LD_F1.asm b/mc-sema/validator/x86_64/tests/LD_F1.asm deleted file mode 100644 index f90179b15..000000000 --- a/mc-sema/validator/x86_64/tests/LD_F1.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; LD_F0 - ;TEST_BEGIN_RECORDING - fld1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/LD_F32m.asm b/mc-sema/validator/x86_64/tests/LD_F32m.asm deleted file mode 100644 index bdd4278ca..000000000 --- a/mc-sema/validator/x86_64/tests/LD_F32m.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; LD_F32m - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0x4] - mov DWORD [rdi], 0x40490fdb - fld DWORD [rdi] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/LD_F80m.asm b/mc-sema/validator/x86_64/tests/LD_F80m.asm deleted file mode 100644 index e75489f43..000000000 --- a/mc-sema/validator/x86_64/tests/LD_F80m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; LD_F80m - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0xc] - mov DWORD [rdi], 0x2168c000 - mov DWORD [rdi+0x4], 0xc90fdaa2 - mov DWORD [rdi+0x8], 0x00004000 - fld TWORD [rdi] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/LD_Frr.asm b/mc-sema/validator/x86_64/tests/LD_Frr.asm deleted file mode 100644 index 2c767ff9e..000000000 --- a/mc-sema/validator/x86_64/tests/LD_Frr.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; LD_Frr - FLDPI - FLD1 - FLDL2E - ;TEST_BEGIN_RECORDING - fld st1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/LEA16r.asm b/mc-sema/validator/x86_64/tests/LEA16r.asm deleted file mode 100644 index a66cff687..000000000 --- a/mc-sema/validator/x86_64/tests/LEA16r.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; LEA16r - mov cx, 0x15 - mov edx, 0x8 - ;TEST_BEGIN_RECORDING - lea cx, [edx-0x444] - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/LEA32r.asm b/mc-sema/validator/x86_64/tests/LEA32r.asm deleted file mode 100644 index 61737eb03..000000000 --- a/mc-sema/validator/x86_64/tests/LEA32r.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; LEA32r - mov ecx, 0x15 - mov edx, 0x8 - ;TEST_BEGIN_RECORDING - lea ecx, [edx-0x444] - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/LEAVE.asm b/mc-sema/validator/x86_64/tests/LEAVE.asm deleted file mode 100644 index 221c1d13a..000000000 --- a/mc-sema/validator/x86_64/tests/LEAVE.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; LEAVE - push rbp - mov rbp, rsp - ;TEST_BEGIN_RECORDING - leave - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/LOOP.asm b/mc-sema/validator/x86_64/tests/LOOP.asm deleted file mode 100644 index 399ce3e43..000000000 --- a/mc-sema/validator/x86_64/tests/LOOP.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; LOOP - mov ecx, 0x18 - xor eax, eax - inc eax - ;TEST_BEGIN_RECORDING -again_1: - add eax, eax - loop again_1 - inc eax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/Lea32R1.asm b/mc-sema/validator/x86_64/tests/Lea32R1.asm deleted file mode 100644 index f0f3dbb3a..000000000 --- a/mc-sema/validator/x86_64/tests/Lea32R1.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Lea32R1 - mov eax, 0x21 - mov edi, 0x8 - ;TEST_BEGIN_RECORDING - lea eax, [eax+edi+0x1] - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/Lea32R2.asm b/mc-sema/validator/x86_64/tests/Lea32R2.asm deleted file mode 100644 index 6366038e6..000000000 --- a/mc-sema/validator/x86_64/tests/Lea32R2.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Lea32R2 - mov eax, 0x515 - mov edx, 0x30 - ;TEST_BEGIN_RECORDING - lea ecx, [eax+edx*0x4] - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/MAXPDrm b/mc-sema/validator/x86_64/tests/MAXPDrm deleted file mode 100644 index 5d135b0c6..000000000 Binary files a/mc-sema/validator/x86_64/tests/MAXPDrm and /dev/null differ diff --git a/mc-sema/validator/x86_64/tests/MAXPDrm.asm b/mc-sema/validator/x86_64/tests/MAXPDrm.asm deleted file mode 100644 index 94e1a9916..000000000 --- a/mc-sema/validator/x86_64/tests/MAXPDrm.asm +++ /dev/null @@ -1,30 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -; load a 128 bit value into xmm0 -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] - -lea rcx, [rcx+16] -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e - -maxpd xmm0, [rcx] -mov rcx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/MAXPDrr.asm b/mc-sema/validator/x86_64/tests/MAXPDrr.asm deleted file mode 100644 index d6a320a39..000000000 --- a/mc-sema/validator/x86_64/tests/MAXPDrr.asm +++ /dev/null @@ -1,32 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -; load a 128 bit value into xmm0 -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] - -lea rcx, [rcx+16] -; load a 128 bit value into xmm1 -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e -movaps xmm1, [rcx] - -;TEST_BEGIN_RECORDING -maxpd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/MAXPSrm.asm b/mc-sema/validator/x86_64/tests/MAXPSrm.asm deleted file mode 100644 index 5c935aa85..000000000 --- a/mc-sema/validator/x86_64/tests/MAXPSrm.asm +++ /dev/null @@ -1,30 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -; load a 128 bit value into xmm0 -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] - -lea rcx, [rcx+16] -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e - -maxps xmm0, [rcx] -mov rcx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/MAXPSrr.asm b/mc-sema/validator/x86_64/tests/MAXPSrr.asm deleted file mode 100644 index 66a791f52..000000000 --- a/mc-sema/validator/x86_64/tests/MAXPSrr.asm +++ /dev/null @@ -1,32 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -; load a 128 bit value into xmm0 -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] - -lea rcx, [rcx+16] -; load a 128 bit value into xmm1 -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e -movaps xmm1, [rcx] - -;TEST_BEGIN_RECORDING -maxps xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/MINPDrm.asm b/mc-sema/validator/x86_64/tests/MINPDrm.asm deleted file mode 100644 index c5aecf140..000000000 --- a/mc-sema/validator/x86_64/tests/MINPDrm.asm +++ /dev/null @@ -1,30 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -; load a 128 bit value into xmm0 -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] - -lea rcx, [rcx+16] -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e - -minpd xmm0, [rcx] -mov rcx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/MINPDrr.asm b/mc-sema/validator/x86_64/tests/MINPDrr.asm deleted file mode 100644 index a6218d36a..000000000 --- a/mc-sema/validator/x86_64/tests/MINPDrr.asm +++ /dev/null @@ -1,32 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -; load a 128 bit value into xmm0 -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] - -lea rcx, [rcx+16] -; load a 128 bit value into xmm1 -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e -movaps xmm1, [rcx] - -;TEST_BEGIN_RECORDING -minpd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/MINPSrm.asm b/mc-sema/validator/x86_64/tests/MINPSrm.asm deleted file mode 100644 index f526b69de..000000000 --- a/mc-sema/validator/x86_64/tests/MINPSrm.asm +++ /dev/null @@ -1,30 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -; load a 128 bit value into xmm0 -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] - -lea rcx, [rcx+16] -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e - -minps xmm0, [rcx] -mov rcx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/MINPSrr.asm b/mc-sema/validator/x86_64/tests/MINPSrr.asm deleted file mode 100644 index 0cfae7a91..000000000 --- a/mc-sema/validator/x86_64/tests/MINPSrr.asm +++ /dev/null @@ -1,32 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -; load a 128 bit value into xmm0 -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] - -lea rcx, [rcx+16] -; load a 128 bit value into xmm1 -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e -movaps xmm1, [rcx] - -;TEST_BEGIN_RECORDING -minps xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/MOV16ri.asm b/mc-sema/validator/x86_64/tests/MOV16ri.asm deleted file mode 100644 index 1161069a2..000000000 --- a/mc-sema/validator/x86_64/tests/MOV16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; MOV16ri - mov bx, 0x24 - ;TEST_BEGIN_RECORDING - mov bx, 0xffcc - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/MOV16rr.asm b/mc-sema/validator/x86_64/tests/MOV16rr.asm deleted file mode 100644 index 9624b7315..000000000 --- a/mc-sema/validator/x86_64/tests/MOV16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; MOV16rr - mov ch, 0x2 - mov dh, 0x3 - ;TEST_BEGIN_RECORDING - mov ch, dh - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/MOV32ri.asm b/mc-sema/validator/x86_64/tests/MOV32ri.asm deleted file mode 100644 index 39aeb09d9..000000000 --- a/mc-sema/validator/x86_64/tests/MOV32ri.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Mov32RI - ;TEST_BEGIN_RECORDING - mov eax, 0x18111 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/MOV32rr.asm b/mc-sema/validator/x86_64/tests/MOV32rr.asm deleted file mode 100644 index 1f21e7935..000000000 --- a/mc-sema/validator/x86_64/tests/MOV32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Mov32RR - mov eax, 0x8 - mov ecx, 0x12 - ;TEST_BEGIN_RECORDING - mov ecx, eax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/MOV8ri.asm b/mc-sema/validator/x86_64/tests/MOV8ri.asm deleted file mode 100644 index a6bed2eb2..000000000 --- a/mc-sema/validator/x86_64/tests/MOV8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; MOV8ri - mov ah, 0x2 - ;TEST_BEGIN_RECORDING - mov ah, 0x3 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/MOV8rr.asm b/mc-sema/validator/x86_64/tests/MOV8rr.asm deleted file mode 100644 index 429ec5c35..000000000 --- a/mc-sema/validator/x86_64/tests/MOV8rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; MOV8rr - mov ch, 0x2 - mov dh, 0x3 - ;TEST_BEGIN_RECORDING - mov ch, dh - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/MOVDI2PDIrm.asm b/mc-sema/validator/x86_64/tests/MOVDI2PDIrm.asm deleted file mode 100644 index 8d7a4cdc4..000000000 --- a/mc-sema/validator/x86_64/tests/MOVDI2PDIrm.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -mov eax, 2 - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-4] -mov [rcx], eax -movd xmm0, [rcx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/MOVDI2PDIrr.asm b/mc-sema/validator/x86_64/tests/MOVDI2PDIrr.asm deleted file mode 100644 index 7d5f95352..000000000 --- a/mc-sema/validator/x86_64/tests/MOVDI2PDIrr.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 - -;TEST_BEGIN_RECORDING -MOVD xmm0, ecx -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/MOVHPDmr.asm b/mc-sema/validator/x86_64/tests/MOVHPDmr.asm deleted file mode 100644 index 004c9d425..000000000 --- a/mc-sema/validator/x86_64/tests/MOVHPDmr.asm +++ /dev/null @@ -1,28 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -; load a 128 bit value into xmm0 -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] - -lea rcx, [rcx+16] - -movhpd [rcx], xmm0 - -movhpd xmm1, [rcx] -mov rcx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/MOVHPDrm.asm b/mc-sema/validator/x86_64/tests/MOVHPDrm.asm deleted file mode 100644 index 70371101d..000000000 --- a/mc-sema/validator/x86_64/tests/MOVHPDrm.asm +++ /dev/null @@ -1,20 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -; load a 64 bit value into mem -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 - -movhpd xmm0, [rcx] -mov rcx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/MOVPDI2DImr.asm b/mc-sema/validator/x86_64/tests/MOVPDI2DImr.asm deleted file mode 100644 index 57b88e758..000000000 --- a/mc-sema/validator/x86_64/tests/MOVPDI2DImr.asm +++ /dev/null @@ -1,18 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -mov ecx, 2 -MOVD xmm0, ecx -mov ecx, 0 - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-4] -movd [rcx], xmm0 -mov eax, [rcx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/MOVPDI2DIrr.asm b/mc-sema/validator/x86_64/tests/MOVPDI2DIrr.asm deleted file mode 100644 index d8000c208..000000000 --- a/mc-sema/validator/x86_64/tests/MOVPDI2DIrr.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 -MOVD xmm0, ecx -mov ecx, 0 - -;TEST_BEGIN_RECORDING -MOVD eax, xmm0 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/MOVSDmr.asm b/mc-sema/validator/x86_64/tests/MOVSDmr.asm deleted file mode 100644 index 67db5e4db..000000000 --- a/mc-sema/validator/x86_64/tests/MOVSDmr.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 0xbadf00d to a double precision float and store in xmm0 -mov ecx, 0xbadf00d -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -; load badf00d (in double precision float form) -lea rcx, [rsp-8] -movsd [rcx], xmm0 - -mov eax, [rcx+0] -mov ebx, [rcx+4] -mov rcx, 0 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/MOVSDrm.asm b/mc-sema/validator/x86_64/tests/MOVSDrm.asm deleted file mode 100644 index bc205560b..000000000 --- a/mc-sema/validator/x86_64/tests/MOVSDrm.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 1 to a double precision float and store in xmm0 -mov ecx, 1 -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -; load 2.5 (in double precision float form) -lea rcx, [rsp-8] -mov DWORD [rcx], 0 -mov DWORD [rcx+4], 0x40040000 - -movsd xmm0, [rcx] -mov rcx, [rcx] -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/MOVSDrr.asm b/mc-sema/validator/x86_64/tests/MOVSDrr.asm deleted file mode 100644 index 18c508cc0..000000000 --- a/mc-sema/validator/x86_64/tests/MOVSDrr.asm +++ /dev/null @@ -1,20 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 1 to a double precision float and store in xmm0 -mov ecx, 0 -cvtsi2sd xmm0, ecx - -; convert 2 to a double precision float and store in xmm1 -mov ecx, 2 -cvtsi2sd xmm1, ecx - -;TEST_BEGIN_RECORDING -movsd xmm0, xmm1 -;TEST_END_RECORDING -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/MOVSSmr.asm b/mc-sema/validator/x86_64/tests/MOVSSmr.asm deleted file mode 100644 index b14663c74..000000000 --- a/mc-sema/validator/x86_64/tests/MOVSSmr.asm +++ /dev/null @@ -1,23 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 1 to a single precision float and store in xmm0 -mov ecx, 1 -cvtsi2ss xmm0, ecx - -;TEST_BEGIN_RECORDING -; load 1 in single floating point form -lea rcx, [rsp-8] -movss [rcx], xmm0 - -; value should appear in eax for testing -mov rax, [rcx] -mov ecx, 0 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2ss xmm0, ecx -cvtsi2ss xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/MOVSSrm.asm b/mc-sema/validator/x86_64/tests/MOVSSrm.asm deleted file mode 100644 index d397e9fbc..000000000 --- a/mc-sema/validator/x86_64/tests/MOVSSrm.asm +++ /dev/null @@ -1,26 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 1 to a single precision float and store in xmm0 -mov ecx, 1 -cvtsi2ss xmm0, ecx -; convert 0 to a single precision float and store in xmm1 -mov ecx, 0 -cvtsi2ss xmm1, ecx - -;TEST_BEGIN_RECORDING -; load 1 in single floating point form -lea rcx, [rsp-8] -movss [rcx], xmm0 - -; store 1 in xmm1 -movss xmm1, [rcx] -mov ecx, 0 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2ss xmm0, ecx -cvtsi2ss xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/MOVSSrr.asm b/mc-sema/validator/x86_64/tests/MOVSSrr.asm deleted file mode 100644 index bdd33c5a8..000000000 --- a/mc-sema/validator/x86_64/tests/MOVSSrr.asm +++ /dev/null @@ -1,27 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 1 to a single precision float and store in xmm0 -mov ecx, 0 -cvtsi2ss xmm0, ecx -mov ecx, 0xFFFFFFFF -cvtsi2ss xmm2, ecx -mov ecx, 0 -cvtsi2ss xmm3, ecx - -; convert 2 to a single precision float and store in xmm1 -mov ecx, 2 -cvtsi2ss xmm1, ecx - -;TEST_BEGIN_RECORDING -movss xmm0, xmm1 -movss xmm2, xmm1 -movss xmm3, xmm1 -;TEST_END_RECORDING -xor ecx, ecx -cvtsi2ss xmm0, ecx -cvtsi2ss xmm1, ecx -cvtsi2ss xmm3, ecx diff --git a/mc-sema/validator/x86_64/tests/MOVSX16rr8.asm b/mc-sema/validator/x86_64/tests/MOVSX16rr8.asm deleted file mode 100644 index 9d4eb6500..000000000 --- a/mc-sema/validator/x86_64/tests/MOVSX16rr8.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; MOVSX16rr8 - mov bx, 0x3000 - mov bl, 0x35 - ;TEST_BEGIN_RECORDING - movsx bx, bl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/MOVSX32rr16.asm b/mc-sema/validator/x86_64/tests/MOVSX32rr16.asm deleted file mode 100644 index ed0e2f8a3..000000000 --- a/mc-sema/validator/x86_64/tests/MOVSX32rr16.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; MOVSX32rr16 - mov eax, 0x55555 - mov ax, 0x3333 - ;TEST_BEGIN_RECORDING - movsx eax, ax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/MOVSX32rr8.asm b/mc-sema/validator/x86_64/tests/MOVSX32rr8.asm deleted file mode 100644 index 10189150a..000000000 --- a/mc-sema/validator/x86_64/tests/MOVSX32rr8.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; MOVSX32rr8 - mov eax, 0x55555 - mov ah, 0x3 - ;TEST_BEGIN_RECORDING - movsx eax, ah - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/MOVUPDmr.asm b/mc-sema/validator/x86_64/tests/MOVUPDmr.asm deleted file mode 100644 index 002f45a10..000000000 --- a/mc-sema/validator/x86_64/tests/MOVUPDmr.asm +++ /dev/null @@ -1,28 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -; load a 128 bit value into xmm0 -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] - -lea rcx, [rcx+16] - -movupd [rcx], xmm0 - -movupd xmm1, [rcx] -mov rcx, 0 -;TEST_END_RECORDING - -xorps xmm1, xmm1 -xorps xmm0, xmm0 diff --git a/mc-sema/validator/x86_64/tests/MOVUPDrm.asm b/mc-sema/validator/x86_64/tests/MOVUPDrm.asm deleted file mode 100644 index c1fac1384..000000000 --- a/mc-sema/validator/x86_64/tests/MOVUPDrm.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -; load a 128 bit value into mem -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 - -movupd xmm0, [rcx] -mov rcx, 0 -;TEST_END_RECORDING - -xorps xmm0, xmm0 diff --git a/mc-sema/validator/x86_64/tests/MOVZX16rr8.asm b/mc-sema/validator/x86_64/tests/MOVZX16rr8.asm deleted file mode 100644 index bd830fc58..000000000 --- a/mc-sema/validator/x86_64/tests/MOVZX16rr8.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; MOVZX16rr8 - mov bx, 0x2 - mov bl, 0x3 - ;TEST_BEGIN_RECORDING - movzx bx, bl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/MOVZX32rr16.asm b/mc-sema/validator/x86_64/tests/MOVZX32rr16.asm deleted file mode 100644 index 33989d0d4..000000000 --- a/mc-sema/validator/x86_64/tests/MOVZX32rr16.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; MovZx32RR16 - mov eax, 0x18 - mov ebx, 0 - ;TEST_BEGIN_RECORDING - movzx ebx, ax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/MOVZX32rr8.asm b/mc-sema/validator/x86_64/tests/MOVZX32rr8.asm deleted file mode 100644 index f37ddf645..000000000 --- a/mc-sema/validator/x86_64/tests/MOVZX32rr8.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; MOVZX32rr8 - mov edx, 0x12 - mov dh, 0x3 - ;TEST_BEGIN_RECORDING - movzx edx, dh - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/MULPDrm.asm b/mc-sema/validator/x86_64/tests/MULPDrm.asm deleted file mode 100644 index 26d293d07..000000000 --- a/mc-sema/validator/x86_64/tests/MULPDrm.asm +++ /dev/null @@ -1,23 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_PF -;TEST_FILE_META_END - -; convert 10 to a double precision float and store in xmm0 -mov ecx, 10 -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -movsd [rcx], xmm0 -mov DWORD [rcx+0x08], 0x0 -mov DWORD [rcx+0x0C], 0x0 - -mulpd xmm0, [rcx] -mov rcx,0 -;TEST_END_RECORDING - -xorps xmm0, xmm0 diff --git a/mc-sema/validator/x86_64/tests/MULPDrr.asm b/mc-sema/validator/x86_64/tests/MULPDrr.asm deleted file mode 100644 index 24fe03e2e..000000000 --- a/mc-sema/validator/x86_64/tests/MULPDrr.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 3 to a double precision float and store in xmm0 -mov ecx, 3 -cvtsi2sd xmm0, ecx - -; convert 7 to a double precision float and store in xmm1 -mov ecx, 7 -cvtsi2sd xmm1, ecx - -;TEST_BEGIN_RECORDING -mulpd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/MULPSrm.asm b/mc-sema/validator/x86_64/tests/MULPSrm.asm deleted file mode 100644 index 55fe9b6e1..000000000 --- a/mc-sema/validator/x86_64/tests/MULPSrm.asm +++ /dev/null @@ -1,29 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -; load a 128 bit value into xmm0 -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] - -lea rcx, [rcx+16] -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e - -mulps xmm0, [rcx] -mov rcx, 0 -;TEST_END_RECORDING - -xorps xmm0, xmm0 diff --git a/mc-sema/validator/x86_64/tests/MULPSrr.asm b/mc-sema/validator/x86_64/tests/MULPSrr.asm deleted file mode 100644 index 3a8795f44..000000000 --- a/mc-sema/validator/x86_64/tests/MULPSrr.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 3 to a double precision float and store in xmm0 -mov ecx, 3 -cvtsi2ss xmm0, ecx - -; convert 7 to a double precision float and store in xmm1 -mov ecx, 7 -cvtsi2ss xmm1, ecx - -;TEST_BEGIN_RECORDING -mulps xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/MULSDrm.asm b/mc-sema/validator/x86_64/tests/MULSDrm.asm deleted file mode 100644 index 24b665b75..000000000 --- a/mc-sema/validator/x86_64/tests/MULSDrm.asm +++ /dev/null @@ -1,23 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 5 to a double precision float and store in xmm0 -mov ecx, 5 -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -; load 2.5 (in double precision float form) -lea rcx, [rsp-8] -mov DWORD [rcx], 0 -mov DWORD [rcx+4], 0x40040000 - -mulsd xmm0, [rcx] -mov ecx, [rcx] -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx - diff --git a/mc-sema/validator/x86_64/tests/MULSDrr.asm b/mc-sema/validator/x86_64/tests/MULSDrr.asm deleted file mode 100644 index b392b284f..000000000 --- a/mc-sema/validator/x86_64/tests/MULSDrr.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 3 to a double precision float and store in xmm0 -mov ecx, 3 -cvtsi2sd xmm0, ecx - -; convert 7 to a double precision float and store in xmm1 -mov ecx, 7 -cvtsi2sd xmm1, ecx - -;TEST_BEGIN_RECORDING -mulsd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86_64/tests/MULSSrm.asm b/mc-sema/validator/x86_64/tests/MULSSrm.asm deleted file mode 100644 index 42d5af708..000000000 --- a/mc-sema/validator/x86_64/tests/MULSSrm.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 11 to a double precision float and store in xmm0 -mov ecx, 11 -cvtsi2ss xmm0, ecx - -;TEST_BEGIN_RECORDING -; load 1.5 (in double precision float form) -lea rcx, [rsp-4] -mov DWORD [rcx], 0x3fc00000 - -mulss xmm0, [rcx] -mov ecx, [rcx] -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/MULSSrr.asm b/mc-sema/validator/x86_64/tests/MULSSrr.asm deleted file mode 100644 index edb22770d..000000000 --- a/mc-sema/validator/x86_64/tests/MULSSrr.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 5 to a double precision float and store in xmm0 -mov ecx, 5 -cvtsi2ss xmm0, ecx - -; convert 11 to a double precision float and store in xmm1 -mov ecx, 11 -cvtsi2ss xmm1, ecx - -;TEST_BEGIN_RECORDING -mulss xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86_64/tests/MUL_F32m.asm b/mc-sema/validator/x86_64/tests/MUL_F32m.asm deleted file mode 100644 index c728860b5..000000000 --- a/mc-sema/validator/x86_64/tests/MUL_F32m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -;TEST_BEGIN_RECORDING -lea rdi, [rsp-0xC] -FST dword [rdi] -FMUL dword [rdi] -mov rdi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/MUL_F64m.asm b/mc-sema/validator/x86_64/tests/MUL_F64m.asm deleted file mode 100644 index efbce62dd..000000000 --- a/mc-sema/validator/x86_64/tests/MUL_F64m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - -; set up st0 to be 3.141593 -FLDPI -;TEST_BEGIN_RECORDING -lea rdi, [rsp-0xC] -FST qword [rdi] -FMUL qword [rdi] -mov rdi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/MUL_FST0r.asm b/mc-sema/validator/x86_64/tests/MUL_FST0r.asm deleted file mode 100644 index 82a47e23e..000000000 --- a/mc-sema/validator/x86_64/tests/MUL_FST0r.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - -; set up st0 and st1 to be pi -FLDPI -FLDPI -;TEST_BEGIN_RECORDING -FMUL st0, st1 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/MUL_FrST0.asm b/mc-sema/validator/x86_64/tests/MUL_FrST0.asm deleted file mode 100644 index 3924b435e..000000000 --- a/mc-sema/validator/x86_64/tests/MUL_FrST0.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - -; set up st0 and st1 to be pi -FLDPI -FLDPI -;TEST_BEGIN_RECORDING -FMUL st1, st0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/NEG16r.asm b/mc-sema/validator/x86_64/tests/NEG16r.asm deleted file mode 100644 index bfc594de8..000000000 --- a/mc-sema/validator/x86_64/tests/NEG16r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; NEG16r - mov bx, 0x10 - ;TEST_BEGIN_RECORDING - neg bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/NEG32r.asm b/mc-sema/validator/x86_64/tests/NEG32r.asm deleted file mode 100644 index 766e56edc..000000000 --- a/mc-sema/validator/x86_64/tests/NEG32r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Neg32R - mov ebx, 0x26 - ;TEST_BEGIN_RECORDING - neg ebx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/NEG8r.asm b/mc-sema/validator/x86_64/tests/NEG8r.asm deleted file mode 100644 index f90fa2435..000000000 --- a/mc-sema/validator/x86_64/tests/NEG8r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; NEG8r - mov dl, 0x1 - ;TEST_BEGIN_RECORDING - neg dl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/NOOP.asm b/mc-sema/validator/x86_64/tests/NOOP.asm deleted file mode 100644 index 64ed36c6d..000000000 --- a/mc-sema/validator/x86_64/tests/NOOP.asm +++ /dev/null @@ -1,9 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; NOOP - ;TEST_BEGIN_RECORDING - nop - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/NOT16r.asm b/mc-sema/validator/x86_64/tests/NOT16r.asm deleted file mode 100644 index b7b890705..000000000 --- a/mc-sema/validator/x86_64/tests/NOT16r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; NOT16r - mov cx, 0x8 - ;TEST_BEGIN_RECORDING - not cx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/NOT32r.asm b/mc-sema/validator/x86_64/tests/NOT32r.asm deleted file mode 100644 index 8a3e2d3c2..000000000 --- a/mc-sema/validator/x86_64/tests/NOT32r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Not32R - mov eax, 0x21 - ;TEST_BEGIN_RECORDING - not eax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/NOT64r.asm b/mc-sema/validator/x86_64/tests/NOT64r.asm deleted file mode 100644 index f168c1eb6..000000000 --- a/mc-sema/validator/x86_64/tests/NOT64r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Not64R - mov rax, 0x21 - ;TEST_BEGIN_RECORDING - not rax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/NOT8r.asm b/mc-sema/validator/x86_64/tests/NOT8r.asm deleted file mode 100644 index e120c4007..000000000 --- a/mc-sema/validator/x86_64/tests/NOT8r.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; NOT8r - mov dl, 0xaa - ;TEST_BEGIN_RECORDING - not dl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/OR16i16.asm b/mc-sema/validator/x86_64/tests/OR16i16.asm deleted file mode 100644 index 41754ba2d..000000000 --- a/mc-sema/validator/x86_64/tests/OR16i16.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; OR16i16 - mov ax, 0x3333 - ;TEST_BEGIN_RECORDING - or ax, 0xeeee - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/OR16ri.asm b/mc-sema/validator/x86_64/tests/OR16ri.asm deleted file mode 100644 index 72d02cd9e..000000000 --- a/mc-sema/validator/x86_64/tests/OR16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; OR16ri - mov bx, 0x1212 - ;TEST_BEGIN_RECORDING - or bx, 0x444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/OR16rm.asm b/mc-sema/validator/x86_64/tests/OR16rm.asm deleted file mode 100644 index 8b81f00cb..000000000 --- a/mc-sema/validator/x86_64/tests/OR16rm.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; OR16rm - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0x6] - mov WORD [rdi], 0x1234 - mov ax, 0x5678 - or ax, [rdi] - mov rdi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/OR16rr.asm b/mc-sema/validator/x86_64/tests/OR16rr.asm deleted file mode 100644 index 767a28496..000000000 --- a/mc-sema/validator/x86_64/tests/OR16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; OR16rr - mov cx, 0x0 - mov dx, 0x1 - ;TEST_BEGIN_RECORDING - or cx, dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/OR32i32.asm b/mc-sema/validator/x86_64/tests/OR32i32.asm deleted file mode 100644 index 76921e369..000000000 --- a/mc-sema/validator/x86_64/tests/OR32i32.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; OR32i32 - mov eax, 0x7 - ;TEST_BEGIN_RECORDING - or eax, 0x6fffffff - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/OR32mr.asm b/mc-sema/validator/x86_64/tests/OR32mr.asm deleted file mode 100644 index c5fca338b..000000000 --- a/mc-sema/validator/x86_64/tests/OR32mr.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; OR32mr - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0x4] - mov DWORD [rdi], 0x1234abcd - mov eax, 0x5678fedc - or [rdi], eax - mov edx, [rdi] - mov rdi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/OR32ri.asm b/mc-sema/validator/x86_64/tests/OR32ri.asm deleted file mode 100644 index f12d644f3..000000000 --- a/mc-sema/validator/x86_64/tests/OR32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; OR32ri - mov ebx, 0x7 - ;TEST_BEGIN_RECORDING - or ebx, 0x44444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/OR32rr.asm b/mc-sema/validator/x86_64/tests/OR32rr.asm deleted file mode 100644 index e87ebfc71..000000000 --- a/mc-sema/validator/x86_64/tests/OR32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; OR32rr - mov ecx, 0x0 - mov edx, 0x1 - ;TEST_BEGIN_RECORDING - or ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/OR8i8.asm b/mc-sema/validator/x86_64/tests/OR8i8.asm deleted file mode 100644 index d934cdf07..000000000 --- a/mc-sema/validator/x86_64/tests/OR8i8.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; OR8i8 - mov al, 0x6 - ;TEST_BEGIN_RECORDING - or al, 0x2 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/OR8ri.asm b/mc-sema/validator/x86_64/tests/OR8ri.asm deleted file mode 100644 index d268dcd78..000000000 --- a/mc-sema/validator/x86_64/tests/OR8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; OR8ri - mov bh, 0x45 - ;TEST_BEGIN_RECORDING - or bh, 0x82 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/OR8rr.asm b/mc-sema/validator/x86_64/tests/OR8rr.asm deleted file mode 100644 index f58e0b031..000000000 --- a/mc-sema/validator/x86_64/tests/OR8rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; Or8RR - mov al, 0x5E - mov ah, 0x13 - ;TEST_BEGIN_RECORDING - or al, ah - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ORPDrm.asm b/mc-sema/validator/x86_64/tests/ORPDrm.asm deleted file mode 100644 index d6651cb52..000000000 --- a/mc-sema/validator/x86_64/tests/ORPDrm.asm +++ /dev/null @@ -1,34 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-17] -and rcx, 0xfffffffffffffff0 - -; load 128 bit value into xmm0 -mov DWORD [rcx], 0x12345678 -mov DWORD [rcx+4], 0x55555555 -mov DWORD [rcx+8], 0xdeadbeef -mov DWORD [rcx+12], 0x1f311c47 -movaps xmm0, [rcx] -lea rcx, [rcx+16] - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-17] -and rcx, 0xfffffffffffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [rcx], 0xabcdef12 -mov DWORD [rcx+4], 0xaaaaaaaa -mov DWORD [rcx+8], 0xdeadbeef -mov DWORD [rcx+12], 0xfeeb1e01 - -orpd xmm0, [rcx] -mov rcx, [rcx] -xor rcx, rcx -;TEST_END_RECORDING - -xor rcx, rcx -cvtsi2sd xmm0, rcx diff --git a/mc-sema/validator/x86_64/tests/ORPDrr.asm b/mc-sema/validator/x86_64/tests/ORPDrr.asm deleted file mode 100644 index f64febdef..000000000 --- a/mc-sema/validator/x86_64/tests/ORPDrr.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-33] -and rcx, 0xfffffffffffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [rcx], 0x55555555 -mov DWORD [rcx+4], 0x14530451 -mov DWORD [rcx+8], 0x1badb002 -mov DWORD [rcx+12], 0xf0f0f0f0 -movaps xmm0, [rcx] -lea rcx, [rcx+16] - -; load a 128 bit value into xmm1 -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e -movaps xmm1, [rcx] - -;TEST_BEGIN_RECORDING -orpd xmm0, xmm1 -;TEST_END_RECORDING - -xor rcx, rcx -cvtsi2sd xmm0, rcx -cvtsi2sd xmm1, rcx - diff --git a/mc-sema/validator/x86_64/tests/ORPSrm.asm b/mc-sema/validator/x86_64/tests/ORPSrm.asm deleted file mode 100644 index d47d4d4f9..000000000 --- a/mc-sema/validator/x86_64/tests/ORPSrm.asm +++ /dev/null @@ -1,34 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-17] -and rcx, 0xfffffffffffffff0 - -; load 128 bit value into xmm0 -mov DWORD [rcx], 0x12345678 -mov DWORD [rcx+4], 0x55555555 -mov DWORD [rcx+8], 0xdeadbeef -mov DWORD [rcx+12], 0x1f311c47 -movaps xmm0, [rcx] -lea rcx, [rcx+16] - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-17] -and rcx, 0xfffffffffffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [rcx], 0xabcdef12 -mov DWORD [rcx+4], 0xaaaaaaaa -mov DWORD [rcx+8], 0xdeadbeef -mov DWORD [rcx+12], 0xfeeb1e01 - -orps xmm0, [rcx] -mov rcx, [rcx] -xor rcx, rcx -;TEST_END_RECORDING - -xor rcx, rcx -cvtsi2sd xmm0, rcx diff --git a/mc-sema/validator/x86_64/tests/ORPSrr.asm b/mc-sema/validator/x86_64/tests/ORPSrr.asm deleted file mode 100644 index 27ab6a8da..000000000 --- a/mc-sema/validator/x86_64/tests/ORPSrr.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-33] -and rcx, 0xfffffffffffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [rcx], 0x55555555 -mov DWORD [rcx+4], 0x14530451 -mov DWORD [rcx+8], 0x1badb002 -mov DWORD [rcx+12], 0xf0f0f0f0 -movaps xmm0, [rcx] -lea rcx, [rcx+16] - -; load a 128 bit value into xmm1 -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e -movaps xmm1, [rcx] - -;TEST_BEGIN_RECORDING -orps xmm0, xmm1 -;TEST_END_RECORDING - -xor rcx, rcx -cvtsi2sd xmm0, rcx -cvtsi2sd xmm1, rcx - diff --git a/mc-sema/validator/x86_64/tests/PADDBrm.asm b/mc-sema/validator/x86_64/tests/PADDBrm.asm deleted file mode 100644 index 45d7f0dd2..000000000 --- a/mc-sema/validator/x86_64/tests/PADDBrm.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-17] -and rcx, 0xfffffffffffffff0 - -; load 128 bit value into xmm0 -mov DWORD [rcx], 0x12345678 -mov DWORD [rcx+4], 0x55555555 -mov DWORD [rcx+8], 0xdeadbeef -mov DWORD [rcx+12], 0x1f311c47 -movaps xmm0, [rcx] -lea rcx, [rcx+16] - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-17] -and rcx, 0xfffffffffffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [rcx], 0xabcdef12 -mov DWORD [rcx+4], 0xaaaaaaaa -mov DWORD [rcx+8], 0xdeadbeef -mov DWORD [rcx+12], 0xfeeb1e01 - -paddb xmm0, [rcx] -mov rcx, [rcx] -mov rcx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/PADDBrr.asm b/mc-sema/validator/x86_64/tests/PADDBrr.asm deleted file mode 100644 index 4727522f8..000000000 --- a/mc-sema/validator/x86_64/tests/PADDBrr.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-33] -and rcx, 0xfffffffffffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [rcx], 0x55555555 -mov DWORD [rcx+4], 0x14530451 -mov DWORD [rcx+8], 0x1badb002 -mov DWORD [rcx+12], 0xf0f0f0f0 -movaps xmm0, [rcx] -lea rcx, [rcx+16] - -; load a 128 bit value into xmm1 -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e -movaps xmm1, [rcx] - -;TEST_BEGIN_RECORDING -paddb xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86_64/tests/PADDDrm.asm b/mc-sema/validator/x86_64/tests/PADDDrm.asm deleted file mode 100644 index d117d1de3..000000000 --- a/mc-sema/validator/x86_64/tests/PADDDrm.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-17] -and rcx, 0xfffffffffffffff0 - -; load 128 bit value into xmm0 -mov DWORD [rcx], 0x12345678 -mov DWORD [rcx+4], 0x55555555 -mov DWORD [rcx+8], 0xdeadbeef -mov DWORD [rcx+12], 0x1f311c47 -movaps xmm0, [rcx] -lea rcx, [rcx+16] - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-17] -and rcx, 0xfffffffffffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [rcx], 0xabcdef12 -mov DWORD [rcx+4], 0xaaaaaaaa -mov DWORD [rcx+8], 0xdeadbeef -mov DWORD [rcx+12], 0xfeeb1e01 - -paddd xmm0, [rcx] -mov rcx, [rcx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/PADDDrr.asm b/mc-sema/validator/x86_64/tests/PADDDrr.asm deleted file mode 100644 index 41a943034..000000000 --- a/mc-sema/validator/x86_64/tests/PADDDrr.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-33] -and rcx, 0xfffffffffffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [rcx], 0x55555555 -mov DWORD [rcx+4], 0x14530451 -mov DWORD [rcx+8], 0x1badb002 -mov DWORD [rcx+12], 0xf0f0f0f0 -movaps xmm0, [rcx] -lea rcx, [rcx+16] - -; load a 128 bit value into xmm1 -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e -movaps xmm1, [rcx] - -;TEST_BEGIN_RECORDING -paddd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86_64/tests/PADDQrm.asm b/mc-sema/validator/x86_64/tests/PADDQrm.asm deleted file mode 100644 index 728fe9ad1..000000000 --- a/mc-sema/validator/x86_64/tests/PADDQrm.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-17] -and rcx, 0xfffffffffffffff0 - -; load 128 bit value into xmm0 -mov DWORD [rcx], 0x12345678 -mov DWORD [rcx+4], 0x55555555 -mov DWORD [rcx+8], 0xdeadbeef -mov DWORD [rcx+12], 0x1f311c47 -movaps xmm0, [rcx] -lea ecx, [rcx+16] - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-17] -and rcx, 0xfffffffffffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [rcx], 0xabcdef12 -mov DWORD [rcx+4], 0xaaaaaaaa -mov DWORD [rcx+8], 0xdeadbeef -mov DWORD [rcx+12], 0xfeeb1e01 - -paddq xmm0, [rcx] -mov rcx, [rcx] -mov rcx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, rcx diff --git a/mc-sema/validator/x86_64/tests/PADDQrr.asm b/mc-sema/validator/x86_64/tests/PADDQrr.asm deleted file mode 100644 index bc590e4ed..000000000 --- a/mc-sema/validator/x86_64/tests/PADDQrr.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-33] -and rcx, 0xfffffffffffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [rcx], 0x55555555 -mov DWORD [rcx+4], 0x14530451 -mov DWORD [rcx+8], 0x1badb002 -mov DWORD [rcx+12], 0xf0f0f0f0 -movaps xmm0, [rcx] -lea rcx, [rcx+16] - -; load a 128 bit value into xmm1 -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e -movaps xmm1, [rcx] - -;TEST_BEGIN_RECORDING -paddq xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86_64/tests/PADDWrm.asm b/mc-sema/validator/x86_64/tests/PADDWrm.asm deleted file mode 100644 index 8f0a94e2c..000000000 --- a/mc-sema/validator/x86_64/tests/PADDWrm.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-17] -and rcx, 0xfffffffffffffff0 - -; load 128 bit value into xmm0 -mov DWORD [rcx], 0x12345678 -mov DWORD [rcx+4], 0x55555555 -mov DWORD [rcx+8], 0xdeadbeef -mov DWORD [rcx+12], 0x1f311c47 -movaps xmm0, [rcx] -lea rcx, [rcx+16] - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-17] -and rcx, 0xfffffffffffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [rcx], 0xabcdef12 -mov DWORD [rcx+4], 0xaaaaaaaa -mov DWORD [rcx+8], 0xdeadbeef -mov DWORD [rcx+12], 0xfeeb1e01 - -paddw xmm0, [rcx] -mov rcx, [rcx] -mov rcx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, rcx diff --git a/mc-sema/validator/x86_64/tests/PADDWrr.asm b/mc-sema/validator/x86_64/tests/PADDWrr.asm deleted file mode 100644 index 15b3c72ea..000000000 --- a/mc-sema/validator/x86_64/tests/PADDWrr.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-33] -and rcx, 0xfffffffffffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [rcx], 0x55555555 -mov DWORD [rcx+4], 0x14530451 -mov DWORD [rcx+8], 0x1badb002 -mov DWORD [rcx+12], 0xf0f0f0f0 -movaps xmm0, [rcx] -lea rcx, [rcx+16] - -; load a 128 bit value into xmm1 -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e -movaps xmm1, [rcx] - -;TEST_BEGIN_RECORDING -paddw xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86_64/tests/PEXTRWmr.asm b/mc-sema/validator/x86_64/tests/PEXTRWmr.asm deleted file mode 100644 index ec740b123..000000000 --- a/mc-sema/validator/x86_64/tests/PEXTRWmr.asm +++ /dev/null @@ -1,27 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -mov eax, 0 -mov ecx, 0 -;TEST_BEGIN_RECORDING -lea rbx, [rsp-4] -mov dword [rbx], 0 - -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -mov dword [rcx+0x00], 0xAAAAAAAA -mov dword [rcx+0x04], 0xBBBBBBBB -mov dword [rcx+0x08], 0xCCCCCCCC -mov dword [rcx+0x0C], 0xDDDDDDDD -movdqu xmm1, [rcx] - -pextrw [rbx], xmm1, 7 -mov ebx, [rbx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/PEXTRWri.asm b/mc-sema/validator/x86_64/tests/PEXTRWri.asm deleted file mode 100644 index 8c901c330..000000000 --- a/mc-sema/validator/x86_64/tests/PEXTRWri.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 -mov eax, 0xFFFFFFFF - -mov dword [rcx+0x00], 0xAAAAAAAA -mov dword [rcx+0x04], 0xBBBBBBBB -mov dword [rcx+0x08], 0xCCCCCCCC -mov dword [rcx+0x0C], 0xDDDDDDDD -movdqu xmm1, [rcx] - -pextrw eax, xmm1, 5 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/PINSRWrmi.asm b/mc-sema/validator/x86_64/tests/PINSRWrmi.asm deleted file mode 100644 index 9a1b9638c..000000000 --- a/mc-sema/validator/x86_64/tests/PINSRWrmi.asm +++ /dev/null @@ -1,26 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -mov rax, 0 -mov ecx, 0 -;TEST_BEGIN_RECORDING -lea rax, [rsp-4] -mov dword [rax], 0x99999999 -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -mov dword [rcx+0x00], 0xAAAAAAAA -mov dword [rcx+0x04], 0xBBBBBBBB -mov dword [rcx+0x08], 0xCCCCCCCC -mov dword [rcx+0x0C], 0xDDDDDDDD -movdqu xmm1, [rcx] - -pinsrw xmm1, [rax], 7 -mov ecx, 0 -mov eax, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/PINSRWrri.asm b/mc-sema/validator/x86_64/tests/PINSRWrri.asm deleted file mode 100644 index d59cc9dfd..000000000 --- a/mc-sema/validator/x86_64/tests/PINSRWrri.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -mov eax, 0xEE -;TEST_BEGIN_RECORDING -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -mov dword [rcx+0x00], 0xAAAAAAAA -mov dword [rcx+0x04], 0xBBBBBBBB -mov dword [rcx+0x08], 0xCCCCCCCC -mov dword [rcx+0x0C], 0xDDDDDDDD -movdqu xmm1, [rcx] - -pinsrw xmm1, ax, 5 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/POP16r.asm b/mc-sema/validator/x86_64/tests/POP16r.asm deleted file mode 100644 index ec307c13c..000000000 --- a/mc-sema/validator/x86_64/tests/POP16r.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; POP16r - mov cx, 0x77 - xor di, di - ;TEST_BEGIN_RECORDING - push cx - pop di - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/PORrm.asm b/mc-sema/validator/x86_64/tests/PORrm.asm deleted file mode 100644 index 9b924bde5..000000000 --- a/mc-sema/validator/x86_64/tests/PORrm.asm +++ /dev/null @@ -1,34 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-17] -and rcx, 0xfffffffffffffff0 - -; load 128 bit value into xmm0 -mov DWORD [rcx], 0x12345678 -mov DWORD [rcx+4], 0x55555555 -mov DWORD [rcx+8], 0xdeadbeef -mov DWORD [rcx+12], 0x1f311c47 -movaps xmm0, [rcx] -lea rcx, [rcx+16] - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-17] -and rcx, 0xfffffffffffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [rcx], 0xabcdef12 -mov DWORD [rcx+4], 0xaaaaaaaa -mov DWORD [rcx+8], 0xdeadbeef -mov DWORD [rcx+12], 0xfeeb1e01 - -por xmm0, [rcx] -mov ecx, [rcx] -xor ecx, ecx -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/PORrr.asm b/mc-sema/validator/x86_64/tests/PORrr.asm deleted file mode 100644 index 42c880255..000000000 --- a/mc-sema/validator/x86_64/tests/PORrr.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-33] -and rcx, 0xfffffffffffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [rcx], 0x55555555 -mov DWORD [rcx+4], 0x14530451 -mov DWORD [rcx+8], 0x1badb002 -mov DWORD [rcx+12], 0xf0f0f0f0 -movaps xmm0, [rcx] -lea rcx, [rcx+16] - -; load a 128 bit value into xmm1 -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e -movaps xmm1, [rcx] - -;TEST_BEGIN_RECORDING -por xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86_64/tests/PSHUFDmi.asm b/mc-sema/validator/x86_64/tests/PSHUFDmi.asm deleted file mode 100644 index e91577424..000000000 --- a/mc-sema/validator/x86_64/tests/PSHUFDmi.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -mov dword [rcx+0x00], 0xAAAAAAAA -mov dword [rcx+0x04], 0xBBBBBBBB -mov dword [rcx+0x08], 0xCCCCCCCC -mov dword [rcx+0x0C], 0xDDDDDDDD - -pshufd xmm0, [rcx], 0x4E -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx - diff --git a/mc-sema/validator/x86_64/tests/PSHUFDri.asm b/mc-sema/validator/x86_64/tests/PSHUFDri.asm deleted file mode 100644 index 8cdf284e6..000000000 --- a/mc-sema/validator/x86_64/tests/PSHUFDri.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -mov dword [rcx+0x00], 0xAAAAAAAA -mov dword [rcx+0x04], 0xBBBBBBBB -mov dword [rcx+0x08], 0xCCCCCCCC -mov dword [rcx+0x0C], 0xDDDDDDDD -movdqu xmm1, [rcx] - -pshufd xmm0, xmm1, 0x4E -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/PSHUFHWrmi.asm b/mc-sema/validator/x86_64/tests/PSHUFHWrmi.asm deleted file mode 100644 index a31fa56ec..000000000 --- a/mc-sema/validator/x86_64/tests/PSHUFHWrmi.asm +++ /dev/null @@ -1,29 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -; load a 128 bit value into xmm0 -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] - -lea rcx, [rcx+16] -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e - -pshufhw xmm0, [rcx], 0xE4 -mov rcx, 0 -;TEST_END_RECORDING - -xorps xmm0, xmm0 diff --git a/mc-sema/validator/x86_64/tests/PSHUFHWrri b/mc-sema/validator/x86_64/tests/PSHUFHWrri deleted file mode 100644 index 80324c23d..000000000 Binary files a/mc-sema/validator/x86_64/tests/PSHUFHWrri and /dev/null differ diff --git a/mc-sema/validator/x86_64/tests/PSHUFHWrri.asm b/mc-sema/validator/x86_64/tests/PSHUFHWrri.asm deleted file mode 100644 index 16fd0d97d..000000000 --- a/mc-sema/validator/x86_64/tests/PSHUFHWrri.asm +++ /dev/null @@ -1,32 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -; load a 128 bit value into xmm0 -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] - -lea rcx, [rcx+16] -; load a 128 bit value into xmm1 -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e -movaps xmm1, [rcx] - -;TEST_BEGIN_RECORDING -pshufhw xmm0, xmm1, 0xE4 -;TEST_END_RECORDING - -mov rcx, 0 -xorps xmm0, xmm0 -xorps xmm1, xmm1 diff --git a/mc-sema/validator/x86_64/tests/PSLLDrr.asm b/mc-sema/validator/x86_64/tests/PSLLDrr.asm deleted file mode 100644 index 7ca369c48..000000000 --- a/mc-sema/validator/x86_64/tests/PSLLDrr.asm +++ /dev/null @@ -1,27 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-0x10] -mov dword [rcx+0x00], 0x0 -mov dword [rcx+0x04], 0x0 -mov dword [rcx+0x08], 0x0 -mov dword [rcx+0x0C], 0x10 -;set up ecx to be 8 -movdqu xmm1, [rcx] - -mov dword [rcx+0x00], 0x00FFF000 -mov dword [rcx+0x04], 0x00FFF000 -mov dword [rcx+0x08], 0x00FFF000 -mov dword [rcx+0x0C], 0x00FFF000 -movdqu xmm0, [rcx] - -pslld xmm0, xmm1 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/PSLLDrr2.asm b/mc-sema/validator/x86_64/tests/PSLLDrr2.asm deleted file mode 100644 index ca9339024..000000000 --- a/mc-sema/validator/x86_64/tests/PSLLDrr2.asm +++ /dev/null @@ -1,28 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-0x10] -mov dword [rcx+0x00], 0x0 -mov dword [rcx+0x04], 0x0 -mov dword [rcx+0x08], 0x0 -mov dword [rcx+0x0C], 0xFF -;set up ecx to be 8 -movdqu xmm1, [rcx] - -mov dword [rcx+0x00], 0xF0FFF000 -mov dword [rcx+0x04], 0xF0FFF000 -mov dword [rcx+0x08], 0xF0FFF000 -mov dword [rcx+0x0C], 0xF0FFF000 -movdqu xmm0, [rcx] - -pslld xmm0, xmm1 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86_64/tests/PSLLWrr.asm b/mc-sema/validator/x86_64/tests/PSLLWrr.asm deleted file mode 100644 index a65e9c287..000000000 --- a/mc-sema/validator/x86_64/tests/PSLLWrr.asm +++ /dev/null @@ -1,27 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-0x10] -mov dword [rcx+0x00], 0x0 -mov dword [rcx+0x04], 0x0 -mov dword [rcx+0x08], 0x0 -mov dword [rcx+0x0C], 0x4 -;set up ecx to be 8 -movdqu xmm1, [rcx] - -mov dword [rcx+0x00], 0xF0F0F0F0 -mov dword [rcx+0x04], 0xF0F0F0F0 -mov dword [rcx+0x08], 0xF0F0F0F0 -mov dword [rcx+0x0C], 0xF0F0F0F0 -movdqu xmm0, [rcx] - -psllw xmm0, xmm1 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/PSRADrr.asm b/mc-sema/validator/x86_64/tests/PSRADrr.asm deleted file mode 100644 index cd423d066..000000000 --- a/mc-sema/validator/x86_64/tests/PSRADrr.asm +++ /dev/null @@ -1,27 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-0x10] -mov dword [rcx+0x00], 0x0 -mov dword [rcx+0x04], 0x0 -mov dword [rcx+0x08], 0x0 -mov dword [rcx+0x0C], 0x10 -;set up ecx to be 8 -movdqu xmm1, [rcx] - -mov dword [rcx+0x00], 0x00FFF000 -mov dword [rcx+0x04], 0x00FFF000 -mov dword [rcx+0x08], 0x00FFF000 -mov dword [rcx+0x0C], 0x00FFF000 -movdqu xmm0, [rcx] - -psrad xmm0, xmm1 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/PSRADrr2.asm b/mc-sema/validator/x86_64/tests/PSRADrr2.asm deleted file mode 100644 index 9847b287d..000000000 --- a/mc-sema/validator/x86_64/tests/PSRADrr2.asm +++ /dev/null @@ -1,28 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-0x10] -mov dword [rcx+0x00], 0x0 -mov dword [rcx+0x04], 0x0 -mov dword [rcx+0x08], 0x0 -mov dword [rcx+0x0C], 0xFF -;set up ecx to be 8 -movdqu xmm1, [rcx] - -mov dword [rcx+0x00], 0xF0FFF000 -mov dword [rcx+0x04], 0xF0FFF000 -mov dword [rcx+0x08], 0xF0FFF000 -mov dword [rcx+0x0C], 0xF0FFF000 -movdqu xmm0, [rcx] - -psraw xmm0, xmm1 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86_64/tests/PSRAWrr.asm b/mc-sema/validator/x86_64/tests/PSRAWrr.asm deleted file mode 100644 index 004e8d75a..000000000 --- a/mc-sema/validator/x86_64/tests/PSRAWrr.asm +++ /dev/null @@ -1,27 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-0x10] -mov dword [rcx+0x00], 0x0 -mov dword [rcx+0x04], 0x0 -mov dword [rcx+0x08], 0x0 -mov dword [rcx+0x0C], 0x8 -;set up ecx to be 8 -movdqu xmm1, [rcx] - -mov dword [rcx+0x00], 0xF0F0F0F0 -mov dword [rcx+0x04], 0xF0F0F0F0 -mov dword [rcx+0x08], 0xF0F0F0F0 -mov dword [rcx+0x0C], 0xF0F0F0F0 -movdqu xmm0, [rcx] - -psraw xmm0, xmm1 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/PSUBBrm.asm b/mc-sema/validator/x86_64/tests/PSUBBrm.asm deleted file mode 100644 index 91c96952c..000000000 --- a/mc-sema/validator/x86_64/tests/PSUBBrm.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-17] -and rcx, 0xfffffffffffffff0 - -; load 128 bit value into xmm0 -mov DWORD [rcx], 0x12345678 -mov DWORD [rcx+4], 0x55555555 -mov DWORD [rcx+8], 0xdeadbeef -mov DWORD [rcx+12], 0x1f311c47 -movaps xmm0, [rcx] -lea rcx, [rcx+16] - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-17] -and rcx, 0xfffffffffffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [rcx], 0xabcdef12 -mov DWORD [rcx+4], 0xaaaaaaaa -mov DWORD [rcx+8], 0xdeadbeef -mov DWORD [rcx+12], 0xfeeb1e01 - -psubb xmm0, [rcx] -mov ecx, [rcx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/PSUBBrr.asm b/mc-sema/validator/x86_64/tests/PSUBBrr.asm deleted file mode 100644 index e7f05cd89..000000000 --- a/mc-sema/validator/x86_64/tests/PSUBBrr.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-33] -and rcx, 0xfffffffffffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [rcx], 0x55555555 -mov DWORD [rcx+4], 0x14530451 -mov DWORD [rcx+8], 0x1badb002 -mov DWORD [rcx+12], 0xf0f0f0f0 -movaps xmm0, [rcx] -lea rcx, [rcx+16] - -; load a 128 bit value into xmm1 -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e -movaps xmm1, [rcx] - -;TEST_BEGIN_RECORDING -psubb xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86_64/tests/PSUBDrm.asm b/mc-sema/validator/x86_64/tests/PSUBDrm.asm deleted file mode 100644 index 601f80514..000000000 --- a/mc-sema/validator/x86_64/tests/PSUBDrm.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-17] -and rcx, 0xfffffffffffffff0 - -; load 128 bit value into xmm0 -mov DWORD [rcx], 0x12345678 -mov DWORD [rcx+4], 0x55555555 -mov DWORD [rcx+8], 0xdeadbeef -mov DWORD [rcx+12], 0x1f311c47 -movaps xmm0, [rcx] -lea rcx, [rcx+16] - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-17] -and rcx, 0xfffffffffffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [rcx], 0xabcdef12 -mov DWORD [rcx+4], 0xaaaaaaaa -mov DWORD [rcx+8], 0xdeadbeef -mov DWORD [rcx+12], 0xfeeb1e01 - -psubd xmm0, [rcx] -mov ecx, [rcx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/PSUBDrr.asm b/mc-sema/validator/x86_64/tests/PSUBDrr.asm deleted file mode 100644 index 6e0ffbfc2..000000000 --- a/mc-sema/validator/x86_64/tests/PSUBDrr.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-33] -and rcx, 0xfffffffffffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [rcx], 0x55555555 -mov DWORD [rcx+4], 0x14530451 -mov DWORD [rcx+8], 0x1badb002 -mov DWORD [rcx+12], 0xf0f0f0f0 -movaps xmm0, [rcx] -lea rcx, [rcx+16] - -; load a 128 bit value into xmm1 -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e -movaps xmm1, [rcx] - -;TEST_BEGIN_RECORDING -psubd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86_64/tests/PSUBQrm.asm b/mc-sema/validator/x86_64/tests/PSUBQrm.asm deleted file mode 100644 index 247cc4b89..000000000 --- a/mc-sema/validator/x86_64/tests/PSUBQrm.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-17] -and rcx, 0xfffffffffffffff0 - -; load 128 bit value into xmm0 -mov DWORD [rcx], 0x12345678 -mov DWORD [rcx+4], 0x55555555 -mov DWORD [rcx+8], 0xdeadbeef -mov DWORD [rcx+12], 0x1f311c47 -movaps xmm0, [rcx] -lea rcx, [rcx+16] - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-17] -and rcx, 0xfffffffffffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [rcx], 0xabcdef12 -mov DWORD [rcx+4], 0xaaaaaaaa -mov DWORD [rcx+8], 0xdeadbeef -mov DWORD [rcx+12], 0xfeeb1e01 - -psubq xmm0, [rcx] -mov ecx, [rcx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/PSUBQrr.asm b/mc-sema/validator/x86_64/tests/PSUBQrr.asm deleted file mode 100644 index 54a695214..000000000 --- a/mc-sema/validator/x86_64/tests/PSUBQrr.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-33] -and rcx, 0xfffffffffffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [rcx], 0x55555555 -mov DWORD [rcx+4], 0x14530451 -mov DWORD [rcx+8], 0x1badb002 -mov DWORD [rcx+12], 0xf0f0f0f0 -movaps xmm0, [rcx] -lea rcx, [rcx+16] - -; load a 128 bit value into xmm1 -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e -movaps xmm1, [rcx] - -;TEST_BEGIN_RECORDING -psubq xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86_64/tests/PSUBWrm.asm b/mc-sema/validator/x86_64/tests/PSUBWrm.asm deleted file mode 100644 index 19338a6e5..000000000 --- a/mc-sema/validator/x86_64/tests/PSUBWrm.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-17] -and rcx, 0xfffffffffffffff0 - -; load 128 bit value into xmm0 -mov DWORD [rcx], 0x12345678 -mov DWORD [rcx+4], 0x55555555 -mov DWORD [rcx+8], 0xdeadbeef -mov DWORD [rcx+12], 0x1f311c47 -movaps xmm0, [rcx] -lea rcx, [rcx+16] - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-17] -and rcx, 0xfffffffffffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [rcx], 0xabcdef12 -mov DWORD [rcx+4], 0xaaaaaaaa -mov DWORD [rcx+8], 0xdeadbeef -mov DWORD [rcx+12], 0xfeeb1e01 - -psubw xmm0, [rcx] -mov ecx, [rcx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/PSUBWrr.asm b/mc-sema/validator/x86_64/tests/PSUBWrr.asm deleted file mode 100644 index 7dc9537c3..000000000 --- a/mc-sema/validator/x86_64/tests/PSUBWrr.asm +++ /dev/null @@ -1,33 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-33] -and rcx, 0xfffffffffffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [rcx], 0x55555555 -mov DWORD [rcx+4], 0x14530451 -mov DWORD [rcx+8], 0x1badb002 -mov DWORD [rcx+12], 0xf0f0f0f0 -movaps xmm0, [rcx] -lea rcx, [rcx+16] - -; load a 128 bit value into xmm1 -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e -movaps xmm1, [rcx] - -;TEST_BEGIN_RECORDING -psubw xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx - diff --git a/mc-sema/validator/x86_64/tests/PUNPCKLBWrm.asm b/mc-sema/validator/x86_64/tests/PUNPCKLBWrm.asm deleted file mode 100644 index 9d73e0521..000000000 --- a/mc-sema/validator/x86_64/tests/PUNPCKLBWrm.asm +++ /dev/null @@ -1,26 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] -mov dword [rcx+0x00], 0x00112233 -mov dword [rcx+0x04], 0x44556677 -mov dword [rcx+0x08], 0x8899AABB -mov dword [rcx+0x0C], 0xCCDDEEFF - -punpcklbw xmm0, [rcx] -mov rcx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/PUNPCKLBWrr.asm b/mc-sema/validator/x86_64/tests/PUNPCKLBWrr.asm deleted file mode 100644 index 03467496a..000000000 --- a/mc-sema/validator/x86_64/tests/PUNPCKLBWrr.asm +++ /dev/null @@ -1,27 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] -mov dword [rcx+0x00], 0x00112233 -mov dword [rcx+0x04], 0x44556677 -mov dword [rcx+0x08], 0x8899AABB -mov dword [rcx+0x0C], 0xCCDDEEFF -movdqu xmm1, [rcx] - -punpcklbw xmm0, xmm1 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/PUNPCKLDQrm.asm b/mc-sema/validator/x86_64/tests/PUNPCKLDQrm.asm deleted file mode 100644 index d120401ad..000000000 --- a/mc-sema/validator/x86_64/tests/PUNPCKLDQrm.asm +++ /dev/null @@ -1,26 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] -mov dword [rcx+0x00], 0x00112233 -mov dword [rcx+0x04], 0x44556677 -mov dword [rcx+0x08], 0x8899AABB -mov dword [rcx+0x0C], 0xCCDDEEFF - -punpckldq xmm0, [rcx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/PUNPCKLDQrr.asm b/mc-sema/validator/x86_64/tests/PUNPCKLDQrr.asm deleted file mode 100644 index 8645fc5f4..000000000 --- a/mc-sema/validator/x86_64/tests/PUNPCKLDQrr.asm +++ /dev/null @@ -1,27 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] -mov dword [rcx+0x00], 0x00112233 -mov dword [rcx+0x04], 0x44556677 -mov dword [rcx+0x08], 0x8899AABB -mov dword [rcx+0x0C], 0xCCDDEEFF -movdqu xmm1, [rcx] - -punpckldq xmm0, xmm1 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/PUNPCKLQDQrm.asm b/mc-sema/validator/x86_64/tests/PUNPCKLQDQrm.asm deleted file mode 100644 index c782e1b56..000000000 --- a/mc-sema/validator/x86_64/tests/PUNPCKLQDQrm.asm +++ /dev/null @@ -1,26 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] -mov dword [rcx+0x00], 0x00112233 -mov dword [rcx+0x04], 0x44556677 -mov dword [rcx+0x08], 0x8899AABB -mov dword [rcx+0x0C], 0xCCDDEEFF - -punpcklqdq xmm0, [rcx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/PUNPCKLQDQrr.asm b/mc-sema/validator/x86_64/tests/PUNPCKLQDQrr.asm deleted file mode 100644 index 9de84d602..000000000 --- a/mc-sema/validator/x86_64/tests/PUNPCKLQDQrr.asm +++ /dev/null @@ -1,27 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] -mov dword [rcx+0x00], 0x00112233 -mov dword [rcx+0x04], 0x44556677 -mov dword [rcx+0x08], 0x8899AABB -mov dword [rcx+0x0C], 0xCCDDEEFF -movdqu xmm1, [rcx] - -punpcklqdq xmm0, xmm1 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/PUNPCKLWDrm.asm b/mc-sema/validator/x86_64/tests/PUNPCKLWDrm.asm deleted file mode 100644 index a6cedad26..000000000 --- a/mc-sema/validator/x86_64/tests/PUNPCKLWDrm.asm +++ /dev/null @@ -1,26 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] -mov dword [rcx+0x00], 0x00112233 -mov dword [rcx+0x04], 0x44556677 -mov dword [rcx+0x08], 0x8899AABB -mov dword [rcx+0x0C], 0xCCDDEEFF - -punpcklwd xmm0, [rcx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/PUNPCKLWDrr.asm b/mc-sema/validator/x86_64/tests/PUNPCKLWDrr.asm deleted file mode 100644 index ce7891734..000000000 --- a/mc-sema/validator/x86_64/tests/PUNPCKLWDrr.asm +++ /dev/null @@ -1,27 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] -mov dword [rcx+0x00], 0x00112233 -mov dword [rcx+0x04], 0x44556677 -mov dword [rcx+0x08], 0x8899AABB -mov dword [rcx+0x0C], 0xCCDDEEFF -movdqu xmm1, [rcx] - -punpcklwd xmm0, xmm1 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/PUSH16r.asm b/mc-sema/validator/x86_64/tests/PUSH16r.asm deleted file mode 100644 index 529d36623..000000000 --- a/mc-sema/validator/x86_64/tests/PUSH16r.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; PUSH16r - mov cx, 0x99 - ;TEST_BEGIN_RECORDING - push cx - ;TEST_END_RECORDING - pop cx - diff --git a/mc-sema/validator/x86_64/tests/RCL16r1.asm b/mc-sema/validator/x86_64/tests/RCL16r1.asm deleted file mode 100644 index 0eed413e2..000000000 --- a/mc-sema/validator/x86_64/tests/RCL16r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; RCL16r1 - mov dx, 0x414 - ;TEST_BEGIN_RECORDING - rcl dx, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/RCL16rCL.asm b/mc-sema/validator/x86_64/tests/RCL16rCL.asm deleted file mode 100644 index 067bf1912..000000000 --- a/mc-sema/validator/x86_64/tests/RCL16rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCL16rCL - mov bx, 0x414 - mov cl, 0x3 - ;TEST_BEGIN_RECORDING - rcl bx, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/RCL16ri.asm b/mc-sema/validator/x86_64/tests/RCL16ri.asm deleted file mode 100644 index ec1ea1d3c..000000000 --- a/mc-sema/validator/x86_64/tests/RCL16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCL16ri - mov cx, 0x545 - ;TEST_BEGIN_RECORDING - rcl cx, 0x8 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/RCL32r1.asm b/mc-sema/validator/x86_64/tests/RCL32r1.asm deleted file mode 100644 index 204333f9d..000000000 --- a/mc-sema/validator/x86_64/tests/RCL32r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; RCL32r1 - mov eax, 0x56789 - ;TEST_BEGIN_RECORDING - rcl eax, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/RCL32rCL.asm b/mc-sema/validator/x86_64/tests/RCL32rCL.asm deleted file mode 100644 index b84b1557e..000000000 --- a/mc-sema/validator/x86_64/tests/RCL32rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCL32rCL - mov ebx, 0x4141 - mov cl, 0x2 - ;TEST_BEGIN_RECORDING - rcl ebx, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/RCL32ri.asm b/mc-sema/validator/x86_64/tests/RCL32ri.asm deleted file mode 100644 index 117632920..000000000 --- a/mc-sema/validator/x86_64/tests/RCL32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCL32ri - mov ecx, 0x6789 - ;TEST_BEGIN_RECORDING - rcl ecx, 0x8 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/RCL8r1.asm b/mc-sema/validator/x86_64/tests/RCL8r1.asm deleted file mode 100644 index 1452085a1..000000000 --- a/mc-sema/validator/x86_64/tests/RCL8r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; RCL8r1 - mov ah, 0xa2 - ;TEST_BEGIN_RECORDING - rcl ah, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/RCL8rCL.asm b/mc-sema/validator/x86_64/tests/RCL8rCL.asm deleted file mode 100644 index 1fa1a5f16..000000000 --- a/mc-sema/validator/x86_64/tests/RCL8rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCL8rCL - mov bh, 0x41 - mov cl, 0x4 - ;TEST_BEGIN_RECORDING - rcl bh, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/RCL8ri.asm b/mc-sema/validator/x86_64/tests/RCL8ri.asm deleted file mode 100644 index 392552ad6..000000000 --- a/mc-sema/validator/x86_64/tests/RCL8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCL8ri - mov ch, 0x56 - ;TEST_BEGIN_RECORDING - rcl ch, 0x2 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/RCR16r1.asm b/mc-sema/validator/x86_64/tests/RCR16r1.asm deleted file mode 100644 index b1aeeaaf4..000000000 --- a/mc-sema/validator/x86_64/tests/RCR16r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; RCR16r1 - mov dx, 0x414 - ;TEST_BEGIN_RECORDING - rcr dx, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/RCR16rCL.asm b/mc-sema/validator/x86_64/tests/RCR16rCL.asm deleted file mode 100644 index e6028397a..000000000 --- a/mc-sema/validator/x86_64/tests/RCR16rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCR16rCL - mov bx, 0x414 - mov cl, 0x3 - ;TEST_BEGIN_RECORDING - rcr bx, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/RCR16ri.asm b/mc-sema/validator/x86_64/tests/RCR16ri.asm deleted file mode 100644 index 28e86caa6..000000000 --- a/mc-sema/validator/x86_64/tests/RCR16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCR16ri - mov cx, 0x545 - ;TEST_BEGIN_RECORDING - rcr cx, 0x8 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/RCR32r1.asm b/mc-sema/validator/x86_64/tests/RCR32r1.asm deleted file mode 100644 index 70679c44c..000000000 --- a/mc-sema/validator/x86_64/tests/RCR32r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; RCR32r1 - mov eax, 0x56789 - ;TEST_BEGIN_RECORDING - rcr eax, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/RCR32rCL.asm b/mc-sema/validator/x86_64/tests/RCR32rCL.asm deleted file mode 100644 index ae7a8edbb..000000000 --- a/mc-sema/validator/x86_64/tests/RCR32rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCR32rCL - mov ebx, 0x4141 - mov cl, 0x2 - ;TEST_BEGIN_RECORDING - rcr ebx, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/RCR32ri.asm b/mc-sema/validator/x86_64/tests/RCR32ri.asm deleted file mode 100644 index a5aaef604..000000000 --- a/mc-sema/validator/x86_64/tests/RCR32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCR32ri - mov ecx, 0x6789 - ;TEST_BEGIN_RECORDING - rcr ecx, 0x8 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/RCR8r1.asm b/mc-sema/validator/x86_64/tests/RCR8r1.asm deleted file mode 100644 index 8f2f5dc93..000000000 --- a/mc-sema/validator/x86_64/tests/RCR8r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCR8r1 - mov ah, 0xa2 - ;TEST_BEGIN_RECORDING - rcr ah, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/RCR8rCL.asm b/mc-sema/validator/x86_64/tests/RCR8rCL.asm deleted file mode 100644 index fcdc8e2be..000000000 --- a/mc-sema/validator/x86_64/tests/RCR8rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCR8rCL - mov bh, 0x41 - mov cl, 0x4 - ;TEST_BEGIN_RECORDING - rcr bh, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/RCR8ri.asm b/mc-sema/validator/x86_64/tests/RCR8ri.asm deleted file mode 100644 index 65bcaab6e..000000000 --- a/mc-sema/validator/x86_64/tests/RCR8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; RCR8ri - mov ch, 0x56 - ;TEST_BEGIN_RECORDING - rcr ch, 0x2 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ROL16r1.asm b/mc-sema/validator/x86_64/tests/ROL16r1.asm deleted file mode 100644 index bdf97b178..000000000 --- a/mc-sema/validator/x86_64/tests/ROL16r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROL16r1 - mov dx, 0x414 - ;TEST_BEGIN_RECORDING - rol dx, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ROL16rCL.asm b/mc-sema/validator/x86_64/tests/ROL16rCL.asm deleted file mode 100644 index 3dc9ef3c4..000000000 --- a/mc-sema/validator/x86_64/tests/ROL16rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROL16rCL - mov bx, 0x414 - mov cl, 0x3 - ;TEST_BEGIN_RECORDING - rol bx, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ROL16ri.asm b/mc-sema/validator/x86_64/tests/ROL16ri.asm deleted file mode 100644 index 1ce4724ab..000000000 --- a/mc-sema/validator/x86_64/tests/ROL16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROL16ri - mov cx, 0x545 - ;TEST_BEGIN_RECORDING - rol cx, 0x8 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ROL32r1.asm b/mc-sema/validator/x86_64/tests/ROL32r1.asm deleted file mode 100644 index ab0b2d7e5..000000000 --- a/mc-sema/validator/x86_64/tests/ROL32r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ROL32r1 - mov eax, 0x56789 - ;TEST_BEGIN_RECORDING - rol eax, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ROL32rCL.asm b/mc-sema/validator/x86_64/tests/ROL32rCL.asm deleted file mode 100644 index 33f05e0ae..000000000 --- a/mc-sema/validator/x86_64/tests/ROL32rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROL32rCL - mov ebx, 0x4141 - mov cl, 0x2 - ;TEST_BEGIN_RECORDING - rol ebx, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ROL32ri.asm b/mc-sema/validator/x86_64/tests/ROL32ri.asm deleted file mode 100644 index ddcb69c04..000000000 --- a/mc-sema/validator/x86_64/tests/ROL32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROL32ri - mov ecx, 0x6789 - ;TEST_BEGIN_RECORDING - rol ecx, 0x8 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ROL8r1.asm b/mc-sema/validator/x86_64/tests/ROL8r1.asm deleted file mode 100644 index 2c4960eb5..000000000 --- a/mc-sema/validator/x86_64/tests/ROL8r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; ROL8r1 - mov ah, 0xa2 - ;TEST_BEGIN_RECORDING - rol ah, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ROL8rCL.asm b/mc-sema/validator/x86_64/tests/ROL8rCL.asm deleted file mode 100644 index ac1224213..000000000 --- a/mc-sema/validator/x86_64/tests/ROL8rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROL8rCL - mov bh, 0x41 - mov cl, 0x4 - ;TEST_BEGIN_RECORDING - rol bh, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ROL8ri.asm b/mc-sema/validator/x86_64/tests/ROL8ri.asm deleted file mode 100644 index fb6a2dcf5..000000000 --- a/mc-sema/validator/x86_64/tests/ROL8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROL8ri - mov ch, 0x56 - ;TEST_BEGIN_RECORDING - rol ch, 0x2 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ROR16r1.asm b/mc-sema/validator/x86_64/tests/ROR16r1.asm deleted file mode 100644 index 69a00d959..000000000 --- a/mc-sema/validator/x86_64/tests/ROR16r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROR16r1 - mov dx, 0x414 - ;TEST_BEGIN_RECORDING - ror dx, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ROR16rCL.asm b/mc-sema/validator/x86_64/tests/ROR16rCL.asm deleted file mode 100644 index 8e6363664..000000000 --- a/mc-sema/validator/x86_64/tests/ROR16rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROR16rCL - mov bx, 0x414 - mov cl, 0x3 - ;TEST_BEGIN_RECORDING - ror bx, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ROR16ri.asm b/mc-sema/validator/x86_64/tests/ROR16ri.asm deleted file mode 100644 index c66426a7e..000000000 --- a/mc-sema/validator/x86_64/tests/ROR16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROR16ri - mov cx, 0x545 - ;TEST_BEGIN_RECORDING - ror cx, 0x8 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ROR32r1.asm b/mc-sema/validator/x86_64/tests/ROR32r1.asm deleted file mode 100644 index ebfcb18e6..000000000 --- a/mc-sema/validator/x86_64/tests/ROR32r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROR32r1 - mov eax, 0x56789 - ;TEST_BEGIN_RECORDING - ror eax, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ROR32rCL.asm b/mc-sema/validator/x86_64/tests/ROR32rCL.asm deleted file mode 100644 index f646181da..000000000 --- a/mc-sema/validator/x86_64/tests/ROR32rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROR32rCL - mov ebx, 0x4141 - mov cl, 0x2 - ;TEST_BEGIN_RECORDING - ror ebx, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ROR32ri.asm b/mc-sema/validator/x86_64/tests/ROR32ri.asm deleted file mode 100644 index 9544fd553..000000000 --- a/mc-sema/validator/x86_64/tests/ROR32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROR32ri - mov ecx, 0x6789 - ;TEST_BEGIN_RECORDING - ror ecx, 0x8 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ROR8r1.asm b/mc-sema/validator/x86_64/tests/ROR8r1.asm deleted file mode 100644 index f859853e6..000000000 --- a/mc-sema/validator/x86_64/tests/ROR8r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROR8r1 - mov ah, 0xa2 - ;TEST_BEGIN_RECORDING - ror ah, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ROR8rCL.asm b/mc-sema/validator/x86_64/tests/ROR8rCL.asm deleted file mode 100644 index cdd6e834f..000000000 --- a/mc-sema/validator/x86_64/tests/ROR8rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROR8rCL - mov bh, 0x41 - mov cl, 0x4 - ;TEST_BEGIN_RECORDING - ror bh, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ROR8ri.asm b/mc-sema/validator/x86_64/tests/ROR8ri.asm deleted file mode 100644 index bcd508b25..000000000 --- a/mc-sema/validator/x86_64/tests/ROR8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; ROR8ri - mov ch, 0x56 - ;TEST_BEGIN_RECORDING - ror ch, 0x2 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SAHF.asm b/mc-sema/validator/x86_64/tests/SAHF.asm deleted file mode 100644 index 970130be0..000000000 --- a/mc-sema/validator/x86_64/tests/SAHF.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SAHF - mov ah, 0xD5 - ;TEST_BEGIN_RECORDING - sahf - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SBB16i16.asm b/mc-sema/validator/x86_64/tests/SBB16i16.asm deleted file mode 100644 index 89b234dc3..000000000 --- a/mc-sema/validator/x86_64/tests/SBB16i16.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SBB16i16 - mov ax, 0x7 - ;TEST_BEGIN_RECORDING - sbb ax, 0xeeee - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SBB16ri.asm b/mc-sema/validator/x86_64/tests/SBB16ri.asm deleted file mode 100644 index bc6c95bb7..000000000 --- a/mc-sema/validator/x86_64/tests/SBB16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SBB16ri - mov bx, 0x7 - ;TEST_BEGIN_RECORDING - sbb bx, 0x444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SBB16rr.asm b/mc-sema/validator/x86_64/tests/SBB16rr.asm deleted file mode 100644 index c81233685..000000000 --- a/mc-sema/validator/x86_64/tests/SBB16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SBB16rr - mov cx, 0x0 - mov dx, 0x1 - ;TEST_BEGIN_RECORDING - sbb cx, dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SBB32i32.asm b/mc-sema/validator/x86_64/tests/SBB32i32.asm deleted file mode 100644 index c28e53978..000000000 --- a/mc-sema/validator/x86_64/tests/SBB32i32.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SBB32i32 - mov eax, 0x7 - ;TEST_BEGIN_RECORDING - sbb eax, 0x6fffffff - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SBB32mr.asm b/mc-sema/validator/x86_64/tests/SBB32mr.asm deleted file mode 100644 index 1ea0f425e..000000000 --- a/mc-sema/validator/x86_64/tests/SBB32mr.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SBB32mr - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0x4] - mov DWORD [rdi], 0xabcd4321 - mov eax, 0x56781234 - sbb [rdi], eax - mov edx, [rdi] - mov rdi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SBB32ri.asm b/mc-sema/validator/x86_64/tests/SBB32ri.asm deleted file mode 100644 index 4d4d7295e..000000000 --- a/mc-sema/validator/x86_64/tests/SBB32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Sbb32RI - ;TEST_BEGIN_RECORDING - sbb eax, 0x44 - sbb ecx, 0x43 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SBB32rm.asm b/mc-sema/validator/x86_64/tests/SBB32rm.asm deleted file mode 100644 index 6d4f3e4a7..000000000 --- a/mc-sema/validator/x86_64/tests/SBB32rm.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SBB32rm - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0x4] - mov DWORD [rdi], 0x1234abcd - mov eax, 0x56781234 - sbb eax, [rdi] - mov rdi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SBB32rr.asm b/mc-sema/validator/x86_64/tests/SBB32rr.asm deleted file mode 100644 index 29ba721b5..000000000 --- a/mc-sema/validator/x86_64/tests/SBB32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SBB32rr - mov ecx, 0x0 - mov edx, 0x1 - ;TEST_BEGIN_RECORDING - sbb ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SBB8i8.asm b/mc-sema/validator/x86_64/tests/SBB8i8.asm deleted file mode 100644 index 621d9bb62..000000000 --- a/mc-sema/validator/x86_64/tests/SBB8i8.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SBB8i8 - mov al, 0x7 - ;TEST_BEGIN_RECORDING - sbb al, 0x5 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SBB8ri.asm b/mc-sema/validator/x86_64/tests/SBB8ri.asm deleted file mode 100644 index 9cd1e005f..000000000 --- a/mc-sema/validator/x86_64/tests/SBB8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SBB8ri - mov ah, 0x99 - ;TEST_BEGIN_RECORDING - sbb ah, 0x3 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SBB8rr.asm b/mc-sema/validator/x86_64/tests/SBB8rr.asm deleted file mode 100644 index f11f09a7d..000000000 --- a/mc-sema/validator/x86_64/tests/SBB8rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SBB8rr - mov ch, 0x2 - mov dh, 0x3 - ;TEST_BEGIN_RECORDING - sbb ch, dh - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SETAr.asm b/mc-sema/validator/x86_64/tests/SETAr.asm deleted file mode 100644 index a3d42a2fc..000000000 --- a/mc-sema/validator/x86_64/tests/SETAr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SETA - mov ecx, 0x100 - mov ebx, 0x0F0 - cmp ecx, ebx - ;TEST_BEGIN_RECORDING - seta al - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/SETBr.asm b/mc-sema/validator/x86_64/tests/SETBr.asm deleted file mode 100644 index 4df250ed9..000000000 --- a/mc-sema/validator/x86_64/tests/SETBr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SETB - mov ecx, 0x010 - mov ebx, 0x0F0 - cmp ecx, ebx - ;TEST_BEGIN_RECORDING - setb al - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/SETEr.asm b/mc-sema/validator/x86_64/tests/SETEr.asm deleted file mode 100644 index da7b90a7a..000000000 --- a/mc-sema/validator/x86_64/tests/SETEr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SETE - mov ecx, 0x010 - mov ebx, 0x010 - cmp ecx, ebx - ;TEST_BEGIN_RECORDING - sete al - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/SETGEr.asm b/mc-sema/validator/x86_64/tests/SETGEr.asm deleted file mode 100644 index 77b760d41..000000000 --- a/mc-sema/validator/x86_64/tests/SETGEr.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SETGE - mov ecx, 0x010 - mov ebx, 0x010 - cmp ecx, ebx - ;TEST_BEGIN_RECORDING - setge al - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SETGr.asm b/mc-sema/validator/x86_64/tests/SETGr.asm deleted file mode 100644 index ef05d5cfe..000000000 --- a/mc-sema/validator/x86_64/tests/SETGr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - mov ecx, 0x111 - mov ebx, 0x222 - cmp ecx, ebx - ;TEST_BEGIN_RECORDING - setg al - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SETLEr.asm b/mc-sema/validator/x86_64/tests/SETLEr.asm deleted file mode 100644 index 67eba303e..000000000 --- a/mc-sema/validator/x86_64/tests/SETLEr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SETLE - mov ecx, 0x111 - mov ebx, 0x111 - cmp ecx, ebx - ;TEST_BEGIN_RECORDING - setle al - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/SETLr.asm b/mc-sema/validator/x86_64/tests/SETLr.asm deleted file mode 100644 index 6d7b79b41..000000000 --- a/mc-sema/validator/x86_64/tests/SETLr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SETL - mov ecx, 0x111 - mov ebx, 0x010 - cmp ecx, ebx - ;TEST_BEGIN_RECORDING - setl al - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/SETNEm.asm b/mc-sema/validator/x86_64/tests/SETNEm.asm deleted file mode 100644 index 71d9db561..000000000 --- a/mc-sema/validator/x86_64/tests/SETNEm.asm +++ /dev/null @@ -1,17 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; SETNEm - mov ecx, 0x5 - mov ebx, 0xa - cmp ecx, ebx - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0x4] - mov DWORD [rdi], 0xc - setne [rdi] - mov eax, [rdi] - xor edi, edi - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SETNEr.asm b/mc-sema/validator/x86_64/tests/SETNEr.asm deleted file mode 100644 index 75424e3ea..000000000 --- a/mc-sema/validator/x86_64/tests/SETNEr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SETNEr - mov ecx, 0x5 - mov ebx, 0xa - cmp ecx, ebx - ;TEST_BEGIN_RECORDING - setne al - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/SETSr.asm b/mc-sema/validator/x86_64/tests/SETSr.asm deleted file mode 100644 index 636d45cb3..000000000 --- a/mc-sema/validator/x86_64/tests/SETSr.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - mov ecx, 0x0 - mov ebx, 0x222 - cmp ecx, ebx - ;TEST_BEGIN_RECORDING - sets al - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/SHL16r1.asm b/mc-sema/validator/x86_64/tests/SHL16r1.asm deleted file mode 100644 index 544989c8f..000000000 --- a/mc-sema/validator/x86_64/tests/SHL16r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHL16r1 - mov ax, 0x7 - ;TEST_BEGIN_RECORDING - shl ax, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SHL16rCL.asm b/mc-sema/validator/x86_64/tests/SHL16rCL.asm deleted file mode 100644 index 87490b5cc..000000000 --- a/mc-sema/validator/x86_64/tests/SHL16rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; Shl16RCL - mov ax, 0x14fc - mov cl, 0x5 - ;TEST_BEGIN_RECORDING - shl ax, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SHL16ri.asm b/mc-sema/validator/x86_64/tests/SHL16ri.asm deleted file mode 100644 index 60b6cacb2..000000000 --- a/mc-sema/validator/x86_64/tests/SHL16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHL16ri - mov cx, 0x78 - ;TEST_BEGIN_RECORDING - shl cx, 0x8 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SHL32r1.asm b/mc-sema/validator/x86_64/tests/SHL32r1.asm deleted file mode 100644 index 1deb3448a..000000000 --- a/mc-sema/validator/x86_64/tests/SHL32r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHL32r1 - mov eax, 0x888 - ;TEST_BEGIN_RECORDING - shl eax, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SHL32rCL.asm b/mc-sema/validator/x86_64/tests/SHL32rCL.asm deleted file mode 100644 index efe4c2375..000000000 --- a/mc-sema/validator/x86_64/tests/SHL32rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHL32rCL - mov ebx, 0xbfe - mov cl, 0x1 - ;TEST_BEGIN_RECORDING - shl ebx, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SHL32ri.asm b/mc-sema/validator/x86_64/tests/SHL32ri.asm deleted file mode 100644 index 8718a6216..000000000 --- a/mc-sema/validator/x86_64/tests/SHL32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; Shl32RI - mov eax, 0x1 - ;TEST_BEGIN_RECORDING - shl eax, 0xa - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SHL8r1.asm b/mc-sema/validator/x86_64/tests/SHL8r1.asm deleted file mode 100644 index 3a3c9249d..000000000 --- a/mc-sema/validator/x86_64/tests/SHL8r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHL8r1 - mov ah, 0xd - ;TEST_BEGIN_RECORDING - shl ah, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SHL8rCL.asm b/mc-sema/validator/x86_64/tests/SHL8rCL.asm deleted file mode 100644 index f86988ca1..000000000 --- a/mc-sema/validator/x86_64/tests/SHL8rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHL8rCL - mov bh, 0xa - mov cl, 0x3 - ;TEST_BEGIN_RECORDING - shl bh, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SHL8ri.asm b/mc-sema/validator/x86_64/tests/SHL8ri.asm deleted file mode 100644 index e3728ee33..000000000 --- a/mc-sema/validator/x86_64/tests/SHL8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHL8ri - mov ch, 0xa - ;TEST_BEGIN_RECORDING - shl ch, 0x2 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SHR16r1.asm b/mc-sema/validator/x86_64/tests/SHR16r1.asm deleted file mode 100644 index e74372ab8..000000000 --- a/mc-sema/validator/x86_64/tests/SHR16r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHR16r1 - mov ax, 0xe45 - ;TEST_BEGIN_RECORDING - shr ax, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SHR16rCL.asm b/mc-sema/validator/x86_64/tests/SHR16rCL.asm deleted file mode 100644 index 54e697075..000000000 --- a/mc-sema/validator/x86_64/tests/SHR16rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; Shr16RCL - mov ax, 0x14FC - mov cl, 0x5 - ;TEST_BEGIN_RECORDING - shr ax, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SHR16ri.asm b/mc-sema/validator/x86_64/tests/SHR16ri.asm deleted file mode 100644 index 978f9782a..000000000 --- a/mc-sema/validator/x86_64/tests/SHR16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHR16ri - mov cx, 0x987 - ;TEST_BEGIN_RECORDING - shr cx, 0x8 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SHR32r1.asm b/mc-sema/validator/x86_64/tests/SHR32r1.asm deleted file mode 100644 index 221eab232..000000000 --- a/mc-sema/validator/x86_64/tests/SHR32r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHR32r1 - mov eax, 0x444444 - ;TEST_BEGIN_RECORDING - shr eax, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SHR32rCL.asm b/mc-sema/validator/x86_64/tests/SHR32rCL.asm deleted file mode 100644 index d73a9ece4..000000000 --- a/mc-sema/validator/x86_64/tests/SHR32rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHR32rCL - mov ebx, 0x654 - mov cl, 0x5 - ;TEST_BEGIN_RECORDING - shr ebx, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SHR32ri.asm b/mc-sema/validator/x86_64/tests/SHR32ri.asm deleted file mode 100644 index 871c15f6c..000000000 --- a/mc-sema/validator/x86_64/tests/SHR32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; Shr32RI - mov eax, 0x4096 - ;TEST_BEGIN_RECORDING - shr eax, 0x6 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SHR8r1.asm b/mc-sema/validator/x86_64/tests/SHR8r1.asm deleted file mode 100644 index 0218dc23b..000000000 --- a/mc-sema/validator/x86_64/tests/SHR8r1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; Shr8R1 - mov al, 0x4F - ;TEST_BEGIN_RECORDING - shr al, 0x1 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SHR8rCL.asm b/mc-sema/validator/x86_64/tests/SHR8rCL.asm deleted file mode 100644 index 421d1416a..000000000 --- a/mc-sema/validator/x86_64/tests/SHR8rCL.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHR8rCL - mov bh, 0xe - mov cl, 0x2 - ;TEST_BEGIN_RECORDING - shr bh, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SHR8ri.asm b/mc-sema/validator/x86_64/tests/SHR8ri.asm deleted file mode 100644 index d37349487..000000000 --- a/mc-sema/validator/x86_64/tests/SHR8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; SHR8ri - mov ch, 0x8 - ;TEST_BEGIN_RECORDING - shr ch, 0x2 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SHRD32rri8.asm b/mc-sema/validator/x86_64/tests/SHRD32rri8.asm deleted file mode 100644 index 93f24dde2..000000000 --- a/mc-sema/validator/x86_64/tests/SHRD32rri8.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; Shr32RI - mov ebx, 0x00000010 - mov eax, 0x00001000 - ;TEST_BEGIN_RECORDING - shrd eax,ebx,16 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SHUFPDrmi.asm b/mc-sema/validator/x86_64/tests/SHUFPDrmi.asm deleted file mode 100644 index 0f49812a6..000000000 --- a/mc-sema/validator/x86_64/tests/SHUFPDrmi.asm +++ /dev/null @@ -1,30 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -; load a 128 bit value into xmm0 -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] - -lea rcx, [rcx+16] -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e - -shufpd xmm0, [rcx], 0x2 -mov rcx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/SHUFPDrri.asm b/mc-sema/validator/x86_64/tests/SHUFPDrri.asm deleted file mode 100644 index 32d8b3663..000000000 --- a/mc-sema/validator/x86_64/tests/SHUFPDrri.asm +++ /dev/null @@ -1,32 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -; load a 128 bit value into xmm0 -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] - -lea rcx, [rcx+16] -; load a 128 bit value into xmm1 -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e -movaps xmm1, [rcx] - -;TEST_BEGIN_RECORDING -shufpd xmm0, xmm1, 0x2 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/SHUFPSrri.asm b/mc-sema/validator/x86_64/tests/SHUFPSrri.asm deleted file mode 100644 index 62d8d69d7..000000000 --- a/mc-sema/validator/x86_64/tests/SHUFPSrri.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 3 to a double precision float and store in xmm0 -mov ecx, 3 -cvtsi2sd xmm0, ecx - -; convert 7 to a double precision float and store in xmm1 -mov ecx, 7 -cvtsi2sd xmm1, ecx - -;TEST_BEGIN_RECORDING -shufps xmm0, xmm1, 0x82 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/STC.asm b/mc-sema/validator/x86_64/tests/STC.asm deleted file mode 100644 index fcd906e67..000000000 --- a/mc-sema/validator/x86_64/tests/STC.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Stc - ;TEST_BEGIN_RECORDING - stc - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/STD.asm b/mc-sema/validator/x86_64/tests/STD.asm deleted file mode 100644 index 3875bbdff..000000000 --- a/mc-sema/validator/x86_64/tests/STD.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Std - ;TEST_BEGIN_RECORDING - std - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ST_F32m.asm b/mc-sema/validator/x86_64/tests/ST_F32m.asm deleted file mode 100644 index a8290eee7..000000000 --- a/mc-sema/validator/x86_64/tests/ST_F32m.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - ; ST_F32m - FLD1 - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0x4] - fst DWORD [rdi] - mov eax, [rdi] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ST_F64m.asm b/mc-sema/validator/x86_64/tests/ST_F64m.asm deleted file mode 100644 index 546d140bd..000000000 --- a/mc-sema/validator/x86_64/tests/ST_F64m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - ; ST_F64m - FLD1 - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0x10] - fst QWORD [rdi] - mov eax, [rdi+0x00] - mov ebx, [rdi+0x04] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ST_Frr.asm b/mc-sema/validator/x86_64/tests/ST_Frr.asm deleted file mode 100644 index 6ef9cc9d5..000000000 --- a/mc-sema/validator/x86_64/tests/ST_Frr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - ; ST_Frr - fldpi - fldpi - ;TEST_BEGIN_RECORDING - fst st2 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ST_PF32m.asm b/mc-sema/validator/x86_64/tests/ST_PF32m.asm deleted file mode 100644 index e9db9ee77..000000000 --- a/mc-sema/validator/x86_64/tests/ST_PF32m.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - FLD1 - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0xc] - mov dword [rdi], 0 - fstp dword [rdi] - mov eax, dword [rdi] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ST_PF64m.asm b/mc-sema/validator/x86_64/tests/ST_PF64m.asm deleted file mode 100644 index 9c9b99eac..000000000 --- a/mc-sema/validator/x86_64/tests/ST_PF64m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - FLD1 - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0xc] - mov dword [rdi], 0 - fstp qword [rdi] - mov eax, dword [rdi+00] - mov ebx, dword [rdi+04] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ST_PF80m.asm b/mc-sema/validator/x86_64/tests/ST_PF80m.asm deleted file mode 100644 index 8cfa1ff9c..000000000 --- a/mc-sema/validator/x86_64/tests/ST_PF80m.asm +++ /dev/null @@ -1,18 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - FLD1 - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0x10] - mov dword [rdi+0x00], 0 - mov dword [rdi+0x04], 0 - mov dword [rdi+0x08], 0 - fstp tword [rdi] - mov eax, dword [rdi+00] - mov ebx, dword [rdi+04] - mov ecx, dword [rdi+08] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/ST_PFr.asm b/mc-sema/validator/x86_64/tests/ST_PFr.asm deleted file mode 100644 index a56d4b54f..000000000 --- a/mc-sema/validator/x86_64/tests/ST_PFr.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_IE -;TEST_FILE_META_END - ; ST_Frr - fldpi - ;TEST_BEGIN_RECORDING - fstp st2 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SUB16i16.asm b/mc-sema/validator/x86_64/tests/SUB16i16.asm deleted file mode 100644 index a9128fc12..000000000 --- a/mc-sema/validator/x86_64/tests/SUB16i16.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SUB16i16 - mov ax, 0xa123 - ;TEST_BEGIN_RECORDING - sub ax, 0xeeee - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SUB16mr.asm b/mc-sema/validator/x86_64/tests/SUB16mr.asm deleted file mode 100644 index 6dd8dd8a2..000000000 --- a/mc-sema/validator/x86_64/tests/SUB16mr.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SUB16mr - ;TEST_BEGIN_RECORDING - lea rbx, [rsp-0x4] - mov DWORD [rbx], 0xc8 - mov ecx, 0x3 - sub WORD [rbx], cx - mov ebx, [rbx] - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SUB16ri.asm b/mc-sema/validator/x86_64/tests/SUB16ri.asm deleted file mode 100644 index 90af37266..000000000 --- a/mc-sema/validator/x86_64/tests/SUB16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SUB16ri - mov bx, 0x2 - ;TEST_BEGIN_RECORDING - sub bx, 0x444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SUB16rm.asm b/mc-sema/validator/x86_64/tests/SUB16rm.asm deleted file mode 100644 index 8b4d4c46d..000000000 --- a/mc-sema/validator/x86_64/tests/SUB16rm.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF -;TEST_FILE_META_END - ; SUB16rm - ;TEST_BEGIN_RECORDING - lea rcx, [rsp-0x4] - mov DWORD [rcx], 0xc8 - mov rdx, 0x3 - sub dx, WORD [rcx] - mov edx, DWORD [rcx] - mov rcx, 0 - ;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/SUB32i32.asm b/mc-sema/validator/x86_64/tests/SUB32i32.asm deleted file mode 100644 index 8da49077d..000000000 --- a/mc-sema/validator/x86_64/tests/SUB32i32.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SUB32i32 - mov eax, 0x8 - ;TEST_BEGIN_RECORDING - sub eax, 0x6fffffff - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SUB32ri.asm b/mc-sema/validator/x86_64/tests/SUB32ri.asm deleted file mode 100644 index 77fc6cb14..000000000 --- a/mc-sema/validator/x86_64/tests/SUB32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SUB32ri - mov ebx, 0xc - ;TEST_BEGIN_RECORDING - sub ebx, 0x44444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SUB32rr.asm b/mc-sema/validator/x86_64/tests/SUB32rr.asm deleted file mode 100644 index c44a759ec..000000000 --- a/mc-sema/validator/x86_64/tests/SUB32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Sub32RR - mov eax, 0x1 - mov ebx, 0x2 - ;TEST_BEGIN_RECORDING - sub ebx, eax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SUB8i8.asm b/mc-sema/validator/x86_64/tests/SUB8i8.asm deleted file mode 100644 index 93a24674e..000000000 --- a/mc-sema/validator/x86_64/tests/SUB8i8.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SUB8i8 - mov al, 0xa1 - ;TEST_BEGIN_RECORDING - sub al, 0x5 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SUB8mr.asm b/mc-sema/validator/x86_64/tests/SUB8mr.asm deleted file mode 100644 index 2d4d2ec43..000000000 --- a/mc-sema/validator/x86_64/tests/SUB8mr.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SUB8mr - ;TEST_BEGIN_RECORDING - lea rax, [rsp-0x4] - mov DWORD [rax], 0xc8 - mov ebx, 0x2 - sub BYTE [rax], bl - mov eax, [rax] - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SUB8ri.asm b/mc-sema/validator/x86_64/tests/SUB8ri.asm deleted file mode 100644 index a9ce95a67..000000000 --- a/mc-sema/validator/x86_64/tests/SUB8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SUB8ri - mov ah, 0xdd - ;TEST_BEGIN_RECORDING - sub ah, 0x3 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SUB8rm.asm b/mc-sema/validator/x86_64/tests/SUB8rm.asm deleted file mode 100644 index bf98ee635..000000000 --- a/mc-sema/validator/x86_64/tests/SUB8rm.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; SUB8rm - ;TEST_BEGIN_RECORDING - lea rax, [rsp-0x4] - mov DWORD [rax], 0xc8 - mov ebx, 0x2 - sub bl, BYTE [rax] - mov eax, [rax] - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SUBR_F32m.asm b/mc-sema/validator/x86_64/tests/SUBR_F32m.asm deleted file mode 100644 index ce06fd3a2..000000000 --- a/mc-sema/validator/x86_64/tests/SUBR_F32m.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - -FLDPI -;TEST_BEGIN_RECORDING -lea rdi, [rsp-0xc] -FST dword [rdi] -FSUBR dword [rdi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SUBR_F64m.asm b/mc-sema/validator/x86_64/tests/SUBR_F64m.asm deleted file mode 100644 index 0fe20c247..000000000 --- a/mc-sema/validator/x86_64/tests/SUBR_F64m.asm +++ /dev/null @@ -1,16 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 to be 1.0 -FLD1 -;TEST_BEGIN_RECORDING -lea rdi, [rsp-08] -; 3.1415926 or there about -mov dword [rdi+00], 0x54442d18 -mov dword [rdi+04], 0x400921fb -FSUBR qword [rdi] -mov edi, 0 -;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/SUBR_FST0r.asm b/mc-sema/validator/x86_64/tests/SUBR_FST0r.asm deleted file mode 100644 index cbb170378..000000000 --- a/mc-sema/validator/x86_64/tests/SUBR_FST0r.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 and st1 to be pi -FLDPI -FLDPI -;TEST_BEGIN_RECORDING -FSUBR st0, st1 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SUBR_FrST0.asm b/mc-sema/validator/x86_64/tests/SUBR_FrST0.asm deleted file mode 100644 index bfdf23003..000000000 --- a/mc-sema/validator/x86_64/tests/SUBR_FrST0.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 and st1 to be pi -FLDPI -FLDPI -;TEST_BEGIN_RECORDING -FSUBR st1, st0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SUBSDrm.asm b/mc-sema/validator/x86_64/tests/SUBSDrm.asm deleted file mode 100644 index d0ae4ab1c..000000000 --- a/mc-sema/validator/x86_64/tests/SUBSDrm.asm +++ /dev/null @@ -1,22 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 1 to a double precision float and store in xmm0 -mov ecx, 1 -cvtsi2sd xmm0, ecx - -;TEST_BEGIN_RECORDING -; load 2.5 (in double precision float form) -lea rcx, [rsp-8] -mov DWORD [rcx], 0 -mov DWORD [rcx+4], 0x40040000 - -subsd xmm0, [rcx] -mov ecx, [rcx] -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/SUBSDrr.asm b/mc-sema/validator/x86_64/tests/SUBSDrr.asm deleted file mode 100644 index 90937da6f..000000000 --- a/mc-sema/validator/x86_64/tests/SUBSDrr.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 3 to a double precision float and store in xmm0 -mov ecx, 3 -cvtsi2sd xmm0, ecx - -; convert 1 to a double precision float and store in xmm1 -mov ecx, 1 -cvtsi2sd xmm1, ecx - -;TEST_BEGIN_RECORDING -subsd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/SUBSSrm.asm b/mc-sema/validator/x86_64/tests/SUBSSrm.asm deleted file mode 100644 index 70ce48867..000000000 --- a/mc-sema/validator/x86_64/tests/SUBSSrm.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 1 to a double precision float and store in xmm0 -mov ecx, 1 -cvtsi2ss xmm0, ecx - -;TEST_BEGIN_RECORDING -; load 1.5 (in double precision float form) -lea rcx, [rsp-4] -mov DWORD [rcx], 0x3fc00000 - -subss xmm0, [rcx] -mov ecx, [rcx] -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/SUBSSrr.asm b/mc-sema/validator/x86_64/tests/SUBSSrr.asm deleted file mode 100644 index 32f8057cd..000000000 --- a/mc-sema/validator/x86_64/tests/SUBSSrr.asm +++ /dev/null @@ -1,21 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; convert 3 to a double precision float and store in xmm0 -mov ecx, 3 -cvtsi2ss xmm0, ecx - -; convert 1 to a double precision float and store in xmm1 -mov ecx, 1 -cvtsi2ss xmm1, ecx - -;TEST_BEGIN_RECORDING -subss xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/SUB_F32m.asm b/mc-sema/validator/x86_64/tests/SUB_F32m.asm deleted file mode 100644 index 1434f3d0e..000000000 --- a/mc-sema/validator/x86_64/tests/SUB_F32m.asm +++ /dev/null @@ -1,14 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_C1|FLAG_FPU_PE -;TEST_FILE_META_END - -FLDPI -;TEST_BEGIN_RECORDING -lea rdi, [rsp-0xc] -FST dword [rdi] -FSUB dword [rdi] -mov edi, 0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SUB_F64m.asm b/mc-sema/validator/x86_64/tests/SUB_F64m.asm deleted file mode 100644 index 59423ded2..000000000 --- a/mc-sema/validator/x86_64/tests/SUB_F64m.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_FPU_PE|FLAG_FPU_C1 -;TEST_FILE_META_END - -; set up st0 to be 1.0 -FLD1 -FLDPI -;TEST_BEGIN_RECORDING -lea rdi, [rsp-0xc] -FSTP qword [rdi] -FSUB qword [rdi] -mov edi, 0 -;TEST_END_RECORDING diff --git a/mc-sema/validator/x86_64/tests/SUB_FST0r.asm b/mc-sema/validator/x86_64/tests/SUB_FST0r.asm deleted file mode 100644 index f33fea1f3..000000000 --- a/mc-sema/validator/x86_64/tests/SUB_FST0r.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 and st1 to be pi -FLDPI -FLDPI -;TEST_BEGIN_RECORDING -FSUB st0, st1 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/SUB_FrST0.asm b/mc-sema/validator/x86_64/tests/SUB_FrST0.asm deleted file mode 100644 index cbda583be..000000000 --- a/mc-sema/validator/x86_64/tests/SUB_FrST0.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; set up st0 and st1 to be pi -FLDPI -FLDPI -;TEST_BEGIN_RECORDING -FSUB st1, st0 -;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/Sar32RI1.asm b/mc-sema/validator/x86_64/tests/Sar32RI1.asm deleted file mode 100644 index 511270e4e..000000000 --- a/mc-sema/validator/x86_64/tests/Sar32RI1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; Sar32RI1 - mov ebx, 0x56 - ;TEST_BEGIN_RECORDING - sar ebx, 0x3 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/Sar32RI2.asm b/mc-sema/validator/x86_64/tests/Sar32RI2.asm deleted file mode 100644 index 5b648cf65..000000000 --- a/mc-sema/validator/x86_64/tests/Sar32RI2.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF|FLAG_OF -;TEST_FILE_META_END - ; Sar32RI2 - ;TEST_BEGIN_RECORDING - sar ebx, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/Sbb32RR1.asm b/mc-sema/validator/x86_64/tests/Sbb32RR1.asm deleted file mode 100644 index 63049256f..000000000 --- a/mc-sema/validator/x86_64/tests/Sbb32RR1.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Sbb32RR1 - mov ecx, 0x1892 - mov edx, 0x4 - ;TEST_BEGIN_RECORDING - sbb edx, ecx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/Sbb32RR2.asm b/mc-sema/validator/x86_64/tests/Sbb32RR2.asm deleted file mode 100644 index 531fa35e1..000000000 --- a/mc-sema/validator/x86_64/tests/Sbb32RR2.asm +++ /dev/null @@ -1,13 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Sbb32RR2 - clc - mov ecx, 0xffffff67 - mov edx, 0x19 - ;TEST_BEGIN_RECORDING - sbb edx, ecx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/TEST16i16.asm b/mc-sema/validator/x86_64/tests/TEST16i16.asm deleted file mode 100644 index 3bb321428..000000000 --- a/mc-sema/validator/x86_64/tests/TEST16i16.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; TEST16i16 - mov ax, 0x7 - ;TEST_BEGIN_RECORDING - test ax, 0xeeee - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/TEST16ri.asm b/mc-sema/validator/x86_64/tests/TEST16ri.asm deleted file mode 100644 index 0e2ea1d4e..000000000 --- a/mc-sema/validator/x86_64/tests/TEST16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; TEST16ri - mov bx, 0x7 - ;TEST_BEGIN_RECORDING - test bx, 0x444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/TEST16rr.asm b/mc-sema/validator/x86_64/tests/TEST16rr.asm deleted file mode 100644 index 4f08da285..000000000 --- a/mc-sema/validator/x86_64/tests/TEST16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; TEST16rr - mov cx, 0x0 - mov dx, 0x1 - ;TEST_BEGIN_RECORDING - test cx, dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/TEST32i32.asm b/mc-sema/validator/x86_64/tests/TEST32i32.asm deleted file mode 100644 index 0a9fd61cd..000000000 --- a/mc-sema/validator/x86_64/tests/TEST32i32.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; TEST32i32 - mov eax, 0x7 - ;TEST_BEGIN_RECORDING - test eax, 0x6fffffff - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/TEST32ri.asm b/mc-sema/validator/x86_64/tests/TEST32ri.asm deleted file mode 100644 index 378637526..000000000 --- a/mc-sema/validator/x86_64/tests/TEST32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; TEST32ri - mov ebx, 0x7 - ;TEST_BEGIN_RECORDING - test ebx, 0x44444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/TEST32rr.asm b/mc-sema/validator/x86_64/tests/TEST32rr.asm deleted file mode 100644 index d803c888c..000000000 --- a/mc-sema/validator/x86_64/tests/TEST32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; TEST32rr - mov ecx, 0x0 - mov edx, 0x1 - ;TEST_BEGIN_RECORDING - test ecx, edx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/TEST8i8.asm b/mc-sema/validator/x86_64/tests/TEST8i8.asm deleted file mode 100644 index 49d339bde..000000000 --- a/mc-sema/validator/x86_64/tests/TEST8i8.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; TEST8i8 - mov al, 0x7 - ;TEST_BEGIN_RECORDING - test al, 0x5 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/TEST8ri.asm b/mc-sema/validator/x86_64/tests/TEST8ri.asm deleted file mode 100644 index efe21a9d5..000000000 --- a/mc-sema/validator/x86_64/tests/TEST8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; TEST8ri - mov ah, 0x2 - ;TEST_BEGIN_RECORDING - test ah, 0x3 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/TEST8rr.asm b/mc-sema/validator/x86_64/tests/TEST8rr.asm deleted file mode 100644 index 5bb9d7d87..000000000 --- a/mc-sema/validator/x86_64/tests/TEST8rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; TEST8rr - mov ch, 0x2 - mov dh, 0x3 - ;TEST_BEGIN_RECORDING - test ch, dh - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/Test32RR1.asm b/mc-sema/validator/x86_64/tests/Test32RR1.asm deleted file mode 100644 index 0b4047008..000000000 --- a/mc-sema/validator/x86_64/tests/Test32RR1.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; Test32RR1 - mov ebx, 0x0 - ;TEST_BEGIN_RECORDING - test ebx, ebx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/Test32RR2.asm b/mc-sema/validator/x86_64/tests/Test32RR2.asm deleted file mode 100644 index 9358d7666..000000000 --- a/mc-sema/validator/x86_64/tests/Test32RR2.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; Test32RR2 - mov edi, 0x8 - mov eax, 0x12 - ;TEST_BEGIN_RECORDING - test edi, eax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/UCOMISDrm.asm b/mc-sema/validator/x86_64/tests/UCOMISDrm.asm deleted file mode 100644 index 6d1cd251f..000000000 --- a/mc-sema/validator/x86_64/tests/UCOMISDrm.asm +++ /dev/null @@ -1,19 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 -cvtsi2sd xmm0, ecx -mov ecx, 0 -cvtsi2sd xmm1, ecx -;TEST_BEGIN_RECORDING -lea rcx, [rsp-8] -movsd [rcx], xmm1 -ucomiss xmm0, [rcx] -mov ecx, 0 -;TEST_END_RECORDING -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/UCOMISDrr.asm b/mc-sema/validator/x86_64/tests/UCOMISDrr.asm deleted file mode 100644 index 39297654f..000000000 --- a/mc-sema/validator/x86_64/tests/UCOMISDrr.asm +++ /dev/null @@ -1,19 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 -cvtsi2sd xmm0, ecx -mov ecx, 0 -cvtsi2sd xmm1, ecx - -;TEST_BEGIN_RECORDING -ucomisd xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/UCOMISSrm.asm b/mc-sema/validator/x86_64/tests/UCOMISSrm.asm deleted file mode 100644 index 450a64923..000000000 --- a/mc-sema/validator/x86_64/tests/UCOMISSrm.asm +++ /dev/null @@ -1,20 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 -cvtsi2ss xmm0, ecx -mov ecx, 0 -cvtsi2ss xmm1, ecx -;TEST_BEGIN_RECORDING -lea rcx, [rsp-4] -movss [rcx], xmm1 -ucomiss xmm0, [rcx] -mov ecx, 0 -;TEST_END_RECORDING -cvtsi2ss xmm0, ecx -cvtsi2ss xmm1, ecx - diff --git a/mc-sema/validator/x86_64/tests/UCOMISSrr.asm b/mc-sema/validator/x86_64/tests/UCOMISSrr.asm deleted file mode 100644 index 4b5fe5f39..000000000 --- a/mc-sema/validator/x86_64/tests/UCOMISSrr.asm +++ /dev/null @@ -1,19 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; put 2 into ecx for future load into xmm0 -mov ecx, 2 -cvtsi2ss xmm0, ecx -mov ecx, 0 -cvtsi2ss xmm1, ecx - -;TEST_BEGIN_RECORDING -ucomiss xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2ss xmm0, ecx -cvtsi2ss xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/UNPCKHPDrr.asm b/mc-sema/validator/x86_64/tests/UNPCKHPDrr.asm deleted file mode 100644 index a5a195472..000000000 --- a/mc-sema/validator/x86_64/tests/UNPCKHPDrr.asm +++ /dev/null @@ -1,32 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -; load a 128 bit value into xmm0 -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] - -lea rcx, [rcx+16] -; load a 128 bit value into xmm1 -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e -movaps xmm1, [rcx] - -;TEST_BEGIN_RECORDING -unpckhpd xmm0, xmm1 -;TEST_END_RECORDING - -mov rcx, 0 -xorps xmm0, xmm0 -xorps xmm1, xmm1 diff --git a/mc-sema/validator/x86_64/tests/UNPCKLPSrm.asm b/mc-sema/validator/x86_64/tests/UNPCKLPSrm.asm deleted file mode 100644 index 18ac6bf22..000000000 --- a/mc-sema/validator/x86_64/tests/UNPCKLPSrm.asm +++ /dev/null @@ -1,26 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] -mov dword [rcx+0x00], 0x00112233 -mov dword [rcx+0x04], 0x44556677 -mov dword [rcx+0x08], 0x8899AABB -mov dword [rcx+0x0C], 0xCCDDEEFF - -unpcklps xmm0, [rcx] -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/UNPCKLPSrr.asm b/mc-sema/validator/x86_64/tests/UNPCKLPSrr.asm deleted file mode 100644 index b5c5182f9..000000000 --- a/mc-sema/validator/x86_64/tests/UNPCKLPSrr.asm +++ /dev/null @@ -1,27 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_SF|FLAG_PF -;TEST_FILE_META_END - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-0x30] -and rcx, 0xFFFFFFFFFFFFFFF0 - -mov dword [rcx+0x00], 0xAABBCCDD -mov dword [rcx+0x04], 0xEEFF1122 -mov dword [rcx+0x08], 0x33445566 -mov dword [rcx+0x0C], 0x77889900 -movdqu xmm0, [rcx] -mov dword [rcx+0x00], 0x00112233 -mov dword [rcx+0x04], 0x44556677 -mov dword [rcx+0x08], 0x8899AABB -mov dword [rcx+0x0C], 0xCCDDEEFF -movdqu xmm1, [rcx] - -unpcklps xmm0, xmm1 -mov ecx, 0 -;TEST_END_RECORDING - -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/tests/XADD16rr.asm b/mc-sema/validator/x86_64/tests/XADD16rr.asm deleted file mode 100644 index 0213adb22..000000000 --- a/mc-sema/validator/x86_64/tests/XADD16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; Xadd16RR - mov ax, 0x6824 - mov dx, 0x1479 - ;TEST_BEGIN_RECORDING - xadd ax, dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/XADD32rm.asm b/mc-sema/validator/x86_64/tests/XADD32rm.asm deleted file mode 100644 index e15c56e6a..000000000 --- a/mc-sema/validator/x86_64/tests/XADD32rm.asm +++ /dev/null @@ -1,15 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; XADD32rm - ;TEST_BEGIN_RECORDING - lea rdi, [rsp-0x4] - mov DWORD [rdi], 0xabcd4321 - mov eax, 0x56781234 - xadd [rdi], eax - mov edx, [rdi] - mov edi, 0x0 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/XADD32rr.asm b/mc-sema/validator/x86_64/tests/XADD32rr.asm deleted file mode 100644 index 444c80927..000000000 --- a/mc-sema/validator/x86_64/tests/XADD32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; XADD32rr - mov ebx, 0xb46767 - mov ecx, 0xa57877 - ;TEST_BEGIN_RECORDING - xadd ebx, ecx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/XADD8rr.asm b/mc-sema/validator/x86_64/tests/XADD8rr.asm deleted file mode 100644 index 685ab1b2b..000000000 --- a/mc-sema/validator/x86_64/tests/XADD8rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; XADD8rr - mov al, 0x45 - mov bl, 0x56 - ;TEST_BEGIN_RECORDING - xadd al, bl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/XCHG16ar.asm b/mc-sema/validator/x86_64/tests/XCHG16ar.asm deleted file mode 100644 index d7a0090f5..000000000 --- a/mc-sema/validator/x86_64/tests/XCHG16ar.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; XCHG16ar - mov ax, 0x6 - mov bx, 0x7 - ;TEST_BEGIN_RECORDING - xchg ax, bx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/XCHG16rr.asm b/mc-sema/validator/x86_64/tests/XCHG16rr.asm deleted file mode 100644 index 51151b9ff..000000000 --- a/mc-sema/validator/x86_64/tests/XCHG16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; XCHG16rr - mov bx, 0xc - mov dx, 0xd - ;TEST_BEGIN_RECORDING - xchg bx, dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/XCHG32ar.asm b/mc-sema/validator/x86_64/tests/XCHG32ar.asm deleted file mode 100644 index 50e05061b..000000000 --- a/mc-sema/validator/x86_64/tests/XCHG32ar.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; XCHG32ar - mov eax, 0x20 - mov ebx, 0x30 - ;TEST_BEGIN_RECORDING - xchg eax, ebx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/XCHG32rr.asm b/mc-sema/validator/x86_64/tests/XCHG32rr.asm deleted file mode 100644 index 2384511b6..000000000 --- a/mc-sema/validator/x86_64/tests/XCHG32rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; XCHG32rr - mov ebx, 0x120 - mov ecx, 0x122 - ;TEST_BEGIN_RECORDING - xchg ebx, ecx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/XCHG8rr.asm b/mc-sema/validator/x86_64/tests/XCHG8rr.asm deleted file mode 100644 index 5f7d97c71..000000000 --- a/mc-sema/validator/x86_64/tests/XCHG8rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - ; XCHG8rr - mov bl, 0x4 - mov cl, 0x6 - ;TEST_BEGIN_RECORDING - xchg bl, cl - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/XOR16i16.asm b/mc-sema/validator/x86_64/tests/XOR16i16.asm deleted file mode 100644 index eb4d4628f..000000000 --- a/mc-sema/validator/x86_64/tests/XOR16i16.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; XOR16i16 - mov ax, 0x2 - ;TEST_BEGIN_RECORDING - xor ax, 0xeeee - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/XOR16ri.asm b/mc-sema/validator/x86_64/tests/XOR16ri.asm deleted file mode 100644 index 0c1a42e1e..000000000 --- a/mc-sema/validator/x86_64/tests/XOR16ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; XOR16ri - mov bx, 0x2 - ;TEST_BEGIN_RECORDING - xor bx, 0x444 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/XOR16rr.asm b/mc-sema/validator/x86_64/tests/XOR16rr.asm deleted file mode 100644 index cb4d65109..000000000 --- a/mc-sema/validator/x86_64/tests/XOR16rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; XOR16rr - mov cx, 0x2 - mov dx, 0x3 - ;TEST_BEGIN_RECORDING - xor cx, dx - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/XOR32i32.asm b/mc-sema/validator/x86_64/tests/XOR32i32.asm deleted file mode 100644 index aef486a4c..000000000 --- a/mc-sema/validator/x86_64/tests/XOR32i32.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; XOR32i32 - mov eax, 0x12 - ;TEST_BEGIN_RECORDING - xor eax, 0x6fffffff - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/XOR32ri.asm b/mc-sema/validator/x86_64/tests/XOR32ri.asm deleted file mode 100644 index 4cd04236a..000000000 --- a/mc-sema/validator/x86_64/tests/XOR32ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; Xor32RI - mov ebx, 0x12345 - ;TEST_BEGIN_RECORDING - xor ebx, 0x12345 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/XOR32rr.asm b/mc-sema/validator/x86_64/tests/XOR32rr.asm deleted file mode 100644 index 9df85c7f4..000000000 --- a/mc-sema/validator/x86_64/tests/XOR32rr.asm +++ /dev/null @@ -1,10 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; Xor32RR - ;TEST_BEGIN_RECORDING - xor eax, eax - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/XOR8i8.asm b/mc-sema/validator/x86_64/tests/XOR8i8.asm deleted file mode 100644 index 0e35126c4..000000000 --- a/mc-sema/validator/x86_64/tests/XOR8i8.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; XOR8i8 - mov al, 0x12 - ;TEST_BEGIN_RECORDING - xor al, 0x5 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/XOR8ri.asm b/mc-sema/validator/x86_64/tests/XOR8ri.asm deleted file mode 100644 index be91c6cd4..000000000 --- a/mc-sema/validator/x86_64/tests/XOR8ri.asm +++ /dev/null @@ -1,11 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; XOR8ri - mov ah, 0x12 - ;TEST_BEGIN_RECORDING - xor ah, 0x3 - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/XOR8rr.asm b/mc-sema/validator/x86_64/tests/XOR8rr.asm deleted file mode 100644 index 34e3f8eac..000000000 --- a/mc-sema/validator/x86_64/tests/XOR8rr.asm +++ /dev/null @@ -1,12 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_AF -;TEST_FILE_META_END - ; XOR8rr - mov ch, 0x2 - mov dh, 0x3 - ;TEST_BEGIN_RECORDING - xor ch, dh - ;TEST_END_RECORDING - diff --git a/mc-sema/validator/x86_64/tests/XORPSrm.asm b/mc-sema/validator/x86_64/tests/XORPSrm.asm deleted file mode 100644 index 0c4f6838f..000000000 --- a/mc-sema/validator/x86_64/tests/XORPSrm.asm +++ /dev/null @@ -1,34 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS=FLAG_OF|FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF|FLAG_CF -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-17] -and rcx, 0xfffffffffffffff0 - -; load 128 bit value into xmm0 -mov DWORD [rcx], 0x12345678 -mov DWORD [rcx+4], 0x55555555 -mov DWORD [rcx+8], 0xdeadbeef -mov DWORD [rcx+12], 0x1f311c47 -movaps xmm0, [rcx] -lea rcx, [rcx+16] - -;TEST_BEGIN_RECORDING -lea rcx, [rsp-17] -and rcx, 0xfffffffffffffff0 ; using this requires us to ignore ALU flags - -mov DWORD [rcx], 0xabcdef12 -mov DWORD [rcx+4], 0xaaaaaaaa -mov DWORD [rcx+8], 0xdeadbeef -mov DWORD [rcx+12], 0xfeeb1e01 - -xorps xmm0, [rcx] -mov ecx, [rcx] -xor ecx, ecx -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx diff --git a/mc-sema/validator/x86_64/tests/XORPSrr.asm b/mc-sema/validator/x86_64/tests/XORPSrr.asm deleted file mode 100644 index d798d7940..000000000 --- a/mc-sema/validator/x86_64/tests/XORPSrr.asm +++ /dev/null @@ -1,32 +0,0 @@ -BITS 64 -;TEST_FILE_META_BEGIN -;TEST_TYPE=TEST_F -;TEST_IGNOREFLAGS= -;TEST_FILE_META_END - -; allocate 16 byte aligned stack space for the packed values -lea rcx, [rsp-33] -and rcx, 0xfffffffffffffff0 - -; load a 128 bit value into xmm0 -mov DWORD [rcx], 0x55555555 -mov DWORD [rcx+4], 0x14530451 -mov DWORD [rcx+8], 0x1badb002 -mov DWORD [rcx+12], 0xf0f0f0f0 -movaps xmm0, [rcx] -lea rcx, [rcx+16] - -; load a 128 bit value into xmm1 -mov DWORD [rcx], 0xaaaaaaaa -mov DWORD [rcx+4], 0xcafebabe -mov DWORD [rcx+8], 0x2badb002 -mov DWORD [rcx+12], 0x0e0e0e0e -movaps xmm1, [rcx] - -;TEST_BEGIN_RECORDING -xorps xmm0, xmm1 -;TEST_END_RECORDING - -xor ecx, ecx -cvtsi2sd xmm0, ecx -cvtsi2sd xmm1, ecx diff --git a/mc-sema/validator/x86_64/valTest/CMakeLists.txt b/mc-sema/validator/x86_64/valTest/CMakeLists.txt deleted file mode 100644 index 95a48d2c1..000000000 --- a/mc-sema/validator/x86_64/valTest/CMakeLists.txt +++ /dev/null @@ -1,85 +0,0 @@ -find_package(Nasm REQUIRED) -find_package(Pin REQUIRED) - -SET_SOURCE_FILES_PROPERTIES( "${CMAKE_CURRENT_BINARY_DIR}/test_a.auto.obj" - PROPERTIES - EXTERNAL_OBJECT true - GENERATED true - ) - -add_custom_target(test_a.auto.asm ALL - COMMAND ${PYTHON_EXECUTABLE} "${CMAKE_CURRENT_SOURCE_DIR}/../testgen.py" - -tstmpl "${CMAKE_CURRENT_SOURCE_DIR}/../testSemantics/testSemantics.template" - -taout "${CMAKE_CURRENT_SOURCE_DIR}/test_a.auto.asm" - -testfiles "${CMAKE_CURRENT_SOURCE_DIR}/../tests" - -nasm "${NASM_EXECUTABLE}" - COMMENT Generating semantics tests asm file - ) - -if(WIN32) -add_custom_target(test_a.auto.obj ALL - COMMAND ${NASM_EXECUTABLE} - --prefix _ - -f win - -o "${CMAKE_CURRENT_BINARY_DIR}/test_a.auto.obj" - "${CMAKE_CURRENT_SOURCE_DIR}/test_a.auto.asm" - DEPENDS test_a.auto.asm - COMMENT Assembling autogenerated semantics tests - - ) -else(WIN32) - if(APPLE) - add_custom_target(test_a.auto.obj ALL - COMMAND ${NASM_EXECUTABLE} - -f macho64 - -o "${CMAKE_CURRENT_BINARY_DIR}/test_a.auto.obj" - "${CMAKE_CURRENT_SOURCE_DIR}/test_a.auto.asm" - DEPENDS test_a.auto.asm - COMMENT Assembling autogenerated semantics tests - - ) - else(APPLE) - add_custom_target(test_a.auto.obj ALL - COMMAND ${NASM_EXECUTABLE} - -f elf64 - -o "${CMAKE_CURRENT_BINARY_DIR}/test_a.auto.obj" - "${CMAKE_CURRENT_SOURCE_DIR}/test_a.auto.asm" - DEPENDS test_a.auto.asm - COMMENT Assembling autogenerated semantics tests - - ) - endif(APPLE) -endif(WIN32) - -add_dependencies(test_a.auto.obj test_a.auto.asm Pin) - -add_executable(valTest test.c "${CMAKE_CURRENT_BINARY_DIR}/test_a.auto.obj") -if(NOT WIN32) -set_target_properties(valTest PROPERTIES COMPILE_FLAGS "-m64") -set_target_properties(valTest PROPERTIES LINK_FLAGS "-m64") -endif(NOT WIN32) - -add_dependencies(valTest test_a.auto.obj Pin) - -get_target_property(VALTEST_EXECUTABLE valTest LOCATION) -get_filename_component(VALTEST_PATH ${VALTEST_EXECUTABLE} PATH) -if(WIN32) -add_custom_target(tests.out ALL - ${PIN_EXECUTABLE} - -t "${CMAKE_CURRENT_SOURCE_DIR}/../valTool/obj-intel64/val.dll" -- "${VALTEST_EXECUTABLE}" - WORKING_DIRECTORY "${VALTEST_PATH}" - COMMENT Running PIN to generate ground truth for semantics tests - DEPENDS valTest - ) -else(WIN32) -add_custom_target(tests.out ALL - ${PIN_EXECUTABLE} "-injection" "child" -t "${CMAKE_CURRENT_SOURCE_DIR}/../valTool/val.so" -- "${VALTEST_EXECUTABLE}" - WORKING_DIRECTORY "${VALTEST_PATH}" - COMMENT Running PIN to generate ground truth for semantics tests - DEPENDS valTest - ) -endif(WIN32) - -IF(APPLE) - SET_TARGET_PROPERTIES(valTest PROPERTIES LINK_FLAGS "-pagezero_size 1000 -arch x86_64") -endif(APPLE) diff --git a/mc-sema/validator/x86_64/valTest/Makefile b/mc-sema/validator/x86_64/valTest/Makefile deleted file mode 100644 index 728fa434c..000000000 --- a/mc-sema/validator/x86_64/valTest/Makefile +++ /dev/null @@ -1,16 +0,0 @@ -all: tests.out - -tests.out: test - pin -t $$PWD/../valTool/obj-intel64/val.so -- ./test - -test: test_a.o test.o - gcc -m64 -o test test.o test_a.o - -test_a.o: test_a.asm - nasm -f elf64 -o test_a.o test_a.asm - -test.o: test.c - gcc -m64 -c -o test.o test.c - -clean: - rm -f *.o tests.out diff --git a/mc-sema/validator/x86_64/valTest/Makefile.linux b/mc-sema/validator/x86_64/valTest/Makefile.linux deleted file mode 100644 index 728fa434c..000000000 --- a/mc-sema/validator/x86_64/valTest/Makefile.linux +++ /dev/null @@ -1,16 +0,0 @@ -all: tests.out - -tests.out: test - pin -t $$PWD/../valTool/obj-intel64/val.so -- ./test - -test: test_a.o test.o - gcc -m64 -o test test.o test_a.o - -test_a.o: test_a.asm - nasm -f elf64 -o test_a.o test_a.asm - -test.o: test.c - gcc -m64 -c -o test.o test.c - -clean: - rm -f *.o tests.out diff --git a/mc-sema/validator/x86_64/valTest/Makefile.osx b/mc-sema/validator/x86_64/valTest/Makefile.osx deleted file mode 100644 index f5e50ce04..000000000 --- a/mc-sema/validator/x86_64/valTest/Makefile.osx +++ /dev/null @@ -1,17 +0,0 @@ -all: test tests.out - -tests.out: - pin -t $$PWD/../valTool/obj-intel64/val.so -- ./test - -test: test_a.o test.o - cc -m64 -o test test.o test_a.o - -test_a.o: test_a.asm - nasm -f macho64 -o test_a.o test_a.asm - -test.o: test.c - cc -m64 -c -o test.o test.c - - -clean: - rm -f *.o tests.out diff --git a/mc-sema/validator/x86_64/valTest/Makefile.win32 b/mc-sema/validator/x86_64/valTest/Makefile.win32 deleted file mode 100644 index 810a1036e..000000000 --- a/mc-sema/validator/x86_64/valTest/Makefile.win32 +++ /dev/null @@ -1,21 +0,0 @@ -#ensure PIN_HOME is set using Windows-style paths; -#e.g.: C:\pin - -all: tests.out - -.IGNORE: tests.out -tests.out: test - cmd.exe /c "${PIN_HOME}\pin.bat -t ..\valTool\obj-ia32\val.dll -- test.exe" - -test: test_a.obj test.obj - gcc -o test test.obj test_a.obj - -test_a.obj: test_a.asm - nasm --prefix _ -f win -o test_a.obj test_a.asm - -test.obj: test.c - gcc -m32 -c -o test.obj test.c - -.IGNORE: clean -clean: - rm -f *.obj tests.out diff --git a/mc-sema/validator/x86_64/valTest/test.c b/mc-sema/validator/x86_64/valTest/test.c deleted file mode 100644 index d4ebc57fe..000000000 --- a/mc-sema/validator/x86_64/valTest/test.c +++ /dev/null @@ -1,38 +0,0 @@ -/* -Copyright (c) 2014, Trail of Bits -All rights reserved. - -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of Trail of Bits nor the names of its - contributors may be used to endorse or promote products derived from - this software without specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#include - -extern void doTest(void); - -int main(int argc, char *argv[]) { - - doTest(); - - return 0; -} diff --git a/mc-sema/validator/x86_64/valTool/CMakeLists.txt b/mc-sema/validator/x86_64/valTool/CMakeLists.txt deleted file mode 100644 index 6f51ac016..000000000 --- a/mc-sema/validator/x86_64/valTool/CMakeLists.txt +++ /dev/null @@ -1,11 +0,0 @@ -find_package(Pin REQUIRED) - -get_filename_component(PIN_PATH ${PIN_EXECUTABLE} PATH) - -add_custom_target(pin_validate ALL - COMMAND "${CMAKE_COMMAND}" -DPIN_HOME="${PIN_PATH}" -P "${CMAKE_CURRENT_SOURCE_DIR}/valTool.cmake" - WORKING_DIRECTORY "${CMAKE_CURRENT_SOURCE_DIR}" - COMMENT Building PIN tool for validation... - ) - -add_dependencies(pin_validate Pin) diff --git a/mc-sema/validator/x86_64/valTool/Makefile.linux b/mc-sema/validator/x86_64/valTool/Makefile.linux deleted file mode 100644 index ba385c482..000000000 --- a/mc-sema/validator/x86_64/valTool/Makefile.linux +++ /dev/null @@ -1,25 +0,0 @@ - -CC ?= gcc -CXX ?= g++ - -CXXFLAGS:=-std=c++11 -m64 -DTARGET_IA32E -DHOST_IA32E -DTARGET_LINUX -fPIC -INCLUDE:=-I$(PIN_HOME)/source/include/pin -I$(PIN_HOME)/source/include/pin/gen -I$(PIN_HOME)/extras/components/include -I$(PIN_HOME)/extras/xed2-intel64/include - -LDFLAGS:=-m64 -shared -Wl,--hash-style=sysv -Wl,-Bsymbolic -lpin -lxed -ldwarf -lelf -ldl -LPATHS:=-L$(PIN_HOME)/intel64/lib/ -L$(PIN_HOME)/intel64/lib-ext -L$(PIN_HOME)/extras/xed2-intel64/lib - -SRC=$(wildcard *.cpp) -OBJS=$(patsubst %.cpp,%.o,$(SRC)) - -TARGET=val.so - -all: $(SRC) $(OBJS) $(TARGET) - -$(TARGET): $(OBJS) - $(CXX) -o $(TARGET) $(OBJS) -shared -m64 $(LPATHS) $(LDFLAGS) - -%.o: %.cpp Makefile.linux - $(CXX) $(CXXFLAGS) $(INCLUDE) -c $< -o $@ - -clean: - rm $(TARGET) $(OBJS) diff --git a/mc-sema/validator/x86_64/valTool/Makefile.osx b/mc-sema/validator/x86_64/valTool/Makefile.osx deleted file mode 100644 index 1ef3c14c1..000000000 --- a/mc-sema/validator/x86_64/valTool/Makefile.osx +++ /dev/null @@ -1,25 +0,0 @@ - -CC ?= clang -CXX ?= clang++ - -CXXFLAGS:=-std=c++11 -m64 -DTARGET_IA32E -DHOST_IA32E -DTARGET_MAC -fPIC -arch x86_64 -stdlib=libstdc++ -INCLUDE:=-I$(PIN_HOME)/source/include/pin -I$(PIN_HOME)/source/include/pin/gen -I$(PIN_HOME)/extras/components/include -I$(PIN_HOME)/extras/xed2-intel64/include - -LDFLAGS:=-m64 -stdlib=libstdc++ -shared -lpin -lxed -ldl -LPATHS:=-L$(PIN_HOME)/intel64/lib/ -L$(PIN_HOME)/intel64/lib-ext -L$(PIN_HOME)/extras/xed2-intel64/lib - -SRC=$(wildcard *.cpp) -OBJS=$(patsubst %.cpp,%.o,$(SRC)) - -TARGET=val.so - -all: $(SRC) $(OBJS) $(TARGET) - -$(TARGET): $(OBJS) - $(CXX) -o $(TARGET) $(OBJS) -shared $(LPATHS) $(LDFLAGS) - -%.o: %.cpp Makefile.osx - $(CXX) $(CXXFLAGS) $(INCLUDE) -c $< -o $@ - -clean: - rm $(TARGET) $(OBJS) diff --git a/mc-sema/validator/x86_64/valTool/Nmakefile b/mc-sema/validator/x86_64/valTool/Nmakefile deleted file mode 100644 index 5a9c13011..000000000 --- a/mc-sema/validator/x86_64/valTool/Nmakefile +++ /dev/null @@ -1,20 +0,0 @@ -###################################################################################### -# This is the NMAKE file for building and testing PIN toos contained in one of the -# subdirectories of the PinTool project or PIN kit. -# -# For description of targets and options, see Nmakefile in the root directory. -###################################################################################### - -!if "$(PIN_HOME)"=="" -PIN_HOME=.. -!endif - -# Define tools to be buit and tested -###################################################################################### -COMMON_TOOLS= val.dll - - -# Include building and testing rules from the root Nmakefile. -###################################################################################### -INCLUDE_SUB_RULES=1 -!INCLUDE $(PIN_HOME)\..\..\source\tools\Nmakefile diff --git a/mc-sema/validator/x86_64/valTool/makefile b/mc-sema/validator/x86_64/valTool/makefile deleted file mode 100644 index c27c2c3cc..000000000 --- a/mc-sema/validator/x86_64/valTool/makefile +++ /dev/null @@ -1,103 +0,0 @@ -## -## This is a sample makefile for building Pin tools outside -## of the Pin environment. This makefile is suitable for -## building with the Pin kit, not a Pin source development tree. -## -## To build the tool, execute the make command: -## -## make -## or -## make PIN_HOME= -## -## After building your tool, you would invoke Pin like this: -## -## $PIN_HOME/pin -t MyPinTool -- /bin/ls -## -############################################################## -# -# User-specific configuration -# -############################################################## - -# -# 1. Change PIN_HOME to point to the top-level directory where -# Pin was installed. This can also be set on the command line, -# or as an environment variable. -# -#PIN_HOME ?= ../../.. - - -############################################################## -# -# set up and include *.config files -# -############################################################## - -PIN_KIT=$(PIN_HOME) -KIT=1 -TESTAPP=$(OBJDIR)cp-pin.exe -TARGET=ia32 - -TARGET_COMPILER?=gnu -ifdef OS - ifeq (${OS},Windows_NT) - TARGET_COMPILER=ms - endif -endif - -ifeq ($(TARGET_COMPILER),gnu) - include $(PIN_HOME)/source/tools/makefile.gnu.config - CXXFLAGS ?= -std=c++11 -Wall -Werror -Wno-unknown-pragmas $(DBG) $(OPT) - PIN=$(PIN_HOME)/pin -endif - -ifeq ($(TARGET_COMPILER),ms) - include $(PIN_HOME)/source/tools/makefile.ms.config - DBG?= - PIN=$(PIN_HOME)/pin.bat -endif - - -############################################################## -# -# Tools - you may wish to add your tool name to TOOL_ROOTS -# -############################################################## - - -TOOL_ROOTS = val - -TOOLS = $(TOOL_ROOTS:%=$(OBJDIR)%$(PINTOOL_SUFFIX)) - - -############################################################## -# -# build rules -# -############################################################## - -all: tools -tools: $(OBJDIR) $(TOOLS) $(OBJDIR)cp-pin.exe -test: $(OBJDIR) $(TOOL_ROOTS:%=%.test) - -val.test: $(OBJDIR)cp-pin.exe - $(MAKE) -k PIN_HOME=$(PIN_HOME) - -$(OBJDIR)cp-pin.exe: - $(CXX) $(PIN_HOME)/source/tools/Tests/cp-pin.cpp $(APP_CXXFLAGS) -o $(OBJDIR)cp-pin.exe - -$(OBJDIR): - mkdir -p $(OBJDIR) - -$(OBJDIR)%.o : %.cpp - $(CXX) -c $(CXXFLAGS) $(PIN_CXXFLAGS) ${OUTOPT}$@ $< - -$(TOOLS): $(PIN_LIBNAMES) - -$(TOOLS): %$(PINTOOL_SUFFIX) : %.o - ${PIN_LD} $(PIN_LDFLAGS) $(LINK_DEBUG) ${LINK_OUT}$@ $< ${PIN_LPATHS} $(PIN_LIBS) $(DBG) - - -## cleaning -clean: - -rm -rf $(OBJDIR) *.out *.tested *.failed makefile.copy diff --git a/mc-sema/validator/x86_64/valTool/val.cpp b/mc-sema/validator/x86_64/valTool/val.cpp deleted file mode 100644 index 6fb991813..000000000 --- a/mc-sema/validator/x86_64/valTool/val.cpp +++ /dev/null @@ -1,508 +0,0 @@ -/* -Copyright (c) 2014, Trail of Bits -All rights reserved. - -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of Trail of Bits nor the names of its - contributors may be used to endorse or promote products derived from - this software without specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#include "pin.H" -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#if !defined(__APPLE__) - #include -#endif - -using namespace std; - -#define AF ( 1 << 4 ) -#define SF ( 1 << 7 ) -#define ZF ( 1 << 6 ) -#define PF ( 1 << 2 ) -#define OF ( 1 << 11 ) -#define CF ( 1 << 0 ) -#define DF ( 1 << 10 ) - -#define ARRAYSIZE(x) ((sizeof(x)/sizeof(0[x])) / ((size_t)(!(sizeof(x) % sizeof(0[x]))))) - -/* ================================================================== */ -// Types and declarations -/* ================================================================== */ - -//types for tracking register states -typedef vector regWrittenT; -typedef map writtenSetsT; - -typedef vector valVecT; -typedef pair valWidthT; -typedef map writtenMemT; -typedef map memSetsT; - -typedef union { - long double st; - uint8_t pad[16]; -} streg; - -typedef union { - uint8_t pad[16]; -} xmmreg; - -#ifdef _MSC_VER -#pragma pack (1) -#endif - -typedef struct -#ifdef _MSC_VER -__declspec(align(16)) -#endif - _fxsave { - uint16_t FCW; - uint16_t FSW; - uint8_t FTW; - uint8_t res0; - uint16_t FOP; - uint32_t FPUIP; - uint16_t FPUCS; - uint16_t res1; - uint32_t FPUDP; - uint16_t FPUDS; - uint16_t res2; - uint32_t MXCSR; - uint32_t MXCSR_MASK; - // FPU/MMX registers - streg ST[8]; - - // SSE - xmmreg XMM[8]; - - // reserved fields - uint8_t res3[176]; - - // available fields - uint8_t avail[48]; -} -#ifndef _MSC_VER -__attribute__((aligned(16),packed)) -#endif -fxsave; - -#ifdef _MSVC_VER -#pragma pack () -#endif - - -struct flagentry { - std::string name; - uint16_t mask; - uint16_t shift; -}; - -flagentry FPU_FLAGS[] = { - {"FPU_BUSY", 1, 15}, - {"FPU_C3", 1, 14}, - {"FPU_TOP", 7, 11}, - {"FPU_C2", 1, 10}, - {"FPU_C1", 1, 9}, - {"FPU_C0", 1, 8}, - {"FPU_ES", 1, 7}, - {"FPU_SF", 1, 6}, - {"FPU_PE", 1, 5}, - {"FPU_UE", 1, 4}, - {"FPU_OE", 1, 3}, - {"FPU_ZE", 1, 2}, - {"FPU_DE", 1, 1}, - {"FPU_IE", 1, 0} -}; - -flagentry FPU_CONTROL[] = { - {"FPU_X", 1, 12}, - {"FPU_RC", 3, 10}, - {"FPU_PC", 3, 8}, - {"FPU_PM", 1, 5}, - {"FPU_UM", 1, 4}, - {"FPU_OM", 1, 3}, - {"FPU_ZM", 1, 2}, - {"FPU_DM", 1, 1}, - {"FPU_IM", 1, 0}, -}; - -enum fpuflagname { - FPU_BUSY = 0, - FPU_C3, - FPU_TOP, - FPU_C2, - FPU_C1, - FPU_C0, - FPU_ES, - FPU_SF, - FPU_PE, - FPU_UE, - FPU_OE, - FPU_ZE, - FPU_DE, - FPU_IE -}; - -struct PerThreadData { - bool tracing; - UINT32 curTag; -}; - -/* ================================================================== */ -// Global variables -/* ================================================================== */ - -TLS_KEY tlsKey; - -/* ===================================================================== */ -// Command line switches -/* ===================================================================== */ -KNOB KnobOutputFile(KNOB_MODE_WRITEONCE, "pintool", - "o", "tests.out", "specify file name for output"); - -fstream *outFile; - - -PerThreadData *getTls(THREADID id) { - return static_cast(PIN_GetThreadData(tlsKey, id)); -} - -/*! - * Print out help message. - */ -INT32 Usage() -{ - cerr << KNOB_BASE::StringKnobSummary() << endl; - return -1; -} - -UINT32 isSentinelIns(INS instr) { - //sentinel instructions are MOV ESI, 0x18231943 - if( INS_IsMov(instr) ) { - //get the first two operands - if( INS_OperandIsReg(instr, 0) ) { - REG r = INS_OperandReg(instr, 0); - //is r esi? - if( r == REG_ESI ) { - //is the second operand an immediate? - if( INS_OperandIsImmediate(instr, 1) ) { - UINT64 o = INS_OperandImmediate(instr, 1); - //mask off the lower 2 bytes - if( (o>>16) == 0x1823 ) { - //sweet, we matched the magic value - UINT64 j = o << 48; - j = j >> 48; - return j; - } - } - } - } - } - - return 0; -} - -void makeupper(string &upme) -{ - std::transform(upme.begin(), upme.end(), upme.begin(), ::toupper); -} - -string dumpFpuFlags(fxsave &fpu_regs) { - string resstr; - - for(unsigned i = 0; i < sizeof(FPU_FLAGS)/sizeof(FPU_FLAGS[0]); i++) - { - flagentry& fe = FPU_FLAGS[i]; - resstr += fe.name + ":" + - decstr( ((fe.mask << fe.shift) & fpu_regs.FSW) >> fe.shift ) + "\n"; - } - - for(unsigned i = 0; i < sizeof(FPU_CONTROL)/sizeof(FPU_CONTROL[0]); i++) - { - flagentry& fe = FPU_CONTROL[i]; - resstr += fe.name + ":" + - decstr( ((fe.mask << fe.shift) & fpu_regs.FCW) >> fe.shift ) + "\n"; - } - - resstr += "FPUTW:" + decstr(fpu_regs.FTW) + "\n"; - resstr += "FPU_FOPCODE:" + decstr(fpu_regs.FOP) + "\n"; - - return resstr; -} - -string dumpRegisterState(const CONTEXT *ctx) { - //the registers we care about, in an array - string res; - unsigned int i; -#ifdef TARGET_IA32 - REG caredRegs[] = { - REG_EDI, REG_ESI, REG_EBP, REG_ESP, - REG_EAX, REG_EBX, REG_ECX, REG_EDX }; -#else - REG caredRegs[] = { - REG_RDI, REG_RSI, REG_RBP, REG_RSP, - REG_RAX, REG_RBX, REG_RCX, REG_RDX }; -#endif - FPSTATE fpstate; - fxsave fpu_regs; - - for( i = 0; i < sizeof(caredRegs)/sizeof(REG); i++ ) { - REG r = caredRegs[i]; - string rStr = REG_StringShort(r); - makeupper(rStr); - ADDRINT val = PIN_GetContextReg(ctx, r); - - res = res+rStr+":"+decstr(val)+"\n"; - } - // read FPU state - PIN_GetContextFPState(ctx, &fpstate); - std::memcpy(&fpu_regs, &fpstate.fxsave_legacy, sizeof(fpu_regs)); - - for(unsigned i = 0; - i < ARRAYSIZE(fpu_regs.ST);//sizeof(fpu_regs.ST)/sizeof(fpu_regs.ST[0]); - i++) { - stringstream ss; - for(unsigned j = 0; j < sizeof(fpu_regs.ST[0]); j++) { - ss << std::setw(2) << std::setfill('0') << std::hex << (unsigned)fpu_regs.ST[i].pad[j] << " "; - } - - res += "ST"+decstr(i)+":"+ss.str() + "\n"; - } - - for(unsigned i = 0; - i < ARRAYSIZE(fpu_regs.XMM); - i++) { - stringstream ss; - for(unsigned j = 0; j < sizeof(fpu_regs.XMM[0]); j++) { - ss << std::setw(2) << std::setfill('0') << std::hex << (unsigned)fpu_regs.XMM[i].pad[j] << " "; - } - - res += "XMM"+decstr(i)+":"+ss.str() + "\n"; - } - - //dump EFLAGS seperately -#ifdef TARGET_IA32 - ADDRINT efVal = PIN_GetContextReg(ctx, REG_EFLAGS); -#else - ADDRINT efVal = PIN_GetContextReg(ctx, REG_RFLAGS); -#endif - if( efVal & AF ) { - res = res + "AF:1\n"; - } else { - res = res + "AF:0\n"; - } - - if( efVal & CF ) { - res = res + "CF:1\n"; - } else { - res = res + "CF:0\n"; - } - - if( efVal & PF ) { - res = res + "PF:1\n"; - } else { - res = res + "PF:0\n"; - } - - if( efVal & ZF ) { - res = res + "ZF:1\n"; - } else { - res = res + "ZF:0\n"; - } - - if( efVal & OF ) { - res = res + "OF:1\n"; - } else { - res = res + "OF:0\n"; - } - - if( efVal & SF ) { - res = res + "SF:1\n"; - } else { - res = res + "SF:0\n"; - } - - if( efVal & DF ) { - res = res + "DF:1\n"; - } else { - res = res + "DF:0\n"; - } - - - res += dumpFpuFlags(fpu_regs); - - return res; -} - -/* ===================================================================== */ -// Analysis routines -/* ===================================================================== */ - -VOID toggleTrace(THREADID tid, UINT32 t, const CONTEXT *ctx) { - //get per-thread information - PerThreadData *dt = getTls(tid); - - dt->tracing = !dt->tracing; - - if( dt->tracing ) { - dt->curTag = t; - //dump out current register state - string s; - s = "TESTCASE:"+decstr(t)+"\n"; - s = s + "INPUTSTATE\n"; - s = s + dumpRegisterState(ctx); - //std::cout << s.c_str() << std::endl; - outFile->write(s.c_str(), s.length()); - outFile->flush(); - } else { - string s; - s = "OUTPUTSTATE\n"; - s = s + dumpRegisterState(ctx); - s = s + "ENDCASE\n"; - s = s + "\n"; - //std::cout << s.c_str() << std::endl; - outFile->write(s.c_str(), s.length()); - outFile->flush(); - dt->curTag = 0; - } - - return; -} - -VOID onRegWrite(THREADID tid, REG r, ADDRINT v) { - - return; -} - -VOID onMemWritePre(THREADID tid, ADDRINT addr) { - - return; -} - -VOID onMemWritePost(THREADID tid, UINT32 width) { - - return; -} - -/* ===================================================================== */ -// Instrumentation callbacks -/* ===================================================================== */ - -VOID OnInstr(INS ins, VOID *ctx) { - - //check and see if this is a sentinel instruction - UINT32 v; - if( ( v = isSentinelIns(ins) ) ) { - //if it is, add a 'toggle tracing' analysis routine - //and leave - INS_InsertCall( ins, - IPOINT_BEFORE, - AFUNPTR(toggleTrace), - IARG_THREAD_ID, - IARG_UINT32, v, - IARG_CONTEXT, - IARG_END); - - } - - return; -} - -VOID ThreadStart(THREADID tid, CONTEXT *ctx, INT32 flags, VOID *v) { - //allocate a new PerThreadData - PerThreadData *pd = new PerThreadData(); - - pd->tracing = false; - ASSERT(pd != NULL, "ALLOC FAILED"); - - PIN_SetThreadData(tlsKey, pd, tid); - - return; -} - -VOID ThreadFini(THREADID tid, const CONTEXT *ctx, INT32 flags, VOID *v) { - //we can free our PerThreadData - PerThreadData *pd = getTls(tid); - - delete pd; - - return; -} - -VOID Fini(INT32 c, VOID *v) { - outFile->flush(); - delete outFile; - return; -} - -/*! - * The main procedure of the tool. - * This function is called when the application image is loaded but not yet started. - * @param[in] argc total number of elements in the argv array - * @param[in] argv array of command line arguments, - * including pin -t -- ... - */ -int main(int argc, char *argv[]) -{ - // sanity check - ASSERT(sizeof(fxsave) == 512, "fxsave not of correct size on this compiler"); - ASSERT(sizeof(fxsave) == sizeof(FXSAVE), "our definition of FXSAVE and Intel's are not the same size"); - - if( PIN_Init(argc,argv) ) - { - return Usage(); - } - - //register an instruction callback - INS_AddInstrumentFunction(OnInstr, NULL); - - //register a thread create callback - PIN_AddThreadStartFunction(ThreadStart, NULL); - - //register a thread end callback - PIN_AddThreadFiniFunction(ThreadFini, NULL); - - //register a finalizer so we can close our output - PIN_AddFiniFunction(Fini, NULL); - - //open the output file - outFile = new fstream(KnobOutputFile.Value().c_str(),ios::out|ios::trunc); - - //begin instrumentation - PIN_StartProgram(); - - return 0; -} - -/* ===================================================================== */ -/* eof */ -/* ===================================================================== */ diff --git a/mc-sema/validator/x86_64/valTool/valTool.cmake b/mc-sema/validator/x86_64/valTool/valTool.cmake deleted file mode 100644 index d3ccc42c7..000000000 --- a/mc-sema/validator/x86_64/valTool/valTool.cmake +++ /dev/null @@ -1,21 +0,0 @@ - -set(ENV{PIN_HOME} ${PIN_HOME}) - -if(WIN32) -execute_process( - COMMAND nmake -f Nmakefile - WORKING_DIRECTORY "${CMAKE_CURRENT_SOURCE_DIR}" - ) -else(WIN32) - if(APPLE) - execute_process( - COMMAND make -f Makefile.osx - WORKING_DIRECTORY "${CMAKE_CURRENT_SOURCE_DIR}" - ) - else(APPLE) - execute_process( - COMMAND make -f Makefile.linux - WORKING_DIRECTORY "${CMAKE_CURRENT_SOURCE_DIR}" - ) - endif(APPLE) -endif(WIN32) diff --git a/package.sh b/package.sh index a8af22014..a3ea8eed1 100755 --- a/package.sh +++ b/package.sh @@ -40,7 +40,7 @@ mkdir -p ${PKGDIR}/drivers # ensure we always copy CFG protobuf parser chmod +x ./build/mc-sema/bin_descend/CFG_pb2.py -MC_BINS=$(find ./build/mc-sema -executable -type f | grep -v '/pin/' | grep -v 'testSemantics' | grep -v 'valTest') +MC_BINS=$(find ./build/mc-sema -executable -type f) if [ "${MC_BINS}" == "" ] then echo "Could not find mcsema binaries. Did you build mcsema?"