3 Commits

Author	SHA1	Message	Date
Alex Cameron	fb018c96e9	PowerPC Support (#645) ... * Add skeleton for PPC * Copyright notices * Fill in some details for the PPC arch * Start building a (wrong) PPC runtime * Begin populating state structure * First pass for EIS state structure * Map registers to Sleigh register names * More fixes * add optional param * Create handle unsupported and invalid instruction isels * Correct typo * Get a basic `remill-lift` invocation running without failure * Fix capitalisation * Set vle context reg * Fix SleighDecoder signatures * Set VLE context register in the Sleigh engine in addition to our internal context reg mapping * Capitalize reg names * Add the flag registers for XER and CR * Rename bitflag structures in PPC state * PPC Sleigh patches (#643) * Modified sleigh patch script to generate patches for multiple .sinc files * update README with new examples of sleigh patch script invocation * add ppc register definition * add ppc sleigh patches * fix issue with remill_insn_size definition * regenerate sleigh patches for PPC * update CMakeLists.txt to include PPC patches * Add TEA signal as a register in the PPC state * Uppercase the stack pointer register name * Fix PPC instruction sizes * initial PPC tests * remove duplicate tests * fix tests for e_stmvgprw/e_ldmvgprw * add tests for loading/storing from special registers * add tests with internal conditionals in pcode * fix for pc reg and addr width not being the same... I suspect this issue is going to come up elsewhere * add heuristic for flow from normal intrainstruction flow * rework tests to allow testing for different sized registers * add tests for overflow and record add * fix bug with log printout * add intrafunction control flow lifting * handle edge case where there is no pcode op at the zero index * Fix another inconsistency with mismatching address and PC reg size * Allocate unique ptrs in the entry block * Fix `INT_LEFT` and `INT_RIGHT` impl where shift exceeds bit width * fix supiece lift? * Add PPC emulate instruction to hyper call * fix for pc reg and addr width not being the same... I suspect this issue is going to come up elsewhere * add heuristic for flow from normal intrainstruction flow * add intrafunction control flow lifting * handle edge case where there is no pcode op at the zero index * Fix another inconsistency with mismatching address and PC reg size * fix supiece lift? * Allocate unique ptrs in the entry block * Fix `INT_LEFT` and `INT_RIGHT` impl where shift exceeds bit width * fix int2float semantics should use appropriate sized float based on the output size * add tests for lifting int2float * fix INT_{LEFT,RIGHT} semantics should be `ICmpSGE` instead of `ICmpSGT` * add cr0-7 registers * fix formatting * fix conditional branch test * add test for compare * re-enable rotate left word immediate and mask test * genericize TestSpecOutput * explicit instruction data size * add test for syscall/callother (disabled) * add tests for store/load word * add test to convert from float to int * specify intrinsic arg type, fixes null deref * Add PPC emulate instruction to hyper call * add headers + formatting * remove old comment * Map CRALL register * Add basic LLVM data layout that specifies 32-bit addresses * Remove unused variables * convert auto* to auto when possible * RegisterPrecondition -> RegisterCondition * fix variable name * convert any to variant * use std::move * bump to c++20, use concepts * set arch in constructor since class isn't generic anyways * formatting * make type aliases * bump cxx-common * add comment * clang format * throw exception if register not found * use const ref * use shorthand for lambda capture values * Add more detail to data layout to include proper stack alignment * Compare to the correct size for SUBPIECE impl * Add Sleigh message to error * throw exception in else case * throw runtime error if register value has incorrect type * use reference instead of value * get rid of unnecessary type alias * formatting * Propagate VLE context reg value into Sleigh * Remove unnecessary whitespace * Remove stale TODO and NOTE comments * add additional parameter to test runner to specify decoding context * drop llvm 14, bump macos version * bump cxx-common, fix ci.yml mac build * add test for unconditional relative negative branch * add missing space to pcode debug log * fix bug due to unordered_map, iteration order matters * add error log in case we aren't able to adjust PC value * use helper for getting register reference * Revert "add optional param" This reverts commit 51ed49f8cf. * Remove remaining LLVM 14 compatibility code and configuration * Add padding between CR and XER flags * Use `enum class` * Remove void cast * Remove unnecessary variable * Use initialiser lists where appropriate * Remove redundant `else` * Prefer `CHECK` over `assert` * Polish PowerPC function initialisation with lambda * zero out xer_so to fix tests * log error when we see claim_eq with no usages * Collapse namespace blocks * Remove unnecessary `this->` * Use `auto` where appropriate * Remove unnecessary `else` * Use `emplace` over `insert` for `std::map` Co-authored-by: lkorenc <lukas.korencik@trailofbits.com> * Use `constexpr` for VLE reg name * Use module verification util * Add `VerifyFunction` util and use where applicable * Extract lambda to improve readability of flow categorisation * Use type alias for context values * Introduce type alias for block exit * Create type alias for optional branch taken * Refactor `PcodeCFGBuilder` * Use lambda to avoid conditional mutation * Extract duplicated bit-shift code generation into helper * Simplify flow with ternary * Add `GetBlock` helper * Rename variables * Move statement for clarity * Create helpers for working with Sleigh context register values * Convert loop to `std::copy` * Add a comment explaining the use of set to de-duplicate and sort * Refactor `IntraProcTransferCollector` * Expose static method to easily use `IntraProcTransferCollector` * Rename PPC related variables to include address width * add docs to intrainstructionindex * remove llvm 14 ifdefs * don't log error if no claim_eqs were used * update comments * Cleanup exit visitors --------- Co-authored-by: 2over12 <ian.smith@trailofbits.com> Co-authored-by: William Tan <1284324+Ninja3047@users.noreply.github.com> Co-authored-by: lkorenc <lukas.korencik@trailofbits.com>	2023-02-02 10:05:28 -05:00
2over12	65817f05b8	Mixed Mode AArch32 (#622) ... * stuff * make decoders standalone from arch * compiles * fix lazy initialization of intrinsic table * add back sleigh arch * added switching between arches... need to update contexts * add instructin sizes * thumb triplet * back out of lambda approach * updating context in thumb case * fix differential tester to initialize lifter * add back lambda approach * aarch32 context updates * add tests * fix assetions in tests * fix address alignment for tests * add better decode function * fix tests * add conditional tests * fix uninitialized context in contextupdater * restore old contexts on call... * null out branch taken arch on indirects * fix fallthrough for conditional where neither src evaluates properly * initialize is interproc * fix initial context arm * fix boolop bug where params would be lifted when not bool op * fix comparison * remove debug * make missing context non fatal * bump sleigh * add insn flow variant * stub out computing categories * add control flow structuring * adding unconditoinal abnormal * start refactoring flows to share more structure * rework conditionals to express a combination of a condition with an abnormal flow * finish basic flow analysis * add context updater * implement eq * stop passing back contexts through return value * add tests * rework constructors, make flow usage consistent * implement flows in aarch32 * add implementation of flows for old cateogries and no context * make sleigh lifter backwards compatible by applying flows to instructions * fix bug in generating coarse flows * refactor to allow lifter to bring along decoding state * rework insertion of branch taken vats * fix off by one * fix size * dont reset bytes before use * disable broken float ops * back of ambiguity to non fatal error, also add logging of callother's encountered * update names * remove debug logging * add comment about x86 context * move to headers * move eqs * order of ctors, fields, methods * noop subtype of normal * remove direct constructors * remove more duplication * more duplication in noop * remove unused field * add utility for is thumb * absolute path * remove duplication * absolute paths * review fixes * make const refs * make enums match style guide * add constructor to flow * non ref * make refs * move map out of optional * refer to enum * move curr id out * fix BOOL_NEGATE for non 1 bit * type alias for decoding result of branch taken and flow * more delog * this language makes me incredibly happy * remap flags and treat metavars more like how the instructionlifter does it * more fixes to metavars * fix pc reg definition so consistent with value during isntruction execution * fix alignment of test * add todo * extract condition * add comment	2022-09-28 13:38:36 -04:00
2over12	c0f90b9e4a	Add Context Structure to Affect State Dependent Liftings (#617) ... * add empty contexts * add include * make function const * add helper for uniform mappings * expose cache clearing for operand lifter * decoding context documentation: * move virtual inheritance down * remove unused var names * add type alias * remove underscores * make sure we have poetry * check version in CI * try specify python3 * newer poetry install script * fail fast * try use pythons pip * upgrade pip? * install directly * update in linux too	2022-08-17 16:42:17 -04:00