mirror of
https://github.com/lifting-bits/remill
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ci-experiments
9 Commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
 Duncan Ogilvie
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92cbd7a182 | Fix compilation on Windows (clang-cl) | ||
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Duncan Ogilvie
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4bc1b54d6d | Switch back to C++17 | ||
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Duncan Ogilvie
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ddef25db7c | Add support for LLVM 15-21 | ||
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2over12
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0183248218 |
llvm 17 fixes (#688)
* llvm 17 fix
* more instances
* more fixes
* add inline
* bump ci
* bump cxx common
* add 17 case
* bump xcode version
* macos 13
* xcode 15
* bump docker to llvm 17
* change actual matrix value
* opaque pointers are the default now
* actually remove the option
* debug size
* install tree
* fix install
* fix install?
* get tree after
* build dir?
* tree above
* accumulate
* bug?
* try to remove intermediate packaging
* fix opt
* only inline
* give up on function inlining
* llvm 17
* remove debug tasks
* Update scripts/build.sh
Co-authored-by: William Tan <1284324+Ninja3047@users.noreply.github.com>
* Revert "Update scripts/build.sh"
This reverts commit
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Eric Kilmer
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22b3d4b231 |
Fix GCC compilation (#672)
* Fix compilation with GCC
Fixes a few errors reported by GCC and not Clang
1. "non-trivial designated initializers not supported"
- Fixed by adding array entries that were missing initializers and
reordering
2. "Cannot bind packed field"
- This fixes arrays missing initializers for some entries. This
isn't the greatest fix because instead of using a reference, we
use a pointer, which is basically the same thing, but it is
checked less strictly. I think a real fix would be to remove the
'packed' annotations.
* Add GCC to CI
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2over12
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db394b3979 |
Fix bug in rendering actual PC from NEXT_PC with thumb preffix/suffix instructions (#661)
* use context to figure out mode in thumb for insn size * add patches for inst_next based on curr isamode * add decoding context constant injection in lifting * allocate registers to repr context and insert belief about context registers as first value * add regression test * fix imports * add comment |
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Alex Cameron
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fb018c96e9 |
PowerPC Support (#645)
* Add skeleton for PPC
* Copyright notices
* Fill in some details for the PPC arch
* Start building a (wrong) PPC runtime
* Begin populating state structure
* First pass for EIS state structure
* Map registers to Sleigh register names
* More fixes
* add optional param
* Create handle unsupported and invalid instruction isels
* Correct typo
* Get a basic `remill-lift` invocation running without failure
* Fix capitalisation
* Set vle context reg
* Fix SleighDecoder signatures
* Set VLE context register in the Sleigh engine in addition to our
internal context reg mapping
* Capitalize reg names
* Add the flag registers for XER and CR
* Rename bitflag structures in PPC state
* PPC Sleigh patches (#643)
* Modified sleigh patch script to generate patches for multiple .sinc files
* update README with new examples of sleigh patch script invocation
* add ppc register definition
* add ppc sleigh patches
* fix issue with remill_insn_size definition
* regenerate sleigh patches for PPC
* update CMakeLists.txt to include PPC patches
* Add TEA signal as a register in the PPC state
* Uppercase the stack pointer register name
* Fix PPC instruction sizes
* initial PPC tests
* remove duplicate tests
* fix tests for e_stmvgprw/e_ldmvgprw
* add tests for loading/storing from special registers
* add tests with internal conditionals in pcode
* fix for pc reg and addr width not being the same... I suspect this issue is going to come up elsewhere
* add heuristic for flow from normal intrainstruction flow
* rework tests to allow testing for different sized registers
* add tests for overflow and record add
* fix bug with log printout
* add intrafunction control flow lifting
* handle edge case where there is no pcode op at the zero index
* Fix another inconsistency with mismatching address and PC reg size
* Allocate unique ptrs in the entry block
* Fix `INT_LEFT` and `INT_RIGHT` impl where shift exceeds bit width
* fix supiece lift?
* Add PPC emulate instruction to hyper call
* fix for pc reg and addr width not being the same... I suspect this issue is going to come up elsewhere
* add heuristic for flow from normal intrainstruction flow
* add intrafunction control flow lifting
* handle edge case where there is no pcode op at the zero index
* Fix another inconsistency with mismatching address and PC reg size
* fix supiece lift?
* Allocate unique ptrs in the entry block
* Fix `INT_LEFT` and `INT_RIGHT` impl where shift exceeds bit width
* fix int2float semantics
should use appropriate sized float based on the output size
* add tests for lifting int2float
* fix INT_{LEFT,RIGHT} semantics
should be `ICmpSGE` instead of `ICmpSGT`
* add cr0-7 registers
* fix formatting
* fix conditional branch test
* add test for compare
* re-enable rotate left word immediate and mask test
* genericize TestSpecOutput
* explicit instruction data size
* add test for syscall/callother (disabled)
* add tests for store/load word
* add test to convert from float to int
* specify intrinsic arg type, fixes null deref
* Add PPC emulate instruction to hyper call
* add headers + formatting
* remove old comment
* Map CRALL register
* Add basic LLVM data layout that specifies 32-bit addresses
* Remove unused variables
* convert auto* to auto when possible
* RegisterPrecondition -> RegisterCondition
* fix variable name
* convert any to variant
* use std::move
* bump to c++20, use concepts
* set arch in constructor since class isn't generic anyways
* formatting
* make type aliases
* bump cxx-common
* add comment
* clang format
* throw exception if register not found
* use const ref
* use shorthand for lambda capture values
* Add more detail to data layout to include proper stack alignment
* Compare to the correct size for SUBPIECE impl
* Add Sleigh message to error
* throw exception in else case
* throw runtime error if register value has incorrect type
* use reference instead of value
* get rid of unnecessary type alias
* formatting
* Propagate VLE context reg value into Sleigh
* Remove unnecessary whitespace
* Remove stale TODO and NOTE comments
* add additional parameter to test runner to specify decoding context
* drop llvm 14, bump macos version
* bump cxx-common, fix ci.yml mac build
* add test for unconditional relative negative branch
* add missing space to pcode debug log
* fix bug due to unordered_map, iteration order matters
* add error log in case we aren't able to adjust PC value
* use helper for getting register reference
* Revert "add optional param"
This reverts commit
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2over12
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854c73e06a |
Ian/instruction carry lifter (#615)
* add lifter field * arch has intrinsics * use insn lifter in trace lifter * limit default lifters to ops only * init lifters * pass arch in tests * fix bug in swap * stop using archbase decode in sleigh arches |
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2over12
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eef338df00 |
Ian/sleigh support rebased (#607)
* cmake: Bring in SLEIGH as a dependency
* sleigh: Boilerplate for adding a new arch
* sleigh: Begin passing instruction sequences into SLEIGH
* cmake: Rename target to be X86 specific
* sleigh: Copy over more X86 runtime code and get things running
* sleigh: Begin populating operands in the returned instruction
* sleigh: Set instruction category for a few opcodes
* sleigh: Initial attempt at generating LLVM IR for P-Code
* sleigh: Implement enough opcodes to run the `sleigh-lift` example
* sleigh: Get things building with an up-to-date Remill tree
* sleigh: Use the new SLA helpers
* sleigh: Clear operands between invalid lifts
* added thumb2
* stub out thumb
* need to refactor to relift the instruction
* factored lifter out of handler:
* allow lifters to decide wether to use sleigh
* relift bytes
* fixed both lifter contexts
* hey a copy lifted :)
* need to refactor to use parameterptrs to unify interface to memory
* refactored to use parameter abstraction
* lift at correct location
* add control flow to pc and next
* add categories mostly
* fix direct semantics add cbranch
* track cbranch metavar also lift returns
* cmake: Fix SleighArch.h path
* sleigh: Support more binary ops
* sleigh: Implement ZEXT
* sleigh: Support SEXT op
* sleigh: Implement 2COMP and INT_NEGATE
* mutex around parsing sleigh specs
* fixed typos in custom image
* added handling for exceptions, need to fix issue with xml parsing
* sleigh: Support boolean binops
* sleigh: Support float binary ops
* sleigh: Support a few more float pcode ops that require LLVM intrinsics
* sleigh: Add entries for ops that require overflow intrinsics
* sleigh: Implement more float unary ops
* sleigh: Reduce duplication in ops that require float intrinsics
* expose mutex
* fix fallthough and format of control flow resolution
* sleigh: Support CARRY, SCARRY and SBORROW
* Remove duplicate THUMB2 arch in enum
* Remove duplicate THUMB2 entry in archnames array
* Implement STORE op
* Fix incorrect index
* Support PIECE and SUBPIECE ops
* Support remaining set of PCode ops in the base set. Now to do the
pseudo ops.
* Implement additional ops
* Partially implement a few pseudo ops + a few missing from the docs
* Fix the variadic op condition
* Include <mutex> to build on Linux
* stop lying about insn categories/functions
* set function insns with mnemonic
* fix fallthrough for ind calls
* More virtualization, fewer pimples
* switch back to x86 normal
* Fix off-by-eight issue with ADR in AArch32
* Get rid of mutex in sleigh, make a globally-available remill locker for handling sleigh issues
* CHange allow 32 bit shift to true, not sure if valid but oh well
* Use the node size when creating constants
* fix memory
* store memory state back
* fix calling intrinsic table
* fix comp sizes
* load pspec data
* add pspec names
* add differential test
* fix tests start pretty printer
* add runner
* added really slow memory
* add comparison of memory state
* do reset
* fix uninitialized module
* fixed lift crash
* add amd64 runtime
* unfix fs, gs, and pc
* added whitelist file
* fix memory to update state with uninitialized reads
* better pc handling
* add main.py
* x86 compiles
* fixup patch generation
* add replacements for mem locs and constant varnodes, now need to handle special branches
* added replacement for direct branches
* add context clears
* add handler for claim_eq
* comment out clears for now
* added ambiguity check
* handle duplicate names in same constructor
* mantain sleigh invariant of 1 or 0 in flag
* added uint8t memory intrinsics
* extend shift value when needed
* handle cmovs
* update patch generation
* removed deprecated load
* fix for returned type
* builds
* add logging
* add comment on why not compute GEPAccessors in Arch.cpp
* enable opaque pointers
* fix memory state update
* add mem_16 impls
* not preserve 1 bit width
* fix CR changes
* fix L and R for shift operands bigger than target
* revert use after move
* more CR fixes
* remove lookahead... lets try this again
* rework to create internal function that is inlined to allow for early return control flow
* terminate conditionally
* avoid large iteration counts for .REP insns
* fix patch for rep insns
* handle inst_start in patches
* handle inserting insn_size constructor outside of macros
* hint size of insn_size
* refactor bool functions to make more sense
* just use ;
* remove delete of operands when fail to lift
* remove copy and paste
* remove unused deps
* add patch file to sleigh list
* prep git user
* refer to checkout
* maybe shell type?
* fix layout
* fix format again
* fix
* update dockerfile
* fix gitwatcher to point to current project:
* Revert "fix gitwatcher to point to current project:"
This reverts commit
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