* Update README.md
fix missing link
* Update LIFE_OF_AN_INSTRUCTION.md
There are difference address between picture and example code.
maybe it is just a little mistake
* Update DESIGN.md
between A and B from C...
maybe it is wrong grammar.
but English is not my first language.
downstream tools can distinguish between LLVM `load` and `store` instructions from accesses to the modeled program's memory.
=>
downstream tools can distinguish LLVM `load` and `store` instructions from accesses to the modeled program's memory.
it seems more nature. (i think.)
* Minor reformatting, re-enabling test of CCMP.
* Modified post-decoder of CCMP_n_CONDCMP_IMM, added more tests for it. Also added post-decoders, but NO tests for the register-register variant
* Fixes#144.
* Tests for LDP and STP. Decoder and semantics, but no tests for LDR and STR on the B, H, S, D, and Q vector sub-regs.
* Minor fix
* Minor fix, I think, to pre-index memops
* Minor simplifying code to pre- and post-index address operand handling