Remill tries to infer the proper type of an argument for a semantic function.
If the argument is unused that won't work and yields wrong results.
However, in that case, it doesn't matter what's passed,
as nobody uses the value, so passing undef works and prevents issues.
* Get Remill building with LLVM 16
* Update scripts and README
* Refactor `MoveConstantIntoModule` check to reduce duplication
* Remove hack since we don't plan to clone functions across contexts
* Remove call to deprecated LLVM function
* Add LLVM 16 to CI
* Bump cxx-common version
* Fix scripts to work with new `cxx-common`
* Don't add unsupported `readnone` attribute with LLVM 16
* Use `memory(none)` with LLVM 16 instead of `readnone`
* Add LLVM 16 to docker lifter entrypoint
* stuff
* make decoders standalone from arch
* compiles
* fix lazy initialization of intrinsic table
* add back sleigh arch
* added switching between arches... need to update contexts
* add instructin sizes
* thumb triplet
* back out of lambda approach
* updating context in thumb case
* fix differential tester to initialize lifter
* add back lambda approach
* aarch32 context updates
* add tests
* fix assetions in tests
* fix address alignment for tests
* add better decode function
* fix tests
* add conditional tests
* fix uninitialized context in contextupdater
* restore old contexts on call...
* null out branch taken arch on indirects
* fix fallthrough for conditional where neither src evaluates properly
* initialize is interproc
* fix initial context arm
* fix boolop bug where params would be lifted when not bool op
* fix comparison
* remove debug
* make missing context non fatal
* bump sleigh
* add insn flow variant
* stub out computing categories
* add control flow structuring
* adding unconditoinal abnormal
* start refactoring flows to share more structure
* rework conditionals to express a combination of a condition with an abnormal flow
* finish basic flow analysis
* add context updater
* implement eq
* stop passing back contexts through return value
* add tests
* rework constructors, make flow usage consistent
* implement flows in aarch32
* add implementation of flows for old cateogries and no context
* make sleigh lifter backwards compatible by applying flows to instructions
* fix bug in generating coarse flows
* refactor to allow lifter to bring along decoding state
* rework insertion of branch taken vats
* fix off by one
* fix size
* dont reset bytes before use
* disable broken float ops
* back of ambiguity to non fatal error, also add logging of callother's encountered
* update names
* remove debug logging
* add comment about x86 context
* move to headers
* move eqs
* order of ctors, fields, methods
* noop subtype of normal
* remove direct constructors
* remove more duplication
* more duplication in noop
* remove unused field
* add utility for is thumb
* absolute path
* remove duplication
* absolute paths
* review fixes
* make const refs
* make enums match style guide
* add constructor to flow
* non ref
* make refs
* move map out of optional
* refer to enum
* move curr id out
* fix BOOL_NEGATE for non 1 bit
* type alias for decoding result of branch taken and flow
* more delog
* this language makes me incredibly happy
* remap flags and treat metavars more like how the instructionlifter does it
* more fixes to metavars
* fix pc reg definition so consistent with value during isntruction execution
* fix alignment of test
* add todo
* extract condition
* add comment
* add lifter field
* arch has intrinsics
* use insn lifter in trace lifter
* limit default lifters to ops only
* init lifters
* pass arch in tests
* fix bug in swap
* stop using archbase decode in sleigh arches
* cmake: Bring in SLEIGH as a dependency
* sleigh: Boilerplate for adding a new arch
* sleigh: Begin passing instruction sequences into SLEIGH
* cmake: Rename target to be X86 specific
* sleigh: Copy over more X86 runtime code and get things running
* sleigh: Begin populating operands in the returned instruction
* sleigh: Set instruction category for a few opcodes
* sleigh: Initial attempt at generating LLVM IR for P-Code
* sleigh: Implement enough opcodes to run the `sleigh-lift` example
* sleigh: Get things building with an up-to-date Remill tree
* sleigh: Use the new SLA helpers
* sleigh: Clear operands between invalid lifts
* added thumb2
* stub out thumb
* need to refactor to relift the instruction
* factored lifter out of handler:
* allow lifters to decide wether to use sleigh
* relift bytes
* fixed both lifter contexts
* hey a copy lifted :)
* need to refactor to use parameterptrs to unify interface to memory
* refactored to use parameter abstraction
* lift at correct location
* add control flow to pc and next
* add categories mostly
* fix direct semantics add cbranch
* track cbranch metavar also lift returns
* cmake: Fix SleighArch.h path
* sleigh: Support more binary ops
* sleigh: Implement ZEXT
* sleigh: Support SEXT op
* sleigh: Implement 2COMP and INT_NEGATE
* mutex around parsing sleigh specs
* fixed typos in custom image
* added handling for exceptions, need to fix issue with xml parsing
* sleigh: Support boolean binops
* sleigh: Support float binary ops
* sleigh: Support a few more float pcode ops that require LLVM intrinsics
* sleigh: Add entries for ops that require overflow intrinsics
* sleigh: Implement more float unary ops
* sleigh: Reduce duplication in ops that require float intrinsics
* expose mutex
* fix fallthough and format of control flow resolution
* sleigh: Support CARRY, SCARRY and SBORROW
* Remove duplicate THUMB2 arch in enum
* Remove duplicate THUMB2 entry in archnames array
* Implement STORE op
* Fix incorrect index
* Support PIECE and SUBPIECE ops
* Support remaining set of PCode ops in the base set. Now to do the
pseudo ops.
* Implement additional ops
* Partially implement a few pseudo ops + a few missing from the docs
* Fix the variadic op condition
* Include <mutex> to build on Linux
* stop lying about insn categories/functions
* set function insns with mnemonic
* fix fallthrough for ind calls
* More virtualization, fewer pimples
* switch back to x86 normal
* Fix off-by-eight issue with ADR in AArch32
* Get rid of mutex in sleigh, make a globally-available remill locker for handling sleigh issues
* CHange allow 32 bit shift to true, not sure if valid but oh well
* Use the node size when creating constants
* fix memory
* store memory state back
* fix calling intrinsic table
* fix comp sizes
* load pspec data
* add pspec names
* add differential test
* fix tests start pretty printer
* add runner
* added really slow memory
* add comparison of memory state
* do reset
* fix uninitialized module
* fixed lift crash
* add amd64 runtime
* unfix fs, gs, and pc
* added whitelist file
* fix memory to update state with uninitialized reads
* better pc handling
* add main.py
* x86 compiles
* fixup patch generation
* add replacements for mem locs and constant varnodes, now need to handle special branches
* added replacement for direct branches
* add context clears
* add handler for claim_eq
* comment out clears for now
* added ambiguity check
* handle duplicate names in same constructor
* mantain sleigh invariant of 1 or 0 in flag
* added uint8t memory intrinsics
* extend shift value when needed
* handle cmovs
* update patch generation
* removed deprecated load
* fix for returned type
* builds
* add logging
* add comment on why not compute GEPAccessors in Arch.cpp
* enable opaque pointers
* fix memory state update
* add mem_16 impls
* not preserve 1 bit width
* fix CR changes
* fix L and R for shift operands bigger than target
* revert use after move
* more CR fixes
* remove lookahead... lets try this again
* rework to create internal function that is inlined to allow for early return control flow
* terminate conditionally
* avoid large iteration counts for .REP insns
* fix patch for rep insns
* handle inst_start in patches
* handle inserting insn_size constructor outside of macros
* hint size of insn_size
* refactor bool functions to make more sense
* just use ;
* remove delete of operands when fail to lift
* remove copy and paste
* remove unused deps
* add patch file to sleigh list
* prep git user
* refer to checkout
* maybe shell type?
* fix layout
* fix format again
* fix
* update dockerfile
* fix gitwatcher to point to current project:
* Revert "fix gitwatcher to point to current project:"
This reverts commit 711da11e6f.
* fix ninja builds
* disable sleigh tests
* remove duplicates
* refactor
* fix non reset context in sleigh lifter
* remove debugging prints
* wrote CI runner
* add handwritten test infra
* refactor to allow sharing JIT test running between differential tester and hand written tests
* allow for internal ownership of semantics module
* handwritten test framework
* fix hand written tests
* pc rel testruns
* add pc rel regression
* fix script for pc rel
* fix names for priors to ignore whitespace
* fix action ops
* add xor to repl ops
* add xors to patch
* add arm patch to build
* fix test for semantics
* allow cross platform tests to run
* add running diff tester
* 2 underscores?
* run tests on macos too
* fix command
* fix whitelist path
* remove unused test data
* install python deps for differential tests
* update script to git patches
* update patches to git format
* attempt to fixup patches
* update ref for sleigh
* install test depends docker
* point docker to correct dir
* install pydeps in macos too
* initialize address field
* exports, also tag master on sleigh
* add comments and whitelist undefined value OF in shifts
* add of accessor to whitelist impl
* change variables to non alloca and remove dead code
* remove dead code:
* replace dump with print
* code quality
* make non null into ref
* type alias
* remove allocas from unit tests
* Address copypasta comment.
* Address PR comment.
* Address PR comment.
* fix build
* unify diff modules into single structure
* remove extra newline
* lock sleigh to specific commit
* remove new lines
* remove useless fenv headers
* caps
* copyright notices
* update more copyright
* fix reviews
* early returns out of accessors
* early return
* auto
* return getarchbyname
* insert register rather than modify reference
* just return
* only log in the assembly logger
* prefer functional style
* remove commented code
* move defaults to header
* that's not how arch switches work in pcode
* informative names
* simplify control flow in fill
* early return
* fix early exit condition
* refactor register default into function
* make one liner
* early return
* unary instead of unop
* construct pair with {}
* move cbranch into binops instead of integer binops
* refactor float ops into getter
* factor out float type
* early return
* separate out callother handling
* do pointer extensions cleaner
* braces
* add private headers to lifters
* refactor redirecting control flow out of instruction
* use constant check function
* remove has_value
* structure for preconditions
* return success when applying eq claim
* expose arch base and move shared functionality into x86 base
* dedup x86 code
* dedup aarch32
* remove needless assignment, also remove else after an if that returns
Co-authored-by: Alex Cameron <asc@tetsuo.sh>
Co-authored-by: Artem Dinaburg <artem@trailofbits.com>
Co-authored-by: Peter Goodman <peter.goodman@gmail.com>
* Expose DR registers, and make the instruction lifter invent global variables when registers are missing
* Bug fix
* Bug fix
* Address review comments
* Address review comments
* This branch contains support for new architectures.
* Initial start to support for AArch 32
* Progress
* Forgot the new files
* Added all data Integer processing instructions without S + ADDS and started ANDS
* Updated
* Finished Integer Data Processing with three registers, added integer data processing with 2 regs + immediate, started MUL instructions
* UMULL, UMULLS, UMLAL, UMLALS
* Corrected condition for addend or 0 immediate for UMULL/UMLAL + SMULL/SMLAL instructions
* Correct ops in Binary.cpp
* UMAAL
* SMULL, SMULLS, SMLAL, SMLALS + corrected acc was missing shift left in concatination
* Updated decoding instructions based on top level encodings
* Update returns around kDataProcessingRI and kDataProcessingI with comments to explain the correlation to the instruction rep
* Added appropriate inst.category flags to Multiply and accumulate
* Load/Store Word, Unsigned Byte (immediate, literal) && start of Logical Arithmetic (three register, immediate shift)
* Was missing UMAAL DEF_ISEL in Binary.cpp
* AddAddrRegOp
* Logical Arithmetic (three register, immediate shift) without accounting for the possible PC jump
* Made DecodeA32ExpandImm much much smaller
* Replaced some imm ops with AddImmOp calls
* Created AddShiftOp
* Added interpreter for evaluating new PC value at decoding time to handle direct jumps and conditional jumps
* Created EvalPCDest added PC evaluation to Logical Arithmetic Instructions
* AddShiftOp -> AddShiftOp, AddShiftThenExtractOp, AddExtractThenShiftOp
* Cleaned up some formatting, Renamed DecodeA32ExpandImm to ExpandTo32AddImmAddCarry and added a clarifying comment
* Added comment to EvalPCDest for clarity
* Cleaned up some things, updated the decoding semantics and semantics for the logical instructions
* Shortened kLogArithEvaluators and fixed a bug
* Updates from testing instructions
* Fixed DEF_ISEL for pre/post index instructions in MEM.cpp
* Integer Test and Compare (two register, immediate shift)
* Logical Arithmetic (two register and immediate)
* Integer Test and Compare (one register and immediate)
* Added to the top level encoding infrastructure to handle the Data-processing register (register shift) set of instructions and 3 corresponding subsets
* Add structs for the 3 subsets of Data-processing register (register shift)
* Code status before refactoring operand types
* This branch contains support for new architectures.
* Initial start to support for AArch 32
* Progress
* Forgot the new files
* Added all data Integer processing instructions without S + ADDS and started ANDS
* Updated
* Finished Integer Data Processing with three registers, added integer data processing with 2 regs + immediate, started MUL instructions
* UMULL, UMULLS, UMLAL, UMLALS
* Corrected condition for addend or 0 immediate for UMULL/UMLAL + SMULL/SMLAL instructions
* Correct ops in Binary.cpp
* UMAAL
* SMULL, SMULLS, SMLAL, SMLALS + corrected acc was missing shift left in concatination
* Updated decoding instructions based on top level encodings
* Update returns around kDataProcessingRI and kDataProcessingI with comments to explain the correlation to the instruction rep
* Added appropriate inst.category flags to Multiply and accumulate
* Load/Store Word, Unsigned Byte (immediate, literal) && start of Logical Arithmetic (three register, immediate shift)
* Was missing UMAAL DEF_ISEL in Binary.cpp
* AddAddrRegOp
* Logical Arithmetic (three register, immediate shift) without accounting for the possible PC jump
* Made DecodeA32ExpandImm much much smaller
* Replaced some imm ops with AddImmOp calls
* Created AddShiftOp
* Added interpreter for evaluating new PC value at decoding time to handle direct jumps and conditional jumps
* Created EvalPCDest added PC evaluation to Logical Arithmetic Instructions
* AddShiftOp -> AddShiftOp, AddShiftThenExtractOp, AddExtractThenShiftOp
* Cleaned up some formatting, Renamed DecodeA32ExpandImm to ExpandTo32AddImmAddCarry and added a clarifying comment
* Added comment to EvalPCDest for clarity
* Cleaned up some things, updated the decoding semantics and semantics for the logical instructions
* Shortened kLogArithEvaluators and fixed a bug
* Updates from testing instructions
* Fixed DEF_ISEL for pre/post index instructions in MEM.cpp
* Integer Test and Compare (two register, immediate shift)
* Logical Arithmetic (two register and immediate)
* Integer Test and Compare (one register and immediate)
* Added to the top level encoding infrastructure to handle the Data-processing register (register shift) set of instructions and 3 corresponding subsets
* Add structs for the 3 subsets of Data-processing register (register shift)
* Code status before refactoring operand types
* Finished updates off master
* Start of operand refactor
* Finished Expression Operand Support
* Fix the .gitignore to add AArch32 to lib/Arch && removed all extra rrx ops from semantics
* Updated .gitignore again, Added AddShiftRegRegOperand, Updated AddShiftRegImmOperand, Finished Register shift instructions for Integer Test and Compare, Logical Arithmetic, Integer Data Processing
* Updated ROR in AddShiftRegRegOperand
* Created ExtractAndZExtExpr
* Fixed comment formatting in if else statements
* Created RORExpr
* Small fixes
* Small fix in Logical Arithmetic (two register and immediate)
* Corrected AddShiftRegRegOperand and cleaned it up. Split the carry op into a separate function.
* conditional support + Start of Branch instructions
* Created AddExprOp, cleaned up some expressions in reg shifted reg, and updated some occurances of ShiftThenExtractOp with ExtractAndZExtExpr
* Updates from testing register shifted by register value inst
* Fix to ROR in AddShiftRegCarryOperand
* Corrected negation in DecodeCondition
* DecodeCondition edit
* DecodeCondition and AddShiftRegCarryOperand edits
* Updated arch_for_decode to arch
* Halfword Multiply and Accumulate
* Edits from testing Halfword Multiply and Accumulate
* Changed order of operands in Halfword Multiply and Accumulate to better reflect inst format + updated inst errors
* Branch (Imm) & BX/BXL
* Update aarch32 cmake
* cmake update
* CLZ
* Forgot BITBYTE.cpp
* MOVT
* Integer Saturating Arithmetic
* updated semantics in SMLAWh & SMLAh to use Select for setting PSTATE.Q
* Started Load/Store Word, Unsigned Byte (register) & fixed MOV halfword
* Load/Store Word, Unsigned Byte (register)
* Finished testing load/Store Word, Unsigned Byte (register)
* Load/Store Dual, Half, Signed Byte (register)
* Rest of Extra load store: Load/Store Dual, Half, Signed Byte (immediate, literal)
* Finished testing all the Load/store additions
* Signed multiply, Divide
* Cleaned up SExt some
* Saturate Insts and Start of Load Store Multiple - STMDB and LDM (aliases which support PUSH and POP of multiple regs)
* Condensed args in STMDB and LDM semantics
* Rest of Multiple Load/Store that do not execute in a different mode
* Bitfield Extract
* Extend and Add
* fix
* NOP
* Small fix
* Simplified the bit reps in TryMoveSpecialRegisterAndHintsI
* Moved Bitfield extract semantics out of BINARY and into BITBYTE
* Finished correcting S/ZExt and Trunc use
* Ran scripts/format-files to format
* Smoke Test
* Add false delay slot to kCategoryConditionalDirectFunctionCall
* CI: Use single packaging job, add changelog support (#491)
* CI: Add tag handler (#492)
* Delay slot fixes to TraceLifter
Co-authored-by: Peter Goodman <peter.goodman@gmail.com>
Co-authored-by: Alessandro Gario <5714290+alessandrogario@users.noreply.github.com>
* Refactors the code to improve directory layout, use more std::string_view in place of std::string, deletes some deprecated functions, deprecates some other functions for eventual deletion, and includes semantics for sparcv8 (sparc32) and sparcv9 (sparc64)
* Update new dir layout with llvm 11 support
* Whoops missing files
* Drop llvm 800 from workflow
* Minor fix
* Move where the install directives are in CMake
* Minor fixes
* Rename tools/ to bin/.
* Minor tweaks
* Should fix issues
wizardengineer