4 Commits

Author SHA1 Message Date
Peter Goodman 026ea1afec Issue 150 lift bin dir (#167)
* Added semantics and tests for SDIV

* Semantics and tests for SCVTF.

* Working on integer to/from float conversion bugs related to managing the fpu status register.

* Switch to using the check float function wrapper

* Remove unintentional call to fetestexcept

* Adding in a compiler reordering barrier.

* Added inline assembly that will force clang's optimizer to give up and filed a clang bug

* Adds some trailing spaces into some files. Re-enables all aarch64 tests.

* Added semantics and tests for SDIV

* Semantics and tests for SCVTF.

* Switch to using the check float function wrapper

* Remove unintentional call to fetestexcept

* Added inline assembly that will force clang's optimizer to give up and filed a clang bug

* Adds some trailing spaces into some files. Re-enables all aarch64 tests.

* Bringing the aarch64 branch back in line with master.

* Adds in a test and ISEL for LDR_BL_LDST_REGOFF, and fixes up the instructions in some SMOV and UMOV tests.

* Various fixes and some minor debugging aids for aarch64

* Resets the fenv before running lifted code.

* All existing aarch64 tests should now pass.
2017-11-29 22:53:58 -05:00
Peter Goodman b96aec8fd8 Issue 137 lift bin ls (#155)
* [WIP] Float Instructions for /bin/ls (#146)

* Added bunch of float instructions required by `ls`

Not all variants implemented but should follow same structure

* FADD
* FMUL
* FMOV
* FCVTZU
* FCMPE

Fixed bugs with FMOV_n_to_n

Implemented FMOV_D64 variant

Fixed up FADD, need to doublecheck edgecases

FMUL Added

Weird interaction with checking for denormalized output
fpclassify(prod) gives you FP_SUBNORMAL, but in the native code
the idc bit on SR and FPSR is not set so commented out for now

FCVTZU added - FPSR flags not being caught and set

Type fix In<float64_t>

Fixes for FCVTZU

Added FCMPE Sn

Cleanup testing

* Check unallocated encoding for float insts

* Minor modifications.

* Trying to wrap up some fpu operations inside of a function that can test the inputs and outputs.

* Semantics, but no tests, for some variants of FMUL, FADD, and FDIV.

* Tests for FDIV and FSUB. Additional tests for FADD and FMUL.

* Minor tweak.

* Minor tweak to using fetestexcept only once

* Added UNTESTED implementation of mrs with fpsr.

* FMOV vector instructions, some fixes (#149)

* FMOV vector instructions, some fixes

* More tests for FMOV_VECTOR

* Fix to STRH isel, uses the wrong semantics. Minor modification to add DEF_CONDs to the ForEachIsel iterator.

* Various instructions for aarch64 lifting WIP

* Tests working except where commented

Specifically STRH test throws some lifter error
FCVT has issues with flag determiniation

* Bug fix with oxc fpsr bit in print state

* FCVTS, FMOV_S, FMOV_D

* FNEG, FMADD_S/D

For FMADD still seeing weird issues with flag setting on multiplication
step when using denormals as factor, look into later

* More precise definition of segment selectors. Directory traversal utility function.

* Minor tweaks to existing APIs.

* FMADD has a bug with one type

* Fixed reimport of test

* Semantics and tests for BICS.

* Minor fix to tests.

* Semantics and tests for integer REV instructions.

* Minor fix.

* Minor fixes, forgot an ISEL.

* Tests for MOVK.

* Tests for MOVZ.

* Forgot test file.

* More STR-related tests.

* Minor fix

* Minor fix

* Post-decoder fixes for STR.

* Minor fix?

* Semantics and tests for general simd DUP.

* Minor fix for arrangement specifier. Found a possible bug in capstone/keystone.

* Wrong isel in test

* Semantics and tests for simd ADD and SUB.

* Semantics and tests for LD1_ASISDLSEP_I2_I2

* Whoops, forgot TEST_INPUTS to test.

* Semantics and tests for LD1_ASISDLSEP_I1_I1

* Used wrong isel names in tests.

* Tests and semantics for two more variants of post-index LD1

* Minor fix

* Minor fix to a check for large op sizes. Regenerated AArch64 Extract.cpp, ordering extractors by most constrained first. I observed an issue where LD1_ASISDLSEP_I3_I3 was incorrectly extracted as LD1_ASISDLSEP_R3_R3.

* Minor fix of a decoder routine for loading multiple structures.

* Semantics and tests for RBIT, SMOV, and UMOV. Also semantics, but NO tests for a large number of SIMD instructions.

* Tests for simd smax, smin, umax, umin.

* Tests for sminp, smaxp, uminp, umaxp.

* Tests for ADDP.

* Tests for the simd vector register of cmeq, cmgt, and cmge.

* Minor fix.

* Tests for cmeq, cmgt, and cmge that compare a vector against zero.
2017-11-04 15:52:23 -04:00
Peter Goodman bed610be6b Issue 137 lift bin ls (#142)
* Post-decoder, semantics, and tests for BFM.

* Semantics and tests for ANDS

* Minor naming conflict fix

* Semantics and tests for SMADDL and SMULH

* Semantics and tests for MADD

* Minor symbol renaming fix

* Semantics and tests for EXTR, which also implements ROR

* Minor fix to number of arguments to test

* Semantics, but NO tests for LSLV, LSRV, ASRV, and RORV.

* Semantics and tests for ORN

* Minor fix

* Semantics for SBC, but no tests. Added an AddWithCarryNZCV primitive, untested

* Missing two's complement negation in subs using new addwithcarrynzcv

* Tests for SBC. Semantics and tests for SBCS

* Semantics and tests for UCVTF

* Update state save/restore code to record SIMD regs

* Attempt to fix save/restore code

* More attempts at getting the save/restore assembly right, this time with the fpsr bits.

* More fixes

* More tests extracting the fpsr state. Also trying without including RestoreState.S. I don't remember why I had that.

* Semantics for SVC and BRK
2017-09-25 13:29:10 -04:00
Peter Goodman bef332fd2a Aarch64 tester (#128)
* Added in more aarch64 instructions. Fixed some x86 instructions. The x86 test cases now exercise each test through every possible combination of flags.

* Adding missing files

* Another missing file

* Rename file

* Fixup some macros

* IPR

* More improvements on the test runner

* Test runner fixes related to me not being familiar with aarch64 assembly

* Fixing default data layout

* Trying to use llc to compile bitcode to aarch64 assembly. wth.

* Revert back to using the CMAKE_BC_COMPILER for building the test assembly file instead of the whole CMAKE_LL_COMPILER stuff, now that I've adjusted cxx-common to use the right build target for aarch64.

* Documentation updates. Fixes for aarch64.

* Making progress. The native tests can run, but the first lifted test faults. Not yet sure why.

* Weirdest issue is happening on aarch64. A pointer argument is being compiled to an integer, and that's really screwing things up.

* Add caching of the libraries path to the main cmakelists to avoid having to re-run build.sh all the time when the TRAILOBITS_LIBRARIES env var is not globally defined. Experimenting with trying to force the semantics to be compiled using the x86_64 target, regardless of host arch, or modelled arch of the semantics. This is to try to get around the issue where a single-element struct containing a pointer is lowered into a uintptr_t when passed by value as an argument on aarch64.

* Alright, falling back on handling this problem in the lifter (for now, at least). Really not ideal.

* Test runner works afaict
2017-08-04 15:24:46 -04:00